Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / design / sys / iop / ncu / rtl / ncu.v
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: ncu.v
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35module ncu (
36 scan_in,
37 tcu_scan_en,
38 scan_out,
39 tcu_ncu_io_clk_stop,
40 tcu_ncu_clk_stop,
41 tcu_se_scancollar_in,
42 tcu_se_scancollar_out,
43 tcu_array_wr_inhibit,
44 tcu_pce_ov,
45 tcu_aclk,
46 tcu_bclk,
47 tcu_dbr_gateoff,
48 tcu_ncu_mbist_start,
49 ncu_tcu_mbist_done,
50 ncu_tcu_mbist_fail,
51 tcu_ncu_mbist_scan_in,
52 ncu_tcu_mbist_scan_out,
53 tcu_mbist_user_mode,
54 tcu_mbist_bisi_en,
55 ncu_pcx_stall_pq,
56 pcx_ncu_data_px2,
57 pcx_ncu_data_rdy_px1,
58 ncu_cpx_data_ca,
59 ncu_cpx_req_cq,
60 cpx_ncu_grant_cx,
61 ncu_dmu_pio_data,
62 ncu_dmu_pio_hdr_vld,
63 ncu_dmu_mmu_addr_vld,
64 dmu_ncu_wrack_vld,
65 dmu_ncu_wrack_tag,
66 ncu_dmu_mondo_ack,
67 ncu_dmu_mondo_nack,
68 ncu_dmu_mondo_id,
69 ncu_dmu_vld,
70 ncu_dmu_data,
71 dmu_ncu_stall,
72 dmu_ncu_vld,
73 dmu_ncu_data,
74 ncu_dmu_stall,
75 ncu_ccu_vld,
76 ncu_ccu_data,
77 ccu_ncu_data,
78 ccu_ncu_vld,
79 ccu_ncu_stall,
80 ncu_ccu_stall,
81 ncu_mcu0_vld,
82 ncu_mcu0_data,
83 mcu0_ncu_stall,
84 mcu0_ncu_vld,
85 mcu0_ncu_data,
86 ncu_mcu0_stall,
87 ncu_mcu1_vld,
88 ncu_mcu1_data,
89 mcu1_ncu_stall,
90 mcu1_ncu_vld,
91 mcu1_ncu_data,
92 ncu_mcu1_stall,
93 ncu_mcu2_vld,
94 ncu_mcu2_data,
95 mcu2_ncu_stall,
96 mcu2_ncu_vld,
97 mcu2_ncu_data,
98 ncu_mcu2_stall,
99 ncu_mcu3_vld,
100 ncu_mcu3_data,
101 mcu3_ncu_stall,
102 mcu3_ncu_vld,
103 mcu3_ncu_data,
104 ncu_mcu3_stall,
105 ncu_niu_vld,
106 ncu_niu_data,
107 niu_ncu_stall,
108 niu_ncu_vld,
109 niu_ncu_data,
110 ncu_niu_stall,
111 ncu_tcu_vld,
112 ncu_tcu_data,
113 tcu_ncu_stall,
114 tcu_ncu_vld,
115 tcu_ncu_data,
116 ncu_tcu_stall,
117 ncu_mio_ssi_mosi,
118 ncu_mio_ssi_sck,
119 mio_ncu_ssi_miso,
120 mio_ncu_ext_int_l,
121 ncu_rst_vld,
122 ncu_rst_data,
123 rst_ncu_stall,
124 rst_ncu_vld,
125 rst_ncu_data,
126 ncu_rst_stall,
127 efu_ncu_fuse_data,
128 efu_ncu_srlnum0_xfer_en,
129 efu_ncu_srlnum1_xfer_en,
130 efu_ncu_srlnum2_xfer_en,
131 efu_ncu_fusestat_xfer_en,
132 efu_ncu_coreavl_xfer_en,
133 efu_ncu_bankavl_xfer_en,
134 sii_ncu_req,
135 ncu_sii_gnt,
136 sii_ncu_data,
137 rst_ncu_unpark_thread,
138 rst_ncu_xir_,
139 ncu_rst_xir_done,
140 ncu_cmp_tick_enable,
141 ncu_wmr_vec_mask,
142 ncu_spc0_core_available,
143 ncu_spc1_core_available,
144 ncu_spc2_core_available,
145 ncu_spc3_core_available,
146 ncu_spc4_core_available,
147 ncu_spc5_core_available,
148 ncu_spc6_core_available,
149 ncu_spc7_core_available,
150 ncu_spc0_core_enable_status,
151 ncu_spc1_core_enable_status,
152 ncu_spc2_core_enable_status,
153 ncu_spc3_core_enable_status,
154 ncu_spc4_core_enable_status,
155 ncu_spc5_core_enable_status,
156 ncu_spc6_core_enable_status,
157 ncu_spc7_core_enable_status,
158 ncu_spc0_core_running,
159 ncu_spc1_core_running,
160 ncu_spc2_core_running,
161 ncu_spc3_core_running,
162 ncu_spc4_core_running,
163 ncu_spc5_core_running,
164 ncu_spc6_core_running,
165 ncu_spc7_core_running,
166 spc0_ncu_core_running_status,
167 spc1_ncu_core_running_status,
168 spc2_ncu_core_running_status,
169 spc3_ncu_core_running_status,
170 spc4_ncu_core_running_status,
171 spc5_ncu_core_running_status,
172 spc6_ncu_core_running_status,
173 spc7_ncu_core_running_status,
174 ncu_spc_pm,
175 ncu_spc_ba01,
176 ncu_spc_ba23,
177 ncu_spc_ba45,
178 ncu_spc_ba67,
179 ncu_spc_l2_idx_hash_en,
180 ncu_sii_pm,
181 ncu_sii_ba01,
182 ncu_sii_ba23,
183 ncu_sii_ba45,
184 ncu_sii_ba67,
185 ncu_sii_l2_idx_hash_en,
186 ncu_l2t_pm,
187 ncu_l2t_ba01,
188 ncu_l2t_ba23,
189 ncu_l2t_ba45,
190 ncu_l2t_ba67,
191 ncu_mcu_pm,
192 ncu_mcu_ba01,
193 ncu_mcu_ba23,
194 ncu_mcu_ba45,
195 ncu_mcu_ba67,
196 ncu_rst_fatal_error,
197 ncu_tcu_bank_avail,
198 sii_ncu_dparity,
199 sii_ncu_niuctag_ue,
200 ncu_sii_niuctag_uei,
201 sii_ncu_niuctag_ce,
202 ncu_sii_niuctag_cei,
203 sii_ncu_niua_pe,
204 ncu_sii_niua_pei,
205 sii_ncu_niud_pe,
206 ncu_sii_niud_pei,
207 sii_ncu_dmuctag_ue,
208 ncu_sii_dmuctag_uei,
209 sii_ncu_dmuctag_ce,
210 ncu_sii_dmuctag_cei,
211 sii_ncu_dmua_pe,
212 ncu_sii_dmua_pei,
213 sii_ncu_dmud_pe,
214 ncu_sii_dmud_pei,
215 sii_ncu_syn_vld,
216 sii_ncu_syn_data,
217 tcu_sck_bypass,
218 sio_ncu_ctag_ce,
219 ncu_sio_ctag_cei,
220 sio_ncu_ctag_ue,
221 ncu_sio_ctag_uei,
222 ncu_sio_d_pei,
223 niu_ncu_ctag_ue,
224 ncu_niu_ctag_uei,
225 niu_ncu_ctag_ce,
226 ncu_niu_ctag_cei,
227 niu_ncu_d_pe,
228 ncu_niu_d_pei,
229 dmu_ncu_wrack_par,
230 ncu_dmu_mondo_id_par,
231 dmu_ncu_d_pe,
232 ncu_dmu_d_pei,
233 dmu_ncu_siicr_pe,
234 ncu_dmu_siicr_pei,
235 dmu_ncu_ctag_ue,
236 ncu_dmu_ctag_uei,
237 dmu_ncu_ctag_ce,
238 ncu_dmu_ctag_cei,
239 dmu_ncu_ncucr_pe,
240 ncu_dmu_ncucr_pei,
241 dmu_ncu_ie,
242 ncu_dmu_iei,
243 mcu0_ncu_ecc,
244 ncu_mcu0_ecci,
245 mcu0_ncu_fbr,
246 ncu_mcu0_fbri,
247 ncu_mcu0_fbui,
248 mcu1_ncu_ecc,
249 ncu_mcu1_ecci,
250 mcu1_ncu_fbr,
251 ncu_mcu1_fbri,
252 ncu_mcu1_fbui,
253 mcu2_ncu_ecc,
254 ncu_mcu2_ecci,
255 mcu2_ncu_fbr,
256 ncu_mcu2_fbri,
257 ncu_mcu2_fbui,
258 mcu3_ncu_ecc,
259 ncu_mcu3_ecci,
260 mcu3_ncu_fbr,
261 ncu_mcu3_fbri,
262 ncu_mcu3_fbui,
263 rst_wmr_protect,
264 cluster_arst_l,
265 ccu_serdes_dtm,
266 ccu_cmp_io_sync_en,
267 ccu_io_cmp_sync_en,
268 ccu_io_out,
269 gclk,
270 tcu_div_bypass,
271 tcu_atpg_mode,
272 ncu_dbg1_error_event,
273 ncu_dbg1_stall,
274 ncu_dbg1_vld,
275 ncu_dbg1_data,
276 dbg1_ncu_stall,
277 dbg1_ncu_vld,
278 dbg1_ncu_data) ;
279wire [63:0] core_running;
280wire [63:0] core_running_status;
281wire [7:0] coreavail;
282wire aclk_io;
283wire bclk_io;
284wire pce_ov;
285wire aclk_wmr;
286wire wmr_protect;
287wire array_wr_inhibit_io;
288wire clkgen_io_scanin;
289wire wmr_unused_io;
290wire por_unused_io;
291wire aclk_cmp;
292wire bclk_cmp;
293wire clkgen_cmp_scanout;
294wire pce_ov1;
295wire aclk_wmr_unused;
296wire cmp_io_sync_en;
297wire io_cmp_sync_en;
298wire wmr_protect_unused;
299wire array_wr_inhibit_cmp;
300wire clkgen_cmp_scanin;
301wire wmr_unused_cmp;
302wire por_unused_cmp;
303wire [71:0] mondo_data0_dout;
304wire ncu_mondo0_rf_cust_scanout;
305wire mondo_data0_wr;
306wire mondo_rd_en;
307wire [5:0] mondo_data_addr_p1;
308wire [5:0] mondo_data_addr_p0;
309wire [71:0] mondo_data0_din;
310wire [71:0] mondo_data1_dout;
311wire ncu_mondo1_rf_cust_scanin;
312wire ncu_mondo1_rf_cust_scanout;
313wire mondo_data1_wr;
314wire [71:0] mondo_data1_din;
315wire [143:0] cpubuf_dout;
316wire ncu_cpu_buf_rf_cust_scanin;
317wire ncu_cpu_buf_rf_cust_scanout;
318wire cpubuf_wr;
319wire cpubuf_rden;
320wire [4:0] cpubuf_tail_ptr;
321wire [4:0] cpubuf_head_ptr;
322wire [143:0] cpubuf_din;
323wire array_wr_inhibit_gate;
324wire mb1_run;
325wire [175:0] iobuf_dout;
326wire ncu_iobuf0_rf_cust_scanin;
327wire ncu_iobuf0_rf_cust_scanout;
328wire iobuf_wr;
329wire iobuf_rden;
330wire [4:0] iobuf_tail_ptr;
331wire [4:0] iobuf_head_ptr;
332wire [175:0] iobuf_din;
333wire mb0_run;
334wire ncu_iobuf1_rf_cust_scanin;
335wire ncu_iobuf1_rf_cust_scanout;
336wire [143:0] intbuf_dout;
337wire ncu_intbuf_rf_cust_scanin;
338wire ncu_intbuf_rf_cust_scanout;
339wire intbuf_wr;
340wire intbuf_rden;
341wire [4:0] intbuf_tail_ptr;
342wire [4:0] intbuf_head_ptr;
343wire [143:0] intbuf_din;
344wire [5:0] cpubuf_tail_f;
345wire [5:0] iobuf_head_f;
346wire [63:0] mondo_busy_vec_f;
347wire tap_mondo_acc_addr_invld_d2_f;
348wire tap_mondo_acc_seq_d2_f;
349wire [63:0] tap_mondo_dout_d2_f;
350wire ncu_fcd_ctl_scanout;
351wire [5:0] mb0_addr;
352wire [7:0] mb0_wdata;
353wire mb0_iobuf_wr_en;
354wire iobuf_ue_f;
355wire intbuf_ue_f;
356wire mondotbl_pe_f;
357wire mb0_scanout;
358wire [7:0] mb1_wdata;
359wire mb1_cpubuf_wr_en;
360wire [6:0] mb1_addr;
361wire [5:0] cpubuf_head_s;
362wire [5:0] iobuf_tail_s;
363wire [63:0] io_mondo_data0_din_s;
364wire [63:0] io_mondo_data1_din_s;
365wire [5:0] io_mondo_data_wr_addr_s;
366wire io_mondo_data_wr_s;
367wire ncu_fcd_ctl_scanin;
368wire [21:0] tap_mondo_acc_addr_s;
369wire tap_mondo_acc_seq_s;
370wire [63:0] tap_mondo_din_s;
371wire tap_mondo_wr_s;
372wire [7:0] cpubuf_mb0_data;
373wire iobuf_uei;
374wire intbuf_uei;
375wire mondotbl_pei;
376wire [6:0] intman_tbl_raddr;
377wire [6:0] intman_tbl_waddr;
378wire [15:0] intman_tbl_din;
379wire intman_tbl_rden;
380wire intman_tbl_wr;
381wire [3:0] ncu_ssi_data;
382wire ncu_ssi_stall;
383wire ncu_ssi_vld;
384wire [143:0] dmubuf_din;
385wire [4:0] dmubuf_raddr;
386wire [4:0] dmubuf_waddr;
387wire dmubuf0_wr;
388wire dmubuf1_wr;
389wire dmubuf_rden;
390wire ncu_tcu_soc_error;
391wire [1:0] ncu_scksel;
392wire [15:0] intman_tbl_dout;
393wire ncu_scd_ctl_scanin;
394wire ncu_scd_ctl_scanout;
395wire [3:0] ssi_ncu_data;
396wire ssi_ncu_stall;
397wire ssi_ncu_vld;
398wire [143:0] dmubuf0_dout;
399wire [143:0] dmubuf1_dout;
400wire ncu_intman_rf_cust_scanin;
401wire ncu_intman_rf_cust_scanout;
402wire ncu_dmubuf0_rf_cust_scanin;
403wire ncu_dmubuf0_rf_cust_scanout;
404wire ncu_dmubuf1_rf_cust_scanin;
405wire ncu_dmubuf1_rf_cust_scanout;
406wire ncu_ssitop_ctl_scanin;
407wire ncu_ssitop_ctl_scanout;
408wire cmp_slow_sync_en;
409wire slow_cmp_sync_en;
410wire [1:0] ncu_dmu_dpar;
411
412
413
414
415input scan_in;
416input tcu_scan_en;
417output scan_out;
418//input tcu_clk_stop;
419input tcu_ncu_io_clk_stop;
420//input tcu_soc4cmp_clk_stop;
421input tcu_ncu_clk_stop;
422input tcu_se_scancollar_in;
423input tcu_se_scancollar_out;
424input tcu_array_wr_inhibit;
425input tcu_pce_ov;
426input tcu_aclk;
427input tcu_bclk;
428
429input tcu_dbr_gateoff;
430input [1:0] tcu_ncu_mbist_start ;
431output [1:0] ncu_tcu_mbist_done ;
432output [1:0] ncu_tcu_mbist_fail ;
433input tcu_ncu_mbist_scan_in ;
434output ncu_tcu_mbist_scan_out ;
435input tcu_mbist_user_mode;
436input tcu_mbist_bisi_en;
437
438output ncu_pcx_stall_pq; // PINDEF:RIGHT
439input [129:0] pcx_ncu_data_px2; // PINDEF:RIGHT
440input pcx_ncu_data_rdy_px1; // PINDEF:RIGHT
441
442output [145:0] ncu_cpx_data_ca; // PINDEF:RIGHT
443output [7:0] ncu_cpx_req_cq; // PINDEF:RIGHT
444input [7:0] cpx_ncu_grant_cx; // PINDEF:RIGHT
445
446
447output [63:0] ncu_dmu_pio_data; // PINDEF:RIGHT
448output ncu_dmu_pio_hdr_vld; // PINDEF:RIGHT
449output ncu_dmu_mmu_addr_vld; // PINDEF:RIGHT
450
451input dmu_ncu_wrack_vld; // PINDEF:RIGHT
452input [3:0] dmu_ncu_wrack_tag; // PINDEF:RIGHT
453
454output ncu_dmu_mondo_ack; // PINDEF:RIGHT
455output ncu_dmu_mondo_nack; // PINDEF:RIGHT
456output [5:0] ncu_dmu_mondo_id; // PINDEF:RIGHT
457
458
459output ncu_dmu_vld; // PINDEF:RIGHT
460output [31:0] ncu_dmu_data; // PINDEF:RIGHT
461input dmu_ncu_stall; // PINDEF:RIGHT
462input dmu_ncu_vld; // PINDEF:RIGHT
463input [31:0] dmu_ncu_data; // PINDEF:RIGHT
464output ncu_dmu_stall; // PINDEF:RIGHT
465
466output ncu_ccu_vld; // From c2i of c2i.v
467output [3:0] ncu_ccu_data; // From c2i of c2i.v
468input [3:0] ccu_ncu_data; // To i2c of i2c.v
469input ccu_ncu_vld; // To i2c of i2c.v
470input ccu_ncu_stall; // To c2i of c2i.v
471output ncu_ccu_stall; // From i2c of i2c.v
472
473output ncu_mcu0_vld; // From c2i of c2i.v
474output [3:0] ncu_mcu0_data; // From c2i of c2i.v
475input mcu0_ncu_stall; // To c2i of c2i.v
476input mcu0_ncu_vld; // To i2c of i2c.v
477input [3:0] mcu0_ncu_data; // To i2c of i2c.v
478output ncu_mcu0_stall; // From i2c of i2c.v
479
480output ncu_mcu1_vld; // From c2i of c2i.v
481output [3:0] ncu_mcu1_data; // From c2i of c2i.v
482input mcu1_ncu_stall; // To c2i of c2i.v
483input mcu1_ncu_vld; // To i2c of i2c.v
484input [3:0] mcu1_ncu_data; // To i2c of i2c.v
485output ncu_mcu1_stall; // From i2c of i2c.v
486
487output ncu_mcu2_vld; // From c2i of c2i.v
488output [3:0] ncu_mcu2_data; // From c2i of c2i.v
489input mcu2_ncu_stall; // To c2i of c2i.v
490input mcu2_ncu_vld; // To i2c of i2c.v
491input [3:0] mcu2_ncu_data; // To i2c of i2c.v
492output ncu_mcu2_stall; // From i2c of i2c.v
493
494output ncu_mcu3_vld; // From c2i of c2i.v
495output [3:0] ncu_mcu3_data; // From c2i of c2i.v
496input mcu3_ncu_stall; // To c2i of c2i.v
497input mcu3_ncu_vld; // To i2c of i2c.v
498input [3:0] mcu3_ncu_data; // To i2c of i2c.v
499output ncu_mcu3_stall; // From i2c of i2c.v
500
501output ncu_niu_vld; // PINDEF:BOT
502output [31:0] ncu_niu_data; // PINDEF:BOT
503input niu_ncu_stall; // PINDEF:BOT
504input niu_ncu_vld; // PINDEF:BOT
505input [31:0] niu_ncu_data; // PINDEF:BOT
506output ncu_niu_stall; // PINDEF:BOT
507
508output ncu_tcu_vld; // From i2c of i2c.v
509output [7:0] ncu_tcu_data; // From i2c of i2c.v
510input tcu_ncu_stall; // To i2c of i2c.v
511input tcu_ncu_vld; // To c2i of c2i.v
512input [7:0] tcu_ncu_data; // To c2i of c2i.v
513output ncu_tcu_stall; // From c2i of c2i.v
514
515output ncu_mio_ssi_mosi;
516output ncu_mio_ssi_sck;
517input mio_ncu_ssi_miso;
518input mio_ncu_ext_int_l;
519
520output ncu_rst_vld; // From c2i of c2i.v
521output [3:0] ncu_rst_data; // From c2i of c2i.v
522input rst_ncu_stall; // To c2i of c2i.v
523input rst_ncu_vld; // To i2c of i2c.v
524input [3:0] rst_ncu_data; // To i2c of i2c.v
525output ncu_rst_stall; // From i2c of i2c.v
526
527//input efu_ncu_fuse_clk1;
528input efu_ncu_fuse_data;
529
530//input efu_ncu_coreavail_dshift;
531//input efu_ncu_bankavail_dshift;
532//input efu_ncu_fusestat_dshift;
533//input efu_ncu_sernum0_dshift;
534//input efu_ncu_sernum1_dshift;
535//input efu_ncu_sernum2_dshift;
536
537input efu_ncu_srlnum0_xfer_en;
538input efu_ncu_srlnum1_xfer_en;
539input efu_ncu_srlnum2_xfer_en;
540input efu_ncu_fusestat_xfer_en;
541input efu_ncu_coreavl_xfer_en;
542input efu_ncu_bankavl_xfer_en;
543
544input sii_ncu_req; // PINDEF:RIGHT
545output ncu_sii_gnt; // PINDEF:RIGHT
546input [31:0] sii_ncu_data; // PINDEF:RIGHT
547
548
549//// ASI related input
550input rst_ncu_unpark_thread;
551input rst_ncu_xir_;
552output ncu_rst_xir_done;
553
554output ncu_cmp_tick_enable; // goes to SPC
555//output cmp_tick_enable;
556//output tcu_wmr_vec_mask; // this signal should have been named as ncu_wmr_vec_mask; goes to SPC
557output ncu_wmr_vec_mask;
558
559output ncu_spc0_core_available ;
560output ncu_spc1_core_available ;
561output ncu_spc2_core_available ;
562output ncu_spc3_core_available ;
563output ncu_spc4_core_available ;
564output ncu_spc5_core_available ;
565output ncu_spc6_core_available ;
566output ncu_spc7_core_available ;
567
568output ncu_spc0_core_enable_status;
569output ncu_spc1_core_enable_status;
570output ncu_spc2_core_enable_status;
571output ncu_spc3_core_enable_status;
572output ncu_spc4_core_enable_status;
573output ncu_spc5_core_enable_status;
574output ncu_spc6_core_enable_status;
575output ncu_spc7_core_enable_status;
576
577output [7:0] ncu_spc0_core_running;
578output [7:0] ncu_spc1_core_running;
579output [7:0] ncu_spc2_core_running;
580output [7:0] ncu_spc3_core_running;
581output [7:0] ncu_spc4_core_running;
582output [7:0] ncu_spc5_core_running;
583output [7:0] ncu_spc6_core_running;
584output [7:0] ncu_spc7_core_running;
585
586input [7:0] spc0_ncu_core_running_status;
587input [7:0] spc1_ncu_core_running_status;
588input [7:0] spc2_ncu_core_running_status;
589input [7:0] spc3_ncu_core_running_status;
590input [7:0] spc4_ncu_core_running_status;
591input [7:0] spc5_ncu_core_running_status;
592input [7:0] spc6_ncu_core_running_status;
593input [7:0] spc7_ncu_core_running_status;
594
595//// core gasket ////
596output ncu_spc_pm ;
597output ncu_spc_ba01;
598output ncu_spc_ba23;
599output ncu_spc_ba45;
600output ncu_spc_ba67;
601output ncu_spc_l2_idx_hash_en;
602//// sii ////
603output ncu_sii_pm ;
604output ncu_sii_ba01;
605output ncu_sii_ba23;
606output ncu_sii_ba45;
607output ncu_sii_ba67;
608output ncu_sii_l2_idx_hash_en;
609//// l2t ////
610output ncu_l2t_pm ;
611output ncu_l2t_ba01;
612output ncu_l2t_ba23;
613output ncu_l2t_ba45;
614output ncu_l2t_ba67;
615//// mcu ////
616output ncu_mcu_pm ;
617output ncu_mcu_ba01;
618output ncu_mcu_ba23;
619output ncu_mcu_ba45;
620output ncu_mcu_ba67;
621
622
623//// RAS ////
624//input [5:0] vcid;
625output ncu_rst_fatal_error;
626//output ncu_tcu_soc_error;
627output [7:0] ncu_tcu_bank_avail;
628
629input [1:0] sii_ncu_dparity;
630
631input sii_ncu_niuctag_ue;
632output ncu_sii_niuctag_uei;
633input sii_ncu_niuctag_ce;
634output ncu_sii_niuctag_cei;
635input sii_ncu_niua_pe;
636output ncu_sii_niua_pei;
637input sii_ncu_niud_pe;
638output ncu_sii_niud_pei;
639input sii_ncu_dmuctag_ue;
640output ncu_sii_dmuctag_uei;
641input sii_ncu_dmuctag_ce;
642output ncu_sii_dmuctag_cei;
643input sii_ncu_dmua_pe;
644output ncu_sii_dmua_pei;
645input sii_ncu_dmud_pe;
646output ncu_sii_dmud_pei;
647
648input sii_ncu_syn_vld;
649input [3:0] sii_ncu_syn_data;
650input tcu_sck_bypass;
651
652//// sio ////
653input sio_ncu_ctag_ce;
654output ncu_sio_ctag_cei;
655input sio_ncu_ctag_ue;
656output ncu_sio_ctag_uei;
657//input sio_ncu_d_pe;
658output ncu_sio_d_pei;
659
660//// niu ////
661input niu_ncu_ctag_ue;
662output ncu_niu_ctag_uei;
663input niu_ncu_ctag_ce;
664output ncu_niu_ctag_cei;
665input niu_ncu_d_pe;
666output ncu_niu_d_pei;
667
668//// dmu ////
669input dmu_ncu_wrack_par; //// going nowhere for now ////
670output ncu_dmu_mondo_id_par;
671
672input dmu_ncu_d_pe;
673output ncu_dmu_d_pei;
674input dmu_ncu_siicr_pe;
675output ncu_dmu_siicr_pei;
676input dmu_ncu_ctag_ue;
677output ncu_dmu_ctag_uei;
678input dmu_ncu_ctag_ce;
679output ncu_dmu_ctag_cei;
680input dmu_ncu_ncucr_pe;
681output ncu_dmu_ncucr_pei;
682input dmu_ncu_ie;
683output ncu_dmu_iei;
684
685//// mcu's ////
686input mcu0_ncu_ecc;
687output ncu_mcu0_ecci;
688input mcu0_ncu_fbr;
689output ncu_mcu0_fbri;
690//input mcu0_ncu_fbu;
691output ncu_mcu0_fbui;
692
693input mcu1_ncu_ecc;
694output ncu_mcu1_ecci;
695input mcu1_ncu_fbr;
696output ncu_mcu1_fbri;
697//input mcu1_ncu_fbu;
698output ncu_mcu1_fbui;
699
700input mcu2_ncu_ecc;
701output ncu_mcu2_ecci;
702input mcu2_ncu_fbr;
703output ncu_mcu2_fbri;
704//input mcu2_ncu_fbu;
705output ncu_mcu2_fbui;
706
707input mcu3_ncu_ecc;
708output ncu_mcu3_ecci;
709input mcu3_ncu_fbr;
710output ncu_mcu3_fbri;
711//input mcu3_ncu_fbu;
712output ncu_mcu3_fbui;
713
714// new cluster header, io2clock begins
715
716input rst_wmr_protect;
717input cluster_arst_l;
718input ccu_serdes_dtm;
719input ccu_cmp_io_sync_en;
720input ccu_io_cmp_sync_en;
721input ccu_io_out;
722
723input gclk; // global clk - this is either cmp or dr
724input tcu_div_bypass;
725input tcu_atpg_mode;
726
727// end io2clk cluster
728
729
730output ncu_dbg1_error_event; //An Error event occurred in NCU.
731output ncu_dbg1_stall; //NCU back Pressure control signal to Dbg1
732output ncu_dbg1_vld; //NCU to Dbg1 UCB data valid
733output [3:0] ncu_dbg1_data; //NCU to Dbg1 UCB data bus
734input dbg1_ncu_stall; //Dbg1 back pressure control signal to NCU
735input dbg1_ncu_vld; //Dbg1 to NCU UCB data valid
736input [3:0] dbg1_ncu_data; //Dbg1 to NCU UCB data
737
738
739wire iol2clk;
740wire l2clk;
741
742
743//assign ncu_dbg1_error_event = 0;
744//assign ncu_dbg1_stall = 0;
745//assign ncu_dbg1_vld = 0;
746//assign ncu_dbg1_data = 0;
747
748/////////////////////////////////////
749//assign rng_ncu_data[3:0]=4'b0;
750//assign rng_ncu_vld=1'b0;
751//assign rng_ncu_stall=1'b0;
752
753//assign ncu_tcu_mbist_done[1:0]=2'b0 ;
754//assign ncu_tcu_mbist_fail[1:0]=2'b0 ;
755//assign ncu_tcu_mbist_scan_out=1'b0;
756/////////////////////////////////////
757/*autowire*/
758// Beginning of automatic wires (for undeclared instantiated-module outputs)
759// End of automatics
760
761
762//========== ASI port reassignment ==============//
763//assign cmp_tick_enable = 1'b1;
764//assign tcu_wmr_vec_mask = 1'b0;
765
766//assign ncu_spc0_core_enable_status = core_enable_status[0] ;
767//assign ncu_spc1_core_enable_status = core_enable_status[1] ;
768//assign ncu_spc2_core_enable_status = core_enable_status[2] ;
769//assign ncu_spc3_core_enable_status = core_enable_status[3] ;
770//assign ncu_spc4_core_enable_status = core_enable_status[4] ;
771//assign ncu_spc5_core_enable_status = core_enable_status[5] ;
772//assign ncu_spc6_core_enable_status = core_enable_status[6] ;
773//assign ncu_spc7_core_enable_status = core_enable_status[7] ;
774
775assign ncu_spc0_core_running[7:0] = core_running[7:0] ;
776assign ncu_spc1_core_running[7:0] = core_running[15:8] ;
777assign ncu_spc2_core_running[7:0] = core_running[23:16] ;
778assign ncu_spc3_core_running[7:0] = core_running[31:24] ;
779assign ncu_spc4_core_running[7:0] = core_running[39:32] ;
780assign ncu_spc5_core_running[7:0] = core_running[47:40] ;
781assign ncu_spc6_core_running[7:0] = core_running[55:48] ;
782assign ncu_spc7_core_running[7:0] = core_running[63:56] ;
783
784assign core_running_status[63:0] = { spc7_ncu_core_running_status[7:0],
785 spc6_ncu_core_running_status[7:0],
786 spc5_ncu_core_running_status[7:0],
787 spc4_ncu_core_running_status[7:0],
788 spc3_ncu_core_running_status[7:0],
789 spc2_ncu_core_running_status[7:0],
790 spc1_ncu_core_running_status[7:0],
791 spc0_ncu_core_running_status[7:0] } ;
792
793assign { ncu_spc7_core_available,
794 ncu_spc6_core_available,
795 ncu_spc5_core_available,
796 ncu_spc4_core_available,
797 ncu_spc3_core_available,
798 ncu_spc2_core_available,
799 ncu_spc1_core_available,
800 ncu_spc0_core_available } = coreavail[7:0] ;
801
802//// gasket ////
803//assign ncu_spc_pm = l2pm[4];
804//assign ncu_spc_ba67 = l2pm[3];
805//assign ncu_spc_ba45 = l2pm[2];
806//assign ncu_spc_ba23 = l2pm[1];
807//assign ncu_spc_ba01 = l2pm[0];
808//assign ncu_spc_l2_idx_hash_en = l2idxhs_en_status;
809//// sii ////
810//assign ncu_sii_pm = l2pm[4];
811//assign ncu_sii_ba67 = l2pm[3];
812//assign ncu_sii_ba45 = l2pm[2];
813//assign ncu_sii_ba23 = l2pm[1];
814//assign ncu_sii_ba01 = l2pm[0];
815//assign ncu_sii_l2_idx_hash_en = l2idxhs_en_status;
816//// l2t ////
817//assign ncu_l2t_pm = l2pm[4];
818//assign ncu_l2t_ba67 = l2pm[3];
819//assign ncu_l2t_ba45 = l2pm[2];
820//assign ncu_l2t_ba23 = l2pm[1];
821//assign ncu_l2t_ba01 = l2pm[0];
822//// mcu ////
823//assign ncu_mcu_pm = l2pm[4];
824//assign ncu_mcu_ba67 = l2pm[3];
825//assign ncu_mcu_ba45 = l2pm[2];
826//assign ncu_mcu_ba23 = l2pm[1];
827//assign ncu_mcu_ba01 = l2pm[0];
828
829
830
831
832clkgen_ncu_io clkgen_ncu_io (
833 // outputs
834 .l2clk(iol2clk),
835 .aclk(aclk_io),
836 .bclk(bclk_io),
837 .scan_out(scan_out),
838 .pce_ov(pce_ov),
839 .aclk_wmr(aclk_wmr),
840 .wmr_protect(wmr_protect),
841 .array_wr_inhibit(array_wr_inhibit_io),
842 // inputs
843 .tcu_wr_inhibit(tcu_array_wr_inhibit),
844 .tcu_atpg_mode(tcu_atpg_mode),
845 .tcu_clk_stop(tcu_ncu_io_clk_stop),
846 .tcu_pce_ov(tcu_pce_ov),
847 .rst_wmr_protect(rst_wmr_protect),
848 .rst_wmr_(1'b0),
849 .rst_por_(1'b0),
850 .ccu_cmp_slow_sync_en(1'b0),
851 .ccu_slow_cmp_sync_en(1'b0),
852 .tcu_div_bypass(tcu_div_bypass),
853 .ccu_div_ph(ccu_io_out),
854 .cluster_div_en(1'b1),
855 .gclk(gclk),
856 .cluster_arst_l(cluster_arst_l),
857 .clk_ext(1'b0),
858 .ccu_serdes_dtm(ccu_serdes_dtm),
859 .tcu_aclk(tcu_aclk),
860 .tcu_bclk(tcu_bclk),
861 .scan_en(tcu_scan_en),
862 .scan_in(clkgen_io_scanin),
863 .wmr_(wmr_unused_io),
864 .por_(por_unused_io),
865 .cmp_slow_sync_en(cmp_slow_sync_en),
866 .slow_cmp_sync_en(slow_cmp_sync_en)
867);
868
869clkgen_ncu_cmp clkgen_ncu_cmp (
870 // output
871 .l2clk(l2clk),
872 .aclk(aclk_cmp),
873 .bclk(bclk_cmp),
874 .scan_out(clkgen_cmp_scanout),
875 .pce_ov(pce_ov1),
876 .aclk_wmr(aclk_wmr_unused),
877 .cmp_slow_sync_en(cmp_io_sync_en),
878 .slow_cmp_sync_en(io_cmp_sync_en),
879 .wmr_protect(wmr_protect_unused),
880 .array_wr_inhibit(array_wr_inhibit_cmp),
881 // inputs
882 .tcu_wr_inhibit(tcu_array_wr_inhibit),
883 .tcu_atpg_mode(tcu_atpg_mode),
884 .tcu_clk_stop(tcu_ncu_clk_stop),
885 .tcu_pce_ov(tcu_pce_ov),
886 .rst_wmr_protect(rst_wmr_protect),
887 .rst_wmr_(1'b0),
888 .rst_por_(1'b0),
889 .ccu_cmp_slow_sync_en(ccu_cmp_io_sync_en),
890 .ccu_slow_cmp_sync_en(ccu_io_cmp_sync_en),
891 .tcu_div_bypass(tcu_div_bypass),
892 .ccu_div_ph(1'b1),
893 .cluster_div_en(1'b0),
894 .gclk(gclk),
895 .cluster_arst_l(cluster_arst_l),
896 .clk_ext(1'b0),
897 .ccu_serdes_dtm(ccu_serdes_dtm),
898 .tcu_aclk(tcu_aclk),
899 .tcu_bclk(tcu_bclk),
900 .scan_en(tcu_scan_en),
901 .scan_in(clkgen_cmp_scanin),
902 .wmr_(wmr_unused_cmp),
903 .por_(por_unused_cmp)
904);
905
906
907
908/*** mondo data0 mem ***/
909///* ncu_rf_cust auto_template (
910// .scan_out( ),
911// .wr_adr (mondo_data_addr_p1[5:0]),
912// .din (mondo_data0_din[71:0]),
913// .wr_en (mondo_data0_wr),
914// .wrclk (l2clk),
915// .rdclk (l2clk),
916// .rd_en (1'b1),
917// .rd_adr (mondo_data_addr_p0[5:0]),
918// .dout (mondo_data0_dout[71:0]) ); */
919n2_com_dp_64x72_cust ncu_mondo0_rf_cust ( /*autoinst*/
920 // Outputs
921 .dout(mondo_data0_dout[71:0]), // Templated
922 // Inputs
923 //.scan_in(ncu_mondo0_rf_cust_scanin),
924 .scan_in(scan_in),
925 .scan_out(ncu_mondo0_rf_cust_scanout),
926 .wrclk(l2clk), // Templated
927 .rdclk(l2clk), // Templated
928 .wr_en(mondo_data0_wr), // Templated
929 .rd_en(mondo_rd_en), // Templated
930 .wr_adr(mondo_data_addr_p1[5:0]), // Templated
931 .rd_adr(mondo_data_addr_p0[5:0]), // Templated
932 .din(mondo_data0_din[71:0]), // Templated
933 .tcu_se_scancollar_in(tcu_se_scancollar_in),
934 .tcu_se_scancollar_out(tcu_se_scancollar_out),
935 .tcu_array_wr_inhibit(array_wr_inhibit_cmp),
936 //.tcu_aclk(tcu_aclk),
937 //.tcu_bclk(tcu_bclk),
938 .tcu_aclk(aclk_cmp),
939 .tcu_bclk(bclk_cmp),
940 .tcu_pce_ov(pce_ov1),
941 //.tcu_wrclk_stop(1'b0),
942 //.tcu_rdclk_stop(1'b0));
943 .bist_clk_mux_sel(1'b0),
944 .rd_pce(1'b1),
945 .wr_pce(1'b1));
946
947
948
949/*** mondo data1 mem ***/
950///* ncu_rf_cust auto_template (
951// .scan_out( ),
952// .din (mondo_data1_din[71:0]),
953// .wr_en (mondo_data1_wr),
954// .wrclk (ol2clk),
955// .rdclk (l2clk),
956// .rd_en (1'b1),
957// .rd_adr (mondo_data_addr_p0[5:0]),
958// .dout (mondo_data1_dout[71:0]) ); */
959n2_com_dp_64x72_cust ncu_mondo1_rf_cust ( /*autoinst*/
960 // Outputs
961 .dout(mondo_data1_dout[71:0]), // Templated
962 // Inputs
963 .scan_in(ncu_mondo1_rf_cust_scanin),
964 .scan_out(ncu_mondo1_rf_cust_scanout),
965 .wrclk(l2clk), // Templated
966 .rdclk(l2clk), // Templated
967 .wr_en(mondo_data1_wr), // Templated
968 .rd_en(mondo_rd_en), // Templated
969 .wr_adr(mondo_data_addr_p1[5:0]), // Templated
970 .rd_adr(mondo_data_addr_p0[5:0]), // Templated
971 .din(mondo_data1_din[71:0]), // Templated
972 .tcu_se_scancollar_in(tcu_se_scancollar_in),
973 .tcu_se_scancollar_out(tcu_se_scancollar_out),
974 .tcu_array_wr_inhibit(array_wr_inhibit_cmp),
975 // .tcu_aclk(tcu_aclk),
976 // .tcu_bclk(tcu_bclk),
977 .tcu_aclk(aclk_cmp),
978 .tcu_bclk(bclk_cmp),
979 .tcu_pce_ov(pce_ov1),
980 //.tcu_wrclk_stop(1'b0),
981 //.tcu_rdclk_stop(1'b0));
982 .bist_clk_mux_sel(1'b0),
983 .rd_pce(1'b1),
984 .wr_pce(1'b1));
985 //.tcu_wrclk_stop(cmp_clk_stop),
986 //.tcu_rdclk_stop(cmp_clk_stop));
987
988
989
990/*** cpu_buf mem ***/
991/*
992// ncu_rf_cust auto_template (
993// .scan_out( ),
994// .wr_adr (cpubuf_tail_ptr[4:0]),
995// .din (cpubuf_din[143:0]),
996// .wr_en (cpubuf_wr),
997// .wrclk (l2clk),
998// .rdclk (iol2clk),
999// .rd_en (cpubuf_rden),
1000// .dout (cpubuf_dout[143:0]),
1001// .rd_adr (cpubuf_head_ptr[4:0]) );
1002 */
1003n2_com_dp_32x144s_cust ncu_cpu_buf_rf_cust ( /*autoinst*/
1004 // Outputs
1005 .dout(cpubuf_dout[143:0]), // Templated
1006 // Inputs
1007 .scan_in(ncu_cpu_buf_rf_cust_scanin),
1008 .scan_out(ncu_cpu_buf_rf_cust_scanout),
1009 .wrclk(l2clk), // Templated
1010 .rdclk(iol2clk), // Templated
1011 .wr_en(cpubuf_wr), // Templated
1012 .rd_en(cpubuf_rden), // Templated
1013 .wr_adr(cpubuf_tail_ptr[4:0]), // Templated
1014 .rd_adr(cpubuf_head_ptr[4:0]), // Templated
1015 .din(cpubuf_din[143:0]), // Templated
1016 .tcu_se_scancollar_in(tcu_se_scancollar_in),
1017 .tcu_se_scancollar_out(tcu_se_scancollar_out),
1018 .tcu_array_wr_inhibit(array_wr_inhibit_gate),
1019 .tcu_aclk(aclk_io),
1020 .tcu_bclk(bclk_io),
1021 .tcu_pce_ov(pce_ov),
1022 .bist_clk_mux_sel(mb1_run),
1023 .rd_pce(1'b1),
1024 .wr_pce(1'b1));
1025
1026
1027
1028
1029/*** io_buf mem ***/
1030///* ncu_rf_cust auto_template (
1031// .scan_out( ),
1032// .wr_adr (iobuf_tail_ptr[4:0]),
1033// .din (iobuf_din[143:0]),
1034// .wr_en (iobuf_wr),
1035// .wrclk (iol2clk),
1036// .rdclk (l2clk),
1037// .rd_en (iobuf_rden),
1038// .rd_adr (iobuf_head_ptr[4:0]),
1039// .dout (iobuf_dout[143:0]) ); */
1040n2_com_dp_32x144_cust ncu_iobuf0_rf_cust ( /*autoinst*/
1041 // Outputs
1042 .dout(iobuf_dout[143:0]), // Templated
1043 // Inputs
1044 .scan_in(ncu_iobuf0_rf_cust_scanin),
1045 .scan_out(ncu_iobuf0_rf_cust_scanout),
1046 .wrclk(iol2clk), // Templated
1047 .rdclk(l2clk), // Templated
1048 .wr_en(iobuf_wr), // Templated
1049 .rd_en(iobuf_rden), // Templated
1050 .wr_adr(iobuf_tail_ptr[4:0]), // Templated
1051 .rd_adr(iobuf_head_ptr[4:0]), // Templated
1052 .din(iobuf_din[143:0]), // Templated
1053 .tcu_se_scancollar_in(tcu_se_scancollar_in),
1054 .tcu_se_scancollar_out(tcu_se_scancollar_out),
1055 .tcu_array_wr_inhibit(array_wr_inhibit_gate),
1056 .tcu_aclk(aclk_cmp),
1057 .tcu_bclk(bclk_cmp),
1058 .tcu_pce_ov(pce_ov1),
1059 .bist_clk_mux_sel(mb0_run),
1060 .rd_pce(1'b1),
1061 .wr_pce(1'b1));
1062 //.tcu_wrclk_stop(io_clk_stop),
1063 //.tcu_rdclk_stop(cmp_clk_stop));
1064 //.tcu_wrclk_stop(1'b0),
1065 //.tcu_rdclk_stop(1'b0));
1066
1067
1068/*** io_buf1 mem ***/
1069///* ncu_rf_cust auto_template (
1070// .scan_out( ),
1071// .wr_adr (iobuf_tail_ptr[4:0]),
1072// .din (iobuf_din[175:144]),
1073// .wr_en (iobuf_wr),
1074// .wrclk (iol2clk),
1075// .rdclk (l2clk),
1076// .rd_en (iobuf_rden),
1077// .rd_adr (iobuf_head_ptr[4:0]),
1078// .dout (iobuf_dout[175:144]) ); */
1079n2_com_dp_32x32_cust ncu_iobuf1_rf_cust ( /*autoinst*/
1080 // Outputs
1081 .dout(iobuf_dout[175:144]), // Templated
1082 // Inputs
1083 .scan_in(ncu_iobuf1_rf_cust_scanin),
1084 .scan_out(ncu_iobuf1_rf_cust_scanout),
1085 .wrclk(iol2clk), // Templated
1086 .rdclk(l2clk), // Templated
1087 .wr_en(iobuf_wr), // Templated
1088 .rd_en(iobuf_rden), // Templated
1089 .wr_adr(iobuf_tail_ptr[4:0]), // Templated
1090 .rd_adr(iobuf_head_ptr[4:0]), // Templated
1091 .din(iobuf_din[175:144]), // Templated
1092 .tcu_se_scancollar_in(tcu_se_scancollar_in),
1093 .tcu_se_scancollar_out(tcu_se_scancollar_out),
1094 .tcu_array_wr_inhibit(array_wr_inhibit_gate),
1095 .tcu_aclk(aclk_cmp),
1096 .tcu_bclk(bclk_cmp),
1097 .tcu_pce_ov(pce_ov1),
1098 .bist_clk_mux_sel(mb0_run),
1099 .rd_pce(1'b1),
1100 .wr_pce(1'b1));
1101 //.tcu_wrclk_stop(1'b0),
1102 //.tcu_rdclk_stop(1'b0));
1103 //.tcu_wrclk_stop(io_clk_stop),
1104 //.tcu_rdclk_stop(cmp_clk_stop));
1105
1106
1107
1108
1109
1110/*** intbuf mem ***/
1111///* ncu_rf_cust auto_template (
1112// .scan_out( ),
1113// .wr_adr (intbuf_tail_ptr[4:0]),
1114// .din (intbuf_din[143:0]),
1115// .wr_en (intbuf_wr),
1116// .wrclk (l2clk),
1117// .rdclk (l2clk),
1118// .rd_en (intbuf_rden),
1119// .rd_adr (intbuf_head_ptr[4:0]),
1120// .dout (intbuf_dout[143:0]) ); */
1121n2_com_dp_32x144_cust ncu_intbuf_rf_cust ( /*autoinst*/
1122 // Outputs
1123 .dout(intbuf_dout[143:0]), // Templated
1124 // Inputs
1125 .scan_in(ncu_intbuf_rf_cust_scanin),
1126 .scan_out(ncu_intbuf_rf_cust_scanout),
1127 .wrclk(l2clk), // Templated
1128 .rdclk(l2clk), // Templated
1129 .wr_en(intbuf_wr), // Templated
1130 .rd_en(intbuf_rden), // Templated
1131 .wr_adr(intbuf_tail_ptr[4:0]), // Templated
1132 .rd_adr(intbuf_head_ptr[4:0]), // Templated
1133 .din(intbuf_din[143:0]), // Templated
1134 .tcu_se_scancollar_in(tcu_se_scancollar_in),
1135 .tcu_se_scancollar_out(tcu_se_scancollar_out),
1136 .tcu_array_wr_inhibit(array_wr_inhibit_cmp),
1137 .tcu_aclk(aclk_cmp),
1138 .tcu_bclk(bclk_cmp),
1139 .tcu_pce_ov(pce_ov1),
1140 .bist_clk_mux_sel(1'b0),
1141 .rd_pce(1'b1),
1142 .wr_pce(1'b1));
1143 // .tcu_wrclk_stop(1'b0),
1144 // .tcu_rdclk_stop(1'b0));
1145 // .tcu_wrclk_stop(cmp_clk_stop),
1146 // .tcu_rdclk_stop(cmp_clk_stop));
1147
1148
1149
1150
1151///* ncu_fcd_ctl auto_template (
1152// .scan_out( ) ); */
1153ncu_fcd_ctl ncu_fcd_ctl ( /*AUTOINST*/
1154 // Outputs
1155 .cpubuf_din (cpubuf_din[143:0]),
1156 .cpubuf_tail_f (cpubuf_tail_f[5:0]),
1157 .cpubuf_tail_ptr(cpubuf_tail_ptr[4:0]),
1158 .cpubuf_wr (cpubuf_wr),
1159 .intbuf_din (intbuf_din[143:0]),
1160 .intbuf_head_ptr(intbuf_head_ptr[4:0]),
1161 .intbuf_tail_ptr(intbuf_tail_ptr[4:0]),
1162 .intbuf_wr (intbuf_wr),
1163 .intbuf_rden (intbuf_rden),
1164 .iobuf_head_f (iobuf_head_f[5:0]),
1165 .iobuf_head_ptr(iobuf_head_ptr[4:0]),
1166 .iobuf_rden (iobuf_rden),
1167 .mondo_busy_vec_f(mondo_busy_vec_f[63:0]),
1168 .mondo_data0_din(mondo_data0_din[71:0]),
1169 .mondo_data0_wr(mondo_data0_wr),
1170 .mondo_data1_din(mondo_data1_din[71:0]),
1171 .mondo_data1_wr(mondo_data1_wr),
1172 .mondo_data_addr_p0(mondo_data_addr_p0[5:0]),
1173 .mondo_data_addr_p1(mondo_data_addr_p1[5:0]),
1174 .mondo_rd_en(mondo_rd_en),
1175 .ncu_cpx_data_ca(ncu_cpx_data_ca[145:0]),
1176 .ncu_cpx_req_cq(ncu_cpx_req_cq[7:0]),
1177 .ncu_pcx_stall_pq(ncu_pcx_stall_pq),
1178 .tap_mondo_acc_addr_invld_d2_f(tap_mondo_acc_addr_invld_d2_f),
1179 .tap_mondo_acc_seq_d2_f(tap_mondo_acc_seq_d2_f),
1180 .tap_mondo_dout_d2_f(tap_mondo_dout_d2_f[63:0]),
1181 .scan_out(ncu_fcd_ctl_scanout),
1182 .mb0_addr(mb0_addr[5:0]),
1183 .mb0_run(mb0_run),
1184 .mb0_wdata(mb0_wdata[7:0]),
1185 .mb0_iobuf_wr_en(mb0_iobuf_wr_en),
1186 .iobuf_ue_f (iobuf_ue_f),
1187 .intbuf_ue_f (intbuf_ue_f),
1188 .mondotbl_pe_f (mondotbl_pe_f),
1189 .mb0_scanout(mb0_scanout),
1190 .mb0_done(ncu_tcu_mbist_done[0]),
1191 .mb0_fail(ncu_tcu_mbist_fail[0]),
1192 .array_wr_inhibit_gate(array_wr_inhibit_gate),
1193 // Inputs
1194 .array_wr_inhibit_io(array_wr_inhibit_io),
1195 .array_wr_inhibit_cmp(array_wr_inhibit_cmp),
1196 .mb1_run(mb1_run),
1197 .mb1_wdata(mb1_wdata[7:0]),
1198 .mb1_cpubuf_wr_en(mb1_cpubuf_wr_en),
1199 .mb1_addr(mb1_addr[5:0]),
1200 .mb0_scanin(tcu_ncu_mbist_scan_in),
1201 .mb0_start(tcu_ncu_mbist_start[0]),
1202 .tcu_mbist_user_mode(tcu_mbist_user_mode),
1203 .tcu_mbist_bisi_en(tcu_mbist_bisi_en),
1204 .cmp_io_sync_en(cmp_io_sync_en),
1205 .cpubuf_head_s (cpubuf_head_s[5:0]),
1206 .cpx_ncu_grant_cx(cpx_ncu_grant_cx[7:0]),
1207 .intbuf_dout (intbuf_dout[143:0]),
1208 .iobuf_dout (iobuf_dout[175:0]),
1209 .iobuf_tail_s (iobuf_tail_s[5:0]),
1210 .io_cmp_sync_en(io_cmp_sync_en),
1211 .io_mondo_data0_din_s(io_mondo_data0_din_s[63:0]),
1212 .io_mondo_data1_din_s(io_mondo_data1_din_s[63:0]),
1213 .io_mondo_data_wr_addr_s(io_mondo_data_wr_addr_s[5:0]),
1214 .io_mondo_data_wr_s(io_mondo_data_wr_s),
1215 .l2clk (l2clk),
1216 .mondo_data0_dout(mondo_data0_dout[71:0]),
1217 .mondo_data1_dout(mondo_data1_dout[71:0]),
1218 .pcx_ncu_data_px2(pcx_ncu_data_px2[129:0]),
1219 .pcx_ncu_data_rdy_px1(pcx_ncu_data_rdy_px1),
1220 .scan_in(ncu_fcd_ctl_scanin),
1221 .tap_mondo_acc_addr_s(tap_mondo_acc_addr_s[21:0]),
1222 .tap_mondo_acc_seq_s(tap_mondo_acc_seq_s),
1223 .tap_mondo_din_s(tap_mondo_din_s[63:0]),
1224 .tap_mondo_wr_s(tap_mondo_wr_s),
1225 .tcu_aclk (aclk_cmp),
1226 .tcu_bclk (bclk_cmp),
1227 .tcu_clk_stop (1'b0),
1228 //.tcu_clk_stop (cmp_clk_stop),
1229 .tcu_pce_ov (pce_ov1),
1230 .tcu_scan_en (tcu_scan_en),
1231 .cpubuf_mb0_data(cpubuf_mb0_data[7:0]),
1232 .iobuf_uei (iobuf_uei),
1233 .intbuf_uei (intbuf_uei),
1234 .mondotbl_pei (mondotbl_pei));
1235
1236
1237
1238
1239
1240
1241///* ncu_scd_ctl auto_template (
1242// .scan_out( ),
1243// .rcu_ncu_data (rst_ncu_data[3:0]),
1244// .rcu_ncu_stall (rst_ncu_stall),
1245// .rcu_ncu_vld (rst_ncu_vld),
1246// .ncu_rcu_data (ncu_rst_data[3:0]),
1247// .ncu_rcu_stall (ncu_rst_stall),
1248// .ncu_rcu_vld (ncu_rst_vld) ); */
1249ncu_scd_ctl ncu_scd_ctl ( /*AUTOINST*/
1250 // Outputs
1251 .cpubuf_mb0_data(cpubuf_mb0_data[7:0]),
1252 //.core_enable_status(core_enable_status[7:0]),
1253 .ncu_spc7_core_enable_status(ncu_spc7_core_enable_status),
1254 .ncu_spc6_core_enable_status(ncu_spc6_core_enable_status),
1255 .ncu_spc5_core_enable_status(ncu_spc5_core_enable_status),
1256 .ncu_spc4_core_enable_status(ncu_spc4_core_enable_status),
1257 .ncu_spc3_core_enable_status(ncu_spc3_core_enable_status),
1258 .ncu_spc2_core_enable_status(ncu_spc2_core_enable_status),
1259 .ncu_spc1_core_enable_status(ncu_spc1_core_enable_status),
1260 .ncu_spc0_core_enable_status(ncu_spc0_core_enable_status),
1261 .core_running (core_running[63:0]),
1262 .coreavail (coreavail[7:0]),
1263 .cpubuf_head_ptr(cpubuf_head_ptr[4:0]),
1264 .cpubuf_head_s (cpubuf_head_s[5:0]),
1265 .cpubuf_rden (cpubuf_rden),
1266 .intman_tbl_raddr(intman_tbl_raddr[6:0]),
1267 .intman_tbl_waddr(intman_tbl_waddr[6:0]),
1268 .intman_tbl_din(intman_tbl_din[15:0]),
1269 .intman_tbl_rden(intman_tbl_rden),
1270 .intman_tbl_wr (intman_tbl_wr),
1271 .iobuf_din (iobuf_din[175:0]),
1272 .iobuf_tail_ptr(iobuf_tail_ptr[4:0]),
1273 .iobuf_tail_s (iobuf_tail_s[5:0]),
1274 .iobuf_wr (iobuf_wr),
1275 .io_mondo_data0_din_s(io_mondo_data0_din_s[63:0]),
1276 .io_mondo_data1_din_s(io_mondo_data1_din_s[63:0]),
1277 .io_mondo_data_wr_addr_s(io_mondo_data_wr_addr_s[5:0]),
1278 .io_mondo_data_wr_s(io_mondo_data_wr_s),
1279 //.l2pm (l2pm[4:0]),
1280 .ncu_spc_pm(ncu_spc_pm) ,
1281 .ncu_spc_ba67(ncu_spc_ba67),
1282 .ncu_spc_ba45(ncu_spc_ba45),
1283 .ncu_spc_ba23(ncu_spc_ba23),
1284 .ncu_spc_ba01(ncu_spc_ba01),
1285 .ncu_spc_l2_idx_hash_en(ncu_spc_l2_idx_hash_en),
1286 .ncu_sii_pm(ncu_sii_pm),
1287 .ncu_sii_ba67(ncu_sii_ba67),
1288 .ncu_sii_ba45(ncu_sii_ba45),
1289 .ncu_sii_ba23(ncu_sii_ba23),
1290 .ncu_sii_ba01(ncu_sii_ba01),
1291 .ncu_sii_l2_idx_hash_en(ncu_sii_l2_idx_hash_en),
1292 .ncu_l2t_pm(ncu_l2t_pm),
1293 .ncu_l2t_ba67(ncu_l2t_ba67),
1294 .ncu_l2t_ba45(ncu_l2t_ba45),
1295 .ncu_l2t_ba23(ncu_l2t_ba23),
1296 .ncu_l2t_ba01(ncu_l2t_ba01),
1297 .ncu_mcu_pm (ncu_mcu_pm),
1298 .ncu_mcu_ba67(ncu_mcu_ba67),
1299 .ncu_mcu_ba45(ncu_mcu_ba45),
1300 .ncu_mcu_ba23(ncu_mcu_ba23),
1301 .ncu_mcu_ba01(ncu_mcu_ba01),
1302 //.l2idxhs_en_status(l2idxhs_en_status),
1303 .ncu_ccu_data (ncu_ccu_data[3:0]),
1304 .ncu_ccu_stall (ncu_ccu_stall),
1305 .ncu_ccu_vld (ncu_ccu_vld),
1306 .ncu_dmu_data (ncu_dmu_data[31:0]),
1307 .ncu_dmu_mmu_addr_vld(ncu_dmu_mmu_addr_vld),
1308 .ncu_dmu_mondo_ack(ncu_dmu_mondo_ack),
1309 .ncu_dmu_mondo_id(ncu_dmu_mondo_id[5:0]),
1310 .ncu_dmu_mondo_id_par(ncu_dmu_mondo_id_par),
1311 .ncu_dmu_mondo_nack(ncu_dmu_mondo_nack),
1312 .ncu_dmu_pio_data(ncu_dmu_pio_data[63:0]),
1313 .ncu_dmu_pio_hdr_vld(ncu_dmu_pio_hdr_vld),
1314 .ncu_dmu_stall (ncu_dmu_stall),
1315 .ncu_dmu_vld (ncu_dmu_vld),
1316 .ncu_mcu0_data (ncu_mcu0_data[3:0]),
1317 .ncu_mcu0_stall(ncu_mcu0_stall),
1318 .ncu_mcu0_vld (ncu_mcu0_vld),
1319 .ncu_mcu1_data (ncu_mcu1_data[3:0]),
1320 .ncu_mcu1_stall(ncu_mcu1_stall),
1321 .ncu_mcu1_vld (ncu_mcu1_vld),
1322 .ncu_mcu2_data (ncu_mcu2_data[3:0]),
1323 .ncu_mcu2_stall(ncu_mcu2_stall),
1324 .ncu_mcu2_vld (ncu_mcu2_vld),
1325 .ncu_mcu3_data (ncu_mcu3_data[3:0]),
1326 .ncu_mcu3_stall(ncu_mcu3_stall),
1327 .ncu_mcu3_vld (ncu_mcu3_vld),
1328 .ncu_niu_data (ncu_niu_data[31:0]),
1329 .ncu_niu_stall (ncu_niu_stall),
1330 .ncu_niu_vld (ncu_niu_vld),
1331 .ncu_rcu_data (ncu_rst_data[3:0]), // Templated
1332 .ncu_rcu_stall (ncu_rst_stall), // Templated
1333 .ncu_rcu_vld (ncu_rst_vld), // Templated
1334 .ncu_dbg1_data (ncu_dbg1_data[3:0]),
1335 .ncu_dbg1_stall (ncu_dbg1_stall),
1336 .ncu_dbg1_vld (ncu_dbg1_vld),
1337 .ncu_rst_xir_done(ncu_rst_xir_done),
1338 .ncu_sii_gnt (ncu_sii_gnt),
1339 .ncu_ssi_data (ncu_ssi_data[3:0]),
1340 .ncu_ssi_stall (ncu_ssi_stall),
1341 .ncu_ssi_vld (ncu_ssi_vld),
1342 .ncu_tcu_data (ncu_tcu_data[7:0]),
1343 .ncu_tcu_stall (ncu_tcu_stall),
1344 .ncu_tcu_vld (ncu_tcu_vld),
1345 .tap_mondo_acc_addr_s(tap_mondo_acc_addr_s[21:0]),
1346 .tap_mondo_acc_seq_s(tap_mondo_acc_seq_s),
1347 .tap_mondo_din_s(tap_mondo_din_s[63:0]),
1348 .tap_mondo_wr_s(tap_mondo_wr_s),
1349 .dmubuf_din (dmubuf_din[143:0]),
1350 .dmubuf_raddr (dmubuf_raddr[4:0]),
1351 .dmubuf_waddr (dmubuf_waddr[4:0]),
1352 .dmubuf0_wr (dmubuf0_wr),
1353 .dmubuf1_wr (dmubuf1_wr),
1354 .dmubuf_rden (dmubuf_rden),
1355 .ncu_dmu_d_pei (ncu_dmu_d_pei),
1356 .ncu_dmu_siicr_pei(ncu_dmu_siicr_pei),
1357 .ncu_dmu_ctag_uei(ncu_dmu_ctag_uei),
1358 .ncu_dmu_ctag_cei(ncu_dmu_ctag_cei),
1359 .ncu_dmu_ncucr_pei(ncu_dmu_ncucr_pei),
1360 .ncu_dmu_iei (ncu_dmu_iei),
1361 .ncu_niu_d_pei (ncu_niu_d_pei),
1362 .ncu_niu_ctag_uei(ncu_niu_ctag_uei),
1363 .ncu_niu_ctag_cei(ncu_niu_ctag_cei),
1364 .ncu_sio_ctag_cei(ncu_sio_ctag_cei),
1365 .ncu_sio_ctag_uei(ncu_sio_ctag_uei),
1366 .ncu_sio_d_pei (ncu_sio_d_pei),
1367 .ncu_mcu0_ecci (ncu_mcu0_ecci),
1368 .ncu_mcu0_fbri (ncu_mcu0_fbri),
1369 .ncu_mcu0_fbui (ncu_mcu0_fbui),
1370 .ncu_mcu1_ecci (ncu_mcu1_ecci),
1371 .ncu_mcu1_fbri (ncu_mcu1_fbri),
1372 .ncu_mcu1_fbui (ncu_mcu1_fbui),
1373 .ncu_mcu2_ecci (ncu_mcu2_ecci),
1374 .ncu_mcu2_fbri (ncu_mcu2_fbri),
1375 .ncu_mcu2_fbui (ncu_mcu2_fbui),
1376 .ncu_mcu3_ecci (ncu_mcu3_ecci),
1377 .ncu_mcu3_fbri (ncu_mcu3_fbri),
1378 .ncu_mcu3_fbui (ncu_mcu3_fbui),
1379 .ncu_sii_dmuctag_cei(ncu_sii_dmuctag_cei),
1380 .ncu_sii_dmuctag_uei(ncu_sii_dmuctag_uei),
1381 .ncu_sii_dmua_pei(ncu_sii_dmua_pei),
1382 .ncu_sii_dmud_pei(ncu_sii_dmud_pei),
1383 .ncu_sii_niuctag_cei(ncu_sii_niuctag_cei),
1384 .ncu_sii_niuctag_uei(ncu_sii_niuctag_uei),
1385 .ncu_sii_niua_pei(ncu_sii_niua_pei),
1386 .ncu_sii_niud_pei(ncu_sii_niud_pei),
1387 .ncu_rst_fatal_error(ncu_rst_fatal_error),
1388 .ncu_tcu_soc_error(ncu_tcu_soc_error),
1389 .ncu_tcu_bank_avail(ncu_tcu_bank_avail[7:0]),
1390 .iobuf_uei (iobuf_uei),
1391 .intbuf_uei (intbuf_uei),
1392 .mondotbl_pei (mondotbl_pei),
1393 .mb1_scanout(ncu_tcu_mbist_scan_out),
1394 .mb1_done(ncu_tcu_mbist_done[1]),
1395 .mb1_fail(ncu_tcu_mbist_fail[1]),
1396 .mb1_run(mb1_run),
1397 .mb1_wdata(mb1_wdata[7:0]),
1398 .mb1_cpubuf_wr_en(mb1_cpubuf_wr_en),
1399 .mb1_addr(mb1_addr[6:0]),
1400 .ncu_scksel(ncu_scksel[1:0]),
1401 // Inputs
1402 .tcu_dbr_gateoff(tcu_dbr_gateoff),
1403 .aclk_wmr(aclk_wmr),
1404 .wmr_protect(wmr_protect),
1405 .mb0_run(mb0_run),
1406 .mb0_wdata(mb0_wdata[7:0]),
1407 .mb0_addr(mb0_addr[5:0]),
1408 .mb0_iobuf_wr_en(mb0_iobuf_wr_en),
1409 .mb1_scanin(mb0_scanout),
1410 .mb1_start(tcu_ncu_mbist_start[1]),
1411 .tcu_mbist_user_mode(tcu_mbist_user_mode),
1412 .tcu_mbist_bisi_en(tcu_mbist_bisi_en),
1413 .ccu_ncu_data (ccu_ncu_data[3:0]),
1414 .ccu_ncu_stall (ccu_ncu_stall),
1415 .ccu_ncu_vld (ccu_ncu_vld),
1416 .core_running_status(core_running_status[63:0]),
1417 .cpubuf_dout (cpubuf_dout[143:0]),
1418 .cpubuf_tail_f (cpubuf_tail_f[5:0]),
1419 .dmu_ncu_data (dmu_ncu_data[31:0]),
1420 .dmu_ncu_stall (dmu_ncu_stall),
1421 .dmu_ncu_vld (dmu_ncu_vld),
1422 .dmu_ncu_wrack_tag(dmu_ncu_wrack_tag[3:0]),
1423 .dmu_ncu_wrack_vld(dmu_ncu_wrack_vld),
1424 .dmu_ncu_wrack_par(dmu_ncu_wrack_par),
1425 .efu_ncu_bankavail_dshift(efu_ncu_bankavl_xfer_en),
1426 .efu_ncu_coreavail_dshift(efu_ncu_coreavl_xfer_en),
1427 .efu_ncu_fuse_data(efu_ncu_fuse_data),
1428 .efu_ncu_fusestat_dshift(efu_ncu_fusestat_xfer_en),
1429 .efu_ncu_sernum0_dshift(efu_ncu_srlnum0_xfer_en),
1430 .efu_ncu_sernum1_dshift(efu_ncu_srlnum1_xfer_en),
1431 .efu_ncu_sernum2_dshift(efu_ncu_srlnum2_xfer_en),
1432 .intman_tbl_dout(intman_tbl_dout[15:0]),
1433 .iobuf_head_f (iobuf_head_f[5:0]),
1434 .scan_in(ncu_scd_ctl_scanin),
1435 .scan_out(ncu_scd_ctl_scanout),
1436 .iol2clk (iol2clk),
1437 .mcu0_ncu_data (mcu0_ncu_data[3:0]),
1438 .mcu0_ncu_stall(mcu0_ncu_stall),
1439 .mcu0_ncu_vld (mcu0_ncu_vld),
1440 .mcu1_ncu_data (mcu1_ncu_data[3:0]),
1441 .mcu1_ncu_stall(mcu1_ncu_stall),
1442 .mcu1_ncu_vld (mcu1_ncu_vld),
1443 .mcu2_ncu_data (mcu2_ncu_data[3:0]),
1444 .mcu2_ncu_stall(mcu2_ncu_stall),
1445 .mcu2_ncu_vld (mcu2_ncu_vld),
1446 .mcu3_ncu_data (mcu3_ncu_data[3:0]),
1447 .mcu3_ncu_stall(mcu3_ncu_stall),
1448 .mcu3_ncu_vld (mcu3_ncu_vld),
1449 .mondo_busy_vec_f(mondo_busy_vec_f[63:0]),
1450 .niu_ncu_data (niu_ncu_data[31:0]),
1451 .niu_ncu_stall (niu_ncu_stall),
1452 .niu_ncu_vld (niu_ncu_vld),
1453 .rcu_ncu_data (rst_ncu_data[3:0]), // Templated
1454 .rcu_ncu_stall (rst_ncu_stall), // Templated
1455 .rcu_ncu_vld (rst_ncu_vld), // Templated
1456 .dbg1_ncu_data (dbg1_ncu_data[3:0]),
1457 .dbg1_ncu_stall (dbg1_ncu_stall),
1458 .dbg1_ncu_vld (dbg1_ncu_vld),
1459 .rst_ncu_unpark_thread(rst_ncu_unpark_thread),
1460 .rst_ncu_xir_ (rst_ncu_xir_),
1461 .sii_ncu_data (sii_ncu_data[31:0]),
1462 .sii_ncu_req (sii_ncu_req),
1463 .sii_ncu_dparity(sii_ncu_dparity[1:0]),
1464 .ssi_ncu_data (ssi_ncu_data[3:0]),
1465 .ssi_ncu_stall (ssi_ncu_stall),
1466 .ssi_ncu_vld (ssi_ncu_vld),
1467 .tap_mondo_acc_addr_invld_d2_f(tap_mondo_acc_addr_invld_d2_f),
1468 .tap_mondo_acc_seq_d2_f(tap_mondo_acc_seq_d2_f),
1469 .tap_mondo_dout_d2_f(tap_mondo_dout_d2_f[63:0]),
1470 .tcu_clk_stop (1'b0),
1471 //.tcu_clk_stop (io_clk_stop),
1472 .tcu_ncu_data (tcu_ncu_data[7:0]),
1473 .tcu_ncu_stall (tcu_ncu_stall),
1474 .tcu_ncu_vld (tcu_ncu_vld),
1475 .tcu_pce_ov (pce_ov),
1476 .tcu_scan_en (tcu_scan_en),
1477 .tcu_aclk (aclk_io),
1478 .tcu_bclk (bclk_io),
1479 .dmubuf0_dout (dmubuf0_dout[143:0]),
1480 .dmubuf1_dout (dmubuf1_dout[143:0]),
1481 .dmu_ncu_d_pe (dmu_ncu_d_pe),
1482 .dmu_ncu_siicr_pe(dmu_ncu_siicr_pe),
1483 .dmu_ncu_ctag_ue(dmu_ncu_ctag_ue),
1484 .dmu_ncu_ctag_ce(dmu_ncu_ctag_ce),
1485 .dmu_ncu_ncucr_pe(dmu_ncu_ncucr_pe),
1486 .dmu_ncu_ie (dmu_ncu_ie),
1487 .niu_ncu_d_pe (niu_ncu_d_pe),
1488 .niu_ncu_ctag_ue(niu_ncu_ctag_ue),
1489 .niu_ncu_ctag_ce(niu_ncu_ctag_ce),
1490 .sio_ncu_ctag_ce(sio_ncu_ctag_ce),
1491 .sio_ncu_ctag_ue(sio_ncu_ctag_ue),
1492 //.sio_ncu_d_pe (sio_ncu_d_pe),
1493 .mcu0_ncu_ecc (mcu0_ncu_ecc),
1494 .mcu0_ncu_fbr (mcu0_ncu_fbr),
1495 //.mcu0_ncu_fbu (mcu0_ncu_fbu),
1496 .mcu0_ncu_fbu (1'b0),
1497 .mcu1_ncu_ecc (mcu1_ncu_ecc),
1498 .mcu1_ncu_fbr (mcu1_ncu_fbr),
1499 //.mcu1_ncu_fbu (mcu1_ncu_fbu),
1500 .mcu1_ncu_fbu (1'b0),
1501 .mcu2_ncu_ecc (mcu2_ncu_ecc),
1502 .mcu2_ncu_fbr (mcu2_ncu_fbr),
1503 //.mcu2_ncu_fbu (mcu2_ncu_fbu),
1504 .mcu2_ncu_fbu (1'b0),
1505 .mcu3_ncu_ecc (mcu3_ncu_ecc),
1506 .mcu3_ncu_fbr (mcu3_ncu_fbr),
1507 //.mcu3_ncu_fbu (mcu3_ncu_fbu),
1508 .mcu3_ncu_fbu (1'b0),
1509 .sii_ncu_syn_data(sii_ncu_syn_data[3:0]),
1510 .sii_ncu_syn_vld(sii_ncu_syn_vld),
1511 .sii_ncu_dmuctag_ce(sii_ncu_dmuctag_ce),
1512 .sii_ncu_dmuctag_ue(sii_ncu_dmuctag_ue),
1513 .sii_ncu_dmua_pe(sii_ncu_dmua_pe),
1514 .sii_ncu_dmud_pe(sii_ncu_dmud_pe),
1515 .sii_ncu_niuctag_ce(sii_ncu_niuctag_ce),
1516 .sii_ncu_niuctag_ue(sii_ncu_niuctag_ue),
1517 .sii_ncu_niua_pe(sii_ncu_niua_pe),
1518 .sii_ncu_niud_pe(sii_ncu_niud_pe),
1519 .iobuf_ue_f (iobuf_ue_f),
1520 .intbuf_ue_f (intbuf_ue_f),
1521 .mondotbl_pe_f (mondotbl_pe_f),
1522 // outputs
1523 .cmp_tick_enable(ncu_cmp_tick_enable),
1524 .tcu_wmr_vec_mask(ncu_wmr_vec_mask),
1525 .ncu_dbg1_error_event(ncu_dbg1_error_event),
1526 .ncu_dmu_dpar(ncu_dmu_dpar[1:0]));
1527
1528
1529
1530
1531/*** int management table mem ***/
1532///* ncu_rf_cust auto_template (
1533// .scan_out( ),
1534// .wr_adr (intman_tbl_waddr[6:0]),
1535// .din (intman_tbl_din[15:0]),
1536// .wr_en (intman_tbl_wr),
1537// .wrclk (iol2clk),
1538// .rdclk (iol2clk),
1539// .rd_en (intman_tbl_rden),
1540// .rd_adr (intman_tbl_raddr[6:0]),
1541// .dout (intman_tbl_dout[15:0]) ) ; */
1542n2_com_dp_128x16s_cust ncu_intman_rf_cust ( /*autoinst*/
1543 // Outputs
1544 .dout(intman_tbl_dout[15:0]), // Templated
1545 // Inputs
1546 .scan_in(ncu_intman_rf_cust_scanin),
1547 .scan_out(ncu_intman_rf_cust_scanout),
1548 .wrclk(iol2clk), // Templated
1549 .rdclk(iol2clk), // Templated
1550 .wr_en(intman_tbl_wr), // Templated
1551 .rd_en(intman_tbl_rden), // Templated
1552 .wr_adr(intman_tbl_waddr[6:0]), // Templated
1553 .rd_adr(intman_tbl_raddr[6:0]), // Templated
1554 .din(intman_tbl_din[15:0]), // Templated
1555 .tcu_se_scancollar_in(tcu_se_scancollar_in),
1556 .tcu_se_scancollar_out(tcu_se_scancollar_out),
1557 .tcu_array_wr_inhibit(array_wr_inhibit_io),
1558 .tcu_aclk(aclk_io),
1559 .tcu_bclk(bclk_io),
1560 .tcu_pce_ov(pce_ov),
1561 // .tcu_wrclk_stop(1'b0),
1562 // .tcu_rdclk_stop(1'b0));
1563 .bist_clk_mux_sel(1'b0),
1564 .rd_pce(1'b1),
1565 .wr_pce(1'b1));
1566 //.tcu_wrclk_stop(io_clk_stop),
1567 //.tcu_rdclk_stop(io_clk_stop));
1568
1569
1570/*** dmubuf0 mem ***/
1571///* ncu_rf_cust auto_template (
1572// .scan_out( ),
1573// .wr_en (dmubuf0_wr),
1574// .wrclk (iol2clk),
1575// .rdclk (iol2clk),
1576// .rd_en (dmubuf_rden),
1577// .wr_adr(dmubuf_waddr[4:0]),
1578// .rd_adr(dmubuf_raddr[4:0]),
1579// .din(dmubuf_din[143:0]),
1580// .dout (dmubuf0_dout[143:0]) ); */
1581n2_com_dp_32x144s_cust ncu_dmubuf0_rf_cust ( /*autoinst*/
1582 // Outputs
1583 .dout(dmubuf0_dout[143:0]), // Templated
1584 // Inputs
1585 .scan_in(ncu_dmubuf0_rf_cust_scanin),
1586 .scan_out(ncu_dmubuf0_rf_cust_scanout),
1587 .wrclk(iol2clk), // Templated
1588 .rdclk(iol2clk), // Templated
1589 .wr_en(dmubuf0_wr), // Templated
1590 .rd_en(dmubuf_rden), // Templated
1591 .wr_adr(dmubuf_waddr[4:0]), // Templated
1592 .rd_adr(dmubuf_raddr[4:0]), // Templated
1593 .din(dmubuf_din[143:0]), // Templated
1594 .tcu_se_scancollar_in(tcu_se_scancollar_in),
1595 .tcu_se_scancollar_out(tcu_se_scancollar_out),
1596 .tcu_array_wr_inhibit(array_wr_inhibit_io),
1597 .tcu_aclk(aclk_io),
1598 .tcu_bclk(bclk_io),
1599 .tcu_pce_ov(pce_ov),
1600 .bist_clk_mux_sel(1'b0),
1601 .rd_pce(1'b1),
1602 .wr_pce(1'b1));
1603 //.tcu_wrclk_stop(1'b0),
1604 //.tcu_rdclk_stop(1'b0));
1605 //.tcu_wrclk_stop(io_clk_stop),
1606 //.tcu_rdclk_stop(io_clk_stop));
1607
1608/*** dmubuf1 mem ***/
1609///* ncu_rf_cust auto_template (
1610// .scan_out( ),
1611// .wr_en (dmubuf1_wr),
1612// .wrclk (iol2clk),
1613// .rdclk (iol2clk),
1614// .rd_en (dmubuf_rden),
1615// .wr_adr(dmubuf_waddr[4:0]),
1616// .rd_adr(dmubuf_raddr[4:0]),
1617// .din(dmubuf_din[143:0]),
1618// .dout(dmubuf1_dout[143:0]) ); */
1619n2_com_dp_32x144s_cust ncu_dmubuf1_rf_cust ( /*autoinst*/
1620 // Outputs
1621 .dout(dmubuf1_dout[143:0]), // Templated
1622 // Inputs
1623 .scan_in(ncu_dmubuf1_rf_cust_scanin),
1624 .scan_out(ncu_dmubuf1_rf_cust_scanout),
1625 .wrclk(iol2clk), // Templated
1626 .rdclk(iol2clk), // Templated
1627 .wr_en(dmubuf1_wr), // Templated
1628 .rd_en(dmubuf_rden), // Templated
1629 .wr_adr(dmubuf_waddr[4:0]), // Templated
1630 .rd_adr(dmubuf_raddr[4:0]), // Templated
1631 .din(dmubuf_din[143:0]), // Templated
1632 .tcu_se_scancollar_in(tcu_se_scancollar_in),
1633 .tcu_se_scancollar_out(tcu_se_scancollar_out),
1634 .tcu_array_wr_inhibit(array_wr_inhibit_io),
1635 .tcu_aclk(aclk_io),
1636 .tcu_bclk(bclk_io),
1637 .tcu_pce_ov(pce_ov),
1638 .bist_clk_mux_sel(1'b0),
1639 .rd_pce(1'b1),
1640 .wr_pce(1'b1));
1641
1642
1643/* ncu_ssitop_ctl auto_template(
1644 .jbi_io_ssi_mosi(ncu_io_ssi_mosi),
1645 .jbi_io_ssi_sck(ncu_io_ssi_sck),
1646 .jbi_iob_spi_vld(ssi_ncu_vld),
1647 .jbi_iob_spi_data(ssi_ncu_data[3:0]),
1648 .jbi_iob_spi_stall(ssi_ncu_stall),
1649 .scan_out(),
1650 // Inputs
1651 .scan_in()
1652 .io_jbi_ssi_miso(io_ncu_ssi_miso),
1653 .io_jbi_ext_int_l(io_ncu_ssi_ext_int_l),
1654 .iob_jbi_spi_vld(ncu_ssi_vld),
1655 .iob_jbi_spi_data(ncu_ssi_data[3:0]),
1656 .iob_jbi_spi_stall(ncu_ssi_stall)); */
1657
1658ncu_ssitop_ctl ncu_ssitop_ctl ( /*autoinst*/
1659 // Outputs
1660 .jbi_io_ssi_mosi(ncu_mio_ssi_mosi), // Templated
1661 .jbi_io_ssi_sck(ncu_mio_ssi_sck), // Templated
1662 .jbi_iob_spi_vld(ssi_ncu_vld), // Templated
1663 .jbi_iob_spi_data(ssi_ncu_data[3:0]), // Templated
1664 .jbi_iob_spi_stall(ssi_ncu_stall), // Templated
1665 // Inputs
1666 .scan_in(ncu_ssitop_ctl_scanin),
1667 .scan_out(ncu_ssitop_ctl_scanout),
1668 //.scan_out(scan_out),
1669 .iol2clk (iol2clk),
1670 .ncu_scksel(ncu_scksel[1:0]),
1671 .tcu_pce_ov(pce_ov),
1672 .tcu_clk_stop(1'b0),
1673 .tcu_sck_bypass(tcu_sck_bypass),
1674 .tcu_scan_en(tcu_scan_en),
1675 .tcu_aclk(aclk_io),
1676 .tcu_bclk(bclk_io),
1677 .io_jbi_ssi_miso(mio_ncu_ssi_miso), // Templated
1678 .io_jbi_ext_int_l(mio_ncu_ext_int_l), // Templated
1679 .iob_jbi_spi_vld(ncu_ssi_vld), // Templated
1680 .iob_jbi_spi_data(ncu_ssi_data[3:0]), // Templated
1681 .iob_jbi_spi_stall(ncu_ssi_stall)); // Templated
1682
1683
1684// fixscan start:
1685//assign ncu_mondo0_rf_cust_scanin = scan_in ;
1686assign ncu_mondo1_rf_cust_scanin = ncu_mondo0_rf_cust_scanout;
1687assign ncu_cpu_buf_rf_cust_scanin = ncu_mondo1_rf_cust_scanout;
1688assign ncu_iobuf0_rf_cust_scanin = ncu_cpu_buf_rf_cust_scanout;
1689assign ncu_iobuf1_rf_cust_scanin = ncu_iobuf0_rf_cust_scanout;
1690assign ncu_intbuf_rf_cust_scanin = ncu_iobuf1_rf_cust_scanout;
1691assign ncu_fcd_ctl_scanin = ncu_intbuf_rf_cust_scanout;
1692assign ncu_scd_ctl_scanin = ncu_fcd_ctl_scanout ;
1693assign ncu_intman_rf_cust_scanin = ncu_scd_ctl_scanout ;
1694assign ncu_dmubuf0_rf_cust_scanin = ncu_intman_rf_cust_scanout;
1695assign ncu_dmubuf1_rf_cust_scanin = ncu_dmubuf0_rf_cust_scanout;
1696assign ncu_ssitop_ctl_scanin = ncu_dmubuf1_rf_cust_scanout;
1697assign clkgen_cmp_scanin = ncu_ssitop_ctl_scanout;
1698assign clkgen_io_scanin = clkgen_cmp_scanout;
1699//assign scan_out = ncu_ssitop_ctl_scanout ;
1700// fixscan end:
1701endmodule
1702