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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: fflp_merge_func.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | /**********************************************************************/ | |
36 | /*project name: N2 */ | |
37 | /*module name: fflp_merge_func */ | |
38 | /*description: Merge function to create forward decision to ZCP */ | |
39 | /* */ | |
40 | /*parent module in: fflp_fcram_top */ | |
41 | /*child modules in: */ | |
42 | /*interface modules: */ | |
43 | /*author name: Jeanne Cai */ | |
44 | /*date created: 04-08-04 */ | |
45 | /* */ | |
46 | /* Copyright (c) 2004, Sun Microsystems, Inc. */ | |
47 | /* Sun Proprietary and Confidential */ | |
48 | /* */ | |
49 | /*modifications: */ | |
50 | /* */ | |
51 | /* */ | |
52 | ||
53 | ||
54 | module fflp_merge_func ( | |
55 | cclk, | |
56 | reset, | |
57 | fwd_sched, | |
58 | fc_fifo_dout, | |
59 | fc_din_reg_dout_r, | |
60 | ecc_check_err_r, | |
61 | ecc_corr_err_r, | |
62 | fio_no_fatal_err, | |
63 | srch_burst_done_2, | |
64 | srch_fio_wait_6, | |
65 | srch_fio_rd_en_4, | |
66 | fcram_sm_state, | |
67 | fflp_config_reg_wen_pulse_sync, | |
68 | debug_training_vector, | |
69 | pio_debug_data_sel, | |
70 | ||
71 | merg_bus_0_hash_v1, | |
72 | merg_bus_0_rdc_tbl_num, | |
73 | merg_bus_1_fc_lookup, | |
74 | zcp_wr, | |
75 | fflp_zcp_data, | |
76 | fc_err_status, | |
77 | fflp_debug_port | |
78 | ||
79 | ); | |
80 | ||
81 | input cclk; | |
82 | input reset; | |
83 | input fwd_sched; | |
84 | input[512:0] fc_fifo_dout; | |
85 | input[71:0] fc_din_reg_dout_r; | |
86 | input ecc_check_err_r; | |
87 | input ecc_corr_err_r; | |
88 | input fio_no_fatal_err; | |
89 | input srch_burst_done_2; | |
90 | input srch_fio_wait_6; | |
91 | input srch_fio_rd_en_4; | |
92 | input[4:0] fcram_sm_state; | |
93 | input fflp_config_reg_wen_pulse_sync; | |
94 | input[31:0] debug_training_vector; | |
95 | input[2:0] pio_debug_data_sel; | |
96 | ||
97 | output[19:0] merg_bus_0_hash_v1; | |
98 | output[2:0] merg_bus_0_rdc_tbl_num; | |
99 | output merg_bus_1_fc_lookup; | |
100 | output zcp_wr; | |
101 | output[215:0] fflp_zcp_data; | |
102 | output[33:0] fc_err_status; | |
103 | output[31:0] fflp_debug_port; | |
104 | ||
105 | wire zcp_wr; | |
106 | wire[215:0] fflp_zcp_data; | |
107 | ||
108 | wire[512:0] merg_bus; | |
109 | wire[512:0] merg_bus_1; | |
110 | wire[512:0] merg_bus_2; | |
111 | wire[512:0] merg_bus_3; | |
112 | ||
113 | wire[19:0] merg_bus_hash_v1; | |
114 | wire[15:0] merg_bus_hash_v2; | |
115 | wire[383:0] merg_bus_flow_key; | |
116 | wire[114:0] merg_bus_fwd_info; | |
117 | ||
118 | wire[63:0] merg_bus_flow_key_row0; | |
119 | wire[63:0] merg_bus_flow_key_row1; | |
120 | wire[63:0] merg_bus_flow_key_row2; | |
121 | wire[63:0] merg_bus_flow_key_row3; | |
122 | wire[63:0] merg_bus_flow_key_row4; | |
123 | wire[63:0] merg_bus_flow_key_row5; | |
124 | ||
125 | wire[1:0] merg_bus_fkey_port; | |
126 | wire[7:0] merg_bus_fkey_protocol; | |
127 | wire[15:0] merg_bus_fkey_ly4_1; | |
128 | wire[15:0] merg_bus_fkey_ly4_0; | |
129 | ||
130 | wire[11:0] merg_bus_fkey_vid; | |
131 | wire[47:0] merg_bus_fkey_mac_da; | |
132 | wire[3:0] merg_bus_fkey_vlan_valid; | |
133 | ||
134 | wire[2:0] merg_bus_rdc_tbl_num; | |
135 | wire merg_bus_cam_match; | |
136 | wire merg_bus_drop_pkt; | |
137 | wire[1:0] merg_bus_ether_type; | |
138 | wire[1:0] merg_bus_l4_protocol; | |
139 | wire merg_bus_badip; | |
140 | wire merg_bus_noport; | |
141 | wire merg_bus_llcnsap; | |
142 | wire merg_bus_vlan; | |
143 | wire[4:0] merg_bus_class; | |
144 | wire merg_bus_ph_match; | |
145 | wire merg_bus_promis; | |
146 | ||
147 | wire[3:0] merg_bus_ip_hdr_len; //for v4 only. v6 has fixed 40 bytes | |
148 | wire[15:0] merg_bus_ip_pkt_len; //for both v4, v6. | |
149 | wire[3:0] merg_bus_tcp_hdr_len; | |
150 | wire merg_bus_tcp_push_bit; | |
151 | wire[31:0] merg_bus_tcp_seq_num; | |
152 | wire[3:0] merg_bus_pkt_id; | |
153 | wire[4:0] merg_bus_rdc_tbl_offset; | |
154 | wire[1:0] merg_bus_valid_tres; | |
155 | wire merg_bus_valid_zcopy; | |
156 | wire[9:0] merg_bus_valid_cam_haddr; | |
157 | wire merg_bus_am_parity_err; | |
158 | wire merg_bus_fc_lookup; | |
159 | wire[1:0] merg_bus_mac_port; | |
160 | wire[11:0] merg_bus_zcopy_id; | |
161 | ||
162 | wire sub0_fmt; | |
163 | wire sub0_ext; | |
164 | wire sub0_valid; | |
165 | wire[47:0] sub0_mac_da; | |
166 | wire[11:0] sub0_vid; | |
167 | wire[4:0] sub0_rdc_offset; | |
168 | wire[15:0] sub0_hash_v2; | |
169 | wire[39:0] sub0_usr_info; | |
170 | ||
171 | wire sub0_mac_da_comp0; | |
172 | wire sub0_mac_da_comp1; | |
173 | wire sub0_mac_da_comp2; | |
174 | wire sub0_mac_da_comp3; | |
175 | wire sub0_vlan_match; | |
176 | ||
177 | wire sub0_hash_v2_match; | |
178 | wire sub0_v4_ext_match; | |
179 | wire sub0_v6_ext_match; | |
180 | wire sub0_ip_version_match; | |
181 | wire sub0_is_opt_match; | |
182 | wire sub0_opt_match; | |
183 | wire v4_comp_reg_en0; | |
184 | ||
185 | wire sub0_v4_ext_match_r; | |
186 | wire sub4_v4_ext_match_r; | |
187 | wire sub0_v6_ext_match_r; | |
188 | wire sub0_opt_match_r; | |
189 | wire sub0_mac_da_comp0_r; | |
190 | wire sub0_mac_da_comp1_r; | |
191 | wire sub0_mac_da_comp2_r; | |
192 | wire sub0_mac_da_comp3_r; | |
193 | wire sub0_vlan_match_r; | |
194 | ||
195 | wire sub0_mac_da_match; | |
196 | wire[31:0] sub1_v4_src_addr; | |
197 | wire[31:0] sub1_v4_dest_addr; | |
198 | wire[63:0] sub1_v6_src_addr_u; | |
199 | ||
200 | wire sub1_fmt; | |
201 | wire sub1_ext; | |
202 | wire sub1_valid; | |
203 | wire[15:0] sub1_hash_v2; | |
204 | ||
205 | wire sub1_v4_src_addr_comp0; | |
206 | wire sub1_v4_src_addr_comp1; | |
207 | wire sub1_v4_dest_addr_comp0; | |
208 | wire sub1_v4_dest_addr_comp1; | |
209 | ||
210 | wire sub1_v6_src_addr_u_comp0; | |
211 | wire sub1_v6_src_addr_u_comp1; | |
212 | wire sub1_v6_src_addr_u_comp2; | |
213 | wire sub1_v6_src_addr_u_comp3; | |
214 | ||
215 | wire sub1_hash_v2_match; | |
216 | wire sub1_ip_version_match; | |
217 | wire sub1_is_opt_match; | |
218 | wire sub1_opt_match; | |
219 | wire v4_comp_reg_en1; | |
220 | ||
221 | wire sub0_mac_da_match_r; | |
222 | wire sub1_v4_src_addr_comp0_r; | |
223 | wire sub1_v4_src_addr_comp1_r; | |
224 | wire sub1_v4_dest_addr_comp0_r; | |
225 | wire sub1_v4_dest_addr_comp1_r; | |
226 | wire sub1_v6_src_addr_u_comp0_r; | |
227 | wire sub1_v6_src_addr_u_comp1_r; | |
228 | wire sub1_v6_src_addr_u_comp2_r; | |
229 | wire sub1_v6_src_addr_u_comp3_r; | |
230 | wire sub1_opt_match_r; | |
231 | ||
232 | wire sub1_v4_src_addr_match; | |
233 | wire sub1_v4_dest_addr_match; | |
234 | wire sub1_v6_src_addr_u_match; | |
235 | ||
236 | wire[15:0] sub2_ly4_0; | |
237 | wire[15:0] sub2_ly4_1; | |
238 | wire[7:0] sub2_protocol; | |
239 | wire[1:0] sub2_port; | |
240 | ||
241 | wire[63:0] sub2_v6_src_addr_l; | |
242 | ||
243 | wire sub2_fmt; | |
244 | wire sub2_ext; | |
245 | wire sub2_valid; | |
246 | wire[15:0] sub2_hash_v2; | |
247 | ||
248 | wire sub2_ly4_0_match; | |
249 | wire sub2_ly4_1_match; | |
250 | wire sub2_protocol_match; | |
251 | wire sub2_port_match; | |
252 | ||
253 | wire sub2_v6_src_addr_l_comp0; | |
254 | wire sub2_v6_src_addr_l_comp1; | |
255 | wire sub2_v6_src_addr_l_comp2; | |
256 | wire sub2_v6_src_addr_l_comp3; | |
257 | ||
258 | wire sub2_hash_v2_match; | |
259 | wire sub2_ip_version_match; | |
260 | wire sub2_is_opt_match; | |
261 | wire sub2_opt_match; | |
262 | wire v4_comp_reg_en2; | |
263 | wire v6_comp_reg_en2; | |
264 | ||
265 | wire sub1_v4_src_addr_match_r; | |
266 | wire sub1_v4_dest_addr_match_r; | |
267 | wire sub1_v6_src_addr_u_match_r; | |
268 | ||
269 | wire sub2_ly4_0_match_r; | |
270 | wire sub2_ly4_1_match_r; | |
271 | wire sub2_protocol_match_r; | |
272 | wire sub2_port_match_r; | |
273 | ||
274 | wire sub2_v6_src_addr_l_comp0_r; | |
275 | wire sub2_v6_src_addr_l_comp1_r; | |
276 | wire sub2_v6_src_addr_l_comp2_r; | |
277 | wire sub2_v6_src_addr_l_comp3_r; | |
278 | wire sub2_opt_match_r; | |
279 | ||
280 | wire sub2_v6_src_addr_l_match; | |
281 | wire sub3_v4_ext_match_tmp; | |
282 | wire sub3_v4_ext_match_all; | |
283 | wire sub7_v4_ext_match_all; | |
284 | ||
285 | wire[4:0] sub3_rdc_offset; | |
286 | wire sub3_zcopy_valid; | |
287 | wire[11:0] sub3_zcopy_id; | |
288 | wire[39:0] sub3_usr_info; | |
289 | ||
290 | wire[63:0] sub3_v6_dst_addr_u; | |
291 | ||
292 | wire sub3_fmt; | |
293 | wire sub3_ext; | |
294 | wire sub3_valid; | |
295 | wire[15:0] sub3_hash_v2; | |
296 | ||
297 | wire sub3_v6_dst_addr_u_comp0; | |
298 | wire sub3_v6_dst_addr_u_comp1; | |
299 | wire sub3_v6_dst_addr_u_comp2; | |
300 | wire sub3_v6_dst_addr_u_comp3; | |
301 | ||
302 | wire sub3_hash_v2_match; | |
303 | wire sub3_ip_version_match; | |
304 | wire sub3_is_opt_match; | |
305 | wire sub3_opt_match; | |
306 | ||
307 | wire sub2_v6_src_addr_l_match_r; | |
308 | wire sub3_v6_dst_addr_u_comp0_r; | |
309 | wire sub3_v6_dst_addr_u_comp1_r; | |
310 | wire sub3_v6_dst_addr_u_comp2_r; | |
311 | wire sub3_v6_dst_addr_u_comp3_r; | |
312 | wire sub3_v4_ext_match_all_r; | |
313 | //wire sub7_v4_ext_match_all_r; | |
314 | wire sub3_opt_match_r; | |
315 | ||
316 | wire sub3_v6_dst_addr_u_match; | |
317 | ||
318 | wire[63:0] sub4_v6_dst_addr_l; | |
319 | wire sub4_fmt; | |
320 | wire sub4_ext; | |
321 | wire sub4_valid; | |
322 | wire[15:0] sub4_hash_v2; | |
323 | ||
324 | wire sub4_v6_dst_addr_l_comp0; | |
325 | wire sub4_v6_dst_addr_l_comp1; | |
326 | wire sub4_v6_dst_addr_l_comp2; | |
327 | wire sub4_v6_dst_addr_l_comp3; | |
328 | ||
329 | wire sub4_hash_v2_match; | |
330 | wire sub4_ip_version_match; | |
331 | wire sub4_is_opt_match; | |
332 | wire sub4_opt_match; | |
333 | ||
334 | wire sub3_v6_dst_addr_u_match_r; | |
335 | wire sub4_v6_dst_addr_l_comp0_r; | |
336 | wire sub4_v6_dst_addr_l_comp1_r; | |
337 | wire sub4_v6_dst_addr_l_comp2_r; | |
338 | wire sub4_v6_dst_addr_l_comp3_r; | |
339 | wire sub4_opt_match_r; | |
340 | ||
341 | wire sub4_v6_dst_addr_l_match; | |
342 | ||
343 | wire sub5_fmt; | |
344 | wire sub5_ext; | |
345 | wire sub5_valid; | |
346 | wire[15:0] sub5_hash_v2; | |
347 | ||
348 | wire sub5_hash_v2_match; | |
349 | wire sub5_ip_version_match; | |
350 | wire sub5_is_opt_match; | |
351 | wire sub5_opt_match; | |
352 | ||
353 | wire sub4_v6_dst_addr_l_match_r; | |
354 | wire sub5_opt_match_r; | |
355 | ||
356 | wire sub6_v6_ext_match_all; | |
357 | wire sub6_fmt; | |
358 | wire sub6_ext; | |
359 | wire sub6_valid; | |
360 | wire[15:0] sub6_hash_v2; | |
361 | ||
362 | wire sub6_hash_v2_match; | |
363 | wire sub6_ip_version_match; | |
364 | wire sub6_is_opt_match; | |
365 | wire sub6_opt_match; | |
366 | ||
367 | wire sub6_v6_ext_match_all_r; | |
368 | wire sub6_opt_match_r; | |
369 | ||
370 | wire sub7_fmt; | |
371 | wire sub7_ext; | |
372 | wire sub7_valid; | |
373 | wire[15:0] sub7_hash_v2; | |
374 | ||
375 | wire sub7_hash_v2_match; | |
376 | wire sub7_ip_version_match; | |
377 | wire sub7_is_opt_match; | |
378 | wire sub7_opt_match; | |
379 | wire sub7_opt_match_r; | |
380 | ||
381 | wire exect_match; | |
382 | wire[2:0] ext_sub_addr; | |
383 | wire ext_info_reg_en; | |
384 | ||
385 | wire exect_match_r; | |
386 | wire[2:0] ext_sub_addr_r; | |
387 | wire ext_zcopy_valid_r; | |
388 | wire[11:0] ext_zcopy_id_r; | |
389 | wire[4:0] ext_rdc_offset_r; | |
390 | wire[39:0] ext_usr_info_r; | |
391 | ||
392 | wire opt_match; | |
393 | wire[7:0] opt_match_array; | |
394 | ||
395 | wire sub4_opt_match4; | |
396 | wire sub4_opt_match4_r; | |
397 | wire sub7_opt_no_match1; | |
398 | wire sub7_opt_no_match2; | |
399 | wire sub7_opt_no_match3; | |
400 | wire sub7_opt_no_match4; | |
401 | wire sub7_opt_no_match5; | |
402 | wire sub7_opt_no_match6; | |
403 | wire sub7_opt_no_match7; | |
404 | wire opt_info_reg_en; | |
405 | ||
406 | reg[2:0] opt_sub_addr; | |
407 | reg[2:0] sub_area_addr; | |
408 | ||
409 | wire[4:0] opt_rdc_offset_r; | |
410 | wire[39:0] opt_usr_info_r; | |
411 | ||
412 | wire opt_match_v; | |
413 | wire exect_match_v; | |
414 | wire fram_hash_match; | |
415 | wire[2:0] fram_sub_addr; | |
416 | wire fram_zcopy_valid; | |
417 | wire[11:0] fram_zcopy_id; | |
418 | wire[4:0] fram_rdc_offset; | |
419 | wire[39:0] fram_usr_info; | |
420 | ||
421 | wire fwd_l2_class; | |
422 | wire[4:0] fwd_rdc_offset; | |
423 | wire[11:0] fwd_zcopy_id; | |
424 | wire[1:0] fwd_l4_protocol; | |
425 | wire[19:0] fwd_hash_v1; | |
426 | wire[15:0] fwd_hash_v2; | |
427 | ||
428 | wire merg_bus_fc_lookup_r; | |
429 | wire fwd_l2_class_r; | |
430 | wire[4:0] merg_bus_rdc_tbl_offset_r; | |
431 | wire merg_bus_valid_tres_bit0_r; | |
432 | wire[4:0] merg_bus_hash_v1_lsb_r; | |
433 | wire merg_bus_valid_zcopy_r; | |
434 | wire[11:0] merg_bus_zcopy_id_r; | |
435 | wire[2:0] merg_bus_rdc_tbl_num_r; | |
436 | wire[4:0] fwd_rdc_offset_r; | |
437 | ||
438 | wire[7:0] byte0, byte1, byte2, byte3, byte4; | |
439 | wire[7:0] byte5, byte6, byte7, byte8, byte9; | |
440 | wire[7:0] byte10, byte11, byte12, byte13, byte14; | |
441 | wire[7:0] byte15, byte16, byte17, byte18, byte19; | |
442 | wire[7:0] byte20, byte21, byte22, byte23, byte24; | |
443 | wire[7:0] byte25, byte26; | |
444 | ||
445 | wire[7:0] byte0_r, byte1_r, byte3_r, byte4_r; | |
446 | wire[7:0] byte6_r, byte7_r, byte8_r, byte9_r; | |
447 | wire[7:0] byte10_r, byte11_r, byte12_r, byte13_r, byte14_r; | |
448 | wire[7:0] byte15_r, byte16_r, byte17_r, byte18_r; | |
449 | wire[7:0] byte20_r, byte21_r, byte22_r, byte23_r, byte24_r; | |
450 | wire[7:0] byte25_r, byte26_r; | |
451 | ||
452 | wire[19:0] merg_bus_0_hash_v1; | |
453 | wire[2:0] merg_bus_0_rdc_tbl_num; | |
454 | wire merg_bus_1_fc_lookup; | |
455 | ||
456 | wire merge_func_cyc0; | |
457 | wire merge_func_cyc1; | |
458 | wire merge_func_cyc2; | |
459 | wire merge_func_cyc3; | |
460 | wire merge_func_cyc4; | |
461 | wire merge_func_cyc5; | |
462 | wire merge_func_cyc6; | |
463 | wire merge_func_cyc7; | |
464 | ||
465 | wire pre_zcp_wr; | |
466 | wire pre_zcp_wr1; | |
467 | wire pre_zcp_wr2; | |
468 | wire zcp_wr_p; | |
469 | ||
470 | wire[7:0] ecc_syndrome; | |
471 | wire[7:0] ecc_syndrome_r; | |
472 | ||
473 | wire fflp_hdw_err; | |
474 | wire merge_func_cyc; | |
475 | wire ecc_uncor_err_en; | |
476 | wire ecc_uncor_err_in; | |
477 | wire ecc_uncor_err; | |
478 | wire ecc_check_err_all; | |
479 | wire err_cnt_reg_en; | |
480 | wire[3:0] err_cnt_in; | |
481 | wire is_ecc_uncor_en; //the first err is uncorr_err | |
482 | wire is_ecc_uncor_in; | |
483 | wire is_ecc_uncor_r; | |
484 | wire ecc_err; | |
485 | wire multi_err; | |
486 | wire[19:0] err_hash_v1; | |
487 | wire ecc_addr_reg_en; | |
488 | wire[7:0] sub_addr_array; | |
489 | wire[33:0] fc_err_status_in; | |
490 | wire[3:0] err_cnt; | |
491 | wire[2:0] ecc_sub_addr; | |
492 | wire[33:0] fc_err_status; | |
493 | ||
494 | wire[6:0] merg_bus_cntl_data; | |
495 | wire[31:0] debug_port_data_in; | |
496 | wire[31:0] fflp_debug_port; | |
497 | wire[2:0] debug_data_sel; | |
498 | ||
499 | wire[71:0] fc_din_reg_dout_r1; | |
500 | wire ecc_check_err_r1; | |
501 | wire ecc_corr_err_r1; | |
502 | ||
503 | assign fc_din_reg_dout_r1 = (merg_bus_fc_lookup & fio_no_fatal_err) ? fc_din_reg_dout_r : 72'b0; | |
504 | assign ecc_check_err_r1 = (merg_bus_fc_lookup & fio_no_fatal_err) ? ecc_check_err_r : 1'b0; | |
505 | assign ecc_corr_err_r1 = (merg_bus_fc_lookup & fio_no_fatal_err) ? ecc_corr_err_r : 1'b0; | |
506 | ||
507 | ||
508 | dffre #(513) merg_bus_reg (cclk, reset, fwd_sched, fc_fifo_dout, merg_bus); | |
509 | dffre #(513) merg_bus_1_reg (cclk, reset, srch_burst_done_2, merg_bus, merg_bus_1); | |
510 | dffre #(513) merg_bus_2_reg (cclk, reset, srch_fio_wait_6, merg_bus_1, merg_bus_2); | |
511 | dffre #(513) merg_bus_3_reg (cclk, reset, srch_fio_rd_en_4, merg_bus_2, merg_bus_3); | |
512 | ||
513 | assign merg_bus_0_hash_v1 = merg_bus[19:0]; | |
514 | assign merg_bus_0_rdc_tbl_num = merg_bus[400:398]; | |
515 | ||
516 | assign merg_bus_1_fc_lookup = merg_bus_1[498]; | |
517 | ||
518 | assign merg_bus_hash_v1 = merg_bus_3[19:0]; | |
519 | assign merg_bus_hash_v2 = merg_bus_3[35:20]; | |
520 | assign merg_bus_flow_key = {merg_bus_3[397:36], 22'b0}; | |
521 | assign merg_bus_fwd_info = merg_bus_3[512:398]; | |
522 | ||
523 | assign merg_bus_flow_key_row0 = merg_bus_flow_key[63:0]; | |
524 | assign merg_bus_flow_key_row1 = merg_bus_flow_key[127:64]; //IP dest addr | |
525 | assign merg_bus_flow_key_row2 = merg_bus_flow_key[191:128]; | |
526 | assign merg_bus_flow_key_row3 = merg_bus_flow_key[255:192]; //IP source addr | |
527 | assign merg_bus_flow_key_row4 = merg_bus_flow_key[319:256]; | |
528 | assign merg_bus_flow_key_row5 = merg_bus_flow_key[383:320]; | |
529 | ||
530 | assign merg_bus_fkey_port = merg_bus_flow_key_row0[23:22]; | |
531 | assign merg_bus_fkey_protocol = merg_bus_flow_key_row0[31:24]; | |
532 | assign merg_bus_fkey_ly4_1 = merg_bus_flow_key_row0[47:32]; | |
533 | assign merg_bus_fkey_ly4_0 = merg_bus_flow_key_row0[63:48]; | |
534 | ||
535 | assign merg_bus_fkey_vid = merg_bus_flow_key_row5[11:0]; | |
536 | assign merg_bus_fkey_mac_da = merg_bus_flow_key_row5[59:12]; | |
537 | assign merg_bus_fkey_vlan_valid = merg_bus_flow_key_row5[63:60]; | |
538 | ||
539 | assign merg_bus_rdc_tbl_num = merg_bus_fwd_info[2:0]; | |
540 | assign merg_bus_cam_match = merg_bus_fwd_info[3]; | |
541 | assign merg_bus_drop_pkt = merg_bus_fwd_info[4]; | |
542 | assign merg_bus_ether_type = merg_bus_fwd_info[6:5]; | |
543 | assign merg_bus_l4_protocol = merg_bus_fwd_info[8:7]; | |
544 | assign merg_bus_badip = merg_bus_fwd_info[9]; | |
545 | assign merg_bus_noport = merg_bus_fwd_info[10]; | |
546 | assign merg_bus_llcnsap = merg_bus_fwd_info[11]; | |
547 | assign merg_bus_vlan = merg_bus_fwd_info[12]; | |
548 | assign merg_bus_class = merg_bus_fwd_info[17:13]; | |
549 | assign merg_bus_ph_match = merg_bus_fwd_info[18]; | |
550 | assign merg_bus_promis = merg_bus_fwd_info[19]; | |
551 | ||
552 | assign merg_bus_ip_hdr_len = merg_bus_fwd_info[23:20]; | |
553 | assign merg_bus_ip_pkt_len = merg_bus_fwd_info[39:24]; | |
554 | assign merg_bus_tcp_hdr_len = merg_bus_fwd_info[43:40]; | |
555 | assign merg_bus_tcp_push_bit = merg_bus_fwd_info[44]; | |
556 | assign merg_bus_tcp_seq_num = merg_bus_fwd_info[76:45]; | |
557 | assign merg_bus_pkt_id = merg_bus_fwd_info[80:77]; | |
558 | assign merg_bus_rdc_tbl_offset = merg_bus_fwd_info[85:81]; | |
559 | assign merg_bus_valid_tres = merg_bus_fwd_info[87:86]; | |
560 | assign merg_bus_valid_zcopy = merg_bus_fwd_info[88]; | |
561 | assign merg_bus_valid_cam_haddr = merg_bus_fwd_info[98:89]; | |
562 | assign merg_bus_am_parity_err = merg_bus_fwd_info[99]; | |
563 | assign merg_bus_fc_lookup = merg_bus_fwd_info[100]; | |
564 | assign merg_bus_mac_port = merg_bus_fwd_info[102:101]; | |
565 | assign merg_bus_zcopy_id = merg_bus_fwd_info[114:103]; | |
566 | ||
567 | /**********************************/ | |
568 | //Merge and Compare Function | |
569 | /**********************************/ | |
570 | ||
571 | /**************/ | |
572 | //subarea0 | |
573 | /**************/ | |
574 | assign sub0_fmt = fc_din_reg_dout_r1[63]; | |
575 | assign sub0_ext = fc_din_reg_dout_r1[62]; | |
576 | assign sub0_valid = fc_din_reg_dout_r1[61]; | |
577 | assign sub0_mac_da = fc_din_reg_dout_r1[59:12]; | |
578 | assign sub0_vid = fc_din_reg_dout_r1[11:0]; | |
579 | ||
580 | assign sub0_rdc_offset = fc_din_reg_dout_r1[60:56]; | |
581 | assign sub0_hash_v2 = fc_din_reg_dout_r1[55:40]; | |
582 | assign sub0_usr_info = fc_din_reg_dout_r1[39:0]; | |
583 | ||
584 | /*******************************************************/ | |
585 | ||
586 | assign sub0_mac_da_comp0 = (sub0_mac_da[11:0] == merg_bus_fkey_mac_da[11:0]); | |
587 | assign sub0_mac_da_comp1 = (sub0_mac_da[23:12] == merg_bus_fkey_mac_da[23:12]); | |
588 | assign sub0_mac_da_comp2 = (sub0_mac_da[35:24] == merg_bus_fkey_mac_da[35:24]); | |
589 | assign sub0_mac_da_comp3 = (sub0_mac_da[47:36] == merg_bus_fkey_mac_da[47:36]); | |
590 | assign sub0_vlan_match = (sub0_vid == merg_bus_fkey_vid) | (merg_bus_fkey_vlan_valid == 4'b0000); | |
591 | ||
592 | assign sub0_hash_v2_match = (sub0_hash_v2 == merg_bus_hash_v2); | |
593 | ||
594 | /*******************************************************/ | |
595 | ||
596 | assign sub0_v4_ext_match = sub0_valid & merg_bus_ether_type[0] & (!sub0_fmt) & sub0_ext; | |
597 | assign sub0_v6_ext_match = sub0_valid & merg_bus_ether_type[1] & sub0_fmt & sub0_ext; | |
598 | ||
599 | assign sub0_ip_version_match = (merg_bus_ether_type[0] & (!sub0_fmt) | merg_bus_ether_type[1] & sub0_fmt); | |
600 | assign sub0_is_opt_match = sub0_valid & (!sub0_ext) & sub0_ip_version_match; | |
601 | assign sub0_opt_match = sub0_hash_v2_match & sub0_is_opt_match; | |
602 | ||
603 | assign v4_comp_reg_en0 = merge_func_cyc0 | (merge_func_cyc4 & !sub0_v6_ext_match_r); | |
604 | ||
605 | /*******************************************************/ | |
606 | ||
607 | dffre #(1) sub0_v4_ext_match_reg (cclk, reset, merge_func_cyc0, sub0_v4_ext_match, sub0_v4_ext_match_r); | |
608 | dffre #(1) sub0_v6_ext_match_reg (cclk, reset, merge_func_cyc0, sub0_v6_ext_match, sub0_v6_ext_match_r); | |
609 | dffre #(1) sub0_opt_match_reg (cclk, reset, merge_func_cyc0, sub0_opt_match, sub0_opt_match_r); | |
610 | ||
611 | dffre #(1) sub0_mac_da_comp0_reg (cclk, reset, v4_comp_reg_en0, sub0_mac_da_comp0, sub0_mac_da_comp0_r); | |
612 | dffre #(1) sub0_mac_da_comp1_reg (cclk, reset, v4_comp_reg_en0, sub0_mac_da_comp1, sub0_mac_da_comp1_r); | |
613 | dffre #(1) sub0_mac_da_comp2_reg (cclk, reset, v4_comp_reg_en0, sub0_mac_da_comp2, sub0_mac_da_comp2_r); | |
614 | dffre #(1) sub0_mac_da_comp3_reg (cclk, reset, v4_comp_reg_en0, sub0_mac_da_comp3, sub0_mac_da_comp3_r); | |
615 | dffre #(1) sub0_vlan_match_reg (cclk, reset, v4_comp_reg_en0, sub0_vlan_match, sub0_vlan_match_r); | |
616 | ||
617 | dffre #(1) sub4_v4_ext_match_reg (cclk, reset, merge_func_cyc4, sub0_v4_ext_match, sub4_v4_ext_match_r); | |
618 | ||
619 | /**************/ | |
620 | //subarea1 | |
621 | /**************/ | |
622 | assign sub0_mac_da_match = sub0_mac_da_comp0_r & sub0_mac_da_comp1_r & sub0_mac_da_comp2_r & sub0_mac_da_comp3_r; | |
623 | ||
624 | assign sub1_v4_src_addr = fc_din_reg_dout_r1[63:32]; | |
625 | assign sub1_v4_dest_addr = fc_din_reg_dout_r1[31:0]; | |
626 | ||
627 | assign sub1_v6_src_addr_u = fc_din_reg_dout_r1[63:0]; | |
628 | ||
629 | assign sub1_fmt = fc_din_reg_dout_r1[63]; | |
630 | assign sub1_ext = fc_din_reg_dout_r1[62]; | |
631 | assign sub1_valid = fc_din_reg_dout_r1[61]; | |
632 | assign sub1_hash_v2 = fc_din_reg_dout_r1[55:40]; | |
633 | ||
634 | /********************************************************/ | |
635 | ||
636 | assign sub1_v4_src_addr_comp0 = (sub1_v4_src_addr[15:0] == merg_bus_flow_key_row3[15:0]); | |
637 | assign sub1_v4_src_addr_comp1 = (sub1_v4_src_addr[31:16] == merg_bus_flow_key_row3[31:16]); | |
638 | assign sub1_v4_dest_addr_comp0 = (sub1_v4_dest_addr[15:0] == merg_bus_flow_key_row1[15:0]); | |
639 | assign sub1_v4_dest_addr_comp1 = (sub1_v4_dest_addr[31:16] == merg_bus_flow_key_row1[31:16]); | |
640 | ||
641 | assign sub1_v6_src_addr_u_comp0 = (sub1_v6_src_addr_u[15:0] == merg_bus_flow_key_row4[15:0]); | |
642 | assign sub1_v6_src_addr_u_comp1 = (sub1_v6_src_addr_u[31:16] == merg_bus_flow_key_row4[31:16]); | |
643 | assign sub1_v6_src_addr_u_comp2 = (sub1_v6_src_addr_u[47:32] == merg_bus_flow_key_row4[47:32]); | |
644 | assign sub1_v6_src_addr_u_comp3 = (sub1_v6_src_addr_u[63:48] == merg_bus_flow_key_row4[63:48]); | |
645 | ||
646 | assign sub1_hash_v2_match = (sub1_hash_v2 == merg_bus_hash_v2); | |
647 | ||
648 | /*******************************************************/ | |
649 | ||
650 | assign sub1_ip_version_match = (merg_bus_ether_type[0] & (!sub1_fmt) | merg_bus_ether_type[1] & sub1_fmt); | |
651 | assign sub1_is_opt_match = sub1_valid & (!sub1_ext) & sub1_ip_version_match; | |
652 | assign sub1_opt_match = sub1_hash_v2_match & sub1_is_opt_match; | |
653 | ||
654 | assign v4_comp_reg_en1 = merge_func_cyc1 | (merge_func_cyc5 & !sub0_v6_ext_match_r); | |
655 | ||
656 | /*******************************************************/ | |
657 | ||
658 | dffre #(1) sub0_mac_da_match_reg (cclk, reset, v4_comp_reg_en1, sub0_mac_da_match, sub0_mac_da_match_r); | |
659 | ||
660 | dffre #(1) sub1_v4_src_addr_comp0_reg (cclk, reset, v4_comp_reg_en1, sub1_v4_src_addr_comp0, sub1_v4_src_addr_comp0_r); | |
661 | dffre #(1) sub1_v4_src_addr_comp1_reg (cclk, reset, v4_comp_reg_en1, sub1_v4_src_addr_comp1, sub1_v4_src_addr_comp1_r); | |
662 | dffre #(1) sub1_v4_dest_addr_comp0_reg (cclk, reset, v4_comp_reg_en1, sub1_v4_dest_addr_comp0, sub1_v4_dest_addr_comp0_r); | |
663 | dffre #(1) sub1_v4_dest_addr_comp1_reg (cclk, reset, v4_comp_reg_en1, sub1_v4_dest_addr_comp1, sub1_v4_dest_addr_comp1_r); | |
664 | ||
665 | dffre #(1) sub1_v6_src_addr_u_comp0_reg (cclk, reset, merge_func_cyc1, sub1_v6_src_addr_u_comp0,sub1_v6_src_addr_u_comp0_r); | |
666 | dffre #(1) sub1_v6_src_addr_u_comp1_reg (cclk, reset, merge_func_cyc1, sub1_v6_src_addr_u_comp1,sub1_v6_src_addr_u_comp1_r); | |
667 | dffre #(1) sub1_v6_src_addr_u_comp2_reg (cclk, reset, merge_func_cyc1, sub1_v6_src_addr_u_comp2,sub1_v6_src_addr_u_comp2_r); | |
668 | dffre #(1) sub1_v6_src_addr_u_comp3_reg (cclk, reset, merge_func_cyc1, sub1_v6_src_addr_u_comp3,sub1_v6_src_addr_u_comp3_r); | |
669 | ||
670 | dffre #(1) sub1_opt_match_reg (cclk, reset, merge_func_cyc1, sub1_opt_match, sub1_opt_match_r); | |
671 | ||
672 | /**************/ | |
673 | //subarea2 | |
674 | /**************/ | |
675 | assign sub1_v4_src_addr_match = sub1_v4_src_addr_comp0_r & sub1_v4_src_addr_comp1_r; | |
676 | assign sub1_v4_dest_addr_match = sub1_v4_dest_addr_comp0_r & sub1_v4_dest_addr_comp1_r; | |
677 | assign sub1_v6_src_addr_u_match = sub1_v6_src_addr_u_comp0_r & sub1_v6_src_addr_u_comp1_r & | |
678 | sub1_v6_src_addr_u_comp2_r & sub1_v6_src_addr_u_comp3_r; | |
679 | ||
680 | /******************************************************/ | |
681 | ||
682 | assign sub2_ly4_0 = fc_din_reg_dout_r1[63:48]; | |
683 | assign sub2_ly4_1 = fc_din_reg_dout_r1[47:32]; | |
684 | assign sub2_protocol = fc_din_reg_dout_r1[31:24]; | |
685 | assign sub2_port = fc_din_reg_dout_r1[23:22]; | |
686 | ||
687 | assign sub2_v6_src_addr_l = fc_din_reg_dout_r1[63:0]; | |
688 | ||
689 | assign sub2_fmt = fc_din_reg_dout_r1[63]; | |
690 | assign sub2_ext = fc_din_reg_dout_r1[62]; | |
691 | assign sub2_valid = fc_din_reg_dout_r1[61]; | |
692 | assign sub2_hash_v2 = fc_din_reg_dout_r1[55:40]; | |
693 | ||
694 | /*******************************************************/ | |
695 | assign sub2_ly4_0_match = (sub2_ly4_0 == merg_bus_fkey_ly4_0); | |
696 | assign sub2_ly4_1_match = (sub2_ly4_1 == merg_bus_fkey_ly4_1); | |
697 | assign sub2_protocol_match = (sub2_protocol == merg_bus_fkey_protocol); | |
698 | assign sub2_port_match = (sub2_port == merg_bus_fkey_port); | |
699 | ||
700 | assign sub2_v6_src_addr_l_comp0 = (sub2_v6_src_addr_l[15:0] == merg_bus_flow_key_row3[15:0]); | |
701 | assign sub2_v6_src_addr_l_comp1 = (sub2_v6_src_addr_l[31:16] == merg_bus_flow_key_row3[31:16]); | |
702 | assign sub2_v6_src_addr_l_comp2 = (sub2_v6_src_addr_l[47:32] == merg_bus_flow_key_row3[47:32]); | |
703 | assign sub2_v6_src_addr_l_comp3 = (sub2_v6_src_addr_l[63:48] == merg_bus_flow_key_row3[63:48]); | |
704 | ||
705 | assign sub2_hash_v2_match = (sub2_hash_v2 == merg_bus_hash_v2); | |
706 | ||
707 | /*******************************************************/ | |
708 | ||
709 | assign sub2_ip_version_match = (merg_bus_ether_type[0] & (!sub2_fmt) | merg_bus_ether_type[1] & sub2_fmt); | |
710 | assign sub2_is_opt_match = sub2_valid & (!sub2_ext) & sub2_ip_version_match; | |
711 | assign sub2_opt_match = sub2_hash_v2_match & sub2_is_opt_match; | |
712 | ||
713 | assign v4_comp_reg_en2 = merge_func_cyc2 | (merge_func_cyc6 & !sub0_v6_ext_match_r) ; | |
714 | assign v6_comp_reg_en2 = merge_func_cyc2 | merge_func_cyc5 | merge_func_cyc6; | |
715 | ||
716 | /*******************************************************/ | |
717 | ||
718 | ||
719 | dffre #(1) sub1_v4_src_addr_match_reg (cclk, reset, v4_comp_reg_en2, sub1_v4_src_addr_match, sub1_v4_src_addr_match_r); | |
720 | dffre #(1) sub1_v4_dest_addr_match_reg (cclk, reset, v4_comp_reg_en2, sub1_v4_dest_addr_match, sub1_v4_dest_addr_match_r); | |
721 | ||
722 | dffre #(1) sub1_v6_src_addr_u_match_reg (cclk, reset, merge_func_cyc2, sub1_v6_src_addr_u_match,sub1_v6_src_addr_u_match_r); | |
723 | ||
724 | dffre #(1) sub2_ly4_0_match_reg (cclk, reset, v6_comp_reg_en2, sub2_ly4_0_match, sub2_ly4_0_match_r); | |
725 | dffre #(1) sub2_ly4_1_match_reg (cclk, reset, v6_comp_reg_en2, sub2_ly4_1_match, sub2_ly4_1_match_r); | |
726 | dffre #(1) sub2_protocol_match_reg (cclk, reset, v6_comp_reg_en2, sub2_protocol_match, sub2_protocol_match_r); | |
727 | dffre #(1) sub2_port_match_reg (cclk, reset, v6_comp_reg_en2, sub2_port_match, sub2_port_match_r); | |
728 | ||
729 | dffre #(1) sub2_v6_src_addr_l_comp0_reg (cclk, reset, merge_func_cyc2, sub2_v6_src_addr_l_comp0,sub2_v6_src_addr_l_comp0_r); | |
730 | dffre #(1) sub2_v6_src_addr_l_comp1_reg (cclk, reset, merge_func_cyc2, sub2_v6_src_addr_l_comp1,sub2_v6_src_addr_l_comp1_r); | |
731 | dffre #(1) sub2_v6_src_addr_l_comp2_reg (cclk, reset, merge_func_cyc2, sub2_v6_src_addr_l_comp2,sub2_v6_src_addr_l_comp2_r); | |
732 | dffre #(1) sub2_v6_src_addr_l_comp3_reg (cclk, reset, merge_func_cyc2, sub2_v6_src_addr_l_comp3,sub2_v6_src_addr_l_comp3_r); | |
733 | ||
734 | dffre #(1) sub2_opt_match_reg (cclk, reset, merge_func_cyc2, sub2_opt_match, sub2_opt_match_r); | |
735 | ||
736 | ||
737 | /**************/ | |
738 | //subarea3 | |
739 | /**************/ | |
740 | assign sub2_v6_src_addr_l_match = sub2_v6_src_addr_l_comp0_r & sub2_v6_src_addr_l_comp1_r & | |
741 | sub2_v6_src_addr_l_comp2_r & sub2_v6_src_addr_l_comp3_r; | |
742 | ||
743 | assign sub3_v4_ext_match_tmp = sub0_vlan_match_r & sub0_mac_da_match_r & | |
744 | sub1_v4_src_addr_match_r & sub1_v4_dest_addr_match_r & | |
745 | sub2_ly4_0_match_r & sub2_ly4_1_match_r & | |
746 | sub2_protocol_match_r & sub2_port_match_r; | |
747 | ||
748 | assign sub3_v4_ext_match_all = sub3_v4_ext_match_tmp & sub0_v4_ext_match_r; | |
749 | assign sub7_v4_ext_match_all = sub3_v4_ext_match_tmp & sub4_v4_ext_match_r; | |
750 | ||
751 | /*****************************************************/ | |
752 | ||
753 | assign sub3_rdc_offset = fc_din_reg_dout_r1[60:56]; | |
754 | assign sub3_zcopy_valid = fc_din_reg_dout_r1[55]; | |
755 | assign sub3_zcopy_id = fc_din_reg_dout_r1[51:40]; | |
756 | assign sub3_usr_info = fc_din_reg_dout_r1[39:0]; | |
757 | ||
758 | assign sub3_v6_dst_addr_u = fc_din_reg_dout_r1[63:0]; | |
759 | ||
760 | assign sub3_fmt = fc_din_reg_dout_r1[63]; | |
761 | assign sub3_ext = fc_din_reg_dout_r1[62]; | |
762 | assign sub3_valid = fc_din_reg_dout_r1[61]; | |
763 | assign sub3_hash_v2 = fc_din_reg_dout_r1[55:40]; | |
764 | ||
765 | /*****************************************************/ | |
766 | ||
767 | assign sub3_v6_dst_addr_u_comp0 = (sub3_v6_dst_addr_u[15:0] == merg_bus_flow_key_row2[15:0]); | |
768 | assign sub3_v6_dst_addr_u_comp1 = (sub3_v6_dst_addr_u[31:16] == merg_bus_flow_key_row2[31:16]); | |
769 | assign sub3_v6_dst_addr_u_comp2 = (sub3_v6_dst_addr_u[47:32] == merg_bus_flow_key_row2[47:32]); | |
770 | assign sub3_v6_dst_addr_u_comp3 = (sub3_v6_dst_addr_u[63:48] == merg_bus_flow_key_row2[63:48]); | |
771 | ||
772 | assign sub3_hash_v2_match = (sub3_hash_v2 == merg_bus_hash_v2); | |
773 | ||
774 | /*******************************************************/ | |
775 | ||
776 | assign sub3_ip_version_match = (merg_bus_ether_type[0] & (!sub3_fmt) | merg_bus_ether_type[1] & sub3_fmt); | |
777 | assign sub3_is_opt_match = sub3_valid & (!sub3_ext) & sub3_ip_version_match; | |
778 | assign sub3_opt_match = sub3_hash_v2_match & sub3_is_opt_match; | |
779 | ||
780 | /******************************************************/ | |
781 | ||
782 | dffre #(1) sub2_v6_src_addr_l_match_reg (cclk, reset, merge_func_cyc3, sub2_v6_src_addr_l_match,sub2_v6_src_addr_l_match_r); | |
783 | ||
784 | dffre #(1) sub3_v6_dst_addr_u_comp0_reg (cclk, reset, merge_func_cyc3, sub3_v6_dst_addr_u_comp0,sub3_v6_dst_addr_u_comp0_r); | |
785 | dffre #(1) sub3_v6_dst_addr_u_comp1_reg (cclk, reset, merge_func_cyc3, sub3_v6_dst_addr_u_comp1,sub3_v6_dst_addr_u_comp1_r); | |
786 | dffre #(1) sub3_v6_dst_addr_u_comp2_reg (cclk, reset, merge_func_cyc3, sub3_v6_dst_addr_u_comp2,sub3_v6_dst_addr_u_comp2_r); | |
787 | dffre #(1) sub3_v6_dst_addr_u_comp3_reg (cclk, reset, merge_func_cyc3, sub3_v6_dst_addr_u_comp3,sub3_v6_dst_addr_u_comp3_r); | |
788 | ||
789 | dffre #(1) sub3_v4_ext_match_all_reg (cclk, reset, merge_func_cyc3, sub3_v4_ext_match_all, sub3_v4_ext_match_all_r); | |
790 | //dffre #(1) sub7_v4_ext_match_all_reg (cclk, reset, merge_func_cyc7, sub3_v4_ext_match_all, sub7_v4_ext_match_all_r); | |
791 | dffre #(1) sub3_opt_match_reg (cclk, reset, merge_func_cyc3, sub3_opt_match, sub3_opt_match_r); | |
792 | ||
793 | /**************/ | |
794 | //subarea4 | |
795 | /**************/ | |
796 | assign sub3_v6_dst_addr_u_match = sub3_v6_dst_addr_u_comp0_r & sub3_v6_dst_addr_u_comp1_r & | |
797 | sub3_v6_dst_addr_u_comp2_r & sub3_v6_dst_addr_u_comp3_r; | |
798 | ||
799 | /*****************************************************/ | |
800 | ||
801 | assign sub4_v6_dst_addr_l = fc_din_reg_dout_r1[63:0]; | |
802 | ||
803 | assign sub4_fmt = fc_din_reg_dout_r1[63]; | |
804 | assign sub4_ext = fc_din_reg_dout_r1[62]; | |
805 | assign sub4_valid = fc_din_reg_dout_r1[61]; | |
806 | assign sub4_hash_v2 = fc_din_reg_dout_r1[55:40]; | |
807 | ||
808 | /*****************************************************/ | |
809 | ||
810 | assign sub4_v6_dst_addr_l_comp0 = (sub4_v6_dst_addr_l[15:0] == merg_bus_flow_key_row1[15:0]); | |
811 | assign sub4_v6_dst_addr_l_comp1 = (sub4_v6_dst_addr_l[31:16] == merg_bus_flow_key_row1[31:16]); | |
812 | assign sub4_v6_dst_addr_l_comp2 = (sub4_v6_dst_addr_l[47:32] == merg_bus_flow_key_row1[47:32]); | |
813 | assign sub4_v6_dst_addr_l_comp3 = (sub4_v6_dst_addr_l[63:48] == merg_bus_flow_key_row1[63:48]); | |
814 | ||
815 | assign sub4_hash_v2_match = (sub4_hash_v2 == merg_bus_hash_v2); | |
816 | ||
817 | /*******************************************************/ | |
818 | ||
819 | assign sub4_ip_version_match = (merg_bus_ether_type[0] & (!sub4_fmt) | merg_bus_ether_type[1] & sub4_fmt); | |
820 | assign sub4_is_opt_match = sub4_valid & (!sub4_ext) & sub4_ip_version_match; | |
821 | assign sub4_opt_match = sub4_hash_v2_match & sub4_is_opt_match; | |
822 | ||
823 | /******************************************************/ | |
824 | ||
825 | dffre #(1) sub3_v6_dst_addr_u_match_reg (cclk, reset, merge_func_cyc4, sub3_v6_dst_addr_u_match,sub3_v6_dst_addr_u_match_r); | |
826 | ||
827 | dffre #(1) sub4_v6_dst_addr_l_comp0_reg (cclk, reset, merge_func_cyc4, sub4_v6_dst_addr_l_comp0,sub4_v6_dst_addr_l_comp0_r); | |
828 | dffre #(1) sub4_v6_dst_addr_l_comp1_reg (cclk, reset, merge_func_cyc4, sub4_v6_dst_addr_l_comp1,sub4_v6_dst_addr_l_comp1_r); | |
829 | dffre #(1) sub4_v6_dst_addr_l_comp2_reg (cclk, reset, merge_func_cyc4, sub4_v6_dst_addr_l_comp2,sub4_v6_dst_addr_l_comp2_r); | |
830 | dffre #(1) sub4_v6_dst_addr_l_comp3_reg (cclk, reset, merge_func_cyc4, sub4_v6_dst_addr_l_comp3,sub4_v6_dst_addr_l_comp3_r); | |
831 | ||
832 | dffre #(1) sub4_opt_match_reg (cclk, reset, merge_func_cyc4, sub4_opt_match, sub4_opt_match_r); | |
833 | ||
834 | /**************/ | |
835 | //subarea5 | |
836 | /**************/ | |
837 | assign sub4_v6_dst_addr_l_match = sub4_v6_dst_addr_l_comp0_r & sub4_v6_dst_addr_l_comp1_r & | |
838 | sub4_v6_dst_addr_l_comp2_r & sub4_v6_dst_addr_l_comp3_r; | |
839 | ||
840 | ||
841 | /*****************************************************/ | |
842 | ||
843 | assign sub5_fmt = fc_din_reg_dout_r1[63]; | |
844 | assign sub5_ext = fc_din_reg_dout_r1[62]; | |
845 | assign sub5_valid = fc_din_reg_dout_r1[61]; | |
846 | assign sub5_hash_v2 = fc_din_reg_dout_r1[55:40]; | |
847 | ||
848 | /*****************************************************/ | |
849 | ||
850 | assign sub5_hash_v2_match = (sub5_hash_v2 == merg_bus_hash_v2); | |
851 | assign sub5_ip_version_match = (merg_bus_ether_type[0] & (!sub5_fmt) | merg_bus_ether_type[1] & sub5_fmt); | |
852 | assign sub5_is_opt_match = sub5_valid & (!sub5_ext) & sub5_ip_version_match; | |
853 | assign sub5_opt_match = sub5_hash_v2_match & sub5_is_opt_match; | |
854 | ||
855 | /******************************************************/ | |
856 | ||
857 | dffre #(1) sub4_v6_dst_addr_l_match_reg (cclk, reset, merge_func_cyc5, sub4_v6_dst_addr_l_match,sub4_v6_dst_addr_l_match_r); | |
858 | ||
859 | dffre #(1) sub5_opt_match_reg (cclk, reset, merge_func_cyc5, sub5_opt_match, sub5_opt_match_r); | |
860 | ||
861 | ||
862 | /**************/ | |
863 | //subarea6 | |
864 | /**************/ | |
865 | assign sub6_v6_ext_match_all = sub0_v6_ext_match_r & sub0_vlan_match_r & sub0_mac_da_match_r & | |
866 | sub1_v6_src_addr_u_match_r & sub2_v6_src_addr_l_match_r & | |
867 | sub3_v6_dst_addr_u_match_r & sub4_v6_dst_addr_l_match_r & | |
868 | sub2_ly4_0_match_r & sub2_ly4_1_match_r & | |
869 | sub2_protocol_match_r & sub2_port_match_r; | |
870 | ||
871 | /*****************************************************/ | |
872 | ||
873 | assign sub6_fmt = fc_din_reg_dout_r1[63]; | |
874 | assign sub6_ext = fc_din_reg_dout_r1[62]; | |
875 | assign sub6_valid = fc_din_reg_dout_r1[61]; | |
876 | assign sub6_hash_v2 = fc_din_reg_dout_r1[55:40]; | |
877 | ||
878 | /*****************************************************/ | |
879 | ||
880 | assign sub6_hash_v2_match = (sub6_hash_v2 == merg_bus_hash_v2); | |
881 | assign sub6_ip_version_match = (merg_bus_ether_type[0] & (!sub6_fmt) | merg_bus_ether_type[1] & sub6_fmt); | |
882 | assign sub6_is_opt_match = sub6_valid & (!sub6_ext) & sub6_ip_version_match; | |
883 | assign sub6_opt_match = sub6_hash_v2_match & sub6_is_opt_match; | |
884 | ||
885 | /******************************************************/ | |
886 | ||
887 | dffre #(1) sub6_v6_ext_match_all_reg (cclk, reset, merge_func_cyc6, sub6_v6_ext_match_all, sub6_v6_ext_match_all_r); | |
888 | dffre #(1) sub6_opt_match_reg (cclk, reset, merge_func_cyc6, sub6_opt_match, sub6_opt_match_r); | |
889 | ||
890 | /**************/ | |
891 | //subarea7 | |
892 | /**************/ | |
893 | assign sub7_fmt = fc_din_reg_dout_r1[63]; | |
894 | assign sub7_ext = fc_din_reg_dout_r1[62]; | |
895 | assign sub7_valid = fc_din_reg_dout_r1[61]; | |
896 | assign sub7_hash_v2 = fc_din_reg_dout_r1[55:40]; | |
897 | ||
898 | /*****************************************************/ | |
899 | ||
900 | assign sub7_hash_v2_match = (sub7_hash_v2 == merg_bus_hash_v2); | |
901 | assign sub7_ip_version_match = (merg_bus_ether_type[0] & (!sub7_fmt) | merg_bus_ether_type[1] & sub7_fmt); | |
902 | assign sub7_is_opt_match = sub7_valid & (!sub7_ext) & sub7_ip_version_match; | |
903 | assign sub7_opt_match = sub7_hash_v2_match & sub7_is_opt_match; | |
904 | ||
905 | /******************************************************/ | |
906 | ||
907 | dffre #(1) sub7_opt_match_reg (cclk, reset, merge_func_cyc7, sub7_opt_match, sub7_opt_match_r); | |
908 | ||
909 | /*******************/ | |
910 | //Exect Match | |
911 | /*******************/ | |
912 | assign exect_match = sub3_v4_ext_match_all_r | sub6_v6_ext_match_all_r | sub7_v4_ext_match_all; | |
913 | assign ext_sub_addr = (sub3_v4_ext_match_all_r | sub6_v6_ext_match_all_r) ? 3'b000 : 3'b100; | |
914 | assign ext_info_reg_en = (merge_func_cyc3 | | |
915 | (merge_func_cyc6 & !sub3_v4_ext_match_all_r) | | |
916 | (merge_func_cyc7 & !(sub3_v4_ext_match_all_r | sub6_v6_ext_match_all_r))); | |
917 | ||
918 | dffre #(1) exect_match_reg (cclk, reset, merge_func_cyc7, exect_match, exect_match_r); | |
919 | dffre #(3) ext_sub_addr_reg (cclk, reset, merge_func_cyc7, ext_sub_addr, ext_sub_addr_r); | |
920 | dffre #(1) ext_zcopy_valid_reg (cclk, reset, ext_info_reg_en, sub3_zcopy_valid, ext_zcopy_valid_r); | |
921 | dffre #(12) ext_zcopy_id_reg (cclk, reset, ext_info_reg_en, sub3_zcopy_id, ext_zcopy_id_r); | |
922 | dffre #(5) ext_rdc_offset_reg (cclk, reset, ext_info_reg_en, sub3_rdc_offset, ext_rdc_offset_r); | |
923 | dffre #(40) ext_usr_info_reg (cclk, reset, ext_info_reg_en, sub3_usr_info, ext_usr_info_r); | |
924 | ||
925 | ||
926 | /*******************/ | |
927 | //Optimistic Match | |
928 | /*******************/ | |
929 | assign opt_match = sub4_opt_match_r | sub5_opt_match_r | sub6_opt_match_r | sub7_opt_match_r | | |
930 | sub4_opt_match4_r; | |
931 | assign opt_match_array = {sub7_opt_match_r, sub6_opt_match_r, sub5_opt_match_r, sub4_opt_match_r, | |
932 | sub3_opt_match_r, sub2_opt_match_r, sub1_opt_match_r, sub0_opt_match_r}; | |
933 | ||
934 | assign sub4_opt_match4 = sub0_opt_match_r | sub1_opt_match_r | sub2_opt_match_r | sub3_opt_match_r; | |
935 | assign sub7_opt_no_match1 = !sub0_opt_match_r; | |
936 | assign sub7_opt_no_match2 = !(sub0_opt_match_r | sub1_opt_match_r); | |
937 | assign sub7_opt_no_match3 = !(sub0_opt_match_r | sub1_opt_match_r | sub2_opt_match_r); | |
938 | assign sub7_opt_no_match4 = !(sub0_opt_match_r | sub1_opt_match_r | sub2_opt_match_r | sub3_opt_match_r); | |
939 | assign sub7_opt_no_match5 = !(sub4_opt_match4_r | sub4_opt_match_r); | |
940 | assign sub7_opt_no_match6 = !(sub4_opt_match4_r | sub4_opt_match_r | sub5_opt_match_r); | |
941 | assign sub7_opt_no_match7 = !(sub4_opt_match4_r | sub4_opt_match_r | sub5_opt_match_r | sub6_opt_match_r); | |
942 | ||
943 | assign opt_info_reg_en = (merge_func_cyc7 & sub7_opt_no_match7) | | |
944 | (merge_func_cyc6 & sub7_opt_no_match6) | | |
945 | (merge_func_cyc5 & sub7_opt_no_match5) | | |
946 | (merge_func_cyc4 & sub7_opt_no_match4) | | |
947 | (merge_func_cyc3 & sub7_opt_no_match3) | | |
948 | (merge_func_cyc2 & sub7_opt_no_match2) | | |
949 | (merge_func_cyc1 & sub7_opt_no_match1) | | |
950 | merge_func_cyc0; | |
951 | ||
952 | always @(opt_match_array) | |
953 | begin | |
954 | ||
955 | casex (opt_match_array) | |
956 | // 0in < case -full -parallel -message "0in ERROR: case check in fflp_merge_func" | |
957 | ||
958 | 8'bxxxxxxx1: opt_sub_addr = 3'b000; | |
959 | 8'bxxxxxx10: opt_sub_addr = 3'b001; | |
960 | 8'bxxxxx100: opt_sub_addr = 3'b010; | |
961 | 8'bxxxx1000: opt_sub_addr = 3'b011; | |
962 | 8'bxxx10000: opt_sub_addr = 3'b100; | |
963 | 8'bxx100000: opt_sub_addr = 3'b101; | |
964 | 8'bx1000000: opt_sub_addr = 3'b110; | |
965 | 8'b10000000: opt_sub_addr = 3'b111; | |
966 | default: opt_sub_addr = 3'b000; | |
967 | ||
968 | endcase | |
969 | ||
970 | end | |
971 | ||
972 | dffre #(1) sub4_opt_match4_reg (cclk, reset, merge_func_cyc4, sub4_opt_match4, sub4_opt_match4_r); | |
973 | dffre #(5) opt_rdc_offset_reg (cclk, reset, opt_info_reg_en, sub0_rdc_offset, opt_rdc_offset_r); | |
974 | dffre #(40) opt_usr_info_reg (cclk, reset, opt_info_reg_en, sub0_usr_info, opt_usr_info_r); | |
975 | ||
976 | ||
977 | /***********************************************/ | |
978 | //Merge Matches, one cycle after merge_func_cyc7 | |
979 | /***********************************************/ | |
980 | assign opt_match_v = opt_match & merg_bus_fc_lookup_r & !ecc_uncor_err; | |
981 | assign exect_match_v = exect_match_r & merg_bus_fc_lookup_r & !ecc_uncor_err; | |
982 | ||
983 | assign fram_hash_match = opt_match_v | exect_match_v; | |
984 | assign fram_sub_addr = exect_match_v ? ext_sub_addr_r : opt_match_v ? opt_sub_addr : 3'b0; | |
985 | assign fram_zcopy_valid = exect_match_v ? ext_zcopy_valid_r : 1'b0; | |
986 | assign fram_zcopy_id = exect_match_v ? ext_zcopy_id_r : 12'b0; | |
987 | assign fram_rdc_offset = exect_match_v ? ext_rdc_offset_r : opt_match_v ? opt_rdc_offset_r : 5'b0; | |
988 | assign fram_usr_info = exect_match_v ? ext_usr_info_r : opt_match_v ? opt_usr_info_r : 40'b0; | |
989 | ||
990 | ||
991 | assign fwd_l2_class = !(merg_bus_class[2] | merg_bus_class[3]) | merg_bus_class[4]; | |
992 | ||
993 | assign fwd_rdc_offset = (fwd_l2_class_r | merg_bus_valid_tres_bit0_r) ? merg_bus_rdc_tbl_offset_r[4:0] : | |
994 | ecc_uncor_err ? 5'b0 : | |
995 | fram_hash_match ? fram_rdc_offset[4:0] : | |
996 | merg_bus_hash_v1_lsb_r[4:0]; | |
997 | ||
998 | assign fwd_zcopy_id = merg_bus_fc_lookup_r ? fram_zcopy_id : | |
999 | merg_bus_valid_zcopy_r ? merg_bus_zcopy_id_r : 12'b0; | |
1000 | ||
1001 | assign fwd_l4_protocol = (|merg_bus_ether_type) ? merg_bus_l4_protocol : 2'b00; //at merge_func_cyc7 | |
1002 | assign fwd_hash_v1 = (|merg_bus_ether_type) ? merg_bus_hash_v1[19:0] : 20'b0; //at merge_func_cyc7 | |
1003 | assign fwd_hash_v2 = (|merg_bus_ether_type) ? merg_bus_hash_v2 : 16'b0; //at merge_func_cyc7 | |
1004 | ||
1005 | assign fflp_hdw_err = merg_bus_am_parity_err | (!fio_no_fatal_err) | | |
1006 | ecc_uncor_err | ecc_check_err_r1; //at merge_func_cyc7 | |
1007 | ||
1008 | dffre #(1) merg_bus_fc_lookup_r_reg (cclk, reset, merge_func_cyc7, merg_bus_fc_lookup, merg_bus_fc_lookup_r); | |
1009 | dffre #(1) fwd_l2_class_r_reg (cclk, reset, merge_func_cyc7, fwd_l2_class, fwd_l2_class_r); | |
1010 | dffre #(5) merg_bus_rdc_offset_r_reg (cclk, reset, merge_func_cyc7, merg_bus_rdc_tbl_offset, merg_bus_rdc_tbl_offset_r); | |
1011 | dffre #(1) merg_bus_valid_tres_r_reg (cclk, reset, merge_func_cyc7, merg_bus_valid_tres[0], merg_bus_valid_tres_bit0_r); | |
1012 | dffre #(5) merg_bus_hash_v1_r_reg (cclk, reset, merge_func_cyc7, merg_bus_hash_v1[4:0], merg_bus_hash_v1_lsb_r); | |
1013 | dffre #(1) merg_bus_valid_zcopy_r_reg (cclk, reset, merge_func_cyc7, merg_bus_valid_zcopy, merg_bus_valid_zcopy_r); | |
1014 | dffre #(12) merg_bus_zcopy_id_r_reg (cclk, reset, merge_func_cyc7, merg_bus_zcopy_id, merg_bus_zcopy_id_r); | |
1015 | ||
1016 | /*******************/ | |
1017 | //Forward Decision | |
1018 | /*******************/ | |
1019 | assign byte0 = {merg_bus_mac_port, merg_bus_ph_match, merg_bus_class}; | |
1020 | assign byte1 = {merg_bus_vlan, merg_bus_llcnsap, merg_bus_noport, merg_bus_badip, | |
1021 | merg_bus_cam_match, merg_bus_valid_tres, merg_bus_valid_zcopy}; | |
1022 | ||
1023 | assign byte2 = {merg_bus_rdc_tbl_num_r, fwd_rdc_offset_r}; | |
1024 | ||
1025 | assign byte3 = merg_bus_valid_cam_haddr[7:0]; | |
1026 | assign byte4 = {2'b0, fram_hash_match, exect_match_v, fram_zcopy_valid, fram_sub_addr}; | |
1027 | ||
1028 | assign byte5 = 8'b0; //reserved for zcp to use | |
1029 | ||
1030 | assign byte6 = {merg_bus_promis, fflp_hdw_err, merg_bus_drop_pkt, merg_bus_tcp_push_bit, fwd_zcopy_id[11:8]}; | |
1031 | assign byte7 = fwd_zcopy_id[7:0]; | |
1032 | ||
1033 | assign byte8 = fwd_hash_v2[15:8]; | |
1034 | assign byte9 = fwd_hash_v2[7:0]; | |
1035 | assign byte10 = {4'b0, fwd_hash_v1[19:16]}; | |
1036 | assign byte11 = fwd_hash_v1[15:8]; | |
1037 | assign byte12 = fwd_hash_v1[7:0]; | |
1038 | ||
1039 | assign byte13 = fram_usr_info[39:32]; | |
1040 | assign byte14 = fram_usr_info[31:24]; | |
1041 | assign byte15 = fram_usr_info[23:16]; | |
1042 | assign byte16 = fram_usr_info[15:8]; | |
1043 | assign byte17 = fram_usr_info[7:0]; | |
1044 | ||
1045 | assign byte18 = {1'b0, merg_bus_ether_type[1], merg_bus_pkt_id, fwd_l4_protocol}; | |
1046 | assign byte19 = 8'b0; | |
1047 | assign byte20 = merg_bus_ip_pkt_len[15:8]; | |
1048 | assign byte21 = merg_bus_ip_pkt_len[7:0]; | |
1049 | assign byte22 = {merg_bus_ip_hdr_len, merg_bus_tcp_hdr_len}; | |
1050 | assign byte23 = merg_bus_tcp_seq_num[31:24]; | |
1051 | assign byte24 = merg_bus_tcp_seq_num[23:16]; | |
1052 | assign byte25 = merg_bus_tcp_seq_num[15:8]; | |
1053 | assign byte26 = merg_bus_tcp_seq_num[7:0]; | |
1054 | ||
1055 | dffre #(8) byte0_reg (cclk, reset, merge_func_cyc7, byte0, byte0_r); | |
1056 | dffre #(8) byte1_reg (cclk, reset, merge_func_cyc7, byte1, byte1_r); | |
1057 | ||
1058 | dffre #(5) rdc_offset_reg(cclk, reset, pre_zcp_wr, fwd_rdc_offset, fwd_rdc_offset_r); | |
1059 | dffre #(3) rdc_num_reg (cclk, reset, merge_func_cyc7, merg_bus_rdc_tbl_num, merg_bus_rdc_tbl_num_r); | |
1060 | ||
1061 | dffre #(8) byte3_reg (cclk, reset, merge_func_cyc7, byte3, byte3_r); | |
1062 | dffre #(8) byte4_reg (cclk, reset, pre_zcp_wr, byte4, byte4_r); | |
1063 | ||
1064 | dffre #(4) byte6_reg_h (cclk, reset, merge_func_cyc7, byte6[7:4], byte6_r[7:4]); | |
1065 | dffre #(4) byte6_reg_l (cclk, reset, pre_zcp_wr, byte6[3:0], byte6_r[3:0]); | |
1066 | ||
1067 | dffre #(8) byte7_reg (cclk, reset, pre_zcp_wr, byte7, byte7_r); | |
1068 | dffre #(8) byte8_reg (cclk, reset, merge_func_cyc7, byte8, byte8_r); | |
1069 | dffre #(8) byte9_reg (cclk, reset, merge_func_cyc7, byte9, byte9_r); | |
1070 | dffre #(8) byte10_reg (cclk, reset, merge_func_cyc7, byte10, byte10_r); | |
1071 | dffre #(8) byte11_reg (cclk, reset, merge_func_cyc7, byte11, byte11_r); | |
1072 | dffre #(8) byte12_reg (cclk, reset, merge_func_cyc7, byte12, byte12_r); | |
1073 | dffre #(8) byte13_reg (cclk, reset, pre_zcp_wr, byte13, byte13_r); | |
1074 | dffre #(8) byte14_reg (cclk, reset, pre_zcp_wr, byte14, byte14_r); | |
1075 | dffre #(8) byte15_reg (cclk, reset, pre_zcp_wr, byte15, byte15_r); | |
1076 | dffre #(8) byte16_reg (cclk, reset, pre_zcp_wr, byte16, byte16_r); | |
1077 | dffre #(8) byte17_reg (cclk, reset, pre_zcp_wr, byte17, byte17_r); | |
1078 | dffre #(8) byte18_reg (cclk, reset, merge_func_cyc7, byte18, byte18_r); | |
1079 | ||
1080 | dffre #(8) byte20_reg (cclk, reset, merge_func_cyc7, byte20, byte20_r); | |
1081 | dffre #(8) byte21_reg (cclk, reset, merge_func_cyc7, byte21, byte21_r); | |
1082 | dffre #(8) byte22_reg (cclk, reset, merge_func_cyc7, byte22, byte22_r); | |
1083 | dffre #(8) byte23_reg (cclk, reset, merge_func_cyc7, byte23, byte23_r); | |
1084 | dffre #(8) byte24_reg (cclk, reset, merge_func_cyc7, byte24, byte24_r); | |
1085 | dffre #(8) byte25_reg (cclk, reset, merge_func_cyc7, byte25, byte25_r); | |
1086 | dffre #(8) byte26_reg (cclk, reset, merge_func_cyc7, byte26, byte26_r); | |
1087 | ||
1088 | assign fflp_zcp_data = {byte0_r, byte1_r, byte2, byte3_r, byte4_r, | |
1089 | byte5, byte6_r, byte7_r, byte8_r, byte9_r, | |
1090 | byte10_r, byte11_r, byte12_r, byte13_r, byte14_r, | |
1091 | byte15_r, byte16_r, byte17_r, byte18_r, byte19, | |
1092 | byte20_r, byte21_r, byte22_r, byte23_r, byte24_r, | |
1093 | byte25_r, byte26_r}; | |
1094 | ||
1095 | dffr #(1) merge_func_cyc0_reg (cclk, reset, srch_fio_rd_en_4, merge_func_cyc0); | |
1096 | dffr #(1) merge_func_cyc1_reg (cclk, reset, merge_func_cyc0, merge_func_cyc1); | |
1097 | dffr #(1) merge_func_cyc2_reg (cclk, reset, merge_func_cyc1, merge_func_cyc2); | |
1098 | dffr #(1) merge_func_cyc3_reg (cclk, reset, merge_func_cyc2, merge_func_cyc3); | |
1099 | dffr #(1) merge_func_cyc4_reg (cclk, reset, merge_func_cyc3, merge_func_cyc4); | |
1100 | dffr #(1) merge_func_cyc5_reg (cclk, reset, merge_func_cyc4, merge_func_cyc5); | |
1101 | dffr #(1) merge_func_cyc6_reg (cclk, reset, merge_func_cyc5, merge_func_cyc6); | |
1102 | dffr #(1) merge_func_cyc7_reg (cclk, reset, merge_func_cyc6, merge_func_cyc7); | |
1103 | ||
1104 | dffr #(1) pre_zcp_wr_reg (cclk, reset, merge_func_cyc7, pre_zcp_wr); | |
1105 | dffr #(1) pre_zcp_wr1_reg (cclk, reset, pre_zcp_wr, pre_zcp_wr1); | |
1106 | dffr #(1) pre_zcp_wr2_reg (cclk, reset, pre_zcp_wr1, pre_zcp_wr2); | |
1107 | dffr #(1) zcp_wr_reg (cclk, reset, zcp_wr_p, zcp_wr); | |
1108 | ||
1109 | assign zcp_wr_p = pre_zcp_wr | pre_zcp_wr1 | pre_zcp_wr2; | |
1110 | ||
1111 | ||
1112 | /***************************/ | |
1113 | //FCRAM Error handling | |
1114 | /***************************/ | |
1115 | assign merge_func_cyc = (merge_func_cyc0 | merge_func_cyc1 | merge_func_cyc2 | merge_func_cyc3 | | |
1116 | merge_func_cyc4 | merge_func_cyc5 | merge_func_cyc6 | merge_func_cyc7); | |
1117 | assign ecc_uncor_err_en = merge_func_cyc & ecc_check_err_r1 | pre_zcp_wr; | |
1118 | assign ecc_uncor_err_in = merge_func_cyc & ecc_check_err_r1 ? 1'b1 : 1'b0; | |
1119 | ||
1120 | assign ecc_check_err_all= ecc_check_err_r1 | ecc_corr_err_r1; | |
1121 | assign err_cnt_reg_en = merge_func_cyc & ecc_check_err_all | pre_zcp_wr; | |
1122 | assign err_cnt_in = merge_func_cyc0 & ecc_check_err_all ? 4'd1 : | |
1123 | merge_func_cyc & ecc_check_err_all ? (err_cnt + 4'd1) : | |
1124 | 4'd0; | |
1125 | assign ecc_err = |err_cnt; | |
1126 | assign multi_err = |err_cnt[3:1]; | |
1127 | assign err_hash_v1 = {byte10_r[3:0], byte11_r[7:0], byte12_r[7:0]}; | |
1128 | assign sub_addr_array = {merge_func_cyc7, merge_func_cyc6, merge_func_cyc5, merge_func_cyc4, | |
1129 | merge_func_cyc3, merge_func_cyc2, merge_func_cyc1, merge_func_cyc0}; | |
1130 | assign ecc_addr_reg_en = merge_func_cyc & ecc_check_err_all & (err_cnt == 4'b0) | pre_zcp_wr; | |
1131 | ||
1132 | assign is_ecc_uncor_en = merge_func_cyc0 & ecc_check_err_all | merge_func_cyc & ecc_check_err_all & (err_cnt == 4'b0) | pre_zcp_wr; | |
1133 | assign is_ecc_uncor_in = merge_func_cyc0 & ecc_check_err_all | merge_func_cyc & ecc_check_err_all & (err_cnt == 4'b0) ? ecc_check_err_r1 : 1'b0; | |
1134 | ||
1135 | assign ecc_syndrome = fc_din_reg_dout_r1[71:64]; | |
1136 | ||
1137 | always @(sub_addr_array) | |
1138 | begin | |
1139 | ||
1140 | casex (sub_addr_array) | |
1141 | ||
1142 | 8'bxxxxxxx1: sub_area_addr = 3'b000; | |
1143 | 8'bxxxxxx10: sub_area_addr = 3'b001; | |
1144 | 8'bxxxxx100: sub_area_addr = 3'b010; | |
1145 | 8'bxxxx1000: sub_area_addr = 3'b011; | |
1146 | 8'bxxx10000: sub_area_addr = 3'b100; | |
1147 | 8'bxx100000: sub_area_addr = 3'b101; | |
1148 | 8'bx1000000: sub_area_addr = 3'b110; | |
1149 | 8'b10000000: sub_area_addr = 3'b111; | |
1150 | default: sub_area_addr = 3'b000; | |
1151 | ||
1152 | endcase | |
1153 | ||
1154 | end | |
1155 | ||
1156 | assign fc_err_status_in = {ecc_err, is_ecc_uncor_r, multi_err, err_hash_v1, ecc_sub_addr, ecc_syndrome_r}; //34bits | |
1157 | ||
1158 | dffre #(1) ecc_uncor_err_reg (cclk, reset, ecc_uncor_err_en, ecc_uncor_err_in, ecc_uncor_err); | |
1159 | dffre #(4) err_cnt_reg (cclk, reset, err_cnt_reg_en, err_cnt_in, err_cnt); | |
1160 | dffre #(3) ecc_sub_addr_reg (cclk, reset, ecc_addr_reg_en, sub_area_addr, ecc_sub_addr); | |
1161 | dffre #(8) ecc_ecc_syndrome_reg(cclk, reset, ecc_addr_reg_en, ecc_syndrome, ecc_syndrome_r); | |
1162 | dffre #(1) is_ecc_uncor_reg (cclk, reset, is_ecc_uncor_en, is_ecc_uncor_in, is_ecc_uncor_r); | |
1163 | dffre #(34) fc_err_status_reg (cclk, reset, pre_zcp_wr, fc_err_status_in, fc_err_status); | |
1164 | ||
1165 | ||
1166 | /*************************/ | |
1167 | //Debug port data | |
1168 | /*************************/ | |
1169 | assign merg_bus_cntl_data = {merge_func_cyc7, merg_bus_fc_lookup, merg_bus_rdc_tbl_offset[4:0]}; | |
1170 | assign debug_port_data_in = (debug_data_sel == 3'b000) ? {byte0_r, byte1_r, byte2, byte3_r} : | |
1171 | (debug_data_sel == 3'b001) ? {byte4_r, byte6_r, byte7_r, byte8_r} : | |
1172 | (debug_data_sel == 3'b010) ? {byte9_r, byte10_r, byte11_r, byte12_r} : | |
1173 | (debug_data_sel == 3'b011) ? {byte18_r, byte20_r, byte21_r, byte22_r} : | |
1174 | (debug_data_sel == 3'b100) ? fc_din_reg_dout_r1[63:32] : | |
1175 | (debug_data_sel == 3'b101) ? {fc_din_reg_dout_r1[31:12], merg_bus_cntl_data[6:0], fcram_sm_state[4:0]} : | |
1176 | (debug_data_sel == 3'b110) ? debug_training_vector : | |
1177 | ~fflp_debug_port; | |
1178 | ||
1179 | dffre #(3) debug_data_sel_reg (cclk, reset, fflp_config_reg_wen_pulse_sync, pio_debug_data_sel, debug_data_sel); | |
1180 | dffr #(32) fflp_debug_port_reg (cclk, reset, debug_port_data_in, fflp_debug_port); | |
1181 | ||
1182 | endmodule | |
1183 | ||
1184 |