Initial commit of OpenSPARC T2 design and verification files.

[OpenSPARC-T2-DV] / design / sys / iop / niu / rtl / niu_scam.v

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// OpenSPARC T2 Processor File: niu_scam.v
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/**********************************************************
***********************************************************

    Project         : Niu

    File name       : niu_scam.v

    Module(s) name  : niu_scam

    Parent modules  : niu_scam.v

    Child modules   : niu_scam_lib.v

    Author's name   : George Chu

    Date            : April, 2004

    Description     : 

    Synthesis Notes:

    Modification History:
    Date       Description
    ----       -----------

************************************************************
***********************************************************/

`timescale 1ns/10ps

module niu_scam (
                 data_inp,    cam_compare,
                 pio_wt,      pio_rd,     pio_sel, cam_index, 
                 reset,       clk, 
                 cam_valid,   cam_hit,    cam_haddr, 
                 pio_rd_vld,
                 msk_dat_out);   

input  [199:0] data_inp;      // compare_data/pio_data_input 
input          cam_compare;   // initiate compare operation 
input          pio_wt;        // if 1, pio writes to  cam's data or mask or valid planes. 
input          pio_rd;        // if 1, pio reads from cam's data or mask or valid planes. 
input          pio_sel;       // pio access cam's mask<=1, data<=0 plane 
input    [6:0] cam_index;     // pio access address,             N2: {1'b0,cam_index[6:0]} 
input          reset;
input          clk;
output         cam_valid;     // if 1, cam is ready to accept a new comparison  
output         cam_hit;       // if 1, there is a cam match/hit
output   [6:0] cam_haddr;     // index of a cam match/hit entry, N2: {1'b0,haddr[6:0]} 
output         pio_rd_vld;    // pio_read_out_data valid for the core_clk domain
output [199:0] msk_dat_out;   // pio data read out of cam's mask  or data plane  

wire           cam_valid; 
wire           cam_hit; 
wire     [6:0] cam_haddr;
wire           pio_rd_vld;
wire   [199:0] msk_dat_out;

// ----------- cam's pre-registers --------------------
wire   [199:0] data_inp_d;
wire           cam_compare_d;
wire           pio_wt_d;
wire           pio_rd_d;
wire           pio_sel_d;
wire     [6:0] cam_index_d;

// ----------- cam's match_array ----------------------
wire   [127:0] match_array;

// ----------- cam's control --------------------------
wire           cmp_enc;
wire           cmp_busy;
wire           clr_cam;
wire           c_scam_st;
wire           wt_data;
wire           wt_mask;
wire           rd_data;
wire           rd_mask;
wire           c_pio_rw_st;

// =================================== CAM's data pre_registered ==========================  
  niu_scam_pre niu_scam_pre0 (
                              .data_inp       (data_inp[199:0]),
                              .cam_compare    (cam_compare),
                              .pio_wt         (pio_wt),
                              .pio_rd         (pio_rd),
                              .pio_sel        (pio_sel),
                              .cam_index      (cam_index[6:0]),
                              .reset          (reset),
                              .cam_clk        (clk),
                              .data_inp_d     (data_inp_d[199:0]),
                              .cam_compare_d  (cam_compare_d),
                              .pio_wt_d       (pio_wt_d),
                              .pio_rd_d       (pio_rd_d),
                              .pio_sel_d      (pio_sel_d),
                              .cam_index_d    (cam_index_d[6:0])
                             );

// =================================== CAM's arrays =======================================  
  niu_scam_ary niu_scam_ary0 (
                              .data_inp_d     (data_inp_d[199:0]),
                              .wt_data        (wt_data),
                              .wt_mask        (wt_mask),
                              .rd_data        (rd_data),
                              .rd_mask        (rd_mask),
                              .cam_index_d    (cam_index_d[6:0]),
                              .reset          (reset),
                              .cam_clk        (clk),
                              .match_array    (match_array[127:0]),
                              .msk_dat_out    (msk_dat_out[199:0])
                             );

// =================================== CAM's priority encoder =============================  
  niu_scam_enc niu_scam_enc0 (
                              .match_array    (match_array[127:0]),
                              .cmp_enc        (cmp_enc),
                              .reset          (reset),
                              .cam_clk        (clk),
                              .cam_hit        (cam_hit),
                              .cam_haddr      (cam_haddr[6:0])
                             );

// =================================== CAM's control ======================================  
  niu_scam_ctl niu_scam_ctl0 (
                              .cam_compare_d  (cam_compare_d),
                              .pio_wt_d       (pio_wt_d),
                              .pio_rd_d       (pio_rd_d),
                              .pio_sel_d      (pio_sel_d),
                              .reset          (reset),
                              .cam_clk        (clk),
                              .cmp_enc        (cmp_enc),
                              .cmp_busy       (cmp_busy),
                              .cam_valid      (cam_valid),
                              .clr_cam        (clr_cam),
                              .c_scam_st      (c_scam_st),
                              .wt_data        (wt_data),
                              .wt_mask        (wt_mask),
                              .rd_data        (rd_data),
                              .rd_mask        (rd_mask),
                              .pio_rd_vld     (pio_rd_vld),
                              .c_pio_rw_st    (c_pio_rw_st)
                             );

endmodule