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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: mmu_eem_dp.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | module mmu_eem_dp ( | |
36 | asi_error_inject, | |
37 | asi_error_mask, | |
38 | asi_mbist_ecc_in, | |
39 | asi_mbist_run, | |
40 | ecc_in, | |
41 | ecc_out); | |
42 | wire mbist_run_; | |
43 | wire [7:0] pre_error_inject_; | |
44 | wire [7:0] pre_error_inject; | |
45 | wire [7:0] error_inject; | |
46 | wire [7:0] error_inject_; | |
47 | wire [7:0] ecc_in_; | |
48 | wire [7:0] ecc_mux_0; | |
49 | wire [7:0] ecc_mux_1; | |
50 | wire [7:0] ecc_mux_2; | |
51 | ||
52 | ||
53 | ||
54 | input asi_error_inject; | |
55 | input [7:0] asi_error_mask; | |
56 | ||
57 | input [7:0] asi_mbist_ecc_in; | |
58 | input asi_mbist_run; | |
59 | ||
60 | input [7:0] ecc_in; | |
61 | ||
62 | output [7:0] ecc_out; | |
63 | ||
64 | ||
65 | mmu_eem_dp_inv_macro__stack_8r__width_1 mbist_run_b_inv ( | |
66 | .din (asi_mbist_run ), | |
67 | .dout (mbist_run_ ) | |
68 | ); | |
69 | ||
70 | mmu_eem_dp_nand_macro__ports_2__stack_8r__width_8 pre_error_inject_b_and ( | |
71 | .din0 ({8 {asi_error_inject}} ), | |
72 | .din1 (asi_error_mask [7:0] ), | |
73 | .dout (pre_error_inject_ [7:0] ) | |
74 | ); | |
75 | ||
76 | mmu_eem_dp_inv_macro__stack_8r__width_8 pre_error_inject_inv ( | |
77 | .din (pre_error_inject_ [7:0] ), | |
78 | .dout (pre_error_inject [7:0] ) | |
79 | ); | |
80 | ||
81 | mmu_eem_dp_and_macro__stack_8r__width_8 error_inject_and ( | |
82 | .din0 (pre_error_inject [7:0] ), | |
83 | .din1 ({8 {mbist_run_}} ), | |
84 | .dout (error_inject [7:0] ) | |
85 | ); | |
86 | ||
87 | mmu_eem_dp_and_macro__stack_8r__width_8 error_inject_b_and ( | |
88 | .din0 (pre_error_inject_ [7:0] ), | |
89 | .din1 ({8 {mbist_run_}} ), | |
90 | .dout (error_inject_ [7:0] ) | |
91 | ); | |
92 | ||
93 | mmu_eem_dp_inv_macro__stack_8r__width_8 ecc_in_b_inv ( | |
94 | .din (ecc_in [7:0] ), | |
95 | .dout (ecc_in_ [7:0] ) | |
96 | ); | |
97 | ||
98 | mmu_eem_dp_nand_macro__ports_2__stack_8r__width_8 ecc_mux_0_nand ( | |
99 | .din0 (ecc_in [7:0] ), | |
100 | .din1 (error_inject_ [7:0] ), | |
101 | .dout (ecc_mux_0 [7:0] ) | |
102 | ); | |
103 | ||
104 | mmu_eem_dp_nand_macro__ports_2__stack_8r__width_8 ecc_mux_1_nand ( | |
105 | .din0 (ecc_in_ [7:0] ), | |
106 | .din1 (error_inject [7:0] ), | |
107 | .dout (ecc_mux_1 [7:0] ) | |
108 | ); | |
109 | ||
110 | mmu_eem_dp_nand_macro__ports_2__stack_8r__width_8 ecc_mux_2_nand ( | |
111 | .din0 (asi_mbist_ecc_in [7:0] ), | |
112 | .din1 ({8 {asi_mbist_run}} ), | |
113 | .dout (ecc_mux_2 [7:0] ) | |
114 | ); | |
115 | ||
116 | mmu_eem_dp_nand_macro__ports_3__stack_8r__width_8 ecc_mux_nand ( | |
117 | .din0 (ecc_mux_0 [7:0] ), | |
118 | .din1 (ecc_mux_1 [7:0] ), | |
119 | .din2 (ecc_mux_2 [7:0] ), | |
120 | .dout (ecc_out [7:0] ) | |
121 | ); | |
122 | ||
123 | ||
124 | ||
125 | supply0 vss; // <- port for ground | |
126 | supply1 vdd; // <- port for power | |
127 | ||
128 | endmodule | |
129 | ||
130 | ||
131 | ||
132 | // | |
133 | // invert macro | |
134 | // | |
135 | // | |
136 | ||
137 | ||
138 | ||
139 | ||
140 | ||
141 | module mmu_eem_dp_inv_macro__stack_8r__width_1 ( | |
142 | din, | |
143 | dout); | |
144 | input [0:0] din; | |
145 | output [0:0] dout; | |
146 | ||
147 | ||
148 | ||
149 | ||
150 | ||
151 | ||
152 | inv #(1) d0_0 ( | |
153 | .in(din[0:0]), | |
154 | .out(dout[0:0]) | |
155 | ); | |
156 | ||
157 | ||
158 | ||
159 | ||
160 | ||
161 | ||
162 | ||
163 | ||
164 | ||
165 | endmodule | |
166 | ||
167 | ||
168 | ||
169 | ||
170 | ||
171 | // | |
172 | // nand macro for ports = 2,3,4 | |
173 | // | |
174 | // | |
175 | ||
176 | ||
177 | ||
178 | ||
179 | ||
180 | module mmu_eem_dp_nand_macro__ports_2__stack_8r__width_8 ( | |
181 | din0, | |
182 | din1, | |
183 | dout); | |
184 | input [7:0] din0; | |
185 | input [7:0] din1; | |
186 | output [7:0] dout; | |
187 | ||
188 | ||
189 | ||
190 | ||
191 | ||
192 | ||
193 | nand2 #(8) d0_0 ( | |
194 | .in0(din0[7:0]), | |
195 | .in1(din1[7:0]), | |
196 | .out(dout[7:0]) | |
197 | ); | |
198 | ||
199 | ||
200 | ||
201 | ||
202 | ||
203 | ||
204 | ||
205 | ||
206 | ||
207 | endmodule | |
208 | ||
209 | ||
210 | ||
211 | ||
212 | ||
213 | // | |
214 | // invert macro | |
215 | // | |
216 | // | |
217 | ||
218 | ||
219 | ||
220 | ||
221 | ||
222 | module mmu_eem_dp_inv_macro__stack_8r__width_8 ( | |
223 | din, | |
224 | dout); | |
225 | input [7:0] din; | |
226 | output [7:0] dout; | |
227 | ||
228 | ||
229 | ||
230 | ||
231 | ||
232 | ||
233 | inv #(8) d0_0 ( | |
234 | .in(din[7:0]), | |
235 | .out(dout[7:0]) | |
236 | ); | |
237 | ||
238 | ||
239 | ||
240 | ||
241 | ||
242 | ||
243 | ||
244 | ||
245 | ||
246 | endmodule | |
247 | ||
248 | ||
249 | ||
250 | ||
251 | ||
252 | // | |
253 | // and macro for ports = 2,3,4 | |
254 | // | |
255 | // | |
256 | ||
257 | ||
258 | ||
259 | ||
260 | ||
261 | module mmu_eem_dp_and_macro__stack_8r__width_8 ( | |
262 | din0, | |
263 | din1, | |
264 | dout); | |
265 | input [7:0] din0; | |
266 | input [7:0] din1; | |
267 | output [7:0] dout; | |
268 | ||
269 | ||
270 | ||
271 | ||
272 | ||
273 | ||
274 | and2 #(8) d0_0 ( | |
275 | .in0(din0[7:0]), | |
276 | .in1(din1[7:0]), | |
277 | .out(dout[7:0]) | |
278 | ); | |
279 | ||
280 | ||
281 | ||
282 | ||
283 | ||
284 | ||
285 | ||
286 | ||
287 | ||
288 | endmodule | |
289 | ||
290 | ||
291 | ||
292 | ||
293 | ||
294 | // | |
295 | // nand macro for ports = 2,3,4 | |
296 | // | |
297 | // | |
298 | ||
299 | ||
300 | ||
301 | ||
302 | ||
303 | module mmu_eem_dp_nand_macro__ports_3__stack_8r__width_8 ( | |
304 | din0, | |
305 | din1, | |
306 | din2, | |
307 | dout); | |
308 | input [7:0] din0; | |
309 | input [7:0] din1; | |
310 | input [7:0] din2; | |
311 | output [7:0] dout; | |
312 | ||
313 | ||
314 | ||
315 | ||
316 | ||
317 | ||
318 | nand3 #(8) d0_0 ( | |
319 | .in0(din0[7:0]), | |
320 | .in1(din1[7:0]), | |
321 | .in2(din2[7:0]), | |
322 | .out(dout[7:0]) | |
323 | ); | |
324 | ||
325 | ||
326 | ||
327 | ||
328 | ||
329 | ||
330 | ||
331 | ||
332 | ||
333 | endmodule | |
334 | ||
335 | ||
336 | ||
337 |