projects / OpenSPARC-T2-DV / blame
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| 86530b38 AT |
1 | // ========== Copyright Header Begin ========================================== |
| 2 | // | |
| 3 | // OpenSPARC T2 Processor File: n2_l2d_sp_512kb_cust.v | |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
| 6 | // | |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
| 8 | // | |
| 9 | // This program is free software; you can redistribute it and/or modify | |
| 10 | // it under the terms of the GNU General Public License as published by | |
| 11 | // the Free Software Foundation; version 2 of the License. | |
| 12 | // | |
| 13 | // This program is distributed in the hope that it will be useful, | |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | // GNU General Public License for more details. | |
| 17 | // | |
| 18 | // You should have received a copy of the GNU General Public License | |
| 19 | // along with this program; if not, write to the Free Software | |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 21 | // | |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license | |
| 23 | // choice is available it will apply instead, Sun elects to use only | |
| 24 | // the General Public License version 2 (GPLv2) at this time for any | |
| 25 | // software where a choice of GPL license versions is made | |
| 26 | // available with the language indicating that GPLv2 or any later version | |
| 27 | // may be used, or where a choice of which version of the GPL is applied is | |
| 28 | // otherwise unspecified. | |
| 29 | // | |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
| 32 | // have any questions. | |
| 33 | // | |
| 34 | // ========== Copyright Header End ============================================ | |
| 35 | module n2_l2d_sp_512kb_cust ( | |
| 36 | l2t_l2d_way_sel_c2, | |
| 37 | l2t_l2d_col_offset_c2, | |
| 38 | l2t_l2d_fb_hit_c3, | |
| 39 | l2t_l2d_fbrd_c3, | |
| 40 | l2t_l2d_rd_wr_c2, | |
| 41 | l2t_l2d_set_c2, | |
| 42 | l2t_l2d_word_en_c2, | |
| 43 | l2t_l2d_stdecc_c2, | |
| 44 | l2b_l2d_fbdecc_c4, | |
| 45 | rst_wmr_protect, | |
| 46 | rst_wmr_, | |
| 47 | rst_por_, | |
| 48 | vnw_ary0, | |
| 49 | vnw_ary1, | |
| 50 | l2d_l2b_decc_out_c7, | |
| 51 | l2d_l2t_decc_c6, | |
| 52 | gclk, | |
| 53 | tcu_aclk, | |
| 54 | tcu_bclk, | |
| 55 | tcu_scan_en, | |
| 56 | tcu_pce_ov, | |
| 57 | tcu_ce, | |
| 58 | tcu_clk_stop, | |
| 59 | tcu_se_scancollar_in, | |
| 60 | tcu_se_scancollar_out, | |
| 61 | tcu_array_wr_inhibit, | |
| 62 | tcu_atpg_mode, | |
| 63 | scan_in, | |
| 64 | scan_out, | |
| 65 | l2d_l2b_efc_fuse_data, | |
| 66 | l2b_l2d_fuse_l2d_data_in, | |
| 67 | l2b_l2d_fuse_rid, | |
| 68 | l2b_l2d_fuse_reset, | |
| 69 | l2b_l2d_fuse_l2d_wren, | |
| 70 | l2b_l2d_en_fill_clk_v0, | |
| 71 | l2b_l2d_en_fill_clk_v1, | |
| 72 | l2t_l2d_en_fill_clk_ov, | |
| 73 | l2t_l2d_pwrsav_ov) ; | |
| 74 | wire [155:0] l2d_l2t_decc_c52_mux; | |
| 75 | wire [623:0] l2d_decc_out_c6; | |
| 76 | wire l2clk; | |
| 77 | wire siclk_peri; | |
| 78 | wire soclk_peri; | |
| 79 | wire pce_ov_peri; | |
| 80 | wire pce_peri; | |
| 81 | wire clk_stop_peri; | |
| 82 | wire l2t_l2d_pwrsav_ov_stg; | |
| 83 | wire cache_col_offset_all_c7; | |
| 84 | wire wr_inhibit_peri; | |
| 85 | wire perif_io_scanin; | |
| 86 | wire perif_io_scanout; | |
| 87 | wire scan_collarin_peri; | |
| 88 | wire scan_collarout_peri; | |
| 89 | wire [9:0] l2b_l2d_fuse_l2d_data_in_d; | |
| 90 | wire [6:0] l2b_l2d_fuse_rid_d; | |
| 91 | wire l2b_l2d_fuse_reset_d_l; | |
| 92 | wire l2b_l2d_fuse_l2d_wren_d; | |
| 93 | wire [623:0] l2b_l2d_fbdecc_c5; | |
| 94 | wire [15:0] l2t_l2d_way_sel_c3; | |
| 95 | wire wayerr_c3; | |
| 96 | wire l2t_l2d_rd_wr_c3; | |
| 97 | wire [15:0] cache_way_sel_c3_30; | |
| 98 | wire cache_wayerr_c3_30; | |
| 99 | wire [8:0] cache_set_c3_30; | |
| 100 | wire cache_col_offset_c3_30; | |
| 101 | wire cache_col_offset_c4_l_30; | |
| 102 | wire [1:0] cache_col_offset_c5_30; | |
| 103 | wire cache_rd_wr_c3_30; | |
| 104 | wire cache_readen_c5_30; | |
| 105 | wire [3:0] cache_word_en_c3_30; | |
| 106 | wire tcu_pce_ov_30; | |
| 107 | wire tcu_pce_30; | |
| 108 | wire tcu_clk_stop_30; | |
| 109 | wire se_30; | |
| 110 | wire wee_l_q30; | |
| 111 | wire [623:0] cache_decc_in_c3b_l; | |
| 112 | wire [623:0] cache_decc_out_c5b; | |
| 113 | wire [9:0] fuse_l2d_data_in_030; | |
| 114 | wire [4:0] fuse_l2d_rid_030; | |
| 115 | wire fuse_l2d_wren_030; | |
| 116 | wire fuse_l2d_reset_030_l; | |
| 117 | wire [9:0] fdout_030; | |
| 118 | wire [9:0] fuse_l2d_data_in_130; | |
| 119 | wire [4:0] fuse_l2d_rid_130; | |
| 120 | wire fuse_l2d_wren_130; | |
| 121 | wire fuse_l2d_reset_130_l; | |
| 122 | wire [9:0] fdout_130; | |
| 123 | wire [9:0] fuse_l2d_data_in_031; | |
| 124 | wire [4:0] fuse_l2d_rid_031; | |
| 125 | wire fuse_l2d_wren_031; | |
| 126 | wire fuse_l2d_reset_031_l; | |
| 127 | wire [9:0] fdout_031; | |
| 128 | wire [9:0] fuse_l2d_data_in_131; | |
| 129 | wire [4:0] fuse_l2d_rid_131; | |
| 130 | wire fuse_l2d_wren_131; | |
| 131 | wire fuse_l2d_reset_131_l; | |
| 132 | wire [9:0] fdout_131; | |
| 133 | wire [15:0] cache_way_sel_c3_31; | |
| 134 | wire cache_wayerr_c3_31; | |
| 135 | wire [8:0] cache_set_c3_31; | |
| 136 | wire cache_col_offset_c3_31; | |
| 137 | wire cache_col_offset_c4_l_31; | |
| 138 | wire [1:0] cache_col_offset_c5_31; | |
| 139 | wire cache_rd_wr_c3_31; | |
| 140 | wire cache_readen_c5_31; | |
| 141 | wire [3:0] cache_word_en_c3_31; | |
| 142 | wire tcu_pce_ov_31; | |
| 143 | wire tcu_pce_31; | |
| 144 | wire tcu_clk_stop_31; | |
| 145 | wire se_31; | |
| 146 | wire wee_l_q31; | |
| 147 | wire tstmodclk_30_l; | |
| 148 | wire tstmodclk_31_l; | |
| 149 | wire [15:0] cache_way_sel_c3_10; | |
| 150 | wire cache_wayerr_c3_10; | |
| 151 | wire [8:0] cache_set_c3_10; | |
| 152 | wire cache_col_offset_c3_10; | |
| 153 | wire cache_col_offset_c4_l_10; | |
| 154 | wire [1:0] cache_col_offset_c5_10; | |
| 155 | wire cache_rd_wr_c3_10; | |
| 156 | wire cache_readen_c5_10; | |
| 157 | wire [3:0] cache_word_en_c3_10; | |
| 158 | wire tcu_pce_ov_10; | |
| 159 | wire tcu_pce_10; | |
| 160 | wire tcu_clk_stop_10; | |
| 161 | wire se_10; | |
| 162 | wire wee_l_q10; | |
| 163 | wire [9:0] fuse_l2d_data_in_010; | |
| 164 | wire [4:0] fuse_l2d_rid_010; | |
| 165 | wire fuse_l2d_wren_010; | |
| 166 | wire fuse_l2d_reset_010_l; | |
| 167 | wire [9:0] fdout_010; | |
| 168 | wire [9:0] fuse_l2d_data_in_110; | |
| 169 | wire [4:0] fuse_l2d_rid_110; | |
| 170 | wire fuse_l2d_wren_110; | |
| 171 | wire fuse_l2d_reset_110_l; | |
| 172 | wire [9:0] fdout_110; | |
| 173 | wire [9:0] fuse_l2d_data_in_011; | |
| 174 | wire [4:0] fuse_l2d_rid_011; | |
| 175 | wire fuse_l2d_wren_011; | |
| 176 | wire fuse_l2d_reset_011_l; | |
| 177 | wire [9:0] fdout_011; | |
| 178 | wire [9:0] fuse_l2d_data_in_111; | |
| 179 | wire [4:0] fuse_l2d_rid_111; | |
| 180 | wire fuse_l2d_wren_111; | |
| 181 | wire fuse_l2d_reset_111_l; | |
| 182 | wire [9:0] fdout_111; | |
| 183 | wire [15:0] cache_way_sel_c3_11; | |
| 184 | wire cache_wayerr_c3_11; | |
| 185 | wire [8:0] cache_set_c3_11; | |
| 186 | wire cache_col_offset_c3_11; | |
| 187 | wire cache_col_offset_c4_l_11; | |
| 188 | wire [1:0] cache_col_offset_c5_11; | |
| 189 | wire cache_rd_wr_c3_11; | |
| 190 | wire cache_readen_c5_11; | |
| 191 | wire [3:0] cache_word_en_c3_11; | |
| 192 | wire tcu_pce_ov_11; | |
| 193 | wire tcu_pce_11; | |
| 194 | wire tcu_clk_stop_11; | |
| 195 | wire se_11; | |
| 196 | wire wee_l_q11; | |
| 197 | wire tstmodclk_10_l; | |
| 198 | wire tstmodclk_11_l; | |
| 199 | wire [15:0] cache_way_sel_c3_20; | |
| 200 | wire cache_wayerr_c3_20; | |
| 201 | wire [8:0] cache_set_c3_20; | |
| 202 | wire cache_col_offset_c3_20; | |
| 203 | wire cache_col_offset_c4_l_20; | |
| 204 | wire [1:0] cache_col_offset_c5_20; | |
| 205 | wire cache_rd_wr_c3_20; | |
| 206 | wire cache_readen_c5_20; | |
| 207 | wire [3:0] cache_word_en_c3_20; | |
| 208 | wire tcu_pce_ov_20; | |
| 209 | wire tcu_pce_20; | |
| 210 | wire tcu_clk_stop_20; | |
| 211 | wire se_20; | |
| 212 | wire wee_l_q20; | |
| 213 | wire [9:0] fuse_l2d_data_in_020; | |
| 214 | wire [4:0] fuse_l2d_rid_020; | |
| 215 | wire fuse_l2d_wren_020; | |
| 216 | wire fuse_l2d_reset_020_l; | |
| 217 | wire [9:0] fdout_020; | |
| 218 | wire [9:0] fuse_l2d_data_in_120; | |
| 219 | wire [4:0] fuse_l2d_rid_120; | |
| 220 | wire fuse_l2d_wren_120; | |
| 221 | wire fuse_l2d_reset_120_l; | |
| 222 | wire [9:0] fdout_120; | |
| 223 | wire [9:0] fuse_l2d_data_in_021; | |
| 224 | wire [4:0] fuse_l2d_rid_021; | |
| 225 | wire fuse_l2d_wren_021; | |
| 226 | wire fuse_l2d_reset_021_l; | |
| 227 | wire [9:0] fdout_021; | |
| 228 | wire [9:0] fuse_l2d_data_in_121; | |
| 229 | wire [4:0] fuse_l2d_rid_121; | |
| 230 | wire fuse_l2d_wren_121; | |
| 231 | wire fuse_l2d_reset_121_l; | |
| 232 | wire [9:0] fdout_121; | |
| 233 | wire [15:0] cache_way_sel_c3_21; | |
| 234 | wire cache_wayerr_c3_21; | |
| 235 | wire [8:0] cache_set_c3_21; | |
| 236 | wire cache_col_offset_c3_21; | |
| 237 | wire cache_col_offset_c4_l_21; | |
| 238 | wire [1:0] cache_col_offset_c5_21; | |
| 239 | wire cache_rd_wr_c3_21; | |
| 240 | wire cache_readen_c5_21; | |
| 241 | wire [3:0] cache_word_en_c3_21; | |
| 242 | wire tcu_pce_ov_21; | |
| 243 | wire tcu_pce_21; | |
| 244 | wire tcu_clk_stop_21; | |
| 245 | wire se_21; | |
| 246 | wire wee_l_q21; | |
| 247 | wire tstmodclk_20_l; | |
| 248 | wire tstmodclk_21_l; | |
| 249 | wire [15:0] cache_way_sel_c3_00; | |
| 250 | wire cache_wayerr_c3_00; | |
| 251 | wire [8:0] cache_set_c3_00; | |
| 252 | wire cache_col_offset_c3_00; | |
| 253 | wire cache_col_offset_c4_l_00; | |
| 254 | wire [1:0] cache_col_offset_c5_00; | |
| 255 | wire cache_rd_wr_c3_00; | |
| 256 | wire cache_readen_c5_00; | |
| 257 | wire [3:0] cache_word_en_c3_00; | |
| 258 | wire tcu_pce_ov_00; | |
| 259 | wire tcu_pce_00; | |
| 260 | wire tcu_clk_stop_00; | |
| 261 | wire se_00; | |
| 262 | wire wee_l_q00; | |
| 263 | wire [9:0] fuse_l2d_data_in_000; | |
| 264 | wire [4:0] fuse_l2d_rid_000; | |
| 265 | wire fuse_l2d_wren_000; | |
| 266 | wire fuse_l2d_reset_000_l; | |
| 267 | wire [9:0] fdout_000; | |
| 268 | wire [9:0] fuse_l2d_data_in_100; | |
| 269 | wire [4:0] fuse_l2d_rid_100; | |
| 270 | wire fuse_l2d_wren_100; | |
| 271 | wire fuse_l2d_reset_100_l; | |
| 272 | wire [9:0] fdout_100; | |
| 273 | wire [9:0] fuse_l2d_data_in_001; | |
| 274 | wire [4:0] fuse_l2d_rid_001; | |
| 275 | wire fuse_l2d_wren_001; | |
| 276 | wire fuse_l2d_reset_001_l; | |
| 277 | wire [9:0] fdout_001; | |
| 278 | wire [9:0] fuse_l2d_data_in_101; | |
| 279 | wire [4:0] fuse_l2d_rid_101; | |
| 280 | wire fuse_l2d_wren_101; | |
| 281 | wire fuse_l2d_reset_101_l; | |
| 282 | wire [9:0] fdout_101; | |
| 283 | wire [15:0] cache_way_sel_c3_01; | |
| 284 | wire cache_wayerr_c3_01; | |
| 285 | wire [8:0] cache_set_c3_01; | |
| 286 | wire cache_col_offset_c3_01; | |
| 287 | wire cache_col_offset_c4_l_01; | |
| 288 | wire [1:0] cache_col_offset_c5_01; | |
| 289 | wire cache_rd_wr_c3_01; | |
| 290 | wire cache_readen_c5_01; | |
| 291 | wire [3:0] cache_word_en_c3_01; | |
| 292 | wire tcu_pce_ov_01; | |
| 293 | wire tcu_pce_01; | |
| 294 | wire tcu_clk_stop_01; | |
| 295 | wire se_01; | |
| 296 | wire wee_l_q01; | |
| 297 | wire tstmodclk_00_l; | |
| 298 | wire tstmodclk_01_l; | |
| 299 | wire ctrlio_cust_scanin; | |
| 300 | wire ctrlio_cust_scanout; | |
| 301 | wire array_wr_inhibit; | |
| 302 | wire [9:0] efc_fuse_data; | |
| 303 | wire aclk_clsrhdr; | |
| 304 | wire bclk_clsrhdr; | |
| 305 | wire scan_en_clsrhdr; | |
| 306 | wire rst_wmr_protect_unused; | |
| 307 | wire rst_wmr_unused; | |
| 308 | wire rst_por_unused; | |
| 309 | wire [8:0] l2d_clk_header_unused; | |
| 310 | wire clstr_hdr_scanout; | |
| 311 | wire clstr_hdr_scanin; | |
| 312 | wire cclk; | |
| 313 | ||
| 314 | ||
| 315 | input [15:0] l2t_l2d_way_sel_c2; | |
| 316 | input [3:0] l2t_l2d_col_offset_c2; | |
| 317 | input l2t_l2d_fb_hit_c3; | |
| 318 | input l2t_l2d_fbrd_c3; | |
| 319 | input l2t_l2d_rd_wr_c2; | |
| 320 | input [8:0] l2t_l2d_set_c2; | |
| 321 | input [15:0] l2t_l2d_word_en_c2; | |
| 322 | input [77:0] l2t_l2d_stdecc_c2; | |
| 323 | input [623:0] l2b_l2d_fbdecc_c4; | |
| 324 | input rst_wmr_protect; | |
| 325 | input rst_wmr_; | |
| 326 | input rst_por_; | |
| 327 | //input l2clk; | |
| 328 | input vnw_ary0; | |
| 329 | input vnw_ary1; | |
| 330 | ||
| 331 | ||
| 332 | ||
| 333 | ||
| 334 | output [623:0] l2d_l2b_decc_out_c7; | |
| 335 | output [155:0] l2d_l2t_decc_c6; | |
| 336 | ||
| 337 | input gclk; | |
| 338 | input tcu_aclk; | |
| 339 | input tcu_bclk; | |
| 340 | input tcu_scan_en; | |
| 341 | input tcu_pce_ov; | |
| 342 | input tcu_ce; | |
| 343 | input tcu_clk_stop; | |
| 344 | input tcu_se_scancollar_in; | |
| 345 | input tcu_se_scancollar_out; | |
| 346 | input tcu_array_wr_inhibit; | |
| 347 | input tcu_atpg_mode; | |
| 348 | input scan_in; | |
| 349 | output scan_out; | |
| 350 | ||
| 351 | output [9:0] l2d_l2b_efc_fuse_data; | |
| 352 | input [9:0] l2b_l2d_fuse_l2d_data_in; | |
| 353 | input [6:0] l2b_l2d_fuse_rid; | |
| 354 | input l2b_l2d_fuse_reset; | |
| 355 | input l2b_l2d_fuse_l2d_wren; | |
| 356 | ||
| 357 | ||
| 358 | // power save signals | |
| 359 | ||
| 360 | input l2b_l2d_en_fill_clk_v0; | |
| 361 | input l2b_l2d_en_fill_clk_v1; | |
| 362 | input l2t_l2d_en_fill_clk_ov; | |
| 363 | input l2t_l2d_pwrsav_ov; | |
| 364 | ||
| 365 | ||
| 366 | n2_l2d_perf_io_cust perif_io | |
| 367 | ( | |
| 368 | .l2d_l2t_decc_c52_mux (l2d_l2t_decc_c52_mux[155:0]), | |
| 369 | .l2d_l2t_decc_c6 (l2d_l2t_decc_c6[155:0]), | |
| 370 | .l2d_decc_out_c6 (l2d_decc_out_c6[623:0]), | |
| 371 | .l2b_l2d_fbdecc_c4 (l2b_l2d_fbdecc_c4[623:0]), | |
| 372 | .l2t_l2d_way_sel_c2 (l2t_l2d_way_sel_c2[15:0]), | |
| 373 | .l2clk (l2clk), | |
| 374 | .tcu_aclk (siclk_peri), | |
| 375 | .tcu_bclk (soclk_peri), | |
| 376 | .tcu_pce_ov (pce_ov_peri), | |
| 377 | .tcu_ce (pce_peri), | |
| 378 | .tcu_clk_stop (clk_stop_peri), | |
| 379 | .l2b_l2d_en_fill_clk_v0 (l2b_l2d_en_fill_clk_v0), | |
| 380 | .l2b_l2d_en_fill_clk_v1 (l2b_l2d_en_fill_clk_v1), | |
| 381 | .l2t_l2d_en_fill_clk_ov (l2t_l2d_en_fill_clk_ov), | |
| 382 | .l2t_l2d_pwrsav_ov (l2t_l2d_pwrsav_ov), | |
| 383 | .l2t_l2d_pwrsav_ov_stg (l2t_l2d_pwrsav_ov_stg), | |
| 384 | .cache_col_offset_all_c7 (cache_col_offset_all_c7), | |
| 385 | .wr_inhibit (wr_inhibit_peri), | |
| 386 | .scan_in (perif_io_scanin), | |
| 387 | .scan_out (perif_io_scanout), | |
| 388 | .tcu_se_scancollar_in (scan_collarin_peri), | |
| 389 | .tcu_se_scancollar_out (scan_collarout_peri), | |
| 390 | .l2b_l2d_fuse_l2d_data_in (l2b_l2d_fuse_l2d_data_in[9:0]), | |
| 391 | .l2b_l2d_fuse_rid (l2b_l2d_fuse_rid[6:0]), | |
| 392 | .l2b_l2d_fuse_reset (l2b_l2d_fuse_reset), | |
| 393 | .l2b_l2d_fuse_l2d_wren (l2b_l2d_fuse_l2d_wren), | |
| 394 | .l2d_l2b_efc_fuse_data (l2d_l2b_efc_fuse_data[9:0]), | |
| 395 | .l2b_l2d_fuse_l2d_data_in_d (l2b_l2d_fuse_l2d_data_in_d[9:0]), | |
| 396 | .l2b_l2d_fuse_rid_d (l2b_l2d_fuse_rid_d[6:0]), | |
| 397 | .l2b_l2d_fuse_reset_d_l (l2b_l2d_fuse_reset_d_l), | |
| 398 | .l2b_l2d_fuse_l2d_wren_d (l2b_l2d_fuse_l2d_wren_d), | |
| 399 | .l2d_l2b_decc_out_c7 (l2d_l2b_decc_out_c7[623:0]), | |
| 400 | .l2b_l2d_fbdecc_c5 (l2b_l2d_fbdecc_c5[623:0]), | |
| 401 | .l2t_l2d_way_sel_c3 (l2t_l2d_way_sel_c3[15:0]), | |
| 402 | .wayerr_c3 (wayerr_c3), | |
| 403 | .l2t_l2d_rd_wr_c2 (l2t_l2d_rd_wr_c2), | |
| 404 | .l2t_l2d_rd_wr_c3 (l2t_l2d_rd_wr_c3), | |
| 405 | .efc_fuse_data(efc_fuse_data[9:0]) | |
| 406 | ); | |
| 407 | ||
| 408 | ||
| 409 | n2_l2d_quad_cust quad_top_left // 31 to left and 30 to right | |
| 410 | ( | |
| 411 | .waysel_c3_0 (cache_way_sel_c3_30[15:0]), | |
| 412 | .wayerr_c3_0 (cache_wayerr_c3_30), | |
| 413 | .set_c3_0 (cache_set_c3_30[8:0]), | |
| 414 | .coloff_c3_0 (cache_col_offset_c3_30), | |
| 415 | .coloff_c4_l_0 (cache_col_offset_c4_l_30), | |
| 416 | .coloff_c5_0 (cache_col_offset_c5_30[1:0]), | |
| 417 | .rd_wr_c3_0 (cache_rd_wr_c3_30), | |
| 418 | .readen_c5_0 (cache_readen_c5_30), | |
| 419 | .worden_c3_0 (cache_word_en_c3_30[3:0]), | |
| 420 | .l2clk (l2clk), | |
| 421 | .tcu_pce_ov_0 (tcu_pce_ov_30), | |
| 422 | .pce_0 (tcu_pce_30), | |
| 423 | .tcu_clk_stop_0 (tcu_clk_stop_30), | |
| 424 | .se_0 (se_30), | |
| 425 | .wee_l_0 (wee_l_q30), //NEW | |
| 426 | .wrdlo0_b_l (cache_decc_in_c3b_l[233:195]), // write | |
| 427 | .wrdhi0_b_l (cache_decc_in_c3b_l[311:273]), | |
| 428 | .wrdlo1_b_l (cache_decc_in_c3b_l[545:507]), | |
| 429 | .wrdhi1_b_l (cache_decc_in_c3b_l[623:585]), | |
| 430 | .ldoutlo0_b (cache_decc_out_c5b[233:195]), // read | |
| 431 | .ldouthi0_b (cache_decc_out_c5b[311:273]), | |
| 432 | .ldoutlo1_b (cache_decc_out_c5b[545:507]), | |
| 433 | .ldouthi1_b (cache_decc_out_c5b[623:585]), | |
| 434 | ///////// | |
| 435 | .fuse_l2d_data_in_00 (fuse_l2d_data_in_030[9:0] ), | |
| 436 | .fuse_l2d_rid_00 (fuse_l2d_rid_030[4:0] ), | |
| 437 | .fuse_l2d_wren_00 (fuse_l2d_wren_030 ), | |
| 438 | .fuse_l2d_reset_00_l (fuse_l2d_reset_030_l ), | |
| 439 | .fdout_00 (fdout_030[9:0] ), | |
| 440 | .fuse_l2d_data_in_01 (fuse_l2d_data_in_130[9:0] ), | |
| 441 | .fuse_l2d_rid_01 (fuse_l2d_rid_130[4:0] ), | |
| 442 | .fuse_l2d_wren_01 (fuse_l2d_wren_130 ), | |
| 443 | .fuse_l2d_reset_01_l (fuse_l2d_reset_130_l ), | |
| 444 | .fdout_01 (fdout_130[9:0] ), | |
| 445 | .fuse_l2d_data_in_10 (fuse_l2d_data_in_031[9:0] ), | |
| 446 | .fuse_l2d_rid_10 (fuse_l2d_rid_031[4:0] ), | |
| 447 | .fuse_l2d_wren_10 (fuse_l2d_wren_031 ), | |
| 448 | .fuse_l2d_reset_10_l (fuse_l2d_reset_031_l ), | |
| 449 | .fdout_10 (fdout_031[9:0] ), | |
| 450 | .fuse_l2d_data_in_11 (fuse_l2d_data_in_131[9:0] ), | |
| 451 | .fuse_l2d_rid_11 (fuse_l2d_rid_131[4:0] ), | |
| 452 | .fuse_l2d_wren_11 (fuse_l2d_wren_131 ), | |
| 453 | .fuse_l2d_reset_11_l (fuse_l2d_reset_131_l ), | |
| 454 | .fdout_11 (fdout_131[9:0] ), | |
| 455 | ///////// | |
| 456 | .waysel_c3_1 (cache_way_sel_c3_31[15:0]), | |
| 457 | .wayerr_c3_1 (cache_wayerr_c3_31), | |
| 458 | .set_c3_1 (cache_set_c3_31[8:0]), | |
| 459 | .coloff_c3_1 (cache_col_offset_c3_31), | |
| 460 | .coloff_c4_l_1 (cache_col_offset_c4_l_31), | |
| 461 | .coloff_c5_1 (cache_col_offset_c5_31[1:0]), | |
| 462 | .rd_wr_c3_1 (cache_rd_wr_c3_31), | |
| 463 | .readen_c5_1 (cache_readen_c5_31), | |
| 464 | .worden_c3_1 (cache_word_en_c3_31[3:0]), | |
| 465 | .tcu_pce_ov_1 (tcu_pce_ov_31), | |
| 466 | .pce_1 (tcu_pce_31), | |
| 467 | .tcu_clk_stop_1 (tcu_clk_stop_31), | |
| 468 | .se_1 (se_31), | |
| 469 | .wee_l_1 (wee_l_q31), //NEW | |
| 470 | .tstmodclk_l_0 (tstmodclk_30_l), | |
| 471 | .tstmodclk_l_1 (tstmodclk_31_l), | |
| 472 | .vnw_ary (vnw_ary1) | |
| 473 | ); | |
| 474 | ||
| 475 | ||
| 476 | ||
| 477 | n2_l2d_quad_cust quad_top_right | |
| 478 | ( | |
| 479 | .waysel_c3_0 (cache_way_sel_c3_10[15:0]), | |
| 480 | .wayerr_c3_0 (cache_wayerr_c3_10), | |
| 481 | .set_c3_0 (cache_set_c3_10[8:0]), | |
| 482 | .coloff_c3_0 (cache_col_offset_c3_10), | |
| 483 | .coloff_c4_l_0 (cache_col_offset_c4_l_10), | |
| 484 | .coloff_c5_0 (cache_col_offset_c5_10[1:0]), | |
| 485 | .rd_wr_c3_0 (cache_rd_wr_c3_10), | |
| 486 | .readen_c5_0 (cache_readen_c5_10), | |
| 487 | .worden_c3_0 (cache_word_en_c3_10[3:0]), | |
| 488 | .l2clk (l2clk), | |
| 489 | .tcu_pce_ov_0 (tcu_pce_ov_10), | |
| 490 | .pce_0 (tcu_pce_10), | |
| 491 | .tcu_clk_stop_0 (tcu_clk_stop_10), | |
| 492 | .se_0 (se_10), | |
| 493 | .wee_l_0 (wee_l_q10), //NEW | |
| 494 | .wrdlo0_b_l (cache_decc_in_c3b_l[194:156]), | |
| 495 | .wrdhi0_b_l (cache_decc_in_c3b_l[272:234]), | |
| 496 | .wrdlo1_b_l (cache_decc_in_c3b_l[506:468]), | |
| 497 | .wrdhi1_b_l (cache_decc_in_c3b_l[584:546]), | |
| 498 | .ldoutlo0_b (cache_decc_out_c5b[194:156]), | |
| 499 | .ldouthi0_b (cache_decc_out_c5b[272:234]), | |
| 500 | .ldoutlo1_b (cache_decc_out_c5b[506:468]), | |
| 501 | .ldouthi1_b (cache_decc_out_c5b[584:546]), | |
| 502 | //////////// | |
| 503 | .fuse_l2d_data_in_00 (fuse_l2d_data_in_010[9:0] ), | |
| 504 | .fuse_l2d_rid_00 (fuse_l2d_rid_010[4:0] ), | |
| 505 | .fuse_l2d_wren_00 (fuse_l2d_wren_010 ), | |
| 506 | .fuse_l2d_reset_00_l (fuse_l2d_reset_010_l ), | |
| 507 | .fdout_00 (fdout_010[9:0] ), | |
| 508 | .fuse_l2d_data_in_01 (fuse_l2d_data_in_110[9:0] ), | |
| 509 | .fuse_l2d_rid_01 (fuse_l2d_rid_110[4:0] ), | |
| 510 | .fuse_l2d_wren_01 (fuse_l2d_wren_110 ), | |
| 511 | .fuse_l2d_reset_01_l (fuse_l2d_reset_110_l ), | |
| 512 | .fdout_01 (fdout_110[9:0] ), | |
| 513 | .fuse_l2d_data_in_10 (fuse_l2d_data_in_011[9:0] ), | |
| 514 | .fuse_l2d_rid_10 (fuse_l2d_rid_011[4:0] ), | |
| 515 | .fuse_l2d_wren_10 (fuse_l2d_wren_011 ), | |
| 516 | .fuse_l2d_reset_10_l (fuse_l2d_reset_011_l ), | |
| 517 | .fdout_10 (fdout_011[9:0] ), | |
| 518 | .fuse_l2d_data_in_11 (fuse_l2d_data_in_111[9:0] ), | |
| 519 | .fuse_l2d_rid_11 (fuse_l2d_rid_111[4:0] ), | |
| 520 | .fuse_l2d_wren_11 (fuse_l2d_wren_111 ), | |
| 521 | .fuse_l2d_reset_11_l (fuse_l2d_reset_111_l ), | |
| 522 | .fdout_11 (fdout_111[9:0] ), | |
| 523 | //////////// | |
| 524 | .waysel_c3_1 (cache_way_sel_c3_11[15:0]), | |
| 525 | .wayerr_c3_1 (cache_wayerr_c3_11), | |
| 526 | .set_c3_1 (cache_set_c3_11[8:0]), | |
| 527 | .coloff_c3_1 (cache_col_offset_c3_11), | |
| 528 | .coloff_c4_l_1 (cache_col_offset_c4_l_11), | |
| 529 | .coloff_c5_1 (cache_col_offset_c5_11[1:0]), | |
| 530 | .rd_wr_c3_1 (cache_rd_wr_c3_11), | |
| 531 | .readen_c5_1 (cache_readen_c5_11), | |
| 532 | .worden_c3_1 (cache_word_en_c3_11[3:0]), | |
| 533 | .tcu_pce_ov_1 (tcu_pce_ov_11), | |
| 534 | .pce_1 (tcu_pce_11), | |
| 535 | .tcu_clk_stop_1 (tcu_clk_stop_11), | |
| 536 | .se_1 (se_11), | |
| 537 | .wee_l_1 (wee_l_q11), //NEW | |
| 538 | .tstmodclk_l_0 (tstmodclk_10_l), | |
| 539 | .tstmodclk_l_1 (tstmodclk_11_l), | |
| 540 | .vnw_ary (vnw_ary1) | |
| 541 | ); | |
| 542 | ||
| 543 | ||
| 544 | ||
| 545 | n2_l2d_quad_cust quad_bot_left | |
| 546 | ( | |
| 547 | .waysel_c3_0 (cache_way_sel_c3_20[15:0]), | |
| 548 | .wayerr_c3_0 (cache_wayerr_c3_20), | |
| 549 | .set_c3_0 (cache_set_c3_20[8:0]), | |
| 550 | .coloff_c3_0 (cache_col_offset_c3_20), | |
| 551 | .coloff_c4_l_0 (cache_col_offset_c4_l_20), | |
| 552 | .coloff_c5_0 (cache_col_offset_c5_20[1:0]), | |
| 553 | .rd_wr_c3_0 (cache_rd_wr_c3_20), | |
| 554 | .readen_c5_0 (cache_readen_c5_20), | |
| 555 | .worden_c3_0 (cache_word_en_c3_20[3:0]), | |
| 556 | .l2clk (l2clk), | |
| 557 | .tcu_pce_ov_0 (tcu_pce_ov_20), | |
| 558 | .pce_0 (tcu_pce_20), | |
| 559 | .tcu_clk_stop_0 (tcu_clk_stop_20), | |
| 560 | .se_0 (se_20), | |
| 561 | .wee_l_0 (wee_l_q20), //NEW | |
| 562 | .wrdlo0_b_l (cache_decc_in_c3b_l[77 :39 ]), | |
| 563 | .wrdhi0_b_l (cache_decc_in_c3b_l[155:117]), | |
| 564 | .wrdlo1_b_l (cache_decc_in_c3b_l[389:351]), | |
| 565 | .wrdhi1_b_l (cache_decc_in_c3b_l[467:429]), | |
| 566 | .ldoutlo0_b (cache_decc_out_c5b[77 :39 ]), | |
| 567 | .ldouthi0_b (cache_decc_out_c5b[155:117]), | |
| 568 | .ldoutlo1_b (cache_decc_out_c5b[389:351]), | |
| 569 | .ldouthi1_b (cache_decc_out_c5b[467:429]), | |
| 570 | //////////// | |
| 571 | .fuse_l2d_data_in_00 (fuse_l2d_data_in_020[9:0] ), | |
| 572 | .fuse_l2d_rid_00 (fuse_l2d_rid_020[4:0] ), | |
| 573 | .fuse_l2d_wren_00 (fuse_l2d_wren_020 ), | |
| 574 | .fuse_l2d_reset_00_l (fuse_l2d_reset_020_l ), | |
| 575 | .fdout_00 (fdout_020[9:0] ), | |
| 576 | .fuse_l2d_data_in_01 (fuse_l2d_data_in_120[9:0] ), | |
| 577 | .fuse_l2d_rid_01 (fuse_l2d_rid_120[4:0] ), | |
| 578 | .fuse_l2d_wren_01 (fuse_l2d_wren_120 ), | |
| 579 | .fuse_l2d_reset_01_l (fuse_l2d_reset_120_l ), | |
| 580 | .fdout_01 (fdout_120[9:0] ), | |
| 581 | .fuse_l2d_data_in_10 (fuse_l2d_data_in_021[9:0] ), | |
| 582 | .fuse_l2d_rid_10 (fuse_l2d_rid_021[4:0] ), | |
| 583 | .fuse_l2d_wren_10 (fuse_l2d_wren_021 ), | |
| 584 | .fuse_l2d_reset_10_l (fuse_l2d_reset_021_l ), | |
| 585 | .fdout_10 (fdout_021[9:0] ), | |
| 586 | .fuse_l2d_data_in_11 (fuse_l2d_data_in_121[9:0] ), | |
| 587 | .fuse_l2d_rid_11 (fuse_l2d_rid_121[4:0] ), | |
| 588 | .fuse_l2d_wren_11 (fuse_l2d_wren_121 ), | |
| 589 | .fuse_l2d_reset_11_l (fuse_l2d_reset_121_l ), | |
| 590 | .fdout_11 (fdout_121[9:0] ), | |
| 591 | //////////// | |
| 592 | ||
| 593 | .waysel_c3_1 (cache_way_sel_c3_21[15:0]), | |
| 594 | .wayerr_c3_1 (cache_wayerr_c3_21), | |
| 595 | .set_c3_1 (cache_set_c3_21[8:0]), | |
| 596 | .coloff_c3_1 (cache_col_offset_c3_21), | |
| 597 | .coloff_c4_l_1 (cache_col_offset_c4_l_21), | |
| 598 | .coloff_c5_1 (cache_col_offset_c5_21[1:0]), | |
| 599 | .rd_wr_c3_1 (cache_rd_wr_c3_21), | |
| 600 | .readen_c5_1 (cache_readen_c5_21), | |
| 601 | .worden_c3_1 (cache_word_en_c3_21[3:0]), | |
| 602 | .tcu_pce_ov_1 (tcu_pce_ov_21), | |
| 603 | .pce_1 (tcu_pce_21), | |
| 604 | .tcu_clk_stop_1 (tcu_clk_stop_21), | |
| 605 | .se_1 (se_21), | |
| 606 | .wee_l_1 (wee_l_q21), //NEW | |
| 607 | .tstmodclk_l_0 (tstmodclk_20_l), | |
| 608 | .tstmodclk_l_1 (tstmodclk_21_l), | |
| 609 | .vnw_ary (vnw_ary0) | |
| 610 | ); | |
| 611 | ||
| 612 | ||
| 613 | ||
| 614 | n2_l2d_quad_cust quad_bot_right | |
| 615 | ( | |
| 616 | .waysel_c3_0 (cache_way_sel_c3_00[15:0]), | |
| 617 | .wayerr_c3_0 (cache_wayerr_c3_00), | |
| 618 | .set_c3_0 (cache_set_c3_00[8:0]), | |
| 619 | .coloff_c3_0 (cache_col_offset_c3_00), | |
| 620 | .coloff_c4_l_0 (cache_col_offset_c4_l_00), | |
| 621 | .coloff_c5_0 (cache_col_offset_c5_00[1:0]), | |
| 622 | .rd_wr_c3_0 (cache_rd_wr_c3_00), | |
| 623 | .readen_c5_0 (cache_readen_c5_00), | |
| 624 | .worden_c3_0 (cache_word_en_c3_00[3:0]), | |
| 625 | .l2clk (l2clk), | |
| 626 | .tcu_pce_ov_0 (tcu_pce_ov_00), | |
| 627 | .pce_0 (tcu_pce_00), | |
| 628 | .tcu_clk_stop_0 (tcu_clk_stop_00), | |
| 629 | .se_0 (se_00), | |
| 630 | .wee_l_0 (wee_l_q00), //NEW | |
| 631 | .wrdlo0_b_l (cache_decc_in_c3b_l[38 : 0 ]), | |
| 632 | .wrdhi0_b_l (cache_decc_in_c3b_l[116: 78]), | |
| 633 | .wrdlo1_b_l (cache_decc_in_c3b_l[350:312]), | |
| 634 | .wrdhi1_b_l (cache_decc_in_c3b_l[428:390]), | |
| 635 | .ldoutlo0_b (cache_decc_out_c5b[38 : 0 ]), | |
| 636 | .ldouthi0_b (cache_decc_out_c5b[116: 78]), | |
| 637 | .ldoutlo1_b (cache_decc_out_c5b[350:312]), | |
| 638 | .ldouthi1_b (cache_decc_out_c5b[428:390]), | |
| 639 | //////////// | |
| 640 | .fuse_l2d_data_in_00 (fuse_l2d_data_in_000[9:0] ), | |
| 641 | .fuse_l2d_rid_00 (fuse_l2d_rid_000[4:0] ), | |
| 642 | .fuse_l2d_wren_00 (fuse_l2d_wren_000 ), | |
| 643 | .fuse_l2d_reset_00_l (fuse_l2d_reset_000_l ), | |
| 644 | .fdout_00 (fdout_000[9:0] ), | |
| 645 | .fuse_l2d_data_in_01 (fuse_l2d_data_in_100[9:0] ), | |
| 646 | .fuse_l2d_rid_01 (fuse_l2d_rid_100[4:0] ), | |
| 647 | .fuse_l2d_wren_01 (fuse_l2d_wren_100 ), | |
| 648 | .fuse_l2d_reset_01_l (fuse_l2d_reset_100_l ), | |
| 649 | .fdout_01 (fdout_100[9:0] ), | |
| 650 | .fuse_l2d_data_in_10 (fuse_l2d_data_in_001[9:0] ), | |
| 651 | .fuse_l2d_rid_10 (fuse_l2d_rid_001[4:0] ), | |
| 652 | .fuse_l2d_wren_10 (fuse_l2d_wren_001 ), | |
| 653 | .fuse_l2d_reset_10_l (fuse_l2d_reset_001_l ), | |
| 654 | .fdout_10 (fdout_001[9:0] ), | |
| 655 | .fuse_l2d_data_in_11 (fuse_l2d_data_in_101[9:0] ), | |
| 656 | .fuse_l2d_rid_11 (fuse_l2d_rid_101[4:0] ), | |
| 657 | .fuse_l2d_wren_11 (fuse_l2d_wren_101 ), | |
| 658 | .fuse_l2d_reset_11_l (fuse_l2d_reset_101_l ), | |
| 659 | .fdout_11 (fdout_101[9:0] ), | |
| 660 | //////////// | |
| 661 | .waysel_c3_1 (cache_way_sel_c3_01[15:0]), | |
| 662 | .wayerr_c3_1 (cache_wayerr_c3_01), | |
| 663 | .set_c3_1 (cache_set_c3_01[8:0]), | |
| 664 | .coloff_c3_1 (cache_col_offset_c3_01), | |
| 665 | .coloff_c4_l_1 (cache_col_offset_c4_l_01), | |
| 666 | .coloff_c5_1 (cache_col_offset_c5_01[1:0]), | |
| 667 | .rd_wr_c3_1 (cache_rd_wr_c3_01), | |
| 668 | .readen_c5_1 (cache_readen_c5_01), | |
| 669 | .worden_c3_1 (cache_word_en_c3_01[3:0]), | |
| 670 | .tcu_pce_ov_1 (tcu_pce_ov_01), | |
| 671 | .pce_1 (tcu_pce_01), | |
| 672 | .tcu_clk_stop_1 (tcu_clk_stop_01), | |
| 673 | .se_1 (se_01), | |
| 674 | .wee_l_1 (wee_l_q01), //NEW | |
| 675 | .tstmodclk_l_0 (tstmodclk_00_l), | |
| 676 | .tstmodclk_l_1 (tstmodclk_01_l), | |
| 677 | .vnw_ary (vnw_ary0) | |
| 678 | ); | |
| 679 | ||
| 680 | ||
| 681 | n2_l2d_ctrlio_cust ctr | |
| 682 | ( | |
| 683 | .l2t_l2d_word_en_c2 (l2t_l2d_word_en_c2[15:0]), | |
| 684 | .l2b_l2d_fbdecc_c5 (l2b_l2d_fbdecc_c5[623:0]), | |
| 685 | .l2t_l2d_fbrd_c3 (l2t_l2d_fbrd_c3), | |
| 686 | .l2t_l2d_col_offset_c2 (l2t_l2d_col_offset_c2[3:0]), | |
| 687 | .l2t_l2d_set_c2 (l2t_l2d_set_c2[8:0]), | |
| 688 | .l2t_l2d_rd_wr_c3 (l2t_l2d_rd_wr_c3), | |
| 689 | .l2t_l2d_way_sel_c3 (l2t_l2d_way_sel_c3[15:0]), | |
| 690 | .l2t_l2d_fb_hit_c3 (l2t_l2d_fb_hit_c3), | |
| 691 | .scan_in(ctrlio_cust_scanin), | |
| 692 | .scan_out(ctrlio_cust_scanout), | |
| 693 | .l2clk (l2clk), | |
| 694 | .tcu_aclk (tcu_aclk), | |
| 695 | .tcu_bclk (tcu_bclk), | |
| 696 | .tcu_scan_en (tcu_scan_en), | |
| 697 | .tcu_pce_ov (tcu_pce_ov), | |
| 698 | .tcu_ce (tcu_ce), | |
| 699 | .tcu_clk_stop (1'b0), | |
| 700 | .tcu_se_scancollar_in (tcu_se_scancollar_in), | |
| 701 | .tcu_se_scancollar_out (tcu_se_scancollar_out), | |
| 702 | .l2t_l2d_stdecc_c2 (l2t_l2d_stdecc_c2[77:0]), | |
| 703 | .l2d_decc_out_c6 (l2d_decc_out_c6[623:0]), | |
| 704 | .cache_decc_in_c3b_l (cache_decc_in_c3b_l[623:0]), | |
| 705 | .cache_decc_out_c5b (cache_decc_out_c5b[623:0]), | |
| 706 | .l2d_l2t_decc_c52_mux (l2d_l2t_decc_c52_mux[155:0]), | |
| 707 | .cache_way_sel_c3_00 (cache_way_sel_c3_00[15:0]), | |
| 708 | .cache_way_sel_c3_01 (cache_way_sel_c3_01[15:0]), | |
| 709 | .cache_way_sel_c3_10 (cache_way_sel_c3_10[15:0]), | |
| 710 | .cache_way_sel_c3_11 (cache_way_sel_c3_11[15:0]), | |
| 711 | .cache_way_sel_c3_20 (cache_way_sel_c3_20[15:0]), | |
| 712 | .cache_way_sel_c3_21 (cache_way_sel_c3_21[15:0]), | |
| 713 | .cache_way_sel_c3_30 (cache_way_sel_c3_30[15:0]), | |
| 714 | .cache_way_sel_c3_31 (cache_way_sel_c3_31[15:0]), | |
| 715 | .cache_wayerr_c3_00 (cache_wayerr_c3_00), | |
| 716 | .cache_wayerr_c3_01 (cache_wayerr_c3_01), | |
| 717 | .cache_wayerr_c3_10 (cache_wayerr_c3_10), | |
| 718 | .cache_wayerr_c3_11 (cache_wayerr_c3_11), | |
| 719 | .cache_wayerr_c3_20 (cache_wayerr_c3_20), | |
| 720 | .cache_wayerr_c3_21 (cache_wayerr_c3_21), | |
| 721 | .cache_wayerr_c3_30 (cache_wayerr_c3_30), | |
| 722 | .cache_wayerr_c3_31 (cache_wayerr_c3_31), | |
| 723 | .cache_set_c3_00 (cache_set_c3_00[8:0]), | |
| 724 | .cache_set_c3_01 (cache_set_c3_01[8:0]), | |
| 725 | .cache_set_c3_10 (cache_set_c3_10[8:0]), | |
| 726 | .cache_set_c3_11 (cache_set_c3_11[8:0]), | |
| 727 | .cache_set_c3_20 (cache_set_c3_20[8:0]), | |
| 728 | .cache_set_c3_21 (cache_set_c3_21[8:0]), | |
| 729 | .cache_set_c3_30 (cache_set_c3_30[8:0]), | |
| 730 | .cache_set_c3_31 (cache_set_c3_31[8:0]), | |
| 731 | .cache_col_offset_c3_00 (cache_col_offset_c3_00), | |
| 732 | .cache_col_offset_c3_01 (cache_col_offset_c3_01), | |
| 733 | .cache_col_offset_c3_10 (cache_col_offset_c3_10), | |
| 734 | .cache_col_offset_c3_11 (cache_col_offset_c3_11), | |
| 735 | .cache_col_offset_c3_20 (cache_col_offset_c3_20), | |
| 736 | .cache_col_offset_c3_21 (cache_col_offset_c3_21), | |
| 737 | .cache_col_offset_c3_30 (cache_col_offset_c3_30), | |
| 738 | .cache_col_offset_c3_31 (cache_col_offset_c3_31), | |
| 739 | .cache_col_offset_c4_l_00 (cache_col_offset_c4_l_00), | |
| 740 | .cache_col_offset_c4_l_01 (cache_col_offset_c4_l_01), | |
| 741 | .cache_col_offset_c4_l_10 (cache_col_offset_c4_l_10), | |
| 742 | .cache_col_offset_c4_l_11 (cache_col_offset_c4_l_11), | |
| 743 | .cache_col_offset_c4_l_20 (cache_col_offset_c4_l_20), | |
| 744 | .cache_col_offset_c4_l_21 (cache_col_offset_c4_l_21), | |
| 745 | .cache_col_offset_c4_l_30 (cache_col_offset_c4_l_30), | |
| 746 | .cache_col_offset_c4_l_31 (cache_col_offset_c4_l_31), | |
| 747 | .cache_col_offset_c5_00 (cache_col_offset_c5_00[1:0]), | |
| 748 | .cache_col_offset_c5_01 (cache_col_offset_c5_01[1:0]), | |
| 749 | .cache_col_offset_c5_10 (cache_col_offset_c5_10[1:0]), | |
| 750 | .cache_col_offset_c5_11 (cache_col_offset_c5_11[1:0]), | |
| 751 | .cache_col_offset_c5_20 (cache_col_offset_c5_20[1:0]), | |
| 752 | .cache_col_offset_c5_21 (cache_col_offset_c5_21[1:0]), | |
| 753 | .cache_col_offset_c5_30 (cache_col_offset_c5_30[1:0]), | |
| 754 | .cache_col_offset_c5_31 (cache_col_offset_c5_31[1:0]), | |
| 755 | .cache_rd_wr_c3_00 (cache_rd_wr_c3_00), | |
| 756 | .cache_rd_wr_c3_01 (cache_rd_wr_c3_01), | |
| 757 | .cache_rd_wr_c3_10 (cache_rd_wr_c3_10), | |
| 758 | .cache_rd_wr_c3_11 (cache_rd_wr_c3_11), | |
| 759 | .cache_rd_wr_c3_20 (cache_rd_wr_c3_20), | |
| 760 | .cache_rd_wr_c3_21 (cache_rd_wr_c3_21), | |
| 761 | .cache_rd_wr_c3_30 (cache_rd_wr_c3_30), | |
| 762 | .cache_rd_wr_c3_31 (cache_rd_wr_c3_31), | |
| 763 | .cache_readen_c5_00 (cache_readen_c5_00), | |
| 764 | .cache_readen_c5_01 (cache_readen_c5_01), | |
| 765 | .cache_readen_c5_10 (cache_readen_c5_10), | |
| 766 | .cache_readen_c5_11 (cache_readen_c5_11), | |
| 767 | .cache_readen_c5_20 (cache_readen_c5_20), | |
| 768 | .cache_readen_c5_21 (cache_readen_c5_21), | |
| 769 | .cache_readen_c5_30 (cache_readen_c5_30), | |
| 770 | .cache_readen_c5_31 (cache_readen_c5_31), | |
| 771 | .cache_word_en_c3_00 (cache_word_en_c3_00[3:0]), | |
| 772 | .cache_word_en_c3_01 (cache_word_en_c3_01[3:0]), | |
| 773 | .cache_word_en_c3_10 (cache_word_en_c3_10[3:0]), | |
| 774 | .cache_word_en_c3_11 (cache_word_en_c3_11[3:0]), | |
| 775 | .cache_word_en_c3_20 (cache_word_en_c3_20[3:0]), | |
| 776 | .cache_word_en_c3_21 (cache_word_en_c3_21[3:0]), | |
| 777 | .cache_word_en_c3_30 (cache_word_en_c3_30[3:0]), | |
| 778 | .cache_word_en_c3_31 (cache_word_en_c3_31[3:0]), | |
| 779 | .tcu_pce_ov_00 (tcu_pce_ov_00), | |
| 780 | .tcu_pce_ov_01 (tcu_pce_ov_01), | |
| 781 | .tcu_pce_ov_10 (tcu_pce_ov_10), | |
| 782 | .tcu_pce_ov_11 (tcu_pce_ov_11), | |
| 783 | .tcu_pce_ov_20 (tcu_pce_ov_20), | |
| 784 | .tcu_pce_ov_21 (tcu_pce_ov_21), | |
| 785 | .tcu_pce_ov_30 (tcu_pce_ov_30), | |
| 786 | .tcu_pce_ov_31 (tcu_pce_ov_31), | |
| 787 | .tcu_pce_00 (tcu_pce_00), | |
| 788 | .tcu_pce_01 (tcu_pce_01), | |
| 789 | .tcu_pce_10 (tcu_pce_10), | |
| 790 | .tcu_pce_11 (tcu_pce_11), | |
| 791 | .tcu_pce_20 (tcu_pce_20), | |
| 792 | .tcu_pce_21 (tcu_pce_21), | |
| 793 | .tcu_pce_30 (tcu_pce_30), | |
| 794 | .tcu_pce_31 (tcu_pce_31), | |
| 795 | .se_00 (se_00), | |
| 796 | .se_01 (se_01), | |
| 797 | .se_10 (se_10), | |
| 798 | .se_11 (se_11), | |
| 799 | .se_20 (se_20), | |
| 800 | .se_21 (se_21), | |
| 801 | .se_30 (se_30), | |
| 802 | .se_31 (se_31), | |
| 803 | .tcu_clk_stop_00 (tcu_clk_stop_00), | |
| 804 | .tcu_clk_stop_01 (tcu_clk_stop_01), | |
| 805 | .tcu_clk_stop_10 (tcu_clk_stop_10), | |
| 806 | .tcu_clk_stop_11 (tcu_clk_stop_11), | |
| 807 | .tcu_clk_stop_20 (tcu_clk_stop_20), | |
| 808 | .tcu_clk_stop_21 (tcu_clk_stop_21), | |
| 809 | .tcu_clk_stop_30 (tcu_clk_stop_30), | |
| 810 | .tcu_clk_stop_31 (tcu_clk_stop_31), | |
| 811 | .array_wr_inhibit (array_wr_inhibit), | |
| 812 | .wayerr_c3 (wayerr_c3), | |
| 813 | .siclk_peri (siclk_peri), | |
| 814 | .soclk_peri (soclk_peri), | |
| 815 | .pce_ov_peri (pce_ov_peri), | |
| 816 | .pce_peri (pce_peri), | |
| 817 | .scan_collarin_peri (scan_collarin_peri), | |
| 818 | .scan_collarout_peri (scan_collarout_peri), | |
| 819 | .wr_inhibit_peri (wr_inhibit_peri), | |
| 820 | .clk_stop_peri (clk_stop_peri), | |
| 821 | .wee_l_q00 (wee_l_q00), | |
| 822 | .wee_l_q01 (wee_l_q01), | |
| 823 | .wee_l_q10 (wee_l_q10), | |
| 824 | .wee_l_q11 (wee_l_q11), | |
| 825 | .wee_l_q20 (wee_l_q20), | |
| 826 | .wee_l_q21 (wee_l_q21), | |
| 827 | .wee_l_q30 (wee_l_q30), | |
| 828 | .wee_l_q31 (wee_l_q31), | |
| 829 | // Redudancy | |
| 830 | .l2b_l2d_fuse_l2d_data_in_d (l2b_l2d_fuse_l2d_data_in_d[9:0]), | |
| 831 | .l2b_l2d_fuse_rid_d (l2b_l2d_fuse_rid_d[6:0]), | |
| 832 | .l2b_l2d_fuse_reset_l (l2b_l2d_fuse_reset_d_l), | |
| 833 | .l2b_l2d_fuse_l2d_wren_d (l2b_l2d_fuse_l2d_wren_d), | |
| 834 | .efc_fuse_data (efc_fuse_data[9:0]), | |
| 835 | .fuse_l2d_data_in_131 (fuse_l2d_data_in_131[9:0]), | |
| 836 | .fuse_l2d_rid_131 (fuse_l2d_rid_131[4:0]), | |
| 837 | .fuse_l2d_wren_131 (fuse_l2d_wren_131), | |
| 838 | .fuse_l2d_reset_131_l (fuse_l2d_reset_131_l), | |
| 839 | .fdout_131 (fdout_131[9:0]), | |
| 840 | .fuse_l2d_data_in_031 (fuse_l2d_data_in_031[9:0] ), | |
| 841 | .fuse_l2d_rid_031 (fuse_l2d_rid_031[4:0] ), | |
| 842 | .fuse_l2d_wren_031 (fuse_l2d_wren_031 ), | |
| 843 | .fuse_l2d_reset_031_l (fuse_l2d_reset_031_l ), | |
| 844 | .fdout_031 (fdout_031 [9:0] ), | |
| 845 | .fuse_l2d_data_in_130 (fuse_l2d_data_in_130 [9:0] ), | |
| 846 | .fuse_l2d_rid_130 (fuse_l2d_rid_130 [4:0] ), | |
| 847 | .fuse_l2d_wren_130 (fuse_l2d_wren_130 ), | |
| 848 | .fuse_l2d_reset_130_l (fuse_l2d_reset_130_l ), | |
| 849 | .fdout_130 (fdout_130 [9:0] ), | |
| 850 | .fuse_l2d_data_in_030 (fuse_l2d_data_in_030 [9:0] ), | |
| 851 | .fuse_l2d_rid_030 (fuse_l2d_rid_030 [4:0] ), | |
| 852 | .fuse_l2d_wren_030 (fuse_l2d_wren_030 ), | |
| 853 | .fuse_l2d_reset_030_l (fuse_l2d_reset_030_l ), | |
| 854 | .fdout_030 (fdout_030 [9:0] ), | |
| 855 | .fuse_l2d_data_in_111 (fuse_l2d_data_in_111 [9:0] ), | |
| 856 | .fuse_l2d_rid_111 (fuse_l2d_rid_111 [4:0] ), | |
| 857 | .fuse_l2d_wren_111 (fuse_l2d_wren_111 ), | |
| 858 | .fuse_l2d_reset_111_l (fuse_l2d_reset_111_l ), | |
| 859 | .fdout_111 (fdout_111 [9:0] ), | |
| 860 | .fuse_l2d_data_in_011 (fuse_l2d_data_in_011 [9:0] ), | |
| 861 | .fuse_l2d_rid_011 (fuse_l2d_rid_011 [4:0] ), | |
| 862 | .fuse_l2d_wren_011 (fuse_l2d_wren_011 ), | |
| 863 | .fuse_l2d_reset_011_l (fuse_l2d_reset_011_l ), | |
| 864 | .fdout_011 (fdout_011 [9:0] ), | |
| 865 | .fuse_l2d_data_in_110 (fuse_l2d_data_in_110 [9:0] ), | |
| 866 | .fuse_l2d_rid_110 (fuse_l2d_rid_110 [4:0] ), | |
| 867 | .fuse_l2d_wren_110 (fuse_l2d_wren_110 ), | |
| 868 | .fuse_l2d_reset_110_l (fuse_l2d_reset_110_l ), | |
| 869 | .fdout_110 (fdout_110 [9:0] ), | |
| 870 | .fuse_l2d_data_in_010 (fuse_l2d_data_in_010 [9:0] ), | |
| 871 | .fuse_l2d_rid_010 (fuse_l2d_rid_010 [4:0] ), | |
| 872 | .fuse_l2d_wren_010 (fuse_l2d_wren_010 ), | |
| 873 | .fuse_l2d_reset_010_l (fuse_l2d_reset_010_l ), | |
| 874 | .fdout_010 (fdout_010 [9:0] ), | |
| 875 | .fuse_l2d_data_in_121 (fuse_l2d_data_in_121 [9:0] ), | |
| 876 | .fuse_l2d_rid_121 (fuse_l2d_rid_121 [4:0] ), | |
| 877 | .fuse_l2d_wren_121 (fuse_l2d_wren_121 ), | |
| 878 | .fuse_l2d_reset_121_l (fuse_l2d_reset_121_l ), | |
| 879 | .fdout_121 (fdout_121 [9:0] ), | |
| 880 | .fuse_l2d_data_in_021 (fuse_l2d_data_in_021 [9:0] ), | |
| 881 | .fuse_l2d_rid_021 (fuse_l2d_rid_021 [4:0] ), | |
| 882 | .fuse_l2d_wren_021 (fuse_l2d_wren_021 ), | |
| 883 | .fuse_l2d_reset_021_l (fuse_l2d_reset_021_l ), | |
| 884 | .fdout_021 (fdout_021 [9:0] ), | |
| 885 | .fuse_l2d_data_in_120 (fuse_l2d_data_in_120 [9:0] ), | |
| 886 | .fuse_l2d_rid_120 (fuse_l2d_rid_120 [4:0] ), | |
| 887 | .fuse_l2d_wren_120 (fuse_l2d_wren_120 ), | |
| 888 | .fuse_l2d_reset_120_l (fuse_l2d_reset_120_l ), | |
| 889 | .fdout_120 (fdout_120 [9:0] ), | |
| 890 | .fuse_l2d_data_in_020 (fuse_l2d_data_in_020 [9:0] ), | |
| 891 | .fuse_l2d_rid_020 (fuse_l2d_rid_020 [4:0] ), | |
| 892 | .fuse_l2d_wren_020 (fuse_l2d_wren_020 ), | |
| 893 | .fuse_l2d_reset_020_l (fuse_l2d_reset_020_l ), | |
| 894 | .fdout_020 (fdout_020 [9:0] ), | |
| 895 | .fuse_l2d_data_in_101 (fuse_l2d_data_in_101 [9:0] ), | |
| 896 | .fuse_l2d_rid_101 (fuse_l2d_rid_101 [4:0] ), | |
| 897 | .fuse_l2d_wren_101 (fuse_l2d_wren_101 ), | |
| 898 | .fuse_l2d_reset_101_l (fuse_l2d_reset_101_l ), | |
| 899 | .fdout_101 (fdout_101 [9:0] ), | |
| 900 | .fuse_l2d_data_in_001 (fuse_l2d_data_in_001 [9:0] ), | |
| 901 | .fuse_l2d_rid_001 (fuse_l2d_rid_001 [4:0] ), | |
| 902 | .fuse_l2d_wren_001 (fuse_l2d_wren_001 ), | |
| 903 | .fuse_l2d_reset_001_l (fuse_l2d_reset_001_l ), | |
| 904 | .fdout_001 (fdout_001 [9:0] ), | |
| 905 | .fuse_l2d_data_in_100 (fuse_l2d_data_in_100 [9:0] ), | |
| 906 | .fuse_l2d_rid_100 (fuse_l2d_rid_100 [4:0] ), | |
| 907 | .fuse_l2d_wren_100 (fuse_l2d_wren_100 ), | |
| 908 | .fuse_l2d_reset_100_l (fuse_l2d_reset_100_l ), | |
| 909 | .fdout_100 (fdout_100 [9:0] ), | |
| 910 | .fuse_l2d_data_in_000 (fuse_l2d_data_in_000 [9:0] ), | |
| 911 | .fuse_l2d_rid_000 (fuse_l2d_rid_000 [4:0] ), | |
| 912 | .fuse_l2d_wren_000 (fuse_l2d_wren_000 ), | |
| 913 | .fuse_l2d_reset_000_l (fuse_l2d_reset_000_l ), | |
| 914 | .fdout_000 (fdout_000 [9:0] ), | |
| 915 | .l2t_l2d_pwrsav_ov_stg (l2t_l2d_pwrsav_ov_stg), //NEW | |
| 916 | .cache_col_offset_all_c7 (cache_col_offset_all_c7), //NEW | |
| 917 | .delout00 (tstmodclk_00_l), | |
| 918 | .delout01 (tstmodclk_01_l), | |
| 919 | .delout10 (tstmodclk_10_l), | |
| 920 | .delout11 (tstmodclk_11_l), | |
| 921 | .delout20 (tstmodclk_20_l), | |
| 922 | .delout21 (tstmodclk_21_l), | |
| 923 | .delout30 (tstmodclk_30_l), | |
| 924 | .delout31 (tstmodclk_31_l), | |
| 925 | .aclk (aclk_clsrhdr), | |
| 926 | .bclk (bclk_clsrhdr), | |
| 927 | .scan_en_clsrhdr (scan_en_clsrhdr) | |
| 928 | ); | |
| 929 | ||
| 930 | // For vlint | |
| 931 | assign rst_wmr_protect_unused = rst_wmr_protect; | |
| 932 | assign rst_wmr_unused = rst_wmr_; | |
| 933 | assign rst_por_unused = rst_por_; | |
| 934 | ||
| 935 | n2_clk_clstr_hdr_cust l2d_clk_header | |
| 936 | ( | |
| 937 | .tcu_wr_inhibit (tcu_array_wr_inhibit ), | |
| 938 | .array_wr_inhibit (array_wr_inhibit), | |
| 939 | .tcu_atpg_mode (tcu_atpg_mode ), | |
| 940 | .l2clk (l2clk ), | |
| 941 | .aclk (l2d_clk_header_unused[0]), | |
| 942 | .bclk (l2d_clk_header_unused[1]), | |
| 943 | .scan_out (clstr_hdr_scanout ), | |
| 944 | .pce_ov (l2d_clk_header_unused[2]), | |
| 945 | .wmr_protect (l2d_clk_header_unused[3]), | |
| 946 | .wmr_ (l2d_clk_header_unused[4]), | |
| 947 | .por_ (l2d_clk_header_unused[5]), | |
| 948 | .cmp_slow_sync_en (l2d_clk_header_unused[6]), | |
| 949 | .slow_cmp_sync_en (l2d_clk_header_unused[7]), | |
| 950 | .tcu_clk_stop (tcu_clk_stop ), | |
| 951 | .tcu_pce_ov (1'b0 ), | |
| 952 | .cluster_arst_l (1'b1 ), | |
| 953 | .aclk_wmr (l2d_clk_header_unused[8]), | |
| 954 | .rst_wmr_protect (1'b0 ), | |
| 955 | .rst_wmr_ (1'b0 ), | |
| 956 | .rst_por_ (1'b0 ), | |
| 957 | .ccu_cmp_slow_sync_en (1'b0 ), | |
| 958 | .ccu_slow_cmp_sync_en (1'b0 ), | |
| 959 | .tcu_div_bypass (1'b0 ), | |
| 960 | .ccu_div_ph (1'b1 ), | |
| 961 | .cluster_div_en (1'b0 ), | |
| 962 | .gclk (gclk ), | |
| 963 | .tcu_aclk (aclk_clsrhdr ), | |
| 964 | .tcu_bclk (bclk_clsrhdr ), | |
| 965 | .scan_en (scan_en_clsrhdr ), | |
| 966 | .scan_in (clstr_hdr_scanin ), | |
| 967 | .cclk(cclk) | |
| 968 | ); | |
| 969 | ||
| 970 | n2_clk_l2d_cmp_cust l2d_pregrid_drv_top | |
| 971 | ( | |
| 972 | .cclk (cclk), | |
| 973 | .l2clk (l2clk) | |
| 974 | ); | |
| 975 | n2_clk_l2d_cmp_cust l2d_pregrid_drv_bot | |
| 976 | ( | |
| 977 | .cclk (cclk), | |
| 978 | .l2clk (l2clk) | |
| 979 | ); | |
| 980 | ||
| 981 | // fixscan start: | |
| 982 | assign perif_io_scanin = scan_in ; | |
| 983 | assign clstr_hdr_scanin = perif_io_scanout ; | |
| 984 | assign ctrlio_cust_scanin = clstr_hdr_scanout ; | |
| 985 | assign scan_out = ctrlio_cust_scanout ; | |
| 986 | // fixscan end: | |
| 987 | endmodule | |
| 988 | ||
| 989 | ||
| 990 | ||
| 991 | ||
| 992 | module n2_l2d_perf_io_cust ( | |
| 993 | l2d_decc_out_c6, | |
| 994 | l2b_l2d_fbdecc_c4, | |
| 995 | l2t_l2d_way_sel_c2, | |
| 996 | l2clk, | |
| 997 | tcu_aclk, | |
| 998 | tcu_bclk, | |
| 999 | tcu_pce_ov, | |
| 1000 | tcu_clk_stop, | |
| 1001 | tcu_ce, | |
| 1002 | tcu_se_scancollar_in, | |
| 1003 | tcu_se_scancollar_out, | |
| 1004 | scan_in, | |
| 1005 | wr_inhibit, | |
| 1006 | l2d_l2t_decc_c52_mux, | |
| 1007 | l2b_l2d_en_fill_clk_v0, | |
| 1008 | l2b_l2d_en_fill_clk_v1, | |
| 1009 | l2t_l2d_en_fill_clk_ov, | |
| 1010 | cache_col_offset_all_c7, | |
| 1011 | l2t_l2d_pwrsav_ov, | |
| 1012 | l2t_l2d_rd_wr_c2, | |
| 1013 | l2t_l2d_pwrsav_ov_stg, | |
| 1014 | scan_out, | |
| 1015 | l2t_l2d_rd_wr_c3, | |
| 1016 | l2b_l2d_fuse_l2d_data_in, | |
| 1017 | l2b_l2d_fuse_rid, | |
| 1018 | l2b_l2d_fuse_reset, | |
| 1019 | l2b_l2d_fuse_l2d_wren, | |
| 1020 | l2d_l2b_efc_fuse_data, | |
| 1021 | l2b_l2d_fuse_l2d_data_in_d, | |
| 1022 | l2b_l2d_fuse_rid_d, | |
| 1023 | l2b_l2d_fuse_reset_d_l, | |
| 1024 | l2b_l2d_fuse_l2d_wren_d, | |
| 1025 | efc_fuse_data, | |
| 1026 | l2d_l2b_decc_out_c7, | |
| 1027 | l2b_l2d_fbdecc_c5, | |
| 1028 | l2t_l2d_way_sel_c3, | |
| 1029 | l2d_l2t_decc_c6, | |
| 1030 | wayerr_c3); | |
| 1031 | wire stop; | |
| 1032 | wire l1clk_in; | |
| 1033 | wire l1clk_out; | |
| 1034 | wire fill_pce0; | |
| 1035 | wire l1clk_fill0; | |
| 1036 | wire fill_pce1; | |
| 1037 | wire l1clk_fill1; | |
| 1038 | wire cache_col_offset_all_c7_or_l2t_l2d_pwrsav_ov_stg; | |
| 1039 | wire l1clk_decc_c7; | |
| 1040 | wire [0:0] ff_l2t_l2d_rd_wr_c3_scanin; | |
| 1041 | wire [0:0] ff_l2t_l2d_rd_wr_c3_scanout; | |
| 1042 | wire [0:0] ff_fill_clk_en_ov_stg_scanin; | |
| 1043 | wire [0:0] ff_fill_clk_en_ov_stg_scanout; | |
| 1044 | wire fill_clk_en_ov_stg; | |
| 1045 | wire [0:0] ff_pwrsav_ov_stg_scanin; | |
| 1046 | wire [0:0] ff_pwrsav_ov_stg_scanout; | |
| 1047 | wire [155:0] ff_l2d_l2t_decc_c6_scanin; | |
| 1048 | wire [155:0] ff_l2d_l2t_decc_c6_scanout; | |
| 1049 | wire [38:0] ff_l2b_l2d_fbdecc_c5_1_scanin; | |
| 1050 | wire [38:0] ff_l2b_l2d_fbdecc_c5_1_scanout; | |
| 1051 | wire [38:0] ff_l2b_l2d_fbdecc_c5_2_scanin; | |
| 1052 | wire [38:0] ff_l2b_l2d_fbdecc_c5_2_scanout; | |
| 1053 | wire [38:0] ff_l2b_l2d_fbdecc_c5_3_scanin; | |
| 1054 | wire [38:0] ff_l2b_l2d_fbdecc_c5_3_scanout; | |
| 1055 | wire [38:0] ff_l2b_l2d_fbdecc_c5_4_scanin; | |
| 1056 | wire [38:0] ff_l2b_l2d_fbdecc_c5_4_scanout; | |
| 1057 | wire [38:0] ff_l2b_l2d_fbdecc_c5_5_scanin; | |
| 1058 | wire [38:0] ff_l2b_l2d_fbdecc_c5_5_scanout; | |
| 1059 | wire [38:0] ff_l2b_l2d_fbdecc_c5_6_scanin; | |
| 1060 | wire [38:0] ff_l2b_l2d_fbdecc_c5_6_scanout; | |
| 1061 | wire [38:0] ff_l2b_l2d_fbdecc_c5_7_scanin; | |
| 1062 | wire [38:0] ff_l2b_l2d_fbdecc_c5_7_scanout; | |
| 1063 | wire [38:0] ff_l2b_l2d_fbdecc_c5_8_scanin; | |
| 1064 | wire [38:0] ff_l2b_l2d_fbdecc_c5_8_scanout; | |
| 1065 | wire [38:0] ff_l2b_l2d_fbdecc_c5_9_scanin; | |
| 1066 | wire [38:0] ff_l2b_l2d_fbdecc_c5_9_scanout; | |
| 1067 | wire [38:0] ff_l2b_l2d_fbdecc_c5_10_scanin; | |
| 1068 | wire [38:0] ff_l2b_l2d_fbdecc_c5_10_scanout; | |
| 1069 | wire [38:0] ff_l2b_l2d_fbdecc_c5_11_scanin; | |
| 1070 | wire [38:0] ff_l2b_l2d_fbdecc_c5_11_scanout; | |
| 1071 | wire [38:0] ff_l2b_l2d_fbdecc_c5_12_scanin; | |
| 1072 | wire [38:0] ff_l2b_l2d_fbdecc_c5_12_scanout; | |
| 1073 | wire [38:0] ff_l2b_l2d_fbdecc_c5_13_scanin; | |
| 1074 | wire [38:0] ff_l2b_l2d_fbdecc_c5_13_scanout; | |
| 1075 | wire [38:0] ff_l2b_l2d_fbdecc_c5_14_scanin; | |
| 1076 | wire [38:0] ff_l2b_l2d_fbdecc_c5_14_scanout; | |
| 1077 | wire [38:0] ff_l2b_l2d_fbdecc_c5_15_scanin; | |
| 1078 | wire [38:0] ff_l2b_l2d_fbdecc_c5_15_scanout; | |
| 1079 | wire [38:0] ff_l2b_l2d_fbdecc_c5_16_scanin; | |
| 1080 | wire [38:0] ff_l2b_l2d_fbdecc_c5_16_scanout; | |
| 1081 | wire [38:0] ff_l2d_l2b_decc_out_c7_1_scanin; | |
| 1082 | wire [38:0] ff_l2d_l2b_decc_out_c7_1_scanout; | |
| 1083 | wire [38:0] ff_l2d_l2b_decc_out_c7_2_scanin; | |
| 1084 | wire [38:0] ff_l2d_l2b_decc_out_c7_2_scanout; | |
| 1085 | wire [38:0] ff_l2d_l2b_decc_out_c7_3_scanin; | |
| 1086 | wire [38:0] ff_l2d_l2b_decc_out_c7_3_scanout; | |
| 1087 | wire [38:0] ff_l2d_l2b_decc_out_c7_4_scanin; | |
| 1088 | wire [38:0] ff_l2d_l2b_decc_out_c7_4_scanout; | |
| 1089 | wire [38:0] ff_l2d_l2b_decc_out_c7_5_scanin; | |
| 1090 | wire [38:0] ff_l2d_l2b_decc_out_c7_5_scanout; | |
| 1091 | wire [38:0] ff_l2d_l2b_decc_out_c7_6_scanin; | |
| 1092 | wire [38:0] ff_l2d_l2b_decc_out_c7_6_scanout; | |
| 1093 | wire [38:0] ff_l2d_l2b_decc_out_c7_7_scanin; | |
| 1094 | wire [38:0] ff_l2d_l2b_decc_out_c7_7_scanout; | |
| 1095 | wire [38:0] ff_l2d_l2b_decc_out_c7_8_scanin; | |
| 1096 | wire [38:0] ff_l2d_l2b_decc_out_c7_8_scanout; | |
| 1097 | wire [38:0] ff_l2d_l2b_decc_out_c7_9_scanin; | |
| 1098 | wire [38:0] ff_l2d_l2b_decc_out_c7_9_scanout; | |
| 1099 | wire [38:0] ff_l2d_l2b_decc_out_c7_10_scanin; | |
| 1100 | wire [38:0] ff_l2d_l2b_decc_out_c7_10_scanout; | |
| 1101 | wire [38:0] ff_l2d_l2b_decc_out_c7_11_scanin; | |
| 1102 | wire [38:0] ff_l2d_l2b_decc_out_c7_11_scanout; | |
| 1103 | wire [38:0] ff_l2d_l2b_decc_out_c7_12_scanin; | |
| 1104 | wire [38:0] ff_l2d_l2b_decc_out_c7_12_scanout; | |
| 1105 | wire [38:0] ff_l2d_l2b_decc_out_c7_13_scanin; | |
| 1106 | wire [38:0] ff_l2d_l2b_decc_out_c7_13_scanout; | |
| 1107 | wire [38:0] ff_l2d_l2b_decc_out_c7_14_scanin; | |
| 1108 | wire [38:0] ff_l2d_l2b_decc_out_c7_14_scanout; | |
| 1109 | wire [38:0] ff_l2d_l2b_decc_out_c7_15_scanin; | |
| 1110 | wire [38:0] ff_l2d_l2b_decc_out_c7_15_scanout; | |
| 1111 | wire [38:0] ff_l2d_l2b_decc_out_c7_16_scanin; | |
| 1112 | wire [38:0] ff_l2d_l2b_decc_out_c7_16_scanout; | |
| 1113 | wire [15:0] ff_l2t_l2d_way_sel_c3_scanin; | |
| 1114 | wire [15:0] ff_l2t_l2d_way_sel_c3_scanout; | |
| 1115 | wire [9:0] ff_l2b_l2d_fuse_l2d_data_in_scanin; | |
| 1116 | wire [9:0] ff_l2b_l2d_fuse_l2d_data_in_scanout; | |
| 1117 | wire [9:0] ff_l2d_l2b_efc_fuse_data_scanin; | |
| 1118 | wire [9:0] ff_l2d_l2b_efc_fuse_data_scanout; | |
| 1119 | wire [6:0] ff_l2b_l2d_fuse_rid_d_scanin; | |
| 1120 | wire [6:0] ff_l2b_l2d_fuse_rid_d_scanout; | |
| 1121 | wire [0:0] ff_l2b_l2d_fuse_wren_d_scanin; | |
| 1122 | wire [0:0] ff_l2b_l2d_fuse_wren_d_scanout; | |
| 1123 | wire l2b_l2d_fuse_l2d_wren_stg; | |
| 1124 | wire l2b_l2d_fuse_reset_stg_n; | |
| 1125 | wire wr_inhibit_n; | |
| 1126 | wire l2b_l2d_fuse_reset_stg; | |
| 1127 | wire [0:0] ff_l2b_l2d_fuse_reset_d_scanin; | |
| 1128 | wire [0:0] ff_l2b_l2d_fuse_reset_d_scanout; | |
| 1129 | ||
| 1130 | ||
| 1131 | input [623:0] l2d_decc_out_c6; | |
| 1132 | input [623:0] l2b_l2d_fbdecc_c4; | |
| 1133 | input [15:0] l2t_l2d_way_sel_c2; | |
| 1134 | input l2clk; | |
| 1135 | input tcu_aclk; | |
| 1136 | input tcu_bclk; | |
| 1137 | input tcu_pce_ov; | |
| 1138 | input tcu_clk_stop; | |
| 1139 | input tcu_ce; | |
| 1140 | input tcu_se_scancollar_in; | |
| 1141 | input tcu_se_scancollar_out; | |
| 1142 | input scan_in; | |
| 1143 | input wr_inhibit; | |
| 1144 | input [155:0] l2d_l2t_decc_c52_mux; | |
| 1145 | input l2b_l2d_en_fill_clk_v0; | |
| 1146 | input l2b_l2d_en_fill_clk_v1; | |
| 1147 | input l2t_l2d_en_fill_clk_ov; | |
| 1148 | input cache_col_offset_all_c7; | |
| 1149 | input l2t_l2d_pwrsav_ov; | |
| 1150 | input l2t_l2d_rd_wr_c2; | |
| 1151 | output l2t_l2d_pwrsav_ov_stg; | |
| 1152 | output scan_out; | |
| 1153 | output l2t_l2d_rd_wr_c3; | |
| 1154 | // From outside world | |
| 1155 | input [9:0] l2b_l2d_fuse_l2d_data_in; | |
| 1156 | input [6:0] l2b_l2d_fuse_rid; | |
| 1157 | input l2b_l2d_fuse_reset; | |
| 1158 | input l2b_l2d_fuse_l2d_wren; | |
| 1159 | output [9:0] l2d_l2b_efc_fuse_data; | |
| 1160 | ||
| 1161 | // to outside world | |
| 1162 | output [9:0] l2b_l2d_fuse_l2d_data_in_d; | |
| 1163 | output [6:0] l2b_l2d_fuse_rid_d; | |
| 1164 | output l2b_l2d_fuse_reset_d_l; | |
| 1165 | output l2b_l2d_fuse_l2d_wren_d; | |
| 1166 | input [9:0] efc_fuse_data; | |
| 1167 | ||
| 1168 | // Regular outputs | |
| 1169 | output [623:0] l2d_l2b_decc_out_c7; | |
| 1170 | output [623:0] l2b_l2d_fbdecc_c5; | |
| 1171 | output [15:0] l2t_l2d_way_sel_c3; | |
| 1172 | output [155:0] l2d_l2t_decc_c6; | |
| 1173 | output wayerr_c3; | |
| 1174 | ////////////////////////////////////////////////////////////////////////////// | |
| 1175 | ||
| 1176 | wire pce_ov; | |
| 1177 | wire siclk; | |
| 1178 | wire soclk; | |
| 1179 | wire scan_out; | |
| 1180 | ||
| 1181 | assign stop = tcu_clk_stop; | |
| 1182 | assign siclk = tcu_aclk; | |
| 1183 | assign soclk = tcu_bclk; | |
| 1184 | assign pce_ov = tcu_pce_ov; | |
| 1185 | ||
| 1186 | ////////////////////////////////////////////////////////////////////////////// | |
| 1187 | // wire [623:0] l2d_decc_out_c6; | |
| 1188 | ||
| 1189 | ||
| 1190 | ||
| 1191 | n2_l2d_sp_512kb_cust_l1clkhdr_ctl_macro l1_clk_in_hdr ( | |
| 1192 | .l2clk (l2clk), | |
| 1193 | .se (tcu_se_scancollar_in), | |
| 1194 | .l1en (tcu_ce), | |
| 1195 | .pce_ov (pce_ov), | |
| 1196 | .stop (stop), | |
| 1197 | .l1clk (l1clk_in) | |
| 1198 | ); | |
| 1199 | ||
| 1200 | n2_l2d_sp_512kb_cust_l1clkhdr_ctl_macro l1_clk_out_hdr ( | |
| 1201 | .l2clk (l2clk), | |
| 1202 | .se (tcu_se_scancollar_out), | |
| 1203 | .l1en (tcu_ce), | |
| 1204 | .pce_ov (pce_ov), | |
| 1205 | .stop (stop), | |
| 1206 | .l1clk (l1clk_out) | |
| 1207 | ); | |
| 1208 | ||
| 1209 | n2_l2d_sp_512kb_cust_l1clkhdr_ctl_macro l1_clk_fill0_hdr ( | |
| 1210 | .l2clk (l2clk), | |
| 1211 | .se (tcu_se_scancollar_in), | |
| 1212 | .l1en (fill_pce0), | |
| 1213 | .pce_ov (pce_ov), | |
| 1214 | .stop (stop), | |
| 1215 | .l1clk (l1clk_fill0) | |
| 1216 | ); | |
| 1217 | ||
| 1218 | n2_l2d_sp_512kb_cust_l1clkhdr_ctl_macro l1_clk_fill1_hdr ( | |
| 1219 | .l2clk (l2clk), | |
| 1220 | .se (tcu_se_scancollar_in), | |
| 1221 | .l1en (fill_pce1), | |
| 1222 | .pce_ov (pce_ov), | |
| 1223 | .stop (stop), | |
| 1224 | .l1clk (l1clk_fill1) | |
| 1225 | ); | |
| 1226 | ||
| 1227 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_slice_col_offset_all_pwrsv | |
| 1228 | ( | |
| 1229 | .dout (cache_col_offset_all_c7_or_l2t_l2d_pwrsav_ov_stg), | |
| 1230 | .din0 (l2t_l2d_pwrsav_ov_stg), | |
| 1231 | .din1 (cache_col_offset_all_c7) | |
| 1232 | ); | |
| 1233 | ||
| 1234 | ||
| 1235 | n2_l2d_sp_512kb_cust_l1clkhdr_ctl_macro l1_clk_decc_c7_hdr ( | |
| 1236 | .l2clk (l2clk), | |
| 1237 | .se (tcu_se_scancollar_out), | |
| 1238 | // .l1en (cache_col_offset_all_c7 | l2t_l2d_pwrsav_ov_stg), | |
| 1239 | .l1en (cache_col_offset_all_c7_or_l2t_l2d_pwrsav_ov_stg), | |
| 1240 | .pce_ov (pce_ov), | |
| 1241 | .stop (stop), | |
| 1242 | .l1clk (l1clk_decc_c7) | |
| 1243 | ); | |
| 1244 | ||
| 1245 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_1 ff_l2t_l2d_rd_wr_c3 | |
| 1246 | ( | |
| 1247 | .scan_in(ff_l2t_l2d_rd_wr_c3_scanin[0:0]), | |
| 1248 | .scan_out(ff_l2t_l2d_rd_wr_c3_scanout[0:0]), | |
| 1249 | .dout (l2t_l2d_rd_wr_c3), | |
| 1250 | .din (l2t_l2d_rd_wr_c2), | |
| 1251 | .l1clk (l1clk_in), | |
| 1252 | .siclk(siclk), | |
| 1253 | .soclk(soclk) | |
| 1254 | ); | |
| 1255 | ||
| 1256 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_1 ff_fill_clk_en_ov_stg | |
| 1257 | ( | |
| 1258 | .scan_in(ff_fill_clk_en_ov_stg_scanin[0:0]), | |
| 1259 | .scan_out(ff_fill_clk_en_ov_stg_scanout[0:0]), | |
| 1260 | .dout (fill_clk_en_ov_stg), | |
| 1261 | .din (l2t_l2d_en_fill_clk_ov), | |
| 1262 | .l1clk (l1clk_in), | |
| 1263 | .siclk(siclk), | |
| 1264 | .soclk(soclk) | |
| 1265 | ); | |
| 1266 | ||
| 1267 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_1 ff_pwrsav_ov_stg | |
| 1268 | ( | |
| 1269 | .scan_in(ff_pwrsav_ov_stg_scanin[0:0]), | |
| 1270 | .scan_out(ff_pwrsav_ov_stg_scanout[0:0]), | |
| 1271 | .dout (l2t_l2d_pwrsav_ov_stg), | |
| 1272 | .din (l2t_l2d_pwrsav_ov), | |
| 1273 | .l1clk (l1clk_in), | |
| 1274 | .siclk(siclk), | |
| 1275 | .soclk(soclk) | |
| 1276 | ); | |
| 1277 | //assign fill_pce0 = l2b_l2d_en_fill_clk_v0 | fill_clk_en_ov_stg; | |
| 1278 | //assign fill_pce1 = l2b_l2d_en_fill_clk_v1 | fill_clk_en_ov_stg; | |
| 1279 | ||
| 1280 | n2_l2d_sp_512kb_cust_or_macro__width_2 or_fill_pce0 | |
| 1281 | ( | |
| 1282 | .dout ({fill_pce0,fill_pce1}), | |
| 1283 | .din0 ({l2b_l2d_en_fill_clk_v0,l2b_l2d_en_fill_clk_v1}), | |
| 1284 | .din1 ({fill_clk_en_ov_stg,fill_clk_en_ov_stg}) | |
| 1285 | ); | |
| 1286 | ||
| 1287 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_156 ff_l2d_l2t_decc_c6 | |
| 1288 | ( | |
| 1289 | .scan_in(ff_l2d_l2t_decc_c6_scanin[155:0]), | |
| 1290 | .scan_out(ff_l2d_l2t_decc_c6_scanout[155:0]), | |
| 1291 | .dout (l2d_l2t_decc_c6[155:0]), | |
| 1292 | .din (l2d_l2t_decc_c52_mux[155:0]), | |
| 1293 | .l1clk (l1clk_out), | |
| 1294 | .siclk(siclk), | |
| 1295 | .soclk(soclk) | |
| 1296 | ); | |
| 1297 | ||
| 1298 | ||
| 1299 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c5_1 | |
| 1300 | ( | |
| 1301 | .scan_in(ff_l2b_l2d_fbdecc_c5_1_scanin[38:0]), | |
| 1302 | .scan_out(ff_l2b_l2d_fbdecc_c5_1_scanout[38:0]), | |
| 1303 | .dout (l2b_l2d_fbdecc_c5[38:0]), | |
| 1304 | .din (l2b_l2d_fbdecc_c4[38:0]), | |
| 1305 | .l1clk (l1clk_fill1), | |
| 1306 | .siclk(siclk), | |
| 1307 | .soclk(soclk) | |
| 1308 | ); | |
| 1309 | ||
| 1310 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c5_2 | |
| 1311 | ( | |
| 1312 | .scan_in(ff_l2b_l2d_fbdecc_c5_2_scanin[38:0]), | |
| 1313 | .scan_out(ff_l2b_l2d_fbdecc_c5_2_scanout[38:0]), | |
| 1314 | .dout (l2b_l2d_fbdecc_c5[77:39]), | |
| 1315 | .din (l2b_l2d_fbdecc_c4[77:39]), | |
| 1316 | .l1clk (l1clk_fill0), | |
| 1317 | .siclk(siclk), | |
| 1318 | .soclk(soclk) | |
| 1319 | ); | |
| 1320 | ||
| 1321 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c5_3 | |
| 1322 | ( | |
| 1323 | .scan_in(ff_l2b_l2d_fbdecc_c5_3_scanin[38:0]), | |
| 1324 | .scan_out(ff_l2b_l2d_fbdecc_c5_3_scanout[38:0]), | |
| 1325 | .dout (l2b_l2d_fbdecc_c5[116:78]), | |
| 1326 | .din (l2b_l2d_fbdecc_c4[116:78]), | |
| 1327 | .l1clk (l1clk_fill1), | |
| 1328 | .siclk(siclk), | |
| 1329 | .soclk(soclk) | |
| 1330 | ); | |
| 1331 | ||
| 1332 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c5_4 | |
| 1333 | ( | |
| 1334 | .scan_in(ff_l2b_l2d_fbdecc_c5_4_scanin[38:0]), | |
| 1335 | .scan_out(ff_l2b_l2d_fbdecc_c5_4_scanout[38:0]), | |
| 1336 | .dout (l2b_l2d_fbdecc_c5[155:117]), | |
| 1337 | .din (l2b_l2d_fbdecc_c4[155:117]), | |
| 1338 | .l1clk (l1clk_fill0), | |
| 1339 | .siclk(siclk), | |
| 1340 | .soclk(soclk) | |
| 1341 | ); | |
| 1342 | ||
| 1343 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c5_5 | |
| 1344 | ( | |
| 1345 | .scan_in(ff_l2b_l2d_fbdecc_c5_5_scanin[38:0]), | |
| 1346 | .scan_out(ff_l2b_l2d_fbdecc_c5_5_scanout[38:0]), | |
| 1347 | .dout (l2b_l2d_fbdecc_c5[194:156]), | |
| 1348 | .din (l2b_l2d_fbdecc_c4[194:156]), | |
| 1349 | .l1clk (l1clk_fill1), | |
| 1350 | .siclk(siclk), | |
| 1351 | .soclk(soclk) | |
| 1352 | ); | |
| 1353 | ||
| 1354 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c5_6 | |
| 1355 | ( | |
| 1356 | .scan_in(ff_l2b_l2d_fbdecc_c5_6_scanin[38:0]), | |
| 1357 | .scan_out(ff_l2b_l2d_fbdecc_c5_6_scanout[38:0]), | |
| 1358 | .dout (l2b_l2d_fbdecc_c5[233:195]), | |
| 1359 | .din (l2b_l2d_fbdecc_c4[233:195]), | |
| 1360 | .l1clk (l1clk_fill0), | |
| 1361 | .siclk(siclk), | |
| 1362 | .soclk(soclk) | |
| 1363 | ); | |
| 1364 | ||
| 1365 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c5_7 | |
| 1366 | ( | |
| 1367 | .scan_in(ff_l2b_l2d_fbdecc_c5_7_scanin[38:0]), | |
| 1368 | .scan_out(ff_l2b_l2d_fbdecc_c5_7_scanout[38:0]), | |
| 1369 | .dout (l2b_l2d_fbdecc_c5[272:234]), | |
| 1370 | .din (l2b_l2d_fbdecc_c4[272:234]), | |
| 1371 | .l1clk (l1clk_fill1), | |
| 1372 | .siclk(siclk), | |
| 1373 | .soclk(soclk) | |
| 1374 | ); | |
| 1375 | ||
| 1376 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c5_8 | |
| 1377 | ( | |
| 1378 | .scan_in(ff_l2b_l2d_fbdecc_c5_8_scanin[38:0]), | |
| 1379 | .scan_out(ff_l2b_l2d_fbdecc_c5_8_scanout[38:0]), | |
| 1380 | .dout (l2b_l2d_fbdecc_c5[311:273]), | |
| 1381 | .din (l2b_l2d_fbdecc_c4[311:273]), | |
| 1382 | .l1clk (l1clk_fill0), | |
| 1383 | .siclk(siclk), | |
| 1384 | .soclk(soclk) | |
| 1385 | ); | |
| 1386 | ||
| 1387 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c5_9 | |
| 1388 | ( | |
| 1389 | .scan_in(ff_l2b_l2d_fbdecc_c5_9_scanin[38:0]), | |
| 1390 | .scan_out(ff_l2b_l2d_fbdecc_c5_9_scanout[38:0]), | |
| 1391 | .dout (l2b_l2d_fbdecc_c5[350:312]), | |
| 1392 | .din (l2b_l2d_fbdecc_c4[350:312]), | |
| 1393 | .l1clk (l1clk_fill1), | |
| 1394 | .siclk(siclk), | |
| 1395 | .soclk(soclk) | |
| 1396 | ); | |
| 1397 | ||
| 1398 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c5_10 | |
| 1399 | ( | |
| 1400 | .scan_in(ff_l2b_l2d_fbdecc_c5_10_scanin[38:0]), | |
| 1401 | .scan_out(ff_l2b_l2d_fbdecc_c5_10_scanout[38:0]), | |
| 1402 | .dout (l2b_l2d_fbdecc_c5[389:351]), | |
| 1403 | .din (l2b_l2d_fbdecc_c4[389:351]), | |
| 1404 | .l1clk (l1clk_fill0), | |
| 1405 | .siclk(siclk), | |
| 1406 | .soclk(soclk) | |
| 1407 | ); | |
| 1408 | ||
| 1409 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c5_11 | |
| 1410 | ( | |
| 1411 | .scan_in(ff_l2b_l2d_fbdecc_c5_11_scanin[38:0]), | |
| 1412 | .scan_out(ff_l2b_l2d_fbdecc_c5_11_scanout[38:0]), | |
| 1413 | .dout (l2b_l2d_fbdecc_c5[428:390]), | |
| 1414 | .din (l2b_l2d_fbdecc_c4[428:390]), | |
| 1415 | .l1clk (l1clk_fill1), | |
| 1416 | .siclk(siclk), | |
| 1417 | .soclk(soclk) | |
| 1418 | ); | |
| 1419 | ||
| 1420 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c5_12 | |
| 1421 | ( | |
| 1422 | .scan_in(ff_l2b_l2d_fbdecc_c5_12_scanin[38:0]), | |
| 1423 | .scan_out(ff_l2b_l2d_fbdecc_c5_12_scanout[38:0]), | |
| 1424 | .dout (l2b_l2d_fbdecc_c5[467:429]), | |
| 1425 | .din (l2b_l2d_fbdecc_c4[467:429]), | |
| 1426 | .l1clk (l1clk_fill0), | |
| 1427 | .siclk(siclk), | |
| 1428 | .soclk(soclk) | |
| 1429 | ); | |
| 1430 | ||
| 1431 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c5_13 | |
| 1432 | ( | |
| 1433 | .scan_in(ff_l2b_l2d_fbdecc_c5_13_scanin[38:0]), | |
| 1434 | .scan_out(ff_l2b_l2d_fbdecc_c5_13_scanout[38:0]), | |
| 1435 | .dout (l2b_l2d_fbdecc_c5[506:468]), | |
| 1436 | .din (l2b_l2d_fbdecc_c4[506:468]), | |
| 1437 | .l1clk (l1clk_fill1), | |
| 1438 | .siclk(siclk), | |
| 1439 | .soclk(soclk) | |
| 1440 | ); | |
| 1441 | ||
| 1442 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c5_14 | |
| 1443 | ( | |
| 1444 | .scan_in(ff_l2b_l2d_fbdecc_c5_14_scanin[38:0]), | |
| 1445 | .scan_out(ff_l2b_l2d_fbdecc_c5_14_scanout[38:0]), | |
| 1446 | .dout (l2b_l2d_fbdecc_c5[545:507]), | |
| 1447 | .din (l2b_l2d_fbdecc_c4[545:507]), | |
| 1448 | .l1clk (l1clk_fill0), | |
| 1449 | .siclk(siclk), | |
| 1450 | .soclk(soclk) | |
| 1451 | ); | |
| 1452 | ||
| 1453 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c5_15 | |
| 1454 | ( | |
| 1455 | .scan_in(ff_l2b_l2d_fbdecc_c5_15_scanin[38:0]), | |
| 1456 | .scan_out(ff_l2b_l2d_fbdecc_c5_15_scanout[38:0]), | |
| 1457 | .dout (l2b_l2d_fbdecc_c5[584:546]), | |
| 1458 | .din (l2b_l2d_fbdecc_c4[584:546]), | |
| 1459 | .l1clk (l1clk_fill1), | |
| 1460 | .siclk(siclk), | |
| 1461 | .soclk(soclk) | |
| 1462 | ); | |
| 1463 | ||
| 1464 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c5_16 | |
| 1465 | ( | |
| 1466 | .scan_in(ff_l2b_l2d_fbdecc_c5_16_scanin[38:0]), | |
| 1467 | .scan_out(ff_l2b_l2d_fbdecc_c5_16_scanout[38:0]), | |
| 1468 | .dout (l2b_l2d_fbdecc_c5[623:585]), | |
| 1469 | .din (l2b_l2d_fbdecc_c4[623:585]), | |
| 1470 | .l1clk (l1clk_fill0), | |
| 1471 | .siclk(siclk), | |
| 1472 | .soclk(soclk) | |
| 1473 | ); | |
| 1474 | ||
| 1475 | ||
| 1476 | ||
| 1477 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_l2b_decc_out_c7_1 | |
| 1478 | ( | |
| 1479 | .scan_in(ff_l2d_l2b_decc_out_c7_1_scanin[38:0]), | |
| 1480 | .scan_out(ff_l2d_l2b_decc_out_c7_1_scanout[38:0]), | |
| 1481 | .dout (l2d_l2b_decc_out_c7[38:0]), | |
| 1482 | .din (l2d_decc_out_c6[38:0]), | |
| 1483 | .l1clk (l1clk_decc_c7), | |
| 1484 | .siclk(siclk), | |
| 1485 | .soclk(soclk) | |
| 1486 | ); | |
| 1487 | ||
| 1488 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_l2b_decc_out_c7_2 | |
| 1489 | ( | |
| 1490 | .scan_in(ff_l2d_l2b_decc_out_c7_2_scanin[38:0]), | |
| 1491 | .scan_out(ff_l2d_l2b_decc_out_c7_2_scanout[38:0]), | |
| 1492 | .dout (l2d_l2b_decc_out_c7[77:39]), | |
| 1493 | .din (l2d_decc_out_c6[77:39]), | |
| 1494 | .l1clk (l1clk_decc_c7), | |
| 1495 | .siclk(siclk), | |
| 1496 | .soclk(soclk) | |
| 1497 | ); | |
| 1498 | ||
| 1499 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_l2b_decc_out_c7_3 | |
| 1500 | ( | |
| 1501 | .scan_in(ff_l2d_l2b_decc_out_c7_3_scanin[38:0]), | |
| 1502 | .scan_out(ff_l2d_l2b_decc_out_c7_3_scanout[38:0]), | |
| 1503 | .dout (l2d_l2b_decc_out_c7[116:78]), | |
| 1504 | .din (l2d_decc_out_c6[116:78]), | |
| 1505 | .l1clk (l1clk_decc_c7), | |
| 1506 | .siclk(siclk), | |
| 1507 | .soclk(soclk) | |
| 1508 | ); | |
| 1509 | ||
| 1510 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_l2b_decc_out_c7_4 | |
| 1511 | ( | |
| 1512 | .scan_in(ff_l2d_l2b_decc_out_c7_4_scanin[38:0]), | |
| 1513 | .scan_out(ff_l2d_l2b_decc_out_c7_4_scanout[38:0]), | |
| 1514 | .dout (l2d_l2b_decc_out_c7[155:117]), | |
| 1515 | .din (l2d_decc_out_c6[155:117]), | |
| 1516 | .l1clk (l1clk_decc_c7), | |
| 1517 | .siclk(siclk), | |
| 1518 | .soclk(soclk) | |
| 1519 | ); | |
| 1520 | ||
| 1521 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_l2b_decc_out_c7_5 | |
| 1522 | ( | |
| 1523 | .scan_in(ff_l2d_l2b_decc_out_c7_5_scanin[38:0]), | |
| 1524 | .scan_out(ff_l2d_l2b_decc_out_c7_5_scanout[38:0]), | |
| 1525 | .dout (l2d_l2b_decc_out_c7[194:156]), | |
| 1526 | .din (l2d_decc_out_c6[194:156]), | |
| 1527 | .l1clk (l1clk_decc_c7), | |
| 1528 | .siclk(siclk), | |
| 1529 | .soclk(soclk) | |
| 1530 | ); | |
| 1531 | ||
| 1532 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_l2b_decc_out_c7_6 | |
| 1533 | ( | |
| 1534 | .scan_in(ff_l2d_l2b_decc_out_c7_6_scanin[38:0]), | |
| 1535 | .scan_out(ff_l2d_l2b_decc_out_c7_6_scanout[38:0]), | |
| 1536 | .dout (l2d_l2b_decc_out_c7[233:195]), | |
| 1537 | .din (l2d_decc_out_c6[233:195]), | |
| 1538 | .l1clk (l1clk_decc_c7), | |
| 1539 | .siclk(siclk), | |
| 1540 | .soclk(soclk) | |
| 1541 | ); | |
| 1542 | ||
| 1543 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_l2b_decc_out_c7_7 | |
| 1544 | ( | |
| 1545 | .scan_in(ff_l2d_l2b_decc_out_c7_7_scanin[38:0]), | |
| 1546 | .scan_out(ff_l2d_l2b_decc_out_c7_7_scanout[38:0]), | |
| 1547 | .dout (l2d_l2b_decc_out_c7[272:234]), | |
| 1548 | .din (l2d_decc_out_c6[272:234]), | |
| 1549 | .l1clk (l1clk_decc_c7), | |
| 1550 | .siclk(siclk), | |
| 1551 | .soclk(soclk) | |
| 1552 | ); | |
| 1553 | ||
| 1554 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_l2b_decc_out_c7_8 | |
| 1555 | ( | |
| 1556 | .scan_in(ff_l2d_l2b_decc_out_c7_8_scanin[38:0]), | |
| 1557 | .scan_out(ff_l2d_l2b_decc_out_c7_8_scanout[38:0]), | |
| 1558 | .dout (l2d_l2b_decc_out_c7[311:273]), | |
| 1559 | .din (l2d_decc_out_c6[311:273]), | |
| 1560 | .l1clk (l1clk_decc_c7), | |
| 1561 | .siclk(siclk), | |
| 1562 | .soclk(soclk) | |
| 1563 | ); | |
| 1564 | ||
| 1565 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_l2b_decc_out_c7_9 | |
| 1566 | ( | |
| 1567 | .scan_in(ff_l2d_l2b_decc_out_c7_9_scanin[38:0]), | |
| 1568 | .scan_out(ff_l2d_l2b_decc_out_c7_9_scanout[38:0]), | |
| 1569 | .dout (l2d_l2b_decc_out_c7[350:312]), | |
| 1570 | .din (l2d_decc_out_c6[350:312]), | |
| 1571 | .l1clk (l1clk_decc_c7), | |
| 1572 | .siclk(siclk), | |
| 1573 | .soclk(soclk) | |
| 1574 | ); | |
| 1575 | ||
| 1576 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_l2b_decc_out_c7_10 | |
| 1577 | ( | |
| 1578 | .scan_in(ff_l2d_l2b_decc_out_c7_10_scanin[38:0]), | |
| 1579 | .scan_out(ff_l2d_l2b_decc_out_c7_10_scanout[38:0]), | |
| 1580 | .dout (l2d_l2b_decc_out_c7[389:351]), | |
| 1581 | .din (l2d_decc_out_c6[389:351]), | |
| 1582 | .l1clk (l1clk_decc_c7), | |
| 1583 | .siclk(siclk), | |
| 1584 | .soclk(soclk) | |
| 1585 | ); | |
| 1586 | ||
| 1587 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_l2b_decc_out_c7_11 | |
| 1588 | ( | |
| 1589 | .scan_in(ff_l2d_l2b_decc_out_c7_11_scanin[38:0]), | |
| 1590 | .scan_out(ff_l2d_l2b_decc_out_c7_11_scanout[38:0]), | |
| 1591 | .dout (l2d_l2b_decc_out_c7[428:390]), | |
| 1592 | .din (l2d_decc_out_c6[428:390]), | |
| 1593 | .l1clk (l1clk_decc_c7), | |
| 1594 | .siclk(siclk), | |
| 1595 | .soclk(soclk) | |
| 1596 | ); | |
| 1597 | ||
| 1598 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_l2b_decc_out_c7_12 | |
| 1599 | ( | |
| 1600 | .scan_in(ff_l2d_l2b_decc_out_c7_12_scanin[38:0]), | |
| 1601 | .scan_out(ff_l2d_l2b_decc_out_c7_12_scanout[38:0]), | |
| 1602 | .dout (l2d_l2b_decc_out_c7[467:429]), | |
| 1603 | .din (l2d_decc_out_c6[467:429]), | |
| 1604 | .l1clk (l1clk_decc_c7), | |
| 1605 | .siclk(siclk), | |
| 1606 | .soclk(soclk) | |
| 1607 | ); | |
| 1608 | ||
| 1609 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_l2b_decc_out_c7_13 | |
| 1610 | ( | |
| 1611 | .scan_in(ff_l2d_l2b_decc_out_c7_13_scanin[38:0]), | |
| 1612 | .scan_out(ff_l2d_l2b_decc_out_c7_13_scanout[38:0]), | |
| 1613 | .dout (l2d_l2b_decc_out_c7[506:468]), | |
| 1614 | .din (l2d_decc_out_c6[506:468]), | |
| 1615 | .l1clk (l1clk_decc_c7), | |
| 1616 | .siclk(siclk), | |
| 1617 | .soclk(soclk) | |
| 1618 | ); | |
| 1619 | ||
| 1620 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_l2b_decc_out_c7_14 | |
| 1621 | ( | |
| 1622 | .scan_in(ff_l2d_l2b_decc_out_c7_14_scanin[38:0]), | |
| 1623 | .scan_out(ff_l2d_l2b_decc_out_c7_14_scanout[38:0]), | |
| 1624 | .dout (l2d_l2b_decc_out_c7[545:507]), | |
| 1625 | .din (l2d_decc_out_c6[545:507]), | |
| 1626 | .l1clk (l1clk_decc_c7), | |
| 1627 | .siclk(siclk), | |
| 1628 | .soclk(soclk) | |
| 1629 | ); | |
| 1630 | ||
| 1631 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_l2b_decc_out_c7_15 | |
| 1632 | ( | |
| 1633 | .scan_in(ff_l2d_l2b_decc_out_c7_15_scanin[38:0]), | |
| 1634 | .scan_out(ff_l2d_l2b_decc_out_c7_15_scanout[38:0]), | |
| 1635 | .dout (l2d_l2b_decc_out_c7[584:546]), | |
| 1636 | .din (l2d_decc_out_c6[584:546]), | |
| 1637 | .l1clk (l1clk_decc_c7), | |
| 1638 | .siclk(siclk), | |
| 1639 | .soclk(soclk) | |
| 1640 | ); | |
| 1641 | ||
| 1642 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_l2b_decc_out_c7_16 | |
| 1643 | ( | |
| 1644 | .scan_in(ff_l2d_l2b_decc_out_c7_16_scanin[38:0]), | |
| 1645 | .scan_out(ff_l2d_l2b_decc_out_c7_16_scanout[38:0]), | |
| 1646 | .dout (l2d_l2b_decc_out_c7[623:585]), | |
| 1647 | .din (l2d_decc_out_c6[623:585]), | |
| 1648 | .l1clk (l1clk_decc_c7), | |
| 1649 | .siclk(siclk), | |
| 1650 | .soclk(soclk) | |
| 1651 | ); | |
| 1652 | ||
| 1653 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_16 ff_l2t_l2d_way_sel_c3 | |
| 1654 | ( | |
| 1655 | .scan_in(ff_l2t_l2d_way_sel_c3_scanin[15:0]), | |
| 1656 | .scan_out(ff_l2t_l2d_way_sel_c3_scanout[15:0]), | |
| 1657 | .dout (l2t_l2d_way_sel_c3[15:0]), | |
| 1658 | .din (l2t_l2d_way_sel_c2[15:0]), | |
| 1659 | .l1clk (l1clk_in), | |
| 1660 | .siclk(siclk), | |
| 1661 | .soclk(soclk) | |
| 1662 | ); | |
| 1663 | ||
| 1664 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_10 ff_l2b_l2d_fuse_l2d_data_in | |
| 1665 | ( | |
| 1666 | .scan_in(ff_l2b_l2d_fuse_l2d_data_in_scanin[9:0]), | |
| 1667 | .scan_out(ff_l2b_l2d_fuse_l2d_data_in_scanout[9:0]), | |
| 1668 | .dout (l2b_l2d_fuse_l2d_data_in_d), | |
| 1669 | .din (l2b_l2d_fuse_l2d_data_in), | |
| 1670 | .l1clk (l1clk_in), | |
| 1671 | .siclk(siclk), | |
| 1672 | .soclk(soclk) | |
| 1673 | ); | |
| 1674 | ||
| 1675 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_10 ff_l2d_l2b_efc_fuse_data | |
| 1676 | ( | |
| 1677 | .scan_in(ff_l2d_l2b_efc_fuse_data_scanin[9:0]), | |
| 1678 | .scan_out(ff_l2d_l2b_efc_fuse_data_scanout[9:0]), | |
| 1679 | .dout (l2d_l2b_efc_fuse_data), | |
| 1680 | .din (efc_fuse_data), | |
| 1681 | .l1clk (l1clk_out), | |
| 1682 | .siclk(siclk), | |
| 1683 | .soclk(soclk) | |
| 1684 | ); | |
| 1685 | ||
| 1686 | ||
| 1687 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_7 ff_l2b_l2d_fuse_rid_d | |
| 1688 | ( | |
| 1689 | .scan_in(ff_l2b_l2d_fuse_rid_d_scanin[6:0]), | |
| 1690 | .scan_out(ff_l2b_l2d_fuse_rid_d_scanout[6:0]), | |
| 1691 | .din (l2b_l2d_fuse_rid), | |
| 1692 | .dout (l2b_l2d_fuse_rid_d), | |
| 1693 | .l1clk (l1clk_in), | |
| 1694 | .siclk(siclk), | |
| 1695 | .soclk(soclk) | |
| 1696 | ); | |
| 1697 | ||
| 1698 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_1 ff_l2b_l2d_fuse_wren_d | |
| 1699 | ( | |
| 1700 | .scan_in(ff_l2b_l2d_fuse_wren_d_scanin[0:0]), | |
| 1701 | .scan_out(ff_l2b_l2d_fuse_wren_d_scanout[0:0]), | |
| 1702 | .din (l2b_l2d_fuse_l2d_wren), | |
| 1703 | .dout (l2b_l2d_fuse_l2d_wren_stg), | |
| 1704 | .l1clk (l1clk_in), | |
| 1705 | .siclk(siclk), | |
| 1706 | .soclk(soclk) | |
| 1707 | ); | |
| 1708 | //assign l2b_l2d_fuse_l2d_wren_d = (l2b_l2d_fuse_l2d_wren_stg) & (~wr_inhibit); | |
| 1709 | ||
| 1710 | n2_l2d_sp_512kb_cust_inv_macro__width_2 inv_wr_inhibit | |
| 1711 | ( | |
| 1712 | .dout ({l2b_l2d_fuse_reset_stg_n,wr_inhibit_n}), | |
| 1713 | .din ({l2b_l2d_fuse_reset_stg,wr_inhibit}) | |
| 1714 | ); | |
| 1715 | n2_l2d_sp_512kb_cust_and_macro__width_1 and_l2b_l2d_fuse_l2d_wren_d | |
| 1716 | ( | |
| 1717 | .dout (l2b_l2d_fuse_l2d_wren_d), | |
| 1718 | .din0 (wr_inhibit_n), | |
| 1719 | .din1 (l2b_l2d_fuse_l2d_wren_stg) | |
| 1720 | ); | |
| 1721 | ||
| 1722 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_1 ff_l2b_l2d_fuse_reset_d | |
| 1723 | ( | |
| 1724 | .scan_in(ff_l2b_l2d_fuse_reset_d_scanin[0:0]), | |
| 1725 | .scan_out(ff_l2b_l2d_fuse_reset_d_scanout[0:0]), | |
| 1726 | .din (l2b_l2d_fuse_reset), | |
| 1727 | .dout (l2b_l2d_fuse_reset_stg), | |
| 1728 | .l1clk (l1clk_in), | |
| 1729 | .siclk(siclk), | |
| 1730 | .soclk(soclk) | |
| 1731 | ); | |
| 1732 | //assign l2b_l2d_fuse_reset_d_l = ~l2b_l2d_fuse_reset_stg | wr_inhibit; | |
| 1733 | ||
| 1734 | n2_l2d_sp_512kb_cust_or_macro__width_1 and_l2b_l2d_fuse_reset_d_l | |
| 1735 | ( | |
| 1736 | .dout (l2b_l2d_fuse_reset_d_l), | |
| 1737 | .din0 (wr_inhibit), | |
| 1738 | .din1 (l2b_l2d_fuse_reset_stg_n) | |
| 1739 | ); | |
| 1740 | ||
| 1741 | //always@(l2t_l2d_way_sel_c3) | |
| 1742 | //begin | |
| 1743 | //case(l2t_l2d_way_sel_c3) | |
| 1744 | //16'b0000_0000_0000_0000 : wayerr_c3 = 1; | |
| 1745 | //16'b0000_0000_0000_0001 : wayerr_c3 = 0; | |
| 1746 | //16'b0000_0000_0000_0010 : wayerr_c3 = 0; | |
| 1747 | //16'b0000_0000_0000_0100 : wayerr_c3 = 0; | |
| 1748 | //16'b0000_0000_0000_1000 : wayerr_c3 = 0; | |
| 1749 | //16'b0000_0000_0001_0000 : wayerr_c3 = 0; | |
| 1750 | //16'b0000_0000_0010_0000 : wayerr_c3 = 0; | |
| 1751 | //16'b0000_0000_0100_0000 : wayerr_c3 = 0; | |
| 1752 | //16'b0000_0000_1000_0000 : wayerr_c3 = 0; | |
| 1753 | //16'b0000_0001_0000_0000 : wayerr_c3 = 0; | |
| 1754 | //16'b0000_0010_0000_0000 : wayerr_c3 = 0; | |
| 1755 | //16'b0000_0100_0000_0000 : wayerr_c3 = 0; | |
| 1756 | //16'b0000_1000_0000_0000 : wayerr_c3 = 0; | |
| 1757 | //16'b0001_0000_0000_0000 : wayerr_c3 = 0; | |
| 1758 | //16'b0010_0000_0000_0000 : wayerr_c3 = 0; | |
| 1759 | //16'b0100_0000_0000_0000 : wayerr_c3 = 0; | |
| 1760 | //16'b1000_0000_0000_0000 : wayerr_c3 = 0; | |
| 1761 | //default : wayerr_c3 = 1; | |
| 1762 | //endcase | |
| 1763 | //end | |
| 1764 | ||
| 1765 | l2t_wayerr_ctl way_err_computed | |
| 1766 | ( | |
| 1767 | .wayerr_c3 (wayerr_c3), | |
| 1768 | .l2t_l2d_way_sel_c3(l2t_l2d_way_sel_c3[15:0]) | |
| 1769 | ); | |
| 1770 | ||
| 1771 | ||
| 1772 | // scanorder start | |
| 1773 | // ff_l2t_l2d_rd_wr_c3_scanin | |
| 1774 | // ff_l2t_l2d_way_sel_c3_scanin[0:15] | |
| 1775 | // ff_l2b_l2d_fbdecc_c5_1_scanin[0] | |
| 1776 | // ff_l2b_l2d_fbdecc_c5_5_scanin[0] | |
| 1777 | // ff_l2b_l2d_fbdecc_c5_3_scanin[0] | |
| 1778 | // ff_l2b_l2d_fbdecc_c5_7_scanin[0] | |
| 1779 | // ff_l2b_l2d_fbdecc_c5_9_scanin[0] | |
| 1780 | // ff_l2b_l2d_fbdecc_c5_13_scanin[0] | |
| 1781 | // ff_l2b_l2d_fbdecc_c5_11_scanin[0] | |
| 1782 | // ff_l2b_l2d_fbdecc_c5_15_scanin[0] | |
| 1783 | // ff_l2b_l2d_fbdecc_c5_1_scanin[1] | |
| 1784 | // ff_l2b_l2d_fbdecc_c5_5_scanin[1] | |
| 1785 | // ff_l2b_l2d_fbdecc_c5_3_scanin[1] | |
| 1786 | // ff_l2b_l2d_fbdecc_c5_7_scanin[1] | |
| 1787 | // ff_l2b_l2d_fbdecc_c5_9_scanin[1] | |
| 1788 | // ff_l2b_l2d_fbdecc_c5_13_scanin[1] | |
| 1789 | // ff_l2b_l2d_fbdecc_c5_11_scanin[1] | |
| 1790 | // ff_l2b_l2d_fbdecc_c5_15_scanin[1] | |
| 1791 | // ff_l2b_l2d_fbdecc_c5_1_scanin[2] | |
| 1792 | // ff_l2b_l2d_fbdecc_c5_5_scanin[2] | |
| 1793 | // ff_l2b_l2d_fbdecc_c5_3_scanin[2] | |
| 1794 | // ff_l2b_l2d_fbdecc_c5_7_scanin[2] | |
| 1795 | // ff_l2b_l2d_fbdecc_c5_9_scanin[2] | |
| 1796 | // ff_l2b_l2d_fbdecc_c5_13_scanin[2] | |
| 1797 | // ff_l2b_l2d_fbdecc_c5_11_scanin[2] | |
| 1798 | // ff_l2b_l2d_fbdecc_c5_15_scanin[2] | |
| 1799 | // ff_l2b_l2d_fbdecc_c5_1_scanin[3] | |
| 1800 | // ff_l2b_l2d_fbdecc_c5_5_scanin[3] | |
| 1801 | // ff_l2b_l2d_fbdecc_c5_3_scanin[3] | |
| 1802 | // ff_l2b_l2d_fbdecc_c5_7_scanin[3] | |
| 1803 | // ff_l2b_l2d_fbdecc_c5_9_scanin[3] | |
| 1804 | // ff_l2b_l2d_fbdecc_c5_13_scanin[3] | |
| 1805 | // ff_l2b_l2d_fbdecc_c5_11_scanin[3] | |
| 1806 | // ff_l2b_l2d_fbdecc_c5_15_scanin[3] | |
| 1807 | // ff_l2b_l2d_fbdecc_c5_1_scanin[4] | |
| 1808 | // ff_l2b_l2d_fbdecc_c5_5_scanin[4] | |
| 1809 | // ff_l2b_l2d_fbdecc_c5_3_scanin[4] | |
| 1810 | // ff_l2b_l2d_fbdecc_c5_7_scanin[4] | |
| 1811 | // ff_l2b_l2d_fbdecc_c5_9_scanin[4] | |
| 1812 | // ff_l2b_l2d_fbdecc_c5_13_scanin[4] | |
| 1813 | // ff_l2b_l2d_fbdecc_c5_11_scanin[4] | |
| 1814 | // ff_l2b_l2d_fbdecc_c5_15_scanin[4] | |
| 1815 | // ff_l2b_l2d_fbdecc_c5_1_scanin[5] | |
| 1816 | // ff_l2b_l2d_fbdecc_c5_5_scanin[5] | |
| 1817 | // ff_l2b_l2d_fbdecc_c5_3_scanin[5] | |
| 1818 | // ff_l2b_l2d_fbdecc_c5_7_scanin[5] | |
| 1819 | // ff_l2b_l2d_fbdecc_c5_9_scanin[5] | |
| 1820 | // ff_l2b_l2d_fbdecc_c5_13_scanin[5] | |
| 1821 | // ff_l2b_l2d_fbdecc_c5_11_scanin[5] | |
| 1822 | // ff_l2b_l2d_fbdecc_c5_15_scanin[5] | |
| 1823 | // ff_l2b_l2d_fbdecc_c5_1_scanin[6] | |
| 1824 | // ff_l2b_l2d_fbdecc_c5_5_scanin[6] | |
| 1825 | // ff_l2b_l2d_fbdecc_c5_3_scanin[6] | |
| 1826 | // ff_l2b_l2d_fbdecc_c5_7_scanin[6] | |
| 1827 | // ff_l2b_l2d_fbdecc_c5_9_scanin[6] | |
| 1828 | // ff_l2b_l2d_fbdecc_c5_13_scanin[6] | |
| 1829 | // ff_l2b_l2d_fbdecc_c5_11_scanin[6] | |
| 1830 | // ff_l2b_l2d_fbdecc_c5_15_scanin[6] | |
| 1831 | // ff_l2b_l2d_fbdecc_c5_1_scanin[7] | |
| 1832 | // ff_l2b_l2d_fbdecc_c5_5_scanin[7] | |
| 1833 | // ff_l2b_l2d_fbdecc_c5_3_scanin[7] | |
| 1834 | // ff_l2b_l2d_fbdecc_c5_7_scanin[7] | |
| 1835 | // ff_l2b_l2d_fbdecc_c5_9_scanin[7] | |
| 1836 | // ff_l2b_l2d_fbdecc_c5_13_scanin[7] | |
| 1837 | // ff_l2b_l2d_fbdecc_c5_11_scanin[7] | |
| 1838 | // ff_l2b_l2d_fbdecc_c5_15_scanin[7] | |
| 1839 | // ff_l2b_l2d_fbdecc_c5_1_scanin[8] | |
| 1840 | // ff_l2b_l2d_fbdecc_c5_5_scanin[8] | |
| 1841 | // ff_l2b_l2d_fbdecc_c5_3_scanin[8] | |
| 1842 | // ff_l2b_l2d_fbdecc_c5_7_scanin[8] | |
| 1843 | // ff_l2b_l2d_fbdecc_c5_9_scanin[8] | |
| 1844 | // ff_l2b_l2d_fbdecc_c5_13_scanin[8] | |
| 1845 | // ff_l2b_l2d_fbdecc_c5_11_scanin[8] | |
| 1846 | // ff_l2b_l2d_fbdecc_c5_15_scanin[8] | |
| 1847 | // ff_l2b_l2d_fbdecc_c5_1_scanin[9] | |
| 1848 | // ff_l2b_l2d_fbdecc_c5_5_scanin[9] | |
| 1849 | // ff_l2b_l2d_fbdecc_c5_3_scanin[9] | |
| 1850 | // ff_l2b_l2d_fbdecc_c5_7_scanin[9] | |
| 1851 | // ff_l2b_l2d_fbdecc_c5_9_scanin[9] | |
| 1852 | // ff_l2b_l2d_fbdecc_c5_13_scanin[9] | |
| 1853 | // ff_l2b_l2d_fbdecc_c5_11_scanin[9] | |
| 1854 | // ff_l2b_l2d_fbdecc_c5_15_scanin[9] | |
| 1855 | // ff_l2b_l2d_fbdecc_c5_1_scanin[10] | |
| 1856 | // ff_l2b_l2d_fbdecc_c5_5_scanin[10] | |
| 1857 | // ff_l2b_l2d_fbdecc_c5_3_scanin[10] | |
| 1858 | // ff_l2b_l2d_fbdecc_c5_7_scanin[10] | |
| 1859 | // ff_l2b_l2d_fbdecc_c5_9_scanin[10] | |
| 1860 | // ff_l2b_l2d_fbdecc_c5_13_scanin[10] | |
| 1861 | // ff_l2b_l2d_fbdecc_c5_11_scanin[10] | |
| 1862 | // ff_l2b_l2d_fbdecc_c5_15_scanin[10] | |
| 1863 | // ff_l2b_l2d_fbdecc_c5_1_scanin[11] | |
| 1864 | // ff_l2b_l2d_fbdecc_c5_5_scanin[11] | |
| 1865 | // ff_l2b_l2d_fbdecc_c5_3_scanin[11] | |
| 1866 | // ff_l2b_l2d_fbdecc_c5_7_scanin[11] | |
| 1867 | // ff_l2b_l2d_fbdecc_c5_9_scanin[11] | |
| 1868 | // ff_l2b_l2d_fbdecc_c5_13_scanin[11] | |
| 1869 | // ff_l2b_l2d_fbdecc_c5_11_scanin[11] | |
| 1870 | // ff_l2b_l2d_fbdecc_c5_15_scanin[11] | |
| 1871 | // ff_l2b_l2d_fbdecc_c5_1_scanin[12] | |
| 1872 | // ff_l2b_l2d_fbdecc_c5_5_scanin[12] | |
| 1873 | // ff_l2b_l2d_fbdecc_c5_3_scanin[12] | |
| 1874 | // ff_l2b_l2d_fbdecc_c5_7_scanin[12] | |
| 1875 | // ff_l2b_l2d_fbdecc_c5_9_scanin[12] | |
| 1876 | // ff_l2b_l2d_fbdecc_c5_13_scanin[12] | |
| 1877 | // ff_l2b_l2d_fbdecc_c5_11_scanin[12] | |
| 1878 | // ff_l2b_l2d_fbdecc_c5_15_scanin[12] | |
| 1879 | // ff_l2b_l2d_fbdecc_c5_1_scanin[13] | |
| 1880 | // ff_l2b_l2d_fbdecc_c5_5_scanin[13] | |
| 1881 | // ff_l2b_l2d_fbdecc_c5_3_scanin[13] | |
| 1882 | // ff_l2b_l2d_fbdecc_c5_7_scanin[13] | |
| 1883 | // ff_l2b_l2d_fbdecc_c5_9_scanin[13] | |
| 1884 | // ff_l2b_l2d_fbdecc_c5_13_scanin[13] | |
| 1885 | // ff_l2b_l2d_fbdecc_c5_11_scanin[13] | |
| 1886 | // ff_l2b_l2d_fbdecc_c5_15_scanin[13] | |
| 1887 | // ff_l2b_l2d_fbdecc_c5_1_scanin[14] | |
| 1888 | // ff_l2b_l2d_fbdecc_c5_5_scanin[14] | |
| 1889 | // ff_l2b_l2d_fbdecc_c5_3_scanin[14] | |
| 1890 | // ff_l2b_l2d_fbdecc_c5_7_scanin[14] | |
| 1891 | // ff_l2b_l2d_fbdecc_c5_9_scanin[14] | |
| 1892 | // ff_l2b_l2d_fbdecc_c5_13_scanin[14] | |
| 1893 | // ff_l2b_l2d_fbdecc_c5_11_scanin[14] | |
| 1894 | // ff_l2b_l2d_fbdecc_c5_15_scanin[14] | |
| 1895 | // ff_l2b_l2d_fbdecc_c5_1_scanin[15] | |
| 1896 | // ff_l2b_l2d_fbdecc_c5_5_scanin[15] | |
| 1897 | // ff_l2b_l2d_fbdecc_c5_3_scanin[15] | |
| 1898 | // ff_l2b_l2d_fbdecc_c5_7_scanin[15] | |
| 1899 | // ff_l2b_l2d_fbdecc_c5_9_scanin[15] | |
| 1900 | // ff_l2b_l2d_fbdecc_c5_13_scanin[15] | |
| 1901 | // ff_l2b_l2d_fbdecc_c5_11_scanin[15] | |
| 1902 | // ff_l2b_l2d_fbdecc_c5_15_scanin[15] | |
| 1903 | // ff_l2b_l2d_fbdecc_c5_1_scanin[16] | |
| 1904 | // ff_l2b_l2d_fbdecc_c5_5_scanin[16] | |
| 1905 | // ff_l2b_l2d_fbdecc_c5_3_scanin[16] | |
| 1906 | // ff_l2b_l2d_fbdecc_c5_7_scanin[16] | |
| 1907 | // ff_l2b_l2d_fbdecc_c5_9_scanin[16] | |
| 1908 | // ff_l2b_l2d_fbdecc_c5_13_scanin[16] | |
| 1909 | // ff_l2b_l2d_fbdecc_c5_11_scanin[16] | |
| 1910 | // ff_l2b_l2d_fbdecc_c5_15_scanin[16] | |
| 1911 | // ff_l2b_l2d_fbdecc_c5_1_scanin[17] | |
| 1912 | // ff_l2b_l2d_fbdecc_c5_5_scanin[17] | |
| 1913 | // ff_l2b_l2d_fbdecc_c5_3_scanin[17] | |
| 1914 | // ff_l2b_l2d_fbdecc_c5_7_scanin[17] | |
| 1915 | // ff_l2b_l2d_fbdecc_c5_9_scanin[17] | |
| 1916 | // ff_l2b_l2d_fbdecc_c5_13_scanin[17] | |
| 1917 | // ff_l2b_l2d_fbdecc_c5_11_scanin[17] | |
| 1918 | // ff_l2b_l2d_fbdecc_c5_15_scanin[17] | |
| 1919 | // ff_l2b_l2d_fbdecc_c5_1_scanin[18] | |
| 1920 | // ff_l2b_l2d_fbdecc_c5_5_scanin[18] | |
| 1921 | // ff_l2b_l2d_fbdecc_c5_3_scanin[18] | |
| 1922 | // ff_l2b_l2d_fbdecc_c5_7_scanin[18] | |
| 1923 | // ff_l2b_l2d_fbdecc_c5_9_scanin[18] | |
| 1924 | // ff_l2b_l2d_fbdecc_c5_13_scanin[18] | |
| 1925 | // ff_l2b_l2d_fbdecc_c5_11_scanin[18] | |
| 1926 | // ff_l2b_l2d_fbdecc_c5_15_scanin[18] | |
| 1927 | // ff_l2b_l2d_fbdecc_c5_1_scanin[19] | |
| 1928 | // ff_l2b_l2d_fbdecc_c5_5_scanin[19] | |
| 1929 | // ff_l2b_l2d_fbdecc_c5_3_scanin[19] | |
| 1930 | // ff_l2b_l2d_fbdecc_c5_7_scanin[19] | |
| 1931 | // ff_l2b_l2d_fbdecc_c5_9_scanin[19] | |
| 1932 | // ff_l2b_l2d_fbdecc_c5_13_scanin[19] | |
| 1933 | // ff_l2b_l2d_fbdecc_c5_11_scanin[19] | |
| 1934 | // ff_l2b_l2d_fbdecc_c5_15_scanin[19] | |
| 1935 | // ff_l2b_l2d_fbdecc_c5_1_scanin[20] | |
| 1936 | // ff_l2b_l2d_fbdecc_c5_5_scanin[20] | |
| 1937 | // ff_l2b_l2d_fbdecc_c5_3_scanin[20] | |
| 1938 | // ff_l2b_l2d_fbdecc_c5_7_scanin[20] | |
| 1939 | // ff_l2b_l2d_fbdecc_c5_9_scanin[20] | |
| 1940 | // ff_l2b_l2d_fbdecc_c5_13_scanin[20] | |
| 1941 | // ff_l2b_l2d_fbdecc_c5_11_scanin[20] | |
| 1942 | // ff_l2b_l2d_fbdecc_c5_15_scanin[20] | |
| 1943 | // ff_l2b_l2d_fbdecc_c5_1_scanin[21] | |
| 1944 | // ff_l2b_l2d_fbdecc_c5_5_scanin[21] | |
| 1945 | // ff_l2b_l2d_fbdecc_c5_3_scanin[21] | |
| 1946 | // ff_l2b_l2d_fbdecc_c5_7_scanin[21] | |
| 1947 | // ff_l2b_l2d_fbdecc_c5_9_scanin[21] | |
| 1948 | // ff_l2b_l2d_fbdecc_c5_13_scanin[21] | |
| 1949 | // ff_l2b_l2d_fbdecc_c5_11_scanin[21] | |
| 1950 | // ff_l2b_l2d_fbdecc_c5_15_scanin[21] | |
| 1951 | // ff_l2b_l2d_fbdecc_c5_1_scanin[22] | |
| 1952 | // ff_l2b_l2d_fbdecc_c5_5_scanin[22] | |
| 1953 | // ff_l2b_l2d_fbdecc_c5_3_scanin[22] | |
| 1954 | // ff_l2b_l2d_fbdecc_c5_7_scanin[22] | |
| 1955 | // ff_l2b_l2d_fbdecc_c5_9_scanin[22] | |
| 1956 | // ff_l2b_l2d_fbdecc_c5_13_scanin[22] | |
| 1957 | // ff_l2b_l2d_fbdecc_c5_11_scanin[22] | |
| 1958 | // ff_l2b_l2d_fbdecc_c5_15_scanin[22] | |
| 1959 | // ff_l2b_l2d_fbdecc_c5_1_scanin[23] | |
| 1960 | // ff_l2b_l2d_fbdecc_c5_5_scanin[23] | |
| 1961 | // ff_l2b_l2d_fbdecc_c5_3_scanin[23] | |
| 1962 | // ff_l2b_l2d_fbdecc_c5_7_scanin[23] | |
| 1963 | // ff_l2b_l2d_fbdecc_c5_9_scanin[23] | |
| 1964 | // ff_l2b_l2d_fbdecc_c5_13_scanin[23] | |
| 1965 | // ff_l2b_l2d_fbdecc_c5_11_scanin[23] | |
| 1966 | // ff_l2b_l2d_fbdecc_c5_15_scanin[23] | |
| 1967 | // ff_l2b_l2d_fbdecc_c5_1_scanin[24] | |
| 1968 | // ff_l2b_l2d_fbdecc_c5_5_scanin[24] | |
| 1969 | // ff_l2b_l2d_fbdecc_c5_3_scanin[24] | |
| 1970 | // ff_l2b_l2d_fbdecc_c5_7_scanin[24] | |
| 1971 | // ff_l2b_l2d_fbdecc_c5_9_scanin[24] | |
| 1972 | // ff_l2b_l2d_fbdecc_c5_13_scanin[24] | |
| 1973 | // ff_l2b_l2d_fbdecc_c5_11_scanin[24] | |
| 1974 | // ff_l2b_l2d_fbdecc_c5_15_scanin[24] | |
| 1975 | // ff_l2b_l2d_fbdecc_c5_1_scanin[25] | |
| 1976 | // ff_l2b_l2d_fbdecc_c5_5_scanin[25] | |
| 1977 | // ff_l2b_l2d_fbdecc_c5_3_scanin[25] | |
| 1978 | // ff_l2b_l2d_fbdecc_c5_7_scanin[25] | |
| 1979 | // ff_l2b_l2d_fbdecc_c5_9_scanin[25] | |
| 1980 | // ff_l2b_l2d_fbdecc_c5_13_scanin[25] | |
| 1981 | // ff_l2b_l2d_fbdecc_c5_11_scanin[25] | |
| 1982 | // ff_l2b_l2d_fbdecc_c5_15_scanin[25] | |
| 1983 | // ff_l2b_l2d_fbdecc_c5_1_scanin[26] | |
| 1984 | // ff_l2b_l2d_fbdecc_c5_5_scanin[26] | |
| 1985 | // ff_l2b_l2d_fbdecc_c5_3_scanin[26] | |
| 1986 | // ff_l2b_l2d_fbdecc_c5_7_scanin[26] | |
| 1987 | // ff_l2b_l2d_fbdecc_c5_9_scanin[26] | |
| 1988 | // ff_l2b_l2d_fbdecc_c5_13_scanin[26] | |
| 1989 | // ff_l2b_l2d_fbdecc_c5_11_scanin[26] | |
| 1990 | // ff_l2b_l2d_fbdecc_c5_15_scanin[26] | |
| 1991 | // ff_l2b_l2d_fbdecc_c5_1_scanin[27] | |
| 1992 | // ff_l2b_l2d_fbdecc_c5_5_scanin[27] | |
| 1993 | // ff_l2b_l2d_fbdecc_c5_3_scanin[27] | |
| 1994 | // ff_l2b_l2d_fbdecc_c5_7_scanin[27] | |
| 1995 | // ff_l2b_l2d_fbdecc_c5_9_scanin[27] | |
| 1996 | // ff_l2b_l2d_fbdecc_c5_13_scanin[27] | |
| 1997 | // ff_l2b_l2d_fbdecc_c5_11_scanin[27] | |
| 1998 | // ff_l2b_l2d_fbdecc_c5_15_scanin[27] | |
| 1999 | // ff_l2b_l2d_fbdecc_c5_1_scanin[28] | |
| 2000 | // ff_l2b_l2d_fbdecc_c5_5_scanin[28] | |
| 2001 | // ff_l2b_l2d_fbdecc_c5_3_scanin[28] | |
| 2002 | // ff_l2b_l2d_fbdecc_c5_7_scanin[28] | |
| 2003 | // ff_l2b_l2d_fbdecc_c5_9_scanin[28] | |
| 2004 | // ff_l2b_l2d_fbdecc_c5_13_scanin[28] | |
| 2005 | // ff_l2b_l2d_fbdecc_c5_11_scanin[28] | |
| 2006 | // ff_l2b_l2d_fbdecc_c5_15_scanin[28] | |
| 2007 | // ff_l2b_l2d_fbdecc_c5_1_scanin[29] | |
| 2008 | // ff_l2b_l2d_fbdecc_c5_5_scanin[29] | |
| 2009 | // ff_l2b_l2d_fbdecc_c5_3_scanin[29] | |
| 2010 | // ff_l2b_l2d_fbdecc_c5_7_scanin[29] | |
| 2011 | // ff_l2b_l2d_fbdecc_c5_9_scanin[29] | |
| 2012 | // ff_l2b_l2d_fbdecc_c5_13_scanin[29] | |
| 2013 | // ff_l2b_l2d_fbdecc_c5_11_scanin[29] | |
| 2014 | // ff_l2b_l2d_fbdecc_c5_15_scanin[29] | |
| 2015 | // ff_l2b_l2d_fbdecc_c5_1_scanin[30] | |
| 2016 | // ff_l2b_l2d_fbdecc_c5_5_scanin[30] | |
| 2017 | // ff_l2b_l2d_fbdecc_c5_3_scanin[30] | |
| 2018 | // ff_l2b_l2d_fbdecc_c5_7_scanin[30] | |
| 2019 | // ff_l2b_l2d_fbdecc_c5_9_scanin[30] | |
| 2020 | // ff_l2b_l2d_fbdecc_c5_13_scanin[30] | |
| 2021 | // ff_l2b_l2d_fbdecc_c5_11_scanin[30] | |
| 2022 | // ff_l2b_l2d_fbdecc_c5_15_scanin[30] | |
| 2023 | // ff_l2b_l2d_fbdecc_c5_1_scanin[31] | |
| 2024 | // ff_l2b_l2d_fbdecc_c5_5_scanin[31] | |
| 2025 | // ff_l2b_l2d_fbdecc_c5_3_scanin[31] | |
| 2026 | // ff_l2b_l2d_fbdecc_c5_7_scanin[31] | |
| 2027 | // ff_l2b_l2d_fbdecc_c5_9_scanin[31] | |
| 2028 | // ff_l2b_l2d_fbdecc_c5_13_scanin[31] | |
| 2029 | // ff_l2b_l2d_fbdecc_c5_11_scanin[31] | |
| 2030 | // ff_l2b_l2d_fbdecc_c5_15_scanin[31] | |
| 2031 | // ff_l2b_l2d_fbdecc_c5_1_scanin[32] | |
| 2032 | // ff_l2b_l2d_fbdecc_c5_5_scanin[32] | |
| 2033 | // ff_l2b_l2d_fbdecc_c5_3_scanin[32] | |
| 2034 | // ff_l2b_l2d_fbdecc_c5_7_scanin[32] | |
| 2035 | // ff_l2b_l2d_fbdecc_c5_9_scanin[32] | |
| 2036 | // ff_l2b_l2d_fbdecc_c5_13_scanin[32] | |
| 2037 | // ff_l2b_l2d_fbdecc_c5_11_scanin[32] | |
| 2038 | // ff_l2b_l2d_fbdecc_c5_15_scanin[32] | |
| 2039 | // ff_l2b_l2d_fbdecc_c5_1_scanin[33] | |
| 2040 | // ff_l2b_l2d_fbdecc_c5_5_scanin[33] | |
| 2041 | // ff_l2b_l2d_fbdecc_c5_3_scanin[33] | |
| 2042 | // ff_l2b_l2d_fbdecc_c5_7_scanin[33] | |
| 2043 | // ff_l2b_l2d_fbdecc_c5_9_scanin[33] | |
| 2044 | // ff_l2b_l2d_fbdecc_c5_13_scanin[33] | |
| 2045 | // ff_l2b_l2d_fbdecc_c5_11_scanin[33] | |
| 2046 | // ff_l2b_l2d_fbdecc_c5_15_scanin[33] | |
| 2047 | // ff_l2b_l2d_fbdecc_c5_1_scanin[34] | |
| 2048 | // ff_l2b_l2d_fbdecc_c5_5_scanin[34] | |
| 2049 | // ff_l2b_l2d_fbdecc_c5_3_scanin[34] | |
| 2050 | // ff_l2b_l2d_fbdecc_c5_7_scanin[34] | |
| 2051 | // ff_l2b_l2d_fbdecc_c5_9_scanin[34] | |
| 2052 | // ff_l2b_l2d_fbdecc_c5_13_scanin[34] | |
| 2053 | // ff_l2b_l2d_fbdecc_c5_11_scanin[34] | |
| 2054 | // ff_l2b_l2d_fbdecc_c5_15_scanin[34] | |
| 2055 | // ff_l2b_l2d_fbdecc_c5_1_scanin[35] | |
| 2056 | // ff_l2b_l2d_fbdecc_c5_5_scanin[35] | |
| 2057 | // ff_l2b_l2d_fbdecc_c5_3_scanin[35] | |
| 2058 | // ff_l2b_l2d_fbdecc_c5_7_scanin[35] | |
| 2059 | // ff_l2b_l2d_fbdecc_c5_9_scanin[35] | |
| 2060 | // ff_l2b_l2d_fbdecc_c5_13_scanin[35] | |
| 2061 | // ff_l2b_l2d_fbdecc_c5_11_scanin[35] | |
| 2062 | // ff_l2b_l2d_fbdecc_c5_15_scanin[35] | |
| 2063 | // ff_l2b_l2d_fbdecc_c5_1_scanin[36] | |
| 2064 | // ff_l2b_l2d_fbdecc_c5_5_scanin[36] | |
| 2065 | // ff_l2b_l2d_fbdecc_c5_3_scanin[36] | |
| 2066 | // ff_l2b_l2d_fbdecc_c5_7_scanin[36] | |
| 2067 | // ff_l2b_l2d_fbdecc_c5_9_scanin[36] | |
| 2068 | // ff_l2b_l2d_fbdecc_c5_13_scanin[36] | |
| 2069 | // ff_l2b_l2d_fbdecc_c5_11_scanin[36] | |
| 2070 | // ff_l2b_l2d_fbdecc_c5_15_scanin[36] | |
| 2071 | // ff_l2b_l2d_fbdecc_c5_1_scanin[37] | |
| 2072 | // ff_l2b_l2d_fbdecc_c5_5_scanin[37] | |
| 2073 | // ff_l2b_l2d_fbdecc_c5_3_scanin[37] | |
| 2074 | // ff_l2b_l2d_fbdecc_c5_7_scanin[37] | |
| 2075 | // ff_l2b_l2d_fbdecc_c5_9_scanin[37] | |
| 2076 | // ff_l2b_l2d_fbdecc_c5_13_scanin[37] | |
| 2077 | // ff_l2b_l2d_fbdecc_c5_11_scanin[37] | |
| 2078 | // ff_l2b_l2d_fbdecc_c5_15_scanin[37] | |
| 2079 | // ff_l2b_l2d_fbdecc_c5_1_scanin[38] | |
| 2080 | // ff_l2b_l2d_fbdecc_c5_5_scanin[38] | |
| 2081 | // ff_l2b_l2d_fbdecc_c5_3_scanin[38] | |
| 2082 | // ff_l2b_l2d_fbdecc_c5_7_scanin[38] | |
| 2083 | // ff_l2b_l2d_fbdecc_c5_9_scanin[38] | |
| 2084 | // ff_l2b_l2d_fbdecc_c5_13_scanin[38] | |
| 2085 | // ff_l2b_l2d_fbdecc_c5_11_scanin[38] | |
| 2086 | // ff_l2b_l2d_fbdecc_c5_15_scanin[38] | |
| 2087 | // ff_l2b_l2d_fbdecc_c5_2_scanin[0] | |
| 2088 | // ff_l2b_l2d_fbdecc_c5_6_scanin[0] | |
| 2089 | // ff_l2b_l2d_fbdecc_c5_4_scanin[0] | |
| 2090 | // ff_l2b_l2d_fbdecc_c5_8_scanin[0] | |
| 2091 | // ff_l2b_l2d_fbdecc_c5_10_scanin[0] | |
| 2092 | // ff_l2b_l2d_fbdecc_c5_14_scanin[0] | |
| 2093 | // ff_l2b_l2d_fbdecc_c5_12_scanin[0] | |
| 2094 | // ff_l2b_l2d_fbdecc_c5_16_scanin[0] | |
| 2095 | // ff_l2b_l2d_fbdecc_c5_2_scanin[1] | |
| 2096 | // ff_l2b_l2d_fbdecc_c5_6_scanin[1] | |
| 2097 | // ff_l2b_l2d_fbdecc_c5_4_scanin[1] | |
| 2098 | // ff_l2b_l2d_fbdecc_c5_8_scanin[1] | |
| 2099 | // ff_l2b_l2d_fbdecc_c5_10_scanin[1] | |
| 2100 | // ff_l2b_l2d_fbdecc_c5_14_scanin[1] | |
| 2101 | // ff_l2b_l2d_fbdecc_c5_12_scanin[1] | |
| 2102 | // ff_l2b_l2d_fbdecc_c5_16_scanin[1] | |
| 2103 | // ff_l2b_l2d_fbdecc_c5_2_scanin[2] | |
| 2104 | // ff_l2b_l2d_fbdecc_c5_6_scanin[2] | |
| 2105 | // ff_l2b_l2d_fbdecc_c5_4_scanin[2] | |
| 2106 | // ff_l2b_l2d_fbdecc_c5_8_scanin[2] | |
| 2107 | // ff_l2b_l2d_fbdecc_c5_10_scanin[2] | |
| 2108 | // ff_l2b_l2d_fbdecc_c5_14_scanin[2] | |
| 2109 | // ff_l2b_l2d_fbdecc_c5_12_scanin[2] | |
| 2110 | // ff_l2b_l2d_fbdecc_c5_16_scanin[2] | |
| 2111 | // ff_l2b_l2d_fbdecc_c5_2_scanin[3] | |
| 2112 | // ff_l2b_l2d_fbdecc_c5_6_scanin[3] | |
| 2113 | // ff_l2b_l2d_fbdecc_c5_4_scanin[3] | |
| 2114 | // ff_l2b_l2d_fbdecc_c5_8_scanin[3] | |
| 2115 | // ff_l2b_l2d_fbdecc_c5_10_scanin[3] | |
| 2116 | // ff_l2b_l2d_fbdecc_c5_14_scanin[3] | |
| 2117 | // ff_l2b_l2d_fbdecc_c5_12_scanin[3] | |
| 2118 | // ff_l2b_l2d_fbdecc_c5_16_scanin[3] | |
| 2119 | // ff_l2b_l2d_fbdecc_c5_2_scanin[4] | |
| 2120 | // ff_l2b_l2d_fbdecc_c5_6_scanin[4] | |
| 2121 | // ff_l2b_l2d_fbdecc_c5_4_scanin[4] | |
| 2122 | // ff_l2b_l2d_fbdecc_c5_8_scanin[4] | |
| 2123 | // ff_l2b_l2d_fbdecc_c5_10_scanin[4] | |
| 2124 | // ff_l2b_l2d_fbdecc_c5_14_scanin[4] | |
| 2125 | // ff_l2b_l2d_fbdecc_c5_12_scanin[4] | |
| 2126 | // ff_l2b_l2d_fbdecc_c5_16_scanin[4] | |
| 2127 | // ff_l2b_l2d_fbdecc_c5_2_scanin[5] | |
| 2128 | // ff_l2b_l2d_fbdecc_c5_6_scanin[5] | |
| 2129 | // ff_l2b_l2d_fbdecc_c5_4_scanin[5] | |
| 2130 | // ff_l2b_l2d_fbdecc_c5_8_scanin[5] | |
| 2131 | // ff_l2b_l2d_fbdecc_c5_10_scanin[5] | |
| 2132 | // ff_l2b_l2d_fbdecc_c5_14_scanin[5] | |
| 2133 | // ff_l2b_l2d_fbdecc_c5_12_scanin[5] | |
| 2134 | // ff_l2b_l2d_fbdecc_c5_16_scanin[5] | |
| 2135 | // ff_l2b_l2d_fbdecc_c5_2_scanin[6] | |
| 2136 | // ff_l2b_l2d_fbdecc_c5_6_scanin[6] | |
| 2137 | // ff_l2b_l2d_fbdecc_c5_4_scanin[6] | |
| 2138 | // ff_l2b_l2d_fbdecc_c5_8_scanin[6] | |
| 2139 | // ff_l2b_l2d_fbdecc_c5_10_scanin[6] | |
| 2140 | // ff_l2b_l2d_fbdecc_c5_14_scanin[6] | |
| 2141 | // ff_l2b_l2d_fbdecc_c5_12_scanin[6] | |
| 2142 | // ff_l2b_l2d_fbdecc_c5_16_scanin[6] | |
| 2143 | // ff_l2b_l2d_fbdecc_c5_2_scanin[7] | |
| 2144 | // ff_l2b_l2d_fbdecc_c5_6_scanin[7] | |
| 2145 | // ff_l2b_l2d_fbdecc_c5_4_scanin[7] | |
| 2146 | // ff_l2b_l2d_fbdecc_c5_8_scanin[7] | |
| 2147 | // ff_l2b_l2d_fbdecc_c5_10_scanin[7] | |
| 2148 | // ff_l2b_l2d_fbdecc_c5_14_scanin[7] | |
| 2149 | // ff_l2b_l2d_fbdecc_c5_12_scanin[7] | |
| 2150 | // ff_l2b_l2d_fbdecc_c5_16_scanin[7] | |
| 2151 | // ff_l2b_l2d_fbdecc_c5_2_scanin[8] | |
| 2152 | // ff_l2b_l2d_fbdecc_c5_6_scanin[8] | |
| 2153 | // ff_l2b_l2d_fbdecc_c5_4_scanin[8] | |
| 2154 | // ff_l2b_l2d_fbdecc_c5_8_scanin[8] | |
| 2155 | // ff_l2b_l2d_fbdecc_c5_10_scanin[8] | |
| 2156 | // ff_l2b_l2d_fbdecc_c5_14_scanin[8] | |
| 2157 | // ff_l2b_l2d_fbdecc_c5_12_scanin[8] | |
| 2158 | // ff_l2b_l2d_fbdecc_c5_16_scanin[8] | |
| 2159 | // ff_l2b_l2d_fbdecc_c5_2_scanin[9] | |
| 2160 | // ff_l2b_l2d_fbdecc_c5_6_scanin[9] | |
| 2161 | // ff_l2b_l2d_fbdecc_c5_4_scanin[9] | |
| 2162 | // ff_l2b_l2d_fbdecc_c5_8_scanin[9] | |
| 2163 | // ff_l2b_l2d_fbdecc_c5_10_scanin[9] | |
| 2164 | // ff_l2b_l2d_fbdecc_c5_14_scanin[9] | |
| 2165 | // ff_l2b_l2d_fbdecc_c5_12_scanin[9] | |
| 2166 | // ff_l2b_l2d_fbdecc_c5_16_scanin[9] | |
| 2167 | // ff_l2b_l2d_fbdecc_c5_2_scanin[10] | |
| 2168 | // ff_l2b_l2d_fbdecc_c5_6_scanin[10] | |
| 2169 | // ff_l2b_l2d_fbdecc_c5_4_scanin[10] | |
| 2170 | // ff_l2b_l2d_fbdecc_c5_8_scanin[10] | |
| 2171 | // ff_l2b_l2d_fbdecc_c5_10_scanin[10] | |
| 2172 | // ff_l2b_l2d_fbdecc_c5_14_scanin[10] | |
| 2173 | // ff_l2b_l2d_fbdecc_c5_12_scanin[10] | |
| 2174 | // ff_l2b_l2d_fbdecc_c5_16_scanin[10] | |
| 2175 | // ff_l2b_l2d_fbdecc_c5_2_scanin[11] | |
| 2176 | // ff_l2b_l2d_fbdecc_c5_6_scanin[11] | |
| 2177 | // ff_l2b_l2d_fbdecc_c5_4_scanin[11] | |
| 2178 | // ff_l2b_l2d_fbdecc_c5_8_scanin[11] | |
| 2179 | // ff_l2b_l2d_fbdecc_c5_10_scanin[11] | |
| 2180 | // ff_l2b_l2d_fbdecc_c5_14_scanin[11] | |
| 2181 | // ff_l2b_l2d_fbdecc_c5_12_scanin[11] | |
| 2182 | // ff_l2b_l2d_fbdecc_c5_16_scanin[11] | |
| 2183 | // ff_l2b_l2d_fbdecc_c5_2_scanin[12] | |
| 2184 | // ff_l2b_l2d_fbdecc_c5_6_scanin[12] | |
| 2185 | // ff_l2b_l2d_fbdecc_c5_4_scanin[12] | |
| 2186 | // ff_l2b_l2d_fbdecc_c5_8_scanin[12] | |
| 2187 | // ff_l2b_l2d_fbdecc_c5_10_scanin[12] | |
| 2188 | // ff_l2b_l2d_fbdecc_c5_14_scanin[12] | |
| 2189 | // ff_l2b_l2d_fbdecc_c5_12_scanin[12] | |
| 2190 | // ff_l2b_l2d_fbdecc_c5_16_scanin[12] | |
| 2191 | // ff_l2b_l2d_fbdecc_c5_2_scanin[13] | |
| 2192 | // ff_l2b_l2d_fbdecc_c5_6_scanin[13] | |
| 2193 | // ff_l2b_l2d_fbdecc_c5_4_scanin[13] | |
| 2194 | // ff_l2b_l2d_fbdecc_c5_8_scanin[13] | |
| 2195 | // ff_l2b_l2d_fbdecc_c5_10_scanin[13] | |
| 2196 | // ff_l2b_l2d_fbdecc_c5_14_scanin[13] | |
| 2197 | // ff_l2b_l2d_fbdecc_c5_12_scanin[13] | |
| 2198 | // ff_l2b_l2d_fbdecc_c5_16_scanin[13] | |
| 2199 | // ff_l2b_l2d_fbdecc_c5_2_scanin[14] | |
| 2200 | // ff_l2b_l2d_fbdecc_c5_6_scanin[14] | |
| 2201 | // ff_l2b_l2d_fbdecc_c5_4_scanin[14] | |
| 2202 | // ff_l2b_l2d_fbdecc_c5_8_scanin[14] | |
| 2203 | // ff_l2b_l2d_fbdecc_c5_10_scanin[14] | |
| 2204 | // ff_l2b_l2d_fbdecc_c5_14_scanin[14] | |
| 2205 | // ff_l2b_l2d_fbdecc_c5_12_scanin[14] | |
| 2206 | // ff_l2b_l2d_fbdecc_c5_16_scanin[14] | |
| 2207 | // ff_l2b_l2d_fbdecc_c5_2_scanin[15] | |
| 2208 | // ff_l2b_l2d_fbdecc_c5_6_scanin[15] | |
| 2209 | // ff_l2b_l2d_fbdecc_c5_4_scanin[15] | |
| 2210 | // ff_l2b_l2d_fbdecc_c5_8_scanin[15] | |
| 2211 | // ff_l2b_l2d_fbdecc_c5_10_scanin[15] | |
| 2212 | // ff_l2b_l2d_fbdecc_c5_14_scanin[15] | |
| 2213 | // ff_l2b_l2d_fbdecc_c5_12_scanin[15] | |
| 2214 | // ff_l2b_l2d_fbdecc_c5_16_scanin[15] | |
| 2215 | // ff_l2b_l2d_fbdecc_c5_2_scanin[16] | |
| 2216 | // ff_l2b_l2d_fbdecc_c5_6_scanin[16] | |
| 2217 | // ff_l2b_l2d_fbdecc_c5_4_scanin[16] | |
| 2218 | // ff_l2b_l2d_fbdecc_c5_8_scanin[16] | |
| 2219 | // ff_l2b_l2d_fbdecc_c5_10_scanin[16] | |
| 2220 | // ff_l2b_l2d_fbdecc_c5_14_scanin[16] | |
| 2221 | // ff_l2b_l2d_fbdecc_c5_12_scanin[16] | |
| 2222 | // ff_l2b_l2d_fbdecc_c5_16_scanin[16] | |
| 2223 | // ff_l2b_l2d_fbdecc_c5_2_scanin[17] | |
| 2224 | // ff_l2b_l2d_fbdecc_c5_6_scanin[17] | |
| 2225 | // ff_l2b_l2d_fbdecc_c5_4_scanin[17] | |
| 2226 | // ff_l2b_l2d_fbdecc_c5_8_scanin[17] | |
| 2227 | // ff_l2b_l2d_fbdecc_c5_10_scanin[17] | |
| 2228 | // ff_l2b_l2d_fbdecc_c5_14_scanin[17] | |
| 2229 | // ff_l2b_l2d_fbdecc_c5_12_scanin[17] | |
| 2230 | // ff_l2b_l2d_fbdecc_c5_16_scanin[17] | |
| 2231 | // ff_l2b_l2d_fbdecc_c5_2_scanin[18] | |
| 2232 | // ff_l2b_l2d_fbdecc_c5_6_scanin[18] | |
| 2233 | // ff_l2b_l2d_fbdecc_c5_4_scanin[18] | |
| 2234 | // ff_l2b_l2d_fbdecc_c5_8_scanin[18] | |
| 2235 | // ff_l2b_l2d_fbdecc_c5_10_scanin[18] | |
| 2236 | // ff_l2b_l2d_fbdecc_c5_14_scanin[18] | |
| 2237 | // ff_l2b_l2d_fbdecc_c5_12_scanin[18] | |
| 2238 | // ff_l2b_l2d_fbdecc_c5_16_scanin[18] | |
| 2239 | // ff_l2b_l2d_fbdecc_c5_2_scanin[19] | |
| 2240 | // ff_l2b_l2d_fbdecc_c5_6_scanin[19] | |
| 2241 | // ff_l2b_l2d_fbdecc_c5_4_scanin[19] | |
| 2242 | // ff_l2b_l2d_fbdecc_c5_8_scanin[19] | |
| 2243 | // ff_l2b_l2d_fbdecc_c5_10_scanin[19] | |
| 2244 | // ff_l2b_l2d_fbdecc_c5_14_scanin[19] | |
| 2245 | // ff_l2b_l2d_fbdecc_c5_12_scanin[19] | |
| 2246 | // ff_l2b_l2d_fbdecc_c5_16_scanin[19] | |
| 2247 | // ff_l2b_l2d_fbdecc_c5_2_scanin[20] | |
| 2248 | // ff_l2b_l2d_fbdecc_c5_6_scanin[20] | |
| 2249 | // ff_l2b_l2d_fbdecc_c5_4_scanin[20] | |
| 2250 | // ff_l2b_l2d_fbdecc_c5_8_scanin[20] | |
| 2251 | // ff_l2b_l2d_fbdecc_c5_10_scanin[20] | |
| 2252 | // ff_l2b_l2d_fbdecc_c5_14_scanin[20] | |
| 2253 | // ff_l2b_l2d_fbdecc_c5_12_scanin[20] | |
| 2254 | // ff_l2b_l2d_fbdecc_c5_16_scanin[20] | |
| 2255 | // ff_l2b_l2d_fbdecc_c5_2_scanin[21] | |
| 2256 | // ff_l2b_l2d_fbdecc_c5_6_scanin[21] | |
| 2257 | // ff_l2b_l2d_fbdecc_c5_4_scanin[21] | |
| 2258 | // ff_l2b_l2d_fbdecc_c5_8_scanin[21] | |
| 2259 | // ff_l2b_l2d_fbdecc_c5_10_scanin[21] | |
| 2260 | // ff_l2b_l2d_fbdecc_c5_14_scanin[21] | |
| 2261 | // ff_l2b_l2d_fbdecc_c5_12_scanin[21] | |
| 2262 | // ff_l2b_l2d_fbdecc_c5_16_scanin[21] | |
| 2263 | // ff_l2b_l2d_fbdecc_c5_2_scanin[22] | |
| 2264 | // ff_l2b_l2d_fbdecc_c5_6_scanin[22] | |
| 2265 | // ff_l2b_l2d_fbdecc_c5_4_scanin[22] | |
| 2266 | // ff_l2b_l2d_fbdecc_c5_8_scanin[22] | |
| 2267 | // ff_l2b_l2d_fbdecc_c5_10_scanin[22] | |
| 2268 | // ff_l2b_l2d_fbdecc_c5_14_scanin[22] | |
| 2269 | // ff_l2b_l2d_fbdecc_c5_12_scanin[22] | |
| 2270 | // ff_l2b_l2d_fbdecc_c5_16_scanin[22] | |
| 2271 | // ff_l2b_l2d_fbdecc_c5_2_scanin[23] | |
| 2272 | // ff_l2b_l2d_fbdecc_c5_6_scanin[23] | |
| 2273 | // ff_l2b_l2d_fbdecc_c5_4_scanin[23] | |
| 2274 | // ff_l2b_l2d_fbdecc_c5_8_scanin[23] | |
| 2275 | // ff_l2b_l2d_fbdecc_c5_10_scanin[23] | |
| 2276 | // ff_l2b_l2d_fbdecc_c5_14_scanin[23] | |
| 2277 | // ff_l2b_l2d_fbdecc_c5_12_scanin[23] | |
| 2278 | // ff_l2b_l2d_fbdecc_c5_16_scanin[23] | |
| 2279 | // ff_l2b_l2d_fbdecc_c5_2_scanin[24] | |
| 2280 | // ff_l2b_l2d_fbdecc_c5_6_scanin[24] | |
| 2281 | // ff_l2b_l2d_fbdecc_c5_4_scanin[24] | |
| 2282 | // ff_l2b_l2d_fbdecc_c5_8_scanin[24] | |
| 2283 | // ff_l2b_l2d_fbdecc_c5_10_scanin[24] | |
| 2284 | // ff_l2b_l2d_fbdecc_c5_14_scanin[24] | |
| 2285 | // ff_l2b_l2d_fbdecc_c5_12_scanin[24] | |
| 2286 | // ff_l2b_l2d_fbdecc_c5_16_scanin[24] | |
| 2287 | // ff_l2b_l2d_fbdecc_c5_2_scanin[25] | |
| 2288 | // ff_l2b_l2d_fbdecc_c5_6_scanin[25] | |
| 2289 | // ff_l2b_l2d_fbdecc_c5_4_scanin[25] | |
| 2290 | // ff_l2b_l2d_fbdecc_c5_8_scanin[25] | |
| 2291 | // ff_l2b_l2d_fbdecc_c5_10_scanin[25] | |
| 2292 | // ff_l2b_l2d_fbdecc_c5_14_scanin[25] | |
| 2293 | // ff_l2b_l2d_fbdecc_c5_12_scanin[25] | |
| 2294 | // ff_l2b_l2d_fbdecc_c5_16_scanin[25] | |
| 2295 | // ff_l2b_l2d_fbdecc_c5_2_scanin[26] | |
| 2296 | // ff_l2b_l2d_fbdecc_c5_6_scanin[26] | |
| 2297 | // ff_l2b_l2d_fbdecc_c5_4_scanin[26] | |
| 2298 | // ff_l2b_l2d_fbdecc_c5_8_scanin[26] | |
| 2299 | // ff_l2b_l2d_fbdecc_c5_10_scanin[26] | |
| 2300 | // ff_l2b_l2d_fbdecc_c5_14_scanin[26] | |
| 2301 | // ff_l2b_l2d_fbdecc_c5_12_scanin[26] | |
| 2302 | // ff_l2b_l2d_fbdecc_c5_16_scanin[26] | |
| 2303 | // ff_l2b_l2d_fbdecc_c5_2_scanin[27] | |
| 2304 | // ff_l2b_l2d_fbdecc_c5_6_scanin[27] | |
| 2305 | // ff_l2b_l2d_fbdecc_c5_4_scanin[27] | |
| 2306 | // ff_l2b_l2d_fbdecc_c5_8_scanin[27] | |
| 2307 | // ff_l2b_l2d_fbdecc_c5_10_scanin[27] | |
| 2308 | // ff_l2b_l2d_fbdecc_c5_14_scanin[27] | |
| 2309 | // ff_l2b_l2d_fbdecc_c5_12_scanin[27] | |
| 2310 | // ff_l2b_l2d_fbdecc_c5_16_scanin[27] | |
| 2311 | // ff_l2b_l2d_fbdecc_c5_2_scanin[28] | |
| 2312 | // ff_l2b_l2d_fbdecc_c5_6_scanin[28] | |
| 2313 | // ff_l2b_l2d_fbdecc_c5_4_scanin[28] | |
| 2314 | // ff_l2b_l2d_fbdecc_c5_8_scanin[28] | |
| 2315 | // ff_l2b_l2d_fbdecc_c5_10_scanin[28] | |
| 2316 | // ff_l2b_l2d_fbdecc_c5_14_scanin[28] | |
| 2317 | // ff_l2b_l2d_fbdecc_c5_12_scanin[28] | |
| 2318 | // ff_l2b_l2d_fbdecc_c5_16_scanin[28] | |
| 2319 | // ff_l2b_l2d_fbdecc_c5_2_scanin[29] | |
| 2320 | // ff_l2b_l2d_fbdecc_c5_6_scanin[29] | |
| 2321 | // ff_l2b_l2d_fbdecc_c5_4_scanin[29] | |
| 2322 | // ff_l2b_l2d_fbdecc_c5_8_scanin[29] | |
| 2323 | // ff_l2b_l2d_fbdecc_c5_10_scanin[29] | |
| 2324 | // ff_l2b_l2d_fbdecc_c5_14_scanin[29] | |
| 2325 | // ff_l2b_l2d_fbdecc_c5_12_scanin[29] | |
| 2326 | // ff_l2b_l2d_fbdecc_c5_16_scanin[29] | |
| 2327 | // ff_l2b_l2d_fbdecc_c5_2_scanin[30] | |
| 2328 | // ff_l2b_l2d_fbdecc_c5_6_scanin[30] | |
| 2329 | // ff_l2b_l2d_fbdecc_c5_4_scanin[30] | |
| 2330 | // ff_l2b_l2d_fbdecc_c5_8_scanin[30] | |
| 2331 | // ff_l2b_l2d_fbdecc_c5_10_scanin[30] | |
| 2332 | // ff_l2b_l2d_fbdecc_c5_14_scanin[30] | |
| 2333 | // ff_l2b_l2d_fbdecc_c5_12_scanin[30] | |
| 2334 | // ff_l2b_l2d_fbdecc_c5_16_scanin[30] | |
| 2335 | // ff_l2b_l2d_fbdecc_c5_2_scanin[31] | |
| 2336 | // ff_l2b_l2d_fbdecc_c5_6_scanin[31] | |
| 2337 | // ff_l2b_l2d_fbdecc_c5_4_scanin[31] | |
| 2338 | // ff_l2b_l2d_fbdecc_c5_8_scanin[31] | |
| 2339 | // ff_l2b_l2d_fbdecc_c5_10_scanin[31] | |
| 2340 | // ff_l2b_l2d_fbdecc_c5_14_scanin[31] | |
| 2341 | // ff_l2b_l2d_fbdecc_c5_12_scanin[31] | |
| 2342 | // ff_l2b_l2d_fbdecc_c5_16_scanin[31] | |
| 2343 | // ff_l2b_l2d_fbdecc_c5_2_scanin[32] | |
| 2344 | // ff_l2b_l2d_fbdecc_c5_6_scanin[32] | |
| 2345 | // ff_l2b_l2d_fbdecc_c5_4_scanin[32] | |
| 2346 | // ff_l2b_l2d_fbdecc_c5_8_scanin[32] | |
| 2347 | // ff_l2b_l2d_fbdecc_c5_10_scanin[32] | |
| 2348 | // ff_l2b_l2d_fbdecc_c5_14_scanin[32] | |
| 2349 | // ff_l2b_l2d_fbdecc_c5_12_scanin[32] | |
| 2350 | // ff_l2b_l2d_fbdecc_c5_16_scanin[32] | |
| 2351 | // ff_l2b_l2d_fbdecc_c5_2_scanin[33] | |
| 2352 | // ff_l2b_l2d_fbdecc_c5_6_scanin[33] | |
| 2353 | // ff_l2b_l2d_fbdecc_c5_4_scanin[33] | |
| 2354 | // ff_l2b_l2d_fbdecc_c5_8_scanin[33] | |
| 2355 | // ff_l2b_l2d_fbdecc_c5_10_scanin[33] | |
| 2356 | // ff_l2b_l2d_fbdecc_c5_14_scanin[33] | |
| 2357 | // ff_l2b_l2d_fbdecc_c5_12_scanin[33] | |
| 2358 | // ff_l2b_l2d_fbdecc_c5_16_scanin[33] | |
| 2359 | // ff_l2b_l2d_fbdecc_c5_2_scanin[34] | |
| 2360 | // ff_l2b_l2d_fbdecc_c5_6_scanin[34] | |
| 2361 | // ff_l2b_l2d_fbdecc_c5_4_scanin[34] | |
| 2362 | // ff_l2b_l2d_fbdecc_c5_8_scanin[34] | |
| 2363 | // ff_l2b_l2d_fbdecc_c5_10_scanin[34] | |
| 2364 | // ff_l2b_l2d_fbdecc_c5_14_scanin[34] | |
| 2365 | // ff_l2b_l2d_fbdecc_c5_12_scanin[34] | |
| 2366 | // ff_l2b_l2d_fbdecc_c5_16_scanin[34] | |
| 2367 | // ff_l2b_l2d_fbdecc_c5_2_scanin[35] | |
| 2368 | // ff_l2b_l2d_fbdecc_c5_6_scanin[35] | |
| 2369 | // ff_l2b_l2d_fbdecc_c5_4_scanin[35] | |
| 2370 | // ff_l2b_l2d_fbdecc_c5_8_scanin[35] | |
| 2371 | // ff_l2b_l2d_fbdecc_c5_10_scanin[35] | |
| 2372 | // ff_l2b_l2d_fbdecc_c5_14_scanin[35] | |
| 2373 | // ff_l2b_l2d_fbdecc_c5_12_scanin[35] | |
| 2374 | // ff_l2b_l2d_fbdecc_c5_16_scanin[35] | |
| 2375 | // ff_l2b_l2d_fbdecc_c5_2_scanin[36] | |
| 2376 | // ff_l2b_l2d_fbdecc_c5_6_scanin[36] | |
| 2377 | // ff_l2b_l2d_fbdecc_c5_4_scanin[36] | |
| 2378 | // ff_l2b_l2d_fbdecc_c5_8_scanin[36] | |
| 2379 | // ff_l2b_l2d_fbdecc_c5_10_scanin[36] | |
| 2380 | // ff_l2b_l2d_fbdecc_c5_14_scanin[36] | |
| 2381 | // ff_l2b_l2d_fbdecc_c5_12_scanin[36] | |
| 2382 | // ff_l2b_l2d_fbdecc_c5_16_scanin[36] | |
| 2383 | // ff_l2b_l2d_fbdecc_c5_2_scanin[37] | |
| 2384 | // ff_l2b_l2d_fbdecc_c5_6_scanin[37] | |
| 2385 | // ff_l2b_l2d_fbdecc_c5_4_scanin[37] | |
| 2386 | // ff_l2b_l2d_fbdecc_c5_8_scanin[37] | |
| 2387 | // ff_l2b_l2d_fbdecc_c5_10_scanin[37] | |
| 2388 | // ff_l2b_l2d_fbdecc_c5_14_scanin[37] | |
| 2389 | // ff_l2b_l2d_fbdecc_c5_12_scanin[37] | |
| 2390 | // ff_l2b_l2d_fbdecc_c5_16_scanin[37] | |
| 2391 | // ff_l2b_l2d_fbdecc_c5_2_scanin[38] | |
| 2392 | // ff_l2b_l2d_fbdecc_c5_6_scanin[38] | |
| 2393 | // ff_l2b_l2d_fbdecc_c5_4_scanin[38] | |
| 2394 | // ff_l2b_l2d_fbdecc_c5_8_scanin[38] | |
| 2395 | // ff_l2b_l2d_fbdecc_c5_10_scanin[38] | |
| 2396 | // ff_l2b_l2d_fbdecc_c5_14_scanin[38] | |
| 2397 | // ff_l2b_l2d_fbdecc_c5_12_scanin[38] | |
| 2398 | // ff_l2b_l2d_fbdecc_c5_16_scanin[38] | |
| 2399 | ||
| 2400 | // ff_l2d_l2b_decc_out_c7_1_scanin[0] | |
| 2401 | // ff_l2d_l2b_decc_out_c7_5_scanin[0] | |
| 2402 | // ff_l2d_l2b_decc_out_c7_3_scanin[0] | |
| 2403 | // ff_l2d_l2b_decc_out_c7_7_scanin[0] | |
| 2404 | // ff_l2d_l2b_decc_out_c7_9_scanin[0] | |
| 2405 | // ff_l2d_l2b_decc_out_c7_13_scanin[0] | |
| 2406 | // ff_l2d_l2b_decc_out_c7_11_scanin[0] | |
| 2407 | // ff_l2d_l2b_decc_out_c7_15_scanin[0] | |
| 2408 | // ff_l2d_l2b_decc_out_c7_1_scanin[1] | |
| 2409 | // ff_l2d_l2b_decc_out_c7_5_scanin[1] | |
| 2410 | // ff_l2d_l2b_decc_out_c7_3_scanin[1] | |
| 2411 | // ff_l2d_l2b_decc_out_c7_7_scanin[1] | |
| 2412 | // ff_l2d_l2b_decc_out_c7_9_scanin[1] | |
| 2413 | // ff_l2d_l2b_decc_out_c7_13_scanin[1] | |
| 2414 | // ff_l2d_l2b_decc_out_c7_11_scanin[1] | |
| 2415 | // ff_l2d_l2b_decc_out_c7_15_scanin[1] | |
| 2416 | // ff_l2d_l2b_decc_out_c7_1_scanin[2] | |
| 2417 | // ff_l2d_l2b_decc_out_c7_5_scanin[2] | |
| 2418 | // ff_l2d_l2b_decc_out_c7_3_scanin[2] | |
| 2419 | // ff_l2d_l2b_decc_out_c7_7_scanin[2] | |
| 2420 | // ff_l2d_l2b_decc_out_c7_9_scanin[2] | |
| 2421 | // ff_l2d_l2b_decc_out_c7_13_scanin[2] | |
| 2422 | // ff_l2d_l2b_decc_out_c7_11_scanin[2] | |
| 2423 | // ff_l2d_l2b_decc_out_c7_15_scanin[2] | |
| 2424 | // ff_l2d_l2b_decc_out_c7_1_scanin[3] | |
| 2425 | // ff_l2d_l2b_decc_out_c7_5_scanin[3] | |
| 2426 | // ff_l2d_l2b_decc_out_c7_3_scanin[3] | |
| 2427 | // ff_l2d_l2b_decc_out_c7_7_scanin[3] | |
| 2428 | // ff_l2d_l2b_decc_out_c7_9_scanin[3] | |
| 2429 | // ff_l2d_l2b_decc_out_c7_13_scanin[3] | |
| 2430 | // ff_l2d_l2b_decc_out_c7_11_scanin[3] | |
| 2431 | // ff_l2d_l2b_decc_out_c7_15_scanin[3] | |
| 2432 | // ff_l2d_l2b_decc_out_c7_1_scanin[4] | |
| 2433 | // ff_l2d_l2b_decc_out_c7_5_scanin[4] | |
| 2434 | // ff_l2d_l2b_decc_out_c7_3_scanin[4] | |
| 2435 | // ff_l2d_l2b_decc_out_c7_7_scanin[4] | |
| 2436 | // ff_l2d_l2b_decc_out_c7_9_scanin[4] | |
| 2437 | // ff_l2d_l2b_decc_out_c7_13_scanin[4] | |
| 2438 | // ff_l2d_l2b_decc_out_c7_11_scanin[4] | |
| 2439 | // ff_l2d_l2b_decc_out_c7_15_scanin[4] | |
| 2440 | // ff_l2d_l2b_decc_out_c7_1_scanin[5] | |
| 2441 | // ff_l2d_l2b_decc_out_c7_5_scanin[5] | |
| 2442 | // ff_l2d_l2b_decc_out_c7_3_scanin[5] | |
| 2443 | // ff_l2d_l2b_decc_out_c7_7_scanin[5] | |
| 2444 | // ff_l2d_l2b_decc_out_c7_9_scanin[5] | |
| 2445 | // ff_l2d_l2b_decc_out_c7_13_scanin[5] | |
| 2446 | // ff_l2d_l2b_decc_out_c7_11_scanin[5] | |
| 2447 | // ff_l2d_l2b_decc_out_c7_15_scanin[5] | |
| 2448 | // ff_l2d_l2b_decc_out_c7_1_scanin[6] | |
| 2449 | // ff_l2d_l2b_decc_out_c7_5_scanin[6] | |
| 2450 | // ff_l2d_l2b_decc_out_c7_3_scanin[6] | |
| 2451 | // ff_l2d_l2b_decc_out_c7_7_scanin[6] | |
| 2452 | // ff_l2d_l2b_decc_out_c7_9_scanin[6] | |
| 2453 | // ff_l2d_l2b_decc_out_c7_13_scanin[6] | |
| 2454 | // ff_l2d_l2b_decc_out_c7_11_scanin[6] | |
| 2455 | // ff_l2d_l2b_decc_out_c7_15_scanin[6] | |
| 2456 | // ff_l2d_l2b_decc_out_c7_1_scanin[7] | |
| 2457 | // ff_l2d_l2b_decc_out_c7_5_scanin[7] | |
| 2458 | // ff_l2d_l2b_decc_out_c7_3_scanin[7] | |
| 2459 | // ff_l2d_l2b_decc_out_c7_7_scanin[7] | |
| 2460 | // ff_l2d_l2b_decc_out_c7_9_scanin[7] | |
| 2461 | // ff_l2d_l2b_decc_out_c7_13_scanin[7] | |
| 2462 | // ff_l2d_l2b_decc_out_c7_11_scanin[7] | |
| 2463 | // ff_l2d_l2b_decc_out_c7_15_scanin[7] | |
| 2464 | // ff_l2d_l2b_decc_out_c7_1_scanin[8] | |
| 2465 | // ff_l2d_l2b_decc_out_c7_5_scanin[8] | |
| 2466 | // ff_l2d_l2b_decc_out_c7_3_scanin[8] | |
| 2467 | // ff_l2d_l2b_decc_out_c7_7_scanin[8] | |
| 2468 | // ff_l2d_l2b_decc_out_c7_9_scanin[8] | |
| 2469 | // ff_l2d_l2b_decc_out_c7_13_scanin[8] | |
| 2470 | // ff_l2d_l2b_decc_out_c7_11_scanin[8] | |
| 2471 | // ff_l2d_l2b_decc_out_c7_15_scanin[8] | |
| 2472 | // ff_l2d_l2b_decc_out_c7_1_scanin[9] | |
| 2473 | // ff_l2d_l2b_decc_out_c7_5_scanin[9] | |
| 2474 | // ff_l2d_l2b_decc_out_c7_3_scanin[9] | |
| 2475 | // ff_l2d_l2b_decc_out_c7_7_scanin[9] | |
| 2476 | // ff_l2d_l2b_decc_out_c7_9_scanin[9] | |
| 2477 | // ff_l2d_l2b_decc_out_c7_13_scanin[9] | |
| 2478 | // ff_l2d_l2b_decc_out_c7_11_scanin[9] | |
| 2479 | // ff_l2d_l2b_decc_out_c7_15_scanin[9] | |
| 2480 | // ff_l2d_l2b_decc_out_c7_1_scanin[10] | |
| 2481 | // ff_l2d_l2b_decc_out_c7_5_scanin[10] | |
| 2482 | // ff_l2d_l2b_decc_out_c7_3_scanin[10] | |
| 2483 | // ff_l2d_l2b_decc_out_c7_7_scanin[10] | |
| 2484 | // ff_l2d_l2b_decc_out_c7_9_scanin[10] | |
| 2485 | // ff_l2d_l2b_decc_out_c7_13_scanin[10] | |
| 2486 | // ff_l2d_l2b_decc_out_c7_11_scanin[10] | |
| 2487 | // ff_l2d_l2b_decc_out_c7_15_scanin[10] | |
| 2488 | // ff_l2d_l2b_decc_out_c7_1_scanin[11] | |
| 2489 | // ff_l2d_l2b_decc_out_c7_5_scanin[11] | |
| 2490 | // ff_l2d_l2b_decc_out_c7_3_scanin[11] | |
| 2491 | // ff_l2d_l2b_decc_out_c7_7_scanin[11] | |
| 2492 | // ff_l2d_l2b_decc_out_c7_9_scanin[11] | |
| 2493 | // ff_l2d_l2b_decc_out_c7_13_scanin[11] | |
| 2494 | // ff_l2d_l2b_decc_out_c7_11_scanin[11] | |
| 2495 | // ff_l2d_l2b_decc_out_c7_15_scanin[11] | |
| 2496 | // ff_l2d_l2b_decc_out_c7_1_scanin[12] | |
| 2497 | // ff_l2d_l2b_decc_out_c7_5_scanin[12] | |
| 2498 | // ff_l2d_l2b_decc_out_c7_3_scanin[12] | |
| 2499 | // ff_l2d_l2b_decc_out_c7_7_scanin[12] | |
| 2500 | // ff_l2d_l2b_decc_out_c7_9_scanin[12] | |
| 2501 | // ff_l2d_l2b_decc_out_c7_13_scanin[12] | |
| 2502 | // ff_l2d_l2b_decc_out_c7_11_scanin[12] | |
| 2503 | // ff_l2d_l2b_decc_out_c7_15_scanin[12] | |
| 2504 | // ff_l2d_l2b_decc_out_c7_1_scanin[13] | |
| 2505 | // ff_l2d_l2b_decc_out_c7_5_scanin[13] | |
| 2506 | // ff_l2d_l2b_decc_out_c7_3_scanin[13] | |
| 2507 | // ff_l2d_l2b_decc_out_c7_7_scanin[13] | |
| 2508 | // ff_l2d_l2b_decc_out_c7_9_scanin[13] | |
| 2509 | // ff_l2d_l2b_decc_out_c7_13_scanin[13] | |
| 2510 | // ff_l2d_l2b_decc_out_c7_11_scanin[13] | |
| 2511 | // ff_l2d_l2b_decc_out_c7_15_scanin[13] | |
| 2512 | // ff_l2d_l2b_decc_out_c7_1_scanin[14] | |
| 2513 | // ff_l2d_l2b_decc_out_c7_5_scanin[14] | |
| 2514 | // ff_l2d_l2b_decc_out_c7_3_scanin[14] | |
| 2515 | // ff_l2d_l2b_decc_out_c7_7_scanin[14] | |
| 2516 | // ff_l2d_l2b_decc_out_c7_9_scanin[14] | |
| 2517 | // ff_l2d_l2b_decc_out_c7_13_scanin[14] | |
| 2518 | // ff_l2d_l2b_decc_out_c7_11_scanin[14] | |
| 2519 | // ff_l2d_l2b_decc_out_c7_15_scanin[14] | |
| 2520 | // ff_l2d_l2b_decc_out_c7_1_scanin[15] | |
| 2521 | // ff_l2d_l2b_decc_out_c7_5_scanin[15] | |
| 2522 | // ff_l2d_l2b_decc_out_c7_3_scanin[15] | |
| 2523 | // ff_l2d_l2b_decc_out_c7_7_scanin[15] | |
| 2524 | // ff_l2d_l2b_decc_out_c7_9_scanin[15] | |
| 2525 | // ff_l2d_l2b_decc_out_c7_13_scanin[15] | |
| 2526 | // ff_l2d_l2b_decc_out_c7_11_scanin[15] | |
| 2527 | // ff_l2d_l2b_decc_out_c7_15_scanin[15] | |
| 2528 | // ff_l2d_l2b_decc_out_c7_1_scanin[16] | |
| 2529 | // ff_l2d_l2b_decc_out_c7_5_scanin[16] | |
| 2530 | // ff_l2d_l2b_decc_out_c7_3_scanin[16] | |
| 2531 | // ff_l2d_l2b_decc_out_c7_7_scanin[16] | |
| 2532 | // ff_l2d_l2b_decc_out_c7_9_scanin[16] | |
| 2533 | // ff_l2d_l2b_decc_out_c7_13_scanin[16] | |
| 2534 | // ff_l2d_l2b_decc_out_c7_11_scanin[16] | |
| 2535 | // ff_l2d_l2b_decc_out_c7_15_scanin[16] | |
| 2536 | // ff_l2d_l2b_decc_out_c7_1_scanin[17] | |
| 2537 | // ff_l2d_l2b_decc_out_c7_5_scanin[17] | |
| 2538 | // ff_l2d_l2b_decc_out_c7_3_scanin[17] | |
| 2539 | // ff_l2d_l2b_decc_out_c7_7_scanin[17] | |
| 2540 | // ff_l2d_l2b_decc_out_c7_9_scanin[17] | |
| 2541 | // ff_l2d_l2b_decc_out_c7_13_scanin[17] | |
| 2542 | // ff_l2d_l2b_decc_out_c7_11_scanin[17] | |
| 2543 | // ff_l2d_l2b_decc_out_c7_15_scanin[17] | |
| 2544 | // ff_l2d_l2b_decc_out_c7_1_scanin[18] | |
| 2545 | // ff_l2d_l2b_decc_out_c7_5_scanin[18] | |
| 2546 | // ff_l2d_l2b_decc_out_c7_3_scanin[18] | |
| 2547 | // ff_l2d_l2b_decc_out_c7_7_scanin[18] | |
| 2548 | // ff_l2d_l2b_decc_out_c7_9_scanin[18] | |
| 2549 | // ff_l2d_l2b_decc_out_c7_13_scanin[18] | |
| 2550 | // ff_l2d_l2b_decc_out_c7_11_scanin[18] | |
| 2551 | // ff_l2d_l2b_decc_out_c7_15_scanin[18] | |
| 2552 | // ff_l2d_l2b_decc_out_c7_1_scanin[19] | |
| 2553 | // ff_l2d_l2b_decc_out_c7_5_scanin[19] | |
| 2554 | // ff_l2d_l2b_decc_out_c7_3_scanin[19] | |
| 2555 | // ff_l2d_l2b_decc_out_c7_7_scanin[19] | |
| 2556 | // ff_l2d_l2b_decc_out_c7_9_scanin[19] | |
| 2557 | // ff_l2d_l2b_decc_out_c7_13_scanin[19] | |
| 2558 | // ff_l2d_l2b_decc_out_c7_11_scanin[19] | |
| 2559 | // ff_l2d_l2b_decc_out_c7_15_scanin[19] | |
| 2560 | // ff_l2d_l2b_decc_out_c7_1_scanin[20] | |
| 2561 | // ff_l2d_l2b_decc_out_c7_5_scanin[20] | |
| 2562 | // ff_l2d_l2b_decc_out_c7_3_scanin[20] | |
| 2563 | // ff_l2d_l2b_decc_out_c7_7_scanin[20] | |
| 2564 | // ff_l2d_l2b_decc_out_c7_9_scanin[20] | |
| 2565 | // ff_l2d_l2b_decc_out_c7_13_scanin[20] | |
| 2566 | // ff_l2d_l2b_decc_out_c7_11_scanin[20] | |
| 2567 | // ff_l2d_l2b_decc_out_c7_15_scanin[20] | |
| 2568 | // ff_l2d_l2b_decc_out_c7_1_scanin[21] | |
| 2569 | // ff_l2d_l2b_decc_out_c7_5_scanin[21] | |
| 2570 | // ff_l2d_l2b_decc_out_c7_3_scanin[21] | |
| 2571 | // ff_l2d_l2b_decc_out_c7_7_scanin[21] | |
| 2572 | // ff_l2d_l2b_decc_out_c7_9_scanin[21] | |
| 2573 | // ff_l2d_l2b_decc_out_c7_13_scanin[21] | |
| 2574 | // ff_l2d_l2b_decc_out_c7_11_scanin[21] | |
| 2575 | // ff_l2d_l2b_decc_out_c7_15_scanin[21] | |
| 2576 | // ff_l2d_l2b_decc_out_c7_1_scanin[22] | |
| 2577 | // ff_l2d_l2b_decc_out_c7_5_scanin[22] | |
| 2578 | // ff_l2d_l2b_decc_out_c7_3_scanin[22] | |
| 2579 | // ff_l2d_l2b_decc_out_c7_7_scanin[22] | |
| 2580 | // ff_l2d_l2b_decc_out_c7_9_scanin[22] | |
| 2581 | // ff_l2d_l2b_decc_out_c7_13_scanin[22] | |
| 2582 | // ff_l2d_l2b_decc_out_c7_11_scanin[22] | |
| 2583 | // ff_l2d_l2b_decc_out_c7_15_scanin[22] | |
| 2584 | // ff_l2d_l2b_decc_out_c7_1_scanin[23] | |
| 2585 | // ff_l2d_l2b_decc_out_c7_5_scanin[23] | |
| 2586 | // ff_l2d_l2b_decc_out_c7_3_scanin[23] | |
| 2587 | // ff_l2d_l2b_decc_out_c7_7_scanin[23] | |
| 2588 | // ff_l2d_l2b_decc_out_c7_9_scanin[23] | |
| 2589 | // ff_l2d_l2b_decc_out_c7_13_scanin[23] | |
| 2590 | // ff_l2d_l2b_decc_out_c7_11_scanin[23] | |
| 2591 | // ff_l2d_l2b_decc_out_c7_15_scanin[23] | |
| 2592 | // ff_l2d_l2b_decc_out_c7_1_scanin[24] | |
| 2593 | // ff_l2d_l2b_decc_out_c7_5_scanin[24] | |
| 2594 | // ff_l2d_l2b_decc_out_c7_3_scanin[24] | |
| 2595 | // ff_l2d_l2b_decc_out_c7_7_scanin[24] | |
| 2596 | // ff_l2d_l2b_decc_out_c7_9_scanin[24] | |
| 2597 | // ff_l2d_l2b_decc_out_c7_13_scanin[24] | |
| 2598 | // ff_l2d_l2b_decc_out_c7_11_scanin[24] | |
| 2599 | // ff_l2d_l2b_decc_out_c7_15_scanin[24] | |
| 2600 | // ff_l2d_l2b_decc_out_c7_1_scanin[25] | |
| 2601 | // ff_l2d_l2b_decc_out_c7_5_scanin[25] | |
| 2602 | // ff_l2d_l2b_decc_out_c7_3_scanin[25] | |
| 2603 | // ff_l2d_l2b_decc_out_c7_7_scanin[25] | |
| 2604 | // ff_l2d_l2b_decc_out_c7_9_scanin[25] | |
| 2605 | // ff_l2d_l2b_decc_out_c7_13_scanin[25] | |
| 2606 | // ff_l2d_l2b_decc_out_c7_11_scanin[25] | |
| 2607 | // ff_l2d_l2b_decc_out_c7_15_scanin[25] | |
| 2608 | // ff_l2d_l2b_decc_out_c7_1_scanin[26] | |
| 2609 | // ff_l2d_l2b_decc_out_c7_5_scanin[26] | |
| 2610 | // ff_l2d_l2b_decc_out_c7_3_scanin[26] | |
| 2611 | // ff_l2d_l2b_decc_out_c7_7_scanin[26] | |
| 2612 | // ff_l2d_l2b_decc_out_c7_9_scanin[26] | |
| 2613 | // ff_l2d_l2b_decc_out_c7_13_scanin[26] | |
| 2614 | // ff_l2d_l2b_decc_out_c7_11_scanin[26] | |
| 2615 | // ff_l2d_l2b_decc_out_c7_15_scanin[26] | |
| 2616 | // ff_l2d_l2b_decc_out_c7_1_scanin[27] | |
| 2617 | // ff_l2d_l2b_decc_out_c7_5_scanin[27] | |
| 2618 | // ff_l2d_l2b_decc_out_c7_3_scanin[27] | |
| 2619 | // ff_l2d_l2b_decc_out_c7_7_scanin[27] | |
| 2620 | // ff_l2d_l2b_decc_out_c7_9_scanin[27] | |
| 2621 | // ff_l2d_l2b_decc_out_c7_13_scanin[27] | |
| 2622 | // ff_l2d_l2b_decc_out_c7_11_scanin[27] | |
| 2623 | // ff_l2d_l2b_decc_out_c7_15_scanin[27] | |
| 2624 | // ff_l2d_l2b_decc_out_c7_1_scanin[28] | |
| 2625 | // ff_l2d_l2b_decc_out_c7_5_scanin[28] | |
| 2626 | // ff_l2d_l2b_decc_out_c7_3_scanin[28] | |
| 2627 | // ff_l2d_l2b_decc_out_c7_7_scanin[28] | |
| 2628 | // ff_l2d_l2b_decc_out_c7_9_scanin[28] | |
| 2629 | // ff_l2d_l2b_decc_out_c7_13_scanin[28] | |
| 2630 | // ff_l2d_l2b_decc_out_c7_11_scanin[28] | |
| 2631 | // ff_l2d_l2b_decc_out_c7_15_scanin[28] | |
| 2632 | // ff_l2d_l2b_decc_out_c7_1_scanin[29] | |
| 2633 | // ff_l2d_l2b_decc_out_c7_5_scanin[29] | |
| 2634 | // ff_l2d_l2b_decc_out_c7_3_scanin[29] | |
| 2635 | // ff_l2d_l2b_decc_out_c7_7_scanin[29] | |
| 2636 | // ff_l2d_l2b_decc_out_c7_9_scanin[29] | |
| 2637 | // ff_l2d_l2b_decc_out_c7_13_scanin[29] | |
| 2638 | // ff_l2d_l2b_decc_out_c7_11_scanin[29] | |
| 2639 | // ff_l2d_l2b_decc_out_c7_15_scanin[29] | |
| 2640 | // ff_l2d_l2b_decc_out_c7_1_scanin[30] | |
| 2641 | // ff_l2d_l2b_decc_out_c7_5_scanin[30] | |
| 2642 | // ff_l2d_l2b_decc_out_c7_3_scanin[30] | |
| 2643 | // ff_l2d_l2b_decc_out_c7_7_scanin[30] | |
| 2644 | // ff_l2d_l2b_decc_out_c7_9_scanin[30] | |
| 2645 | // ff_l2d_l2b_decc_out_c7_13_scanin[30] | |
| 2646 | // ff_l2d_l2b_decc_out_c7_11_scanin[30] | |
| 2647 | // ff_l2d_l2b_decc_out_c7_15_scanin[30] | |
| 2648 | // ff_l2d_l2b_decc_out_c7_1_scanin[31] | |
| 2649 | // ff_l2d_l2b_decc_out_c7_5_scanin[31] | |
| 2650 | // ff_l2d_l2b_decc_out_c7_3_scanin[31] | |
| 2651 | // ff_l2d_l2b_decc_out_c7_7_scanin[31] | |
| 2652 | // ff_l2d_l2b_decc_out_c7_9_scanin[31] | |
| 2653 | // ff_l2d_l2b_decc_out_c7_13_scanin[31] | |
| 2654 | // ff_l2d_l2b_decc_out_c7_11_scanin[31] | |
| 2655 | // ff_l2d_l2b_decc_out_c7_15_scanin[31] | |
| 2656 | // ff_l2d_l2b_decc_out_c7_1_scanin[32] | |
| 2657 | // ff_l2d_l2b_decc_out_c7_5_scanin[32] | |
| 2658 | // ff_l2d_l2b_decc_out_c7_3_scanin[32] | |
| 2659 | // ff_l2d_l2b_decc_out_c7_7_scanin[32] | |
| 2660 | // ff_l2d_l2b_decc_out_c7_9_scanin[32] | |
| 2661 | // ff_l2d_l2b_decc_out_c7_13_scanin[32] | |
| 2662 | // ff_l2d_l2b_decc_out_c7_11_scanin[32] | |
| 2663 | // ff_l2d_l2b_decc_out_c7_15_scanin[32] | |
| 2664 | // ff_l2d_l2b_decc_out_c7_1_scanin[33] | |
| 2665 | // ff_l2d_l2b_decc_out_c7_5_scanin[33] | |
| 2666 | // ff_l2d_l2b_decc_out_c7_3_scanin[33] | |
| 2667 | // ff_l2d_l2b_decc_out_c7_7_scanin[33] | |
| 2668 | // ff_l2d_l2b_decc_out_c7_9_scanin[33] | |
| 2669 | // ff_l2d_l2b_decc_out_c7_13_scanin[33] | |
| 2670 | // ff_l2d_l2b_decc_out_c7_11_scanin[33] | |
| 2671 | // ff_l2d_l2b_decc_out_c7_15_scanin[33] | |
| 2672 | // ff_l2d_l2b_decc_out_c7_1_scanin[34] | |
| 2673 | // ff_l2d_l2b_decc_out_c7_5_scanin[34] | |
| 2674 | // ff_l2d_l2b_decc_out_c7_3_scanin[34] | |
| 2675 | // ff_l2d_l2b_decc_out_c7_7_scanin[34] | |
| 2676 | // ff_l2d_l2b_decc_out_c7_9_scanin[34] | |
| 2677 | // ff_l2d_l2b_decc_out_c7_13_scanin[34] | |
| 2678 | // ff_l2d_l2b_decc_out_c7_11_scanin[34] | |
| 2679 | // ff_l2d_l2b_decc_out_c7_15_scanin[34] | |
| 2680 | // ff_l2d_l2b_decc_out_c7_1_scanin[35] | |
| 2681 | // ff_l2d_l2b_decc_out_c7_5_scanin[35] | |
| 2682 | // ff_l2d_l2b_decc_out_c7_3_scanin[35] | |
| 2683 | // ff_l2d_l2b_decc_out_c7_7_scanin[35] | |
| 2684 | // ff_l2d_l2b_decc_out_c7_9_scanin[35] | |
| 2685 | // ff_l2d_l2b_decc_out_c7_13_scanin[35] | |
| 2686 | // ff_l2d_l2b_decc_out_c7_11_scanin[35] | |
| 2687 | // ff_l2d_l2b_decc_out_c7_15_scanin[35] | |
| 2688 | // ff_l2d_l2b_decc_out_c7_1_scanin[36] | |
| 2689 | // ff_l2d_l2b_decc_out_c7_5_scanin[36] | |
| 2690 | // ff_l2d_l2b_decc_out_c7_3_scanin[36] | |
| 2691 | // ff_l2d_l2b_decc_out_c7_7_scanin[36] | |
| 2692 | // ff_l2d_l2b_decc_out_c7_9_scanin[36] | |
| 2693 | // ff_l2d_l2b_decc_out_c7_13_scanin[36] | |
| 2694 | // ff_l2d_l2b_decc_out_c7_11_scanin[36] | |
| 2695 | // ff_l2d_l2b_decc_out_c7_15_scanin[36] | |
| 2696 | // ff_l2d_l2b_decc_out_c7_1_scanin[37] | |
| 2697 | // ff_l2d_l2b_decc_out_c7_5_scanin[37] | |
| 2698 | // ff_l2d_l2b_decc_out_c7_3_scanin[37] | |
| 2699 | // ff_l2d_l2b_decc_out_c7_7_scanin[37] | |
| 2700 | // ff_l2d_l2b_decc_out_c7_9_scanin[37] | |
| 2701 | // ff_l2d_l2b_decc_out_c7_13_scanin[37] | |
| 2702 | // ff_l2d_l2b_decc_out_c7_11_scanin[37] | |
| 2703 | // ff_l2d_l2b_decc_out_c7_15_scanin[37] | |
| 2704 | // ff_l2d_l2b_decc_out_c7_1_scanin[38] | |
| 2705 | // ff_l2d_l2b_decc_out_c7_5_scanin[38] | |
| 2706 | // ff_l2d_l2b_decc_out_c7_3_scanin[38] | |
| 2707 | // ff_l2d_l2b_decc_out_c7_7_scanin[38] | |
| 2708 | // ff_l2d_l2b_decc_out_c7_9_scanin[38] | |
| 2709 | // ff_l2d_l2b_decc_out_c7_13_scanin[38] | |
| 2710 | // ff_l2d_l2b_decc_out_c7_11_scanin[38] | |
| 2711 | // ff_l2d_l2b_decc_out_c7_15_scanin[38] | |
| 2712 | // ff_l2d_l2b_decc_out_c7_2_scanin[0] | |
| 2713 | // ff_l2d_l2b_decc_out_c7_6_scanin[0] | |
| 2714 | // ff_l2d_l2b_decc_out_c7_4_scanin[0] | |
| 2715 | // ff_l2d_l2b_decc_out_c7_8_scanin[0] | |
| 2716 | // ff_l2d_l2b_decc_out_c7_10_scanin[0] | |
| 2717 | // ff_l2d_l2b_decc_out_c7_14_scanin[0] | |
| 2718 | // ff_l2d_l2b_decc_out_c7_12_scanin[0] | |
| 2719 | // ff_l2d_l2b_decc_out_c7_16_scanin[0] | |
| 2720 | // ff_l2d_l2b_decc_out_c7_2_scanin[1] | |
| 2721 | // ff_l2d_l2b_decc_out_c7_6_scanin[1] | |
| 2722 | // ff_l2d_l2b_decc_out_c7_4_scanin[1] | |
| 2723 | // ff_l2d_l2b_decc_out_c7_8_scanin[1] | |
| 2724 | // ff_l2d_l2b_decc_out_c7_10_scanin[1] | |
| 2725 | // ff_l2d_l2b_decc_out_c7_14_scanin[1] | |
| 2726 | // ff_l2d_l2b_decc_out_c7_12_scanin[1] | |
| 2727 | // ff_l2d_l2b_decc_out_c7_16_scanin[1] | |
| 2728 | // ff_l2d_l2b_decc_out_c7_2_scanin[2] | |
| 2729 | // ff_l2d_l2b_decc_out_c7_6_scanin[2] | |
| 2730 | // ff_l2d_l2b_decc_out_c7_4_scanin[2] | |
| 2731 | // ff_l2d_l2b_decc_out_c7_8_scanin[2] | |
| 2732 | // ff_l2d_l2b_decc_out_c7_10_scanin[2] | |
| 2733 | // ff_l2d_l2b_decc_out_c7_14_scanin[2] | |
| 2734 | // ff_l2d_l2b_decc_out_c7_12_scanin[2] | |
| 2735 | // ff_l2d_l2b_decc_out_c7_16_scanin[2] | |
| 2736 | // ff_l2d_l2b_decc_out_c7_2_scanin[3] | |
| 2737 | // ff_l2d_l2b_decc_out_c7_6_scanin[3] | |
| 2738 | // ff_l2d_l2b_decc_out_c7_4_scanin[3] | |
| 2739 | // ff_l2d_l2b_decc_out_c7_8_scanin[3] | |
| 2740 | // ff_l2d_l2b_decc_out_c7_10_scanin[3] | |
| 2741 | // ff_l2d_l2b_decc_out_c7_14_scanin[3] | |
| 2742 | // ff_l2d_l2b_decc_out_c7_12_scanin[3] | |
| 2743 | // ff_l2d_l2b_decc_out_c7_16_scanin[3] | |
| 2744 | // ff_l2d_l2b_decc_out_c7_2_scanin[4] | |
| 2745 | // ff_l2d_l2b_decc_out_c7_6_scanin[4] | |
| 2746 | // ff_l2d_l2b_decc_out_c7_4_scanin[4] | |
| 2747 | // ff_l2d_l2b_decc_out_c7_8_scanin[4] | |
| 2748 | // ff_l2d_l2b_decc_out_c7_10_scanin[4] | |
| 2749 | // ff_l2d_l2b_decc_out_c7_14_scanin[4] | |
| 2750 | // ff_l2d_l2b_decc_out_c7_12_scanin[4] | |
| 2751 | // ff_l2d_l2b_decc_out_c7_16_scanin[4] | |
| 2752 | // ff_l2d_l2b_decc_out_c7_2_scanin[5] | |
| 2753 | // ff_l2d_l2b_decc_out_c7_6_scanin[5] | |
| 2754 | // ff_l2d_l2b_decc_out_c7_4_scanin[5] | |
| 2755 | // ff_l2d_l2b_decc_out_c7_8_scanin[5] | |
| 2756 | // ff_l2d_l2b_decc_out_c7_10_scanin[5] | |
| 2757 | // ff_l2d_l2b_decc_out_c7_14_scanin[5] | |
| 2758 | // ff_l2d_l2b_decc_out_c7_12_scanin[5] | |
| 2759 | // ff_l2d_l2b_decc_out_c7_16_scanin[5] | |
| 2760 | // ff_l2d_l2b_decc_out_c7_2_scanin[6] | |
| 2761 | // ff_l2d_l2b_decc_out_c7_6_scanin[6] | |
| 2762 | // ff_l2d_l2b_decc_out_c7_4_scanin[6] | |
| 2763 | // ff_l2d_l2b_decc_out_c7_8_scanin[6] | |
| 2764 | // ff_l2d_l2b_decc_out_c7_10_scanin[6] | |
| 2765 | // ff_l2d_l2b_decc_out_c7_14_scanin[6] | |
| 2766 | // ff_l2d_l2b_decc_out_c7_12_scanin[6] | |
| 2767 | // ff_l2d_l2b_decc_out_c7_16_scanin[6] | |
| 2768 | // ff_l2d_l2b_decc_out_c7_2_scanin[7] | |
| 2769 | // ff_l2d_l2b_decc_out_c7_6_scanin[7] | |
| 2770 | // ff_l2d_l2b_decc_out_c7_4_scanin[7] | |
| 2771 | // ff_l2d_l2b_decc_out_c7_8_scanin[7] | |
| 2772 | // ff_l2d_l2b_decc_out_c7_10_scanin[7] | |
| 2773 | // ff_l2d_l2b_decc_out_c7_14_scanin[7] | |
| 2774 | // ff_l2d_l2b_decc_out_c7_12_scanin[7] | |
| 2775 | // ff_l2d_l2b_decc_out_c7_16_scanin[7] | |
| 2776 | // ff_l2d_l2b_decc_out_c7_2_scanin[8] | |
| 2777 | // ff_l2d_l2b_decc_out_c7_6_scanin[8] | |
| 2778 | // ff_l2d_l2b_decc_out_c7_4_scanin[8] | |
| 2779 | // ff_l2d_l2b_decc_out_c7_8_scanin[8] | |
| 2780 | // ff_l2d_l2b_decc_out_c7_10_scanin[8] | |
| 2781 | // ff_l2d_l2b_decc_out_c7_14_scanin[8] | |
| 2782 | // ff_l2d_l2b_decc_out_c7_12_scanin[8] | |
| 2783 | // ff_l2d_l2b_decc_out_c7_16_scanin[8] | |
| 2784 | // ff_l2d_l2b_decc_out_c7_2_scanin[9] | |
| 2785 | // ff_l2d_l2b_decc_out_c7_6_scanin[9] | |
| 2786 | // ff_l2d_l2b_decc_out_c7_4_scanin[9] | |
| 2787 | // ff_l2d_l2b_decc_out_c7_8_scanin[9] | |
| 2788 | // ff_l2d_l2b_decc_out_c7_10_scanin[9] | |
| 2789 | // ff_l2d_l2b_decc_out_c7_14_scanin[9] | |
| 2790 | // ff_l2d_l2b_decc_out_c7_12_scanin[9] | |
| 2791 | // ff_l2d_l2b_decc_out_c7_16_scanin[9] | |
| 2792 | // ff_l2d_l2b_decc_out_c7_2_scanin[10] | |
| 2793 | // ff_l2d_l2b_decc_out_c7_6_scanin[10] | |
| 2794 | // ff_l2d_l2b_decc_out_c7_4_scanin[10] | |
| 2795 | // ff_l2d_l2b_decc_out_c7_8_scanin[10] | |
| 2796 | // ff_l2d_l2b_decc_out_c7_10_scanin[10] | |
| 2797 | // ff_l2d_l2b_decc_out_c7_14_scanin[10] | |
| 2798 | // ff_l2d_l2b_decc_out_c7_12_scanin[10] | |
| 2799 | // ff_l2d_l2b_decc_out_c7_16_scanin[10] | |
| 2800 | // ff_l2d_l2b_decc_out_c7_2_scanin[11] | |
| 2801 | // ff_l2d_l2b_decc_out_c7_6_scanin[11] | |
| 2802 | // ff_l2d_l2b_decc_out_c7_4_scanin[11] | |
| 2803 | // ff_l2d_l2b_decc_out_c7_8_scanin[11] | |
| 2804 | // ff_l2d_l2b_decc_out_c7_10_scanin[11] | |
| 2805 | // ff_l2d_l2b_decc_out_c7_14_scanin[11] | |
| 2806 | // ff_l2d_l2b_decc_out_c7_12_scanin[11] | |
| 2807 | // ff_l2d_l2b_decc_out_c7_16_scanin[11] | |
| 2808 | // ff_l2d_l2b_decc_out_c7_2_scanin[12] | |
| 2809 | // ff_l2d_l2b_decc_out_c7_6_scanin[12] | |
| 2810 | // ff_l2d_l2b_decc_out_c7_4_scanin[12] | |
| 2811 | // ff_l2d_l2b_decc_out_c7_8_scanin[12] | |
| 2812 | // ff_l2d_l2b_decc_out_c7_10_scanin[12] | |
| 2813 | // ff_l2d_l2b_decc_out_c7_14_scanin[12] | |
| 2814 | // ff_l2d_l2b_decc_out_c7_12_scanin[12] | |
| 2815 | // ff_l2d_l2b_decc_out_c7_16_scanin[12] | |
| 2816 | // ff_l2d_l2b_decc_out_c7_2_scanin[13] | |
| 2817 | // ff_l2d_l2b_decc_out_c7_6_scanin[13] | |
| 2818 | // ff_l2d_l2b_decc_out_c7_4_scanin[13] | |
| 2819 | // ff_l2d_l2b_decc_out_c7_8_scanin[13] | |
| 2820 | // ff_l2d_l2b_decc_out_c7_10_scanin[13] | |
| 2821 | // ff_l2d_l2b_decc_out_c7_14_scanin[13] | |
| 2822 | // ff_l2d_l2b_decc_out_c7_12_scanin[13] | |
| 2823 | // ff_l2d_l2b_decc_out_c7_16_scanin[13] | |
| 2824 | // ff_l2d_l2b_decc_out_c7_2_scanin[14] | |
| 2825 | // ff_l2d_l2b_decc_out_c7_6_scanin[14] | |
| 2826 | // ff_l2d_l2b_decc_out_c7_4_scanin[14] | |
| 2827 | // ff_l2d_l2b_decc_out_c7_8_scanin[14] | |
| 2828 | // ff_l2d_l2b_decc_out_c7_10_scanin[14] | |
| 2829 | // ff_l2d_l2b_decc_out_c7_14_scanin[14] | |
| 2830 | // ff_l2d_l2b_decc_out_c7_12_scanin[14] | |
| 2831 | // ff_l2d_l2b_decc_out_c7_16_scanin[14] | |
| 2832 | // ff_l2d_l2b_decc_out_c7_2_scanin[15] | |
| 2833 | // ff_l2d_l2b_decc_out_c7_6_scanin[15] | |
| 2834 | // ff_l2d_l2b_decc_out_c7_4_scanin[15] | |
| 2835 | // ff_l2d_l2b_decc_out_c7_8_scanin[15] | |
| 2836 | // ff_l2d_l2b_decc_out_c7_10_scanin[15] | |
| 2837 | // ff_l2d_l2b_decc_out_c7_14_scanin[15] | |
| 2838 | // ff_l2d_l2b_decc_out_c7_12_scanin[15] | |
| 2839 | // ff_l2d_l2b_decc_out_c7_16_scanin[15] | |
| 2840 | // ff_l2d_l2b_decc_out_c7_2_scanin[16] | |
| 2841 | // ff_l2d_l2b_decc_out_c7_6_scanin[16] | |
| 2842 | // ff_l2d_l2b_decc_out_c7_4_scanin[16] | |
| 2843 | // ff_l2d_l2b_decc_out_c7_8_scanin[16] | |
| 2844 | // ff_l2d_l2b_decc_out_c7_10_scanin[16] | |
| 2845 | // ff_l2d_l2b_decc_out_c7_14_scanin[16] | |
| 2846 | // ff_l2d_l2b_decc_out_c7_12_scanin[16] | |
| 2847 | // ff_l2d_l2b_decc_out_c7_16_scanin[16] | |
| 2848 | // ff_l2d_l2b_decc_out_c7_2_scanin[17] | |
| 2849 | // ff_l2d_l2b_decc_out_c7_6_scanin[17] | |
| 2850 | // ff_l2d_l2b_decc_out_c7_4_scanin[17] | |
| 2851 | // ff_l2d_l2b_decc_out_c7_8_scanin[17] | |
| 2852 | // ff_l2d_l2b_decc_out_c7_10_scanin[17] | |
| 2853 | // ff_l2d_l2b_decc_out_c7_14_scanin[17] | |
| 2854 | // ff_l2d_l2b_decc_out_c7_12_scanin[17] | |
| 2855 | // ff_l2d_l2b_decc_out_c7_16_scanin[17] | |
| 2856 | // ff_l2d_l2b_decc_out_c7_2_scanin[18] | |
| 2857 | // ff_l2d_l2b_decc_out_c7_6_scanin[18] | |
| 2858 | // ff_l2d_l2b_decc_out_c7_4_scanin[18] | |
| 2859 | // ff_l2d_l2b_decc_out_c7_8_scanin[18] | |
| 2860 | // ff_l2d_l2b_decc_out_c7_10_scanin[18] | |
| 2861 | // ff_l2d_l2b_decc_out_c7_14_scanin[18] | |
| 2862 | // ff_l2d_l2b_decc_out_c7_12_scanin[18] | |
| 2863 | // ff_l2d_l2b_decc_out_c7_16_scanin[18] | |
| 2864 | // ff_l2d_l2b_decc_out_c7_2_scanin[19] | |
| 2865 | // ff_l2d_l2b_decc_out_c7_6_scanin[19] | |
| 2866 | // ff_l2d_l2b_decc_out_c7_4_scanin[19] | |
| 2867 | // ff_l2d_l2b_decc_out_c7_8_scanin[19] | |
| 2868 | // ff_l2d_l2b_decc_out_c7_10_scanin[19] | |
| 2869 | // ff_l2d_l2b_decc_out_c7_14_scanin[19] | |
| 2870 | // ff_l2d_l2b_decc_out_c7_12_scanin[19] | |
| 2871 | // ff_l2d_l2b_decc_out_c7_16_scanin[19] | |
| 2872 | // ff_l2d_l2b_decc_out_c7_2_scanin[20] | |
| 2873 | // ff_l2d_l2b_decc_out_c7_6_scanin[20] | |
| 2874 | // ff_l2d_l2b_decc_out_c7_4_scanin[20] | |
| 2875 | // ff_l2d_l2b_decc_out_c7_8_scanin[20] | |
| 2876 | // ff_l2d_l2b_decc_out_c7_10_scanin[20] | |
| 2877 | // ff_l2d_l2b_decc_out_c7_14_scanin[20] | |
| 2878 | // ff_l2d_l2b_decc_out_c7_12_scanin[20] | |
| 2879 | // ff_l2d_l2b_decc_out_c7_16_scanin[20] | |
| 2880 | // ff_l2d_l2b_decc_out_c7_2_scanin[21] | |
| 2881 | // ff_l2d_l2b_decc_out_c7_6_scanin[21] | |
| 2882 | // ff_l2d_l2b_decc_out_c7_4_scanin[21] | |
| 2883 | // ff_l2d_l2b_decc_out_c7_8_scanin[21] | |
| 2884 | // ff_l2d_l2b_decc_out_c7_10_scanin[21] | |
| 2885 | // ff_l2d_l2b_decc_out_c7_14_scanin[21] | |
| 2886 | // ff_l2d_l2b_decc_out_c7_12_scanin[21] | |
| 2887 | // ff_l2d_l2b_decc_out_c7_16_scanin[21] | |
| 2888 | // ff_l2d_l2b_decc_out_c7_2_scanin[22] | |
| 2889 | // ff_l2d_l2b_decc_out_c7_6_scanin[22] | |
| 2890 | // ff_l2d_l2b_decc_out_c7_4_scanin[22] | |
| 2891 | // ff_l2d_l2b_decc_out_c7_8_scanin[22] | |
| 2892 | // ff_l2d_l2b_decc_out_c7_10_scanin[22] | |
| 2893 | // ff_l2d_l2b_decc_out_c7_14_scanin[22] | |
| 2894 | // ff_l2d_l2b_decc_out_c7_12_scanin[22] | |
| 2895 | // ff_l2d_l2b_decc_out_c7_16_scanin[22] | |
| 2896 | // ff_l2d_l2b_decc_out_c7_2_scanin[23] | |
| 2897 | // ff_l2d_l2b_decc_out_c7_6_scanin[23] | |
| 2898 | // ff_l2d_l2b_decc_out_c7_4_scanin[23] | |
| 2899 | // ff_l2d_l2b_decc_out_c7_8_scanin[23] | |
| 2900 | // ff_l2d_l2b_decc_out_c7_10_scanin[23] | |
| 2901 | // ff_l2d_l2b_decc_out_c7_14_scanin[23] | |
| 2902 | // ff_l2d_l2b_decc_out_c7_12_scanin[23] | |
| 2903 | // ff_l2d_l2b_decc_out_c7_16_scanin[23] | |
| 2904 | // ff_l2d_l2b_decc_out_c7_2_scanin[24] | |
| 2905 | // ff_l2d_l2b_decc_out_c7_6_scanin[24] | |
| 2906 | // ff_l2d_l2b_decc_out_c7_4_scanin[24] | |
| 2907 | // ff_l2d_l2b_decc_out_c7_8_scanin[24] | |
| 2908 | // ff_l2d_l2b_decc_out_c7_10_scanin[24] | |
| 2909 | // ff_l2d_l2b_decc_out_c7_14_scanin[24] | |
| 2910 | // ff_l2d_l2b_decc_out_c7_12_scanin[24] | |
| 2911 | // ff_l2d_l2b_decc_out_c7_16_scanin[24] | |
| 2912 | // ff_l2d_l2b_decc_out_c7_2_scanin[25] | |
| 2913 | // ff_l2d_l2b_decc_out_c7_6_scanin[25] | |
| 2914 | // ff_l2d_l2b_decc_out_c7_4_scanin[25] | |
| 2915 | // ff_l2d_l2b_decc_out_c7_8_scanin[25] | |
| 2916 | // ff_l2d_l2b_decc_out_c7_10_scanin[25] | |
| 2917 | // ff_l2d_l2b_decc_out_c7_14_scanin[25] | |
| 2918 | // ff_l2d_l2b_decc_out_c7_12_scanin[25] | |
| 2919 | // ff_l2d_l2b_decc_out_c7_16_scanin[25] | |
| 2920 | // ff_l2d_l2b_decc_out_c7_2_scanin[26] | |
| 2921 | // ff_l2d_l2b_decc_out_c7_6_scanin[26] | |
| 2922 | // ff_l2d_l2b_decc_out_c7_4_scanin[26] | |
| 2923 | // ff_l2d_l2b_decc_out_c7_8_scanin[26] | |
| 2924 | // ff_l2d_l2b_decc_out_c7_10_scanin[26] | |
| 2925 | // ff_l2d_l2b_decc_out_c7_14_scanin[26] | |
| 2926 | // ff_l2d_l2b_decc_out_c7_12_scanin[26] | |
| 2927 | // ff_l2d_l2b_decc_out_c7_16_scanin[26] | |
| 2928 | // ff_l2d_l2b_decc_out_c7_2_scanin[27] | |
| 2929 | // ff_l2d_l2b_decc_out_c7_6_scanin[27] | |
| 2930 | // ff_l2d_l2b_decc_out_c7_4_scanin[27] | |
| 2931 | // ff_l2d_l2b_decc_out_c7_8_scanin[27] | |
| 2932 | // ff_l2d_l2b_decc_out_c7_10_scanin[27] | |
| 2933 | // ff_l2d_l2b_decc_out_c7_14_scanin[27] | |
| 2934 | // ff_l2d_l2b_decc_out_c7_12_scanin[27] | |
| 2935 | // ff_l2d_l2b_decc_out_c7_16_scanin[27] | |
| 2936 | // ff_l2d_l2b_decc_out_c7_2_scanin[28] | |
| 2937 | // ff_l2d_l2b_decc_out_c7_6_scanin[28] | |
| 2938 | // ff_l2d_l2b_decc_out_c7_4_scanin[28] | |
| 2939 | // ff_l2d_l2b_decc_out_c7_8_scanin[28] | |
| 2940 | // ff_l2d_l2b_decc_out_c7_10_scanin[28] | |
| 2941 | // ff_l2d_l2b_decc_out_c7_14_scanin[28] | |
| 2942 | // ff_l2d_l2b_decc_out_c7_12_scanin[28] | |
| 2943 | // ff_l2d_l2b_decc_out_c7_16_scanin[28] | |
| 2944 | // ff_l2d_l2b_decc_out_c7_2_scanin[29] | |
| 2945 | // ff_l2d_l2b_decc_out_c7_6_scanin[29] | |
| 2946 | // ff_l2d_l2b_decc_out_c7_4_scanin[29] | |
| 2947 | // ff_l2d_l2b_decc_out_c7_8_scanin[29] | |
| 2948 | // ff_l2d_l2b_decc_out_c7_10_scanin[29] | |
| 2949 | // ff_l2d_l2b_decc_out_c7_14_scanin[29] | |
| 2950 | // ff_l2d_l2b_decc_out_c7_12_scanin[29] | |
| 2951 | // ff_l2d_l2b_decc_out_c7_16_scanin[29] | |
| 2952 | // ff_l2d_l2b_decc_out_c7_2_scanin[30] | |
| 2953 | // ff_l2d_l2b_decc_out_c7_6_scanin[30] | |
| 2954 | // ff_l2d_l2b_decc_out_c7_4_scanin[30] | |
| 2955 | // ff_l2d_l2b_decc_out_c7_8_scanin[30] | |
| 2956 | // ff_l2d_l2b_decc_out_c7_10_scanin[30] | |
| 2957 | // ff_l2d_l2b_decc_out_c7_14_scanin[30] | |
| 2958 | // ff_l2d_l2b_decc_out_c7_12_scanin[30] | |
| 2959 | // ff_l2d_l2b_decc_out_c7_16_scanin[30] | |
| 2960 | // ff_l2d_l2b_decc_out_c7_2_scanin[31] | |
| 2961 | // ff_l2d_l2b_decc_out_c7_6_scanin[31] | |
| 2962 | // ff_l2d_l2b_decc_out_c7_4_scanin[31] | |
| 2963 | // ff_l2d_l2b_decc_out_c7_8_scanin[31] | |
| 2964 | // ff_l2d_l2b_decc_out_c7_10_scanin[31] | |
| 2965 | // ff_l2d_l2b_decc_out_c7_14_scanin[31] | |
| 2966 | // ff_l2d_l2b_decc_out_c7_12_scanin[31] | |
| 2967 | // ff_l2d_l2b_decc_out_c7_16_scanin[31] | |
| 2968 | // ff_l2d_l2b_decc_out_c7_2_scanin[32] | |
| 2969 | // ff_l2d_l2b_decc_out_c7_6_scanin[32] | |
| 2970 | // ff_l2d_l2b_decc_out_c7_4_scanin[32] | |
| 2971 | // ff_l2d_l2b_decc_out_c7_8_scanin[32] | |
| 2972 | // ff_l2d_l2b_decc_out_c7_10_scanin[32] | |
| 2973 | // ff_l2d_l2b_decc_out_c7_14_scanin[32] | |
| 2974 | // ff_l2d_l2b_decc_out_c7_12_scanin[32] | |
| 2975 | // ff_l2d_l2b_decc_out_c7_16_scanin[32] | |
| 2976 | // ff_l2d_l2b_decc_out_c7_2_scanin[33] | |
| 2977 | // ff_l2d_l2b_decc_out_c7_6_scanin[33] | |
| 2978 | // ff_l2d_l2b_decc_out_c7_4_scanin[33] | |
| 2979 | // ff_l2d_l2b_decc_out_c7_8_scanin[33] | |
| 2980 | // ff_l2d_l2b_decc_out_c7_10_scanin[33] | |
| 2981 | // ff_l2d_l2b_decc_out_c7_14_scanin[33] | |
| 2982 | // ff_l2d_l2b_decc_out_c7_12_scanin[33] | |
| 2983 | // ff_l2d_l2b_decc_out_c7_16_scanin[33] | |
| 2984 | // ff_l2d_l2b_decc_out_c7_2_scanin[34] | |
| 2985 | // ff_l2d_l2b_decc_out_c7_6_scanin[34] | |
| 2986 | // ff_l2d_l2b_decc_out_c7_4_scanin[34] | |
| 2987 | // ff_l2d_l2b_decc_out_c7_8_scanin[34] | |
| 2988 | // ff_l2d_l2b_decc_out_c7_10_scanin[34] | |
| 2989 | // ff_l2d_l2b_decc_out_c7_14_scanin[34] | |
| 2990 | // ff_l2d_l2b_decc_out_c7_12_scanin[34] | |
| 2991 | // ff_l2d_l2b_decc_out_c7_16_scanin[34] | |
| 2992 | // ff_l2d_l2b_decc_out_c7_2_scanin[35] | |
| 2993 | // ff_l2d_l2b_decc_out_c7_6_scanin[35] | |
| 2994 | // ff_l2d_l2b_decc_out_c7_4_scanin[35] | |
| 2995 | // ff_l2d_l2b_decc_out_c7_8_scanin[35] | |
| 2996 | // ff_l2d_l2b_decc_out_c7_10_scanin[35] | |
| 2997 | // ff_l2d_l2b_decc_out_c7_14_scanin[35] | |
| 2998 | // ff_l2d_l2b_decc_out_c7_12_scanin[35] | |
| 2999 | // ff_l2d_l2b_decc_out_c7_16_scanin[35] | |
| 3000 | // ff_l2d_l2b_decc_out_c7_2_scanin[36] | |
| 3001 | // ff_l2d_l2b_decc_out_c7_6_scanin[36] | |
| 3002 | // ff_l2d_l2b_decc_out_c7_4_scanin[36] | |
| 3003 | // ff_l2d_l2b_decc_out_c7_8_scanin[36] | |
| 3004 | // ff_l2d_l2b_decc_out_c7_10_scanin[36] | |
| 3005 | // ff_l2d_l2b_decc_out_c7_14_scanin[36] | |
| 3006 | // ff_l2d_l2b_decc_out_c7_12_scanin[36] | |
| 3007 | // ff_l2d_l2b_decc_out_c7_16_scanin[36] | |
| 3008 | // ff_l2d_l2b_decc_out_c7_2_scanin[37] | |
| 3009 | // ff_l2d_l2b_decc_out_c7_6_scanin[37] | |
| 3010 | // ff_l2d_l2b_decc_out_c7_4_scanin[37] | |
| 3011 | // ff_l2d_l2b_decc_out_c7_8_scanin[37] | |
| 3012 | // ff_l2d_l2b_decc_out_c7_10_scanin[37] | |
| 3013 | // ff_l2d_l2b_decc_out_c7_14_scanin[37] | |
| 3014 | // ff_l2d_l2b_decc_out_c7_12_scanin[37] | |
| 3015 | // ff_l2d_l2b_decc_out_c7_16_scanin[37] | |
| 3016 | // ff_l2d_l2b_decc_out_c7_2_scanin[38] | |
| 3017 | // ff_l2d_l2b_decc_out_c7_6_scanin[38] | |
| 3018 | // ff_l2d_l2b_decc_out_c7_4_scanin[38] | |
| 3019 | // ff_l2d_l2b_decc_out_c7_8_scanin[38] | |
| 3020 | // ff_l2d_l2b_decc_out_c7_10_scanin[38] | |
| 3021 | // ff_l2d_l2b_decc_out_c7_14_scanin[38] | |
| 3022 | // ff_l2d_l2b_decc_out_c7_12_scanin[38] | |
| 3023 | // ff_l2d_l2b_decc_out_c7_16_scanin[38] | |
| 3024 | ||
| 3025 | ||
| 3026 | // ff_l2d_l2t_decc_c6_scanin[0] | |
| 3027 | // ff_l2d_l2t_decc_c6_scanin[78] | |
| 3028 | // ff_l2d_l2t_decc_c6_scanin[1] | |
| 3029 | // ff_l2d_l2t_decc_c6_scanin[79] | |
| 3030 | // ff_l2d_l2t_decc_c6_scanin[2] | |
| 3031 | // ff_l2d_l2t_decc_c6_scanin[80] | |
| 3032 | // ff_l2d_l2t_decc_c6_scanin[3] | |
| 3033 | // ff_l2d_l2t_decc_c6_scanin[81] | |
| 3034 | // ff_l2d_l2t_decc_c6_scanin[4] | |
| 3035 | // ff_l2d_l2t_decc_c6_scanin[82] | |
| 3036 | // ff_l2d_l2t_decc_c6_scanin[5] | |
| 3037 | // ff_l2d_l2t_decc_c6_scanin[83] | |
| 3038 | // ff_l2d_l2t_decc_c6_scanin[6] | |
| 3039 | // ff_l2d_l2t_decc_c6_scanin[84] | |
| 3040 | // ff_l2d_l2t_decc_c6_scanin[7] | |
| 3041 | // ff_l2d_l2t_decc_c6_scanin[85] | |
| 3042 | // ff_l2d_l2t_decc_c6_scanin[8] | |
| 3043 | // ff_l2d_l2t_decc_c6_scanin[86] | |
| 3044 | // ff_l2d_l2t_decc_c6_scanin[9] | |
| 3045 | // ff_l2d_l2t_decc_c6_scanin[87] | |
| 3046 | // ff_l2d_l2t_decc_c6_scanin[10] | |
| 3047 | // ff_l2d_l2t_decc_c6_scanin[88] | |
| 3048 | // ff_l2d_l2t_decc_c6_scanin[11] | |
| 3049 | // ff_l2d_l2t_decc_c6_scanin[89] | |
| 3050 | // ff_l2d_l2t_decc_c6_scanin[12] | |
| 3051 | // ff_l2d_l2t_decc_c6_scanin[90] | |
| 3052 | // ff_l2d_l2t_decc_c6_scanin[13] | |
| 3053 | // ff_l2d_l2t_decc_c6_scanin[91] | |
| 3054 | // ff_l2d_l2t_decc_c6_scanin[14] | |
| 3055 | // ff_l2d_l2t_decc_c6_scanin[92] | |
| 3056 | // ff_l2d_l2t_decc_c6_scanin[15] | |
| 3057 | // ff_l2d_l2t_decc_c6_scanin[93] | |
| 3058 | // ff_l2d_l2t_decc_c6_scanin[16] | |
| 3059 | // ff_l2d_l2t_decc_c6_scanin[94] | |
| 3060 | // ff_l2d_l2t_decc_c6_scanin[17] | |
| 3061 | // ff_l2d_l2t_decc_c6_scanin[95] | |
| 3062 | // ff_l2d_l2t_decc_c6_scanin[18] | |
| 3063 | // ff_l2d_l2t_decc_c6_scanin[96] | |
| 3064 | // ff_l2d_l2t_decc_c6_scanin[19] | |
| 3065 | // ff_l2d_l2t_decc_c6_scanin[97] | |
| 3066 | // ff_l2d_l2t_decc_c6_scanin[20] | |
| 3067 | // ff_l2d_l2t_decc_c6_scanin[98] | |
| 3068 | // ff_l2d_l2t_decc_c6_scanin[21] | |
| 3069 | // ff_l2d_l2t_decc_c6_scanin[99] | |
| 3070 | // ff_l2d_l2t_decc_c6_scanin[22] | |
| 3071 | // ff_l2d_l2t_decc_c6_scanin[100] | |
| 3072 | // ff_l2d_l2t_decc_c6_scanin[23] | |
| 3073 | // ff_l2d_l2t_decc_c6_scanin[101] | |
| 3074 | // ff_l2d_l2t_decc_c6_scanin[24] | |
| 3075 | // ff_l2d_l2t_decc_c6_scanin[102] | |
| 3076 | // ff_l2d_l2t_decc_c6_scanin[25] | |
| 3077 | // ff_l2d_l2t_decc_c6_scanin[103] | |
| 3078 | // ff_l2d_l2t_decc_c6_scanin[26] | |
| 3079 | // ff_l2d_l2t_decc_c6_scanin[104] | |
| 3080 | // ff_l2d_l2t_decc_c6_scanin[27] | |
| 3081 | // ff_l2d_l2t_decc_c6_scanin[105] | |
| 3082 | // ff_l2d_l2t_decc_c6_scanin[28] | |
| 3083 | // ff_l2d_l2t_decc_c6_scanin[106] | |
| 3084 | // ff_l2d_l2t_decc_c6_scanin[29] | |
| 3085 | // ff_l2d_l2t_decc_c6_scanin[107] | |
| 3086 | // ff_l2d_l2t_decc_c6_scanin[30] | |
| 3087 | // ff_l2d_l2t_decc_c6_scanin[108] | |
| 3088 | // ff_l2d_l2t_decc_c6_scanin[31] | |
| 3089 | // ff_l2d_l2t_decc_c6_scanin[109] | |
| 3090 | // ff_l2d_l2t_decc_c6_scanin[32] | |
| 3091 | // ff_l2d_l2t_decc_c6_scanin[110] | |
| 3092 | // ff_l2d_l2t_decc_c6_scanin[33] | |
| 3093 | // ff_l2d_l2t_decc_c6_scanin[111] | |
| 3094 | // ff_l2d_l2t_decc_c6_scanin[34] | |
| 3095 | // ff_l2d_l2t_decc_c6_scanin[112] | |
| 3096 | // ff_l2d_l2t_decc_c6_scanin[35] | |
| 3097 | // ff_l2d_l2t_decc_c6_scanin[113] | |
| 3098 | // ff_l2d_l2t_decc_c6_scanin[36] | |
| 3099 | // ff_l2d_l2t_decc_c6_scanin[114] | |
| 3100 | // ff_l2d_l2t_decc_c6_scanin[37] | |
| 3101 | // ff_l2d_l2t_decc_c6_scanin[115] | |
| 3102 | // ff_l2d_l2t_decc_c6_scanin[38] | |
| 3103 | // ff_l2d_l2t_decc_c6_scanin[116] | |
| 3104 | // ff_l2d_l2t_decc_c6_scanin[39] | |
| 3105 | // ff_l2d_l2t_decc_c6_scanin[117] | |
| 3106 | // ff_l2d_l2t_decc_c6_scanin[40] | |
| 3107 | // ff_l2d_l2t_decc_c6_scanin[118] | |
| 3108 | // ff_l2d_l2t_decc_c6_scanin[41] | |
| 3109 | // ff_l2d_l2t_decc_c6_scanin[119] | |
| 3110 | // ff_l2d_l2t_decc_c6_scanin[42] | |
| 3111 | // ff_l2d_l2t_decc_c6_scanin[120] | |
| 3112 | // ff_l2d_l2t_decc_c6_scanin[43] | |
| 3113 | // ff_l2d_l2t_decc_c6_scanin[121] | |
| 3114 | // ff_l2d_l2t_decc_c6_scanin[44] | |
| 3115 | // ff_l2d_l2t_decc_c6_scanin[122] | |
| 3116 | // ff_l2d_l2t_decc_c6_scanin[45] | |
| 3117 | // ff_l2d_l2t_decc_c6_scanin[123] | |
| 3118 | // ff_l2d_l2t_decc_c6_scanin[46] | |
| 3119 | // ff_l2d_l2t_decc_c6_scanin[124] | |
| 3120 | // ff_l2d_l2t_decc_c6_scanin[47] | |
| 3121 | // ff_l2d_l2t_decc_c6_scanin[125] | |
| 3122 | // ff_l2d_l2t_decc_c6_scanin[48] | |
| 3123 | // ff_l2d_l2t_decc_c6_scanin[126] | |
| 3124 | // ff_l2d_l2t_decc_c6_scanin[49] | |
| 3125 | // ff_l2d_l2t_decc_c6_scanin[127] | |
| 3126 | // ff_l2d_l2t_decc_c6_scanin[50] | |
| 3127 | // ff_l2d_l2t_decc_c6_scanin[128] | |
| 3128 | // ff_l2d_l2t_decc_c6_scanin[51] | |
| 3129 | // ff_l2d_l2t_decc_c6_scanin[129] | |
| 3130 | // ff_l2d_l2t_decc_c6_scanin[52] | |
| 3131 | // ff_l2d_l2t_decc_c6_scanin[130] | |
| 3132 | // ff_l2d_l2t_decc_c6_scanin[53] | |
| 3133 | // ff_l2d_l2t_decc_c6_scanin[131] | |
| 3134 | // ff_l2d_l2t_decc_c6_scanin[54] | |
| 3135 | // ff_l2d_l2t_decc_c6_scanin[132] | |
| 3136 | // ff_l2d_l2t_decc_c6_scanin[55] | |
| 3137 | // ff_l2d_l2t_decc_c6_scanin[133] | |
| 3138 | // ff_l2d_l2t_decc_c6_scanin[56] | |
| 3139 | // ff_l2d_l2t_decc_c6_scanin[134] | |
| 3140 | // ff_l2d_l2t_decc_c6_scanin[57] | |
| 3141 | // ff_l2d_l2t_decc_c6_scanin[135] | |
| 3142 | // ff_l2d_l2t_decc_c6_scanin[58] | |
| 3143 | // ff_l2d_l2t_decc_c6_scanin[136] | |
| 3144 | // ff_l2d_l2t_decc_c6_scanin[59] | |
| 3145 | // ff_l2d_l2t_decc_c6_scanin[137] | |
| 3146 | // ff_l2d_l2t_decc_c6_scanin[60] | |
| 3147 | // ff_l2d_l2t_decc_c6_scanin[138] | |
| 3148 | // ff_l2d_l2t_decc_c6_scanin[61] | |
| 3149 | // ff_l2d_l2t_decc_c6_scanin[139] | |
| 3150 | // ff_l2d_l2t_decc_c6_scanin[62] | |
| 3151 | // ff_l2d_l2t_decc_c6_scanin[140] | |
| 3152 | // ff_l2d_l2t_decc_c6_scanin[63] | |
| 3153 | // ff_l2d_l2t_decc_c6_scanin[141] | |
| 3154 | // ff_l2d_l2t_decc_c6_scanin[64] | |
| 3155 | // ff_l2d_l2t_decc_c6_scanin[142] | |
| 3156 | // ff_l2d_l2t_decc_c6_scanin[65] | |
| 3157 | // ff_l2d_l2t_decc_c6_scanin[143] | |
| 3158 | // ff_l2d_l2t_decc_c6_scanin[66] | |
| 3159 | // ff_l2d_l2t_decc_c6_scanin[144] | |
| 3160 | // ff_l2d_l2t_decc_c6_scanin[67] | |
| 3161 | // ff_l2d_l2t_decc_c6_scanin[145] | |
| 3162 | // ff_l2d_l2t_decc_c6_scanin[68] | |
| 3163 | // ff_l2d_l2t_decc_c6_scanin[146] | |
| 3164 | // ff_l2d_l2t_decc_c6_scanin[69] | |
| 3165 | // ff_l2d_l2t_decc_c6_scanin[147] | |
| 3166 | // ff_l2d_l2t_decc_c6_scanin[70] | |
| 3167 | // ff_l2d_l2t_decc_c6_scanin[148] | |
| 3168 | // ff_l2d_l2t_decc_c6_scanin[71] | |
| 3169 | // ff_l2d_l2t_decc_c6_scanin[149] | |
| 3170 | // ff_l2d_l2t_decc_c6_scanin[72] | |
| 3171 | // ff_l2d_l2t_decc_c6_scanin[150] | |
| 3172 | // ff_l2d_l2t_decc_c6_scanin[73] | |
| 3173 | // ff_l2d_l2t_decc_c6_scanin[151] | |
| 3174 | // ff_l2d_l2t_decc_c6_scanin[74] | |
| 3175 | // ff_l2d_l2t_decc_c6_scanin[152] | |
| 3176 | // ff_l2d_l2t_decc_c6_scanin[75] | |
| 3177 | // ff_l2d_l2t_decc_c6_scanin[153] | |
| 3178 | // ff_l2d_l2t_decc_c6_scanin[76] | |
| 3179 | // ff_l2d_l2t_decc_c6_scanin[154] | |
| 3180 | // ff_l2d_l2t_decc_c6_scanin[77] | |
| 3181 | // ff_l2d_l2t_decc_c6_scanin[155] | |
| 3182 | // ff_l2d_l2b_efc_fuse_data_scanin[0:9] | |
| 3183 | // ff_l2b_l2d_fuse_reset_d_scanin | |
| 3184 | // ff_l2b_l2d_fuse_wren_d_scanin | |
| 3185 | // ff_l2b_l2d_fuse_rid_d_scanin[0:6] | |
| 3186 | // ff_l2b_l2d_fuse_l2d_data_in_scanin[0:9] | |
| 3187 | // ff_fill_clk_en_ov_stg_scanin | |
| 3188 | // ff_pwrsav_ov_stg_scanin | |
| 3189 | // scanorder end | |
| 3190 | // fixscan start | |
| 3191 | assign ff_l2t_l2d_rd_wr_c3_scanin=scan_in; | |
| 3192 | assign ff_l2t_l2d_way_sel_c3_scanin[0]=ff_l2t_l2d_rd_wr_c3_scanout; | |
| 3193 | assign ff_l2t_l2d_way_sel_c3_scanin[1]=ff_l2t_l2d_way_sel_c3_scanout[0]; | |
| 3194 | assign ff_l2t_l2d_way_sel_c3_scanin[2]=ff_l2t_l2d_way_sel_c3_scanout[1]; | |
| 3195 | assign ff_l2t_l2d_way_sel_c3_scanin[3]=ff_l2t_l2d_way_sel_c3_scanout[2]; | |
| 3196 | assign ff_l2t_l2d_way_sel_c3_scanin[4]=ff_l2t_l2d_way_sel_c3_scanout[3]; | |
| 3197 | assign ff_l2t_l2d_way_sel_c3_scanin[5]=ff_l2t_l2d_way_sel_c3_scanout[4]; | |
| 3198 | assign ff_l2t_l2d_way_sel_c3_scanin[6]=ff_l2t_l2d_way_sel_c3_scanout[5]; | |
| 3199 | assign ff_l2t_l2d_way_sel_c3_scanin[7]=ff_l2t_l2d_way_sel_c3_scanout[6]; | |
| 3200 | assign ff_l2t_l2d_way_sel_c3_scanin[8]=ff_l2t_l2d_way_sel_c3_scanout[7]; | |
| 3201 | assign ff_l2t_l2d_way_sel_c3_scanin[9]=ff_l2t_l2d_way_sel_c3_scanout[8]; | |
| 3202 | assign ff_l2t_l2d_way_sel_c3_scanin[10]=ff_l2t_l2d_way_sel_c3_scanout[9]; | |
| 3203 | assign ff_l2t_l2d_way_sel_c3_scanin[11]=ff_l2t_l2d_way_sel_c3_scanout[10]; | |
| 3204 | assign ff_l2t_l2d_way_sel_c3_scanin[12]=ff_l2t_l2d_way_sel_c3_scanout[11]; | |
| 3205 | assign ff_l2t_l2d_way_sel_c3_scanin[13]=ff_l2t_l2d_way_sel_c3_scanout[12]; | |
| 3206 | assign ff_l2t_l2d_way_sel_c3_scanin[14]=ff_l2t_l2d_way_sel_c3_scanout[13]; | |
| 3207 | assign ff_l2t_l2d_way_sel_c3_scanin[15]=ff_l2t_l2d_way_sel_c3_scanout[14]; | |
| 3208 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[0]=ff_l2t_l2d_way_sel_c3_scanout[15]; | |
| 3209 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[0]=ff_l2b_l2d_fbdecc_c5_1_scanout[0]; | |
| 3210 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[0]=ff_l2b_l2d_fbdecc_c5_5_scanout[0]; | |
| 3211 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[0]=ff_l2b_l2d_fbdecc_c5_3_scanout[0]; | |
| 3212 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[0]=ff_l2b_l2d_fbdecc_c5_7_scanout[0]; | |
| 3213 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[0]=ff_l2b_l2d_fbdecc_c5_9_scanout[0]; | |
| 3214 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[0]=ff_l2b_l2d_fbdecc_c5_13_scanout[0]; | |
| 3215 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[0]=ff_l2b_l2d_fbdecc_c5_11_scanout[0]; | |
| 3216 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[1]=ff_l2b_l2d_fbdecc_c5_15_scanout[0]; | |
| 3217 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[1]=ff_l2b_l2d_fbdecc_c5_1_scanout[1]; | |
| 3218 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[1]=ff_l2b_l2d_fbdecc_c5_5_scanout[1]; | |
| 3219 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[1]=ff_l2b_l2d_fbdecc_c5_3_scanout[1]; | |
| 3220 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[1]=ff_l2b_l2d_fbdecc_c5_7_scanout[1]; | |
| 3221 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[1]=ff_l2b_l2d_fbdecc_c5_9_scanout[1]; | |
| 3222 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[1]=ff_l2b_l2d_fbdecc_c5_13_scanout[1]; | |
| 3223 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[1]=ff_l2b_l2d_fbdecc_c5_11_scanout[1]; | |
| 3224 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[2]=ff_l2b_l2d_fbdecc_c5_15_scanout[1]; | |
| 3225 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[2]=ff_l2b_l2d_fbdecc_c5_1_scanout[2]; | |
| 3226 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[2]=ff_l2b_l2d_fbdecc_c5_5_scanout[2]; | |
| 3227 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[2]=ff_l2b_l2d_fbdecc_c5_3_scanout[2]; | |
| 3228 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[2]=ff_l2b_l2d_fbdecc_c5_7_scanout[2]; | |
| 3229 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[2]=ff_l2b_l2d_fbdecc_c5_9_scanout[2]; | |
| 3230 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[2]=ff_l2b_l2d_fbdecc_c5_13_scanout[2]; | |
| 3231 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[2]=ff_l2b_l2d_fbdecc_c5_11_scanout[2]; | |
| 3232 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[3]=ff_l2b_l2d_fbdecc_c5_15_scanout[2]; | |
| 3233 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[3]=ff_l2b_l2d_fbdecc_c5_1_scanout[3]; | |
| 3234 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[3]=ff_l2b_l2d_fbdecc_c5_5_scanout[3]; | |
| 3235 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[3]=ff_l2b_l2d_fbdecc_c5_3_scanout[3]; | |
| 3236 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[3]=ff_l2b_l2d_fbdecc_c5_7_scanout[3]; | |
| 3237 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[3]=ff_l2b_l2d_fbdecc_c5_9_scanout[3]; | |
| 3238 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[3]=ff_l2b_l2d_fbdecc_c5_13_scanout[3]; | |
| 3239 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[3]=ff_l2b_l2d_fbdecc_c5_11_scanout[3]; | |
| 3240 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[4]=ff_l2b_l2d_fbdecc_c5_15_scanout[3]; | |
| 3241 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[4]=ff_l2b_l2d_fbdecc_c5_1_scanout[4]; | |
| 3242 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[4]=ff_l2b_l2d_fbdecc_c5_5_scanout[4]; | |
| 3243 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[4]=ff_l2b_l2d_fbdecc_c5_3_scanout[4]; | |
| 3244 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[4]=ff_l2b_l2d_fbdecc_c5_7_scanout[4]; | |
| 3245 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[4]=ff_l2b_l2d_fbdecc_c5_9_scanout[4]; | |
| 3246 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[4]=ff_l2b_l2d_fbdecc_c5_13_scanout[4]; | |
| 3247 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[4]=ff_l2b_l2d_fbdecc_c5_11_scanout[4]; | |
| 3248 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[5]=ff_l2b_l2d_fbdecc_c5_15_scanout[4]; | |
| 3249 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[5]=ff_l2b_l2d_fbdecc_c5_1_scanout[5]; | |
| 3250 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[5]=ff_l2b_l2d_fbdecc_c5_5_scanout[5]; | |
| 3251 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[5]=ff_l2b_l2d_fbdecc_c5_3_scanout[5]; | |
| 3252 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[5]=ff_l2b_l2d_fbdecc_c5_7_scanout[5]; | |
| 3253 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[5]=ff_l2b_l2d_fbdecc_c5_9_scanout[5]; | |
| 3254 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[5]=ff_l2b_l2d_fbdecc_c5_13_scanout[5]; | |
| 3255 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[5]=ff_l2b_l2d_fbdecc_c5_11_scanout[5]; | |
| 3256 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[6]=ff_l2b_l2d_fbdecc_c5_15_scanout[5]; | |
| 3257 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[6]=ff_l2b_l2d_fbdecc_c5_1_scanout[6]; | |
| 3258 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[6]=ff_l2b_l2d_fbdecc_c5_5_scanout[6]; | |
| 3259 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[6]=ff_l2b_l2d_fbdecc_c5_3_scanout[6]; | |
| 3260 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[6]=ff_l2b_l2d_fbdecc_c5_7_scanout[6]; | |
| 3261 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[6]=ff_l2b_l2d_fbdecc_c5_9_scanout[6]; | |
| 3262 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[6]=ff_l2b_l2d_fbdecc_c5_13_scanout[6]; | |
| 3263 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[6]=ff_l2b_l2d_fbdecc_c5_11_scanout[6]; | |
| 3264 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[7]=ff_l2b_l2d_fbdecc_c5_15_scanout[6]; | |
| 3265 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[7]=ff_l2b_l2d_fbdecc_c5_1_scanout[7]; | |
| 3266 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[7]=ff_l2b_l2d_fbdecc_c5_5_scanout[7]; | |
| 3267 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[7]=ff_l2b_l2d_fbdecc_c5_3_scanout[7]; | |
| 3268 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[7]=ff_l2b_l2d_fbdecc_c5_7_scanout[7]; | |
| 3269 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[7]=ff_l2b_l2d_fbdecc_c5_9_scanout[7]; | |
| 3270 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[7]=ff_l2b_l2d_fbdecc_c5_13_scanout[7]; | |
| 3271 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[7]=ff_l2b_l2d_fbdecc_c5_11_scanout[7]; | |
| 3272 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[8]=ff_l2b_l2d_fbdecc_c5_15_scanout[7]; | |
| 3273 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[8]=ff_l2b_l2d_fbdecc_c5_1_scanout[8]; | |
| 3274 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[8]=ff_l2b_l2d_fbdecc_c5_5_scanout[8]; | |
| 3275 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[8]=ff_l2b_l2d_fbdecc_c5_3_scanout[8]; | |
| 3276 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[8]=ff_l2b_l2d_fbdecc_c5_7_scanout[8]; | |
| 3277 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[8]=ff_l2b_l2d_fbdecc_c5_9_scanout[8]; | |
| 3278 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[8]=ff_l2b_l2d_fbdecc_c5_13_scanout[8]; | |
| 3279 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[8]=ff_l2b_l2d_fbdecc_c5_11_scanout[8]; | |
| 3280 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[9]=ff_l2b_l2d_fbdecc_c5_15_scanout[8]; | |
| 3281 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[9]=ff_l2b_l2d_fbdecc_c5_1_scanout[9]; | |
| 3282 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[9]=ff_l2b_l2d_fbdecc_c5_5_scanout[9]; | |
| 3283 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[9]=ff_l2b_l2d_fbdecc_c5_3_scanout[9]; | |
| 3284 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[9]=ff_l2b_l2d_fbdecc_c5_7_scanout[9]; | |
| 3285 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[9]=ff_l2b_l2d_fbdecc_c5_9_scanout[9]; | |
| 3286 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[9]=ff_l2b_l2d_fbdecc_c5_13_scanout[9]; | |
| 3287 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[9]=ff_l2b_l2d_fbdecc_c5_11_scanout[9]; | |
| 3288 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[10]=ff_l2b_l2d_fbdecc_c5_15_scanout[9]; | |
| 3289 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[10]=ff_l2b_l2d_fbdecc_c5_1_scanout[10]; | |
| 3290 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[10]=ff_l2b_l2d_fbdecc_c5_5_scanout[10]; | |
| 3291 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[10]=ff_l2b_l2d_fbdecc_c5_3_scanout[10]; | |
| 3292 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[10]=ff_l2b_l2d_fbdecc_c5_7_scanout[10]; | |
| 3293 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[10]=ff_l2b_l2d_fbdecc_c5_9_scanout[10]; | |
| 3294 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[10]=ff_l2b_l2d_fbdecc_c5_13_scanout[10]; | |
| 3295 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[10]=ff_l2b_l2d_fbdecc_c5_11_scanout[10]; | |
| 3296 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[11]=ff_l2b_l2d_fbdecc_c5_15_scanout[10]; | |
| 3297 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[11]=ff_l2b_l2d_fbdecc_c5_1_scanout[11]; | |
| 3298 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[11]=ff_l2b_l2d_fbdecc_c5_5_scanout[11]; | |
| 3299 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[11]=ff_l2b_l2d_fbdecc_c5_3_scanout[11]; | |
| 3300 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[11]=ff_l2b_l2d_fbdecc_c5_7_scanout[11]; | |
| 3301 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[11]=ff_l2b_l2d_fbdecc_c5_9_scanout[11]; | |
| 3302 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[11]=ff_l2b_l2d_fbdecc_c5_13_scanout[11]; | |
| 3303 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[11]=ff_l2b_l2d_fbdecc_c5_11_scanout[11]; | |
| 3304 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[12]=ff_l2b_l2d_fbdecc_c5_15_scanout[11]; | |
| 3305 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[12]=ff_l2b_l2d_fbdecc_c5_1_scanout[12]; | |
| 3306 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[12]=ff_l2b_l2d_fbdecc_c5_5_scanout[12]; | |
| 3307 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[12]=ff_l2b_l2d_fbdecc_c5_3_scanout[12]; | |
| 3308 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[12]=ff_l2b_l2d_fbdecc_c5_7_scanout[12]; | |
| 3309 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[12]=ff_l2b_l2d_fbdecc_c5_9_scanout[12]; | |
| 3310 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[12]=ff_l2b_l2d_fbdecc_c5_13_scanout[12]; | |
| 3311 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[12]=ff_l2b_l2d_fbdecc_c5_11_scanout[12]; | |
| 3312 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[13]=ff_l2b_l2d_fbdecc_c5_15_scanout[12]; | |
| 3313 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[13]=ff_l2b_l2d_fbdecc_c5_1_scanout[13]; | |
| 3314 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[13]=ff_l2b_l2d_fbdecc_c5_5_scanout[13]; | |
| 3315 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[13]=ff_l2b_l2d_fbdecc_c5_3_scanout[13]; | |
| 3316 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[13]=ff_l2b_l2d_fbdecc_c5_7_scanout[13]; | |
| 3317 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[13]=ff_l2b_l2d_fbdecc_c5_9_scanout[13]; | |
| 3318 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[13]=ff_l2b_l2d_fbdecc_c5_13_scanout[13]; | |
| 3319 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[13]=ff_l2b_l2d_fbdecc_c5_11_scanout[13]; | |
| 3320 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[14]=ff_l2b_l2d_fbdecc_c5_15_scanout[13]; | |
| 3321 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[14]=ff_l2b_l2d_fbdecc_c5_1_scanout[14]; | |
| 3322 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[14]=ff_l2b_l2d_fbdecc_c5_5_scanout[14]; | |
| 3323 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[14]=ff_l2b_l2d_fbdecc_c5_3_scanout[14]; | |
| 3324 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[14]=ff_l2b_l2d_fbdecc_c5_7_scanout[14]; | |
| 3325 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[14]=ff_l2b_l2d_fbdecc_c5_9_scanout[14]; | |
| 3326 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[14]=ff_l2b_l2d_fbdecc_c5_13_scanout[14]; | |
| 3327 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[14]=ff_l2b_l2d_fbdecc_c5_11_scanout[14]; | |
| 3328 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[15]=ff_l2b_l2d_fbdecc_c5_15_scanout[14]; | |
| 3329 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[15]=ff_l2b_l2d_fbdecc_c5_1_scanout[15]; | |
| 3330 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[15]=ff_l2b_l2d_fbdecc_c5_5_scanout[15]; | |
| 3331 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[15]=ff_l2b_l2d_fbdecc_c5_3_scanout[15]; | |
| 3332 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[15]=ff_l2b_l2d_fbdecc_c5_7_scanout[15]; | |
| 3333 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[15]=ff_l2b_l2d_fbdecc_c5_9_scanout[15]; | |
| 3334 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[15]=ff_l2b_l2d_fbdecc_c5_13_scanout[15]; | |
| 3335 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[15]=ff_l2b_l2d_fbdecc_c5_11_scanout[15]; | |
| 3336 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[16]=ff_l2b_l2d_fbdecc_c5_15_scanout[15]; | |
| 3337 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[16]=ff_l2b_l2d_fbdecc_c5_1_scanout[16]; | |
| 3338 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[16]=ff_l2b_l2d_fbdecc_c5_5_scanout[16]; | |
| 3339 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[16]=ff_l2b_l2d_fbdecc_c5_3_scanout[16]; | |
| 3340 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[16]=ff_l2b_l2d_fbdecc_c5_7_scanout[16]; | |
| 3341 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[16]=ff_l2b_l2d_fbdecc_c5_9_scanout[16]; | |
| 3342 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[16]=ff_l2b_l2d_fbdecc_c5_13_scanout[16]; | |
| 3343 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[16]=ff_l2b_l2d_fbdecc_c5_11_scanout[16]; | |
| 3344 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[17]=ff_l2b_l2d_fbdecc_c5_15_scanout[16]; | |
| 3345 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[17]=ff_l2b_l2d_fbdecc_c5_1_scanout[17]; | |
| 3346 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[17]=ff_l2b_l2d_fbdecc_c5_5_scanout[17]; | |
| 3347 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[17]=ff_l2b_l2d_fbdecc_c5_3_scanout[17]; | |
| 3348 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[17]=ff_l2b_l2d_fbdecc_c5_7_scanout[17]; | |
| 3349 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[17]=ff_l2b_l2d_fbdecc_c5_9_scanout[17]; | |
| 3350 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[17]=ff_l2b_l2d_fbdecc_c5_13_scanout[17]; | |
| 3351 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[17]=ff_l2b_l2d_fbdecc_c5_11_scanout[17]; | |
| 3352 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[18]=ff_l2b_l2d_fbdecc_c5_15_scanout[17]; | |
| 3353 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[18]=ff_l2b_l2d_fbdecc_c5_1_scanout[18]; | |
| 3354 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[18]=ff_l2b_l2d_fbdecc_c5_5_scanout[18]; | |
| 3355 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[18]=ff_l2b_l2d_fbdecc_c5_3_scanout[18]; | |
| 3356 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[18]=ff_l2b_l2d_fbdecc_c5_7_scanout[18]; | |
| 3357 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[18]=ff_l2b_l2d_fbdecc_c5_9_scanout[18]; | |
| 3358 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[18]=ff_l2b_l2d_fbdecc_c5_13_scanout[18]; | |
| 3359 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[18]=ff_l2b_l2d_fbdecc_c5_11_scanout[18]; | |
| 3360 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[19]=ff_l2b_l2d_fbdecc_c5_15_scanout[18]; | |
| 3361 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[19]=ff_l2b_l2d_fbdecc_c5_1_scanout[19]; | |
| 3362 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[19]=ff_l2b_l2d_fbdecc_c5_5_scanout[19]; | |
| 3363 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[19]=ff_l2b_l2d_fbdecc_c5_3_scanout[19]; | |
| 3364 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[19]=ff_l2b_l2d_fbdecc_c5_7_scanout[19]; | |
| 3365 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[19]=ff_l2b_l2d_fbdecc_c5_9_scanout[19]; | |
| 3366 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[19]=ff_l2b_l2d_fbdecc_c5_13_scanout[19]; | |
| 3367 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[19]=ff_l2b_l2d_fbdecc_c5_11_scanout[19]; | |
| 3368 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[20]=ff_l2b_l2d_fbdecc_c5_15_scanout[19]; | |
| 3369 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[20]=ff_l2b_l2d_fbdecc_c5_1_scanout[20]; | |
| 3370 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[20]=ff_l2b_l2d_fbdecc_c5_5_scanout[20]; | |
| 3371 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[20]=ff_l2b_l2d_fbdecc_c5_3_scanout[20]; | |
| 3372 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[20]=ff_l2b_l2d_fbdecc_c5_7_scanout[20]; | |
| 3373 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[20]=ff_l2b_l2d_fbdecc_c5_9_scanout[20]; | |
| 3374 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[20]=ff_l2b_l2d_fbdecc_c5_13_scanout[20]; | |
| 3375 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[20]=ff_l2b_l2d_fbdecc_c5_11_scanout[20]; | |
| 3376 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[21]=ff_l2b_l2d_fbdecc_c5_15_scanout[20]; | |
| 3377 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[21]=ff_l2b_l2d_fbdecc_c5_1_scanout[21]; | |
| 3378 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[21]=ff_l2b_l2d_fbdecc_c5_5_scanout[21]; | |
| 3379 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[21]=ff_l2b_l2d_fbdecc_c5_3_scanout[21]; | |
| 3380 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[21]=ff_l2b_l2d_fbdecc_c5_7_scanout[21]; | |
| 3381 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[21]=ff_l2b_l2d_fbdecc_c5_9_scanout[21]; | |
| 3382 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[21]=ff_l2b_l2d_fbdecc_c5_13_scanout[21]; | |
| 3383 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[21]=ff_l2b_l2d_fbdecc_c5_11_scanout[21]; | |
| 3384 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[22]=ff_l2b_l2d_fbdecc_c5_15_scanout[21]; | |
| 3385 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[22]=ff_l2b_l2d_fbdecc_c5_1_scanout[22]; | |
| 3386 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[22]=ff_l2b_l2d_fbdecc_c5_5_scanout[22]; | |
| 3387 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[22]=ff_l2b_l2d_fbdecc_c5_3_scanout[22]; | |
| 3388 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[22]=ff_l2b_l2d_fbdecc_c5_7_scanout[22]; | |
| 3389 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[22]=ff_l2b_l2d_fbdecc_c5_9_scanout[22]; | |
| 3390 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[22]=ff_l2b_l2d_fbdecc_c5_13_scanout[22]; | |
| 3391 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[22]=ff_l2b_l2d_fbdecc_c5_11_scanout[22]; | |
| 3392 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[23]=ff_l2b_l2d_fbdecc_c5_15_scanout[22]; | |
| 3393 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[23]=ff_l2b_l2d_fbdecc_c5_1_scanout[23]; | |
| 3394 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[23]=ff_l2b_l2d_fbdecc_c5_5_scanout[23]; | |
| 3395 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[23]=ff_l2b_l2d_fbdecc_c5_3_scanout[23]; | |
| 3396 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[23]=ff_l2b_l2d_fbdecc_c5_7_scanout[23]; | |
| 3397 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[23]=ff_l2b_l2d_fbdecc_c5_9_scanout[23]; | |
| 3398 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[23]=ff_l2b_l2d_fbdecc_c5_13_scanout[23]; | |
| 3399 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[23]=ff_l2b_l2d_fbdecc_c5_11_scanout[23]; | |
| 3400 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[24]=ff_l2b_l2d_fbdecc_c5_15_scanout[23]; | |
| 3401 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[24]=ff_l2b_l2d_fbdecc_c5_1_scanout[24]; | |
| 3402 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[24]=ff_l2b_l2d_fbdecc_c5_5_scanout[24]; | |
| 3403 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[24]=ff_l2b_l2d_fbdecc_c5_3_scanout[24]; | |
| 3404 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[24]=ff_l2b_l2d_fbdecc_c5_7_scanout[24]; | |
| 3405 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[24]=ff_l2b_l2d_fbdecc_c5_9_scanout[24]; | |
| 3406 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[24]=ff_l2b_l2d_fbdecc_c5_13_scanout[24]; | |
| 3407 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[24]=ff_l2b_l2d_fbdecc_c5_11_scanout[24]; | |
| 3408 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[25]=ff_l2b_l2d_fbdecc_c5_15_scanout[24]; | |
| 3409 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[25]=ff_l2b_l2d_fbdecc_c5_1_scanout[25]; | |
| 3410 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[25]=ff_l2b_l2d_fbdecc_c5_5_scanout[25]; | |
| 3411 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[25]=ff_l2b_l2d_fbdecc_c5_3_scanout[25]; | |
| 3412 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[25]=ff_l2b_l2d_fbdecc_c5_7_scanout[25]; | |
| 3413 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[25]=ff_l2b_l2d_fbdecc_c5_9_scanout[25]; | |
| 3414 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[25]=ff_l2b_l2d_fbdecc_c5_13_scanout[25]; | |
| 3415 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[25]=ff_l2b_l2d_fbdecc_c5_11_scanout[25]; | |
| 3416 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[26]=ff_l2b_l2d_fbdecc_c5_15_scanout[25]; | |
| 3417 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[26]=ff_l2b_l2d_fbdecc_c5_1_scanout[26]; | |
| 3418 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[26]=ff_l2b_l2d_fbdecc_c5_5_scanout[26]; | |
| 3419 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[26]=ff_l2b_l2d_fbdecc_c5_3_scanout[26]; | |
| 3420 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[26]=ff_l2b_l2d_fbdecc_c5_7_scanout[26]; | |
| 3421 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[26]=ff_l2b_l2d_fbdecc_c5_9_scanout[26]; | |
| 3422 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[26]=ff_l2b_l2d_fbdecc_c5_13_scanout[26]; | |
| 3423 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[26]=ff_l2b_l2d_fbdecc_c5_11_scanout[26]; | |
| 3424 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[27]=ff_l2b_l2d_fbdecc_c5_15_scanout[26]; | |
| 3425 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[27]=ff_l2b_l2d_fbdecc_c5_1_scanout[27]; | |
| 3426 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[27]=ff_l2b_l2d_fbdecc_c5_5_scanout[27]; | |
| 3427 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[27]=ff_l2b_l2d_fbdecc_c5_3_scanout[27]; | |
| 3428 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[27]=ff_l2b_l2d_fbdecc_c5_7_scanout[27]; | |
| 3429 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[27]=ff_l2b_l2d_fbdecc_c5_9_scanout[27]; | |
| 3430 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[27]=ff_l2b_l2d_fbdecc_c5_13_scanout[27]; | |
| 3431 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[27]=ff_l2b_l2d_fbdecc_c5_11_scanout[27]; | |
| 3432 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[28]=ff_l2b_l2d_fbdecc_c5_15_scanout[27]; | |
| 3433 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[28]=ff_l2b_l2d_fbdecc_c5_1_scanout[28]; | |
| 3434 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[28]=ff_l2b_l2d_fbdecc_c5_5_scanout[28]; | |
| 3435 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[28]=ff_l2b_l2d_fbdecc_c5_3_scanout[28]; | |
| 3436 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[28]=ff_l2b_l2d_fbdecc_c5_7_scanout[28]; | |
| 3437 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[28]=ff_l2b_l2d_fbdecc_c5_9_scanout[28]; | |
| 3438 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[28]=ff_l2b_l2d_fbdecc_c5_13_scanout[28]; | |
| 3439 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[28]=ff_l2b_l2d_fbdecc_c5_11_scanout[28]; | |
| 3440 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[29]=ff_l2b_l2d_fbdecc_c5_15_scanout[28]; | |
| 3441 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[29]=ff_l2b_l2d_fbdecc_c5_1_scanout[29]; | |
| 3442 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[29]=ff_l2b_l2d_fbdecc_c5_5_scanout[29]; | |
| 3443 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[29]=ff_l2b_l2d_fbdecc_c5_3_scanout[29]; | |
| 3444 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[29]=ff_l2b_l2d_fbdecc_c5_7_scanout[29]; | |
| 3445 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[29]=ff_l2b_l2d_fbdecc_c5_9_scanout[29]; | |
| 3446 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[29]=ff_l2b_l2d_fbdecc_c5_13_scanout[29]; | |
| 3447 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[29]=ff_l2b_l2d_fbdecc_c5_11_scanout[29]; | |
| 3448 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[30]=ff_l2b_l2d_fbdecc_c5_15_scanout[29]; | |
| 3449 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[30]=ff_l2b_l2d_fbdecc_c5_1_scanout[30]; | |
| 3450 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[30]=ff_l2b_l2d_fbdecc_c5_5_scanout[30]; | |
| 3451 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[30]=ff_l2b_l2d_fbdecc_c5_3_scanout[30]; | |
| 3452 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[30]=ff_l2b_l2d_fbdecc_c5_7_scanout[30]; | |
| 3453 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[30]=ff_l2b_l2d_fbdecc_c5_9_scanout[30]; | |
| 3454 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[30]=ff_l2b_l2d_fbdecc_c5_13_scanout[30]; | |
| 3455 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[30]=ff_l2b_l2d_fbdecc_c5_11_scanout[30]; | |
| 3456 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[31]=ff_l2b_l2d_fbdecc_c5_15_scanout[30]; | |
| 3457 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[31]=ff_l2b_l2d_fbdecc_c5_1_scanout[31]; | |
| 3458 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[31]=ff_l2b_l2d_fbdecc_c5_5_scanout[31]; | |
| 3459 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[31]=ff_l2b_l2d_fbdecc_c5_3_scanout[31]; | |
| 3460 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[31]=ff_l2b_l2d_fbdecc_c5_7_scanout[31]; | |
| 3461 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[31]=ff_l2b_l2d_fbdecc_c5_9_scanout[31]; | |
| 3462 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[31]=ff_l2b_l2d_fbdecc_c5_13_scanout[31]; | |
| 3463 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[31]=ff_l2b_l2d_fbdecc_c5_11_scanout[31]; | |
| 3464 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[32]=ff_l2b_l2d_fbdecc_c5_15_scanout[31]; | |
| 3465 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[32]=ff_l2b_l2d_fbdecc_c5_1_scanout[32]; | |
| 3466 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[32]=ff_l2b_l2d_fbdecc_c5_5_scanout[32]; | |
| 3467 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[32]=ff_l2b_l2d_fbdecc_c5_3_scanout[32]; | |
| 3468 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[32]=ff_l2b_l2d_fbdecc_c5_7_scanout[32]; | |
| 3469 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[32]=ff_l2b_l2d_fbdecc_c5_9_scanout[32]; | |
| 3470 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[32]=ff_l2b_l2d_fbdecc_c5_13_scanout[32]; | |
| 3471 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[32]=ff_l2b_l2d_fbdecc_c5_11_scanout[32]; | |
| 3472 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[33]=ff_l2b_l2d_fbdecc_c5_15_scanout[32]; | |
| 3473 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[33]=ff_l2b_l2d_fbdecc_c5_1_scanout[33]; | |
| 3474 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[33]=ff_l2b_l2d_fbdecc_c5_5_scanout[33]; | |
| 3475 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[33]=ff_l2b_l2d_fbdecc_c5_3_scanout[33]; | |
| 3476 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[33]=ff_l2b_l2d_fbdecc_c5_7_scanout[33]; | |
| 3477 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[33]=ff_l2b_l2d_fbdecc_c5_9_scanout[33]; | |
| 3478 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[33]=ff_l2b_l2d_fbdecc_c5_13_scanout[33]; | |
| 3479 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[33]=ff_l2b_l2d_fbdecc_c5_11_scanout[33]; | |
| 3480 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[34]=ff_l2b_l2d_fbdecc_c5_15_scanout[33]; | |
| 3481 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[34]=ff_l2b_l2d_fbdecc_c5_1_scanout[34]; | |
| 3482 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[34]=ff_l2b_l2d_fbdecc_c5_5_scanout[34]; | |
| 3483 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[34]=ff_l2b_l2d_fbdecc_c5_3_scanout[34]; | |
| 3484 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[34]=ff_l2b_l2d_fbdecc_c5_7_scanout[34]; | |
| 3485 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[34]=ff_l2b_l2d_fbdecc_c5_9_scanout[34]; | |
| 3486 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[34]=ff_l2b_l2d_fbdecc_c5_13_scanout[34]; | |
| 3487 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[34]=ff_l2b_l2d_fbdecc_c5_11_scanout[34]; | |
| 3488 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[35]=ff_l2b_l2d_fbdecc_c5_15_scanout[34]; | |
| 3489 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[35]=ff_l2b_l2d_fbdecc_c5_1_scanout[35]; | |
| 3490 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[35]=ff_l2b_l2d_fbdecc_c5_5_scanout[35]; | |
| 3491 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[35]=ff_l2b_l2d_fbdecc_c5_3_scanout[35]; | |
| 3492 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[35]=ff_l2b_l2d_fbdecc_c5_7_scanout[35]; | |
| 3493 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[35]=ff_l2b_l2d_fbdecc_c5_9_scanout[35]; | |
| 3494 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[35]=ff_l2b_l2d_fbdecc_c5_13_scanout[35]; | |
| 3495 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[35]=ff_l2b_l2d_fbdecc_c5_11_scanout[35]; | |
| 3496 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[36]=ff_l2b_l2d_fbdecc_c5_15_scanout[35]; | |
| 3497 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[36]=ff_l2b_l2d_fbdecc_c5_1_scanout[36]; | |
| 3498 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[36]=ff_l2b_l2d_fbdecc_c5_5_scanout[36]; | |
| 3499 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[36]=ff_l2b_l2d_fbdecc_c5_3_scanout[36]; | |
| 3500 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[36]=ff_l2b_l2d_fbdecc_c5_7_scanout[36]; | |
| 3501 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[36]=ff_l2b_l2d_fbdecc_c5_9_scanout[36]; | |
| 3502 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[36]=ff_l2b_l2d_fbdecc_c5_13_scanout[36]; | |
| 3503 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[36]=ff_l2b_l2d_fbdecc_c5_11_scanout[36]; | |
| 3504 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[37]=ff_l2b_l2d_fbdecc_c5_15_scanout[36]; | |
| 3505 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[37]=ff_l2b_l2d_fbdecc_c5_1_scanout[37]; | |
| 3506 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[37]=ff_l2b_l2d_fbdecc_c5_5_scanout[37]; | |
| 3507 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[37]=ff_l2b_l2d_fbdecc_c5_3_scanout[37]; | |
| 3508 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[37]=ff_l2b_l2d_fbdecc_c5_7_scanout[37]; | |
| 3509 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[37]=ff_l2b_l2d_fbdecc_c5_9_scanout[37]; | |
| 3510 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[37]=ff_l2b_l2d_fbdecc_c5_13_scanout[37]; | |
| 3511 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[37]=ff_l2b_l2d_fbdecc_c5_11_scanout[37]; | |
| 3512 | assign ff_l2b_l2d_fbdecc_c5_1_scanin[38]=ff_l2b_l2d_fbdecc_c5_15_scanout[37]; | |
| 3513 | assign ff_l2b_l2d_fbdecc_c5_5_scanin[38]=ff_l2b_l2d_fbdecc_c5_1_scanout[38]; | |
| 3514 | assign ff_l2b_l2d_fbdecc_c5_3_scanin[38]=ff_l2b_l2d_fbdecc_c5_5_scanout[38]; | |
| 3515 | assign ff_l2b_l2d_fbdecc_c5_7_scanin[38]=ff_l2b_l2d_fbdecc_c5_3_scanout[38]; | |
| 3516 | assign ff_l2b_l2d_fbdecc_c5_9_scanin[38]=ff_l2b_l2d_fbdecc_c5_7_scanout[38]; | |
| 3517 | assign ff_l2b_l2d_fbdecc_c5_13_scanin[38]=ff_l2b_l2d_fbdecc_c5_9_scanout[38]; | |
| 3518 | assign ff_l2b_l2d_fbdecc_c5_11_scanin[38]=ff_l2b_l2d_fbdecc_c5_13_scanout[38]; | |
| 3519 | assign ff_l2b_l2d_fbdecc_c5_15_scanin[38]=ff_l2b_l2d_fbdecc_c5_11_scanout[38]; | |
| 3520 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[0]=ff_l2b_l2d_fbdecc_c5_15_scanout[38]; | |
| 3521 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[0]=ff_l2b_l2d_fbdecc_c5_2_scanout[0]; | |
| 3522 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[0]=ff_l2b_l2d_fbdecc_c5_6_scanout[0]; | |
| 3523 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[0]=ff_l2b_l2d_fbdecc_c5_4_scanout[0]; | |
| 3524 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[0]=ff_l2b_l2d_fbdecc_c5_8_scanout[0]; | |
| 3525 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[0]=ff_l2b_l2d_fbdecc_c5_10_scanout[0]; | |
| 3526 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[0]=ff_l2b_l2d_fbdecc_c5_14_scanout[0]; | |
| 3527 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[0]=ff_l2b_l2d_fbdecc_c5_12_scanout[0]; | |
| 3528 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[1]=ff_l2b_l2d_fbdecc_c5_16_scanout[0]; | |
| 3529 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[1]=ff_l2b_l2d_fbdecc_c5_2_scanout[1]; | |
| 3530 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[1]=ff_l2b_l2d_fbdecc_c5_6_scanout[1]; | |
| 3531 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[1]=ff_l2b_l2d_fbdecc_c5_4_scanout[1]; | |
| 3532 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[1]=ff_l2b_l2d_fbdecc_c5_8_scanout[1]; | |
| 3533 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[1]=ff_l2b_l2d_fbdecc_c5_10_scanout[1]; | |
| 3534 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[1]=ff_l2b_l2d_fbdecc_c5_14_scanout[1]; | |
| 3535 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[1]=ff_l2b_l2d_fbdecc_c5_12_scanout[1]; | |
| 3536 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[2]=ff_l2b_l2d_fbdecc_c5_16_scanout[1]; | |
| 3537 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[2]=ff_l2b_l2d_fbdecc_c5_2_scanout[2]; | |
| 3538 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[2]=ff_l2b_l2d_fbdecc_c5_6_scanout[2]; | |
| 3539 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[2]=ff_l2b_l2d_fbdecc_c5_4_scanout[2]; | |
| 3540 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[2]=ff_l2b_l2d_fbdecc_c5_8_scanout[2]; | |
| 3541 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[2]=ff_l2b_l2d_fbdecc_c5_10_scanout[2]; | |
| 3542 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[2]=ff_l2b_l2d_fbdecc_c5_14_scanout[2]; | |
| 3543 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[2]=ff_l2b_l2d_fbdecc_c5_12_scanout[2]; | |
| 3544 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[3]=ff_l2b_l2d_fbdecc_c5_16_scanout[2]; | |
| 3545 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[3]=ff_l2b_l2d_fbdecc_c5_2_scanout[3]; | |
| 3546 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[3]=ff_l2b_l2d_fbdecc_c5_6_scanout[3]; | |
| 3547 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[3]=ff_l2b_l2d_fbdecc_c5_4_scanout[3]; | |
| 3548 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[3]=ff_l2b_l2d_fbdecc_c5_8_scanout[3]; | |
| 3549 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[3]=ff_l2b_l2d_fbdecc_c5_10_scanout[3]; | |
| 3550 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[3]=ff_l2b_l2d_fbdecc_c5_14_scanout[3]; | |
| 3551 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[3]=ff_l2b_l2d_fbdecc_c5_12_scanout[3]; | |
| 3552 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[4]=ff_l2b_l2d_fbdecc_c5_16_scanout[3]; | |
| 3553 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[4]=ff_l2b_l2d_fbdecc_c5_2_scanout[4]; | |
| 3554 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[4]=ff_l2b_l2d_fbdecc_c5_6_scanout[4]; | |
| 3555 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[4]=ff_l2b_l2d_fbdecc_c5_4_scanout[4]; | |
| 3556 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[4]=ff_l2b_l2d_fbdecc_c5_8_scanout[4]; | |
| 3557 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[4]=ff_l2b_l2d_fbdecc_c5_10_scanout[4]; | |
| 3558 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[4]=ff_l2b_l2d_fbdecc_c5_14_scanout[4]; | |
| 3559 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[4]=ff_l2b_l2d_fbdecc_c5_12_scanout[4]; | |
| 3560 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[5]=ff_l2b_l2d_fbdecc_c5_16_scanout[4]; | |
| 3561 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[5]=ff_l2b_l2d_fbdecc_c5_2_scanout[5]; | |
| 3562 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[5]=ff_l2b_l2d_fbdecc_c5_6_scanout[5]; | |
| 3563 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[5]=ff_l2b_l2d_fbdecc_c5_4_scanout[5]; | |
| 3564 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[5]=ff_l2b_l2d_fbdecc_c5_8_scanout[5]; | |
| 3565 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[5]=ff_l2b_l2d_fbdecc_c5_10_scanout[5]; | |
| 3566 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[5]=ff_l2b_l2d_fbdecc_c5_14_scanout[5]; | |
| 3567 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[5]=ff_l2b_l2d_fbdecc_c5_12_scanout[5]; | |
| 3568 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[6]=ff_l2b_l2d_fbdecc_c5_16_scanout[5]; | |
| 3569 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[6]=ff_l2b_l2d_fbdecc_c5_2_scanout[6]; | |
| 3570 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[6]=ff_l2b_l2d_fbdecc_c5_6_scanout[6]; | |
| 3571 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[6]=ff_l2b_l2d_fbdecc_c5_4_scanout[6]; | |
| 3572 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[6]=ff_l2b_l2d_fbdecc_c5_8_scanout[6]; | |
| 3573 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[6]=ff_l2b_l2d_fbdecc_c5_10_scanout[6]; | |
| 3574 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[6]=ff_l2b_l2d_fbdecc_c5_14_scanout[6]; | |
| 3575 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[6]=ff_l2b_l2d_fbdecc_c5_12_scanout[6]; | |
| 3576 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[7]=ff_l2b_l2d_fbdecc_c5_16_scanout[6]; | |
| 3577 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[7]=ff_l2b_l2d_fbdecc_c5_2_scanout[7]; | |
| 3578 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[7]=ff_l2b_l2d_fbdecc_c5_6_scanout[7]; | |
| 3579 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[7]=ff_l2b_l2d_fbdecc_c5_4_scanout[7]; | |
| 3580 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[7]=ff_l2b_l2d_fbdecc_c5_8_scanout[7]; | |
| 3581 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[7]=ff_l2b_l2d_fbdecc_c5_10_scanout[7]; | |
| 3582 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[7]=ff_l2b_l2d_fbdecc_c5_14_scanout[7]; | |
| 3583 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[7]=ff_l2b_l2d_fbdecc_c5_12_scanout[7]; | |
| 3584 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[8]=ff_l2b_l2d_fbdecc_c5_16_scanout[7]; | |
| 3585 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[8]=ff_l2b_l2d_fbdecc_c5_2_scanout[8]; | |
| 3586 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[8]=ff_l2b_l2d_fbdecc_c5_6_scanout[8]; | |
| 3587 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[8]=ff_l2b_l2d_fbdecc_c5_4_scanout[8]; | |
| 3588 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[8]=ff_l2b_l2d_fbdecc_c5_8_scanout[8]; | |
| 3589 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[8]=ff_l2b_l2d_fbdecc_c5_10_scanout[8]; | |
| 3590 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[8]=ff_l2b_l2d_fbdecc_c5_14_scanout[8]; | |
| 3591 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[8]=ff_l2b_l2d_fbdecc_c5_12_scanout[8]; | |
| 3592 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[9]=ff_l2b_l2d_fbdecc_c5_16_scanout[8]; | |
| 3593 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[9]=ff_l2b_l2d_fbdecc_c5_2_scanout[9]; | |
| 3594 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[9]=ff_l2b_l2d_fbdecc_c5_6_scanout[9]; | |
| 3595 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[9]=ff_l2b_l2d_fbdecc_c5_4_scanout[9]; | |
| 3596 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[9]=ff_l2b_l2d_fbdecc_c5_8_scanout[9]; | |
| 3597 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[9]=ff_l2b_l2d_fbdecc_c5_10_scanout[9]; | |
| 3598 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[9]=ff_l2b_l2d_fbdecc_c5_14_scanout[9]; | |
| 3599 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[9]=ff_l2b_l2d_fbdecc_c5_12_scanout[9]; | |
| 3600 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[10]=ff_l2b_l2d_fbdecc_c5_16_scanout[9]; | |
| 3601 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[10]=ff_l2b_l2d_fbdecc_c5_2_scanout[10]; | |
| 3602 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[10]=ff_l2b_l2d_fbdecc_c5_6_scanout[10]; | |
| 3603 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[10]=ff_l2b_l2d_fbdecc_c5_4_scanout[10]; | |
| 3604 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[10]=ff_l2b_l2d_fbdecc_c5_8_scanout[10]; | |
| 3605 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[10]=ff_l2b_l2d_fbdecc_c5_10_scanout[10]; | |
| 3606 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[10]=ff_l2b_l2d_fbdecc_c5_14_scanout[10]; | |
| 3607 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[10]=ff_l2b_l2d_fbdecc_c5_12_scanout[10]; | |
| 3608 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[11]=ff_l2b_l2d_fbdecc_c5_16_scanout[10]; | |
| 3609 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[11]=ff_l2b_l2d_fbdecc_c5_2_scanout[11]; | |
| 3610 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[11]=ff_l2b_l2d_fbdecc_c5_6_scanout[11]; | |
| 3611 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[11]=ff_l2b_l2d_fbdecc_c5_4_scanout[11]; | |
| 3612 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[11]=ff_l2b_l2d_fbdecc_c5_8_scanout[11]; | |
| 3613 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[11]=ff_l2b_l2d_fbdecc_c5_10_scanout[11]; | |
| 3614 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[11]=ff_l2b_l2d_fbdecc_c5_14_scanout[11]; | |
| 3615 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[11]=ff_l2b_l2d_fbdecc_c5_12_scanout[11]; | |
| 3616 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[12]=ff_l2b_l2d_fbdecc_c5_16_scanout[11]; | |
| 3617 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[12]=ff_l2b_l2d_fbdecc_c5_2_scanout[12]; | |
| 3618 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[12]=ff_l2b_l2d_fbdecc_c5_6_scanout[12]; | |
| 3619 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[12]=ff_l2b_l2d_fbdecc_c5_4_scanout[12]; | |
| 3620 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[12]=ff_l2b_l2d_fbdecc_c5_8_scanout[12]; | |
| 3621 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[12]=ff_l2b_l2d_fbdecc_c5_10_scanout[12]; | |
| 3622 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[12]=ff_l2b_l2d_fbdecc_c5_14_scanout[12]; | |
| 3623 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[12]=ff_l2b_l2d_fbdecc_c5_12_scanout[12]; | |
| 3624 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[13]=ff_l2b_l2d_fbdecc_c5_16_scanout[12]; | |
| 3625 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[13]=ff_l2b_l2d_fbdecc_c5_2_scanout[13]; | |
| 3626 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[13]=ff_l2b_l2d_fbdecc_c5_6_scanout[13]; | |
| 3627 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[13]=ff_l2b_l2d_fbdecc_c5_4_scanout[13]; | |
| 3628 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[13]=ff_l2b_l2d_fbdecc_c5_8_scanout[13]; | |
| 3629 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[13]=ff_l2b_l2d_fbdecc_c5_10_scanout[13]; | |
| 3630 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[13]=ff_l2b_l2d_fbdecc_c5_14_scanout[13]; | |
| 3631 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[13]=ff_l2b_l2d_fbdecc_c5_12_scanout[13]; | |
| 3632 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[14]=ff_l2b_l2d_fbdecc_c5_16_scanout[13]; | |
| 3633 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[14]=ff_l2b_l2d_fbdecc_c5_2_scanout[14]; | |
| 3634 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[14]=ff_l2b_l2d_fbdecc_c5_6_scanout[14]; | |
| 3635 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[14]=ff_l2b_l2d_fbdecc_c5_4_scanout[14]; | |
| 3636 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[14]=ff_l2b_l2d_fbdecc_c5_8_scanout[14]; | |
| 3637 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[14]=ff_l2b_l2d_fbdecc_c5_10_scanout[14]; | |
| 3638 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[14]=ff_l2b_l2d_fbdecc_c5_14_scanout[14]; | |
| 3639 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[14]=ff_l2b_l2d_fbdecc_c5_12_scanout[14]; | |
| 3640 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[15]=ff_l2b_l2d_fbdecc_c5_16_scanout[14]; | |
| 3641 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[15]=ff_l2b_l2d_fbdecc_c5_2_scanout[15]; | |
| 3642 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[15]=ff_l2b_l2d_fbdecc_c5_6_scanout[15]; | |
| 3643 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[15]=ff_l2b_l2d_fbdecc_c5_4_scanout[15]; | |
| 3644 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[15]=ff_l2b_l2d_fbdecc_c5_8_scanout[15]; | |
| 3645 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[15]=ff_l2b_l2d_fbdecc_c5_10_scanout[15]; | |
| 3646 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[15]=ff_l2b_l2d_fbdecc_c5_14_scanout[15]; | |
| 3647 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[15]=ff_l2b_l2d_fbdecc_c5_12_scanout[15]; | |
| 3648 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[16]=ff_l2b_l2d_fbdecc_c5_16_scanout[15]; | |
| 3649 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[16]=ff_l2b_l2d_fbdecc_c5_2_scanout[16]; | |
| 3650 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[16]=ff_l2b_l2d_fbdecc_c5_6_scanout[16]; | |
| 3651 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[16]=ff_l2b_l2d_fbdecc_c5_4_scanout[16]; | |
| 3652 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[16]=ff_l2b_l2d_fbdecc_c5_8_scanout[16]; | |
| 3653 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[16]=ff_l2b_l2d_fbdecc_c5_10_scanout[16]; | |
| 3654 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[16]=ff_l2b_l2d_fbdecc_c5_14_scanout[16]; | |
| 3655 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[16]=ff_l2b_l2d_fbdecc_c5_12_scanout[16]; | |
| 3656 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[17]=ff_l2b_l2d_fbdecc_c5_16_scanout[16]; | |
| 3657 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[17]=ff_l2b_l2d_fbdecc_c5_2_scanout[17]; | |
| 3658 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[17]=ff_l2b_l2d_fbdecc_c5_6_scanout[17]; | |
| 3659 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[17]=ff_l2b_l2d_fbdecc_c5_4_scanout[17]; | |
| 3660 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[17]=ff_l2b_l2d_fbdecc_c5_8_scanout[17]; | |
| 3661 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[17]=ff_l2b_l2d_fbdecc_c5_10_scanout[17]; | |
| 3662 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[17]=ff_l2b_l2d_fbdecc_c5_14_scanout[17]; | |
| 3663 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[17]=ff_l2b_l2d_fbdecc_c5_12_scanout[17]; | |
| 3664 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[18]=ff_l2b_l2d_fbdecc_c5_16_scanout[17]; | |
| 3665 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[18]=ff_l2b_l2d_fbdecc_c5_2_scanout[18]; | |
| 3666 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[18]=ff_l2b_l2d_fbdecc_c5_6_scanout[18]; | |
| 3667 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[18]=ff_l2b_l2d_fbdecc_c5_4_scanout[18]; | |
| 3668 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[18]=ff_l2b_l2d_fbdecc_c5_8_scanout[18]; | |
| 3669 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[18]=ff_l2b_l2d_fbdecc_c5_10_scanout[18]; | |
| 3670 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[18]=ff_l2b_l2d_fbdecc_c5_14_scanout[18]; | |
| 3671 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[18]=ff_l2b_l2d_fbdecc_c5_12_scanout[18]; | |
| 3672 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[19]=ff_l2b_l2d_fbdecc_c5_16_scanout[18]; | |
| 3673 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[19]=ff_l2b_l2d_fbdecc_c5_2_scanout[19]; | |
| 3674 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[19]=ff_l2b_l2d_fbdecc_c5_6_scanout[19]; | |
| 3675 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[19]=ff_l2b_l2d_fbdecc_c5_4_scanout[19]; | |
| 3676 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[19]=ff_l2b_l2d_fbdecc_c5_8_scanout[19]; | |
| 3677 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[19]=ff_l2b_l2d_fbdecc_c5_10_scanout[19]; | |
| 3678 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[19]=ff_l2b_l2d_fbdecc_c5_14_scanout[19]; | |
| 3679 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[19]=ff_l2b_l2d_fbdecc_c5_12_scanout[19]; | |
| 3680 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[20]=ff_l2b_l2d_fbdecc_c5_16_scanout[19]; | |
| 3681 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[20]=ff_l2b_l2d_fbdecc_c5_2_scanout[20]; | |
| 3682 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[20]=ff_l2b_l2d_fbdecc_c5_6_scanout[20]; | |
| 3683 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[20]=ff_l2b_l2d_fbdecc_c5_4_scanout[20]; | |
| 3684 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[20]=ff_l2b_l2d_fbdecc_c5_8_scanout[20]; | |
| 3685 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[20]=ff_l2b_l2d_fbdecc_c5_10_scanout[20]; | |
| 3686 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[20]=ff_l2b_l2d_fbdecc_c5_14_scanout[20]; | |
| 3687 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[20]=ff_l2b_l2d_fbdecc_c5_12_scanout[20]; | |
| 3688 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[21]=ff_l2b_l2d_fbdecc_c5_16_scanout[20]; | |
| 3689 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[21]=ff_l2b_l2d_fbdecc_c5_2_scanout[21]; | |
| 3690 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[21]=ff_l2b_l2d_fbdecc_c5_6_scanout[21]; | |
| 3691 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[21]=ff_l2b_l2d_fbdecc_c5_4_scanout[21]; | |
| 3692 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[21]=ff_l2b_l2d_fbdecc_c5_8_scanout[21]; | |
| 3693 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[21]=ff_l2b_l2d_fbdecc_c5_10_scanout[21]; | |
| 3694 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[21]=ff_l2b_l2d_fbdecc_c5_14_scanout[21]; | |
| 3695 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[21]=ff_l2b_l2d_fbdecc_c5_12_scanout[21]; | |
| 3696 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[22]=ff_l2b_l2d_fbdecc_c5_16_scanout[21]; | |
| 3697 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[22]=ff_l2b_l2d_fbdecc_c5_2_scanout[22]; | |
| 3698 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[22]=ff_l2b_l2d_fbdecc_c5_6_scanout[22]; | |
| 3699 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[22]=ff_l2b_l2d_fbdecc_c5_4_scanout[22]; | |
| 3700 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[22]=ff_l2b_l2d_fbdecc_c5_8_scanout[22]; | |
| 3701 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[22]=ff_l2b_l2d_fbdecc_c5_10_scanout[22]; | |
| 3702 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[22]=ff_l2b_l2d_fbdecc_c5_14_scanout[22]; | |
| 3703 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[22]=ff_l2b_l2d_fbdecc_c5_12_scanout[22]; | |
| 3704 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[23]=ff_l2b_l2d_fbdecc_c5_16_scanout[22]; | |
| 3705 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[23]=ff_l2b_l2d_fbdecc_c5_2_scanout[23]; | |
| 3706 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[23]=ff_l2b_l2d_fbdecc_c5_6_scanout[23]; | |
| 3707 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[23]=ff_l2b_l2d_fbdecc_c5_4_scanout[23]; | |
| 3708 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[23]=ff_l2b_l2d_fbdecc_c5_8_scanout[23]; | |
| 3709 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[23]=ff_l2b_l2d_fbdecc_c5_10_scanout[23]; | |
| 3710 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[23]=ff_l2b_l2d_fbdecc_c5_14_scanout[23]; | |
| 3711 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[23]=ff_l2b_l2d_fbdecc_c5_12_scanout[23]; | |
| 3712 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[24]=ff_l2b_l2d_fbdecc_c5_16_scanout[23]; | |
| 3713 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[24]=ff_l2b_l2d_fbdecc_c5_2_scanout[24]; | |
| 3714 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[24]=ff_l2b_l2d_fbdecc_c5_6_scanout[24]; | |
| 3715 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[24]=ff_l2b_l2d_fbdecc_c5_4_scanout[24]; | |
| 3716 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[24]=ff_l2b_l2d_fbdecc_c5_8_scanout[24]; | |
| 3717 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[24]=ff_l2b_l2d_fbdecc_c5_10_scanout[24]; | |
| 3718 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[24]=ff_l2b_l2d_fbdecc_c5_14_scanout[24]; | |
| 3719 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[24]=ff_l2b_l2d_fbdecc_c5_12_scanout[24]; | |
| 3720 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[25]=ff_l2b_l2d_fbdecc_c5_16_scanout[24]; | |
| 3721 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[25]=ff_l2b_l2d_fbdecc_c5_2_scanout[25]; | |
| 3722 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[25]=ff_l2b_l2d_fbdecc_c5_6_scanout[25]; | |
| 3723 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[25]=ff_l2b_l2d_fbdecc_c5_4_scanout[25]; | |
| 3724 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[25]=ff_l2b_l2d_fbdecc_c5_8_scanout[25]; | |
| 3725 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[25]=ff_l2b_l2d_fbdecc_c5_10_scanout[25]; | |
| 3726 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[25]=ff_l2b_l2d_fbdecc_c5_14_scanout[25]; | |
| 3727 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[25]=ff_l2b_l2d_fbdecc_c5_12_scanout[25]; | |
| 3728 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[26]=ff_l2b_l2d_fbdecc_c5_16_scanout[25]; | |
| 3729 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[26]=ff_l2b_l2d_fbdecc_c5_2_scanout[26]; | |
| 3730 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[26]=ff_l2b_l2d_fbdecc_c5_6_scanout[26]; | |
| 3731 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[26]=ff_l2b_l2d_fbdecc_c5_4_scanout[26]; | |
| 3732 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[26]=ff_l2b_l2d_fbdecc_c5_8_scanout[26]; | |
| 3733 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[26]=ff_l2b_l2d_fbdecc_c5_10_scanout[26]; | |
| 3734 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[26]=ff_l2b_l2d_fbdecc_c5_14_scanout[26]; | |
| 3735 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[26]=ff_l2b_l2d_fbdecc_c5_12_scanout[26]; | |
| 3736 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[27]=ff_l2b_l2d_fbdecc_c5_16_scanout[26]; | |
| 3737 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[27]=ff_l2b_l2d_fbdecc_c5_2_scanout[27]; | |
| 3738 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[27]=ff_l2b_l2d_fbdecc_c5_6_scanout[27]; | |
| 3739 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[27]=ff_l2b_l2d_fbdecc_c5_4_scanout[27]; | |
| 3740 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[27]=ff_l2b_l2d_fbdecc_c5_8_scanout[27]; | |
| 3741 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[27]=ff_l2b_l2d_fbdecc_c5_10_scanout[27]; | |
| 3742 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[27]=ff_l2b_l2d_fbdecc_c5_14_scanout[27]; | |
| 3743 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[27]=ff_l2b_l2d_fbdecc_c5_12_scanout[27]; | |
| 3744 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[28]=ff_l2b_l2d_fbdecc_c5_16_scanout[27]; | |
| 3745 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[28]=ff_l2b_l2d_fbdecc_c5_2_scanout[28]; | |
| 3746 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[28]=ff_l2b_l2d_fbdecc_c5_6_scanout[28]; | |
| 3747 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[28]=ff_l2b_l2d_fbdecc_c5_4_scanout[28]; | |
| 3748 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[28]=ff_l2b_l2d_fbdecc_c5_8_scanout[28]; | |
| 3749 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[28]=ff_l2b_l2d_fbdecc_c5_10_scanout[28]; | |
| 3750 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[28]=ff_l2b_l2d_fbdecc_c5_14_scanout[28]; | |
| 3751 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[28]=ff_l2b_l2d_fbdecc_c5_12_scanout[28]; | |
| 3752 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[29]=ff_l2b_l2d_fbdecc_c5_16_scanout[28]; | |
| 3753 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[29]=ff_l2b_l2d_fbdecc_c5_2_scanout[29]; | |
| 3754 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[29]=ff_l2b_l2d_fbdecc_c5_6_scanout[29]; | |
| 3755 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[29]=ff_l2b_l2d_fbdecc_c5_4_scanout[29]; | |
| 3756 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[29]=ff_l2b_l2d_fbdecc_c5_8_scanout[29]; | |
| 3757 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[29]=ff_l2b_l2d_fbdecc_c5_10_scanout[29]; | |
| 3758 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[29]=ff_l2b_l2d_fbdecc_c5_14_scanout[29]; | |
| 3759 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[29]=ff_l2b_l2d_fbdecc_c5_12_scanout[29]; | |
| 3760 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[30]=ff_l2b_l2d_fbdecc_c5_16_scanout[29]; | |
| 3761 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[30]=ff_l2b_l2d_fbdecc_c5_2_scanout[30]; | |
| 3762 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[30]=ff_l2b_l2d_fbdecc_c5_6_scanout[30]; | |
| 3763 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[30]=ff_l2b_l2d_fbdecc_c5_4_scanout[30]; | |
| 3764 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[30]=ff_l2b_l2d_fbdecc_c5_8_scanout[30]; | |
| 3765 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[30]=ff_l2b_l2d_fbdecc_c5_10_scanout[30]; | |
| 3766 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[30]=ff_l2b_l2d_fbdecc_c5_14_scanout[30]; | |
| 3767 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[30]=ff_l2b_l2d_fbdecc_c5_12_scanout[30]; | |
| 3768 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[31]=ff_l2b_l2d_fbdecc_c5_16_scanout[30]; | |
| 3769 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[31]=ff_l2b_l2d_fbdecc_c5_2_scanout[31]; | |
| 3770 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[31]=ff_l2b_l2d_fbdecc_c5_6_scanout[31]; | |
| 3771 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[31]=ff_l2b_l2d_fbdecc_c5_4_scanout[31]; | |
| 3772 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[31]=ff_l2b_l2d_fbdecc_c5_8_scanout[31]; | |
| 3773 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[31]=ff_l2b_l2d_fbdecc_c5_10_scanout[31]; | |
| 3774 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[31]=ff_l2b_l2d_fbdecc_c5_14_scanout[31]; | |
| 3775 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[31]=ff_l2b_l2d_fbdecc_c5_12_scanout[31]; | |
| 3776 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[32]=ff_l2b_l2d_fbdecc_c5_16_scanout[31]; | |
| 3777 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[32]=ff_l2b_l2d_fbdecc_c5_2_scanout[32]; | |
| 3778 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[32]=ff_l2b_l2d_fbdecc_c5_6_scanout[32]; | |
| 3779 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[32]=ff_l2b_l2d_fbdecc_c5_4_scanout[32]; | |
| 3780 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[32]=ff_l2b_l2d_fbdecc_c5_8_scanout[32]; | |
| 3781 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[32]=ff_l2b_l2d_fbdecc_c5_10_scanout[32]; | |
| 3782 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[32]=ff_l2b_l2d_fbdecc_c5_14_scanout[32]; | |
| 3783 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[32]=ff_l2b_l2d_fbdecc_c5_12_scanout[32]; | |
| 3784 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[33]=ff_l2b_l2d_fbdecc_c5_16_scanout[32]; | |
| 3785 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[33]=ff_l2b_l2d_fbdecc_c5_2_scanout[33]; | |
| 3786 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[33]=ff_l2b_l2d_fbdecc_c5_6_scanout[33]; | |
| 3787 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[33]=ff_l2b_l2d_fbdecc_c5_4_scanout[33]; | |
| 3788 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[33]=ff_l2b_l2d_fbdecc_c5_8_scanout[33]; | |
| 3789 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[33]=ff_l2b_l2d_fbdecc_c5_10_scanout[33]; | |
| 3790 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[33]=ff_l2b_l2d_fbdecc_c5_14_scanout[33]; | |
| 3791 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[33]=ff_l2b_l2d_fbdecc_c5_12_scanout[33]; | |
| 3792 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[34]=ff_l2b_l2d_fbdecc_c5_16_scanout[33]; | |
| 3793 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[34]=ff_l2b_l2d_fbdecc_c5_2_scanout[34]; | |
| 3794 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[34]=ff_l2b_l2d_fbdecc_c5_6_scanout[34]; | |
| 3795 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[34]=ff_l2b_l2d_fbdecc_c5_4_scanout[34]; | |
| 3796 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[34]=ff_l2b_l2d_fbdecc_c5_8_scanout[34]; | |
| 3797 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[34]=ff_l2b_l2d_fbdecc_c5_10_scanout[34]; | |
| 3798 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[34]=ff_l2b_l2d_fbdecc_c5_14_scanout[34]; | |
| 3799 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[34]=ff_l2b_l2d_fbdecc_c5_12_scanout[34]; | |
| 3800 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[35]=ff_l2b_l2d_fbdecc_c5_16_scanout[34]; | |
| 3801 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[35]=ff_l2b_l2d_fbdecc_c5_2_scanout[35]; | |
| 3802 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[35]=ff_l2b_l2d_fbdecc_c5_6_scanout[35]; | |
| 3803 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[35]=ff_l2b_l2d_fbdecc_c5_4_scanout[35]; | |
| 3804 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[35]=ff_l2b_l2d_fbdecc_c5_8_scanout[35]; | |
| 3805 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[35]=ff_l2b_l2d_fbdecc_c5_10_scanout[35]; | |
| 3806 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[35]=ff_l2b_l2d_fbdecc_c5_14_scanout[35]; | |
| 3807 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[35]=ff_l2b_l2d_fbdecc_c5_12_scanout[35]; | |
| 3808 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[36]=ff_l2b_l2d_fbdecc_c5_16_scanout[35]; | |
| 3809 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[36]=ff_l2b_l2d_fbdecc_c5_2_scanout[36]; | |
| 3810 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[36]=ff_l2b_l2d_fbdecc_c5_6_scanout[36]; | |
| 3811 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[36]=ff_l2b_l2d_fbdecc_c5_4_scanout[36]; | |
| 3812 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[36]=ff_l2b_l2d_fbdecc_c5_8_scanout[36]; | |
| 3813 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[36]=ff_l2b_l2d_fbdecc_c5_10_scanout[36]; | |
| 3814 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[36]=ff_l2b_l2d_fbdecc_c5_14_scanout[36]; | |
| 3815 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[36]=ff_l2b_l2d_fbdecc_c5_12_scanout[36]; | |
| 3816 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[37]=ff_l2b_l2d_fbdecc_c5_16_scanout[36]; | |
| 3817 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[37]=ff_l2b_l2d_fbdecc_c5_2_scanout[37]; | |
| 3818 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[37]=ff_l2b_l2d_fbdecc_c5_6_scanout[37]; | |
| 3819 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[37]=ff_l2b_l2d_fbdecc_c5_4_scanout[37]; | |
| 3820 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[37]=ff_l2b_l2d_fbdecc_c5_8_scanout[37]; | |
| 3821 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[37]=ff_l2b_l2d_fbdecc_c5_10_scanout[37]; | |
| 3822 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[37]=ff_l2b_l2d_fbdecc_c5_14_scanout[37]; | |
| 3823 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[37]=ff_l2b_l2d_fbdecc_c5_12_scanout[37]; | |
| 3824 | assign ff_l2b_l2d_fbdecc_c5_2_scanin[38]=ff_l2b_l2d_fbdecc_c5_16_scanout[37]; | |
| 3825 | assign ff_l2b_l2d_fbdecc_c5_6_scanin[38]=ff_l2b_l2d_fbdecc_c5_2_scanout[38]; | |
| 3826 | assign ff_l2b_l2d_fbdecc_c5_4_scanin[38]=ff_l2b_l2d_fbdecc_c5_6_scanout[38]; | |
| 3827 | assign ff_l2b_l2d_fbdecc_c5_8_scanin[38]=ff_l2b_l2d_fbdecc_c5_4_scanout[38]; | |
| 3828 | assign ff_l2b_l2d_fbdecc_c5_10_scanin[38]=ff_l2b_l2d_fbdecc_c5_8_scanout[38]; | |
| 3829 | assign ff_l2b_l2d_fbdecc_c5_14_scanin[38]=ff_l2b_l2d_fbdecc_c5_10_scanout[38]; | |
| 3830 | assign ff_l2b_l2d_fbdecc_c5_12_scanin[38]=ff_l2b_l2d_fbdecc_c5_14_scanout[38]; | |
| 3831 | assign ff_l2b_l2d_fbdecc_c5_16_scanin[38]=ff_l2b_l2d_fbdecc_c5_12_scanout[38]; | |
| 3832 | assign ff_l2d_l2b_decc_out_c7_1_scanin[0]=ff_l2b_l2d_fbdecc_c5_16_scanout[38]; | |
| 3833 | assign ff_l2d_l2b_decc_out_c7_5_scanin[0]=ff_l2d_l2b_decc_out_c7_1_scanout[0]; | |
| 3834 | assign ff_l2d_l2b_decc_out_c7_3_scanin[0]=ff_l2d_l2b_decc_out_c7_5_scanout[0]; | |
| 3835 | assign ff_l2d_l2b_decc_out_c7_7_scanin[0]=ff_l2d_l2b_decc_out_c7_3_scanout[0]; | |
| 3836 | assign ff_l2d_l2b_decc_out_c7_9_scanin[0]=ff_l2d_l2b_decc_out_c7_7_scanout[0]; | |
| 3837 | assign ff_l2d_l2b_decc_out_c7_13_scanin[0]=ff_l2d_l2b_decc_out_c7_9_scanout[0]; | |
| 3838 | assign ff_l2d_l2b_decc_out_c7_11_scanin[0]=ff_l2d_l2b_decc_out_c7_13_scanout[0]; | |
| 3839 | assign ff_l2d_l2b_decc_out_c7_15_scanin[0]=ff_l2d_l2b_decc_out_c7_11_scanout[0]; | |
| 3840 | assign ff_l2d_l2b_decc_out_c7_1_scanin[1]=ff_l2d_l2b_decc_out_c7_15_scanout[0]; | |
| 3841 | assign ff_l2d_l2b_decc_out_c7_5_scanin[1]=ff_l2d_l2b_decc_out_c7_1_scanout[1]; | |
| 3842 | assign ff_l2d_l2b_decc_out_c7_3_scanin[1]=ff_l2d_l2b_decc_out_c7_5_scanout[1]; | |
| 3843 | assign ff_l2d_l2b_decc_out_c7_7_scanin[1]=ff_l2d_l2b_decc_out_c7_3_scanout[1]; | |
| 3844 | assign ff_l2d_l2b_decc_out_c7_9_scanin[1]=ff_l2d_l2b_decc_out_c7_7_scanout[1]; | |
| 3845 | assign ff_l2d_l2b_decc_out_c7_13_scanin[1]=ff_l2d_l2b_decc_out_c7_9_scanout[1]; | |
| 3846 | assign ff_l2d_l2b_decc_out_c7_11_scanin[1]=ff_l2d_l2b_decc_out_c7_13_scanout[1]; | |
| 3847 | assign ff_l2d_l2b_decc_out_c7_15_scanin[1]=ff_l2d_l2b_decc_out_c7_11_scanout[1]; | |
| 3848 | assign ff_l2d_l2b_decc_out_c7_1_scanin[2]=ff_l2d_l2b_decc_out_c7_15_scanout[1]; | |
| 3849 | assign ff_l2d_l2b_decc_out_c7_5_scanin[2]=ff_l2d_l2b_decc_out_c7_1_scanout[2]; | |
| 3850 | assign ff_l2d_l2b_decc_out_c7_3_scanin[2]=ff_l2d_l2b_decc_out_c7_5_scanout[2]; | |
| 3851 | assign ff_l2d_l2b_decc_out_c7_7_scanin[2]=ff_l2d_l2b_decc_out_c7_3_scanout[2]; | |
| 3852 | assign ff_l2d_l2b_decc_out_c7_9_scanin[2]=ff_l2d_l2b_decc_out_c7_7_scanout[2]; | |
| 3853 | assign ff_l2d_l2b_decc_out_c7_13_scanin[2]=ff_l2d_l2b_decc_out_c7_9_scanout[2]; | |
| 3854 | assign ff_l2d_l2b_decc_out_c7_11_scanin[2]=ff_l2d_l2b_decc_out_c7_13_scanout[2]; | |
| 3855 | assign ff_l2d_l2b_decc_out_c7_15_scanin[2]=ff_l2d_l2b_decc_out_c7_11_scanout[2]; | |
| 3856 | assign ff_l2d_l2b_decc_out_c7_1_scanin[3]=ff_l2d_l2b_decc_out_c7_15_scanout[2]; | |
| 3857 | assign ff_l2d_l2b_decc_out_c7_5_scanin[3]=ff_l2d_l2b_decc_out_c7_1_scanout[3]; | |
| 3858 | assign ff_l2d_l2b_decc_out_c7_3_scanin[3]=ff_l2d_l2b_decc_out_c7_5_scanout[3]; | |
| 3859 | assign ff_l2d_l2b_decc_out_c7_7_scanin[3]=ff_l2d_l2b_decc_out_c7_3_scanout[3]; | |
| 3860 | assign ff_l2d_l2b_decc_out_c7_9_scanin[3]=ff_l2d_l2b_decc_out_c7_7_scanout[3]; | |
| 3861 | assign ff_l2d_l2b_decc_out_c7_13_scanin[3]=ff_l2d_l2b_decc_out_c7_9_scanout[3]; | |
| 3862 | assign ff_l2d_l2b_decc_out_c7_11_scanin[3]=ff_l2d_l2b_decc_out_c7_13_scanout[3]; | |
| 3863 | assign ff_l2d_l2b_decc_out_c7_15_scanin[3]=ff_l2d_l2b_decc_out_c7_11_scanout[3]; | |
| 3864 | assign ff_l2d_l2b_decc_out_c7_1_scanin[4]=ff_l2d_l2b_decc_out_c7_15_scanout[3]; | |
| 3865 | assign ff_l2d_l2b_decc_out_c7_5_scanin[4]=ff_l2d_l2b_decc_out_c7_1_scanout[4]; | |
| 3866 | assign ff_l2d_l2b_decc_out_c7_3_scanin[4]=ff_l2d_l2b_decc_out_c7_5_scanout[4]; | |
| 3867 | assign ff_l2d_l2b_decc_out_c7_7_scanin[4]=ff_l2d_l2b_decc_out_c7_3_scanout[4]; | |
| 3868 | assign ff_l2d_l2b_decc_out_c7_9_scanin[4]=ff_l2d_l2b_decc_out_c7_7_scanout[4]; | |
| 3869 | assign ff_l2d_l2b_decc_out_c7_13_scanin[4]=ff_l2d_l2b_decc_out_c7_9_scanout[4]; | |
| 3870 | assign ff_l2d_l2b_decc_out_c7_11_scanin[4]=ff_l2d_l2b_decc_out_c7_13_scanout[4]; | |
| 3871 | assign ff_l2d_l2b_decc_out_c7_15_scanin[4]=ff_l2d_l2b_decc_out_c7_11_scanout[4]; | |
| 3872 | assign ff_l2d_l2b_decc_out_c7_1_scanin[5]=ff_l2d_l2b_decc_out_c7_15_scanout[4]; | |
| 3873 | assign ff_l2d_l2b_decc_out_c7_5_scanin[5]=ff_l2d_l2b_decc_out_c7_1_scanout[5]; | |
| 3874 | assign ff_l2d_l2b_decc_out_c7_3_scanin[5]=ff_l2d_l2b_decc_out_c7_5_scanout[5]; | |
| 3875 | assign ff_l2d_l2b_decc_out_c7_7_scanin[5]=ff_l2d_l2b_decc_out_c7_3_scanout[5]; | |
| 3876 | assign ff_l2d_l2b_decc_out_c7_9_scanin[5]=ff_l2d_l2b_decc_out_c7_7_scanout[5]; | |
| 3877 | assign ff_l2d_l2b_decc_out_c7_13_scanin[5]=ff_l2d_l2b_decc_out_c7_9_scanout[5]; | |
| 3878 | assign ff_l2d_l2b_decc_out_c7_11_scanin[5]=ff_l2d_l2b_decc_out_c7_13_scanout[5]; | |
| 3879 | assign ff_l2d_l2b_decc_out_c7_15_scanin[5]=ff_l2d_l2b_decc_out_c7_11_scanout[5]; | |
| 3880 | assign ff_l2d_l2b_decc_out_c7_1_scanin[6]=ff_l2d_l2b_decc_out_c7_15_scanout[5]; | |
| 3881 | assign ff_l2d_l2b_decc_out_c7_5_scanin[6]=ff_l2d_l2b_decc_out_c7_1_scanout[6]; | |
| 3882 | assign ff_l2d_l2b_decc_out_c7_3_scanin[6]=ff_l2d_l2b_decc_out_c7_5_scanout[6]; | |
| 3883 | assign ff_l2d_l2b_decc_out_c7_7_scanin[6]=ff_l2d_l2b_decc_out_c7_3_scanout[6]; | |
| 3884 | assign ff_l2d_l2b_decc_out_c7_9_scanin[6]=ff_l2d_l2b_decc_out_c7_7_scanout[6]; | |
| 3885 | assign ff_l2d_l2b_decc_out_c7_13_scanin[6]=ff_l2d_l2b_decc_out_c7_9_scanout[6]; | |
| 3886 | assign ff_l2d_l2b_decc_out_c7_11_scanin[6]=ff_l2d_l2b_decc_out_c7_13_scanout[6]; | |
| 3887 | assign ff_l2d_l2b_decc_out_c7_15_scanin[6]=ff_l2d_l2b_decc_out_c7_11_scanout[6]; | |
| 3888 | assign ff_l2d_l2b_decc_out_c7_1_scanin[7]=ff_l2d_l2b_decc_out_c7_15_scanout[6]; | |
| 3889 | assign ff_l2d_l2b_decc_out_c7_5_scanin[7]=ff_l2d_l2b_decc_out_c7_1_scanout[7]; | |
| 3890 | assign ff_l2d_l2b_decc_out_c7_3_scanin[7]=ff_l2d_l2b_decc_out_c7_5_scanout[7]; | |
| 3891 | assign ff_l2d_l2b_decc_out_c7_7_scanin[7]=ff_l2d_l2b_decc_out_c7_3_scanout[7]; | |
| 3892 | assign ff_l2d_l2b_decc_out_c7_9_scanin[7]=ff_l2d_l2b_decc_out_c7_7_scanout[7]; | |
| 3893 | assign ff_l2d_l2b_decc_out_c7_13_scanin[7]=ff_l2d_l2b_decc_out_c7_9_scanout[7]; | |
| 3894 | assign ff_l2d_l2b_decc_out_c7_11_scanin[7]=ff_l2d_l2b_decc_out_c7_13_scanout[7]; | |
| 3895 | assign ff_l2d_l2b_decc_out_c7_15_scanin[7]=ff_l2d_l2b_decc_out_c7_11_scanout[7]; | |
| 3896 | assign ff_l2d_l2b_decc_out_c7_1_scanin[8]=ff_l2d_l2b_decc_out_c7_15_scanout[7]; | |
| 3897 | assign ff_l2d_l2b_decc_out_c7_5_scanin[8]=ff_l2d_l2b_decc_out_c7_1_scanout[8]; | |
| 3898 | assign ff_l2d_l2b_decc_out_c7_3_scanin[8]=ff_l2d_l2b_decc_out_c7_5_scanout[8]; | |
| 3899 | assign ff_l2d_l2b_decc_out_c7_7_scanin[8]=ff_l2d_l2b_decc_out_c7_3_scanout[8]; | |
| 3900 | assign ff_l2d_l2b_decc_out_c7_9_scanin[8]=ff_l2d_l2b_decc_out_c7_7_scanout[8]; | |
| 3901 | assign ff_l2d_l2b_decc_out_c7_13_scanin[8]=ff_l2d_l2b_decc_out_c7_9_scanout[8]; | |
| 3902 | assign ff_l2d_l2b_decc_out_c7_11_scanin[8]=ff_l2d_l2b_decc_out_c7_13_scanout[8]; | |
| 3903 | assign ff_l2d_l2b_decc_out_c7_15_scanin[8]=ff_l2d_l2b_decc_out_c7_11_scanout[8]; | |
| 3904 | assign ff_l2d_l2b_decc_out_c7_1_scanin[9]=ff_l2d_l2b_decc_out_c7_15_scanout[8]; | |
| 3905 | assign ff_l2d_l2b_decc_out_c7_5_scanin[9]=ff_l2d_l2b_decc_out_c7_1_scanout[9]; | |
| 3906 | assign ff_l2d_l2b_decc_out_c7_3_scanin[9]=ff_l2d_l2b_decc_out_c7_5_scanout[9]; | |
| 3907 | assign ff_l2d_l2b_decc_out_c7_7_scanin[9]=ff_l2d_l2b_decc_out_c7_3_scanout[9]; | |
| 3908 | assign ff_l2d_l2b_decc_out_c7_9_scanin[9]=ff_l2d_l2b_decc_out_c7_7_scanout[9]; | |
| 3909 | assign ff_l2d_l2b_decc_out_c7_13_scanin[9]=ff_l2d_l2b_decc_out_c7_9_scanout[9]; | |
| 3910 | assign ff_l2d_l2b_decc_out_c7_11_scanin[9]=ff_l2d_l2b_decc_out_c7_13_scanout[9]; | |
| 3911 | assign ff_l2d_l2b_decc_out_c7_15_scanin[9]=ff_l2d_l2b_decc_out_c7_11_scanout[9]; | |
| 3912 | assign ff_l2d_l2b_decc_out_c7_1_scanin[10]=ff_l2d_l2b_decc_out_c7_15_scanout[9]; | |
| 3913 | assign ff_l2d_l2b_decc_out_c7_5_scanin[10]=ff_l2d_l2b_decc_out_c7_1_scanout[10]; | |
| 3914 | assign ff_l2d_l2b_decc_out_c7_3_scanin[10]=ff_l2d_l2b_decc_out_c7_5_scanout[10]; | |
| 3915 | assign ff_l2d_l2b_decc_out_c7_7_scanin[10]=ff_l2d_l2b_decc_out_c7_3_scanout[10]; | |
| 3916 | assign ff_l2d_l2b_decc_out_c7_9_scanin[10]=ff_l2d_l2b_decc_out_c7_7_scanout[10]; | |
| 3917 | assign ff_l2d_l2b_decc_out_c7_13_scanin[10]=ff_l2d_l2b_decc_out_c7_9_scanout[10]; | |
| 3918 | assign ff_l2d_l2b_decc_out_c7_11_scanin[10]=ff_l2d_l2b_decc_out_c7_13_scanout[10]; | |
| 3919 | assign ff_l2d_l2b_decc_out_c7_15_scanin[10]=ff_l2d_l2b_decc_out_c7_11_scanout[10]; | |
| 3920 | assign ff_l2d_l2b_decc_out_c7_1_scanin[11]=ff_l2d_l2b_decc_out_c7_15_scanout[10]; | |
| 3921 | assign ff_l2d_l2b_decc_out_c7_5_scanin[11]=ff_l2d_l2b_decc_out_c7_1_scanout[11]; | |
| 3922 | assign ff_l2d_l2b_decc_out_c7_3_scanin[11]=ff_l2d_l2b_decc_out_c7_5_scanout[11]; | |
| 3923 | assign ff_l2d_l2b_decc_out_c7_7_scanin[11]=ff_l2d_l2b_decc_out_c7_3_scanout[11]; | |
| 3924 | assign ff_l2d_l2b_decc_out_c7_9_scanin[11]=ff_l2d_l2b_decc_out_c7_7_scanout[11]; | |
| 3925 | assign ff_l2d_l2b_decc_out_c7_13_scanin[11]=ff_l2d_l2b_decc_out_c7_9_scanout[11]; | |
| 3926 | assign ff_l2d_l2b_decc_out_c7_11_scanin[11]=ff_l2d_l2b_decc_out_c7_13_scanout[11]; | |
| 3927 | assign ff_l2d_l2b_decc_out_c7_15_scanin[11]=ff_l2d_l2b_decc_out_c7_11_scanout[11]; | |
| 3928 | assign ff_l2d_l2b_decc_out_c7_1_scanin[12]=ff_l2d_l2b_decc_out_c7_15_scanout[11]; | |
| 3929 | assign ff_l2d_l2b_decc_out_c7_5_scanin[12]=ff_l2d_l2b_decc_out_c7_1_scanout[12]; | |
| 3930 | assign ff_l2d_l2b_decc_out_c7_3_scanin[12]=ff_l2d_l2b_decc_out_c7_5_scanout[12]; | |
| 3931 | assign ff_l2d_l2b_decc_out_c7_7_scanin[12]=ff_l2d_l2b_decc_out_c7_3_scanout[12]; | |
| 3932 | assign ff_l2d_l2b_decc_out_c7_9_scanin[12]=ff_l2d_l2b_decc_out_c7_7_scanout[12]; | |
| 3933 | assign ff_l2d_l2b_decc_out_c7_13_scanin[12]=ff_l2d_l2b_decc_out_c7_9_scanout[12]; | |
| 3934 | assign ff_l2d_l2b_decc_out_c7_11_scanin[12]=ff_l2d_l2b_decc_out_c7_13_scanout[12]; | |
| 3935 | assign ff_l2d_l2b_decc_out_c7_15_scanin[12]=ff_l2d_l2b_decc_out_c7_11_scanout[12]; | |
| 3936 | assign ff_l2d_l2b_decc_out_c7_1_scanin[13]=ff_l2d_l2b_decc_out_c7_15_scanout[12]; | |
| 3937 | assign ff_l2d_l2b_decc_out_c7_5_scanin[13]=ff_l2d_l2b_decc_out_c7_1_scanout[13]; | |
| 3938 | assign ff_l2d_l2b_decc_out_c7_3_scanin[13]=ff_l2d_l2b_decc_out_c7_5_scanout[13]; | |
| 3939 | assign ff_l2d_l2b_decc_out_c7_7_scanin[13]=ff_l2d_l2b_decc_out_c7_3_scanout[13]; | |
| 3940 | assign ff_l2d_l2b_decc_out_c7_9_scanin[13]=ff_l2d_l2b_decc_out_c7_7_scanout[13]; | |
| 3941 | assign ff_l2d_l2b_decc_out_c7_13_scanin[13]=ff_l2d_l2b_decc_out_c7_9_scanout[13]; | |
| 3942 | assign ff_l2d_l2b_decc_out_c7_11_scanin[13]=ff_l2d_l2b_decc_out_c7_13_scanout[13]; | |
| 3943 | assign ff_l2d_l2b_decc_out_c7_15_scanin[13]=ff_l2d_l2b_decc_out_c7_11_scanout[13]; | |
| 3944 | assign ff_l2d_l2b_decc_out_c7_1_scanin[14]=ff_l2d_l2b_decc_out_c7_15_scanout[13]; | |
| 3945 | assign ff_l2d_l2b_decc_out_c7_5_scanin[14]=ff_l2d_l2b_decc_out_c7_1_scanout[14]; | |
| 3946 | assign ff_l2d_l2b_decc_out_c7_3_scanin[14]=ff_l2d_l2b_decc_out_c7_5_scanout[14]; | |
| 3947 | assign ff_l2d_l2b_decc_out_c7_7_scanin[14]=ff_l2d_l2b_decc_out_c7_3_scanout[14]; | |
| 3948 | assign ff_l2d_l2b_decc_out_c7_9_scanin[14]=ff_l2d_l2b_decc_out_c7_7_scanout[14]; | |
| 3949 | assign ff_l2d_l2b_decc_out_c7_13_scanin[14]=ff_l2d_l2b_decc_out_c7_9_scanout[14]; | |
| 3950 | assign ff_l2d_l2b_decc_out_c7_11_scanin[14]=ff_l2d_l2b_decc_out_c7_13_scanout[14]; | |
| 3951 | assign ff_l2d_l2b_decc_out_c7_15_scanin[14]=ff_l2d_l2b_decc_out_c7_11_scanout[14]; | |
| 3952 | assign ff_l2d_l2b_decc_out_c7_1_scanin[15]=ff_l2d_l2b_decc_out_c7_15_scanout[14]; | |
| 3953 | assign ff_l2d_l2b_decc_out_c7_5_scanin[15]=ff_l2d_l2b_decc_out_c7_1_scanout[15]; | |
| 3954 | assign ff_l2d_l2b_decc_out_c7_3_scanin[15]=ff_l2d_l2b_decc_out_c7_5_scanout[15]; | |
| 3955 | assign ff_l2d_l2b_decc_out_c7_7_scanin[15]=ff_l2d_l2b_decc_out_c7_3_scanout[15]; | |
| 3956 | assign ff_l2d_l2b_decc_out_c7_9_scanin[15]=ff_l2d_l2b_decc_out_c7_7_scanout[15]; | |
| 3957 | assign ff_l2d_l2b_decc_out_c7_13_scanin[15]=ff_l2d_l2b_decc_out_c7_9_scanout[15]; | |
| 3958 | assign ff_l2d_l2b_decc_out_c7_11_scanin[15]=ff_l2d_l2b_decc_out_c7_13_scanout[15]; | |
| 3959 | assign ff_l2d_l2b_decc_out_c7_15_scanin[15]=ff_l2d_l2b_decc_out_c7_11_scanout[15]; | |
| 3960 | assign ff_l2d_l2b_decc_out_c7_1_scanin[16]=ff_l2d_l2b_decc_out_c7_15_scanout[15]; | |
| 3961 | assign ff_l2d_l2b_decc_out_c7_5_scanin[16]=ff_l2d_l2b_decc_out_c7_1_scanout[16]; | |
| 3962 | assign ff_l2d_l2b_decc_out_c7_3_scanin[16]=ff_l2d_l2b_decc_out_c7_5_scanout[16]; | |
| 3963 | assign ff_l2d_l2b_decc_out_c7_7_scanin[16]=ff_l2d_l2b_decc_out_c7_3_scanout[16]; | |
| 3964 | assign ff_l2d_l2b_decc_out_c7_9_scanin[16]=ff_l2d_l2b_decc_out_c7_7_scanout[16]; | |
| 3965 | assign ff_l2d_l2b_decc_out_c7_13_scanin[16]=ff_l2d_l2b_decc_out_c7_9_scanout[16]; | |
| 3966 | assign ff_l2d_l2b_decc_out_c7_11_scanin[16]=ff_l2d_l2b_decc_out_c7_13_scanout[16]; | |
| 3967 | assign ff_l2d_l2b_decc_out_c7_15_scanin[16]=ff_l2d_l2b_decc_out_c7_11_scanout[16]; | |
| 3968 | assign ff_l2d_l2b_decc_out_c7_1_scanin[17]=ff_l2d_l2b_decc_out_c7_15_scanout[16]; | |
| 3969 | assign ff_l2d_l2b_decc_out_c7_5_scanin[17]=ff_l2d_l2b_decc_out_c7_1_scanout[17]; | |
| 3970 | assign ff_l2d_l2b_decc_out_c7_3_scanin[17]=ff_l2d_l2b_decc_out_c7_5_scanout[17]; | |
| 3971 | assign ff_l2d_l2b_decc_out_c7_7_scanin[17]=ff_l2d_l2b_decc_out_c7_3_scanout[17]; | |
| 3972 | assign ff_l2d_l2b_decc_out_c7_9_scanin[17]=ff_l2d_l2b_decc_out_c7_7_scanout[17]; | |
| 3973 | assign ff_l2d_l2b_decc_out_c7_13_scanin[17]=ff_l2d_l2b_decc_out_c7_9_scanout[17]; | |
| 3974 | assign ff_l2d_l2b_decc_out_c7_11_scanin[17]=ff_l2d_l2b_decc_out_c7_13_scanout[17]; | |
| 3975 | assign ff_l2d_l2b_decc_out_c7_15_scanin[17]=ff_l2d_l2b_decc_out_c7_11_scanout[17]; | |
| 3976 | assign ff_l2d_l2b_decc_out_c7_1_scanin[18]=ff_l2d_l2b_decc_out_c7_15_scanout[17]; | |
| 3977 | assign ff_l2d_l2b_decc_out_c7_5_scanin[18]=ff_l2d_l2b_decc_out_c7_1_scanout[18]; | |
| 3978 | assign ff_l2d_l2b_decc_out_c7_3_scanin[18]=ff_l2d_l2b_decc_out_c7_5_scanout[18]; | |
| 3979 | assign ff_l2d_l2b_decc_out_c7_7_scanin[18]=ff_l2d_l2b_decc_out_c7_3_scanout[18]; | |
| 3980 | assign ff_l2d_l2b_decc_out_c7_9_scanin[18]=ff_l2d_l2b_decc_out_c7_7_scanout[18]; | |
| 3981 | assign ff_l2d_l2b_decc_out_c7_13_scanin[18]=ff_l2d_l2b_decc_out_c7_9_scanout[18]; | |
| 3982 | assign ff_l2d_l2b_decc_out_c7_11_scanin[18]=ff_l2d_l2b_decc_out_c7_13_scanout[18]; | |
| 3983 | assign ff_l2d_l2b_decc_out_c7_15_scanin[18]=ff_l2d_l2b_decc_out_c7_11_scanout[18]; | |
| 3984 | assign ff_l2d_l2b_decc_out_c7_1_scanin[19]=ff_l2d_l2b_decc_out_c7_15_scanout[18]; | |
| 3985 | assign ff_l2d_l2b_decc_out_c7_5_scanin[19]=ff_l2d_l2b_decc_out_c7_1_scanout[19]; | |
| 3986 | assign ff_l2d_l2b_decc_out_c7_3_scanin[19]=ff_l2d_l2b_decc_out_c7_5_scanout[19]; | |
| 3987 | assign ff_l2d_l2b_decc_out_c7_7_scanin[19]=ff_l2d_l2b_decc_out_c7_3_scanout[19]; | |
| 3988 | assign ff_l2d_l2b_decc_out_c7_9_scanin[19]=ff_l2d_l2b_decc_out_c7_7_scanout[19]; | |
| 3989 | assign ff_l2d_l2b_decc_out_c7_13_scanin[19]=ff_l2d_l2b_decc_out_c7_9_scanout[19]; | |
| 3990 | assign ff_l2d_l2b_decc_out_c7_11_scanin[19]=ff_l2d_l2b_decc_out_c7_13_scanout[19]; | |
| 3991 | assign ff_l2d_l2b_decc_out_c7_15_scanin[19]=ff_l2d_l2b_decc_out_c7_11_scanout[19]; | |
| 3992 | assign ff_l2d_l2b_decc_out_c7_1_scanin[20]=ff_l2d_l2b_decc_out_c7_15_scanout[19]; | |
| 3993 | assign ff_l2d_l2b_decc_out_c7_5_scanin[20]=ff_l2d_l2b_decc_out_c7_1_scanout[20]; | |
| 3994 | assign ff_l2d_l2b_decc_out_c7_3_scanin[20]=ff_l2d_l2b_decc_out_c7_5_scanout[20]; | |
| 3995 | assign ff_l2d_l2b_decc_out_c7_7_scanin[20]=ff_l2d_l2b_decc_out_c7_3_scanout[20]; | |
| 3996 | assign ff_l2d_l2b_decc_out_c7_9_scanin[20]=ff_l2d_l2b_decc_out_c7_7_scanout[20]; | |
| 3997 | assign ff_l2d_l2b_decc_out_c7_13_scanin[20]=ff_l2d_l2b_decc_out_c7_9_scanout[20]; | |
| 3998 | assign ff_l2d_l2b_decc_out_c7_11_scanin[20]=ff_l2d_l2b_decc_out_c7_13_scanout[20]; | |
| 3999 | assign ff_l2d_l2b_decc_out_c7_15_scanin[20]=ff_l2d_l2b_decc_out_c7_11_scanout[20]; | |
| 4000 | assign ff_l2d_l2b_decc_out_c7_1_scanin[21]=ff_l2d_l2b_decc_out_c7_15_scanout[20]; | |
| 4001 | assign ff_l2d_l2b_decc_out_c7_5_scanin[21]=ff_l2d_l2b_decc_out_c7_1_scanout[21]; | |
| 4002 | assign ff_l2d_l2b_decc_out_c7_3_scanin[21]=ff_l2d_l2b_decc_out_c7_5_scanout[21]; | |
| 4003 | assign ff_l2d_l2b_decc_out_c7_7_scanin[21]=ff_l2d_l2b_decc_out_c7_3_scanout[21]; | |
| 4004 | assign ff_l2d_l2b_decc_out_c7_9_scanin[21]=ff_l2d_l2b_decc_out_c7_7_scanout[21]; | |
| 4005 | assign ff_l2d_l2b_decc_out_c7_13_scanin[21]=ff_l2d_l2b_decc_out_c7_9_scanout[21]; | |
| 4006 | assign ff_l2d_l2b_decc_out_c7_11_scanin[21]=ff_l2d_l2b_decc_out_c7_13_scanout[21]; | |
| 4007 | assign ff_l2d_l2b_decc_out_c7_15_scanin[21]=ff_l2d_l2b_decc_out_c7_11_scanout[21]; | |
| 4008 | assign ff_l2d_l2b_decc_out_c7_1_scanin[22]=ff_l2d_l2b_decc_out_c7_15_scanout[21]; | |
| 4009 | assign ff_l2d_l2b_decc_out_c7_5_scanin[22]=ff_l2d_l2b_decc_out_c7_1_scanout[22]; | |
| 4010 | assign ff_l2d_l2b_decc_out_c7_3_scanin[22]=ff_l2d_l2b_decc_out_c7_5_scanout[22]; | |
| 4011 | assign ff_l2d_l2b_decc_out_c7_7_scanin[22]=ff_l2d_l2b_decc_out_c7_3_scanout[22]; | |
| 4012 | assign ff_l2d_l2b_decc_out_c7_9_scanin[22]=ff_l2d_l2b_decc_out_c7_7_scanout[22]; | |
| 4013 | assign ff_l2d_l2b_decc_out_c7_13_scanin[22]=ff_l2d_l2b_decc_out_c7_9_scanout[22]; | |
| 4014 | assign ff_l2d_l2b_decc_out_c7_11_scanin[22]=ff_l2d_l2b_decc_out_c7_13_scanout[22]; | |
| 4015 | assign ff_l2d_l2b_decc_out_c7_15_scanin[22]=ff_l2d_l2b_decc_out_c7_11_scanout[22]; | |
| 4016 | assign ff_l2d_l2b_decc_out_c7_1_scanin[23]=ff_l2d_l2b_decc_out_c7_15_scanout[22]; | |
| 4017 | assign ff_l2d_l2b_decc_out_c7_5_scanin[23]=ff_l2d_l2b_decc_out_c7_1_scanout[23]; | |
| 4018 | assign ff_l2d_l2b_decc_out_c7_3_scanin[23]=ff_l2d_l2b_decc_out_c7_5_scanout[23]; | |
| 4019 | assign ff_l2d_l2b_decc_out_c7_7_scanin[23]=ff_l2d_l2b_decc_out_c7_3_scanout[23]; | |
| 4020 | assign ff_l2d_l2b_decc_out_c7_9_scanin[23]=ff_l2d_l2b_decc_out_c7_7_scanout[23]; | |
| 4021 | assign ff_l2d_l2b_decc_out_c7_13_scanin[23]=ff_l2d_l2b_decc_out_c7_9_scanout[23]; | |
| 4022 | assign ff_l2d_l2b_decc_out_c7_11_scanin[23]=ff_l2d_l2b_decc_out_c7_13_scanout[23]; | |
| 4023 | assign ff_l2d_l2b_decc_out_c7_15_scanin[23]=ff_l2d_l2b_decc_out_c7_11_scanout[23]; | |
| 4024 | assign ff_l2d_l2b_decc_out_c7_1_scanin[24]=ff_l2d_l2b_decc_out_c7_15_scanout[23]; | |
| 4025 | assign ff_l2d_l2b_decc_out_c7_5_scanin[24]=ff_l2d_l2b_decc_out_c7_1_scanout[24]; | |
| 4026 | assign ff_l2d_l2b_decc_out_c7_3_scanin[24]=ff_l2d_l2b_decc_out_c7_5_scanout[24]; | |
| 4027 | assign ff_l2d_l2b_decc_out_c7_7_scanin[24]=ff_l2d_l2b_decc_out_c7_3_scanout[24]; | |
| 4028 | assign ff_l2d_l2b_decc_out_c7_9_scanin[24]=ff_l2d_l2b_decc_out_c7_7_scanout[24]; | |
| 4029 | assign ff_l2d_l2b_decc_out_c7_13_scanin[24]=ff_l2d_l2b_decc_out_c7_9_scanout[24]; | |
| 4030 | assign ff_l2d_l2b_decc_out_c7_11_scanin[24]=ff_l2d_l2b_decc_out_c7_13_scanout[24]; | |
| 4031 | assign ff_l2d_l2b_decc_out_c7_15_scanin[24]=ff_l2d_l2b_decc_out_c7_11_scanout[24]; | |
| 4032 | assign ff_l2d_l2b_decc_out_c7_1_scanin[25]=ff_l2d_l2b_decc_out_c7_15_scanout[24]; | |
| 4033 | assign ff_l2d_l2b_decc_out_c7_5_scanin[25]=ff_l2d_l2b_decc_out_c7_1_scanout[25]; | |
| 4034 | assign ff_l2d_l2b_decc_out_c7_3_scanin[25]=ff_l2d_l2b_decc_out_c7_5_scanout[25]; | |
| 4035 | assign ff_l2d_l2b_decc_out_c7_7_scanin[25]=ff_l2d_l2b_decc_out_c7_3_scanout[25]; | |
| 4036 | assign ff_l2d_l2b_decc_out_c7_9_scanin[25]=ff_l2d_l2b_decc_out_c7_7_scanout[25]; | |
| 4037 | assign ff_l2d_l2b_decc_out_c7_13_scanin[25]=ff_l2d_l2b_decc_out_c7_9_scanout[25]; | |
| 4038 | assign ff_l2d_l2b_decc_out_c7_11_scanin[25]=ff_l2d_l2b_decc_out_c7_13_scanout[25]; | |
| 4039 | assign ff_l2d_l2b_decc_out_c7_15_scanin[25]=ff_l2d_l2b_decc_out_c7_11_scanout[25]; | |
| 4040 | assign ff_l2d_l2b_decc_out_c7_1_scanin[26]=ff_l2d_l2b_decc_out_c7_15_scanout[25]; | |
| 4041 | assign ff_l2d_l2b_decc_out_c7_5_scanin[26]=ff_l2d_l2b_decc_out_c7_1_scanout[26]; | |
| 4042 | assign ff_l2d_l2b_decc_out_c7_3_scanin[26]=ff_l2d_l2b_decc_out_c7_5_scanout[26]; | |
| 4043 | assign ff_l2d_l2b_decc_out_c7_7_scanin[26]=ff_l2d_l2b_decc_out_c7_3_scanout[26]; | |
| 4044 | assign ff_l2d_l2b_decc_out_c7_9_scanin[26]=ff_l2d_l2b_decc_out_c7_7_scanout[26]; | |
| 4045 | assign ff_l2d_l2b_decc_out_c7_13_scanin[26]=ff_l2d_l2b_decc_out_c7_9_scanout[26]; | |
| 4046 | assign ff_l2d_l2b_decc_out_c7_11_scanin[26]=ff_l2d_l2b_decc_out_c7_13_scanout[26]; | |
| 4047 | assign ff_l2d_l2b_decc_out_c7_15_scanin[26]=ff_l2d_l2b_decc_out_c7_11_scanout[26]; | |
| 4048 | assign ff_l2d_l2b_decc_out_c7_1_scanin[27]=ff_l2d_l2b_decc_out_c7_15_scanout[26]; | |
| 4049 | assign ff_l2d_l2b_decc_out_c7_5_scanin[27]=ff_l2d_l2b_decc_out_c7_1_scanout[27]; | |
| 4050 | assign ff_l2d_l2b_decc_out_c7_3_scanin[27]=ff_l2d_l2b_decc_out_c7_5_scanout[27]; | |
| 4051 | assign ff_l2d_l2b_decc_out_c7_7_scanin[27]=ff_l2d_l2b_decc_out_c7_3_scanout[27]; | |
| 4052 | assign ff_l2d_l2b_decc_out_c7_9_scanin[27]=ff_l2d_l2b_decc_out_c7_7_scanout[27]; | |
| 4053 | assign ff_l2d_l2b_decc_out_c7_13_scanin[27]=ff_l2d_l2b_decc_out_c7_9_scanout[27]; | |
| 4054 | assign ff_l2d_l2b_decc_out_c7_11_scanin[27]=ff_l2d_l2b_decc_out_c7_13_scanout[27]; | |
| 4055 | assign ff_l2d_l2b_decc_out_c7_15_scanin[27]=ff_l2d_l2b_decc_out_c7_11_scanout[27]; | |
| 4056 | assign ff_l2d_l2b_decc_out_c7_1_scanin[28]=ff_l2d_l2b_decc_out_c7_15_scanout[27]; | |
| 4057 | assign ff_l2d_l2b_decc_out_c7_5_scanin[28]=ff_l2d_l2b_decc_out_c7_1_scanout[28]; | |
| 4058 | assign ff_l2d_l2b_decc_out_c7_3_scanin[28]=ff_l2d_l2b_decc_out_c7_5_scanout[28]; | |
| 4059 | assign ff_l2d_l2b_decc_out_c7_7_scanin[28]=ff_l2d_l2b_decc_out_c7_3_scanout[28]; | |
| 4060 | assign ff_l2d_l2b_decc_out_c7_9_scanin[28]=ff_l2d_l2b_decc_out_c7_7_scanout[28]; | |
| 4061 | assign ff_l2d_l2b_decc_out_c7_13_scanin[28]=ff_l2d_l2b_decc_out_c7_9_scanout[28]; | |
| 4062 | assign ff_l2d_l2b_decc_out_c7_11_scanin[28]=ff_l2d_l2b_decc_out_c7_13_scanout[28]; | |
| 4063 | assign ff_l2d_l2b_decc_out_c7_15_scanin[28]=ff_l2d_l2b_decc_out_c7_11_scanout[28]; | |
| 4064 | assign ff_l2d_l2b_decc_out_c7_1_scanin[29]=ff_l2d_l2b_decc_out_c7_15_scanout[28]; | |
| 4065 | assign ff_l2d_l2b_decc_out_c7_5_scanin[29]=ff_l2d_l2b_decc_out_c7_1_scanout[29]; | |
| 4066 | assign ff_l2d_l2b_decc_out_c7_3_scanin[29]=ff_l2d_l2b_decc_out_c7_5_scanout[29]; | |
| 4067 | assign ff_l2d_l2b_decc_out_c7_7_scanin[29]=ff_l2d_l2b_decc_out_c7_3_scanout[29]; | |
| 4068 | assign ff_l2d_l2b_decc_out_c7_9_scanin[29]=ff_l2d_l2b_decc_out_c7_7_scanout[29]; | |
| 4069 | assign ff_l2d_l2b_decc_out_c7_13_scanin[29]=ff_l2d_l2b_decc_out_c7_9_scanout[29]; | |
| 4070 | assign ff_l2d_l2b_decc_out_c7_11_scanin[29]=ff_l2d_l2b_decc_out_c7_13_scanout[29]; | |
| 4071 | assign ff_l2d_l2b_decc_out_c7_15_scanin[29]=ff_l2d_l2b_decc_out_c7_11_scanout[29]; | |
| 4072 | assign ff_l2d_l2b_decc_out_c7_1_scanin[30]=ff_l2d_l2b_decc_out_c7_15_scanout[29]; | |
| 4073 | assign ff_l2d_l2b_decc_out_c7_5_scanin[30]=ff_l2d_l2b_decc_out_c7_1_scanout[30]; | |
| 4074 | assign ff_l2d_l2b_decc_out_c7_3_scanin[30]=ff_l2d_l2b_decc_out_c7_5_scanout[30]; | |
| 4075 | assign ff_l2d_l2b_decc_out_c7_7_scanin[30]=ff_l2d_l2b_decc_out_c7_3_scanout[30]; | |
| 4076 | assign ff_l2d_l2b_decc_out_c7_9_scanin[30]=ff_l2d_l2b_decc_out_c7_7_scanout[30]; | |
| 4077 | assign ff_l2d_l2b_decc_out_c7_13_scanin[30]=ff_l2d_l2b_decc_out_c7_9_scanout[30]; | |
| 4078 | assign ff_l2d_l2b_decc_out_c7_11_scanin[30]=ff_l2d_l2b_decc_out_c7_13_scanout[30]; | |
| 4079 | assign ff_l2d_l2b_decc_out_c7_15_scanin[30]=ff_l2d_l2b_decc_out_c7_11_scanout[30]; | |
| 4080 | assign ff_l2d_l2b_decc_out_c7_1_scanin[31]=ff_l2d_l2b_decc_out_c7_15_scanout[30]; | |
| 4081 | assign ff_l2d_l2b_decc_out_c7_5_scanin[31]=ff_l2d_l2b_decc_out_c7_1_scanout[31]; | |
| 4082 | assign ff_l2d_l2b_decc_out_c7_3_scanin[31]=ff_l2d_l2b_decc_out_c7_5_scanout[31]; | |
| 4083 | assign ff_l2d_l2b_decc_out_c7_7_scanin[31]=ff_l2d_l2b_decc_out_c7_3_scanout[31]; | |
| 4084 | assign ff_l2d_l2b_decc_out_c7_9_scanin[31]=ff_l2d_l2b_decc_out_c7_7_scanout[31]; | |
| 4085 | assign ff_l2d_l2b_decc_out_c7_13_scanin[31]=ff_l2d_l2b_decc_out_c7_9_scanout[31]; | |
| 4086 | assign ff_l2d_l2b_decc_out_c7_11_scanin[31]=ff_l2d_l2b_decc_out_c7_13_scanout[31]; | |
| 4087 | assign ff_l2d_l2b_decc_out_c7_15_scanin[31]=ff_l2d_l2b_decc_out_c7_11_scanout[31]; | |
| 4088 | assign ff_l2d_l2b_decc_out_c7_1_scanin[32]=ff_l2d_l2b_decc_out_c7_15_scanout[31]; | |
| 4089 | assign ff_l2d_l2b_decc_out_c7_5_scanin[32]=ff_l2d_l2b_decc_out_c7_1_scanout[32]; | |
| 4090 | assign ff_l2d_l2b_decc_out_c7_3_scanin[32]=ff_l2d_l2b_decc_out_c7_5_scanout[32]; | |
| 4091 | assign ff_l2d_l2b_decc_out_c7_7_scanin[32]=ff_l2d_l2b_decc_out_c7_3_scanout[32]; | |
| 4092 | assign ff_l2d_l2b_decc_out_c7_9_scanin[32]=ff_l2d_l2b_decc_out_c7_7_scanout[32]; | |
| 4093 | assign ff_l2d_l2b_decc_out_c7_13_scanin[32]=ff_l2d_l2b_decc_out_c7_9_scanout[32]; | |
| 4094 | assign ff_l2d_l2b_decc_out_c7_11_scanin[32]=ff_l2d_l2b_decc_out_c7_13_scanout[32]; | |
| 4095 | assign ff_l2d_l2b_decc_out_c7_15_scanin[32]=ff_l2d_l2b_decc_out_c7_11_scanout[32]; | |
| 4096 | assign ff_l2d_l2b_decc_out_c7_1_scanin[33]=ff_l2d_l2b_decc_out_c7_15_scanout[32]; | |
| 4097 | assign ff_l2d_l2b_decc_out_c7_5_scanin[33]=ff_l2d_l2b_decc_out_c7_1_scanout[33]; | |
| 4098 | assign ff_l2d_l2b_decc_out_c7_3_scanin[33]=ff_l2d_l2b_decc_out_c7_5_scanout[33]; | |
| 4099 | assign ff_l2d_l2b_decc_out_c7_7_scanin[33]=ff_l2d_l2b_decc_out_c7_3_scanout[33]; | |
| 4100 | assign ff_l2d_l2b_decc_out_c7_9_scanin[33]=ff_l2d_l2b_decc_out_c7_7_scanout[33]; | |
| 4101 | assign ff_l2d_l2b_decc_out_c7_13_scanin[33]=ff_l2d_l2b_decc_out_c7_9_scanout[33]; | |
| 4102 | assign ff_l2d_l2b_decc_out_c7_11_scanin[33]=ff_l2d_l2b_decc_out_c7_13_scanout[33]; | |
| 4103 | assign ff_l2d_l2b_decc_out_c7_15_scanin[33]=ff_l2d_l2b_decc_out_c7_11_scanout[33]; | |
| 4104 | assign ff_l2d_l2b_decc_out_c7_1_scanin[34]=ff_l2d_l2b_decc_out_c7_15_scanout[33]; | |
| 4105 | assign ff_l2d_l2b_decc_out_c7_5_scanin[34]=ff_l2d_l2b_decc_out_c7_1_scanout[34]; | |
| 4106 | assign ff_l2d_l2b_decc_out_c7_3_scanin[34]=ff_l2d_l2b_decc_out_c7_5_scanout[34]; | |
| 4107 | assign ff_l2d_l2b_decc_out_c7_7_scanin[34]=ff_l2d_l2b_decc_out_c7_3_scanout[34]; | |
| 4108 | assign ff_l2d_l2b_decc_out_c7_9_scanin[34]=ff_l2d_l2b_decc_out_c7_7_scanout[34]; | |
| 4109 | assign ff_l2d_l2b_decc_out_c7_13_scanin[34]=ff_l2d_l2b_decc_out_c7_9_scanout[34]; | |
| 4110 | assign ff_l2d_l2b_decc_out_c7_11_scanin[34]=ff_l2d_l2b_decc_out_c7_13_scanout[34]; | |
| 4111 | assign ff_l2d_l2b_decc_out_c7_15_scanin[34]=ff_l2d_l2b_decc_out_c7_11_scanout[34]; | |
| 4112 | assign ff_l2d_l2b_decc_out_c7_1_scanin[35]=ff_l2d_l2b_decc_out_c7_15_scanout[34]; | |
| 4113 | assign ff_l2d_l2b_decc_out_c7_5_scanin[35]=ff_l2d_l2b_decc_out_c7_1_scanout[35]; | |
| 4114 | assign ff_l2d_l2b_decc_out_c7_3_scanin[35]=ff_l2d_l2b_decc_out_c7_5_scanout[35]; | |
| 4115 | assign ff_l2d_l2b_decc_out_c7_7_scanin[35]=ff_l2d_l2b_decc_out_c7_3_scanout[35]; | |
| 4116 | assign ff_l2d_l2b_decc_out_c7_9_scanin[35]=ff_l2d_l2b_decc_out_c7_7_scanout[35]; | |
| 4117 | assign ff_l2d_l2b_decc_out_c7_13_scanin[35]=ff_l2d_l2b_decc_out_c7_9_scanout[35]; | |
| 4118 | assign ff_l2d_l2b_decc_out_c7_11_scanin[35]=ff_l2d_l2b_decc_out_c7_13_scanout[35]; | |
| 4119 | assign ff_l2d_l2b_decc_out_c7_15_scanin[35]=ff_l2d_l2b_decc_out_c7_11_scanout[35]; | |
| 4120 | assign ff_l2d_l2b_decc_out_c7_1_scanin[36]=ff_l2d_l2b_decc_out_c7_15_scanout[35]; | |
| 4121 | assign ff_l2d_l2b_decc_out_c7_5_scanin[36]=ff_l2d_l2b_decc_out_c7_1_scanout[36]; | |
| 4122 | assign ff_l2d_l2b_decc_out_c7_3_scanin[36]=ff_l2d_l2b_decc_out_c7_5_scanout[36]; | |
| 4123 | assign ff_l2d_l2b_decc_out_c7_7_scanin[36]=ff_l2d_l2b_decc_out_c7_3_scanout[36]; | |
| 4124 | assign ff_l2d_l2b_decc_out_c7_9_scanin[36]=ff_l2d_l2b_decc_out_c7_7_scanout[36]; | |
| 4125 | assign ff_l2d_l2b_decc_out_c7_13_scanin[36]=ff_l2d_l2b_decc_out_c7_9_scanout[36]; | |
| 4126 | assign ff_l2d_l2b_decc_out_c7_11_scanin[36]=ff_l2d_l2b_decc_out_c7_13_scanout[36]; | |
| 4127 | assign ff_l2d_l2b_decc_out_c7_15_scanin[36]=ff_l2d_l2b_decc_out_c7_11_scanout[36]; | |
| 4128 | assign ff_l2d_l2b_decc_out_c7_1_scanin[37]=ff_l2d_l2b_decc_out_c7_15_scanout[36]; | |
| 4129 | assign ff_l2d_l2b_decc_out_c7_5_scanin[37]=ff_l2d_l2b_decc_out_c7_1_scanout[37]; | |
| 4130 | assign ff_l2d_l2b_decc_out_c7_3_scanin[37]=ff_l2d_l2b_decc_out_c7_5_scanout[37]; | |
| 4131 | assign ff_l2d_l2b_decc_out_c7_7_scanin[37]=ff_l2d_l2b_decc_out_c7_3_scanout[37]; | |
| 4132 | assign ff_l2d_l2b_decc_out_c7_9_scanin[37]=ff_l2d_l2b_decc_out_c7_7_scanout[37]; | |
| 4133 | assign ff_l2d_l2b_decc_out_c7_13_scanin[37]=ff_l2d_l2b_decc_out_c7_9_scanout[37]; | |
| 4134 | assign ff_l2d_l2b_decc_out_c7_11_scanin[37]=ff_l2d_l2b_decc_out_c7_13_scanout[37]; | |
| 4135 | assign ff_l2d_l2b_decc_out_c7_15_scanin[37]=ff_l2d_l2b_decc_out_c7_11_scanout[37]; | |
| 4136 | assign ff_l2d_l2b_decc_out_c7_1_scanin[38]=ff_l2d_l2b_decc_out_c7_15_scanout[37]; | |
| 4137 | assign ff_l2d_l2b_decc_out_c7_5_scanin[38]=ff_l2d_l2b_decc_out_c7_1_scanout[38]; | |
| 4138 | assign ff_l2d_l2b_decc_out_c7_3_scanin[38]=ff_l2d_l2b_decc_out_c7_5_scanout[38]; | |
| 4139 | assign ff_l2d_l2b_decc_out_c7_7_scanin[38]=ff_l2d_l2b_decc_out_c7_3_scanout[38]; | |
| 4140 | assign ff_l2d_l2b_decc_out_c7_9_scanin[38]=ff_l2d_l2b_decc_out_c7_7_scanout[38]; | |
| 4141 | assign ff_l2d_l2b_decc_out_c7_13_scanin[38]=ff_l2d_l2b_decc_out_c7_9_scanout[38]; | |
| 4142 | assign ff_l2d_l2b_decc_out_c7_11_scanin[38]=ff_l2d_l2b_decc_out_c7_13_scanout[38]; | |
| 4143 | assign ff_l2d_l2b_decc_out_c7_15_scanin[38]=ff_l2d_l2b_decc_out_c7_11_scanout[38]; | |
| 4144 | assign ff_l2d_l2b_decc_out_c7_2_scanin[0]=ff_l2d_l2b_decc_out_c7_15_scanout[38]; | |
| 4145 | assign ff_l2d_l2b_decc_out_c7_6_scanin[0]=ff_l2d_l2b_decc_out_c7_2_scanout[0]; | |
| 4146 | assign ff_l2d_l2b_decc_out_c7_4_scanin[0]=ff_l2d_l2b_decc_out_c7_6_scanout[0]; | |
| 4147 | assign ff_l2d_l2b_decc_out_c7_8_scanin[0]=ff_l2d_l2b_decc_out_c7_4_scanout[0]; | |
| 4148 | assign ff_l2d_l2b_decc_out_c7_10_scanin[0]=ff_l2d_l2b_decc_out_c7_8_scanout[0]; | |
| 4149 | assign ff_l2d_l2b_decc_out_c7_14_scanin[0]=ff_l2d_l2b_decc_out_c7_10_scanout[0]; | |
| 4150 | assign ff_l2d_l2b_decc_out_c7_12_scanin[0]=ff_l2d_l2b_decc_out_c7_14_scanout[0]; | |
| 4151 | assign ff_l2d_l2b_decc_out_c7_16_scanin[0]=ff_l2d_l2b_decc_out_c7_12_scanout[0]; | |
| 4152 | assign ff_l2d_l2b_decc_out_c7_2_scanin[1]=ff_l2d_l2b_decc_out_c7_16_scanout[0]; | |
| 4153 | assign ff_l2d_l2b_decc_out_c7_6_scanin[1]=ff_l2d_l2b_decc_out_c7_2_scanout[1]; | |
| 4154 | assign ff_l2d_l2b_decc_out_c7_4_scanin[1]=ff_l2d_l2b_decc_out_c7_6_scanout[1]; | |
| 4155 | assign ff_l2d_l2b_decc_out_c7_8_scanin[1]=ff_l2d_l2b_decc_out_c7_4_scanout[1]; | |
| 4156 | assign ff_l2d_l2b_decc_out_c7_10_scanin[1]=ff_l2d_l2b_decc_out_c7_8_scanout[1]; | |
| 4157 | assign ff_l2d_l2b_decc_out_c7_14_scanin[1]=ff_l2d_l2b_decc_out_c7_10_scanout[1]; | |
| 4158 | assign ff_l2d_l2b_decc_out_c7_12_scanin[1]=ff_l2d_l2b_decc_out_c7_14_scanout[1]; | |
| 4159 | assign ff_l2d_l2b_decc_out_c7_16_scanin[1]=ff_l2d_l2b_decc_out_c7_12_scanout[1]; | |
| 4160 | assign ff_l2d_l2b_decc_out_c7_2_scanin[2]=ff_l2d_l2b_decc_out_c7_16_scanout[1]; | |
| 4161 | assign ff_l2d_l2b_decc_out_c7_6_scanin[2]=ff_l2d_l2b_decc_out_c7_2_scanout[2]; | |
| 4162 | assign ff_l2d_l2b_decc_out_c7_4_scanin[2]=ff_l2d_l2b_decc_out_c7_6_scanout[2]; | |
| 4163 | assign ff_l2d_l2b_decc_out_c7_8_scanin[2]=ff_l2d_l2b_decc_out_c7_4_scanout[2]; | |
| 4164 | assign ff_l2d_l2b_decc_out_c7_10_scanin[2]=ff_l2d_l2b_decc_out_c7_8_scanout[2]; | |
| 4165 | assign ff_l2d_l2b_decc_out_c7_14_scanin[2]=ff_l2d_l2b_decc_out_c7_10_scanout[2]; | |
| 4166 | assign ff_l2d_l2b_decc_out_c7_12_scanin[2]=ff_l2d_l2b_decc_out_c7_14_scanout[2]; | |
| 4167 | assign ff_l2d_l2b_decc_out_c7_16_scanin[2]=ff_l2d_l2b_decc_out_c7_12_scanout[2]; | |
| 4168 | assign ff_l2d_l2b_decc_out_c7_2_scanin[3]=ff_l2d_l2b_decc_out_c7_16_scanout[2]; | |
| 4169 | assign ff_l2d_l2b_decc_out_c7_6_scanin[3]=ff_l2d_l2b_decc_out_c7_2_scanout[3]; | |
| 4170 | assign ff_l2d_l2b_decc_out_c7_4_scanin[3]=ff_l2d_l2b_decc_out_c7_6_scanout[3]; | |
| 4171 | assign ff_l2d_l2b_decc_out_c7_8_scanin[3]=ff_l2d_l2b_decc_out_c7_4_scanout[3]; | |
| 4172 | assign ff_l2d_l2b_decc_out_c7_10_scanin[3]=ff_l2d_l2b_decc_out_c7_8_scanout[3]; | |
| 4173 | assign ff_l2d_l2b_decc_out_c7_14_scanin[3]=ff_l2d_l2b_decc_out_c7_10_scanout[3]; | |
| 4174 | assign ff_l2d_l2b_decc_out_c7_12_scanin[3]=ff_l2d_l2b_decc_out_c7_14_scanout[3]; | |
| 4175 | assign ff_l2d_l2b_decc_out_c7_16_scanin[3]=ff_l2d_l2b_decc_out_c7_12_scanout[3]; | |
| 4176 | assign ff_l2d_l2b_decc_out_c7_2_scanin[4]=ff_l2d_l2b_decc_out_c7_16_scanout[3]; | |
| 4177 | assign ff_l2d_l2b_decc_out_c7_6_scanin[4]=ff_l2d_l2b_decc_out_c7_2_scanout[4]; | |
| 4178 | assign ff_l2d_l2b_decc_out_c7_4_scanin[4]=ff_l2d_l2b_decc_out_c7_6_scanout[4]; | |
| 4179 | assign ff_l2d_l2b_decc_out_c7_8_scanin[4]=ff_l2d_l2b_decc_out_c7_4_scanout[4]; | |
| 4180 | assign ff_l2d_l2b_decc_out_c7_10_scanin[4]=ff_l2d_l2b_decc_out_c7_8_scanout[4]; | |
| 4181 | assign ff_l2d_l2b_decc_out_c7_14_scanin[4]=ff_l2d_l2b_decc_out_c7_10_scanout[4]; | |
| 4182 | assign ff_l2d_l2b_decc_out_c7_12_scanin[4]=ff_l2d_l2b_decc_out_c7_14_scanout[4]; | |
| 4183 | assign ff_l2d_l2b_decc_out_c7_16_scanin[4]=ff_l2d_l2b_decc_out_c7_12_scanout[4]; | |
| 4184 | assign ff_l2d_l2b_decc_out_c7_2_scanin[5]=ff_l2d_l2b_decc_out_c7_16_scanout[4]; | |
| 4185 | assign ff_l2d_l2b_decc_out_c7_6_scanin[5]=ff_l2d_l2b_decc_out_c7_2_scanout[5]; | |
| 4186 | assign ff_l2d_l2b_decc_out_c7_4_scanin[5]=ff_l2d_l2b_decc_out_c7_6_scanout[5]; | |
| 4187 | assign ff_l2d_l2b_decc_out_c7_8_scanin[5]=ff_l2d_l2b_decc_out_c7_4_scanout[5]; | |
| 4188 | assign ff_l2d_l2b_decc_out_c7_10_scanin[5]=ff_l2d_l2b_decc_out_c7_8_scanout[5]; | |
| 4189 | assign ff_l2d_l2b_decc_out_c7_14_scanin[5]=ff_l2d_l2b_decc_out_c7_10_scanout[5]; | |
| 4190 | assign ff_l2d_l2b_decc_out_c7_12_scanin[5]=ff_l2d_l2b_decc_out_c7_14_scanout[5]; | |
| 4191 | assign ff_l2d_l2b_decc_out_c7_16_scanin[5]=ff_l2d_l2b_decc_out_c7_12_scanout[5]; | |
| 4192 | assign ff_l2d_l2b_decc_out_c7_2_scanin[6]=ff_l2d_l2b_decc_out_c7_16_scanout[5]; | |
| 4193 | assign ff_l2d_l2b_decc_out_c7_6_scanin[6]=ff_l2d_l2b_decc_out_c7_2_scanout[6]; | |
| 4194 | assign ff_l2d_l2b_decc_out_c7_4_scanin[6]=ff_l2d_l2b_decc_out_c7_6_scanout[6]; | |
| 4195 | assign ff_l2d_l2b_decc_out_c7_8_scanin[6]=ff_l2d_l2b_decc_out_c7_4_scanout[6]; | |
| 4196 | assign ff_l2d_l2b_decc_out_c7_10_scanin[6]=ff_l2d_l2b_decc_out_c7_8_scanout[6]; | |
| 4197 | assign ff_l2d_l2b_decc_out_c7_14_scanin[6]=ff_l2d_l2b_decc_out_c7_10_scanout[6]; | |
| 4198 | assign ff_l2d_l2b_decc_out_c7_12_scanin[6]=ff_l2d_l2b_decc_out_c7_14_scanout[6]; | |
| 4199 | assign ff_l2d_l2b_decc_out_c7_16_scanin[6]=ff_l2d_l2b_decc_out_c7_12_scanout[6]; | |
| 4200 | assign ff_l2d_l2b_decc_out_c7_2_scanin[7]=ff_l2d_l2b_decc_out_c7_16_scanout[6]; | |
| 4201 | assign ff_l2d_l2b_decc_out_c7_6_scanin[7]=ff_l2d_l2b_decc_out_c7_2_scanout[7]; | |
| 4202 | assign ff_l2d_l2b_decc_out_c7_4_scanin[7]=ff_l2d_l2b_decc_out_c7_6_scanout[7]; | |
| 4203 | assign ff_l2d_l2b_decc_out_c7_8_scanin[7]=ff_l2d_l2b_decc_out_c7_4_scanout[7]; | |
| 4204 | assign ff_l2d_l2b_decc_out_c7_10_scanin[7]=ff_l2d_l2b_decc_out_c7_8_scanout[7]; | |
| 4205 | assign ff_l2d_l2b_decc_out_c7_14_scanin[7]=ff_l2d_l2b_decc_out_c7_10_scanout[7]; | |
| 4206 | assign ff_l2d_l2b_decc_out_c7_12_scanin[7]=ff_l2d_l2b_decc_out_c7_14_scanout[7]; | |
| 4207 | assign ff_l2d_l2b_decc_out_c7_16_scanin[7]=ff_l2d_l2b_decc_out_c7_12_scanout[7]; | |
| 4208 | assign ff_l2d_l2b_decc_out_c7_2_scanin[8]=ff_l2d_l2b_decc_out_c7_16_scanout[7]; | |
| 4209 | assign ff_l2d_l2b_decc_out_c7_6_scanin[8]=ff_l2d_l2b_decc_out_c7_2_scanout[8]; | |
| 4210 | assign ff_l2d_l2b_decc_out_c7_4_scanin[8]=ff_l2d_l2b_decc_out_c7_6_scanout[8]; | |
| 4211 | assign ff_l2d_l2b_decc_out_c7_8_scanin[8]=ff_l2d_l2b_decc_out_c7_4_scanout[8]; | |
| 4212 | assign ff_l2d_l2b_decc_out_c7_10_scanin[8]=ff_l2d_l2b_decc_out_c7_8_scanout[8]; | |
| 4213 | assign ff_l2d_l2b_decc_out_c7_14_scanin[8]=ff_l2d_l2b_decc_out_c7_10_scanout[8]; | |
| 4214 | assign ff_l2d_l2b_decc_out_c7_12_scanin[8]=ff_l2d_l2b_decc_out_c7_14_scanout[8]; | |
| 4215 | assign ff_l2d_l2b_decc_out_c7_16_scanin[8]=ff_l2d_l2b_decc_out_c7_12_scanout[8]; | |
| 4216 | assign ff_l2d_l2b_decc_out_c7_2_scanin[9]=ff_l2d_l2b_decc_out_c7_16_scanout[8]; | |
| 4217 | assign ff_l2d_l2b_decc_out_c7_6_scanin[9]=ff_l2d_l2b_decc_out_c7_2_scanout[9]; | |
| 4218 | assign ff_l2d_l2b_decc_out_c7_4_scanin[9]=ff_l2d_l2b_decc_out_c7_6_scanout[9]; | |
| 4219 | assign ff_l2d_l2b_decc_out_c7_8_scanin[9]=ff_l2d_l2b_decc_out_c7_4_scanout[9]; | |
| 4220 | assign ff_l2d_l2b_decc_out_c7_10_scanin[9]=ff_l2d_l2b_decc_out_c7_8_scanout[9]; | |
| 4221 | assign ff_l2d_l2b_decc_out_c7_14_scanin[9]=ff_l2d_l2b_decc_out_c7_10_scanout[9]; | |
| 4222 | assign ff_l2d_l2b_decc_out_c7_12_scanin[9]=ff_l2d_l2b_decc_out_c7_14_scanout[9]; | |
| 4223 | assign ff_l2d_l2b_decc_out_c7_16_scanin[9]=ff_l2d_l2b_decc_out_c7_12_scanout[9]; | |
| 4224 | assign ff_l2d_l2b_decc_out_c7_2_scanin[10]=ff_l2d_l2b_decc_out_c7_16_scanout[9]; | |
| 4225 | assign ff_l2d_l2b_decc_out_c7_6_scanin[10]=ff_l2d_l2b_decc_out_c7_2_scanout[10]; | |
| 4226 | assign ff_l2d_l2b_decc_out_c7_4_scanin[10]=ff_l2d_l2b_decc_out_c7_6_scanout[10]; | |
| 4227 | assign ff_l2d_l2b_decc_out_c7_8_scanin[10]=ff_l2d_l2b_decc_out_c7_4_scanout[10]; | |
| 4228 | assign ff_l2d_l2b_decc_out_c7_10_scanin[10]=ff_l2d_l2b_decc_out_c7_8_scanout[10]; | |
| 4229 | assign ff_l2d_l2b_decc_out_c7_14_scanin[10]=ff_l2d_l2b_decc_out_c7_10_scanout[10]; | |
| 4230 | assign ff_l2d_l2b_decc_out_c7_12_scanin[10]=ff_l2d_l2b_decc_out_c7_14_scanout[10]; | |
| 4231 | assign ff_l2d_l2b_decc_out_c7_16_scanin[10]=ff_l2d_l2b_decc_out_c7_12_scanout[10]; | |
| 4232 | assign ff_l2d_l2b_decc_out_c7_2_scanin[11]=ff_l2d_l2b_decc_out_c7_16_scanout[10]; | |
| 4233 | assign ff_l2d_l2b_decc_out_c7_6_scanin[11]=ff_l2d_l2b_decc_out_c7_2_scanout[11]; | |
| 4234 | assign ff_l2d_l2b_decc_out_c7_4_scanin[11]=ff_l2d_l2b_decc_out_c7_6_scanout[11]; | |
| 4235 | assign ff_l2d_l2b_decc_out_c7_8_scanin[11]=ff_l2d_l2b_decc_out_c7_4_scanout[11]; | |
| 4236 | assign ff_l2d_l2b_decc_out_c7_10_scanin[11]=ff_l2d_l2b_decc_out_c7_8_scanout[11]; | |
| 4237 | assign ff_l2d_l2b_decc_out_c7_14_scanin[11]=ff_l2d_l2b_decc_out_c7_10_scanout[11]; | |
| 4238 | assign ff_l2d_l2b_decc_out_c7_12_scanin[11]=ff_l2d_l2b_decc_out_c7_14_scanout[11]; | |
| 4239 | assign ff_l2d_l2b_decc_out_c7_16_scanin[11]=ff_l2d_l2b_decc_out_c7_12_scanout[11]; | |
| 4240 | assign ff_l2d_l2b_decc_out_c7_2_scanin[12]=ff_l2d_l2b_decc_out_c7_16_scanout[11]; | |
| 4241 | assign ff_l2d_l2b_decc_out_c7_6_scanin[12]=ff_l2d_l2b_decc_out_c7_2_scanout[12]; | |
| 4242 | assign ff_l2d_l2b_decc_out_c7_4_scanin[12]=ff_l2d_l2b_decc_out_c7_6_scanout[12]; | |
| 4243 | assign ff_l2d_l2b_decc_out_c7_8_scanin[12]=ff_l2d_l2b_decc_out_c7_4_scanout[12]; | |
| 4244 | assign ff_l2d_l2b_decc_out_c7_10_scanin[12]=ff_l2d_l2b_decc_out_c7_8_scanout[12]; | |
| 4245 | assign ff_l2d_l2b_decc_out_c7_14_scanin[12]=ff_l2d_l2b_decc_out_c7_10_scanout[12]; | |
| 4246 | assign ff_l2d_l2b_decc_out_c7_12_scanin[12]=ff_l2d_l2b_decc_out_c7_14_scanout[12]; | |
| 4247 | assign ff_l2d_l2b_decc_out_c7_16_scanin[12]=ff_l2d_l2b_decc_out_c7_12_scanout[12]; | |
| 4248 | assign ff_l2d_l2b_decc_out_c7_2_scanin[13]=ff_l2d_l2b_decc_out_c7_16_scanout[12]; | |
| 4249 | assign ff_l2d_l2b_decc_out_c7_6_scanin[13]=ff_l2d_l2b_decc_out_c7_2_scanout[13]; | |
| 4250 | assign ff_l2d_l2b_decc_out_c7_4_scanin[13]=ff_l2d_l2b_decc_out_c7_6_scanout[13]; | |
| 4251 | assign ff_l2d_l2b_decc_out_c7_8_scanin[13]=ff_l2d_l2b_decc_out_c7_4_scanout[13]; | |
| 4252 | assign ff_l2d_l2b_decc_out_c7_10_scanin[13]=ff_l2d_l2b_decc_out_c7_8_scanout[13]; | |
| 4253 | assign ff_l2d_l2b_decc_out_c7_14_scanin[13]=ff_l2d_l2b_decc_out_c7_10_scanout[13]; | |
| 4254 | assign ff_l2d_l2b_decc_out_c7_12_scanin[13]=ff_l2d_l2b_decc_out_c7_14_scanout[13]; | |
| 4255 | assign ff_l2d_l2b_decc_out_c7_16_scanin[13]=ff_l2d_l2b_decc_out_c7_12_scanout[13]; | |
| 4256 | assign ff_l2d_l2b_decc_out_c7_2_scanin[14]=ff_l2d_l2b_decc_out_c7_16_scanout[13]; | |
| 4257 | assign ff_l2d_l2b_decc_out_c7_6_scanin[14]=ff_l2d_l2b_decc_out_c7_2_scanout[14]; | |
| 4258 | assign ff_l2d_l2b_decc_out_c7_4_scanin[14]=ff_l2d_l2b_decc_out_c7_6_scanout[14]; | |
| 4259 | assign ff_l2d_l2b_decc_out_c7_8_scanin[14]=ff_l2d_l2b_decc_out_c7_4_scanout[14]; | |
| 4260 | assign ff_l2d_l2b_decc_out_c7_10_scanin[14]=ff_l2d_l2b_decc_out_c7_8_scanout[14]; | |
| 4261 | assign ff_l2d_l2b_decc_out_c7_14_scanin[14]=ff_l2d_l2b_decc_out_c7_10_scanout[14]; | |
| 4262 | assign ff_l2d_l2b_decc_out_c7_12_scanin[14]=ff_l2d_l2b_decc_out_c7_14_scanout[14]; | |
| 4263 | assign ff_l2d_l2b_decc_out_c7_16_scanin[14]=ff_l2d_l2b_decc_out_c7_12_scanout[14]; | |
| 4264 | assign ff_l2d_l2b_decc_out_c7_2_scanin[15]=ff_l2d_l2b_decc_out_c7_16_scanout[14]; | |
| 4265 | assign ff_l2d_l2b_decc_out_c7_6_scanin[15]=ff_l2d_l2b_decc_out_c7_2_scanout[15]; | |
| 4266 | assign ff_l2d_l2b_decc_out_c7_4_scanin[15]=ff_l2d_l2b_decc_out_c7_6_scanout[15]; | |
| 4267 | assign ff_l2d_l2b_decc_out_c7_8_scanin[15]=ff_l2d_l2b_decc_out_c7_4_scanout[15]; | |
| 4268 | assign ff_l2d_l2b_decc_out_c7_10_scanin[15]=ff_l2d_l2b_decc_out_c7_8_scanout[15]; | |
| 4269 | assign ff_l2d_l2b_decc_out_c7_14_scanin[15]=ff_l2d_l2b_decc_out_c7_10_scanout[15]; | |
| 4270 | assign ff_l2d_l2b_decc_out_c7_12_scanin[15]=ff_l2d_l2b_decc_out_c7_14_scanout[15]; | |
| 4271 | assign ff_l2d_l2b_decc_out_c7_16_scanin[15]=ff_l2d_l2b_decc_out_c7_12_scanout[15]; | |
| 4272 | assign ff_l2d_l2b_decc_out_c7_2_scanin[16]=ff_l2d_l2b_decc_out_c7_16_scanout[15]; | |
| 4273 | assign ff_l2d_l2b_decc_out_c7_6_scanin[16]=ff_l2d_l2b_decc_out_c7_2_scanout[16]; | |
| 4274 | assign ff_l2d_l2b_decc_out_c7_4_scanin[16]=ff_l2d_l2b_decc_out_c7_6_scanout[16]; | |
| 4275 | assign ff_l2d_l2b_decc_out_c7_8_scanin[16]=ff_l2d_l2b_decc_out_c7_4_scanout[16]; | |
| 4276 | assign ff_l2d_l2b_decc_out_c7_10_scanin[16]=ff_l2d_l2b_decc_out_c7_8_scanout[16]; | |
| 4277 | assign ff_l2d_l2b_decc_out_c7_14_scanin[16]=ff_l2d_l2b_decc_out_c7_10_scanout[16]; | |
| 4278 | assign ff_l2d_l2b_decc_out_c7_12_scanin[16]=ff_l2d_l2b_decc_out_c7_14_scanout[16]; | |
| 4279 | assign ff_l2d_l2b_decc_out_c7_16_scanin[16]=ff_l2d_l2b_decc_out_c7_12_scanout[16]; | |
| 4280 | assign ff_l2d_l2b_decc_out_c7_2_scanin[17]=ff_l2d_l2b_decc_out_c7_16_scanout[16]; | |
| 4281 | assign ff_l2d_l2b_decc_out_c7_6_scanin[17]=ff_l2d_l2b_decc_out_c7_2_scanout[17]; | |
| 4282 | assign ff_l2d_l2b_decc_out_c7_4_scanin[17]=ff_l2d_l2b_decc_out_c7_6_scanout[17]; | |
| 4283 | assign ff_l2d_l2b_decc_out_c7_8_scanin[17]=ff_l2d_l2b_decc_out_c7_4_scanout[17]; | |
| 4284 | assign ff_l2d_l2b_decc_out_c7_10_scanin[17]=ff_l2d_l2b_decc_out_c7_8_scanout[17]; | |
| 4285 | assign ff_l2d_l2b_decc_out_c7_14_scanin[17]=ff_l2d_l2b_decc_out_c7_10_scanout[17]; | |
| 4286 | assign ff_l2d_l2b_decc_out_c7_12_scanin[17]=ff_l2d_l2b_decc_out_c7_14_scanout[17]; | |
| 4287 | assign ff_l2d_l2b_decc_out_c7_16_scanin[17]=ff_l2d_l2b_decc_out_c7_12_scanout[17]; | |
| 4288 | assign ff_l2d_l2b_decc_out_c7_2_scanin[18]=ff_l2d_l2b_decc_out_c7_16_scanout[17]; | |
| 4289 | assign ff_l2d_l2b_decc_out_c7_6_scanin[18]=ff_l2d_l2b_decc_out_c7_2_scanout[18]; | |
| 4290 | assign ff_l2d_l2b_decc_out_c7_4_scanin[18]=ff_l2d_l2b_decc_out_c7_6_scanout[18]; | |
| 4291 | assign ff_l2d_l2b_decc_out_c7_8_scanin[18]=ff_l2d_l2b_decc_out_c7_4_scanout[18]; | |
| 4292 | assign ff_l2d_l2b_decc_out_c7_10_scanin[18]=ff_l2d_l2b_decc_out_c7_8_scanout[18]; | |
| 4293 | assign ff_l2d_l2b_decc_out_c7_14_scanin[18]=ff_l2d_l2b_decc_out_c7_10_scanout[18]; | |
| 4294 | assign ff_l2d_l2b_decc_out_c7_12_scanin[18]=ff_l2d_l2b_decc_out_c7_14_scanout[18]; | |
| 4295 | assign ff_l2d_l2b_decc_out_c7_16_scanin[18]=ff_l2d_l2b_decc_out_c7_12_scanout[18]; | |
| 4296 | assign ff_l2d_l2b_decc_out_c7_2_scanin[19]=ff_l2d_l2b_decc_out_c7_16_scanout[18]; | |
| 4297 | assign ff_l2d_l2b_decc_out_c7_6_scanin[19]=ff_l2d_l2b_decc_out_c7_2_scanout[19]; | |
| 4298 | assign ff_l2d_l2b_decc_out_c7_4_scanin[19]=ff_l2d_l2b_decc_out_c7_6_scanout[19]; | |
| 4299 | assign ff_l2d_l2b_decc_out_c7_8_scanin[19]=ff_l2d_l2b_decc_out_c7_4_scanout[19]; | |
| 4300 | assign ff_l2d_l2b_decc_out_c7_10_scanin[19]=ff_l2d_l2b_decc_out_c7_8_scanout[19]; | |
| 4301 | assign ff_l2d_l2b_decc_out_c7_14_scanin[19]=ff_l2d_l2b_decc_out_c7_10_scanout[19]; | |
| 4302 | assign ff_l2d_l2b_decc_out_c7_12_scanin[19]=ff_l2d_l2b_decc_out_c7_14_scanout[19]; | |
| 4303 | assign ff_l2d_l2b_decc_out_c7_16_scanin[19]=ff_l2d_l2b_decc_out_c7_12_scanout[19]; | |
| 4304 | assign ff_l2d_l2b_decc_out_c7_2_scanin[20]=ff_l2d_l2b_decc_out_c7_16_scanout[19]; | |
| 4305 | assign ff_l2d_l2b_decc_out_c7_6_scanin[20]=ff_l2d_l2b_decc_out_c7_2_scanout[20]; | |
| 4306 | assign ff_l2d_l2b_decc_out_c7_4_scanin[20]=ff_l2d_l2b_decc_out_c7_6_scanout[20]; | |
| 4307 | assign ff_l2d_l2b_decc_out_c7_8_scanin[20]=ff_l2d_l2b_decc_out_c7_4_scanout[20]; | |
| 4308 | assign ff_l2d_l2b_decc_out_c7_10_scanin[20]=ff_l2d_l2b_decc_out_c7_8_scanout[20]; | |
| 4309 | assign ff_l2d_l2b_decc_out_c7_14_scanin[20]=ff_l2d_l2b_decc_out_c7_10_scanout[20]; | |
| 4310 | assign ff_l2d_l2b_decc_out_c7_12_scanin[20]=ff_l2d_l2b_decc_out_c7_14_scanout[20]; | |
| 4311 | assign ff_l2d_l2b_decc_out_c7_16_scanin[20]=ff_l2d_l2b_decc_out_c7_12_scanout[20]; | |
| 4312 | assign ff_l2d_l2b_decc_out_c7_2_scanin[21]=ff_l2d_l2b_decc_out_c7_16_scanout[20]; | |
| 4313 | assign ff_l2d_l2b_decc_out_c7_6_scanin[21]=ff_l2d_l2b_decc_out_c7_2_scanout[21]; | |
| 4314 | assign ff_l2d_l2b_decc_out_c7_4_scanin[21]=ff_l2d_l2b_decc_out_c7_6_scanout[21]; | |
| 4315 | assign ff_l2d_l2b_decc_out_c7_8_scanin[21]=ff_l2d_l2b_decc_out_c7_4_scanout[21]; | |
| 4316 | assign ff_l2d_l2b_decc_out_c7_10_scanin[21]=ff_l2d_l2b_decc_out_c7_8_scanout[21]; | |
| 4317 | assign ff_l2d_l2b_decc_out_c7_14_scanin[21]=ff_l2d_l2b_decc_out_c7_10_scanout[21]; | |
| 4318 | assign ff_l2d_l2b_decc_out_c7_12_scanin[21]=ff_l2d_l2b_decc_out_c7_14_scanout[21]; | |
| 4319 | assign ff_l2d_l2b_decc_out_c7_16_scanin[21]=ff_l2d_l2b_decc_out_c7_12_scanout[21]; | |
| 4320 | assign ff_l2d_l2b_decc_out_c7_2_scanin[22]=ff_l2d_l2b_decc_out_c7_16_scanout[21]; | |
| 4321 | assign ff_l2d_l2b_decc_out_c7_6_scanin[22]=ff_l2d_l2b_decc_out_c7_2_scanout[22]; | |
| 4322 | assign ff_l2d_l2b_decc_out_c7_4_scanin[22]=ff_l2d_l2b_decc_out_c7_6_scanout[22]; | |
| 4323 | assign ff_l2d_l2b_decc_out_c7_8_scanin[22]=ff_l2d_l2b_decc_out_c7_4_scanout[22]; | |
| 4324 | assign ff_l2d_l2b_decc_out_c7_10_scanin[22]=ff_l2d_l2b_decc_out_c7_8_scanout[22]; | |
| 4325 | assign ff_l2d_l2b_decc_out_c7_14_scanin[22]=ff_l2d_l2b_decc_out_c7_10_scanout[22]; | |
| 4326 | assign ff_l2d_l2b_decc_out_c7_12_scanin[22]=ff_l2d_l2b_decc_out_c7_14_scanout[22]; | |
| 4327 | assign ff_l2d_l2b_decc_out_c7_16_scanin[22]=ff_l2d_l2b_decc_out_c7_12_scanout[22]; | |
| 4328 | assign ff_l2d_l2b_decc_out_c7_2_scanin[23]=ff_l2d_l2b_decc_out_c7_16_scanout[22]; | |
| 4329 | assign ff_l2d_l2b_decc_out_c7_6_scanin[23]=ff_l2d_l2b_decc_out_c7_2_scanout[23]; | |
| 4330 | assign ff_l2d_l2b_decc_out_c7_4_scanin[23]=ff_l2d_l2b_decc_out_c7_6_scanout[23]; | |
| 4331 | assign ff_l2d_l2b_decc_out_c7_8_scanin[23]=ff_l2d_l2b_decc_out_c7_4_scanout[23]; | |
| 4332 | assign ff_l2d_l2b_decc_out_c7_10_scanin[23]=ff_l2d_l2b_decc_out_c7_8_scanout[23]; | |
| 4333 | assign ff_l2d_l2b_decc_out_c7_14_scanin[23]=ff_l2d_l2b_decc_out_c7_10_scanout[23]; | |
| 4334 | assign ff_l2d_l2b_decc_out_c7_12_scanin[23]=ff_l2d_l2b_decc_out_c7_14_scanout[23]; | |
| 4335 | assign ff_l2d_l2b_decc_out_c7_16_scanin[23]=ff_l2d_l2b_decc_out_c7_12_scanout[23]; | |
| 4336 | assign ff_l2d_l2b_decc_out_c7_2_scanin[24]=ff_l2d_l2b_decc_out_c7_16_scanout[23]; | |
| 4337 | assign ff_l2d_l2b_decc_out_c7_6_scanin[24]=ff_l2d_l2b_decc_out_c7_2_scanout[24]; | |
| 4338 | assign ff_l2d_l2b_decc_out_c7_4_scanin[24]=ff_l2d_l2b_decc_out_c7_6_scanout[24]; | |
| 4339 | assign ff_l2d_l2b_decc_out_c7_8_scanin[24]=ff_l2d_l2b_decc_out_c7_4_scanout[24]; | |
| 4340 | assign ff_l2d_l2b_decc_out_c7_10_scanin[24]=ff_l2d_l2b_decc_out_c7_8_scanout[24]; | |
| 4341 | assign ff_l2d_l2b_decc_out_c7_14_scanin[24]=ff_l2d_l2b_decc_out_c7_10_scanout[24]; | |
| 4342 | assign ff_l2d_l2b_decc_out_c7_12_scanin[24]=ff_l2d_l2b_decc_out_c7_14_scanout[24]; | |
| 4343 | assign ff_l2d_l2b_decc_out_c7_16_scanin[24]=ff_l2d_l2b_decc_out_c7_12_scanout[24]; | |
| 4344 | assign ff_l2d_l2b_decc_out_c7_2_scanin[25]=ff_l2d_l2b_decc_out_c7_16_scanout[24]; | |
| 4345 | assign ff_l2d_l2b_decc_out_c7_6_scanin[25]=ff_l2d_l2b_decc_out_c7_2_scanout[25]; | |
| 4346 | assign ff_l2d_l2b_decc_out_c7_4_scanin[25]=ff_l2d_l2b_decc_out_c7_6_scanout[25]; | |
| 4347 | assign ff_l2d_l2b_decc_out_c7_8_scanin[25]=ff_l2d_l2b_decc_out_c7_4_scanout[25]; | |
| 4348 | assign ff_l2d_l2b_decc_out_c7_10_scanin[25]=ff_l2d_l2b_decc_out_c7_8_scanout[25]; | |
| 4349 | assign ff_l2d_l2b_decc_out_c7_14_scanin[25]=ff_l2d_l2b_decc_out_c7_10_scanout[25]; | |
| 4350 | assign ff_l2d_l2b_decc_out_c7_12_scanin[25]=ff_l2d_l2b_decc_out_c7_14_scanout[25]; | |
| 4351 | assign ff_l2d_l2b_decc_out_c7_16_scanin[25]=ff_l2d_l2b_decc_out_c7_12_scanout[25]; | |
| 4352 | assign ff_l2d_l2b_decc_out_c7_2_scanin[26]=ff_l2d_l2b_decc_out_c7_16_scanout[25]; | |
| 4353 | assign ff_l2d_l2b_decc_out_c7_6_scanin[26]=ff_l2d_l2b_decc_out_c7_2_scanout[26]; | |
| 4354 | assign ff_l2d_l2b_decc_out_c7_4_scanin[26]=ff_l2d_l2b_decc_out_c7_6_scanout[26]; | |
| 4355 | assign ff_l2d_l2b_decc_out_c7_8_scanin[26]=ff_l2d_l2b_decc_out_c7_4_scanout[26]; | |
| 4356 | assign ff_l2d_l2b_decc_out_c7_10_scanin[26]=ff_l2d_l2b_decc_out_c7_8_scanout[26]; | |
| 4357 | assign ff_l2d_l2b_decc_out_c7_14_scanin[26]=ff_l2d_l2b_decc_out_c7_10_scanout[26]; | |
| 4358 | assign ff_l2d_l2b_decc_out_c7_12_scanin[26]=ff_l2d_l2b_decc_out_c7_14_scanout[26]; | |
| 4359 | assign ff_l2d_l2b_decc_out_c7_16_scanin[26]=ff_l2d_l2b_decc_out_c7_12_scanout[26]; | |
| 4360 | assign ff_l2d_l2b_decc_out_c7_2_scanin[27]=ff_l2d_l2b_decc_out_c7_16_scanout[26]; | |
| 4361 | assign ff_l2d_l2b_decc_out_c7_6_scanin[27]=ff_l2d_l2b_decc_out_c7_2_scanout[27]; | |
| 4362 | assign ff_l2d_l2b_decc_out_c7_4_scanin[27]=ff_l2d_l2b_decc_out_c7_6_scanout[27]; | |
| 4363 | assign ff_l2d_l2b_decc_out_c7_8_scanin[27]=ff_l2d_l2b_decc_out_c7_4_scanout[27]; | |
| 4364 | assign ff_l2d_l2b_decc_out_c7_10_scanin[27]=ff_l2d_l2b_decc_out_c7_8_scanout[27]; | |
| 4365 | assign ff_l2d_l2b_decc_out_c7_14_scanin[27]=ff_l2d_l2b_decc_out_c7_10_scanout[27]; | |
| 4366 | assign ff_l2d_l2b_decc_out_c7_12_scanin[27]=ff_l2d_l2b_decc_out_c7_14_scanout[27]; | |
| 4367 | assign ff_l2d_l2b_decc_out_c7_16_scanin[27]=ff_l2d_l2b_decc_out_c7_12_scanout[27]; | |
| 4368 | assign ff_l2d_l2b_decc_out_c7_2_scanin[28]=ff_l2d_l2b_decc_out_c7_16_scanout[27]; | |
| 4369 | assign ff_l2d_l2b_decc_out_c7_6_scanin[28]=ff_l2d_l2b_decc_out_c7_2_scanout[28]; | |
| 4370 | assign ff_l2d_l2b_decc_out_c7_4_scanin[28]=ff_l2d_l2b_decc_out_c7_6_scanout[28]; | |
| 4371 | assign ff_l2d_l2b_decc_out_c7_8_scanin[28]=ff_l2d_l2b_decc_out_c7_4_scanout[28]; | |
| 4372 | assign ff_l2d_l2b_decc_out_c7_10_scanin[28]=ff_l2d_l2b_decc_out_c7_8_scanout[28]; | |
| 4373 | assign ff_l2d_l2b_decc_out_c7_14_scanin[28]=ff_l2d_l2b_decc_out_c7_10_scanout[28]; | |
| 4374 | assign ff_l2d_l2b_decc_out_c7_12_scanin[28]=ff_l2d_l2b_decc_out_c7_14_scanout[28]; | |
| 4375 | assign ff_l2d_l2b_decc_out_c7_16_scanin[28]=ff_l2d_l2b_decc_out_c7_12_scanout[28]; | |
| 4376 | assign ff_l2d_l2b_decc_out_c7_2_scanin[29]=ff_l2d_l2b_decc_out_c7_16_scanout[28]; | |
| 4377 | assign ff_l2d_l2b_decc_out_c7_6_scanin[29]=ff_l2d_l2b_decc_out_c7_2_scanout[29]; | |
| 4378 | assign ff_l2d_l2b_decc_out_c7_4_scanin[29]=ff_l2d_l2b_decc_out_c7_6_scanout[29]; | |
| 4379 | assign ff_l2d_l2b_decc_out_c7_8_scanin[29]=ff_l2d_l2b_decc_out_c7_4_scanout[29]; | |
| 4380 | assign ff_l2d_l2b_decc_out_c7_10_scanin[29]=ff_l2d_l2b_decc_out_c7_8_scanout[29]; | |
| 4381 | assign ff_l2d_l2b_decc_out_c7_14_scanin[29]=ff_l2d_l2b_decc_out_c7_10_scanout[29]; | |
| 4382 | assign ff_l2d_l2b_decc_out_c7_12_scanin[29]=ff_l2d_l2b_decc_out_c7_14_scanout[29]; | |
| 4383 | assign ff_l2d_l2b_decc_out_c7_16_scanin[29]=ff_l2d_l2b_decc_out_c7_12_scanout[29]; | |
| 4384 | assign ff_l2d_l2b_decc_out_c7_2_scanin[30]=ff_l2d_l2b_decc_out_c7_16_scanout[29]; | |
| 4385 | assign ff_l2d_l2b_decc_out_c7_6_scanin[30]=ff_l2d_l2b_decc_out_c7_2_scanout[30]; | |
| 4386 | assign ff_l2d_l2b_decc_out_c7_4_scanin[30]=ff_l2d_l2b_decc_out_c7_6_scanout[30]; | |
| 4387 | assign ff_l2d_l2b_decc_out_c7_8_scanin[30]=ff_l2d_l2b_decc_out_c7_4_scanout[30]; | |
| 4388 | assign ff_l2d_l2b_decc_out_c7_10_scanin[30]=ff_l2d_l2b_decc_out_c7_8_scanout[30]; | |
| 4389 | assign ff_l2d_l2b_decc_out_c7_14_scanin[30]=ff_l2d_l2b_decc_out_c7_10_scanout[30]; | |
| 4390 | assign ff_l2d_l2b_decc_out_c7_12_scanin[30]=ff_l2d_l2b_decc_out_c7_14_scanout[30]; | |
| 4391 | assign ff_l2d_l2b_decc_out_c7_16_scanin[30]=ff_l2d_l2b_decc_out_c7_12_scanout[30]; | |
| 4392 | assign ff_l2d_l2b_decc_out_c7_2_scanin[31]=ff_l2d_l2b_decc_out_c7_16_scanout[30]; | |
| 4393 | assign ff_l2d_l2b_decc_out_c7_6_scanin[31]=ff_l2d_l2b_decc_out_c7_2_scanout[31]; | |
| 4394 | assign ff_l2d_l2b_decc_out_c7_4_scanin[31]=ff_l2d_l2b_decc_out_c7_6_scanout[31]; | |
| 4395 | assign ff_l2d_l2b_decc_out_c7_8_scanin[31]=ff_l2d_l2b_decc_out_c7_4_scanout[31]; | |
| 4396 | assign ff_l2d_l2b_decc_out_c7_10_scanin[31]=ff_l2d_l2b_decc_out_c7_8_scanout[31]; | |
| 4397 | assign ff_l2d_l2b_decc_out_c7_14_scanin[31]=ff_l2d_l2b_decc_out_c7_10_scanout[31]; | |
| 4398 | assign ff_l2d_l2b_decc_out_c7_12_scanin[31]=ff_l2d_l2b_decc_out_c7_14_scanout[31]; | |
| 4399 | assign ff_l2d_l2b_decc_out_c7_16_scanin[31]=ff_l2d_l2b_decc_out_c7_12_scanout[31]; | |
| 4400 | assign ff_l2d_l2b_decc_out_c7_2_scanin[32]=ff_l2d_l2b_decc_out_c7_16_scanout[31]; | |
| 4401 | assign ff_l2d_l2b_decc_out_c7_6_scanin[32]=ff_l2d_l2b_decc_out_c7_2_scanout[32]; | |
| 4402 | assign ff_l2d_l2b_decc_out_c7_4_scanin[32]=ff_l2d_l2b_decc_out_c7_6_scanout[32]; | |
| 4403 | assign ff_l2d_l2b_decc_out_c7_8_scanin[32]=ff_l2d_l2b_decc_out_c7_4_scanout[32]; | |
| 4404 | assign ff_l2d_l2b_decc_out_c7_10_scanin[32]=ff_l2d_l2b_decc_out_c7_8_scanout[32]; | |
| 4405 | assign ff_l2d_l2b_decc_out_c7_14_scanin[32]=ff_l2d_l2b_decc_out_c7_10_scanout[32]; | |
| 4406 | assign ff_l2d_l2b_decc_out_c7_12_scanin[32]=ff_l2d_l2b_decc_out_c7_14_scanout[32]; | |
| 4407 | assign ff_l2d_l2b_decc_out_c7_16_scanin[32]=ff_l2d_l2b_decc_out_c7_12_scanout[32]; | |
| 4408 | assign ff_l2d_l2b_decc_out_c7_2_scanin[33]=ff_l2d_l2b_decc_out_c7_16_scanout[32]; | |
| 4409 | assign ff_l2d_l2b_decc_out_c7_6_scanin[33]=ff_l2d_l2b_decc_out_c7_2_scanout[33]; | |
| 4410 | assign ff_l2d_l2b_decc_out_c7_4_scanin[33]=ff_l2d_l2b_decc_out_c7_6_scanout[33]; | |
| 4411 | assign ff_l2d_l2b_decc_out_c7_8_scanin[33]=ff_l2d_l2b_decc_out_c7_4_scanout[33]; | |
| 4412 | assign ff_l2d_l2b_decc_out_c7_10_scanin[33]=ff_l2d_l2b_decc_out_c7_8_scanout[33]; | |
| 4413 | assign ff_l2d_l2b_decc_out_c7_14_scanin[33]=ff_l2d_l2b_decc_out_c7_10_scanout[33]; | |
| 4414 | assign ff_l2d_l2b_decc_out_c7_12_scanin[33]=ff_l2d_l2b_decc_out_c7_14_scanout[33]; | |
| 4415 | assign ff_l2d_l2b_decc_out_c7_16_scanin[33]=ff_l2d_l2b_decc_out_c7_12_scanout[33]; | |
| 4416 | assign ff_l2d_l2b_decc_out_c7_2_scanin[34]=ff_l2d_l2b_decc_out_c7_16_scanout[33]; | |
| 4417 | assign ff_l2d_l2b_decc_out_c7_6_scanin[34]=ff_l2d_l2b_decc_out_c7_2_scanout[34]; | |
| 4418 | assign ff_l2d_l2b_decc_out_c7_4_scanin[34]=ff_l2d_l2b_decc_out_c7_6_scanout[34]; | |
| 4419 | assign ff_l2d_l2b_decc_out_c7_8_scanin[34]=ff_l2d_l2b_decc_out_c7_4_scanout[34]; | |
| 4420 | assign ff_l2d_l2b_decc_out_c7_10_scanin[34]=ff_l2d_l2b_decc_out_c7_8_scanout[34]; | |
| 4421 | assign ff_l2d_l2b_decc_out_c7_14_scanin[34]=ff_l2d_l2b_decc_out_c7_10_scanout[34]; | |
| 4422 | assign ff_l2d_l2b_decc_out_c7_12_scanin[34]=ff_l2d_l2b_decc_out_c7_14_scanout[34]; | |
| 4423 | assign ff_l2d_l2b_decc_out_c7_16_scanin[34]=ff_l2d_l2b_decc_out_c7_12_scanout[34]; | |
| 4424 | assign ff_l2d_l2b_decc_out_c7_2_scanin[35]=ff_l2d_l2b_decc_out_c7_16_scanout[34]; | |
| 4425 | assign ff_l2d_l2b_decc_out_c7_6_scanin[35]=ff_l2d_l2b_decc_out_c7_2_scanout[35]; | |
| 4426 | assign ff_l2d_l2b_decc_out_c7_4_scanin[35]=ff_l2d_l2b_decc_out_c7_6_scanout[35]; | |
| 4427 | assign ff_l2d_l2b_decc_out_c7_8_scanin[35]=ff_l2d_l2b_decc_out_c7_4_scanout[35]; | |
| 4428 | assign ff_l2d_l2b_decc_out_c7_10_scanin[35]=ff_l2d_l2b_decc_out_c7_8_scanout[35]; | |
| 4429 | assign ff_l2d_l2b_decc_out_c7_14_scanin[35]=ff_l2d_l2b_decc_out_c7_10_scanout[35]; | |
| 4430 | assign ff_l2d_l2b_decc_out_c7_12_scanin[35]=ff_l2d_l2b_decc_out_c7_14_scanout[35]; | |
| 4431 | assign ff_l2d_l2b_decc_out_c7_16_scanin[35]=ff_l2d_l2b_decc_out_c7_12_scanout[35]; | |
| 4432 | assign ff_l2d_l2b_decc_out_c7_2_scanin[36]=ff_l2d_l2b_decc_out_c7_16_scanout[35]; | |
| 4433 | assign ff_l2d_l2b_decc_out_c7_6_scanin[36]=ff_l2d_l2b_decc_out_c7_2_scanout[36]; | |
| 4434 | assign ff_l2d_l2b_decc_out_c7_4_scanin[36]=ff_l2d_l2b_decc_out_c7_6_scanout[36]; | |
| 4435 | assign ff_l2d_l2b_decc_out_c7_8_scanin[36]=ff_l2d_l2b_decc_out_c7_4_scanout[36]; | |
| 4436 | assign ff_l2d_l2b_decc_out_c7_10_scanin[36]=ff_l2d_l2b_decc_out_c7_8_scanout[36]; | |
| 4437 | assign ff_l2d_l2b_decc_out_c7_14_scanin[36]=ff_l2d_l2b_decc_out_c7_10_scanout[36]; | |
| 4438 | assign ff_l2d_l2b_decc_out_c7_12_scanin[36]=ff_l2d_l2b_decc_out_c7_14_scanout[36]; | |
| 4439 | assign ff_l2d_l2b_decc_out_c7_16_scanin[36]=ff_l2d_l2b_decc_out_c7_12_scanout[36]; | |
| 4440 | assign ff_l2d_l2b_decc_out_c7_2_scanin[37]=ff_l2d_l2b_decc_out_c7_16_scanout[36]; | |
| 4441 | assign ff_l2d_l2b_decc_out_c7_6_scanin[37]=ff_l2d_l2b_decc_out_c7_2_scanout[37]; | |
| 4442 | assign ff_l2d_l2b_decc_out_c7_4_scanin[37]=ff_l2d_l2b_decc_out_c7_6_scanout[37]; | |
| 4443 | assign ff_l2d_l2b_decc_out_c7_8_scanin[37]=ff_l2d_l2b_decc_out_c7_4_scanout[37]; | |
| 4444 | assign ff_l2d_l2b_decc_out_c7_10_scanin[37]=ff_l2d_l2b_decc_out_c7_8_scanout[37]; | |
| 4445 | assign ff_l2d_l2b_decc_out_c7_14_scanin[37]=ff_l2d_l2b_decc_out_c7_10_scanout[37]; | |
| 4446 | assign ff_l2d_l2b_decc_out_c7_12_scanin[37]=ff_l2d_l2b_decc_out_c7_14_scanout[37]; | |
| 4447 | assign ff_l2d_l2b_decc_out_c7_16_scanin[37]=ff_l2d_l2b_decc_out_c7_12_scanout[37]; | |
| 4448 | assign ff_l2d_l2b_decc_out_c7_2_scanin[38]=ff_l2d_l2b_decc_out_c7_16_scanout[37]; | |
| 4449 | assign ff_l2d_l2b_decc_out_c7_6_scanin[38]=ff_l2d_l2b_decc_out_c7_2_scanout[38]; | |
| 4450 | assign ff_l2d_l2b_decc_out_c7_4_scanin[38]=ff_l2d_l2b_decc_out_c7_6_scanout[38]; | |
| 4451 | assign ff_l2d_l2b_decc_out_c7_8_scanin[38]=ff_l2d_l2b_decc_out_c7_4_scanout[38]; | |
| 4452 | assign ff_l2d_l2b_decc_out_c7_10_scanin[38]=ff_l2d_l2b_decc_out_c7_8_scanout[38]; | |
| 4453 | assign ff_l2d_l2b_decc_out_c7_14_scanin[38]=ff_l2d_l2b_decc_out_c7_10_scanout[38]; | |
| 4454 | assign ff_l2d_l2b_decc_out_c7_12_scanin[38]=ff_l2d_l2b_decc_out_c7_14_scanout[38]; | |
| 4455 | assign ff_l2d_l2b_decc_out_c7_16_scanin[38]=ff_l2d_l2b_decc_out_c7_12_scanout[38]; | |
| 4456 | assign ff_l2d_l2t_decc_c6_scanin[0]=ff_l2d_l2b_decc_out_c7_16_scanout[38]; | |
| 4457 | assign ff_l2d_l2t_decc_c6_scanin[78]=ff_l2d_l2t_decc_c6_scanout[0]; | |
| 4458 | assign ff_l2d_l2t_decc_c6_scanin[1]=ff_l2d_l2t_decc_c6_scanout[78]; | |
| 4459 | assign ff_l2d_l2t_decc_c6_scanin[79]=ff_l2d_l2t_decc_c6_scanout[1]; | |
| 4460 | assign ff_l2d_l2t_decc_c6_scanin[2]=ff_l2d_l2t_decc_c6_scanout[79]; | |
| 4461 | assign ff_l2d_l2t_decc_c6_scanin[80]=ff_l2d_l2t_decc_c6_scanout[2]; | |
| 4462 | assign ff_l2d_l2t_decc_c6_scanin[3]=ff_l2d_l2t_decc_c6_scanout[80]; | |
| 4463 | assign ff_l2d_l2t_decc_c6_scanin[81]=ff_l2d_l2t_decc_c6_scanout[3]; | |
| 4464 | assign ff_l2d_l2t_decc_c6_scanin[4]=ff_l2d_l2t_decc_c6_scanout[81]; | |
| 4465 | assign ff_l2d_l2t_decc_c6_scanin[82]=ff_l2d_l2t_decc_c6_scanout[4]; | |
| 4466 | assign ff_l2d_l2t_decc_c6_scanin[5]=ff_l2d_l2t_decc_c6_scanout[82]; | |
| 4467 | assign ff_l2d_l2t_decc_c6_scanin[83]=ff_l2d_l2t_decc_c6_scanout[5]; | |
| 4468 | assign ff_l2d_l2t_decc_c6_scanin[6]=ff_l2d_l2t_decc_c6_scanout[83]; | |
| 4469 | assign ff_l2d_l2t_decc_c6_scanin[84]=ff_l2d_l2t_decc_c6_scanout[6]; | |
| 4470 | assign ff_l2d_l2t_decc_c6_scanin[7]=ff_l2d_l2t_decc_c6_scanout[84]; | |
| 4471 | assign ff_l2d_l2t_decc_c6_scanin[85]=ff_l2d_l2t_decc_c6_scanout[7]; | |
| 4472 | assign ff_l2d_l2t_decc_c6_scanin[8]=ff_l2d_l2t_decc_c6_scanout[85]; | |
| 4473 | assign ff_l2d_l2t_decc_c6_scanin[86]=ff_l2d_l2t_decc_c6_scanout[8]; | |
| 4474 | assign ff_l2d_l2t_decc_c6_scanin[9]=ff_l2d_l2t_decc_c6_scanout[86]; | |
| 4475 | assign ff_l2d_l2t_decc_c6_scanin[87]=ff_l2d_l2t_decc_c6_scanout[9]; | |
| 4476 | assign ff_l2d_l2t_decc_c6_scanin[10]=ff_l2d_l2t_decc_c6_scanout[87]; | |
| 4477 | assign ff_l2d_l2t_decc_c6_scanin[88]=ff_l2d_l2t_decc_c6_scanout[10]; | |
| 4478 | assign ff_l2d_l2t_decc_c6_scanin[11]=ff_l2d_l2t_decc_c6_scanout[88]; | |
| 4479 | assign ff_l2d_l2t_decc_c6_scanin[89]=ff_l2d_l2t_decc_c6_scanout[11]; | |
| 4480 | assign ff_l2d_l2t_decc_c6_scanin[12]=ff_l2d_l2t_decc_c6_scanout[89]; | |
| 4481 | assign ff_l2d_l2t_decc_c6_scanin[90]=ff_l2d_l2t_decc_c6_scanout[12]; | |
| 4482 | assign ff_l2d_l2t_decc_c6_scanin[13]=ff_l2d_l2t_decc_c6_scanout[90]; | |
| 4483 | assign ff_l2d_l2t_decc_c6_scanin[91]=ff_l2d_l2t_decc_c6_scanout[13]; | |
| 4484 | assign ff_l2d_l2t_decc_c6_scanin[14]=ff_l2d_l2t_decc_c6_scanout[91]; | |
| 4485 | assign ff_l2d_l2t_decc_c6_scanin[92]=ff_l2d_l2t_decc_c6_scanout[14]; | |
| 4486 | assign ff_l2d_l2t_decc_c6_scanin[15]=ff_l2d_l2t_decc_c6_scanout[92]; | |
| 4487 | assign ff_l2d_l2t_decc_c6_scanin[93]=ff_l2d_l2t_decc_c6_scanout[15]; | |
| 4488 | assign ff_l2d_l2t_decc_c6_scanin[16]=ff_l2d_l2t_decc_c6_scanout[93]; | |
| 4489 | assign ff_l2d_l2t_decc_c6_scanin[94]=ff_l2d_l2t_decc_c6_scanout[16]; | |
| 4490 | assign ff_l2d_l2t_decc_c6_scanin[17]=ff_l2d_l2t_decc_c6_scanout[94]; | |
| 4491 | assign ff_l2d_l2t_decc_c6_scanin[95]=ff_l2d_l2t_decc_c6_scanout[17]; | |
| 4492 | assign ff_l2d_l2t_decc_c6_scanin[18]=ff_l2d_l2t_decc_c6_scanout[95]; | |
| 4493 | assign ff_l2d_l2t_decc_c6_scanin[96]=ff_l2d_l2t_decc_c6_scanout[18]; | |
| 4494 | assign ff_l2d_l2t_decc_c6_scanin[19]=ff_l2d_l2t_decc_c6_scanout[96]; | |
| 4495 | assign ff_l2d_l2t_decc_c6_scanin[97]=ff_l2d_l2t_decc_c6_scanout[19]; | |
| 4496 | assign ff_l2d_l2t_decc_c6_scanin[20]=ff_l2d_l2t_decc_c6_scanout[97]; | |
| 4497 | assign ff_l2d_l2t_decc_c6_scanin[98]=ff_l2d_l2t_decc_c6_scanout[20]; | |
| 4498 | assign ff_l2d_l2t_decc_c6_scanin[21]=ff_l2d_l2t_decc_c6_scanout[98]; | |
| 4499 | assign ff_l2d_l2t_decc_c6_scanin[99]=ff_l2d_l2t_decc_c6_scanout[21]; | |
| 4500 | assign ff_l2d_l2t_decc_c6_scanin[22]=ff_l2d_l2t_decc_c6_scanout[99]; | |
| 4501 | assign ff_l2d_l2t_decc_c6_scanin[100]=ff_l2d_l2t_decc_c6_scanout[22]; | |
| 4502 | assign ff_l2d_l2t_decc_c6_scanin[23]=ff_l2d_l2t_decc_c6_scanout[100]; | |
| 4503 | assign ff_l2d_l2t_decc_c6_scanin[101]=ff_l2d_l2t_decc_c6_scanout[23]; | |
| 4504 | assign ff_l2d_l2t_decc_c6_scanin[24]=ff_l2d_l2t_decc_c6_scanout[101]; | |
| 4505 | assign ff_l2d_l2t_decc_c6_scanin[102]=ff_l2d_l2t_decc_c6_scanout[24]; | |
| 4506 | assign ff_l2d_l2t_decc_c6_scanin[25]=ff_l2d_l2t_decc_c6_scanout[102]; | |
| 4507 | assign ff_l2d_l2t_decc_c6_scanin[103]=ff_l2d_l2t_decc_c6_scanout[25]; | |
| 4508 | assign ff_l2d_l2t_decc_c6_scanin[26]=ff_l2d_l2t_decc_c6_scanout[103]; | |
| 4509 | assign ff_l2d_l2t_decc_c6_scanin[104]=ff_l2d_l2t_decc_c6_scanout[26]; | |
| 4510 | assign ff_l2d_l2t_decc_c6_scanin[27]=ff_l2d_l2t_decc_c6_scanout[104]; | |
| 4511 | assign ff_l2d_l2t_decc_c6_scanin[105]=ff_l2d_l2t_decc_c6_scanout[27]; | |
| 4512 | assign ff_l2d_l2t_decc_c6_scanin[28]=ff_l2d_l2t_decc_c6_scanout[105]; | |
| 4513 | assign ff_l2d_l2t_decc_c6_scanin[106]=ff_l2d_l2t_decc_c6_scanout[28]; | |
| 4514 | assign ff_l2d_l2t_decc_c6_scanin[29]=ff_l2d_l2t_decc_c6_scanout[106]; | |
| 4515 | assign ff_l2d_l2t_decc_c6_scanin[107]=ff_l2d_l2t_decc_c6_scanout[29]; | |
| 4516 | assign ff_l2d_l2t_decc_c6_scanin[30]=ff_l2d_l2t_decc_c6_scanout[107]; | |
| 4517 | assign ff_l2d_l2t_decc_c6_scanin[108]=ff_l2d_l2t_decc_c6_scanout[30]; | |
| 4518 | assign ff_l2d_l2t_decc_c6_scanin[31]=ff_l2d_l2t_decc_c6_scanout[108]; | |
| 4519 | assign ff_l2d_l2t_decc_c6_scanin[109]=ff_l2d_l2t_decc_c6_scanout[31]; | |
| 4520 | assign ff_l2d_l2t_decc_c6_scanin[32]=ff_l2d_l2t_decc_c6_scanout[109]; | |
| 4521 | assign ff_l2d_l2t_decc_c6_scanin[110]=ff_l2d_l2t_decc_c6_scanout[32]; | |
| 4522 | assign ff_l2d_l2t_decc_c6_scanin[33]=ff_l2d_l2t_decc_c6_scanout[110]; | |
| 4523 | assign ff_l2d_l2t_decc_c6_scanin[111]=ff_l2d_l2t_decc_c6_scanout[33]; | |
| 4524 | assign ff_l2d_l2t_decc_c6_scanin[34]=ff_l2d_l2t_decc_c6_scanout[111]; | |
| 4525 | assign ff_l2d_l2t_decc_c6_scanin[112]=ff_l2d_l2t_decc_c6_scanout[34]; | |
| 4526 | assign ff_l2d_l2t_decc_c6_scanin[35]=ff_l2d_l2t_decc_c6_scanout[112]; | |
| 4527 | assign ff_l2d_l2t_decc_c6_scanin[113]=ff_l2d_l2t_decc_c6_scanout[35]; | |
| 4528 | assign ff_l2d_l2t_decc_c6_scanin[36]=ff_l2d_l2t_decc_c6_scanout[113]; | |
| 4529 | assign ff_l2d_l2t_decc_c6_scanin[114]=ff_l2d_l2t_decc_c6_scanout[36]; | |
| 4530 | assign ff_l2d_l2t_decc_c6_scanin[37]=ff_l2d_l2t_decc_c6_scanout[114]; | |
| 4531 | assign ff_l2d_l2t_decc_c6_scanin[115]=ff_l2d_l2t_decc_c6_scanout[37]; | |
| 4532 | assign ff_l2d_l2t_decc_c6_scanin[38]=ff_l2d_l2t_decc_c6_scanout[115]; | |
| 4533 | assign ff_l2d_l2t_decc_c6_scanin[116]=ff_l2d_l2t_decc_c6_scanout[38]; | |
| 4534 | assign ff_l2d_l2t_decc_c6_scanin[39]=ff_l2d_l2t_decc_c6_scanout[116]; | |
| 4535 | assign ff_l2d_l2t_decc_c6_scanin[117]=ff_l2d_l2t_decc_c6_scanout[39]; | |
| 4536 | assign ff_l2d_l2t_decc_c6_scanin[40]=ff_l2d_l2t_decc_c6_scanout[117]; | |
| 4537 | assign ff_l2d_l2t_decc_c6_scanin[118]=ff_l2d_l2t_decc_c6_scanout[40]; | |
| 4538 | assign ff_l2d_l2t_decc_c6_scanin[41]=ff_l2d_l2t_decc_c6_scanout[118]; | |
| 4539 | assign ff_l2d_l2t_decc_c6_scanin[119]=ff_l2d_l2t_decc_c6_scanout[41]; | |
| 4540 | assign ff_l2d_l2t_decc_c6_scanin[42]=ff_l2d_l2t_decc_c6_scanout[119]; | |
| 4541 | assign ff_l2d_l2t_decc_c6_scanin[120]=ff_l2d_l2t_decc_c6_scanout[42]; | |
| 4542 | assign ff_l2d_l2t_decc_c6_scanin[43]=ff_l2d_l2t_decc_c6_scanout[120]; | |
| 4543 | assign ff_l2d_l2t_decc_c6_scanin[121]=ff_l2d_l2t_decc_c6_scanout[43]; | |
| 4544 | assign ff_l2d_l2t_decc_c6_scanin[44]=ff_l2d_l2t_decc_c6_scanout[121]; | |
| 4545 | assign ff_l2d_l2t_decc_c6_scanin[122]=ff_l2d_l2t_decc_c6_scanout[44]; | |
| 4546 | assign ff_l2d_l2t_decc_c6_scanin[45]=ff_l2d_l2t_decc_c6_scanout[122]; | |
| 4547 | assign ff_l2d_l2t_decc_c6_scanin[123]=ff_l2d_l2t_decc_c6_scanout[45]; | |
| 4548 | assign ff_l2d_l2t_decc_c6_scanin[46]=ff_l2d_l2t_decc_c6_scanout[123]; | |
| 4549 | assign ff_l2d_l2t_decc_c6_scanin[124]=ff_l2d_l2t_decc_c6_scanout[46]; | |
| 4550 | assign ff_l2d_l2t_decc_c6_scanin[47]=ff_l2d_l2t_decc_c6_scanout[124]; | |
| 4551 | assign ff_l2d_l2t_decc_c6_scanin[125]=ff_l2d_l2t_decc_c6_scanout[47]; | |
| 4552 | assign ff_l2d_l2t_decc_c6_scanin[48]=ff_l2d_l2t_decc_c6_scanout[125]; | |
| 4553 | assign ff_l2d_l2t_decc_c6_scanin[126]=ff_l2d_l2t_decc_c6_scanout[48]; | |
| 4554 | assign ff_l2d_l2t_decc_c6_scanin[49]=ff_l2d_l2t_decc_c6_scanout[126]; | |
| 4555 | assign ff_l2d_l2t_decc_c6_scanin[127]=ff_l2d_l2t_decc_c6_scanout[49]; | |
| 4556 | assign ff_l2d_l2t_decc_c6_scanin[50]=ff_l2d_l2t_decc_c6_scanout[127]; | |
| 4557 | assign ff_l2d_l2t_decc_c6_scanin[128]=ff_l2d_l2t_decc_c6_scanout[50]; | |
| 4558 | assign ff_l2d_l2t_decc_c6_scanin[51]=ff_l2d_l2t_decc_c6_scanout[128]; | |
| 4559 | assign ff_l2d_l2t_decc_c6_scanin[129]=ff_l2d_l2t_decc_c6_scanout[51]; | |
| 4560 | assign ff_l2d_l2t_decc_c6_scanin[52]=ff_l2d_l2t_decc_c6_scanout[129]; | |
| 4561 | assign ff_l2d_l2t_decc_c6_scanin[130]=ff_l2d_l2t_decc_c6_scanout[52]; | |
| 4562 | assign ff_l2d_l2t_decc_c6_scanin[53]=ff_l2d_l2t_decc_c6_scanout[130]; | |
| 4563 | assign ff_l2d_l2t_decc_c6_scanin[131]=ff_l2d_l2t_decc_c6_scanout[53]; | |
| 4564 | assign ff_l2d_l2t_decc_c6_scanin[54]=ff_l2d_l2t_decc_c6_scanout[131]; | |
| 4565 | assign ff_l2d_l2t_decc_c6_scanin[132]=ff_l2d_l2t_decc_c6_scanout[54]; | |
| 4566 | assign ff_l2d_l2t_decc_c6_scanin[55]=ff_l2d_l2t_decc_c6_scanout[132]; | |
| 4567 | assign ff_l2d_l2t_decc_c6_scanin[133]=ff_l2d_l2t_decc_c6_scanout[55]; | |
| 4568 | assign ff_l2d_l2t_decc_c6_scanin[56]=ff_l2d_l2t_decc_c6_scanout[133]; | |
| 4569 | assign ff_l2d_l2t_decc_c6_scanin[134]=ff_l2d_l2t_decc_c6_scanout[56]; | |
| 4570 | assign ff_l2d_l2t_decc_c6_scanin[57]=ff_l2d_l2t_decc_c6_scanout[134]; | |
| 4571 | assign ff_l2d_l2t_decc_c6_scanin[135]=ff_l2d_l2t_decc_c6_scanout[57]; | |
| 4572 | assign ff_l2d_l2t_decc_c6_scanin[58]=ff_l2d_l2t_decc_c6_scanout[135]; | |
| 4573 | assign ff_l2d_l2t_decc_c6_scanin[136]=ff_l2d_l2t_decc_c6_scanout[58]; | |
| 4574 | assign ff_l2d_l2t_decc_c6_scanin[59]=ff_l2d_l2t_decc_c6_scanout[136]; | |
| 4575 | assign ff_l2d_l2t_decc_c6_scanin[137]=ff_l2d_l2t_decc_c6_scanout[59]; | |
| 4576 | assign ff_l2d_l2t_decc_c6_scanin[60]=ff_l2d_l2t_decc_c6_scanout[137]; | |
| 4577 | assign ff_l2d_l2t_decc_c6_scanin[138]=ff_l2d_l2t_decc_c6_scanout[60]; | |
| 4578 | assign ff_l2d_l2t_decc_c6_scanin[61]=ff_l2d_l2t_decc_c6_scanout[138]; | |
| 4579 | assign ff_l2d_l2t_decc_c6_scanin[139]=ff_l2d_l2t_decc_c6_scanout[61]; | |
| 4580 | assign ff_l2d_l2t_decc_c6_scanin[62]=ff_l2d_l2t_decc_c6_scanout[139]; | |
| 4581 | assign ff_l2d_l2t_decc_c6_scanin[140]=ff_l2d_l2t_decc_c6_scanout[62]; | |
| 4582 | assign ff_l2d_l2t_decc_c6_scanin[63]=ff_l2d_l2t_decc_c6_scanout[140]; | |
| 4583 | assign ff_l2d_l2t_decc_c6_scanin[141]=ff_l2d_l2t_decc_c6_scanout[63]; | |
| 4584 | assign ff_l2d_l2t_decc_c6_scanin[64]=ff_l2d_l2t_decc_c6_scanout[141]; | |
| 4585 | assign ff_l2d_l2t_decc_c6_scanin[142]=ff_l2d_l2t_decc_c6_scanout[64]; | |
| 4586 | assign ff_l2d_l2t_decc_c6_scanin[65]=ff_l2d_l2t_decc_c6_scanout[142]; | |
| 4587 | assign ff_l2d_l2t_decc_c6_scanin[143]=ff_l2d_l2t_decc_c6_scanout[65]; | |
| 4588 | assign ff_l2d_l2t_decc_c6_scanin[66]=ff_l2d_l2t_decc_c6_scanout[143]; | |
| 4589 | assign ff_l2d_l2t_decc_c6_scanin[144]=ff_l2d_l2t_decc_c6_scanout[66]; | |
| 4590 | assign ff_l2d_l2t_decc_c6_scanin[67]=ff_l2d_l2t_decc_c6_scanout[144]; | |
| 4591 | assign ff_l2d_l2t_decc_c6_scanin[145]=ff_l2d_l2t_decc_c6_scanout[67]; | |
| 4592 | assign ff_l2d_l2t_decc_c6_scanin[68]=ff_l2d_l2t_decc_c6_scanout[145]; | |
| 4593 | assign ff_l2d_l2t_decc_c6_scanin[146]=ff_l2d_l2t_decc_c6_scanout[68]; | |
| 4594 | assign ff_l2d_l2t_decc_c6_scanin[69]=ff_l2d_l2t_decc_c6_scanout[146]; | |
| 4595 | assign ff_l2d_l2t_decc_c6_scanin[147]=ff_l2d_l2t_decc_c6_scanout[69]; | |
| 4596 | assign ff_l2d_l2t_decc_c6_scanin[70]=ff_l2d_l2t_decc_c6_scanout[147]; | |
| 4597 | assign ff_l2d_l2t_decc_c6_scanin[148]=ff_l2d_l2t_decc_c6_scanout[70]; | |
| 4598 | assign ff_l2d_l2t_decc_c6_scanin[71]=ff_l2d_l2t_decc_c6_scanout[148]; | |
| 4599 | assign ff_l2d_l2t_decc_c6_scanin[149]=ff_l2d_l2t_decc_c6_scanout[71]; | |
| 4600 | assign ff_l2d_l2t_decc_c6_scanin[72]=ff_l2d_l2t_decc_c6_scanout[149]; | |
| 4601 | assign ff_l2d_l2t_decc_c6_scanin[150]=ff_l2d_l2t_decc_c6_scanout[72]; | |
| 4602 | assign ff_l2d_l2t_decc_c6_scanin[73]=ff_l2d_l2t_decc_c6_scanout[150]; | |
| 4603 | assign ff_l2d_l2t_decc_c6_scanin[151]=ff_l2d_l2t_decc_c6_scanout[73]; | |
| 4604 | assign ff_l2d_l2t_decc_c6_scanin[74]=ff_l2d_l2t_decc_c6_scanout[151]; | |
| 4605 | assign ff_l2d_l2t_decc_c6_scanin[152]=ff_l2d_l2t_decc_c6_scanout[74]; | |
| 4606 | assign ff_l2d_l2t_decc_c6_scanin[75]=ff_l2d_l2t_decc_c6_scanout[152]; | |
| 4607 | assign ff_l2d_l2t_decc_c6_scanin[153]=ff_l2d_l2t_decc_c6_scanout[75]; | |
| 4608 | assign ff_l2d_l2t_decc_c6_scanin[76]=ff_l2d_l2t_decc_c6_scanout[153]; | |
| 4609 | assign ff_l2d_l2t_decc_c6_scanin[154]=ff_l2d_l2t_decc_c6_scanout[76]; | |
| 4610 | assign ff_l2d_l2t_decc_c6_scanin[77]=ff_l2d_l2t_decc_c6_scanout[154]; | |
| 4611 | assign ff_l2d_l2t_decc_c6_scanin[155]=ff_l2d_l2t_decc_c6_scanout[77]; | |
| 4612 | assign ff_l2d_l2b_efc_fuse_data_scanin[0]=ff_l2d_l2t_decc_c6_scanout[155]; | |
| 4613 | assign ff_l2d_l2b_efc_fuse_data_scanin[1]=ff_l2d_l2b_efc_fuse_data_scanout[0]; | |
| 4614 | assign ff_l2d_l2b_efc_fuse_data_scanin[2]=ff_l2d_l2b_efc_fuse_data_scanout[1]; | |
| 4615 | assign ff_l2d_l2b_efc_fuse_data_scanin[3]=ff_l2d_l2b_efc_fuse_data_scanout[2]; | |
| 4616 | assign ff_l2d_l2b_efc_fuse_data_scanin[4]=ff_l2d_l2b_efc_fuse_data_scanout[3]; | |
| 4617 | assign ff_l2d_l2b_efc_fuse_data_scanin[5]=ff_l2d_l2b_efc_fuse_data_scanout[4]; | |
| 4618 | assign ff_l2d_l2b_efc_fuse_data_scanin[6]=ff_l2d_l2b_efc_fuse_data_scanout[5]; | |
| 4619 | assign ff_l2d_l2b_efc_fuse_data_scanin[7]=ff_l2d_l2b_efc_fuse_data_scanout[6]; | |
| 4620 | assign ff_l2d_l2b_efc_fuse_data_scanin[8]=ff_l2d_l2b_efc_fuse_data_scanout[7]; | |
| 4621 | assign ff_l2d_l2b_efc_fuse_data_scanin[9]=ff_l2d_l2b_efc_fuse_data_scanout[8]; | |
| 4622 | assign ff_l2b_l2d_fuse_reset_d_scanin=ff_l2d_l2b_efc_fuse_data_scanout[9]; | |
| 4623 | assign ff_l2b_l2d_fuse_wren_d_scanin=ff_l2b_l2d_fuse_reset_d_scanout; | |
| 4624 | assign ff_l2b_l2d_fuse_rid_d_scanin[0]=ff_l2b_l2d_fuse_wren_d_scanout; | |
| 4625 | assign ff_l2b_l2d_fuse_rid_d_scanin[1]=ff_l2b_l2d_fuse_rid_d_scanout[0]; | |
| 4626 | assign ff_l2b_l2d_fuse_rid_d_scanin[2]=ff_l2b_l2d_fuse_rid_d_scanout[1]; | |
| 4627 | assign ff_l2b_l2d_fuse_rid_d_scanin[3]=ff_l2b_l2d_fuse_rid_d_scanout[2]; | |
| 4628 | assign ff_l2b_l2d_fuse_rid_d_scanin[4]=ff_l2b_l2d_fuse_rid_d_scanout[3]; | |
| 4629 | assign ff_l2b_l2d_fuse_rid_d_scanin[5]=ff_l2b_l2d_fuse_rid_d_scanout[4]; | |
| 4630 | assign ff_l2b_l2d_fuse_rid_d_scanin[6]=ff_l2b_l2d_fuse_rid_d_scanout[5]; | |
| 4631 | assign ff_l2b_l2d_fuse_l2d_data_in_scanin[0]=ff_l2b_l2d_fuse_rid_d_scanout[6]; | |
| 4632 | assign ff_l2b_l2d_fuse_l2d_data_in_scanin[1]=ff_l2b_l2d_fuse_l2d_data_in_scanout[0]; | |
| 4633 | assign ff_l2b_l2d_fuse_l2d_data_in_scanin[2]=ff_l2b_l2d_fuse_l2d_data_in_scanout[1]; | |
| 4634 | assign ff_l2b_l2d_fuse_l2d_data_in_scanin[3]=ff_l2b_l2d_fuse_l2d_data_in_scanout[2]; | |
| 4635 | assign ff_l2b_l2d_fuse_l2d_data_in_scanin[4]=ff_l2b_l2d_fuse_l2d_data_in_scanout[3]; | |
| 4636 | assign ff_l2b_l2d_fuse_l2d_data_in_scanin[5]=ff_l2b_l2d_fuse_l2d_data_in_scanout[4]; | |
| 4637 | assign ff_l2b_l2d_fuse_l2d_data_in_scanin[6]=ff_l2b_l2d_fuse_l2d_data_in_scanout[5]; | |
| 4638 | assign ff_l2b_l2d_fuse_l2d_data_in_scanin[7]=ff_l2b_l2d_fuse_l2d_data_in_scanout[6]; | |
| 4639 | assign ff_l2b_l2d_fuse_l2d_data_in_scanin[8]=ff_l2b_l2d_fuse_l2d_data_in_scanout[7]; | |
| 4640 | assign ff_l2b_l2d_fuse_l2d_data_in_scanin[9]=ff_l2b_l2d_fuse_l2d_data_in_scanout[8]; | |
| 4641 | assign ff_fill_clk_en_ov_stg_scanin=ff_l2b_l2d_fuse_l2d_data_in_scanout[9]; | |
| 4642 | assign ff_pwrsav_ov_stg_scanin=ff_fill_clk_en_ov_stg_scanout; | |
| 4643 | assign scan_out=ff_pwrsav_ov_stg_scanout; | |
| 4644 | // fixscan end | |
| 4645 | endmodule // l2d_periph_io | |
| 4646 | ||
| 4647 | module l2t_wayerr_ctl ( | |
| 4648 | l2t_l2d_way_sel_c3, | |
| 4649 | wayerr_c3) ; | |
| 4650 | input [15:0] l2t_l2d_way_sel_c3; | |
| 4651 | output wayerr_c3; | |
| 4652 | wire n_cell_265_net292, net10948, net10949, net10971, net12595, net12602, | |
| 4653 | net12610, net12614, net12628, net12629, net12631, net12633, net12635, | |
| 4654 | net12636, net12637, net12639, net1877, net1878, net1894, net1902, | |
| 4655 | net1903, net1917, net508, net545, net566, net9955, n_cell_265_net315, | |
| 4656 | n_cell_265_net321, net1749, net1887, net1891, net1893, net533, net534, | |
| 4657 | net560, net586, net9949, net9959, net2033, net2035, net2041, net555, | |
| 4658 | n_cell_265_net312, net1876, net1912, net2006, net2036, net2063, | |
| 4659 | net2068, net1892, net11658, net11667, net2040, net544, net576, net585, | |
| 4660 | net9930, net12609, n_cell_265_net340, n_cell_265_net341, net557, | |
| 4661 | net558, net501, n3, net11684, n_cell_265_net310, n_cell_265_net311, | |
| 4662 | net2052, net551, net552, net553, net554, net575, net2062, net587, n4, | |
| 4663 | net588, n_cell_265_net308, net4464, n5, n6, n7, n8, n10, n13, n15, | |
| 4664 | n16, n18, n20, n22, n23, n24, n27, n28, n30, n31, n34, n35, n36, n37, | |
| 4665 | n38, n39, n40, n41, n42, n43, n44, n45; | |
| 4666 | ||
| 4667 | cl_u1_nand2_20x U88 ( .in0(n24), .in1(net11684), .out(n3) ); | |
| 4668 | cl_u1_inv_20x U90 ( .in(n_cell_265_net308), .out(net11684) ); | |
| 4669 | cl_u1_nand3_16x U40 ( .in0(n_cell_265_net292), .in1(net575), .in2(net9949), | |
| 4670 | .out(net545) ); | |
| 4671 | cl_u1_aoi21_16x net522 ( .in00(net545), .in10(net544), .in11(n37), .out( | |
| 4672 | wayerr_c3) ); | |
| 4673 | cl_u1_nand2_2x U53 ( .in0(l2t_l2d_way_sel_c3[12]), .in1( | |
| 4674 | l2t_l2d_way_sel_c3[11]), .out(net12595) ); | |
| 4675 | cl_u1_buf_32x U44 ( .in(l2t_l2d_way_sel_c3[1]), .out(net508) ); | |
| 4676 | cl_u1_inv_12x U30 ( .in(l2t_l2d_way_sel_c3[1]), .out(net1903) ); | |
| 4677 | cl_u1_nand2_6x U37 ( .in0(net1903), .in1(net12602), .out(net1902) ); | |
| 4678 | cl_u1_nand2_6x U36 ( .in0(net12602), .in1(net12635), .out(net12631) ); | |
| 4679 | cl_u1_inv_28x U11 ( .in(l2t_l2d_way_sel_c3[0]), .out(net12635) ); | |
| 4680 | cl_u1_inv_12x U54 ( .in(net12635), .out(net10971) ); | |
| 4681 | cl_u1_nor2_6x U55 ( .in0(l2t_l2d_way_sel_c3[14]), .in1(l2t_l2d_way_sel_c3[5]), .out(net10949) ); | |
| 4682 | cl_u1_nor2_12x U25 ( .in0(l2t_l2d_way_sel_c3[6]), .in1(net554), .out(net553) | |
| 4683 | ); | |
| 4684 | cl_u1_inv_32x U75 ( .in(net2068), .out(net501) ); | |
| 4685 | cl_u1_nor2_8x U8 ( .in0(net501), .in1(net552), .out(net551) ); | |
| 4686 | cl_u1_nand2_16x U71 ( .in0(net2035), .in1(net2036), .out(net588) ); | |
| 4687 | cl_u1_inv_24x U19 ( .in(net552), .out(net2052) ); | |
| 4688 | cl_u1_nand2_20x U102 ( .in0(n34), .in1(n43), .out(net9949) ); | |
| 4689 | cl_u1_nor2_16x syn441 ( .in0(net560), .in1(net9930), .out(net533) ); | |
| 4690 | cl_u1_oai21_16x U42 ( .in00(net12629), .in10(net12628), .in11(net1917), | |
| 4691 | .out(net1877) ); | |
| 4692 | cl_u1_inv_24x U31 ( .in(net1902), .out(net1917) ); | |
| 4693 | cl_u1_nand2_20x U43 ( .in0(net12628), .in1(net1917), .out(net12629) ); | |
| 4694 | cl_u1_inv_16x U12 ( .in(net9955), .out(net1912) ); | |
| 4695 | cl_u1_nor2_16x U47 ( .in0(net1894), .in1(net1893), .out(net1878) ); | |
| 4696 | cl_u1_oai21_4x U108 ( .in00(l2t_l2d_way_sel_c3[2]), .in10(n23), .in11( | |
| 4697 | l2t_l2d_way_sel_c3[4]), .out(n_cell_265_net311) ); | |
| 4698 | cl_u1_nor2_16x U56 ( .in0(net1892), .in1(net1891), .out(net1876) ); | |
| 4699 | cl_u1_nand2_6x U26 ( .in0(net552), .in1(net2063), .out(net2062) ); | |
| 4700 | cl_u1_inv_24x U93 ( .in(l2t_l2d_way_sel_c3[10]), .out(net12637) ); | |
| 4701 | cl_u1_inv_24x U74 ( .in(net2068), .out(net2006) ); | |
| 4702 | cl_u1_nand2_6x U17 ( .in0(net586), .in1(net576), .out(n10) ); | |
| 4703 | cl_u1_inv_12x U34 ( .in(net10971), .out(net10948) ); | |
| 4704 | cl_u1_inv_12x U35 ( .in(net11658), .out(n13) ); | |
| 4705 | cl_u1_inv_16x syn341 ( .in(n_cell_265_net340), .out(net12609) ); | |
| 4706 | cl_u1_nand3_12x U104 ( .in0(net1887), .in1(net1912), .in2(net552), .out( | |
| 4707 | net1891) ); | |
| 4708 | cl_u1_inv_28x U50 ( .in(l2t_l2d_way_sel_c3[11]), .out(net12639) ); | |
| 4709 | cl_u1_nand3_24x net4453 ( .in0(n41), .in1(n42), .in2(n22), .out(net2033) ); | |
| 4710 | cl_u1_nand2_8x U52 ( .in0(n15), .in1(n16), .out(net11667) ); | |
| 4711 | cl_u1_nand2_16x U22 ( .in0(net1749), .in1(n27), .out(net560) ); | |
| 4712 | cl_u1_nor2_16x U66 ( .in0(n18), .in1(net2062), .out(net2041) ); | |
| 4713 | cl_u1_nand2_6x U106 ( .in0(n23), .in1(net4464), .out(n5) ); | |
| 4714 | cl_u1_buf_32x U67 ( .in(l2t_l2d_way_sel_c3[7]), .out(n20) ); | |
| 4715 | cl_u1_nor2_4x U61 ( .in0(n20), .in1(l2t_l2d_way_sel_c3[6]), .out( | |
| 4716 | n_cell_265_net315) ); | |
| 4717 | cl_u1_inv_8x syn445 ( .in(l2t_l2d_way_sel_c3[7]), .out(net1749) ); | |
| 4718 | cl_u1_nor2_8x U13 ( .in0(net2006), .in1(net2052), .out(net2036) ); | |
| 4719 | cl_u1_inv_4x U32 ( .in(net2006), .out(net2063) ); | |
| 4720 | cl_u1_nor2_6x U70 ( .in0(n28), .in1(net2006), .out(n_cell_265_net312) ); | |
| 4721 | cl_u1_nand2_16x U48 ( .in0(n8), .in1(net12614), .out(net558) ); | |
| 4722 | cl_u1_nand3_8x U49 ( .in0(n8), .in1(net12609), .in2(net12610), .out(net9959) | |
| 4723 | ); | |
| 4724 | cl_u1_nand2_4x U112 ( .in0(l2t_l2d_way_sel_c3[4]), .in1(n22), .out(n6) ); | |
| 4725 | cl_u1_inv_12x U82 ( .in(l2t_l2d_way_sel_c3[5]), .out(n27) ); | |
| 4726 | cl_u1_nand3_8x U21 ( .in0(net533), .in1(net534), .in2(net552), .out( | |
| 4727 | n_cell_265_net321) ); | |
| 4728 | cl_u1_nand3_16x U28 ( .in0(n38), .in1(n13), .in2(n35), .out(net1892) ); | |
| 4729 | cl_u1_oai22_8x U59 ( .in00(n28), .in01(net1749), .in10(n20), .in11(n27), | |
| 4730 | .out(net586) ); | |
| 4731 | cl_u1_buf_32x U83 ( .in(l2t_l2d_way_sel_c3[5]), .out(n28) ); | |
| 4732 | cl_u1_inv_16x U9 ( .in(net12636), .out(n8) ); | |
| 4733 | cl_u1_inv_28x U94 ( .in(l2t_l2d_way_sel_c3[12]), .out(n31) ); | |
| 4734 | cl_u1_nand2_20x U78 ( .in0(net585), .in1(n3), .out(net544) ); | |
| 4735 | cl_u1_inv_12x U86 ( .in(n_cell_265_net341), .out(n_cell_265_net340) ); | |
| 4736 | cl_u1_nor2_6x U45 ( .in0(net508), .in1(net501), .out(n_cell_265_net341) ); | |
| 4737 | cl_u1_nand3_6x U98 ( .in0(net12602), .in1(net12635), .in2(net566), .out( | |
| 4738 | net12633) ); | |
| 4739 | cl_u1_nor2_6x U33 ( .in0(net1903), .in1(net12602), .out(net9955) ); | |
| 4740 | cl_u1_nor2_8x U27 ( .in0(net566), .in1(net12631), .out(net12610) ); | |
| 4741 | cl_u1_inv_24x U29 ( .in(l2t_l2d_way_sel_c3[15]), .out(net12602) ); | |
| 4742 | cl_u1_inv_16x U10 ( .in(l2t_l2d_way_sel_c3[14]), .out(net566) ); | |
| 4743 | cl_u1_inv_12x U76 ( .in(net501), .out(net554) ); | |
| 4744 | cl_u1_inv_28x syn450 ( .in(l2t_l2d_way_sel_c3[6]), .out(net552) ); | |
| 4745 | cl_u1_inv_20x U24 ( .in(l2t_l2d_way_sel_c3[13]), .out(net2068) ); | |
| 4746 | cl_u1_nand2_6x U62 ( .in0(n_cell_265_net315), .in1(net576), .out( | |
| 4747 | n_cell_265_net308) ); | |
| 4748 | cl_u1_inv_20x U103 ( .in(net534), .out(net1893) ); | |
| 4749 | cl_u1_nand2_6x U81 ( .in0(n36), .in1(n40), .out(net11658) ); | |
| 4750 | cl_u1_inv_24x U38 ( .in(net9930), .out(net576) ); | |
| 4751 | cl_u1_nand2_12x U80 ( .in0(n36), .in1(n40), .out(net9930) ); | |
| 4752 | cl_u1_inv_12x U72 ( .in(n22), .out(n23) ); | |
| 4753 | cl_u1_inv_24x U69 ( .in(l2t_l2d_way_sel_c3[3]), .out(n22) ); | |
| 4754 | cl_u1_inv_20x U96 ( .in(net9959), .out(n34) ); | |
| 4755 | cl_u1_nor2_16x U97 ( .in0(net558), .in1(net560), .out(net557) ); | |
| 4756 | cl_u1_oai21_12x U100 ( .in00(net555), .in10(net551), .in11(net553), .out( | |
| 4757 | net587) ); | |
| 4758 | cl_u1_nand2_16x U109 ( .in0(net2040), .in1(net2041), .out(net585) ); | |
| 4759 | cl_u1_inv_6x U20 ( .in(n10), .out(net2040) ); | |
| 4760 | cl_u1_nor2_16x U16 ( .in0(n20), .in1(net2006), .out(net1887) ); | |
| 4761 | cl_u1_buf_16x U110 ( .in(net12595), .out(n35) ); | |
| 4762 | cl_u1_nand2_16x U99 ( .in0(net588), .in1(net587), .out(n4) ); | |
| 4763 | cl_u1_nor2_16x U101 ( .in0(net2033), .in1(net11667), .out(net2035) ); | |
| 4764 | cl_u1_inv_16x U111 ( .in(l2t_l2d_way_sel_c3[8]), .out(n40) ); | |
| 4765 | cl_u1_nand2_28x U113 ( .in0(n45), .in1(net12635), .out(net12628) ); | |
| 4766 | cl_u1_buf_16x U114 ( .in(n39), .out(n37) ); | |
| 4767 | cl_u1_nand2_2x U115 ( .in0(l2t_l2d_way_sel_c3[9]), .in1( | |
| 4768 | l2t_l2d_way_sel_c3[8]), .out(n15) ); | |
| 4769 | cl_u1_nand2_8x U51 ( .in0(n36), .in1(n40), .out(n16) ); | |
| 4770 | cl_u1_inv_20x U116 ( .in(l2t_l2d_way_sel_c3[9]), .out(n36) ); | |
| 4771 | cl_u1_oai12_12x U23 ( .in00(n30), .in01(net10948), .in10(net10949), .out( | |
| 4772 | net1894) ); | |
| 4773 | cl_u1_inv_20x U117 ( .in(n7), .out(n38) ); | |
| 4774 | cl_u1_inv_4x U118 ( .in(net558), .out(n39) ); | |
| 4775 | cl_u1_nor2_12x syn281 ( .in0(net508), .in1(net12633), .out(net12614) ); | |
| 4776 | cl_u1_nand2_20x U18 ( .in0(n4), .in1(net557), .out(net575) ); | |
| 4777 | cl_u1_inv_32x U119 ( .in(net12636), .out(n45) ); | |
| 4778 | cl_u1_inv_20x U120 ( .in(l2t_l2d_way_sel_c3[4]), .out(n41) ); | |
| 4779 | cl_u1_inv_4x U105 ( .in(l2t_l2d_way_sel_c3[4]), .out(net4464) ); | |
| 4780 | cl_u1_inv_20x U121 ( .in(l2t_l2d_way_sel_c3[2]), .out(n42) ); | |
| 4781 | cl_u1_nand3_4x U107 ( .in0(n5), .in1(n6), .in2(n42), .out(n_cell_265_net310) | |
| 4782 | ); | |
| 4783 | cl_u1_inv_20x U122 ( .in(n_cell_265_net321), .out(n43) ); | |
| 4784 | cl_u1_nand3_16x U123 ( .in0(net1877), .in1(net1876), .in2(net1878), .out( | |
| 4785 | n_cell_265_net292) ); | |
| 4786 | cl_u1_nand3_6x U124 ( .in0(n_cell_265_net310), .in1(n_cell_265_net311), | |
| 4787 | .in2(n_cell_265_net312), .out(n44) ); | |
| 4788 | cl_u1_inv_20x U125 ( .in(n44), .out(n24) ); | |
| 4789 | cl_u1_inv_28x U57 ( .in(net2033), .out(net534) ); | |
| 4790 | cl_u1_buf_20x U39 ( .in(net2033), .out(n18) ); | |
| 4791 | cl_u1_nor2_16x U126 ( .in0(net2033), .in1(net9930), .out(net555) ); | |
| 4792 | cl_u1_inv_28x U91 ( .in(net12636), .out(n30) ); | |
| 4793 | cl_u1_nand3_20x U92 ( .in0(net12639), .in1(n31), .in2(net12637), .out( | |
| 4794 | net12636) ); | |
| 4795 | cl_u1_aoi21_8x U6 ( .in00(net12637), .in10(net12639), .in11(n31), .out(n7) | |
| 4796 | ); | |
| 4797 | endmodule | |
| 4798 | ||
| 4799 | ||
| 4800 | ||
| 4801 | ||
| 4802 | ||
| 4803 | ||
| 4804 | ||
| 4805 | ||
| 4806 | ||
| 4807 | // any PARAMS parms go into naming of macro | |
| 4808 | ||
| 4809 | module n2_l2d_sp_512kb_cust_l1clkhdr_ctl_macro ( | |
| 4810 | l2clk, | |
| 4811 | l1en, | |
| 4812 | pce_ov, | |
| 4813 | stop, | |
| 4814 | se, | |
| 4815 | l1clk); | |
| 4816 | ||
| 4817 | ||
| 4818 | input l2clk; | |
| 4819 | input l1en; | |
| 4820 | input pce_ov; | |
| 4821 | input stop; | |
| 4822 | input se; | |
| 4823 | output l1clk; | |
| 4824 | ||
| 4825 | ||
| 4826 | ||
| 4827 | ||
| 4828 | ||
| 4829 | cl_sc1_l1hdr_8x c_0 ( | |
| 4830 | ||
| 4831 | ||
| 4832 | .l2clk(l2clk), | |
| 4833 | .pce(l1en), | |
| 4834 | .l1clk(l1clk), | |
| 4835 | .se(se), | |
| 4836 | .pce_ov(pce_ov), | |
| 4837 | .stop(stop) | |
| 4838 | ); | |
| 4839 | ||
| 4840 | ||
| 4841 | ||
| 4842 | endmodule | |
| 4843 | ||
| 4844 | ||
| 4845 | ||
| 4846 | ||
| 4847 | ||
| 4848 | ||
| 4849 | ||
| 4850 | ||
| 4851 | ||
| 4852 | // | |
| 4853 | // or macro for ports = 2,3 | |
| 4854 | // | |
| 4855 | // | |
| 4856 | ||
| 4857 | ||
| 4858 | ||
| 4859 | ||
| 4860 | ||
| 4861 | module n2_l2d_sp_512kb_cust_or_macro__width_1 ( | |
| 4862 | din0, | |
| 4863 | din1, | |
| 4864 | dout); | |
| 4865 | input [0:0] din0; | |
| 4866 | input [0:0] din1; | |
| 4867 | output [0:0] dout; | |
| 4868 | ||
| 4869 | ||
| 4870 | ||
| 4871 | ||
| 4872 | ||
| 4873 | ||
| 4874 | or2 #(1) d0_0 ( | |
| 4875 | .in0(din0[0:0]), | |
| 4876 | .in1(din1[0:0]), | |
| 4877 | .out(dout[0:0]) | |
| 4878 | ); | |
| 4879 | ||
| 4880 | ||
| 4881 | ||
| 4882 | ||
| 4883 | ||
| 4884 | ||
| 4885 | ||
| 4886 | ||
| 4887 | ||
| 4888 | endmodule | |
| 4889 | ||
| 4890 | ||
| 4891 | ||
| 4892 | ||
| 4893 | ||
| 4894 | ||
| 4895 | ||
| 4896 | ||
| 4897 | ||
| 4898 | // any PARAMS parms go into naming of macro | |
| 4899 | ||
| 4900 | module n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_1 ( | |
| 4901 | din, | |
| 4902 | l1clk, | |
| 4903 | scan_in, | |
| 4904 | siclk, | |
| 4905 | soclk, | |
| 4906 | dout, | |
| 4907 | scan_out); | |
| 4908 | wire [0:0] fdin; | |
| 4909 | ||
| 4910 | input [0:0] din; | |
| 4911 | input l1clk; | |
| 4912 | input [0:0] scan_in; | |
| 4913 | ||
| 4914 | ||
| 4915 | input siclk; | |
| 4916 | input soclk; | |
| 4917 | ||
| 4918 | output [0:0] dout; | |
| 4919 | output [0:0] scan_out; | |
| 4920 | assign fdin[0:0] = din[0:0]; | |
| 4921 | ||
| 4922 | ||
| 4923 | ||
| 4924 | ||
| 4925 | ||
| 4926 | ||
| 4927 | dff #(1) d0_0 ( | |
| 4928 | .l1clk(l1clk), | |
| 4929 | .siclk(siclk), | |
| 4930 | .soclk(soclk), | |
| 4931 | .d(fdin[0:0]), | |
| 4932 | .si(scan_in[0:0]), | |
| 4933 | .so(scan_out[0:0]), | |
| 4934 | .q(dout[0:0]) | |
| 4935 | ); | |
| 4936 | ||
| 4937 | ||
| 4938 | ||
| 4939 | ||
| 4940 | ||
| 4941 | ||
| 4942 | ||
| 4943 | ||
| 4944 | ||
| 4945 | ||
| 4946 | ||
| 4947 | ||
| 4948 | endmodule | |
| 4949 | ||
| 4950 | ||
| 4951 | ||
| 4952 | ||
| 4953 | ||
| 4954 | ||
| 4955 | ||
| 4956 | ||
| 4957 | ||
| 4958 | // | |
| 4959 | // or macro for ports = 2,3 | |
| 4960 | // | |
| 4961 | // | |
| 4962 | ||
| 4963 | ||
| 4964 | ||
| 4965 | ||
| 4966 | ||
| 4967 | module n2_l2d_sp_512kb_cust_or_macro__width_2 ( | |
| 4968 | din0, | |
| 4969 | din1, | |
| 4970 | dout); | |
| 4971 | input [1:0] din0; | |
| 4972 | input [1:0] din1; | |
| 4973 | output [1:0] dout; | |
| 4974 | ||
| 4975 | ||
| 4976 | ||
| 4977 | ||
| 4978 | ||
| 4979 | ||
| 4980 | or2 #(2) d0_0 ( | |
| 4981 | .in0(din0[1:0]), | |
| 4982 | .in1(din1[1:0]), | |
| 4983 | .out(dout[1:0]) | |
| 4984 | ); | |
| 4985 | ||
| 4986 | ||
| 4987 | ||
| 4988 | ||
| 4989 | ||
| 4990 | ||
| 4991 | ||
| 4992 | ||
| 4993 | ||
| 4994 | endmodule | |
| 4995 | ||
| 4996 | ||
| 4997 | ||
| 4998 | ||
| 4999 | ||
| 5000 | ||
| 5001 | ||
| 5002 | ||
| 5003 | ||
| 5004 | // any PARAMS parms go into naming of macro | |
| 5005 | ||
| 5006 | module n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_156 ( | |
| 5007 | din, | |
| 5008 | l1clk, | |
| 5009 | scan_in, | |
| 5010 | siclk, | |
| 5011 | soclk, | |
| 5012 | dout, | |
| 5013 | scan_out); | |
| 5014 | wire [155:0] fdin; | |
| 5015 | ||
| 5016 | input [155:0] din; | |
| 5017 | input l1clk; | |
| 5018 | input [155:0] scan_in; | |
| 5019 | ||
| 5020 | ||
| 5021 | input siclk; | |
| 5022 | input soclk; | |
| 5023 | ||
| 5024 | output [155:0] dout; | |
| 5025 | output [155:0] scan_out; | |
| 5026 | assign fdin[155:0] = din[155:0]; | |
| 5027 | ||
| 5028 | ||
| 5029 | ||
| 5030 | ||
| 5031 | ||
| 5032 | ||
| 5033 | dff #(156) d0_0 ( | |
| 5034 | .l1clk(l1clk), | |
| 5035 | .siclk(siclk), | |
| 5036 | .soclk(soclk), | |
| 5037 | .d(fdin[155:0]), | |
| 5038 | .si(scan_in[155:0]), | |
| 5039 | .so(scan_out[155:0]), | |
| 5040 | .q(dout[155:0]) | |
| 5041 | ); | |
| 5042 | ||
| 5043 | ||
| 5044 | ||
| 5045 | ||
| 5046 | ||
| 5047 | ||
| 5048 | ||
| 5049 | ||
| 5050 | ||
| 5051 | ||
| 5052 | ||
| 5053 | ||
| 5054 | endmodule | |
| 5055 | ||
| 5056 | ||
| 5057 | ||
| 5058 | ||
| 5059 | ||
| 5060 | ||
| 5061 | ||
| 5062 | ||
| 5063 | ||
| 5064 | ||
| 5065 | ||
| 5066 | ||
| 5067 | ||
| 5068 | // any PARAMS parms go into naming of macro | |
| 5069 | ||
| 5070 | module n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ( | |
| 5071 | din, | |
| 5072 | l1clk, | |
| 5073 | scan_in, | |
| 5074 | siclk, | |
| 5075 | soclk, | |
| 5076 | dout, | |
| 5077 | scan_out); | |
| 5078 | wire [38:0] fdin; | |
| 5079 | ||
| 5080 | input [38:0] din; | |
| 5081 | input l1clk; | |
| 5082 | input [38:0] scan_in; | |
| 5083 | ||
| 5084 | ||
| 5085 | input siclk; | |
| 5086 | input soclk; | |
| 5087 | ||
| 5088 | output [38:0] dout; | |
| 5089 | output [38:0] scan_out; | |
| 5090 | assign fdin[38:0] = din[38:0]; | |
| 5091 | ||
| 5092 | ||
| 5093 | ||
| 5094 | ||
| 5095 | ||
| 5096 | ||
| 5097 | dff #(39) d0_0 ( | |
| 5098 | .l1clk(l1clk), | |
| 5099 | .siclk(siclk), | |
| 5100 | .soclk(soclk), | |
| 5101 | .d(fdin[38:0]), | |
| 5102 | .si(scan_in[38:0]), | |
| 5103 | .so(scan_out[38:0]), | |
| 5104 | .q(dout[38:0]) | |
| 5105 | ); | |
| 5106 | ||
| 5107 | ||
| 5108 | ||
| 5109 | ||
| 5110 | ||
| 5111 | ||
| 5112 | ||
| 5113 | ||
| 5114 | ||
| 5115 | ||
| 5116 | ||
| 5117 | ||
| 5118 | endmodule | |
| 5119 | ||
| 5120 | ||
| 5121 | ||
| 5122 | ||
| 5123 | ||
| 5124 | ||
| 5125 | ||
| 5126 | ||
| 5127 | ||
| 5128 | ||
| 5129 | ||
| 5130 | ||
| 5131 | ||
| 5132 | // any PARAMS parms go into naming of macro | |
| 5133 | ||
| 5134 | module n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_16 ( | |
| 5135 | din, | |
| 5136 | l1clk, | |
| 5137 | scan_in, | |
| 5138 | siclk, | |
| 5139 | soclk, | |
| 5140 | dout, | |
| 5141 | scan_out); | |
| 5142 | wire [15:0] fdin; | |
| 5143 | ||
| 5144 | input [15:0] din; | |
| 5145 | input l1clk; | |
| 5146 | input [15:0] scan_in; | |
| 5147 | ||
| 5148 | ||
| 5149 | input siclk; | |
| 5150 | input soclk; | |
| 5151 | ||
| 5152 | output [15:0] dout; | |
| 5153 | output [15:0] scan_out; | |
| 5154 | assign fdin[15:0] = din[15:0]; | |
| 5155 | ||
| 5156 | ||
| 5157 | ||
| 5158 | ||
| 5159 | ||
| 5160 | ||
| 5161 | dff #(16) d0_0 ( | |
| 5162 | .l1clk(l1clk), | |
| 5163 | .siclk(siclk), | |
| 5164 | .soclk(soclk), | |
| 5165 | .d(fdin[15:0]), | |
| 5166 | .si(scan_in[15:0]), | |
| 5167 | .so(scan_out[15:0]), | |
| 5168 | .q(dout[15:0]) | |
| 5169 | ); | |
| 5170 | ||
| 5171 | ||
| 5172 | ||
| 5173 | ||
| 5174 | ||
| 5175 | ||
| 5176 | ||
| 5177 | ||
| 5178 | ||
| 5179 | ||
| 5180 | ||
| 5181 | ||
| 5182 | endmodule | |
| 5183 | ||
| 5184 | ||
| 5185 | ||
| 5186 | ||
| 5187 | ||
| 5188 | ||
| 5189 | ||
| 5190 | ||
| 5191 | ||
| 5192 | ||
| 5193 | ||
| 5194 | ||
| 5195 | ||
| 5196 | // any PARAMS parms go into naming of macro | |
| 5197 | ||
| 5198 | module n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_10 ( | |
| 5199 | din, | |
| 5200 | l1clk, | |
| 5201 | scan_in, | |
| 5202 | siclk, | |
| 5203 | soclk, | |
| 5204 | dout, | |
| 5205 | scan_out); | |
| 5206 | wire [9:0] fdin; | |
| 5207 | ||
| 5208 | input [9:0] din; | |
| 5209 | input l1clk; | |
| 5210 | input [9:0] scan_in; | |
| 5211 | ||
| 5212 | ||
| 5213 | input siclk; | |
| 5214 | input soclk; | |
| 5215 | ||
| 5216 | output [9:0] dout; | |
| 5217 | output [9:0] scan_out; | |
| 5218 | assign fdin[9:0] = din[9:0]; | |
| 5219 | ||
| 5220 | ||
| 5221 | ||
| 5222 | ||
| 5223 | ||
| 5224 | ||
| 5225 | dff #(10) d0_0 ( | |
| 5226 | .l1clk(l1clk), | |
| 5227 | .siclk(siclk), | |
| 5228 | .soclk(soclk), | |
| 5229 | .d(fdin[9:0]), | |
| 5230 | .si(scan_in[9:0]), | |
| 5231 | .so(scan_out[9:0]), | |
| 5232 | .q(dout[9:0]) | |
| 5233 | ); | |
| 5234 | ||
| 5235 | ||
| 5236 | ||
| 5237 | ||
| 5238 | ||
| 5239 | ||
| 5240 | ||
| 5241 | ||
| 5242 | ||
| 5243 | ||
| 5244 | ||
| 5245 | ||
| 5246 | endmodule | |
| 5247 | ||
| 5248 | ||
| 5249 | ||
| 5250 | ||
| 5251 | ||
| 5252 | ||
| 5253 | ||
| 5254 | ||
| 5255 | ||
| 5256 | ||
| 5257 | ||
| 5258 | ||
| 5259 | ||
| 5260 | // any PARAMS parms go into naming of macro | |
| 5261 | ||
| 5262 | module n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_7 ( | |
| 5263 | din, | |
| 5264 | l1clk, | |
| 5265 | scan_in, | |
| 5266 | siclk, | |
| 5267 | soclk, | |
| 5268 | dout, | |
| 5269 | scan_out); | |
| 5270 | wire [6:0] fdin; | |
| 5271 | ||
| 5272 | input [6:0] din; | |
| 5273 | input l1clk; | |
| 5274 | input [6:0] scan_in; | |
| 5275 | ||
| 5276 | ||
| 5277 | input siclk; | |
| 5278 | input soclk; | |
| 5279 | ||
| 5280 | output [6:0] dout; | |
| 5281 | output [6:0] scan_out; | |
| 5282 | assign fdin[6:0] = din[6:0]; | |
| 5283 | ||
| 5284 | ||
| 5285 | ||
| 5286 | ||
| 5287 | ||
| 5288 | ||
| 5289 | dff #(7) d0_0 ( | |
| 5290 | .l1clk(l1clk), | |
| 5291 | .siclk(siclk), | |
| 5292 | .soclk(soclk), | |
| 5293 | .d(fdin[6:0]), | |
| 5294 | .si(scan_in[6:0]), | |
| 5295 | .so(scan_out[6:0]), | |
| 5296 | .q(dout[6:0]) | |
| 5297 | ); | |
| 5298 | ||
| 5299 | ||
| 5300 | ||
| 5301 | ||
| 5302 | ||
| 5303 | ||
| 5304 | ||
| 5305 | ||
| 5306 | ||
| 5307 | ||
| 5308 | ||
| 5309 | ||
| 5310 | endmodule | |
| 5311 | ||
| 5312 | ||
| 5313 | ||
| 5314 | ||
| 5315 | ||
| 5316 | ||
| 5317 | ||
| 5318 | ||
| 5319 | ||
| 5320 | // | |
| 5321 | // invert macro | |
| 5322 | // | |
| 5323 | // | |
| 5324 | ||
| 5325 | ||
| 5326 | ||
| 5327 | ||
| 5328 | ||
| 5329 | module n2_l2d_sp_512kb_cust_inv_macro__width_2 ( | |
| 5330 | din, | |
| 5331 | dout); | |
| 5332 | input [1:0] din; | |
| 5333 | output [1:0] dout; | |
| 5334 | ||
| 5335 | ||
| 5336 | ||
| 5337 | ||
| 5338 | ||
| 5339 | ||
| 5340 | inv #(2) d0_0 ( | |
| 5341 | .in(din[1:0]), | |
| 5342 | .out(dout[1:0]) | |
| 5343 | ); | |
| 5344 | ||
| 5345 | ||
| 5346 | ||
| 5347 | ||
| 5348 | ||
| 5349 | ||
| 5350 | ||
| 5351 | ||
| 5352 | ||
| 5353 | endmodule | |
| 5354 | ||
| 5355 | ||
| 5356 | ||
| 5357 | ||
| 5358 | ||
| 5359 | // | |
| 5360 | // and macro for ports = 2,3,4 | |
| 5361 | // | |
| 5362 | // | |
| 5363 | ||
| 5364 | ||
| 5365 | ||
| 5366 | ||
| 5367 | ||
| 5368 | module n2_l2d_sp_512kb_cust_and_macro__width_1 ( | |
| 5369 | din0, | |
| 5370 | din1, | |
| 5371 | dout); | |
| 5372 | input [0:0] din0; | |
| 5373 | input [0:0] din1; | |
| 5374 | output [0:0] dout; | |
| 5375 | ||
| 5376 | ||
| 5377 | ||
| 5378 | ||
| 5379 | ||
| 5380 | ||
| 5381 | and2 #(1) d0_0 ( | |
| 5382 | .in0(din0[0:0]), | |
| 5383 | .in1(din1[0:0]), | |
| 5384 | .out(dout[0:0]) | |
| 5385 | ); | |
| 5386 | ||
| 5387 | ||
| 5388 | ||
| 5389 | ||
| 5390 | ||
| 5391 | ||
| 5392 | ||
| 5393 | ||
| 5394 | ||
| 5395 | endmodule | |
| 5396 | ||
| 5397 | ||
| 5398 | ||
| 5399 | ||
| 5400 | ||
| 5401 | module n2_l2d_quad_cust ( | |
| 5402 | waysel_c3_0, | |
| 5403 | wayerr_c3_0, | |
| 5404 | set_c3_0, | |
| 5405 | coloff_c3_0, | |
| 5406 | coloff_c4_l_0, | |
| 5407 | coloff_c5_0, | |
| 5408 | rd_wr_c3_0, | |
| 5409 | readen_c5_0, | |
| 5410 | worden_c3_0, | |
| 5411 | l2clk, | |
| 5412 | tcu_pce_ov_0, | |
| 5413 | pce_0, | |
| 5414 | se_0, | |
| 5415 | tcu_clk_stop_0, | |
| 5416 | wrdlo0_b_l, | |
| 5417 | wrdhi0_b_l, | |
| 5418 | wrdlo1_b_l, | |
| 5419 | wrdhi1_b_l, | |
| 5420 | ldoutlo0_b, | |
| 5421 | ldouthi0_b, | |
| 5422 | ldoutlo1_b, | |
| 5423 | ldouthi1_b, | |
| 5424 | fuse_l2d_data_in_00, | |
| 5425 | fuse_l2d_rid_00, | |
| 5426 | fuse_l2d_wren_00, | |
| 5427 | fuse_l2d_reset_00_l, | |
| 5428 | fdout_00, | |
| 5429 | fuse_l2d_data_in_01, | |
| 5430 | fuse_l2d_rid_01, | |
| 5431 | fuse_l2d_wren_01, | |
| 5432 | fuse_l2d_reset_01_l, | |
| 5433 | fdout_01, | |
| 5434 | fuse_l2d_data_in_10, | |
| 5435 | fuse_l2d_rid_10, | |
| 5436 | fuse_l2d_wren_10, | |
| 5437 | fuse_l2d_reset_10_l, | |
| 5438 | fdout_10, | |
| 5439 | fuse_l2d_data_in_11, | |
| 5440 | fuse_l2d_rid_11, | |
| 5441 | fuse_l2d_wren_11, | |
| 5442 | fuse_l2d_reset_11_l, | |
| 5443 | fdout_11, | |
| 5444 | waysel_c3_1, | |
| 5445 | wayerr_c3_1, | |
| 5446 | set_c3_1, | |
| 5447 | coloff_c3_1, | |
| 5448 | coloff_c4_l_1, | |
| 5449 | coloff_c5_1, | |
| 5450 | rd_wr_c3_1, | |
| 5451 | readen_c5_1, | |
| 5452 | worden_c3_1, | |
| 5453 | tcu_pce_ov_1, | |
| 5454 | pce_1, | |
| 5455 | se_1, | |
| 5456 | tcu_clk_stop_1, | |
| 5457 | wee_l_0, | |
| 5458 | wee_l_1, | |
| 5459 | tstmodclk_l_0, | |
| 5460 | tstmodclk_l_1, | |
| 5461 | vnw_ary); | |
| 5462 | wire [9:0] left_red_top_d_00; | |
| 5463 | wire [9:0] left_red_top_d_01; | |
| 5464 | wire [38:0] ldoutlo0_b_top; | |
| 5465 | wire [38:0] ldouthi0_b_top; | |
| 5466 | wire [38:0] ldoutlo1_b_top; | |
| 5467 | wire [38:0] ldouthi1_b_top; | |
| 5468 | wire [9:0] right_red_top_d_00; | |
| 5469 | wire [9:0] right_red_top_d_01; | |
| 5470 | ||
| 5471 | ||
| 5472 | input [15:0] waysel_c3_0; // way_sel | |
| 5473 | input wayerr_c3_0; // way_sel error | |
| 5474 | input [8:0] set_c3_0; // set | |
| 5475 | input coloff_c3_0; // col_offset | |
| 5476 | input coloff_c4_l_0; // NEW(one stage+inv) | |
| 5477 | input [1:0] coloff_c5_0; // NEW(two stage) | |
| 5478 | input rd_wr_c3_0; // wr_en | |
| 5479 | input readen_c5_0; // NEW(two stage) | |
| 5480 | input [3:0] worden_c3_0; // word_en | |
| 5481 | input l2clk; // l2clk | |
| 5482 | input tcu_pce_ov_0; // tcu_pce_ov | |
| 5483 | input pce_0; // NEW | |
| 5484 | input se_0; | |
| 5485 | input tcu_clk_stop_0; // NEW | |
| 5486 | input [38:0] wrdlo0_b_l; // decc_in(c3-bphase) | |
| 5487 | input [38:0] wrdhi0_b_l; // decc_in(c3-bphase) | |
| 5488 | input [38:0] wrdlo1_b_l; // decc_in(c3-bphase) | |
| 5489 | input [38:0] wrdhi1_b_l; // decc_in(c3-bphase) | |
| 5490 | output [38:0] ldoutlo0_b; // decc_c52-b | |
| 5491 | output [38:0] ldouthi0_b; // decc_c52-b | |
| 5492 | output [38:0] ldoutlo1_b; // decc_c52-b | |
| 5493 | output [38:0] ldouthi1_b; // decc_c52-b | |
| 5494 | ||
| 5495 | input [9:0] fuse_l2d_data_in_00; | |
| 5496 | input [4:0] fuse_l2d_rid_00; | |
| 5497 | input fuse_l2d_wren_00; | |
| 5498 | input fuse_l2d_reset_00_l; | |
| 5499 | output [9:0] fdout_00; | |
| 5500 | input [9:0] fuse_l2d_data_in_01; | |
| 5501 | input [4:0] fuse_l2d_rid_01; | |
| 5502 | input fuse_l2d_wren_01; | |
| 5503 | input fuse_l2d_reset_01_l; | |
| 5504 | output [9:0] fdout_01; | |
| 5505 | input [9:0] fuse_l2d_data_in_10; | |
| 5506 | input [4:0] fuse_l2d_rid_10; | |
| 5507 | input fuse_l2d_wren_10; | |
| 5508 | input fuse_l2d_reset_10_l; | |
| 5509 | output [9:0] fdout_10; | |
| 5510 | input [9:0] fuse_l2d_data_in_11; | |
| 5511 | input [4:0] fuse_l2d_rid_11; | |
| 5512 | input fuse_l2d_wren_11; | |
| 5513 | input fuse_l2d_reset_11_l; | |
| 5514 | output [9:0] fdout_11; | |
| 5515 | ||
| 5516 | input [15:0] waysel_c3_1; // way_sel | |
| 5517 | input wayerr_c3_1; // way_sel error | |
| 5518 | input [8:0] set_c3_1; // set | |
| 5519 | input coloff_c3_1; // col_offset | |
| 5520 | input coloff_c4_l_1; // NEW(one stage+inv) | |
| 5521 | input [1:0] coloff_c5_1; // NEW(two stage) | |
| 5522 | input rd_wr_c3_1; // wr_en | |
| 5523 | input readen_c5_1; // NEW(two stage) | |
| 5524 | input [3:0] worden_c3_1; // word_en | |
| 5525 | input tcu_pce_ov_1; // tcu_pce_ov | |
| 5526 | input pce_1; // NEW | |
| 5527 | input se_1; | |
| 5528 | input tcu_clk_stop_1; // NEW | |
| 5529 | input wee_l_0; // NEW | |
| 5530 | input wee_l_1; // NEW | |
| 5531 | input tstmodclk_l_0; | |
| 5532 | input tstmodclk_l_1; | |
| 5533 | input vnw_ary; // NEW | |
| 5534 | ||
| 5535 | ||
| 5536 | n2_l2d_32kb_cust way07_00 | |
| 5537 | ( | |
| 5538 | .waysel_c3 (waysel_c3_0[7:0]), | |
| 5539 | .waysel_err_c3 (wayerr_c3_0), | |
| 5540 | .set_c3 (set_c3_0[8:0]), | |
| 5541 | .coloff_c3 (coloff_c3_0), | |
| 5542 | .coloff_c4_l (coloff_c4_l_0), | |
| 5543 | .coloff_c5 (coloff_c5_0[1:0]), | |
| 5544 | .rd_wr_c3 (rd_wr_c3_0), | |
| 5545 | .readen_c5 (readen_c5_0), | |
| 5546 | .l2clk (l2clk), | |
| 5547 | .fuse_l2d_data_in_00 (fuse_l2d_data_in_00[9:0]), | |
| 5548 | .fuse_l2d_rid_00 (fuse_l2d_rid_00[2:0]), | |
| 5549 | .fuse_l2d_wren_00 (fuse_l2d_wren_00), | |
| 5550 | .fuse_l2d_reset_00_l (fuse_l2d_reset_00_l), | |
| 5551 | .sel_quad_00 (fuse_l2d_rid_00[4]), | |
| 5552 | .fuse_l2d_data_in_01 (fuse_l2d_data_in_01[9:0]), | |
| 5553 | .fuse_l2d_rid_01 (fuse_l2d_rid_01[2:0]), | |
| 5554 | .fuse_l2d_wren_01 (fuse_l2d_wren_01), | |
| 5555 | .fuse_l2d_reset_01_l (fuse_l2d_reset_01_l), | |
| 5556 | .sel_quad_01 (fuse_l2d_rid_01[4]), | |
| 5557 | .red_d_out_00 (left_red_top_d_00[9:0]), | |
| 5558 | .red_d_out_01 (left_red_top_d_01[9:0]), | |
| 5559 | .red_top_d_00 (10'b0), | |
| 5560 | .red_top_d_01 (10'b0), | |
| 5561 | .tcu_pce_ov (tcu_pce_ov_0), | |
| 5562 | .tcu_pce (pce_0), | |
| 5563 | .se (se_0), | |
| 5564 | .tcu_clk_stop (tcu_clk_stop_0), | |
| 5565 | .wrd0lo_b_l (wrdlo0_b_l[19:0]), | |
| 5566 | .wrd0hi_b_l (wrdhi0_b_l[19:0]), | |
| 5567 | .wrd1lo_b_l (wrdlo1_b_l[18:0]), | |
| 5568 | .wrd1hi_b_l (wrdhi1_b_l[18:0]), | |
| 5569 | .ldin0lo_b (20'b0), | |
| 5570 | .ldin0hi_b (20'b0), | |
| 5571 | .ldin1lo_b (19'b0), | |
| 5572 | .ldin1hi_b (19'b0), | |
| 5573 | .worden_c3 (worden_c3_0[3:0]), | |
| 5574 | .tstmodclk_l (tstmodclk_l_0), | |
| 5575 | .wee_l (wee_l_0), | |
| 5576 | .ldout0lo_b00 (ldoutlo0_b_top[19:0]), | |
| 5577 | .ldout0hi_b00 (ldouthi0_b_top[19:0]), | |
| 5578 | .ldout1lo_b00 (ldoutlo1_b_top[18:0]), | |
| 5579 | .ldout1hi_b00 (ldouthi1_b_top[18:0]), | |
| 5580 | .vnw_ary (vnw_ary) | |
| 5581 | ); | |
| 5582 | ||
| 5583 | n2_l2d_32kb_cust way158_00 | |
| 5584 | ( | |
| 5585 | .waysel_c3 (waysel_c3_0[15:8]), | |
| 5586 | .waysel_err_c3 (wayerr_c3_0), | |
| 5587 | .set_c3 (set_c3_0[8:0]), | |
| 5588 | .coloff_c3 (coloff_c3_0), | |
| 5589 | .coloff_c4_l (coloff_c4_l_0), | |
| 5590 | .coloff_c5 (coloff_c5_0[1:0]), | |
| 5591 | .rd_wr_c3 (rd_wr_c3_0), | |
| 5592 | .readen_c5 (readen_c5_0), | |
| 5593 | .l2clk (l2clk), | |
| 5594 | .fuse_l2d_data_in_00 (fuse_l2d_data_in_00[9:0]), | |
| 5595 | .fuse_l2d_rid_00 (fuse_l2d_rid_00[2:0]), | |
| 5596 | .fuse_l2d_wren_00 (fuse_l2d_wren_00), | |
| 5597 | .fuse_l2d_reset_00_l (fuse_l2d_reset_00_l), | |
| 5598 | .sel_quad_00 (fuse_l2d_rid_00[3]), | |
| 5599 | .fuse_l2d_data_in_01 (fuse_l2d_data_in_01[9:0]), | |
| 5600 | .fuse_l2d_rid_01 (fuse_l2d_rid_01[2:0]), | |
| 5601 | .fuse_l2d_wren_01 (fuse_l2d_wren_01), | |
| 5602 | .fuse_l2d_reset_01_l (fuse_l2d_reset_01_l), | |
| 5603 | .sel_quad_01 (fuse_l2d_rid_01[3]), | |
| 5604 | .red_d_out_00 (fdout_00[9:0]), | |
| 5605 | .red_d_out_01 (fdout_01[9:0]), | |
| 5606 | .red_top_d_00 (left_red_top_d_00[9:0]), | |
| 5607 | .red_top_d_01 (left_red_top_d_01[9:0]), | |
| 5608 | .tcu_pce_ov (tcu_pce_ov_0), | |
| 5609 | .tcu_pce (pce_0), | |
| 5610 | .se (se_0), | |
| 5611 | .tcu_clk_stop (tcu_clk_stop_0), | |
| 5612 | .worden_c3 (worden_c3_0[3:0]), | |
| 5613 | .tstmodclk_l (tstmodclk_l_0), | |
| 5614 | .wee_l (wee_l_0), | |
| 5615 | .wrd0lo_b_l (wrdlo0_b_l[19:0]), | |
| 5616 | .wrd0hi_b_l (wrdhi0_b_l[19:0]), | |
| 5617 | .wrd1lo_b_l (wrdlo1_b_l[18:0]), | |
| 5618 | .wrd1hi_b_l (wrdhi1_b_l[18:0]), | |
| 5619 | .ldin0lo_b (ldoutlo0_b_top[19:0]), | |
| 5620 | .ldin0hi_b (ldouthi0_b_top[19:0]), | |
| 5621 | .ldin1lo_b (ldoutlo1_b_top[18:0]), | |
| 5622 | .ldin1hi_b (ldouthi1_b_top[18:0]), | |
| 5623 | .ldout0lo_b00 (ldoutlo0_b[19:0]), | |
| 5624 | .ldout0hi_b00 (ldouthi0_b[19:0]), | |
| 5625 | .ldout1lo_b00 (ldoutlo1_b[18:0]), | |
| 5626 | .ldout1hi_b00 (ldouthi1_b[18:0]), | |
| 5627 | .vnw_ary (vnw_ary) | |
| 5628 | ); | |
| 5629 | ||
| 5630 | ||
| 5631 | n2_l2d_32kb_cust way70_01 | |
| 5632 | ( | |
| 5633 | .waysel_c3 (waysel_c3_1[7:0]), | |
| 5634 | .waysel_err_c3 (wayerr_c3_1), | |
| 5635 | .set_c3 (set_c3_1[8:0]), | |
| 5636 | .coloff_c3 (coloff_c3_1), | |
| 5637 | .coloff_c4_l (coloff_c4_l_1), | |
| 5638 | .coloff_c5 ({coloff_c5_1[0],coloff_c5_1[1]}), | |
| 5639 | .rd_wr_c3 (rd_wr_c3_1), | |
| 5640 | .readen_c5 (readen_c5_1), | |
| 5641 | .l2clk (l2clk), | |
| 5642 | .fuse_l2d_data_in_00 (fuse_l2d_data_in_10[9:0]), | |
| 5643 | .fuse_l2d_rid_00 (fuse_l2d_rid_10[2:0]), | |
| 5644 | .fuse_l2d_wren_00 (fuse_l2d_wren_10), | |
| 5645 | .fuse_l2d_reset_00_l (fuse_l2d_reset_10_l), | |
| 5646 | .sel_quad_00 (fuse_l2d_rid_10[4]), | |
| 5647 | .fuse_l2d_data_in_01 (fuse_l2d_data_in_11[9:0]), | |
| 5648 | .fuse_l2d_rid_01 (fuse_l2d_rid_11[2:0]), | |
| 5649 | .fuse_l2d_wren_01 (fuse_l2d_wren_11), | |
| 5650 | .fuse_l2d_reset_01_l (fuse_l2d_reset_11_l), | |
| 5651 | .sel_quad_01 (fuse_l2d_rid_11[4]), | |
| 5652 | .red_d_out_00 (right_red_top_d_00[9:0]), | |
| 5653 | .red_d_out_01 (right_red_top_d_01[9:0]), | |
| 5654 | .red_top_d_00 (10'b0), | |
| 5655 | .red_top_d_01 (10'b0), | |
| 5656 | .tcu_pce_ov (tcu_pce_ov_1), | |
| 5657 | .tcu_pce (pce_1), | |
| 5658 | .se (se_1), | |
| 5659 | .tcu_clk_stop (tcu_clk_stop_1), | |
| 5660 | .wrd0lo_b_l (wrdlo1_b_l[38:19]), | |
| 5661 | .wrd0hi_b_l (wrdhi1_b_l[38:19]), | |
| 5662 | .wrd1lo_b_l (wrdlo0_b_l[38:20]), | |
| 5663 | .wrd1hi_b_l (wrdhi0_b_l[38:20]), | |
| 5664 | .ldin0lo_b (20'b0), | |
| 5665 | .ldin0hi_b (20'b0), | |
| 5666 | .ldin1lo_b (19'b0), | |
| 5667 | .ldin1hi_b (19'b0), | |
| 5668 | .worden_c3 (worden_c3_1[3:0]), | |
| 5669 | .tstmodclk_l (tstmodclk_l_1), | |
| 5670 | .wee_l (wee_l_1), | |
| 5671 | .ldout0lo_b00 (ldoutlo1_b_top[38:19]), | |
| 5672 | .ldout0hi_b00 (ldouthi1_b_top[38:19]), | |
| 5673 | .ldout1lo_b00 (ldoutlo0_b_top[38:20]), | |
| 5674 | .ldout1hi_b00 (ldouthi0_b_top[38:20]), | |
| 5675 | .vnw_ary (vnw_ary) | |
| 5676 | ); | |
| 5677 | ||
| 5678 | n2_l2d_32kb_cust way158_01 | |
| 5679 | ( | |
| 5680 | .waysel_c3 (waysel_c3_1[15:8]), | |
| 5681 | .waysel_err_c3 (wayerr_c3_1), | |
| 5682 | .set_c3 (set_c3_1[8:0]), | |
| 5683 | .coloff_c3 (coloff_c3_1), | |
| 5684 | .coloff_c4_l (coloff_c4_l_1), | |
| 5685 | .coloff_c5 ({coloff_c5_1[0],coloff_c5_1[1]}), | |
| 5686 | .rd_wr_c3 (rd_wr_c3_1), | |
| 5687 | .readen_c5 (readen_c5_1), | |
| 5688 | .l2clk (l2clk), | |
| 5689 | .fuse_l2d_data_in_00 (fuse_l2d_data_in_10[9:0]), | |
| 5690 | .fuse_l2d_rid_00 (fuse_l2d_rid_10[2:0]), | |
| 5691 | .fuse_l2d_wren_00 (fuse_l2d_wren_10), | |
| 5692 | .fuse_l2d_reset_00_l (fuse_l2d_reset_10_l), | |
| 5693 | .sel_quad_00 (fuse_l2d_rid_10[3]), | |
| 5694 | .fuse_l2d_data_in_01 (fuse_l2d_data_in_11[9:0]), | |
| 5695 | .fuse_l2d_rid_01 (fuse_l2d_rid_11[2:0]), | |
| 5696 | .fuse_l2d_wren_01 (fuse_l2d_wren_11), | |
| 5697 | .fuse_l2d_reset_01_l (fuse_l2d_reset_11_l), | |
| 5698 | .sel_quad_01 (fuse_l2d_rid_11[3]), | |
| 5699 | .red_d_out_00 (fdout_10[9:0]), | |
| 5700 | .red_d_out_01 (fdout_11[9:0]), | |
| 5701 | .red_top_d_00 (right_red_top_d_00[9:0]), | |
| 5702 | .red_top_d_01 (right_red_top_d_01[9:0]), | |
| 5703 | .tcu_pce_ov (tcu_pce_ov_1), | |
| 5704 | .tcu_pce (pce_1), | |
| 5705 | .se (se_1), | |
| 5706 | .tcu_clk_stop (tcu_clk_stop_1), | |
| 5707 | .wrd0lo_b_l (wrdlo1_b_l[38:19]), | |
| 5708 | .wrd0hi_b_l (wrdhi1_b_l[38:19]), | |
| 5709 | .wrd1lo_b_l (wrdlo0_b_l[38:20]), | |
| 5710 | .wrd1hi_b_l (wrdhi0_b_l[38:20]), | |
| 5711 | .ldin0lo_b (ldoutlo1_b_top[38:19]), | |
| 5712 | .ldin0hi_b (ldouthi1_b_top[38:19]), | |
| 5713 | .ldin1lo_b (ldoutlo0_b_top[38:20]), | |
| 5714 | .ldin1hi_b (ldouthi0_b_top[38:20]), | |
| 5715 | .worden_c3 (worden_c3_1[3:0]), | |
| 5716 | .tstmodclk_l (tstmodclk_l_1), | |
| 5717 | .wee_l (wee_l_1), | |
| 5718 | .ldout0lo_b00 (ldoutlo1_b[38:19]), | |
| 5719 | .ldout0hi_b00 (ldouthi1_b[38:19]), | |
| 5720 | .ldout1lo_b00 (ldoutlo0_b[38:20]), | |
| 5721 | .ldout1hi_b00 (ldouthi0_b[38:20]), | |
| 5722 | .vnw_ary (vnw_ary) | |
| 5723 | ); | |
| 5724 | ||
| 5725 | ||
| 5726 | endmodule | |
| 5727 | ||
| 5728 | ||
| 5729 | module n2_l2d_32kb_cust ( | |
| 5730 | waysel_c3, | |
| 5731 | waysel_err_c3, | |
| 5732 | set_c3, | |
| 5733 | coloff_c3, | |
| 5734 | coloff_c4_l, | |
| 5735 | coloff_c5, | |
| 5736 | rd_wr_c3, | |
| 5737 | readen_c5, | |
| 5738 | l2clk, | |
| 5739 | fuse_l2d_data_in_00, | |
| 5740 | fuse_l2d_rid_00, | |
| 5741 | fuse_l2d_wren_00, | |
| 5742 | fuse_l2d_reset_00_l, | |
| 5743 | sel_quad_00, | |
| 5744 | red_d_out_00, | |
| 5745 | fuse_l2d_data_in_01, | |
| 5746 | fuse_l2d_rid_01, | |
| 5747 | fuse_l2d_wren_01, | |
| 5748 | fuse_l2d_reset_01_l, | |
| 5749 | sel_quad_01, | |
| 5750 | red_d_out_01, | |
| 5751 | red_top_d_00, | |
| 5752 | red_top_d_01, | |
| 5753 | tcu_pce_ov, | |
| 5754 | tcu_pce, | |
| 5755 | se, | |
| 5756 | tcu_clk_stop, | |
| 5757 | wrd0lo_b_l, | |
| 5758 | wrd0hi_b_l, | |
| 5759 | wrd1lo_b_l, | |
| 5760 | wrd1hi_b_l, | |
| 5761 | ldin0lo_b, | |
| 5762 | ldin0hi_b, | |
| 5763 | ldin1lo_b, | |
| 5764 | ldin1hi_b, | |
| 5765 | worden_c3, | |
| 5766 | tstmodclk_l, | |
| 5767 | wee_l, | |
| 5768 | vnw_ary, | |
| 5769 | ldout0lo_b00, | |
| 5770 | ldout0hi_b00, | |
| 5771 | ldout1lo_b00, | |
| 5772 | ldout1hi_b00); | |
| 5773 | wire [7:0] waysel_top_c4; | |
| 5774 | wire [8:0] set_top_c3b; | |
| 5775 | wire coloff_top_c3b_l; | |
| 5776 | wire writeen_top_c3b; | |
| 5777 | wire [3:0] worden_top_c3b; | |
| 5778 | wire l1clk; | |
| 5779 | wire [9:0] red_addr_top_01; | |
| 5780 | wire [77:0] cred; | |
| 5781 | wire [19:0] sat_lo0_bc_l; | |
| 5782 | wire [19:0] sat_hi0_bc_l; | |
| 5783 | wire [18:0] sat_lo1_bc_l; | |
| 5784 | wire [18:0] sat_hi1_bc_l; | |
| 5785 | wire [7:0] waysel_bot_c4; | |
| 5786 | wire [8:0] set_bot_c3b; | |
| 5787 | wire coloff_bot_c3b_l; | |
| 5788 | wire writeen_bot_c3b; | |
| 5789 | wire [3:0] worden_bot_c3b; | |
| 5790 | wire [9:0] red_addr_bot_00; | |
| 5791 | wire [19:0] sab_lo0_bc_l; | |
| 5792 | wire [19:0] sab_hi0_bc_l; | |
| 5793 | wire [18:0] sab_lo1_bc_l; | |
| 5794 | wire [18:0] sab_hi1_bc_l; | |
| 5795 | ||
| 5796 | ||
| 5797 | ||
| 5798 | input [7:0] waysel_c3; | |
| 5799 | input waysel_err_c3; | |
| 5800 | input [8:0] set_c3; | |
| 5801 | input coloff_c3; | |
| 5802 | input coloff_c4_l; // check if 1 bit | |
| 5803 | input [1:0] coloff_c5; // check if 1 bit | |
| 5804 | input rd_wr_c3; | |
| 5805 | input readen_c5; | |
| 5806 | input l2clk; | |
| 5807 | ||
| 5808 | ||
| 5809 | input [9:0] fuse_l2d_data_in_00; | |
| 5810 | input [2:0] fuse_l2d_rid_00; | |
| 5811 | input fuse_l2d_wren_00; | |
| 5812 | input fuse_l2d_reset_00_l; | |
| 5813 | input sel_quad_00; | |
| 5814 | output [9:0] red_d_out_00; | |
| 5815 | ||
| 5816 | input [9:0] fuse_l2d_data_in_01; | |
| 5817 | input [2:0] fuse_l2d_rid_01; | |
| 5818 | input fuse_l2d_wren_01; | |
| 5819 | input fuse_l2d_reset_01_l; | |
| 5820 | input sel_quad_01; | |
| 5821 | output [9:0] red_d_out_01; | |
| 5822 | ||
| 5823 | input [9:0] red_top_d_00; | |
| 5824 | input [9:0] red_top_d_01; | |
| 5825 | ||
| 5826 | input tcu_pce_ov; | |
| 5827 | input tcu_pce; | |
| 5828 | input se; | |
| 5829 | input tcu_clk_stop; | |
| 5830 | input [19:0] wrd0lo_b_l; | |
| 5831 | input [19:0] wrd0hi_b_l; | |
| 5832 | input [18:0] wrd1lo_b_l; | |
| 5833 | input [18:0] wrd1hi_b_l; | |
| 5834 | input [19:0] ldin0lo_b; | |
| 5835 | input [19:0] ldin0hi_b; | |
| 5836 | input [18:0] ldin1lo_b; | |
| 5837 | input [18:0] ldin1hi_b; | |
| 5838 | input [3:0] worden_c3; | |
| 5839 | input tstmodclk_l; | |
| 5840 | input wee_l; | |
| 5841 | input vnw_ary; //NEW | |
| 5842 | ||
| 5843 | output [19:0] ldout0lo_b00; | |
| 5844 | output [19:0] ldout0hi_b00; | |
| 5845 | output [18:0] ldout1lo_b00; | |
| 5846 | output [18:0] ldout1hi_b00; | |
| 5847 | ||
| 5848 | ||
| 5849 | n2_l2d_16kb_cust set_top | |
| 5850 | ( | |
| 5851 | .waysel_c4 (waysel_top_c4[7:0]), | |
| 5852 | .waysel_err_c3 (waysel_err_c3), | |
| 5853 | .set_c3b (set_top_c3b[8:0]), | |
| 5854 | .coloff_c3b_l (coloff_top_c3b_l), | |
| 5855 | .coloff_c4_l (coloff_c4_l), | |
| 5856 | .coloff_c5 (coloff_c5[1:0]), | |
| 5857 | .wen_c3b (writeen_top_c3b), | |
| 5858 | .readen_c5 (readen_c5), | |
| 5859 | .worden_c3b (worden_top_c3b[3:0]), | |
| 5860 | .l1clk (l1clk), | |
| 5861 | .wrd_lo0_b_l (wrd0lo_b_l[19:0]), | |
| 5862 | .wrd_hi0_b_l (wrd0hi_b_l[19:0]), | |
| 5863 | .wrd_lo1_b_l (wrd1lo_b_l[18:0]), | |
| 5864 | .wrd_hi1_b_l (wrd1hi_b_l[18:0]), | |
| 5865 | // .bnken_lat (bnken_lat), | |
| 5866 | .red_adr (red_addr_top_01[9:0]), | |
| 5867 | .cred (cred[77:0]), | |
| 5868 | // .fuse_l2d_reset (fuse_l2d_reset_00_l_buf), | |
| 5869 | .saout_lo0_bc_l (sat_lo0_bc_l[19:0]), | |
| 5870 | .saout_hi0_bc_l (sat_hi0_bc_l[19:0]), | |
| 5871 | .saout_lo1_bc_l (sat_lo1_bc_l[18:0]), | |
| 5872 | .saout_hi1_bc_l (sat_hi1_bc_l[18:0]), | |
| 5873 | .tstmodclk_l (tstmodclk_l), //NEW | |
| 5874 | .wee_l (wee_l), //NEW | |
| 5875 | .vnw_ary (vnw_ary) //NEW | |
| 5876 | ); | |
| 5877 | ||
| 5878 | n2_l2d_16kb_cust set_bot | |
| 5879 | ( | |
| 5880 | .waysel_c4 (waysel_bot_c4[7:0]), | |
| 5881 | .waysel_err_c3 (waysel_err_c3), | |
| 5882 | .set_c3b (set_bot_c3b[8:0]), | |
| 5883 | .coloff_c3b_l (coloff_bot_c3b_l), | |
| 5884 | .coloff_c4_l (coloff_c4_l), | |
| 5885 | .coloff_c5 (coloff_c5[1:0]), | |
| 5886 | .wen_c3b (writeen_bot_c3b), | |
| 5887 | .readen_c5 (readen_c5), | |
| 5888 | .worden_c3b (worden_bot_c3b[3:0]), | |
| 5889 | .l1clk (l1clk), | |
| 5890 | .wrd_lo0_b_l (wrd0lo_b_l[19:0]), | |
| 5891 | .wrd_hi0_b_l (wrd0hi_b_l[19:0]), | |
| 5892 | .wrd_lo1_b_l (wrd1lo_b_l[18:0]), | |
| 5893 | .wrd_hi1_b_l (wrd1hi_b_l[18:0]), | |
| 5894 | .red_adr (red_addr_bot_00[9:0]), | |
| 5895 | // .bnken_lat (), | |
| 5896 | .cred (cred[77:0]), | |
| 5897 | // .fuse_l2d_reset (fuse_l2d_reset_01_l_buf), | |
| 5898 | .saout_lo0_bc_l (sab_lo0_bc_l[19:0]), | |
| 5899 | .saout_hi0_bc_l (sab_hi0_bc_l[19:0]), | |
| 5900 | .saout_lo1_bc_l (sab_lo1_bc_l[18:0]), | |
| 5901 | .saout_hi1_bc_l (sab_hi1_bc_l[18:0]), | |
| 5902 | .tstmodclk_l (tstmodclk_l), //NEW | |
| 5903 | .wee_l (wee_l), //NEW | |
| 5904 | .vnw_ary (vnw_ary) //NEW | |
| 5905 | ); | |
| 5906 | ||
| 5907 | ||
| 5908 | n2_l2d_dmux78_cust data_mux | |
| 5909 | ( | |
| 5910 | .waysel_c3 (waysel_c3[7:0]), // should be 15:0 | |
| 5911 | .set_c3 (set_c3[8:0]), | |
| 5912 | .coloff_c3 (coloff_c3), | |
| 5913 | // .coloff_c4_l (coloff_c4_l), | |
| 5914 | // .coloff_c5 (coloff_c5[1:0]), | |
| 5915 | .rd_wr_c3 (rd_wr_c3), | |
| 5916 | // .readen_c5 (readen_c5), | |
| 5917 | .worden_c3 (worden_c3[3:0]), | |
| 5918 | .l2clk (l2clk), | |
| 5919 | .tcu_pce_ov (tcu_pce_ov), | |
| 5920 | .tcu_pce (tcu_pce), | |
| 5921 | .se (se), | |
| 5922 | .tcu_clk_stop (tcu_clk_stop), | |
| 5923 | .waysel_top_c4 (waysel_top_c4[7:0]), | |
| 5924 | .waysel_bot_c4 (waysel_bot_c4[7:0]), | |
| 5925 | .set_top_c3b (set_top_c3b[8:0]), | |
| 5926 | .set_bot_c3b (set_bot_c3b[8:0]), | |
| 5927 | // .coloff_top_c3b_l (coloff_top_c3b_l), | |
| 5928 | // .coloff_bot_c3b_l (coloff_bot_c3b_l), | |
| 5929 | // .coloff_top_c4_l (coloff_top_c4_l), | |
| 5930 | // .coloff_bot_c4_l (coloff_bot_c4_l), | |
| 5931 | // .coloff_top_c5 (coloff_top_c5), | |
| 5932 | // .coloff_bot_c5 (coloff_bot_c5), | |
| 5933 | .writeen_top_c3b (writeen_top_c3b), | |
| 5934 | .writeen_bot_c3b (writeen_bot_c3b), | |
| 5935 | // .readen_top_c5 (readen_top_c5), | |
| 5936 | // .readen_bot_c5 (readen_bot_c5), | |
| 5937 | .l1clk (l1clk), | |
| 5938 | .worden_top_c3b (worden_top_c3b[3:0]), | |
| 5939 | .worden_bot_c3b (worden_bot_c3b[3:0]), | |
| 5940 | .sat_lo0_bc_l (sat_lo0_bc_l[19:0]), | |
| 5941 | .sat_hi0_bc_l (sat_hi0_bc_l[19:0]), | |
| 5942 | .sat_lo1_bc_l (sat_lo1_bc_l[18:0]), | |
| 5943 | .sat_hi1_bc_l (sat_hi1_bc_l[18:0]), | |
| 5944 | .sab_lo0_bc_l (sab_lo0_bc_l[19:0]), | |
| 5945 | .sab_hi0_bc_l (sab_hi0_bc_l[19:0]), | |
| 5946 | .sab_lo1_bc_l (sab_lo1_bc_l[18:0]), | |
| 5947 | .sab_hi1_bc_l (sab_hi1_bc_l[18:0]), | |
| 5948 | .ldin0lo_b (ldin0lo_b[19:0]), | |
| 5949 | .ldin0hi_b (ldin0hi_b[19:0]), | |
| 5950 | .ldin1lo_b (ldin1lo_b[18:0]), | |
| 5951 | .ldin1hi_b (ldin1hi_b[18:0]), | |
| 5952 | // .bnken_lat (bnken_lat), | |
| 5953 | .ldout0lo_b (ldout0lo_b00[19:0]), | |
| 5954 | .ldout1lo_b (ldout1lo_b00[18:0]), | |
| 5955 | .ldout0hi_b (ldout0hi_b00[19:0]), | |
| 5956 | .ldout1hi_b (ldout1hi_b00[18:0]), | |
| 5957 | .red_d_out_00 (red_d_out_00[9:0]), | |
| 5958 | .red_d_in_00 (fuse_l2d_data_in_00[9:0]), | |
| 5959 | .fuse_l2d_rid_00 (fuse_l2d_rid_00[2:0]), | |
| 5960 | .fuse_l2d_wren_00 (fuse_l2d_wren_00), | |
| 5961 | .fuse_l2d_reset_00_l (fuse_l2d_reset_00_l), | |
| 5962 | .sel_quad_00 (sel_quad_00), | |
| 5963 | .red_d_out_01 (red_d_out_01[9:0]), | |
| 5964 | .red_top_d_00 (red_top_d_00[9:0]), | |
| 5965 | .red_top_d_01 (red_top_d_01[9:0]), | |
| 5966 | .red_d_in_01 (fuse_l2d_data_in_01[9:0]), | |
| 5967 | .fuse_l2d_rid_01 (fuse_l2d_rid_01[2:0]), | |
| 5968 | .fuse_l2d_wren_01 (fuse_l2d_wren_01), | |
| 5969 | .fuse_l2d_reset_01_l (fuse_l2d_reset_01_l), | |
| 5970 | .sel_quad_01 (sel_quad_01), | |
| 5971 | .cred (cred[77:0]), | |
| 5972 | // .fuse_l2d_reset_00_l_buf (fuse_l2d_reset_00_l_buf), | |
| 5973 | // .fuse_l2d_reset_01_l_buf (fuse_l2d_reset_01_l_buf), | |
| 5974 | .red_addr_top (red_addr_top_01), | |
| 5975 | .red_addr_bot (red_addr_bot_00), | |
| 5976 | .coloff_c4_l(coloff_c4_l), | |
| 5977 | .coloff_top_c3b_l(coloff_top_c3b_l), | |
| 5978 | .coloff_bot_c3b_l(coloff_bot_c3b_l) | |
| 5979 | ); | |
| 5980 | ||
| 5981 | endmodule | |
| 5982 | ||
| 5983 | ||
| 5984 | ||
| 5985 | ||
| 5986 | module n2_l2d_16kb_cust ( | |
| 5987 | waysel_c4, | |
| 5988 | waysel_err_c3, | |
| 5989 | set_c3b, | |
| 5990 | coloff_c3b_l, | |
| 5991 | coloff_c4_l, | |
| 5992 | coloff_c5, | |
| 5993 | wen_c3b, | |
| 5994 | readen_c5, | |
| 5995 | worden_c3b, | |
| 5996 | l1clk, | |
| 5997 | wrd_lo0_b_l, | |
| 5998 | wrd_lo1_b_l, | |
| 5999 | wrd_hi0_b_l, | |
| 6000 | wrd_hi1_b_l, | |
| 6001 | red_adr, | |
| 6002 | cred, | |
| 6003 | tstmodclk_l, | |
| 6004 | wee_l, | |
| 6005 | vnw_ary, | |
| 6006 | saout_lo0_bc_l, | |
| 6007 | saout_lo1_bc_l, | |
| 6008 | saout_hi0_bc_l, | |
| 6009 | saout_hi1_bc_l); | |
| 6010 | wire coloff_c3b_l_unused; | |
| 6011 | wire bank_select; | |
| 6012 | wire coloff_c4; | |
| 6013 | wire [7:0] set_c4; | |
| 6014 | wire [1:0] spare_word_enable; | |
| 6015 | wire select_red_odd; | |
| 6016 | wire select_red_even; | |
| 6017 | ||
| 6018 | ||
| 6019 | ||
| 6020 | input [7:0] waysel_c4; | |
| 6021 | input waysel_err_c3; // Active when multiple way sel is on | |
| 6022 | input [8:0] set_c3b; // After b-latch | |
| 6023 | input coloff_c3b_l; // After b-latch+inv | |
| 6024 | input coloff_c4_l; // stage+inv | |
| 6025 | input [1:0] coloff_c5; // 2-stage | |
| 6026 | input wen_c3b; // Write-enable, after b-latch | |
| 6027 | input readen_c5; // | |
| 6028 | input [3:0] worden_c3b; // After b-latch | |
| 6029 | input l1clk; // After l1clk hdr | |
| 6030 | input [19:0] wrd_lo0_b_l; // | |
| 6031 | input [18:0] wrd_lo1_b_l; // | |
| 6032 | input [19:0] wrd_hi0_b_l; // | |
| 6033 | input [18:0] wrd_hi1_b_l; // | |
| 6034 | input [9:0] red_adr; // Redudancy address | |
| 6035 | input [77:0] cred; // Redudancy address | |
| 6036 | input tstmodclk_l; //NEW | |
| 6037 | input wee_l; //NEW | |
| 6038 | input vnw_ary; //NEW | |
| 6039 | ||
| 6040 | //output bnken_lat; // Address latch enable (1.5cycle) | |
| 6041 | output [19:0] saout_lo0_bc_l; // C5bc output from senseamp | |
| 6042 | output [18:0] saout_lo1_bc_l; // C5bc output from senseamp | |
| 6043 | output [19:0] saout_hi0_bc_l; // C5bc output from senseamp | |
| 6044 | output [18:0] saout_hi1_bc_l; // C5bc output from senseamp | |
| 6045 | ||
| 6046 | //reg rd_data_out_sel_c5b; | |
| 6047 | //reg select_read_data_c5b; | |
| 6048 | reg select_read_data_c5b_hi_rgt; | |
| 6049 | reg select_read_data_c5b_hi_lft; | |
| 6050 | reg select_read_data_c5b_lo_rgt; | |
| 6051 | reg select_read_data_c5b_lo_lft; | |
| 6052 | reg select_read_data_all_c5b; | |
| 6053 | reg select_read_red_all_c5b; | |
| 6054 | ||
| 6055 | //reg select_read_red_c5b; | |
| 6056 | reg select_read_red_c5b_hi_rgt; | |
| 6057 | reg select_read_red_c5b_hi_lft; | |
| 6058 | reg select_read_red_c5b_lo_rgt; | |
| 6059 | reg select_read_red_c5b_lo_lft; | |
| 6060 | ||
| 6061 | //reg bnken_lat; | |
| 6062 | ||
| 6063 | reg [19:0] saout_lo0_bc_l; // C5bc output from senseamp | |
| 6064 | reg [18:0] saout_lo1_bc_l; // C5bc output from senseamp | |
| 6065 | reg [19:0] saout_hi0_bc_l; // C5bc output from senseamp | |
| 6066 | reg [18:0] saout_hi1_bc_l; // C5bc output from senseamp | |
| 6067 | ||
| 6068 | reg [79:0] read_data; | |
| 6069 | wire [79:0] rd_data; | |
| 6070 | wire [79:0] wr_data; | |
| 6071 | reg rd_spare_0,rd_spare_1; | |
| 6072 | wire wr_spare_0,wr_spare_1; | |
| 6073 | ||
| 6074 | wire [19:0] saout_hi0_b_out_l, saout_lo0_b_out_l; | |
| 6075 | wire [18:0] saout_hi1_b_out_l, saout_lo1_b_out_l; | |
| 6076 | wire [19:0] red_lo0_b_out_l; | |
| 6077 | wire [18:0] red_lo1_b_out_l; | |
| 6078 | wire [19:0] red_hi0_b_out_l; | |
| 6079 | wire [18:0] red_hi1_b_out_l; | |
| 6080 | ||
| 6081 | wire [1:0] coloff_c5_rgt; | |
| 6082 | wire [1:0] coloff_c5_lft; | |
| 6083 | wire red_sel_rgt; | |
| 6084 | wire red_sel_lft; | |
| 6085 | ||
| 6086 | ||
| 6087 | ||
| 6088 | ||
| 6089 | reg [19:0] mem_lo0_way0 [255:0]; | |
| 6090 | reg [18:0] mem_lo1_way0 [255:0]; | |
| 6091 | reg [19:0] mem_hi0_way0 [255:0]; | |
| 6092 | reg [18:0] mem_hi1_way0 [255:0]; | |
| 6093 | reg [255:0] mem_way0_spare_0; | |
| 6094 | reg [255:0] mem_way0_spare_1; | |
| 6095 | ||
| 6096 | reg [19:0] mem_lo0_way1 [255:0]; | |
| 6097 | reg [18:0] mem_lo1_way1 [255:0]; | |
| 6098 | reg [19:0] mem_hi0_way1 [255:0]; | |
| 6099 | reg [18:0] mem_hi1_way1 [255:0]; | |
| 6100 | reg [255:0] mem_way1_spare_0; | |
| 6101 | reg [255:0] mem_way1_spare_1; | |
| 6102 | ||
| 6103 | reg [19:0] mem_lo0_way2 [255:0]; | |
| 6104 | reg [18:0] mem_lo1_way2 [255:0]; | |
| 6105 | reg [19:0] mem_hi0_way2 [255:0]; | |
| 6106 | reg [18:0] mem_hi1_way2 [255:0]; | |
| 6107 | reg [255:0] mem_way2_spare_0; | |
| 6108 | reg [255:0] mem_way2_spare_1; | |
| 6109 | ||
| 6110 | ||
| 6111 | reg [19:0] mem_lo0_way3 [255:0]; | |
| 6112 | reg [18:0] mem_lo1_way3 [255:0]; | |
| 6113 | reg [19:0] mem_hi0_way3 [255:0]; | |
| 6114 | reg [18:0] mem_hi1_way3 [255:0]; | |
| 6115 | reg [255:0] mem_way3_spare_0; | |
| 6116 | reg [255:0] mem_way3_spare_1; | |
| 6117 | ||
| 6118 | ||
| 6119 | reg [19:0] mem_lo0_way4 [255:0]; | |
| 6120 | reg [18:0] mem_lo1_way4 [255:0]; | |
| 6121 | reg [19:0] mem_hi0_way4 [255:0]; | |
| 6122 | reg [18:0] mem_hi1_way4 [255:0]; | |
| 6123 | reg [255:0] mem_way4_spare_0; | |
| 6124 | reg [255:0] mem_way4_spare_1; | |
| 6125 | ||
| 6126 | ||
| 6127 | reg [19:0] mem_lo0_way5 [255:0]; | |
| 6128 | reg [18:0] mem_lo1_way5 [255:0]; | |
| 6129 | reg [19:0] mem_hi0_way5 [255:0]; | |
| 6130 | reg [18:0] mem_hi1_way5 [255:0]; | |
| 6131 | reg [255:0] mem_way5_spare_0; | |
| 6132 | reg [255:0] mem_way5_spare_1; | |
| 6133 | ||
| 6134 | ||
| 6135 | reg [19:0] mem_lo0_way6 [255:0]; | |
| 6136 | reg [18:0] mem_lo1_way6 [255:0]; | |
| 6137 | reg [19:0] mem_hi0_way6 [255:0]; | |
| 6138 | reg [18:0] mem_hi1_way6 [255:0]; | |
| 6139 | reg [255:0] mem_way6_spare_0; | |
| 6140 | reg [255:0] mem_way6_spare_1; | |
| 6141 | ||
| 6142 | ||
| 6143 | reg [19:0] mem_lo0_way7 [255:0]; | |
| 6144 | reg [18:0] mem_lo1_way7 [255:0]; | |
| 6145 | reg [19:0] mem_hi0_way7 [255:0]; | |
| 6146 | reg [18:0] mem_hi1_way7 [255:0]; | |
| 6147 | reg [255:0] mem_way7_spare_0; | |
| 6148 | reg [255:0] mem_way7_spare_1; | |
| 6149 | ||
| 6150 | //reg bnken_lat_c52; | |
| 6151 | reg [19:0] saout_lo0_bc; // C5bc output from senseamp | |
| 6152 | reg [18:0] saout_lo1_bc; // C5bc output from senseamp | |
| 6153 | reg [19:0] saout_hi0_bc; // C5bc output from senseamp | |
| 6154 | reg [18:0] saout_hi1_bc; // C5bc output from senseamp | |
| 6155 | ||
| 6156 | ||
| 6157 | //reg [19:0] saout_lo0_bc_d; // C5bc output from senseamp | |
| 6158 | //reg [18:0] saout_lo1_bc_d; // C5bc output from senseamp | |
| 6159 | //reg [19:0] saout_hi0_bc_d; // C5bc output from senseamp | |
| 6160 | //reg [18:0] saout_hi1_bc_d; // C5bc output from senseamp | |
| 6161 | ||
| 6162 | //reg set_banken_lat, reset_banken_lat; | |
| 6163 | ||
| 6164 | reg [19:0] saout_lo0_bc_c5b_l; | |
| 6165 | reg [18:0] saout_lo1_bc_c5b_l; | |
| 6166 | reg [19:0] saout_hi0_bc_c5b_l; | |
| 6167 | reg [18:0] saout_hi1_bc_c5b_l; | |
| 6168 | ||
| 6169 | reg [19:0] saout_lo0_bc_d_l; | |
| 6170 | reg [18:0] saout_lo1_bc_d_l; | |
| 6171 | reg [19:0] saout_hi0_bc_d_l; | |
| 6172 | reg [18:0] saout_hi1_bc_d_l; | |
| 6173 | ||
| 6174 | ||
| 6175 | assign coloff_c3b_l_unused = coloff_c3b_l; | |
| 6176 | ||
| 6177 | ||
| 6178 | //always@(posedge l1clk) | |
| 6179 | //begin | |
| 6180 | // if(~coloff_c3b_l) | |
| 6181 | // set_banken_lat <= 1'b1; | |
| 6182 | // else set_banken_lat <= 1'b0; | |
| 6183 | //end | |
| 6184 | // | |
| 6185 | //always@(negedge l1clk) | |
| 6186 | //begin | |
| 6187 | // if(coloff_c4_l) | |
| 6188 | // reset_banken_lat <= 1'b1; | |
| 6189 | // else reset_banken_lat <= 1'b0; | |
| 6190 | //end | |
| 6191 | // | |
| 6192 | //always@(set_banken_lat or reset_banken_lat) | |
| 6193 | //begin | |
| 6194 | // if(set_banken_lat ) | |
| 6195 | // bnken_lat <= 1'b1; | |
| 6196 | // else if(reset_banken_lat ) | |
| 6197 | // bnken_lat <= 1'b0; | |
| 6198 | //end | |
| 6199 | ||
| 6200 | ||
| 6201 | reg [7:0] waysel_c5; | |
| 6202 | reg [8:0] index_c4; | |
| 6203 | reg [8:0] set_c5; | |
| 6204 | reg wen_c4; | |
| 6205 | reg [3:0] worden_c4; | |
| 6206 | ||
| 6207 | ||
| 6208 | ||
| 6209 | reg bank_select_c5; | |
| 6210 | reg waysel_err_c3b, waysel_err_c4,waysel_err_c5; | |
| 6211 | ||
| 6212 | always@(l1clk or coloff_c4_l) | |
| 6213 | begin | |
| 6214 | if(~l1clk & coloff_c4_l) | |
| 6215 | waysel_err_c3b <= waysel_err_c3; | |
| 6216 | end | |
| 6217 | ||
| 6218 | ||
| 6219 | ||
| 6220 | ||
| 6221 | ||
| 6222 | always@(posedge l1clk) | |
| 6223 | begin | |
| 6224 | waysel_err_c4 <= waysel_err_c3b; | |
| 6225 | waysel_err_c5 <= waysel_err_c4; | |
| 6226 | waysel_c5[7:0] <= waysel_c4[7:0]; | |
| 6227 | index_c4[8:0] <= set_c3b[8:0]; | |
| 6228 | set_c5[8:0] <= index_c4[8:0]; | |
| 6229 | worden_c4[3:0] <= worden_c3b[3:0]; | |
| 6230 | wen_c4 <= wen_c3b; | |
| 6231 | bank_select_c5 <= bank_select; | |
| 6232 | end | |
| 6233 | ||
| 6234 | ||
| 6235 | assign coloff_c4 = ~coloff_c4_l; | |
| 6236 | assign bank_select = index_c4[8]; | |
| 6237 | ||
| 6238 | //reg [19:0] saout_lo0_bc_c5b; | |
| 6239 | //reg [18:0] saout_lo1_bc_c5b; | |
| 6240 | //reg [19:0] saout_hi0_bc_c5b; | |
| 6241 | //reg [18:0] saout_hi1_bc_c5b; | |
| 6242 | ||
| 6243 | ||
| 6244 | ||
| 6245 | ||
| 6246 | ||
| 6247 | ||
| 6248 | assign set_c4[7:0] = index_c4[7:0]; | |
| 6249 | wire [19:0] wrd_lo0_a; | |
| 6250 | wire [19:0] wrd_hi0_a; | |
| 6251 | wire [18:0] wrd_lo1_a; | |
| 6252 | wire [18:0] wrd_hi1_a; | |
| 6253 | ||
| 6254 | reg [19:0] wrd_lo0_a_reg; | |
| 6255 | reg [19:0] wrd_hi0_a_reg; | |
| 6256 | reg [18:0] wrd_lo1_a_reg; | |
| 6257 | reg [18:0] wrd_hi1_a_reg; | |
| 6258 | ||
| 6259 | ||
| 6260 | always@(posedge l1clk) | |
| 6261 | begin | |
| 6262 | wrd_lo0_a_reg[19:0] <= ~wrd_lo0_b_l[19:0]; | |
| 6263 | wrd_hi0_a_reg[19:0] <= ~wrd_hi0_b_l[19:0]; | |
| 6264 | wrd_lo1_a_reg[18:0] <= ~wrd_lo1_b_l[18:0]; | |
| 6265 | wrd_hi1_a_reg[18:0] <= ~wrd_hi1_b_l[18:0]; | |
| 6266 | end | |
| 6267 | ||
| 6268 | ||
| 6269 | ||
| 6270 | // COL redudancy | |
| 6271 | ||
| 6272 | //reg [255:0] red_reg1; | |
| 6273 | //reg [255:0] red_reg2; | |
| 6274 | ||
| 6275 | wire [79:0] cred_mod; | |
| 6276 | ||
| 6277 | ||
| 6278 | assign cred_mod[79:0] = {cred[77:59],1'b0,cred[58:19],1'b0,cred[18:0]}; | |
| 6279 | ||
| 6280 | ||
| 6281 | //assign spare_word_enable[1] = cred_mod[19] ? worden_c4[3] : worden_c4[2]; | |
| 6282 | //assign spare_word_enable[0] = cred_mod[59] ? worden_c4[3] : worden_c4[2]; | |
| 6283 | ||
| 6284 | ||
| 6285 | assign wr_data[19:0] = | |
| 6286 | {wr_spare_0, wrd_lo1_a_reg[4], wrd_hi0_a_reg[4],wrd_lo0_a_reg[4], | |
| 6287 | wrd_hi1_a_reg[3], wrd_lo1_a_reg[3], wrd_hi0_a_reg[3],wrd_lo0_a_reg[3], | |
| 6288 | wrd_hi1_a_reg[2], wrd_lo1_a_reg[2], wrd_hi0_a_reg[2],wrd_lo0_a_reg[2], | |
| 6289 | wrd_hi1_a_reg[1], wrd_lo1_a_reg[1], wrd_hi0_a_reg[1],wrd_lo0_a_reg[1], | |
| 6290 | wrd_hi1_a_reg[0], wrd_lo1_a_reg[0], wrd_hi0_a_reg[0],wrd_lo0_a_reg[0]}; | |
| 6291 | ||
| 6292 | assign wr_data[39:20] = { | |
| 6293 | wrd_lo1_a_reg[9], wrd_hi0_a_reg[9],wrd_lo0_a_reg[9], | |
| 6294 | wrd_hi1_a_reg[8], wrd_lo1_a_reg[8], wrd_hi0_a_reg[8],wrd_lo0_a_reg[8], | |
| 6295 | wrd_hi1_a_reg[7], wrd_lo1_a_reg[7], wrd_hi0_a_reg[7],wrd_lo0_a_reg[7], | |
| 6296 | wrd_hi1_a_reg[6], wrd_lo1_a_reg[6], wrd_hi0_a_reg[6],wrd_lo0_a_reg[6], | |
| 6297 | wrd_hi1_a_reg[5], wrd_lo1_a_reg[5], wrd_hi0_a_reg[5],wrd_lo0_a_reg[5], wrd_hi1_a_reg[4]}; | |
| 6298 | ||
| 6299 | ||
| 6300 | assign wr_data[59:40] = { | |
| 6301 | wrd_lo1_a_reg[14], wrd_hi0_a_reg[14],wrd_lo0_a_reg[14], | |
| 6302 | wrd_hi1_a_reg[13], wrd_lo1_a_reg[13], wrd_hi0_a_reg[13],wrd_lo0_a_reg[13], | |
| 6303 | wrd_hi1_a_reg[12], wrd_lo1_a_reg[12], wrd_hi0_a_reg[12],wrd_lo0_a_reg[12], | |
| 6304 | wrd_hi1_a_reg[11], wrd_lo1_a_reg[11], wrd_hi0_a_reg[11],wrd_lo0_a_reg[11], | |
| 6305 | wrd_hi1_a_reg[10], wrd_lo1_a_reg[10], wrd_hi0_a_reg[10],wrd_lo0_a_reg[10], wrd_hi1_a_reg[9]}; | |
| 6306 | ||
| 6307 | assign wr_data[79:60] = { | |
| 6308 | wrd_hi0_a_reg[19], wrd_lo0_a_reg[19], | |
| 6309 | wrd_hi1_a_reg[18], wrd_lo1_a_reg[18], wrd_hi0_a_reg[18],wrd_lo0_a_reg[18], | |
| 6310 | wrd_hi1_a_reg[17], wrd_lo1_a_reg[17], wrd_hi0_a_reg[17],wrd_lo0_a_reg[17], | |
| 6311 | wrd_hi1_a_reg[16], wrd_lo1_a_reg[16], wrd_hi0_a_reg[16],wrd_lo0_a_reg[16], | |
| 6312 | wrd_hi1_a_reg[15], wrd_lo1_a_reg[15], wrd_hi0_a_reg[15],wrd_lo0_a_reg[15], wrd_hi1_a_reg[14],wr_spare_1}; | |
| 6313 | ||
| 6314 | ||
| 6315 | integer i; | |
| 6316 | reg [80:0] data; | |
| 6317 | ||
| 6318 | always@(cred_mod or wr_data) | |
| 6319 | begin | |
| 6320 | if (~cred_mod[0]) begin | |
| 6321 | data[0] = wr_data[0]; | |
| 6322 | end | |
| 6323 | ||
| 6324 | for(i=0; i<18; i=i+1) | |
| 6325 | begin | |
| 6326 | data[i+1] = cred_mod[i] ? wr_data[i] : wr_data[i+1]; | |
| 6327 | end | |
| 6328 | ||
| 6329 | data[19] = cred_mod[18] ? wr_data[18] : cred_mod[20] ? wr_data[20] : 1'b0; | |
| 6330 | ||
| 6331 | for(i=21;i<40;i=i+1) | |
| 6332 | begin | |
| 6333 | data[i-1] = cred_mod[i] ? wr_data[i] : wr_data[i-1]; | |
| 6334 | end | |
| 6335 | ||
| 6336 | ||
| 6337 | if (~cred_mod[39]) begin | |
| 6338 | data[39] = wr_data[39]; | |
| 6339 | end | |
| 6340 | ||
| 6341 | if (~cred_mod[40]) begin | |
| 6342 | data[40] = wr_data[40]; | |
| 6343 | end | |
| 6344 | ||
| 6345 | for(i=40;i<59;i=i+1) | |
| 6346 | begin | |
| 6347 | data[i+1] = cred_mod[i] ? wr_data[i] : wr_data[i+1]; | |
| 6348 | end | |
| 6349 | ||
| 6350 | data[60] = cred_mod[59] ? wr_data[59] : cred_mod[61] ? wr_data[61] : 1'b0; | |
| 6351 | ||
| 6352 | for(i=62;i<80;i=i+1) | |
| 6353 | begin | |
| 6354 | data[i-1] = cred_mod[i] ? wr_data[i] : wr_data[i-1]; | |
| 6355 | end | |
| 6356 | ||
| 6357 | if (~cred_mod[79]) begin | |
| 6358 | data[79] = wr_data[79]; | |
| 6359 | end | |
| 6360 | ||
| 6361 | end | |
| 6362 | ||
| 6363 | ||
| 6364 | assign { wrd_hi0_a[19], wrd_lo0_a[19], | |
| 6365 | wrd_hi1_a[18], wrd_lo1_a[18], wrd_hi0_a[18],wrd_lo0_a[18], | |
| 6366 | wrd_hi1_a[17], wrd_lo1_a[17], wrd_hi0_a[17],wrd_lo0_a[17], | |
| 6367 | wrd_hi1_a[16], wrd_lo1_a[16], wrd_hi0_a[16],wrd_lo0_a[16], | |
| 6368 | wrd_hi1_a[15], wrd_lo1_a[15], wrd_hi0_a[15],wrd_lo0_a[15], | |
| 6369 | wrd_hi1_a[14],wr_spare_1} = data[79:60]; | |
| 6370 | ||
| 6371 | assign { | |
| 6372 | wrd_lo1_a[14], wrd_hi0_a[14],wrd_lo0_a[14], | |
| 6373 | wrd_hi1_a[13], wrd_lo1_a[13], wrd_hi0_a[13],wrd_lo0_a[13], | |
| 6374 | wrd_hi1_a[12], wrd_lo1_a[12], wrd_hi0_a[12],wrd_lo0_a[12], | |
| 6375 | wrd_hi1_a[11], wrd_lo1_a[11], wrd_hi0_a[11],wrd_lo0_a[11], | |
| 6376 | wrd_hi1_a[10], wrd_lo1_a[10], wrd_hi0_a[10],wrd_lo0_a[10],wrd_hi1_a[9]} = data[59:40]; | |
| 6377 | ||
| 6378 | assign { | |
| 6379 | wrd_lo1_a[9], wrd_hi0_a[9],wrd_lo0_a[9], | |
| 6380 | wrd_hi1_a[8], wrd_lo1_a[8], wrd_hi0_a[8],wrd_lo0_a[8], | |
| 6381 | wrd_hi1_a[7], wrd_lo1_a[7], wrd_hi0_a[7],wrd_lo0_a[7], | |
| 6382 | wrd_hi1_a[6], wrd_lo1_a[6], wrd_hi0_a[6],wrd_lo0_a[6], | |
| 6383 | wrd_hi1_a[5], wrd_lo1_a[5], wrd_hi0_a[5],wrd_lo0_a[5], wrd_hi1_a[4]} = data[39:20]; | |
| 6384 | ||
| 6385 | assign { | |
| 6386 | wr_spare_0, wrd_lo1_a[4], wrd_hi0_a[4],wrd_lo0_a[4], | |
| 6387 | wrd_hi1_a[3], wrd_lo1_a[3], wrd_hi0_a[3],wrd_lo0_a[3], | |
| 6388 | wrd_hi1_a[2], wrd_lo1_a[2], wrd_hi0_a[2],wrd_lo0_a[2], | |
| 6389 | wrd_hi1_a[1], wrd_lo1_a[1], wrd_hi0_a[1],wrd_lo0_a[1], | |
| 6390 | wrd_hi1_a[0], wrd_lo1_a[0], wrd_hi0_a[0],wrd_lo0_a[0]} = data[19:0]; | |
| 6391 | ||
| 6392 | ||
| 6393 | ||
| 6394 | wire [79:0] worden_data; | |
| 6395 | wire [19:0] worden_lo0; | |
| 6396 | wire [19:0] worden_hi0; | |
| 6397 | wire [18:0] worden_lo1; | |
| 6398 | wire [18:0] worden_hi1; | |
| 6399 | ||
| 6400 | ||
| 6401 | assign worden_data[19:0] = | |
| 6402 | {spare_word_enable[0], worden_c4[2], worden_c4[1],worden_c4[0], | |
| 6403 | worden_c4[3], worden_c4[2], worden_c4[1],worden_c4[0], | |
| 6404 | worden_c4[3], worden_c4[2], worden_c4[1],worden_c4[0], | |
| 6405 | worden_c4[3], worden_c4[2], worden_c4[1],worden_c4[0], | |
| 6406 | worden_c4[3], worden_c4[2], worden_c4[1],worden_c4[0]}; | |
| 6407 | ||
| 6408 | assign worden_data[39:20] = { | |
| 6409 | worden_c4[2], worden_c4[1],worden_c4[0], | |
| 6410 | worden_c4[3], worden_c4[2], worden_c4[1],worden_c4[0], | |
| 6411 | worden_c4[3], worden_c4[2], worden_c4[1],worden_c4[0], | |
| 6412 | worden_c4[3], worden_c4[2], worden_c4[1],worden_c4[0], | |
| 6413 | worden_c4[3], worden_c4[2], worden_c4[1],worden_c4[0], worden_c4[3]}; | |
| 6414 | ||
| 6415 | ||
| 6416 | assign worden_data[59:40] = { | |
| 6417 | worden_c4[2], worden_c4[1],worden_c4[0], | |
| 6418 | worden_c4[3], worden_c4[2], worden_c4[1],worden_c4[0], | |
| 6419 | worden_c4[3], worden_c4[2], worden_c4[1],worden_c4[0], | |
| 6420 | worden_c4[3], worden_c4[2], worden_c4[1],worden_c4[0], | |
| 6421 | worden_c4[3], worden_c4[2], worden_c4[1],worden_c4[0], worden_c4[3]}; | |
| 6422 | ||
| 6423 | assign worden_data[79:60] = { | |
| 6424 | worden_c4[1],worden_c4[0], | |
| 6425 | worden_c4[3], worden_c4[2], worden_c4[1],worden_c4[0], | |
| 6426 | worden_c4[3], worden_c4[2], worden_c4[1],worden_c4[0], | |
| 6427 | worden_c4[3], worden_c4[2], worden_c4[1],worden_c4[0], | |
| 6428 | worden_c4[3], worden_c4[2], worden_c4[1],worden_c4[0], worden_c4[3],spare_word_enable[1]}; | |
| 6429 | ||
| 6430 | reg [79:0] worden_shift; | |
| 6431 | ||
| 6432 | ||
| 6433 | ||
| 6434 | always@(cred_mod or worden_data or wen_c4 or coloff_c4) | |
| 6435 | begin | |
| 6436 | if (wen_c4 & coloff_c4) | |
| 6437 | begin | |
| 6438 | if (~cred_mod[0]) begin | |
| 6439 | worden_shift[0] = worden_data[0]; | |
| 6440 | end | |
| 6441 | ||
| 6442 | for(i=0; i<18; i=i+1) | |
| 6443 | begin | |
| 6444 | worden_shift[i+1] = cred_mod[i] ? worden_data[i] : ~cred_mod[i+1] ? worden_data[i+1] : 1'b0; | |
| 6445 | end | |
| 6446 | ||
| 6447 | worden_shift[19] = cred_mod[18] ? worden_data[18] : cred_mod[20] ? worden_data[20] : 1'b0; | |
| 6448 | ||
| 6449 | for(i=21;i<40;i=i+1) | |
| 6450 | begin | |
| 6451 | worden_shift[i-1] = cred_mod[i] ? worden_data[i] : ~cred_mod[i-1] ? worden_data[i-1] : 1'b0; | |
| 6452 | end | |
| 6453 | ||
| 6454 | ||
| 6455 | if (~cred_mod[39]) begin | |
| 6456 | worden_shift[39] = worden_data[39]; | |
| 6457 | end | |
| 6458 | ||
| 6459 | if (~cred_mod[40]) begin | |
| 6460 | worden_shift[40] = worden_data[40]; | |
| 6461 | end | |
| 6462 | ||
| 6463 | for(i=40;i<59;i=i+1) | |
| 6464 | begin | |
| 6465 | worden_shift[i+1] = cred_mod[i] ? worden_data[i] : ~cred_mod[i+1] ? worden_data[i+1] : 1'b0; | |
| 6466 | end | |
| 6467 | ||
| 6468 | worden_shift[60] = cred_mod[59] ? worden_data[59] : cred_mod[61] ? worden_data[61] : 1'b0; | |
| 6469 | ||
| 6470 | for(i=62;i<80;i=i+1) | |
| 6471 | begin | |
| 6472 | worden_shift[i-1] = cred_mod[i] ? worden_data[i] : ~cred_mod[i-1] ? worden_data[i-1] : 1'b0; | |
| 6473 | end | |
| 6474 | ||
| 6475 | if (~cred_mod[79]) begin | |
| 6476 | worden_shift[79] = worden_data[79]; | |
| 6477 | end | |
| 6478 | ||
| 6479 | end | |
| 6480 | else worden_shift[79:0] = 80'b0; | |
| 6481 | ||
| 6482 | end | |
| 6483 | ||
| 6484 | ||
| 6485 | assign { worden_hi0[19], worden_lo0[19], | |
| 6486 | worden_hi1[18], worden_lo1[18], worden_hi0[18],worden_lo0[18], | |
| 6487 | worden_hi1[17], worden_lo1[17], worden_hi0[17],worden_lo0[17], | |
| 6488 | worden_hi1[16], worden_lo1[16], worden_hi0[16],worden_lo0[16], | |
| 6489 | worden_hi1[15], worden_lo1[15], worden_hi0[15],worden_lo0[15], | |
| 6490 | worden_hi1[14],spare_word_enable[1]} = worden_shift[79:60]; | |
| 6491 | ||
| 6492 | assign { | |
| 6493 | worden_lo1[14], worden_hi0[14],worden_lo0[14], | |
| 6494 | worden_hi1[13], worden_lo1[13], worden_hi0[13],worden_lo0[13], | |
| 6495 | worden_hi1[12], worden_lo1[12], worden_hi0[12],worden_lo0[12], | |
| 6496 | worden_hi1[11], worden_lo1[11], worden_hi0[11],worden_lo0[11], | |
| 6497 | worden_hi1[10], worden_lo1[10], worden_hi0[10],worden_lo0[10],worden_hi1[9]} = worden_shift[59:40]; | |
| 6498 | ||
| 6499 | assign { | |
| 6500 | worden_lo1[9], worden_hi0[9],worden_lo0[9], | |
| 6501 | worden_hi1[8], worden_lo1[8], worden_hi0[8],worden_lo0[8], | |
| 6502 | worden_hi1[7], worden_lo1[7], worden_hi0[7],worden_lo0[7], | |
| 6503 | worden_hi1[6], worden_lo1[6], worden_hi0[6],worden_lo0[6], | |
| 6504 | worden_hi1[5], worden_lo1[5], worden_hi0[5],worden_lo0[5], worden_hi1[4]} = worden_shift[39:20]; | |
| 6505 | ||
| 6506 | assign { | |
| 6507 | spare_word_enable[0], worden_lo1[4], worden_hi0[4],worden_lo0[4], | |
| 6508 | worden_hi1[3], worden_lo1[3], worden_hi0[3],worden_lo0[3], | |
| 6509 | worden_hi1[2], worden_lo1[2], worden_hi0[2],worden_lo0[2], | |
| 6510 | worden_hi1[1], worden_lo1[1], worden_hi0[1],worden_lo0[1], | |
| 6511 | worden_hi1[0], worden_lo1[0], worden_hi0[0],worden_lo0[0]} = worden_shift[19:0]; | |
| 6512 | ||
| 6513 | ||
| 6514 | ||
| 6515 | ||
| 6516 | ||
| 6517 | ||
| 6518 | ||
| 6519 | ||
| 6520 | ||
| 6521 | ||
| 6522 | ||
| 6523 | ||
| 6524 | ||
| 6525 | ||
| 6526 | ||
| 6527 | ||
| 6528 | ||
| 6529 | ||
| 6530 | always@(l1clk or wen_c4 or set_c4 or waysel_c4 or waysel_err_c4 or worden_c4 or wrd_lo0_a or | |
| 6531 | wrd_hi0_a or wrd_lo1_a or wrd_hi1_a or coloff_c4 or bank_select or wr_spare_0 or | |
| 6532 | wr_spare_1 or wee_l or worden_hi0 or worden_lo0 or worden_lo1 or worden_hi1 or spare_word_enable | |
| 6533 | or vnw_ary) | |
| 6534 | begin | |
| 6535 | ||
| 6536 | //////////////////////////////////////////////////////////////// | |
| 6537 | // Read all entries for a given set | |
| 6538 | //////////////////////////////////////////////////////////////// | |
| 6539 | ||
| 6540 | //////////////////////////////////////////////////////////////// | |
| 6541 | // Write data computation | |
| 6542 | //////////////////////////////////////////////////////////////// | |
| 6543 | ||
| 6544 | /////////////////////////////////////////////////////////////// | |
| 6545 | // Write to memory | |
| 6546 | ////////////////////////////////////////////////////////////// | |
| 6547 | ||
| 6548 | ||
| 6549 | ||
| 6550 | #0 | |
| 6551 | ||
| 6552 | ||
| 6553 | //if(wen_c4 & ~waysel_err_c4 & bank_select & coloff_c4 & (|worden_c4)) | |
| 6554 | if(~l1clk & wee_l & wen_c4 & ~waysel_err_c4 & bank_select & coloff_c4 & (|worden_c4) & vnw_ary) | |
| 6555 | begin | |
| 6556 | if(waysel_c4[0]) | |
| 6557 | begin | |
| 6558 | mem_lo0_way0[set_c4] = (worden_lo0[19:0] & wrd_lo0_a[19:0] | ~worden_lo0[19:0] & mem_lo0_way0[set_c4]); | |
| 6559 | mem_hi0_way0[set_c4] = (worden_hi0[19:0] & wrd_hi0_a[19:0] | ~worden_hi0[19:0] & mem_hi0_way0[set_c4]); | |
| 6560 | mem_lo1_way0[set_c4] = (worden_lo1[18:0] & wrd_lo1_a[18:0] | ~worden_lo1[18:0] & mem_lo1_way0[set_c4]); | |
| 6561 | mem_hi1_way0[set_c4] = (worden_hi1[18:0] & wrd_hi1_a[18:0] | ~worden_hi1[18:0] & mem_hi1_way0[set_c4]); | |
| 6562 | mem_way0_spare_0[set_c4] = (spare_word_enable[0] & wr_spare_0 | ~spare_word_enable[0] & mem_way0_spare_0[set_c4]); | |
| 6563 | mem_way0_spare_1[set_c4] = (spare_word_enable[1] & wr_spare_1 | ~spare_word_enable[1] & mem_way0_spare_1[set_c4]); | |
| 6564 | end | |
| 6565 | else if(waysel_c4[1]) | |
| 6566 | begin | |
| 6567 | mem_lo0_way1[set_c4] = (worden_lo0[19:0] & wrd_lo0_a[19:0] | ~worden_lo0[19:0] & mem_lo0_way1[set_c4]); | |
| 6568 | mem_hi0_way1[set_c4] = (worden_hi0[19:0] & wrd_hi0_a[19:0] | ~worden_hi0[19:0] & mem_hi0_way1[set_c4]); | |
| 6569 | mem_lo1_way1[set_c4] = (worden_lo1[18:0] & wrd_lo1_a[18:0] | ~worden_lo1[18:0] & mem_lo1_way1[set_c4]); | |
| 6570 | mem_hi1_way1[set_c4] = (worden_hi1[18:0] & wrd_hi1_a[18:0] | ~worden_hi1[18:0] & mem_hi1_way1[set_c4]); | |
| 6571 | mem_way1_spare_0[set_c4] = (spare_word_enable[0] & wr_spare_0 | ~spare_word_enable[0] & mem_way1_spare_0[set_c4]); | |
| 6572 | mem_way1_spare_1[set_c4] = (spare_word_enable[1] & wr_spare_1 | ~spare_word_enable[1] & mem_way1_spare_1[set_c4]); | |
| 6573 | end | |
| 6574 | else if(waysel_c4[2]) | |
| 6575 | begin | |
| 6576 | mem_lo0_way2[set_c4] = (worden_lo0[19:0] & wrd_lo0_a[19:0] | ~worden_lo0[19:0] & mem_lo0_way2[set_c4]); | |
| 6577 | mem_lo1_way2[set_c4] = (worden_lo1[18:0] & wrd_lo1_a[18:0] | ~worden_lo1[18:0] & mem_lo1_way2[set_c4]); | |
| 6578 | mem_hi0_way2[set_c4] = (worden_hi0[19:0] & wrd_hi0_a[19:0] | ~worden_hi0[19:0] & mem_hi0_way2[set_c4]); | |
| 6579 | mem_hi1_way2[set_c4] = (worden_hi1[18:0] & wrd_hi1_a[18:0] | ~worden_hi1[18:0] & mem_hi1_way2[set_c4]); | |
| 6580 | mem_way2_spare_0[set_c4] = (spare_word_enable[0] & wr_spare_0 | ~spare_word_enable[0] & mem_way2_spare_0[set_c4]); | |
| 6581 | mem_way2_spare_1[set_c4] = (spare_word_enable[1] & wr_spare_1 | ~spare_word_enable[1] & mem_way2_spare_1[set_c4]); | |
| 6582 | end | |
| 6583 | else if(waysel_c4[3]) | |
| 6584 | begin | |
| 6585 | mem_lo0_way3[set_c4] = (worden_lo0[19:0] & wrd_lo0_a[19:0] | ~worden_lo0[19:0] & mem_lo0_way3[set_c4]); | |
| 6586 | mem_lo1_way3[set_c4] = (worden_lo1[18:0] & wrd_lo1_a[18:0] | ~worden_lo1[18:0] & mem_lo1_way3[set_c4]); | |
| 6587 | mem_hi0_way3[set_c4] = (worden_hi0[19:0] & wrd_hi0_a[19:0] | ~worden_hi0[19:0] & mem_hi0_way3[set_c4]); | |
| 6588 | mem_hi1_way3[set_c4] = (worden_hi1[18:0] & wrd_hi1_a[18:0] | ~worden_hi1[18:0] & mem_hi1_way3[set_c4]); | |
| 6589 | mem_way3_spare_0[set_c4] = (spare_word_enable[0] & wr_spare_0 | ~spare_word_enable[0] & mem_way3_spare_0[set_c4]); | |
| 6590 | mem_way3_spare_1[set_c4] = (spare_word_enable[1] & wr_spare_1 | ~spare_word_enable[1] & mem_way3_spare_1[set_c4]); | |
| 6591 | end | |
| 6592 | else if(waysel_c4[4]) | |
| 6593 | begin | |
| 6594 | mem_lo0_way4[set_c4] = (worden_lo0[19:0] & wrd_lo0_a[19:0] | ~worden_lo0[19:0] & mem_lo0_way4[set_c4]); | |
| 6595 | mem_lo1_way4[set_c4] = (worden_lo1[18:0] & wrd_lo1_a[18:0] | ~worden_lo1[18:0] & mem_lo1_way4[set_c4]); | |
| 6596 | mem_hi0_way4[set_c4] = (worden_hi0[19:0] & wrd_hi0_a[19:0] | ~worden_hi0[19:0] & mem_hi0_way4[set_c4]); | |
| 6597 | mem_hi1_way4[set_c4] = (worden_hi1[18:0] & wrd_hi1_a[18:0] | ~worden_hi1[18:0] & mem_hi1_way4[set_c4]); | |
| 6598 | mem_way4_spare_0[set_c4] = (spare_word_enable[0] & wr_spare_0 | ~spare_word_enable[0] & mem_way4_spare_0[set_c4]); | |
| 6599 | mem_way4_spare_1[set_c4] = (spare_word_enable[1] & wr_spare_1 | ~spare_word_enable[1] & mem_way4_spare_1[set_c4]); | |
| 6600 | end | |
| 6601 | else if(waysel_c4[5]) | |
| 6602 | begin | |
| 6603 | mem_lo0_way5[set_c4] =(worden_lo0[19:0] & wrd_lo0_a[19:0] | ~worden_lo0[19:0] & mem_lo0_way5[set_c4]); | |
| 6604 | mem_lo1_way5[set_c4] =(worden_lo1[18:0] & wrd_lo1_a[18:0] | ~worden_lo1[18:0] & mem_lo1_way5[set_c4]); | |
| 6605 | mem_hi0_way5[set_c4] =(worden_hi0[19:0] & wrd_hi0_a[19:0] | ~worden_hi0[19:0] & mem_hi0_way5[set_c4]); | |
| 6606 | mem_hi1_way5[set_c4] =(worden_hi1[18:0] & wrd_hi1_a[18:0] | ~worden_hi1[18:0] & mem_hi1_way5[set_c4]); | |
| 6607 | mem_way5_spare_0[set_c4] = (spare_word_enable[0] & wr_spare_0 | ~spare_word_enable[0] & mem_way5_spare_0[set_c4]); | |
| 6608 | mem_way5_spare_1[set_c4] = (spare_word_enable[1] & wr_spare_1 | ~spare_word_enable[1] & mem_way5_spare_1[set_c4]); | |
| 6609 | end | |
| 6610 | else if(waysel_c4[6]) | |
| 6611 | begin | |
| 6612 | mem_lo0_way6[set_c4] =(worden_lo0[19:0] & wrd_lo0_a[19:0] | ~worden_lo0[19:0] & mem_lo0_way6[set_c4]); | |
| 6613 | mem_lo1_way6[set_c4] =(worden_lo1[18:0] & wrd_lo1_a[18:0] | ~worden_lo1[18:0] & mem_lo1_way6[set_c4]); | |
| 6614 | mem_hi0_way6[set_c4] =(worden_hi0[19:0] & wrd_hi0_a[19:0] | ~worden_hi0[19:0] & mem_hi0_way6[set_c4]); | |
| 6615 | mem_hi1_way6[set_c4] =(worden_hi1[18:0] & wrd_hi1_a[18:0] | ~worden_hi1[18:0] & mem_hi1_way6[set_c4]); | |
| 6616 | mem_way6_spare_0[set_c4] = (spare_word_enable[0] & wr_spare_0 | ~spare_word_enable[0] & mem_way6_spare_0[set_c4]); | |
| 6617 | mem_way6_spare_1[set_c4] = (spare_word_enable[1] & wr_spare_1 | ~spare_word_enable[1] & mem_way6_spare_1[set_c4]); | |
| 6618 | end | |
| 6619 | else if(waysel_c4[7]) | |
| 6620 | begin | |
| 6621 | mem_lo0_way7[set_c4] =(worden_lo0[19:0] & wrd_lo0_a[19:0] | ~worden_lo0[19:0] & mem_lo0_way7[set_c4]); | |
| 6622 | mem_lo1_way7[set_c4] =(worden_lo1[18:0] & wrd_lo1_a[18:0] | ~worden_lo1[18:0] & mem_lo1_way7[set_c4]); | |
| 6623 | mem_hi0_way7[set_c4] =(worden_hi0[19:0] & wrd_hi0_a[19:0] | ~worden_hi0[19:0] & mem_hi0_way7[set_c4]); | |
| 6624 | mem_hi1_way7[set_c4] =(worden_hi1[18:0] & wrd_hi1_a[18:0] | ~worden_hi1[18:0] & mem_hi1_way7[set_c4]); | |
| 6625 | mem_way7_spare_0[set_c4] = (spare_word_enable[0] & wr_spare_0 | ~spare_word_enable[0] & mem_way7_spare_0[set_c4]); | |
| 6626 | mem_way7_spare_1[set_c4] = (spare_word_enable[1] & wr_spare_1 | ~spare_word_enable[1] & mem_way7_spare_1[set_c4]); | |
| 6627 | end | |
| 6628 | end | |
| 6629 | end | |
| 6630 | ||
| 6631 | //always@(waysel_c4 or set_c4 or bnken_lat ) | |
| 6632 | always@(waysel_c4 or set_c4 or coloff_c4_l or vnw_ary) | |
| 6633 | ||
| 6634 | begin | |
| 6635 | ||
| 6636 | ||
| 6637 | #0 | |
| 6638 | ||
| 6639 | if(~coloff_c4_l & vnw_ary) | |
| 6640 | begin | |
| 6641 | if(waysel_c4[0]) | |
| 6642 | begin | |
| 6643 | saout_lo0_bc[19:0] <= mem_lo0_way0[set_c4]; | |
| 6644 | saout_lo1_bc[18:0] <= mem_lo1_way0[set_c4]; | |
| 6645 | saout_hi0_bc[19:0] <= mem_hi0_way0[set_c4]; | |
| 6646 | saout_hi1_bc[18:0] <= mem_hi1_way0[set_c4]; | |
| 6647 | rd_spare_0 <= mem_way0_spare_0[set_c4]; | |
| 6648 | rd_spare_1 <= mem_way0_spare_1[set_c4]; | |
| 6649 | end | |
| 6650 | else if(waysel_c4[1]) | |
| 6651 | begin | |
| 6652 | saout_lo0_bc[19:0] <= mem_lo0_way1[set_c4]; | |
| 6653 | saout_lo1_bc[18:0] <= mem_lo1_way1[set_c4]; | |
| 6654 | saout_hi0_bc[19:0] <= mem_hi0_way1[set_c4]; | |
| 6655 | saout_hi1_bc[18:0] <= mem_hi1_way1[set_c4]; | |
| 6656 | rd_spare_0 <= mem_way1_spare_0[set_c4]; | |
| 6657 | rd_spare_1 <= mem_way1_spare_1[set_c4]; | |
| 6658 | end | |
| 6659 | else if(waysel_c4[2]) | |
| 6660 | begin | |
| 6661 | saout_lo0_bc[19:0] <= mem_lo0_way2[set_c4]; | |
| 6662 | saout_lo1_bc[18:0] <= mem_lo1_way2[set_c4]; | |
| 6663 | saout_hi0_bc[19:0] <= mem_hi0_way2[set_c4]; | |
| 6664 | saout_hi1_bc[18:0] <= mem_hi1_way2[set_c4]; | |
| 6665 | rd_spare_0 <= mem_way2_spare_0[set_c4]; | |
| 6666 | rd_spare_1 <= mem_way2_spare_1[set_c4]; | |
| 6667 | end | |
| 6668 | else if(waysel_c4[3]) | |
| 6669 | begin | |
| 6670 | saout_lo0_bc[19:0] <= mem_lo0_way3[set_c4]; | |
| 6671 | saout_lo1_bc[18:0] <= mem_lo1_way3[set_c4]; | |
| 6672 | saout_hi0_bc[19:0] <= mem_hi0_way3[set_c4]; | |
| 6673 | saout_hi1_bc[18:0] <= mem_hi1_way3[set_c4]; | |
| 6674 | rd_spare_0 <= mem_way3_spare_0[set_c4]; | |
| 6675 | rd_spare_1 <= mem_way3_spare_1[set_c4]; | |
| 6676 | end | |
| 6677 | else if(waysel_c4[4]) | |
| 6678 | begin | |
| 6679 | saout_lo0_bc[19:0] <= mem_lo0_way4[set_c4]; | |
| 6680 | saout_lo1_bc[18:0] <= mem_lo1_way4[set_c4]; | |
| 6681 | saout_hi0_bc[19:0] <= mem_hi0_way4[set_c4]; | |
| 6682 | saout_hi1_bc[18:0] <= mem_hi1_way4[set_c4]; | |
| 6683 | rd_spare_0 <= mem_way4_spare_0[set_c4]; | |
| 6684 | rd_spare_1 <= mem_way4_spare_1[set_c4]; | |
| 6685 | end | |
| 6686 | else if(waysel_c4[5]) | |
| 6687 | begin | |
| 6688 | saout_lo0_bc[19:0] <= mem_lo0_way5[set_c4]; | |
| 6689 | saout_lo1_bc[18:0] <= mem_lo1_way5[set_c4]; | |
| 6690 | saout_hi0_bc[19:0] <= mem_hi0_way5[set_c4]; | |
| 6691 | saout_hi1_bc[18:0] <= mem_hi1_way5[set_c4]; | |
| 6692 | rd_spare_0 <= mem_way5_spare_0[set_c4]; | |
| 6693 | rd_spare_1 <= mem_way5_spare_1[set_c4]; | |
| 6694 | end | |
| 6695 | else if(waysel_c4[6]) | |
| 6696 | begin | |
| 6697 | saout_lo0_bc[19:0] <= mem_lo0_way6[set_c4]; | |
| 6698 | saout_lo1_bc[18:0] <= mem_lo1_way6[set_c4]; | |
| 6699 | saout_hi0_bc[19:0] <= mem_hi0_way6[set_c4]; | |
| 6700 | saout_hi1_bc[18:0] <= mem_hi1_way6[set_c4]; | |
| 6701 | rd_spare_0 <= mem_way6_spare_0[set_c4]; | |
| 6702 | rd_spare_1 <= mem_way6_spare_1[set_c4]; | |
| 6703 | end | |
| 6704 | else if(waysel_c4[7]) | |
| 6705 | begin | |
| 6706 | saout_lo0_bc[19:0] <= mem_lo0_way7[set_c4]; | |
| 6707 | saout_lo1_bc[18:0] <= mem_lo1_way7[set_c4]; | |
| 6708 | saout_hi0_bc[19:0] <= mem_hi0_way7[set_c4]; | |
| 6709 | saout_hi1_bc[18:0] <= mem_hi1_way7[set_c4]; | |
| 6710 | rd_spare_0 <= mem_way7_spare_0[set_c4]; | |
| 6711 | rd_spare_1 <= mem_way7_spare_1[set_c4]; | |
| 6712 | end | |
| 6713 | end | |
| 6714 | end | |
| 6715 | ||
| 6716 | ||
| 6717 | // READ | |
| 6718 | // Data is read out of the above array in c4 and gets registered and latched | |
| 6719 | // to become a c5b signal which gets muxed and goes to dmux | |
| 6720 | ||
| 6721 | ||
| 6722 | reg rd_spare_0_d_l,rd_spare_1_d_l; | |
| 6723 | reg rdd_spare_0,rdd_spare_1; | |
| 6724 | reg tstmodclk_c3b_l; | |
| 6725 | always@(posedge l1clk) | |
| 6726 | begin | |
| 6727 | saout_lo0_bc_d_l[19:0] <= ~saout_lo0_bc[19:0]; | |
| 6728 | saout_lo1_bc_d_l[18:0] <= ~saout_lo1_bc[18:0]; | |
| 6729 | saout_hi0_bc_d_l[19:0] <= ~saout_hi0_bc[19:0]; | |
| 6730 | saout_hi1_bc_d_l[18:0] <= ~saout_hi1_bc[18:0]; | |
| 6731 | rd_spare_0_d_l <= ~rd_spare_0; | |
| 6732 | rd_spare_1_d_l <= ~rd_spare_1; | |
| 6733 | end | |
| 6734 | ||
| 6735 | always@(negedge l1clk) | |
| 6736 | begin | |
| 6737 | saout_lo0_bc_c5b_l[19:0] <= saout_lo0_bc_d_l[19:0]; | |
| 6738 | saout_lo1_bc_c5b_l[18:0] <= saout_lo1_bc_d_l[18:0]; | |
| 6739 | saout_hi0_bc_c5b_l[19:0] <= saout_hi0_bc_d_l[19:0]; | |
| 6740 | saout_hi1_bc_c5b_l[18:0] <= saout_hi1_bc_d_l[18:0]; | |
| 6741 | rdd_spare_0 <= rd_spare_0_d_l; | |
| 6742 | rdd_spare_1 <= rd_spare_1_d_l; | |
| 6743 | tstmodclk_c3b_l <= tstmodclk_l; | |
| 6744 | end | |
| 6745 | ||
| 6746 | ||
| 6747 | assign rd_data[19:0] = | |
| 6748 | {rdd_spare_0, saout_lo1_bc_c5b_l[4], saout_hi0_bc_c5b_l[4],saout_lo0_bc_c5b_l[4], | |
| 6749 | saout_hi1_bc_c5b_l[3], saout_lo1_bc_c5b_l[3], saout_hi0_bc_c5b_l[3],saout_lo0_bc_c5b_l[3], | |
| 6750 | saout_hi1_bc_c5b_l[2], saout_lo1_bc_c5b_l[2], saout_hi0_bc_c5b_l[2],saout_lo0_bc_c5b_l[2], | |
| 6751 | saout_hi1_bc_c5b_l[1], saout_lo1_bc_c5b_l[1], saout_hi0_bc_c5b_l[1],saout_lo0_bc_c5b_l[1], | |
| 6752 | saout_hi1_bc_c5b_l[0], saout_lo1_bc_c5b_l[0], saout_hi0_bc_c5b_l[0],saout_lo0_bc_c5b_l[0]}; | |
| 6753 | ||
| 6754 | assign rd_data[39:20] = { | |
| 6755 | saout_lo1_bc_c5b_l[9], saout_hi0_bc_c5b_l[9],saout_lo0_bc_c5b_l[9], | |
| 6756 | saout_hi1_bc_c5b_l[8], saout_lo1_bc_c5b_l[8], saout_hi0_bc_c5b_l[8],saout_lo0_bc_c5b_l[8], | |
| 6757 | saout_hi1_bc_c5b_l[7], saout_lo1_bc_c5b_l[7], saout_hi0_bc_c5b_l[7],saout_lo0_bc_c5b_l[7], | |
| 6758 | saout_hi1_bc_c5b_l[6], saout_lo1_bc_c5b_l[6], saout_hi0_bc_c5b_l[6],saout_lo0_bc_c5b_l[6], | |
| 6759 | saout_hi1_bc_c5b_l[5], saout_lo1_bc_c5b_l[5], saout_hi0_bc_c5b_l[5],saout_lo0_bc_c5b_l[5], saout_hi1_bc_c5b_l[4]}; | |
| 6760 | ||
| 6761 | ||
| 6762 | assign rd_data[59:40] = { | |
| 6763 | saout_lo1_bc_c5b_l[14], saout_hi0_bc_c5b_l[14],saout_lo0_bc_c5b_l[14], | |
| 6764 | saout_hi1_bc_c5b_l[13], saout_lo1_bc_c5b_l[13], saout_hi0_bc_c5b_l[13],saout_lo0_bc_c5b_l[13], | |
| 6765 | saout_hi1_bc_c5b_l[12], saout_lo1_bc_c5b_l[12], saout_hi0_bc_c5b_l[12],saout_lo0_bc_c5b_l[12], | |
| 6766 | saout_hi1_bc_c5b_l[11], saout_lo1_bc_c5b_l[11], saout_hi0_bc_c5b_l[11],saout_lo0_bc_c5b_l[11], | |
| 6767 | saout_hi1_bc_c5b_l[10], saout_lo1_bc_c5b_l[10], saout_hi0_bc_c5b_l[10],saout_lo0_bc_c5b_l[10], saout_hi1_bc_c5b_l[9]}; | |
| 6768 | ||
| 6769 | assign rd_data[79:60] = { | |
| 6770 | saout_hi0_bc_c5b_l[19], saout_lo0_bc_c5b_l[19], | |
| 6771 | saout_hi1_bc_c5b_l[18], saout_lo1_bc_c5b_l[18], saout_hi0_bc_c5b_l[18],saout_lo0_bc_c5b_l[18], | |
| 6772 | saout_hi1_bc_c5b_l[17], saout_lo1_bc_c5b_l[17], saout_hi0_bc_c5b_l[17],saout_lo0_bc_c5b_l[17], | |
| 6773 | saout_hi1_bc_c5b_l[16], saout_lo1_bc_c5b_l[16], saout_hi0_bc_c5b_l[16],saout_lo0_bc_c5b_l[16], | |
| 6774 | saout_hi1_bc_c5b_l[15], saout_lo1_bc_c5b_l[15], saout_hi0_bc_c5b_l[15],saout_lo0_bc_c5b_l[15], saout_hi1_bc_c5b_l[14],rdd_spare_1}; | |
| 6775 | ||
| 6776 | ||
| 6777 | always@(cred_mod or rd_data) | |
| 6778 | begin | |
| 6779 | ||
| 6780 | for(i=0;i<19;i=i+1) | |
| 6781 | begin | |
| 6782 | read_data[i] = cred_mod[i] ? rd_data[i+1] : rd_data[i]; | |
| 6783 | end | |
| 6784 | ||
| 6785 | for(i=20;i<40;i=i+1) | |
| 6786 | begin | |
| 6787 | read_data[i] = cred_mod[i] ? rd_data[i-1] : rd_data[i]; | |
| 6788 | end | |
| 6789 | ||
| 6790 | ||
| 6791 | for(i=40;i<60;i=i+1) | |
| 6792 | begin | |
| 6793 | read_data[i] = cred_mod[i] ? rd_data[i+1] : rd_data[i]; | |
| 6794 | end | |
| 6795 | ||
| 6796 | for(i=61;i<80;i=i+1) | |
| 6797 | begin | |
| 6798 | read_data[i] = cred_mod[i] ? rd_data[i-1] : rd_data[i]; | |
| 6799 | end | |
| 6800 | ||
| 6801 | end | |
| 6802 | ||
| 6803 | ||
| 6804 | ||
| 6805 | assign { saout_hi0_b_out_l[19], saout_lo0_b_out_l[19], | |
| 6806 | saout_hi1_b_out_l[18], saout_lo1_b_out_l[18], saout_hi0_b_out_l[18],saout_lo0_b_out_l[18], | |
| 6807 | saout_hi1_b_out_l[17], saout_lo1_b_out_l[17], saout_hi0_b_out_l[17],saout_lo0_b_out_l[17], | |
| 6808 | saout_hi1_b_out_l[16], saout_lo1_b_out_l[16], saout_hi0_b_out_l[16],saout_lo0_b_out_l[16], | |
| 6809 | saout_hi1_b_out_l[15], saout_lo1_b_out_l[15], saout_hi0_b_out_l[15],saout_lo0_b_out_l[15], | |
| 6810 | saout_hi1_b_out_l[14]} = read_data[79:61]; | |
| 6811 | ||
| 6812 | assign {saout_lo1_b_out_l[14], saout_hi0_b_out_l[14],saout_lo0_b_out_l[14], | |
| 6813 | saout_hi1_b_out_l[13], saout_lo1_b_out_l[13], saout_hi0_b_out_l[13],saout_lo0_b_out_l[13], | |
| 6814 | saout_hi1_b_out_l[12], saout_lo1_b_out_l[12], saout_hi0_b_out_l[12],saout_lo0_b_out_l[12], | |
| 6815 | saout_hi1_b_out_l[11], saout_lo1_b_out_l[11], saout_hi0_b_out_l[11],saout_lo0_b_out_l[11], | |
| 6816 | saout_hi1_b_out_l[10], saout_lo1_b_out_l[10], saout_hi0_b_out_l[10],saout_lo0_b_out_l[10], | |
| 6817 | saout_hi1_b_out_l[9]} = read_data[59:40]; | |
| 6818 | ||
| 6819 | assign { saout_lo1_b_out_l[9], saout_hi0_b_out_l[9],saout_lo0_b_out_l[9], | |
| 6820 | saout_hi1_b_out_l[8], saout_lo1_b_out_l[8], saout_hi0_b_out_l[8],saout_lo0_b_out_l[8], | |
| 6821 | saout_hi1_b_out_l[7], saout_lo1_b_out_l[7], saout_hi0_b_out_l[7],saout_lo0_b_out_l[7], | |
| 6822 | saout_hi1_b_out_l[6], saout_lo1_b_out_l[6], saout_hi0_b_out_l[6],saout_lo0_b_out_l[6], | |
| 6823 | saout_hi1_b_out_l[5], saout_lo1_b_out_l[5], saout_hi0_b_out_l[5],saout_lo0_b_out_l[5], | |
| 6824 | saout_hi1_b_out_l[4]} = read_data[39:20]; | |
| 6825 | ||
| 6826 | assign {saout_lo1_b_out_l[4], saout_hi0_b_out_l[4],saout_lo0_b_out_l[4], | |
| 6827 | saout_hi1_b_out_l[3], saout_lo1_b_out_l[3], saout_hi0_b_out_l[3],saout_lo0_b_out_l[3], | |
| 6828 | saout_hi1_b_out_l[2], saout_lo1_b_out_l[2], saout_hi0_b_out_l[2],saout_lo0_b_out_l[2], | |
| 6829 | saout_hi1_b_out_l[1], saout_lo1_b_out_l[1], saout_hi0_b_out_l[1],saout_lo0_b_out_l[1], | |
| 6830 | saout_hi1_b_out_l[0], saout_lo1_b_out_l[0], saout_hi0_b_out_l[0],saout_lo0_b_out_l[0]} = read_data[18:0]; | |
| 6831 | ||
| 6832 | assign red_sel_rgt = |cred[19:18]; | |
| 6833 | assign red_sel_lft = |cred[59:58]; | |
| 6834 | ||
| 6835 | assign coloff_c5_rgt[1] = coloff_c5[1] | red_sel_rgt & coloff_c5[0]; | |
| 6836 | assign coloff_c5_rgt[0] = coloff_c5[0] | red_sel_rgt & coloff_c5[1]; | |
| 6837 | assign coloff_c5_lft[1] = coloff_c5[1] | red_sel_lft & coloff_c5[0]; | |
| 6838 | assign coloff_c5_lft[0] = coloff_c5[0] | red_sel_lft & coloff_c5[1]; | |
| 6839 | ||
| 6840 | ||
| 6841 | ||
| 6842 | ||
| 6843 | ||
| 6844 | ||
| 6845 | ||
| 6846 | ||
| 6847 | ||
| 6848 | ||
| 6849 | ||
| 6850 | always@(negedge l1clk) | |
| 6851 | begin | |
| 6852 | select_read_data_all_c5b <= (bank_select_c5 & ~(select_red_odd | select_red_even) & (|waysel_c5) & (|coloff_c5) & readen_c5 & wee_l & ~waysel_err_c4); | |
| 6853 | select_read_red_all_c5b <=(bank_select_c5 & (select_red_odd | select_red_even) & (|waysel_c5) & (|coloff_c5) & readen_c5 & wee_l & ~waysel_err_c4); | |
| 6854 | ||
| 6855 | select_read_data_c5b_hi_rgt <= (bank_select_c5 & ~(select_red_odd | select_red_even) & (|waysel_c5) & wee_l) & | |
| 6856 | (readen_c5 & coloff_c5_rgt[1] & ~waysel_err_c5); | |
| 6857 | select_read_data_c5b_hi_lft <= (bank_select_c5 & ~(select_red_odd | select_red_even) & (|waysel_c5) & wee_l) & | |
| 6858 | (readen_c5 & coloff_c5_lft[1] & ~waysel_err_c5); | |
| 6859 | select_read_data_c5b_lo_rgt <= (bank_select_c5 & ~(select_red_odd | select_red_even) & (|waysel_c5) & wee_l) & | |
| 6860 | (readen_c5 & coloff_c5_rgt[0] & ~waysel_err_c5); | |
| 6861 | select_read_data_c5b_lo_lft <= (bank_select_c5 & ~(select_red_odd | select_red_even) & (|waysel_c5) & wee_l) & | |
| 6862 | (readen_c5 & coloff_c5_lft[0] & ~waysel_err_c5); | |
| 6863 | select_read_red_c5b_hi_rgt <=(bank_select_c5 & (select_red_odd | select_red_even) & (|waysel_c5) & wee_l) & | |
| 6864 | (readen_c5 & coloff_c5_rgt[1] & ~waysel_err_c5); | |
| 6865 | select_read_red_c5b_hi_lft <=(bank_select_c5 & (select_red_odd | select_red_even) & (|waysel_c5) & wee_l) & | |
| 6866 | (readen_c5 & coloff_c5_lft[1] & ~waysel_err_c5); | |
| 6867 | select_read_red_c5b_lo_rgt <=(bank_select_c5 & (select_red_odd | select_red_even) & (|waysel_c5) & wee_l) & | |
| 6868 | (readen_c5 & coloff_c5_rgt[0] & ~waysel_err_c5); | |
| 6869 | select_read_red_c5b_lo_lft <=(bank_select_c5 & (select_red_odd | select_red_even) & (|waysel_c5) & wee_l) & | |
| 6870 | (readen_c5 & coloff_c5_lft[0] & ~waysel_err_c5); | |
| 6871 | end | |
| 6872 | ||
| 6873 | ||
| 6874 | //assign saout_lo0_bc_l[19:0] = select_read_data_c5b ? saout_lo0_bc_c5b_l[19:0] : | |
| 6875 | // select_read_red_c5b ? red_lo0_out[19:0] : 20'hFFFFF; | |
| 6876 | //assign saout_lo1_bc_l[18:0] = select_read_data_c5b ? saout_lo1_bc_c5b_l[18:0] : | |
| 6877 | // select_read_red_c5b ? red_lo1_out[18:0] : 19'h7FFFF; | |
| 6878 | //assign saout_hi0_bc_l[19:0] = select_read_data_c5b ? saout_hi0_bc_c5b_l[19:0] : | |
| 6879 | // select_read_red_c5b ? red_hi0_out[19:0] : 20'hFFFFF; | |
| 6880 | //assign saout_hi1_bc_l[18:0] = select_read_data_c5b ? saout_hi1_bc_c5b_l[18:0] : | |
| 6881 | // select_read_red_c5b ? red_hi1_out[18:0] : 19'h7FFFF; | |
| 6882 | // | |
| 6883 | always@(select_read_red_c5b_lo_rgt or select_read_red_c5b_lo_lft or select_read_red_c5b_hi_rgt or select_read_red_c5b_hi_lft or | |
| 6884 | select_read_data_c5b_lo_rgt or select_read_data_c5b_lo_lft or select_read_data_c5b_hi_rgt or select_read_data_c5b_hi_lft | |
| 6885 | or red_lo0_b_out_l or red_hi0_b_out_l or red_lo1_b_out_l or saout_hi1_b_out_l | |
| 6886 | or saout_lo0_b_out_l or red_hi0_b_out_l or saout_lo1_b_out_l or saout_hi1_b_out_l or tstmodclk_c3b_l or l1clk) | |
| 6887 | begin | |
| 6888 | ||
| 6889 | if(tstmodclk_c3b_l) | |
| 6890 | begin | |
| 6891 | saout_lo0_bc_l[9:0] = select_read_red_c5b_lo_rgt ? red_lo0_b_out_l[9:0] : | |
| 6892 | select_read_data_c5b_lo_rgt ? saout_lo0_b_out_l[9:0] : 10'h3FF; | |
| 6893 | saout_lo0_bc_l[19:10] = select_read_red_c5b_lo_lft ? red_lo0_b_out_l[19:10] : | |
| 6894 | select_read_data_c5b_lo_lft ? saout_lo0_b_out_l[19:10] : 10'h3FF; | |
| 6895 | saout_hi0_bc_l[9:0] = select_read_red_c5b_lo_rgt ? red_hi0_b_out_l[9:0] : | |
| 6896 | select_read_data_c5b_lo_rgt ? saout_hi0_b_out_l[9:0] : 10'h3FF; | |
| 6897 | saout_hi0_bc_l[19:10] = select_read_red_c5b_lo_lft ? red_hi0_b_out_l[19:10] : | |
| 6898 | select_read_data_c5b_lo_lft ? saout_hi0_b_out_l[19:10] : 10'h3FF; | |
| 6899 | saout_lo1_bc_l[9:0] = select_read_red_c5b_hi_rgt ? red_lo1_b_out_l[9:0] : | |
| 6900 | select_read_data_c5b_hi_rgt ? saout_lo1_b_out_l[9:0] : 10'h3FF; | |
| 6901 | saout_lo1_bc_l[18:10] = select_read_red_c5b_hi_lft ? red_lo1_b_out_l[18:10] : | |
| 6902 | select_read_data_c5b_hi_lft ? saout_lo1_b_out_l[18:10] : 9'h1FF; | |
| 6903 | saout_hi1_bc_l[8:0] = select_read_red_c5b_hi_rgt ? red_hi1_b_out_l[8:0] : | |
| 6904 | select_read_data_c5b_hi_rgt ? saout_hi1_b_out_l[8:0] : 9'h1FF; | |
| 6905 | saout_hi1_bc_l[18:9] = select_read_red_c5b_hi_lft ? red_hi1_b_out_l[18:9] : | |
| 6906 | select_read_data_c5b_hi_lft ? saout_hi1_b_out_l[18:9] : 10'h3FF; | |
| 6907 | end | |
| 6908 | else | |
| 6909 | begin | |
| 6910 | saout_lo0_bc_l[19:0] = select_read_red_all_c5b ? red_lo0_b_out_l[19:0] : | |
| 6911 | select_read_data_all_c5b ? saout_lo0_b_out_l[19:0] : 20'bx; | |
| 6912 | saout_hi0_bc_l[19:0] = select_read_red_all_c5b ? red_hi0_b_out_l[19:0] : | |
| 6913 | select_read_data_all_c5b ? saout_hi0_b_out_l[19:0] : 20'bx; | |
| 6914 | saout_lo1_bc_l[18:0] = select_read_red_all_c5b ? red_lo1_b_out_l[18:0] : | |
| 6915 | select_read_data_all_c5b ? saout_lo1_b_out_l[18:0] : 19'bx; | |
| 6916 | saout_hi1_bc_l[18:0] = select_read_red_all_c5b ? red_hi1_b_out_l[18:0] : | |
| 6917 | select_read_data_all_c5b ? saout_hi1_b_out_l[18:0] : 19'bx; | |
| 6918 | ||
| 6919 | //saout_lo0_bc_l[19:0] = select_read_data_all_c5b ? saout_lo0_bc_c5b_l[19:0] : 20'hFFFFF; | |
| 6920 | //saout_lo1_bc_l[18:0] = select_read_data_all_c5b ? saout_lo1_bc_c5b_l[18:0] : 19'hFFFFF; | |
| 6921 | //saout_hi0_bc_l[19:0] = select_read_data_all_c5b ? saout_hi0_bc_c5b_l[19:0] : 20'hFFFFF; | |
| 6922 | //saout_hi1_bc_l[18:0] = select_read_data_all_c5b ? saout_hi1_bc_c5b_l[18:0] : 19'hFFFFF; | |
| 6923 | end | |
| 6924 | end | |
| 6925 | ||
| 6926 | ||
| 6927 | //assign repair_saout_lo0_bc_l[9:0] = | |
| 6928 | //select_read_red_c5b_lo_rgt ? red_lo0_b_out_l[9:0] : select_read_data_c5b_lo_rgt ? saout_lo0_b_out_l[9:0] : 10'h3FF ; | |
| 6929 | //assign repair_saout_lo0_bc_l[19:10] = | |
| 6930 | //select_read_red_c5b_lo_lft ? red_lo0_b_out_l[19:10] : select_read_data_c5b_lo_lft ? saout_lo0_b_out_l[19:10] : 10'h3FF ; | |
| 6931 | //assign repair_saout_hi0_bc_l[9:0] = | |
| 6932 | //select_read_red_c5b_lo_rgt ? red_hi0_b_out_l[9:0] : select_read_data_c5b_lo_rgt ? saout_hi0_b_out_l[9:0] : 10'h3FF ; | |
| 6933 | //assign repair_saout_hi0_bc_l[19:10] = | |
| 6934 | //select_read_red_c5b_lo_lft ? red_hi0_b_out_l[19:10] : select_read_data_c5b_lo_lft ? saout_hi0_b_out_l[19:10] : 10'h3FF ; | |
| 6935 | //assign repair_saout_lo1_bc_l[9:0] = | |
| 6936 | //select_read_red_c5b_hi_rgt ? red_lo1_b_out_l[9:0] : select_read_data_c5b_hi_rgt ? saout_lo1_b_out_l[9:0] : 10'h3FF ; | |
| 6937 | //assign repair_saout_lo1_bc_l[18:10] = | |
| 6938 | //select_read_red_c5b_hi_lft ? red_lo1_b_out_l[18:10] : select_read_data_c5b_hi_lft ? saout_lo1_b_out_l[18:10] : 9'h1FF ; | |
| 6939 | //assign repair_saout_hi1_bc_l[8:0] = | |
| 6940 | //select_read_red_c5b_hi_rgt ? red_hi1_b_out_l[8:0] : select_read_data_c5b_hi_rgt ? saout_hi1_b_out_l[8:0] : 9'h1FF ; | |
| 6941 | //assign repair_saout_hi1_bc_l[18:9] = | |
| 6942 | //select_read_red_c5b_hi_lft ? red_hi1_b_out_l[18:9] : select_read_data_c5b_hi_lft ? saout_hi1_b_out_l[18:9] : 10'h3FF ; | |
| 6943 | // | |
| 6944 | // | |
| 6945 | //assign norepair_saout_lo0_bc_l[19:0] = select_read_data_all_c5b ? saout_lo0_bc_c5b_l[19:0] : 20'hFFFFF; | |
| 6946 | //assign norepair_saout_lo1_bc_l[18:0] = select_read_data_all_c5b ? saout_lo1_bc_c5b_l[18:0] : 19'hFFFFF; | |
| 6947 | //assign norepair_saout_hi0_bc_l[19:0] = select_read_data_all_c5b ? saout_hi0_bc_c5b_l[19:0] : 20'hFFFFF; | |
| 6948 | //assign norepair_saout_hi1_bc_l[18:0] = select_read_data_all_c5b ? saout_hi1_bc_c5b_l[18:0] : 19'hFFFFF; | |
| 6949 | // | |
| 6950 | //`endif | |
| 6951 | // | |
| 6952 | //`ifdef AXIS_SMEM | |
| 6953 | // | |
| 6954 | // always@(negedge l1clk) | |
| 6955 | // begin | |
| 6956 | // axis_saout_lo0_bc[19:0] = saout_lo0_bc[19:0]; | |
| 6957 | // axis_saout_lo1_bc[18:0] = saout_lo1_bc[18:0]; | |
| 6958 | // axis_saout_hi0_bc[19:0] = saout_hi0_bc[19:0]; | |
| 6959 | // axis_saout_hi1_bc[18:0] = saout_hi1_bc[18:0]; | |
| 6960 | // end | |
| 6961 | // assign saout_lo0_bc_l[19:0] = axis_select_read_data_c5b ? axis_saout_lo0_bc[19:0] : 20'hFFFFF; | |
| 6962 | // assign saout_lo1_bc_l[18:0] = axis_select_read_data_c5b ? axis_saout_lo1_bc[18:0] : 19'h7FFFF; | |
| 6963 | // assign saout_hi0_bc_l[19:0] = axis_select_read_data_c5b ? axis_saout_hi0_bc[19:0] : 20'hFFFFF; | |
| 6964 | // assign saout_hi1_bc_l[18:0] = axis_select_read_data_c5b ? axis_saout_hi1_bc[18:0] : 19'h7FFFF; | |
| 6965 | // | |
| 6966 | //`else | |
| 6967 | //assign saout_lo0_bc_l[19:0] = ~tstmodclk_c3b_l ? repair_saout_lo0_bc_l[19:0] : norepair_saout_lo0_bc_l[19:0]; | |
| 6968 | //assign saout_lo1_bc_l[18:0] = ~tstmodclk_c3b_l ? repair_saout_lo1_bc_l[18:0] : norepair_saout_lo1_bc_l[18:0]; | |
| 6969 | //assign saout_hi0_bc_l[19:0] = ~tstmodclk_c3b_l ? repair_saout_hi0_bc_l[19:0] : norepair_saout_hi0_bc_l[19:0]; | |
| 6970 | //assign saout_hi1_bc_l[18:0] = ~tstmodclk_c3b_l ? repair_saout_hi1_bc_l[18:0] : norepair_saout_hi1_bc_l[18:0]; | |
| 6971 | ||
| 6972 | /////////////////////////////////////////////////////////////////////////////////////////////// | |
| 6973 | ||
| 6974 | // REDUDANCY | |
| 6975 | ||
| 6976 | reg [19:0] red_lo0_odd_0; | |
| 6977 | reg [18:0] red_lo1_odd_0; | |
| 6978 | reg [19:0] red_hi0_odd_0; | |
| 6979 | reg [18:0] red_hi1_odd_0; | |
| 6980 | reg [19:0] red_lo0_even_0; | |
| 6981 | reg [18:0] red_lo1_even_0; | |
| 6982 | reg [19:0] red_hi0_even_0; | |
| 6983 | reg [18:0] red_hi1_even_0; | |
| 6984 | reg redrow_way0_spare_odd_0; | |
| 6985 | reg redrow_way0_spare_even_0; | |
| 6986 | reg redrow_way0_spare_odd_1; | |
| 6987 | reg redrow_way0_spare_even_1; | |
| 6988 | ||
| 6989 | reg [19:0] red_lo0_odd_1; | |
| 6990 | reg [18:0] red_lo1_odd_1; | |
| 6991 | reg [19:0] red_hi0_odd_1; | |
| 6992 | reg [18:0] red_hi1_odd_1; | |
| 6993 | reg [19:0] red_lo0_even_1; | |
| 6994 | reg [18:0] red_lo1_even_1; | |
| 6995 | reg [19:0] red_hi0_even_1; | |
| 6996 | reg [18:0] red_hi1_even_1; | |
| 6997 | reg redrow_way1_spare_odd_0; | |
| 6998 | reg redrow_way1_spare_even_0; | |
| 6999 | reg redrow_way1_spare_odd_1; | |
| 7000 | reg redrow_way1_spare_even_1; | |
| 7001 | ||
| 7002 | reg [19:0] red_lo0_odd_2; | |
| 7003 | reg [18:0] red_lo1_odd_2; | |
| 7004 | reg [19:0] red_hi0_odd_2; | |
| 7005 | reg [18:0] red_hi1_odd_2; | |
| 7006 | reg [19:0] red_lo0_even_2; | |
| 7007 | reg [18:0] red_lo1_even_2; | |
| 7008 | reg [19:0] red_hi0_even_2; | |
| 7009 | reg [18:0] red_hi1_even_2; | |
| 7010 | reg redrow_way2_spare_odd_0; | |
| 7011 | reg redrow_way2_spare_even_0; | |
| 7012 | reg redrow_way2_spare_odd_1; | |
| 7013 | reg redrow_way2_spare_even_1; | |
| 7014 | ||
| 7015 | reg [19:0] red_lo0_odd_3; | |
| 7016 | reg [18:0] red_lo1_odd_3; | |
| 7017 | reg [19:0] red_hi0_odd_3; | |
| 7018 | reg [18:0] red_hi1_odd_3; | |
| 7019 | reg [19:0] red_lo0_even_3; | |
| 7020 | reg [18:0] red_lo1_even_3; | |
| 7021 | reg [19:0] red_hi0_even_3; | |
| 7022 | reg [18:0] red_hi1_even_3; | |
| 7023 | reg redrow_way3_spare_odd_0; | |
| 7024 | reg redrow_way3_spare_even_0; | |
| 7025 | reg redrow_way3_spare_odd_1; | |
| 7026 | reg redrow_way3_spare_even_1; | |
| 7027 | ||
| 7028 | reg [19:0] red_lo0_odd_4; | |
| 7029 | reg [18:0] red_lo1_odd_4; | |
| 7030 | reg [19:0] red_hi0_odd_4; | |
| 7031 | reg [18:0] red_hi1_odd_4; | |
| 7032 | reg [19:0] red_lo0_even_4; | |
| 7033 | reg [18:0] red_lo1_even_4; | |
| 7034 | reg [19:0] red_hi0_even_4; | |
| 7035 | reg [18:0] red_hi1_even_4; | |
| 7036 | reg redrow_way4_spare_odd_0; | |
| 7037 | reg redrow_way4_spare_even_0; | |
| 7038 | reg redrow_way4_spare_odd_1; | |
| 7039 | reg redrow_way4_spare_even_1; | |
| 7040 | ||
| 7041 | reg [19:0] red_lo0_odd_5; | |
| 7042 | reg [18:0] red_lo1_odd_5; | |
| 7043 | reg [19:0] red_hi0_odd_5; | |
| 7044 | reg [18:0] red_hi1_odd_5; | |
| 7045 | reg [19:0] red_lo0_even_5; | |
| 7046 | reg [18:0] red_lo1_even_5; | |
| 7047 | reg [19:0] red_hi0_even_5; | |
| 7048 | reg [18:0] red_hi1_even_5; | |
| 7049 | reg redrow_way5_spare_odd_0; | |
| 7050 | reg redrow_way5_spare_even_0; | |
| 7051 | reg redrow_way5_spare_odd_1; | |
| 7052 | reg redrow_way5_spare_even_1; | |
| 7053 | ||
| 7054 | reg [19:0] red_lo0_odd_6; | |
| 7055 | reg [18:0] red_lo1_odd_6; | |
| 7056 | reg [19:0] red_hi0_odd_6; | |
| 7057 | reg [18:0] red_hi1_odd_6; | |
| 7058 | reg [19:0] red_lo0_even_6; | |
| 7059 | reg [18:0] red_lo1_even_6; | |
| 7060 | reg [19:0] red_hi0_even_6; | |
| 7061 | reg [18:0] red_hi1_even_6; | |
| 7062 | reg redrow_way6_spare_odd_0; | |
| 7063 | reg redrow_way6_spare_even_0; | |
| 7064 | reg redrow_way6_spare_odd_1; | |
| 7065 | reg redrow_way6_spare_even_1; | |
| 7066 | ||
| 7067 | reg [19:0] red_lo0_odd_7; | |
| 7068 | reg [18:0] red_lo1_odd_7; | |
| 7069 | reg [19:0] red_hi0_odd_7; | |
| 7070 | reg [18:0] red_hi1_odd_7; | |
| 7071 | reg [19:0] red_lo0_even_7; | |
| 7072 | reg [18:0] red_lo1_even_7; | |
| 7073 | reg [19:0] red_hi0_even_7; | |
| 7074 | reg [18:0] red_hi1_even_7; | |
| 7075 | reg redrow_way7_spare_odd_0; | |
| 7076 | reg redrow_way7_spare_even_0; | |
| 7077 | reg redrow_way7_spare_odd_1; | |
| 7078 | reg redrow_way7_spare_even_1; | |
| 7079 | ||
| 7080 | ||
| 7081 | ||
| 7082 | reg [19:0] red_lo0_out_bc; | |
| 7083 | reg [18:0] red_lo1_out_bc; | |
| 7084 | reg [19:0] red_hi0_out_bc; | |
| 7085 | reg [18:0] red_hi1_out_bc; | |
| 7086 | reg redrow_rd_spare_0; | |
| 7087 | reg redrow_rd_spare_1; | |
| 7088 | ||
| 7089 | reg [19:0] red_lo0_out_bc_d_l; | |
| 7090 | reg [18:0] red_lo1_out_bc_d_l; | |
| 7091 | reg [19:0] red_hi0_out_bc_d_l; | |
| 7092 | reg [18:0] red_hi1_out_bc_d_l; | |
| 7093 | reg redrow_rd_spare_0_d_l; | |
| 7094 | reg redrow_rd_spare_1_d_l; | |
| 7095 | ||
| 7096 | reg [19:0] red_lo0_bc_c5b_l; | |
| 7097 | reg [19:0] red_hi0_bc_c5b_l; | |
| 7098 | reg [18:0] red_lo1_bc_c5b_l; | |
| 7099 | reg [18:0] red_hi1_bc_c5b_l; | |
| 7100 | reg redrow_rdd_spare_0; | |
| 7101 | reg redrow_rdd_spare_1; | |
| 7102 | ||
| 7103 | wire [79:0] red_rd_data; | |
| 7104 | reg [79:0] red_read_data; | |
| 7105 | ||
| 7106 | // Folloing 2 assigns detects a red index to hit with incoming index | |
| 7107 | // and assert. While writing and reading the way info is looked at | |
| 7108 | ||
| 7109 | assign select_red_odd = (red_adr[9:8] == 2'b11) & (red_adr[7:1] == set_c3b[7:1]) | |
| 7110 | & set_c3b[0] & red_adr[0]; | |
| 7111 | assign select_red_even = (red_adr[9:8] == 2'b11) & (red_adr[7:1] == set_c3b[7:1]) | |
| 7112 | & ~set_c3b[0] & ~red_adr[0]; | |
| 7113 | ||
| 7114 | ||
| 7115 | always@(wee_l or l1clk or wen_c4 or set_c4 or waysel_c4 or waysel_err_c4 or bank_select or coloff_c4 or worden_c4 or | |
| 7116 | select_red_odd or select_red_even or worden_lo0 or worden_hi0 or worden_lo1 or worden_hi1 or wrd_lo0_a | |
| 7117 | or wrd_hi0_a or wrd_lo1_a or wrd_hi1_a or wr_spare_0 or wr_spare_1 or spare_word_enable or vnw_ary) | |
| 7118 | begin | |
| 7119 | // Odd row to be written | |
| 7120 | if(~l1clk & wee_l & wen_c4 & select_red_odd & ~waysel_err_c4 & bank_select & coloff_c4 & (|worden_c4) & vnw_ary) | |
| 7121 | begin | |
| 7122 | if(waysel_c4[0]) | |
| 7123 | begin | |
| 7124 | red_lo0_odd_0 <= (worden_lo0[19:0] & wrd_lo0_a[19:0] | ~worden_lo0[19:0] & red_lo0_odd_0); | |
| 7125 | red_hi0_odd_0 <= (worden_hi0[19:0] & wrd_hi0_a[19:0] | ~worden_hi0[19:0] & red_hi0_odd_0); | |
| 7126 | red_lo1_odd_0 <= (worden_lo1[18:0] & wrd_lo1_a[18:0] | ~worden_lo1[18:0] & red_lo1_odd_0); | |
| 7127 | red_hi1_odd_0 <= (worden_hi1[18:0] & wrd_hi1_a[18:0] | ~worden_hi1[18:0] & red_hi1_odd_0); | |
| 7128 | redrow_way0_spare_odd_0 <= (spare_word_enable[0] & wr_spare_0 | ~spare_word_enable[0] & redrow_way0_spare_odd_0); | |
| 7129 | redrow_way0_spare_odd_1 <= (spare_word_enable[1] & wr_spare_1 | ~spare_word_enable[1] & redrow_way0_spare_odd_1); | |
| 7130 | end | |
| 7131 | else if(waysel_c4[1]) | |
| 7132 | begin | |
| 7133 | red_lo0_odd_1 <= (worden_lo0[19:0] & wrd_lo0_a[19:0] | ~worden_lo0[19:0] & red_lo0_odd_1); | |
| 7134 | red_hi0_odd_1 <= (worden_hi0[19:0] & wrd_hi0_a[19:0] | ~worden_hi0[19:0] & red_hi0_odd_1); | |
| 7135 | red_lo1_odd_1 <= (worden_lo1[18:0] & wrd_lo1_a[18:0] | ~worden_lo1[18:0] & red_lo1_odd_1); | |
| 7136 | red_hi1_odd_1 <= (worden_hi1[18:0] & wrd_hi1_a[18:0] | ~worden_hi1[18:0] & red_hi1_odd_1); | |
| 7137 | redrow_way1_spare_odd_0 <= (spare_word_enable[0] & wr_spare_0 | ~spare_word_enable[0] & redrow_way1_spare_odd_0); | |
| 7138 | redrow_way1_spare_odd_1 <= (spare_word_enable[1] & wr_spare_1 | ~spare_word_enable[1] & redrow_way1_spare_odd_1); | |
| 7139 | end | |
| 7140 | else if(waysel_c4[2]) | |
| 7141 | begin | |
| 7142 | red_lo0_odd_2 <= (worden_lo0[19:0] & wrd_lo0_a[19:0] | ~worden_lo0[19:0] & red_lo0_odd_2); | |
| 7143 | red_hi0_odd_2 <= (worden_hi0[19:0] & wrd_hi0_a[19:0] | ~worden_hi0[19:0] & red_hi0_odd_2); | |
| 7144 | red_lo1_odd_2 <= (worden_lo1[18:0] & wrd_lo1_a[18:0] | ~worden_lo1[18:0] & red_lo1_odd_2); | |
| 7145 | red_hi1_odd_2 <= (worden_hi1[18:0] & wrd_hi1_a[18:0] | ~worden_hi1[18:0] & red_hi1_odd_2); | |
| 7146 | redrow_way2_spare_odd_0 <= (spare_word_enable[0] & wr_spare_0 | ~spare_word_enable[0] & redrow_way2_spare_odd_0); | |
| 7147 | redrow_way2_spare_odd_1 <= (spare_word_enable[1] & wr_spare_1 | ~spare_word_enable[1] & redrow_way2_spare_odd_1); | |
| 7148 | end | |
| 7149 | else if(waysel_c4[3]) | |
| 7150 | begin | |
| 7151 | red_lo0_odd_3 <= (worden_lo0[19:0] & wrd_lo0_a[19:0] | ~worden_lo0[19:0] & red_lo0_odd_3); | |
| 7152 | red_hi0_odd_3 <= (worden_hi0[19:0] & wrd_hi0_a[19:0] | ~worden_hi0[19:0] & red_hi0_odd_3); | |
| 7153 | red_lo1_odd_3 <= (worden_lo1[18:0] & wrd_lo1_a[18:0] | ~worden_lo1[18:0] & red_lo1_odd_3); | |
| 7154 | red_hi1_odd_3 <= (worden_hi1[18:0] & wrd_hi1_a[18:0] | ~worden_hi1[18:0] & red_hi1_odd_3); | |
| 7155 | redrow_way3_spare_odd_0 <= (spare_word_enable[0] & wr_spare_0 | ~spare_word_enable[0] & redrow_way3_spare_odd_0); | |
| 7156 | redrow_way3_spare_odd_1 <= (spare_word_enable[1] & wr_spare_1 | ~spare_word_enable[1] & redrow_way3_spare_odd_1); | |
| 7157 | end | |
| 7158 | else if(waysel_c4[4]) | |
| 7159 | begin | |
| 7160 | red_lo0_odd_4 <= (worden_lo0[19:0] & wrd_lo0_a[19:0] | ~worden_lo0[19:0] & red_lo0_odd_4); | |
| 7161 | red_hi0_odd_4 <= (worden_hi0[19:0] & wrd_hi0_a[19:0] | ~worden_hi0[19:0] & red_hi0_odd_4); | |
| 7162 | red_lo1_odd_4 <= (worden_lo1[18:0] & wrd_lo1_a[18:0] | ~worden_lo1[18:0] & red_lo1_odd_4); | |
| 7163 | red_hi1_odd_4 <= (worden_hi1[18:0] & wrd_hi1_a[18:0] | ~worden_hi1[18:0] & red_hi1_odd_4); | |
| 7164 | redrow_way4_spare_odd_0 <= (spare_word_enable[0] & wr_spare_0 | ~spare_word_enable[0] & redrow_way4_spare_odd_0); | |
| 7165 | redrow_way4_spare_odd_1 <= (spare_word_enable[1] & wr_spare_1 | ~spare_word_enable[1] & redrow_way4_spare_odd_1); | |
| 7166 | end | |
| 7167 | else if(waysel_c4[5]) | |
| 7168 | begin | |
| 7169 | red_lo0_odd_5 <= (worden_lo0[19:0] & wrd_lo0_a[19:0] | ~worden_lo0[19:0] & red_lo0_odd_5); | |
| 7170 | red_hi0_odd_5 <= (worden_hi0[19:0] & wrd_hi0_a[19:0] | ~worden_hi0[19:0] & red_hi0_odd_5); | |
| 7171 | red_lo1_odd_5 <= (worden_lo1[18:0] & wrd_lo1_a[18:0] | ~worden_lo1[18:0] & red_lo1_odd_5); | |
| 7172 | red_hi1_odd_5 <= (worden_hi1[18:0] & wrd_hi1_a[18:0] | ~worden_hi1[18:0] & red_hi1_odd_5); | |
| 7173 | redrow_way5_spare_odd_0 <= (spare_word_enable[0] & wr_spare_0 | ~spare_word_enable[0] & redrow_way5_spare_odd_0); | |
| 7174 | redrow_way5_spare_odd_1 <= (spare_word_enable[1] & wr_spare_1 | ~spare_word_enable[1] & redrow_way5_spare_odd_1); | |
| 7175 | end | |
| 7176 | else if(waysel_c4[6]) | |
| 7177 | begin | |
| 7178 | red_lo0_odd_6 <= (worden_lo0[19:0] & wrd_lo0_a[19:0] | ~worden_lo0[19:0] & red_lo0_odd_6); | |
| 7179 | red_hi0_odd_6 <= (worden_hi0[19:0] & wrd_hi0_a[19:0] | ~worden_hi0[19:0] & red_hi0_odd_6); | |
| 7180 | red_lo1_odd_6 <= (worden_lo1[18:0] & wrd_lo1_a[18:0] | ~worden_lo1[18:0] & red_lo1_odd_6); | |
| 7181 | red_hi1_odd_6 <= (worden_hi1[18:0] & wrd_hi1_a[18:0] | ~worden_hi1[18:0] & red_hi1_odd_6); | |
| 7182 | redrow_way6_spare_odd_0 <= (spare_word_enable[0] & wr_spare_0 | ~spare_word_enable[0] & redrow_way6_spare_odd_0); | |
| 7183 | redrow_way6_spare_odd_1 <= (spare_word_enable[1] & wr_spare_1 | ~spare_word_enable[1] & redrow_way6_spare_odd_1); | |
| 7184 | end | |
| 7185 | else if(waysel_c4[7]) | |
| 7186 | begin | |
| 7187 | red_lo0_odd_7 <= (worden_lo0[19:0] & wrd_lo0_a[19:0] | ~worden_lo0[19:0] & red_lo0_odd_7); | |
| 7188 | red_hi0_odd_7 <= (worden_hi0[19:0] & wrd_hi0_a[19:0] | ~worden_hi0[19:0] & red_hi0_odd_7); | |
| 7189 | red_lo1_odd_7 <= (worden_lo1[18:0] & wrd_lo1_a[18:0] | ~worden_lo1[18:0] & red_lo1_odd_7); | |
| 7190 | red_hi1_odd_7 <= (worden_hi1[18:0] & wrd_hi1_a[18:0] | ~worden_hi1[18:0] & red_hi1_odd_7); | |
| 7191 | redrow_way7_spare_odd_0 <= (spare_word_enable[0] & wr_spare_0 | ~spare_word_enable[0] & redrow_way7_spare_odd_0); | |
| 7192 | redrow_way7_spare_odd_1 <= (spare_word_enable[1] & wr_spare_1 | ~spare_word_enable[1] & redrow_way7_spare_odd_1); | |
| 7193 | end | |
| 7194 | end | |
| 7195 | ||
| 7196 | ||
| 7197 | // Even rows to be written | |
| 7198 | if(~l1clk & wee_l & wen_c4 & select_red_even & ~waysel_err_c4 & bank_select & coloff_c4 & (|worden_c4) & vnw_ary) | |
| 7199 | begin | |
| 7200 | if(waysel_c4[0]) | |
| 7201 | begin | |
| 7202 | red_lo0_even_0 <= (worden_lo0[19:0] & wrd_lo0_a[19:0] | ~worden_lo0[19:0] & red_lo0_even_0); | |
| 7203 | red_hi0_even_0 <= (worden_hi0[19:0] & wrd_hi0_a[19:0] | ~worden_hi0[19:0] & red_hi0_even_0); | |
| 7204 | red_lo1_even_0 <= (worden_lo1[18:0] & wrd_lo1_a[18:0] | ~worden_lo1[18:0] & red_lo1_even_0); | |
| 7205 | red_hi1_even_0 <= (worden_hi1[18:0] & wrd_hi1_a[18:0] | ~worden_hi1[18:0] & red_hi1_even_0); | |
| 7206 | redrow_way0_spare_even_0 <= (spare_word_enable[0] & wr_spare_0 | ~spare_word_enable[0] & redrow_way0_spare_even_0); | |
| 7207 | redrow_way0_spare_even_1 <= (spare_word_enable[1] & wr_spare_1 | ~spare_word_enable[1] & redrow_way0_spare_even_1); | |
| 7208 | end | |
| 7209 | else if(waysel_c4[1]) | |
| 7210 | begin | |
| 7211 | red_lo0_even_1 <= (worden_lo0[19:0] & wrd_lo0_a[19:0] | ~worden_lo0[19:0] & red_lo0_even_1); | |
| 7212 | red_hi0_even_1 <= (worden_hi0[19:0] & wrd_hi0_a[19:0] | ~worden_hi0[19:0] & red_hi0_even_1); | |
| 7213 | red_lo1_even_1 <= (worden_lo1[18:0] & wrd_lo1_a[18:0] | ~worden_lo1[18:0] & red_lo1_even_1); | |
| 7214 | red_hi1_even_1 <= (worden_hi1[18:0] & wrd_hi1_a[18:0] | ~worden_hi1[18:0] & red_hi1_even_1); | |
| 7215 | redrow_way1_spare_even_0 <= (spare_word_enable[0] & wr_spare_0 | ~spare_word_enable[0] & redrow_way1_spare_even_0); | |
| 7216 | redrow_way1_spare_even_1 <= (spare_word_enable[1] & wr_spare_1 | ~spare_word_enable[1] & redrow_way1_spare_even_1); | |
| 7217 | end | |
| 7218 | else if(waysel_c4[2]) | |
| 7219 | begin | |
| 7220 | red_lo0_even_2 <= (worden_lo0[19:0] & wrd_lo0_a[19:0] | ~worden_lo0[19:0] & red_lo0_even_2); | |
| 7221 | red_hi0_even_2 <= (worden_hi0[19:0] & wrd_hi0_a[19:0] | ~worden_hi0[19:0] & red_hi0_even_2); | |
| 7222 | red_lo1_even_2 <= (worden_lo1[18:0] & wrd_lo1_a[18:0] | ~worden_lo1[18:0] & red_lo1_even_2); | |
| 7223 | red_hi1_even_2 <= (worden_hi1[18:0] & wrd_hi1_a[18:0] | ~worden_hi1[18:0] & red_hi1_even_2); | |
| 7224 | redrow_way2_spare_even_0 <= (spare_word_enable[0] & wr_spare_0 | ~spare_word_enable[0] & redrow_way2_spare_even_0); | |
| 7225 | redrow_way2_spare_even_1 <= (spare_word_enable[1] & wr_spare_1 | ~spare_word_enable[1] & redrow_way2_spare_even_1); | |
| 7226 | end | |
| 7227 | else if(waysel_c4[3]) | |
| 7228 | begin | |
| 7229 | red_lo0_even_3 <= (worden_lo0[19:0] & wrd_lo0_a[19:0] | ~worden_lo0[19:0] & red_lo0_even_3); | |
| 7230 | red_hi0_even_3 <= (worden_hi0[19:0] & wrd_hi0_a[19:0] | ~worden_hi0[19:0] & red_hi0_even_3); | |
| 7231 | red_lo1_even_3 <= (worden_lo1[18:0] & wrd_lo1_a[18:0] | ~worden_lo1[18:0] & red_lo1_even_3); | |
| 7232 | red_hi1_even_3 <= (worden_hi1[18:0] & wrd_hi1_a[18:0] | ~worden_hi1[18:0] & red_hi1_even_3); | |
| 7233 | redrow_way3_spare_even_0 <= (spare_word_enable[0] & wr_spare_0 | ~spare_word_enable[0] & redrow_way3_spare_even_0); | |
| 7234 | redrow_way3_spare_even_1 <= (spare_word_enable[1] & wr_spare_1 | ~spare_word_enable[1] & redrow_way3_spare_even_1); | |
| 7235 | end | |
| 7236 | else if(waysel_c4[4]) | |
| 7237 | begin | |
| 7238 | red_lo0_even_4 <= (worden_lo0[19:0] & wrd_lo0_a[19:0] | ~worden_lo0[19:0] & red_lo0_even_4); | |
| 7239 | red_hi0_even_4 <= (worden_hi0[19:0] & wrd_hi0_a[19:0] | ~worden_hi0[19:0] & red_hi0_even_4); | |
| 7240 | red_lo1_even_4 <= (worden_lo1[18:0] & wrd_lo1_a[18:0] | ~worden_lo1[18:0] & red_lo1_even_4); | |
| 7241 | red_hi1_even_4 <= (worden_hi1[18:0] & wrd_hi1_a[18:0] | ~worden_hi1[18:0] & red_hi1_even_4); | |
| 7242 | redrow_way4_spare_even_0 <= (spare_word_enable[0] & wr_spare_0 | ~spare_word_enable[0] & redrow_way4_spare_even_0); | |
| 7243 | redrow_way4_spare_even_1 <= (spare_word_enable[1] & wr_spare_1 | ~spare_word_enable[1] & redrow_way4_spare_even_1); | |
| 7244 | end | |
| 7245 | else if(waysel_c4[5]) | |
| 7246 | begin | |
| 7247 | red_lo0_even_5 <= (worden_lo0[19:0] & wrd_lo0_a[19:0] | ~worden_lo0[19:0] & red_lo0_even_5); | |
| 7248 | red_hi0_even_5 <= (worden_hi0[19:0] & wrd_hi0_a[19:0] | ~worden_hi0[19:0] & red_hi0_even_5); | |
| 7249 | red_lo1_even_5 <= (worden_lo1[18:0] & wrd_lo1_a[18:0] | ~worden_lo1[18:0] & red_lo1_even_5); | |
| 7250 | red_hi1_even_5 <= (worden_hi1[18:0] & wrd_hi1_a[18:0] | ~worden_hi1[18:0] & red_hi1_even_5); | |
| 7251 | redrow_way5_spare_even_0 <= (spare_word_enable[0] & wr_spare_0 | ~spare_word_enable[0] & redrow_way5_spare_even_0); | |
| 7252 | redrow_way5_spare_even_1 <= (spare_word_enable[1] & wr_spare_1 | ~spare_word_enable[1] & redrow_way5_spare_even_1); | |
| 7253 | end | |
| 7254 | else if(waysel_c4[6]) | |
| 7255 | begin | |
| 7256 | red_lo0_even_6 <= (worden_lo0[19:0] & wrd_lo0_a[19:0] | ~worden_lo0[19:0] & red_lo0_even_6); | |
| 7257 | red_hi0_even_6 <= (worden_hi0[19:0] & wrd_hi0_a[19:0] | ~worden_hi0[19:0] & red_hi0_even_6); | |
| 7258 | red_lo1_even_6 <= (worden_lo1[18:0] & wrd_lo1_a[18:0] | ~worden_lo1[18:0] & red_lo1_even_6); | |
| 7259 | red_hi1_even_6 <= (worden_hi1[18:0] & wrd_hi1_a[18:0] | ~worden_hi1[18:0] & red_hi1_even_6); | |
| 7260 | redrow_way6_spare_even_0 <= (spare_word_enable[0] & wr_spare_0 | ~spare_word_enable[0] & redrow_way6_spare_even_0); | |
| 7261 | redrow_way6_spare_even_1 <= (spare_word_enable[1] & wr_spare_1 | ~spare_word_enable[1] & redrow_way6_spare_even_1); | |
| 7262 | end | |
| 7263 | else if(waysel_c4[7]) | |
| 7264 | begin | |
| 7265 | red_lo0_even_7 <= (worden_lo0[19:0] & wrd_lo0_a[19:0] | ~worden_lo0[19:0] & red_lo0_even_7); | |
| 7266 | red_hi0_even_7 <= (worden_hi0[19:0] & wrd_hi0_a[19:0] | ~worden_hi0[19:0] & red_hi0_even_7); | |
| 7267 | red_lo1_even_7 <= (worden_lo1[18:0] & wrd_lo1_a[18:0] | ~worden_lo1[18:0] & red_lo1_even_7); | |
| 7268 | red_hi1_even_7 <= (worden_hi1[18:0] & wrd_hi1_a[18:0] | ~worden_hi1[18:0] & red_hi1_even_7); | |
| 7269 | redrow_way7_spare_even_0 <= (spare_word_enable[0] & wr_spare_0 | ~spare_word_enable[0] & redrow_way7_spare_even_0); | |
| 7270 | redrow_way7_spare_even_1 <= (spare_word_enable[1] & wr_spare_1 | ~spare_word_enable[1] & redrow_way7_spare_even_1); | |
| 7271 | end | |
| 7272 | end | |
| 7273 | end | |
| 7274 | ||
| 7275 | // read out | |
| 7276 | always@(waysel_c4 or coloff_c4_l or set_c4 or vnw_ary) | |
| 7277 | begin | |
| 7278 | if(~coloff_c4_l & vnw_ary) | |
| 7279 | begin | |
| 7280 | if(waysel_c4[0]) | |
| 7281 | begin | |
| 7282 | red_lo0_out_bc[19:0] <= (set_c4[0]) ? red_lo0_odd_0 : red_lo0_even_0; | |
| 7283 | red_lo1_out_bc[18:0] <= (set_c4[0]) ? red_lo1_odd_0 : red_lo1_even_0; | |
| 7284 | red_hi0_out_bc[19:0] <= (set_c4[0]) ? red_hi0_odd_0 : red_hi0_even_0; | |
| 7285 | red_hi1_out_bc[18:0] <= (set_c4[0]) ? red_hi1_odd_0 : red_hi1_even_0; | |
| 7286 | redrow_rd_spare_0 <= (set_c4[0]) ? redrow_way0_spare_odd_0 : redrow_way0_spare_even_0; | |
| 7287 | redrow_rd_spare_1 <= (set_c4[0]) ? redrow_way0_spare_odd_1 : redrow_way0_spare_even_1; | |
| 7288 | end | |
| 7289 | else if(waysel_c4[1]) | |
| 7290 | begin | |
| 7291 | red_lo0_out_bc[19:0] <= (set_c4[0]) ? red_lo0_odd_1 : red_lo0_even_1; | |
| 7292 | red_lo1_out_bc[18:0] <= (set_c4[0]) ? red_lo1_odd_1 : red_lo1_even_1; | |
| 7293 | red_hi0_out_bc[19:0] <= (set_c4[0]) ? red_hi0_odd_1 : red_hi0_even_1; | |
| 7294 | red_hi1_out_bc[18:0] <= (set_c4[0]) ? red_hi1_odd_1 : red_hi1_even_1; | |
| 7295 | redrow_rd_spare_0 <= (set_c4[0]) ? redrow_way1_spare_odd_0 : redrow_way1_spare_even_0; | |
| 7296 | redrow_rd_spare_1 <= (set_c4[0]) ? redrow_way1_spare_odd_1 : redrow_way1_spare_even_1; | |
| 7297 | end | |
| 7298 | else if(waysel_c4[2]) | |
| 7299 | begin | |
| 7300 | red_lo0_out_bc[19:0] <= (set_c4[0]) ? red_lo0_odd_2 : red_lo0_even_2; | |
| 7301 | red_lo1_out_bc[18:0] <= (set_c4[0]) ? red_lo1_odd_2 : red_lo1_even_2; | |
| 7302 | red_hi0_out_bc[19:0] <= (set_c4[0]) ? red_hi0_odd_2 : red_hi0_even_2; | |
| 7303 | red_hi1_out_bc[18:0] <= (set_c4[0]) ? red_hi1_odd_2 : red_hi1_even_2; | |
| 7304 | redrow_rd_spare_0 <= (set_c4[0]) ? redrow_way2_spare_odd_0 : redrow_way2_spare_even_0; | |
| 7305 | redrow_rd_spare_1 <= (set_c4[0]) ? redrow_way2_spare_odd_1 : redrow_way2_spare_even_1; | |
| 7306 | end | |
| 7307 | else if(waysel_c4[3]) | |
| 7308 | begin | |
| 7309 | red_lo0_out_bc[19:0] <= (set_c4[0]) ? red_lo0_odd_3 : red_lo0_even_3; | |
| 7310 | red_lo1_out_bc[18:0] <= (set_c4[0]) ? red_lo1_odd_3 : red_lo1_even_3; | |
| 7311 | red_hi0_out_bc[19:0] <= (set_c4[0]) ? red_hi0_odd_3 : red_hi0_even_3; | |
| 7312 | red_hi1_out_bc[18:0] <= (set_c4[0]) ? red_hi1_odd_3 : red_hi1_even_3; | |
| 7313 | redrow_rd_spare_0 <= (set_c4[0]) ? redrow_way3_spare_odd_0 : redrow_way3_spare_even_0; | |
| 7314 | redrow_rd_spare_1 <= (set_c4[0]) ? redrow_way3_spare_odd_1 : redrow_way3_spare_even_1; | |
| 7315 | end | |
| 7316 | else if(waysel_c4[4]) | |
| 7317 | begin | |
| 7318 | red_lo0_out_bc[19:0] <= (set_c4[0]) ? red_lo0_odd_4 : red_lo0_even_4; | |
| 7319 | red_lo1_out_bc[18:0] <= (set_c4[0]) ? red_lo1_odd_4 : red_lo1_even_4; | |
| 7320 | red_hi0_out_bc[19:0] <= (set_c4[0]) ? red_hi0_odd_4 : red_hi0_even_4; | |
| 7321 | red_hi1_out_bc[18:0] <= (set_c4[0]) ? red_hi1_odd_4 : red_hi1_even_4; | |
| 7322 | redrow_rd_spare_0 <= (set_c4[0]) ? redrow_way4_spare_odd_0 : redrow_way4_spare_even_0; | |
| 7323 | redrow_rd_spare_1 <= (set_c4[0]) ? redrow_way4_spare_odd_1 : redrow_way4_spare_even_1; | |
| 7324 | end | |
| 7325 | else if(waysel_c4[5]) | |
| 7326 | begin | |
| 7327 | red_lo0_out_bc[19:0] <= (set_c4[0]) ? red_lo0_odd_5 : red_lo0_even_5; | |
| 7328 | red_lo1_out_bc[18:0] <= (set_c4[0]) ? red_lo1_odd_5 : red_lo1_even_5; | |
| 7329 | red_hi0_out_bc[19:0] <= (set_c4[0]) ? red_hi0_odd_5 : red_hi0_even_5; | |
| 7330 | red_hi1_out_bc[18:0] <= (set_c4[0]) ? red_hi1_odd_5 : red_hi1_even_5; | |
| 7331 | redrow_rd_spare_0 <= (set_c4[0]) ? redrow_way5_spare_odd_0 : redrow_way5_spare_even_0; | |
| 7332 | redrow_rd_spare_1 <= (set_c4[0]) ? redrow_way5_spare_odd_1 : redrow_way5_spare_even_1; | |
| 7333 | end | |
| 7334 | else if(waysel_c4[6]) | |
| 7335 | begin | |
| 7336 | red_lo0_out_bc[19:0] <= (set_c4[0]) ? red_lo0_odd_6 : red_lo0_even_6; | |
| 7337 | red_lo1_out_bc[18:0] <= (set_c4[0]) ? red_lo1_odd_6 : red_lo1_even_6; | |
| 7338 | red_hi0_out_bc[19:0] <= (set_c4[0]) ? red_hi0_odd_6 : red_hi0_even_6; | |
| 7339 | red_hi1_out_bc[18:0] <= (set_c4[0]) ? red_hi1_odd_6 : red_hi1_even_6; | |
| 7340 | redrow_rd_spare_0 <= (set_c4[0]) ? redrow_way6_spare_odd_0 : redrow_way6_spare_even_0; | |
| 7341 | redrow_rd_spare_1 <= (set_c4[0]) ? redrow_way6_spare_odd_1 : redrow_way6_spare_even_1; | |
| 7342 | end | |
| 7343 | else if(waysel_c4[7]) | |
| 7344 | begin | |
| 7345 | red_lo0_out_bc[19:0] <= (set_c4[0]) ? red_lo0_odd_7 : red_lo0_even_7; | |
| 7346 | red_lo1_out_bc[18:0] <= (set_c4[0]) ? red_lo1_odd_7 : red_lo1_even_7; | |
| 7347 | red_hi0_out_bc[19:0] <= (set_c4[0]) ? red_hi0_odd_7 : red_hi0_even_7; | |
| 7348 | red_hi1_out_bc[18:0] <= (set_c4[0]) ? red_hi1_odd_7 : red_hi1_even_7; | |
| 7349 | redrow_rd_spare_0 <= (set_c4[0]) ? redrow_way7_spare_odd_0 : redrow_way7_spare_even_0; | |
| 7350 | redrow_rd_spare_1 <= (set_c4[0]) ? redrow_way7_spare_odd_1 : redrow_way7_spare_even_1; | |
| 7351 | end | |
| 7352 | end | |
| 7353 | end | |
| 7354 | ||
| 7355 | always@(negedge l1clk) | |
| 7356 | begin | |
| 7357 | red_lo0_out_bc_d_l <= ~red_lo0_out_bc; | |
| 7358 | red_hi0_out_bc_d_l <= ~red_hi0_out_bc; | |
| 7359 | red_lo1_out_bc_d_l <= ~red_lo1_out_bc; | |
| 7360 | red_hi1_out_bc_d_l <= ~red_hi1_out_bc; | |
| 7361 | redrow_rd_spare_0_d_l <= ~redrow_rd_spare_0; | |
| 7362 | redrow_rd_spare_1_d_l <= ~redrow_rd_spare_1; | |
| 7363 | end | |
| 7364 | ||
| 7365 | always@(posedge l1clk) | |
| 7366 | begin | |
| 7367 | red_lo0_bc_c5b_l <= red_lo0_out_bc_d_l; | |
| 7368 | red_hi0_bc_c5b_l <= red_hi0_out_bc_d_l; | |
| 7369 | red_lo1_bc_c5b_l <= red_lo1_out_bc_d_l; | |
| 7370 | red_hi1_bc_c5b_l <= red_hi1_out_bc_d_l; | |
| 7371 | redrow_rdd_spare_0 <= redrow_rd_spare_0_d_l; | |
| 7372 | redrow_rdd_spare_1 <= redrow_rd_spare_1_d_l; | |
| 7373 | end | |
| 7374 | ||
| 7375 | assign red_rd_data[19:0] = | |
| 7376 | {redrow_rdd_spare_0, red_lo1_bc_c5b_l[4], red_hi0_bc_c5b_l[4],red_lo0_bc_c5b_l[4], | |
| 7377 | red_hi1_bc_c5b_l[3], red_lo1_bc_c5b_l[3], red_hi0_bc_c5b_l[3],red_lo0_bc_c5b_l[3], | |
| 7378 | red_hi1_bc_c5b_l[2], red_lo1_bc_c5b_l[2], red_hi0_bc_c5b_l[2],red_lo0_bc_c5b_l[2], | |
| 7379 | red_hi1_bc_c5b_l[1], red_lo1_bc_c5b_l[1], red_hi0_bc_c5b_l[1],red_lo0_bc_c5b_l[1], | |
| 7380 | red_hi1_bc_c5b_l[0], red_lo1_bc_c5b_l[0], red_hi0_bc_c5b_l[0],red_lo0_bc_c5b_l[0]}; | |
| 7381 | ||
| 7382 | assign red_rd_data[39:20] = { | |
| 7383 | red_lo1_bc_c5b_l[9], red_hi0_bc_c5b_l[9],red_lo0_bc_c5b_l[9], | |
| 7384 | red_hi1_bc_c5b_l[8], red_lo1_bc_c5b_l[8], red_hi0_bc_c5b_l[8],red_lo0_bc_c5b_l[8], | |
| 7385 | red_hi1_bc_c5b_l[7], red_lo1_bc_c5b_l[7], red_hi0_bc_c5b_l[7],red_lo0_bc_c5b_l[7], | |
| 7386 | red_hi1_bc_c5b_l[6], red_lo1_bc_c5b_l[6], red_hi0_bc_c5b_l[6],red_lo0_bc_c5b_l[6], | |
| 7387 | red_hi1_bc_c5b_l[5], red_lo1_bc_c5b_l[5], red_hi0_bc_c5b_l[5],red_lo0_bc_c5b_l[5], red_hi1_bc_c5b_l[4]}; | |
| 7388 | ||
| 7389 | ||
| 7390 | assign red_rd_data[59:40] = { | |
| 7391 | red_lo1_bc_c5b_l[14], red_hi0_bc_c5b_l[14],red_lo0_bc_c5b_l[14], | |
| 7392 | red_hi1_bc_c5b_l[13], red_lo1_bc_c5b_l[13], red_hi0_bc_c5b_l[13],red_lo0_bc_c5b_l[13], | |
| 7393 | red_hi1_bc_c5b_l[12], red_lo1_bc_c5b_l[12], red_hi0_bc_c5b_l[12],red_lo0_bc_c5b_l[12], | |
| 7394 | red_hi1_bc_c5b_l[11], red_lo1_bc_c5b_l[11], red_hi0_bc_c5b_l[11],red_lo0_bc_c5b_l[11], | |
| 7395 | red_hi1_bc_c5b_l[10], red_lo1_bc_c5b_l[10], red_hi0_bc_c5b_l[10],red_lo0_bc_c5b_l[10], red_hi1_bc_c5b_l[9]}; | |
| 7396 | ||
| 7397 | assign red_rd_data[79:60] = { | |
| 7398 | red_hi0_bc_c5b_l[19], red_lo0_bc_c5b_l[19], | |
| 7399 | red_hi1_bc_c5b_l[18], red_lo1_bc_c5b_l[18], red_hi0_bc_c5b_l[18],red_lo0_bc_c5b_l[18], | |
| 7400 | red_hi1_bc_c5b_l[17], red_lo1_bc_c5b_l[17], red_hi0_bc_c5b_l[17],red_lo0_bc_c5b_l[17], | |
| 7401 | red_hi1_bc_c5b_l[16], red_lo1_bc_c5b_l[16], red_hi0_bc_c5b_l[16],red_lo0_bc_c5b_l[16], | |
| 7402 | red_hi1_bc_c5b_l[15], red_lo1_bc_c5b_l[15], red_hi0_bc_c5b_l[15],red_lo0_bc_c5b_l[15], red_hi1_bc_c5b_l[14],redrow_rdd_spare_1}; | |
| 7403 | ||
| 7404 | ||
| 7405 | always@(cred_mod or red_rd_data) | |
| 7406 | begin | |
| 7407 | ||
| 7408 | for(i=0;i<19;i=i+1) | |
| 7409 | begin | |
| 7410 | red_read_data[i] = cred_mod[i] ? red_rd_data[i+1] : red_rd_data[i]; | |
| 7411 | end | |
| 7412 | ||
| 7413 | for(i=20;i<40;i=i+1) | |
| 7414 | begin | |
| 7415 | red_read_data[i] = cred_mod[i] ? red_rd_data[i-1] : red_rd_data[i]; | |
| 7416 | end | |
| 7417 | ||
| 7418 | ||
| 7419 | for(i=40;i<60;i=i+1) | |
| 7420 | begin | |
| 7421 | red_read_data[i] = cred_mod[i] ? red_rd_data[i+1] : red_rd_data[i]; | |
| 7422 | end | |
| 7423 | ||
| 7424 | for(i=61;i<80;i=i+1) | |
| 7425 | begin | |
| 7426 | red_read_data[i] = cred_mod[i] ? red_rd_data[i-1] : red_rd_data[i]; | |
| 7427 | end | |
| 7428 | ||
| 7429 | end | |
| 7430 | ||
| 7431 | ||
| 7432 | ||
| 7433 | assign { red_hi0_b_out_l[19], red_lo0_b_out_l[19], | |
| 7434 | red_hi1_b_out_l[18], red_lo1_b_out_l[18], red_hi0_b_out_l[18],red_lo0_b_out_l[18], | |
| 7435 | red_hi1_b_out_l[17], red_lo1_b_out_l[17], red_hi0_b_out_l[17],red_lo0_b_out_l[17], | |
| 7436 | red_hi1_b_out_l[16], red_lo1_b_out_l[16], red_hi0_b_out_l[16],red_lo0_b_out_l[16], | |
| 7437 | red_hi1_b_out_l[15], red_lo1_b_out_l[15], red_hi0_b_out_l[15],red_lo0_b_out_l[15], | |
| 7438 | red_hi1_b_out_l[14]} = red_read_data[79:61]; | |
| 7439 | ||
| 7440 | assign {red_lo1_b_out_l[14], red_hi0_b_out_l[14],red_lo0_b_out_l[14], | |
| 7441 | red_hi1_b_out_l[13], red_lo1_b_out_l[13], red_hi0_b_out_l[13],red_lo0_b_out_l[13], | |
| 7442 | red_hi1_b_out_l[12], red_lo1_b_out_l[12], red_hi0_b_out_l[12],red_lo0_b_out_l[12], | |
| 7443 | red_hi1_b_out_l[11], red_lo1_b_out_l[11], red_hi0_b_out_l[11],red_lo0_b_out_l[11], | |
| 7444 | red_hi1_b_out_l[10], red_lo1_b_out_l[10], red_hi0_b_out_l[10],red_lo0_b_out_l[10], | |
| 7445 | red_hi1_b_out_l[9]} = red_read_data[59:40]; | |
| 7446 | ||
| 7447 | assign { red_lo1_b_out_l[9], red_hi0_b_out_l[9],red_lo0_b_out_l[9], | |
| 7448 | red_hi1_b_out_l[8], red_lo1_b_out_l[8], red_hi0_b_out_l[8],red_lo0_b_out_l[8], | |
| 7449 | red_hi1_b_out_l[7], red_lo1_b_out_l[7], red_hi0_b_out_l[7],red_lo0_b_out_l[7], | |
| 7450 | red_hi1_b_out_l[6], red_lo1_b_out_l[6], red_hi0_b_out_l[6],red_lo0_b_out_l[6], | |
| 7451 | red_hi1_b_out_l[5], red_lo1_b_out_l[5], red_hi0_b_out_l[5],red_lo0_b_out_l[5], | |
| 7452 | red_hi1_b_out_l[4]} = red_read_data[39:20]; | |
| 7453 | ||
| 7454 | assign {red_lo1_b_out_l[4], red_hi0_b_out_l[4],red_lo0_b_out_l[4], | |
| 7455 | red_hi1_b_out_l[3], red_lo1_b_out_l[3], red_hi0_b_out_l[3],red_lo0_b_out_l[3], | |
| 7456 | red_hi1_b_out_l[2], red_lo1_b_out_l[2], red_hi0_b_out_l[2],red_lo0_b_out_l[2], | |
| 7457 | red_hi1_b_out_l[1], red_lo1_b_out_l[1], red_hi0_b_out_l[1],red_lo0_b_out_l[1], | |
| 7458 | red_hi1_b_out_l[0], red_lo1_b_out_l[0], red_hi0_b_out_l[0],red_lo0_b_out_l[0]} = red_read_data[18:0]; | |
| 7459 | ||
| 7460 | ||
| 7461 | ////////////////////////////////////////////////////////////////////////////// | |
| 7462 | // col redudancy | |
| 7463 | // hi1, lo1, hi0, lo0 | |
| 7464 | ||
| 7465 | //assign cred_mod_lo0[18:0] = cred_mod[18:0]; | |
| 7466 | //assign cred_mod_hi0[38:19] = cred_mod[38:19]; | |
| 7467 | //assign cred_mod_lo1[58:39] = cred_mod[58:39]; | |
| 7468 | //assign cred_mod_hi1[77:59] = cred_mod[77:59]; | |
| 7469 | ||
| 7470 | // mux 0+1 | |
| 7471 | // mux 19 spare | |
| 7472 | // mux 18 and spare | |
| 7473 | // mux 38 and 37 | |
| 7474 | // mux 77 | |
| 7475 | ||
| 7476 | ||
| 7477 | ||
| 7478 | ||
| 7479 | endmodule | |
| 7480 | ||
| 7481 | ||
| 7482 | module n2_l2d_dmux78_cust ( | |
| 7483 | waysel_c3, | |
| 7484 | set_c3, | |
| 7485 | coloff_c3, | |
| 7486 | coloff_c4_l, | |
| 7487 | rd_wr_c3, | |
| 7488 | worden_c3, | |
| 7489 | l2clk, | |
| 7490 | tcu_pce_ov, | |
| 7491 | tcu_pce, | |
| 7492 | se, | |
| 7493 | tcu_clk_stop, | |
| 7494 | waysel_top_c4, | |
| 7495 | waysel_bot_c4, | |
| 7496 | set_top_c3b, | |
| 7497 | set_bot_c3b, | |
| 7498 | coloff_top_c3b_l, | |
| 7499 | coloff_bot_c3b_l, | |
| 7500 | writeen_top_c3b, | |
| 7501 | writeen_bot_c3b, | |
| 7502 | l1clk, | |
| 7503 | worden_top_c3b, | |
| 7504 | worden_bot_c3b, | |
| 7505 | sat_lo0_bc_l, | |
| 7506 | sat_hi0_bc_l, | |
| 7507 | sat_lo1_bc_l, | |
| 7508 | sat_hi1_bc_l, | |
| 7509 | sab_lo0_bc_l, | |
| 7510 | sab_hi0_bc_l, | |
| 7511 | sab_lo1_bc_l, | |
| 7512 | sab_hi1_bc_l, | |
| 7513 | ldin0lo_b, | |
| 7514 | ldin0hi_b, | |
| 7515 | ldin1lo_b, | |
| 7516 | ldin1hi_b, | |
| 7517 | ldout0lo_b, | |
| 7518 | ldout0hi_b, | |
| 7519 | ldout1lo_b, | |
| 7520 | ldout1hi_b, | |
| 7521 | red_d_in_00, | |
| 7522 | red_d_out_00, | |
| 7523 | fuse_l2d_rid_00, | |
| 7524 | fuse_l2d_wren_00, | |
| 7525 | fuse_l2d_reset_00_l, | |
| 7526 | sel_quad_00, | |
| 7527 | red_d_in_01, | |
| 7528 | red_d_out_01, | |
| 7529 | fuse_l2d_rid_01, | |
| 7530 | fuse_l2d_wren_01, | |
| 7531 | fuse_l2d_reset_01_l, | |
| 7532 | sel_quad_01, | |
| 7533 | red_addr_top, | |
| 7534 | red_addr_bot, | |
| 7535 | red_top_d_00, | |
| 7536 | red_top_d_01, | |
| 7537 | cred); | |
| 7538 | ||
| 7539 | input [7:0] waysel_c3; | |
| 7540 | input [8:0] set_c3; | |
| 7541 | input coloff_c3; | |
| 7542 | input coloff_c4_l; | |
| 7543 | //input [1:0] coloff_c5; | |
| 7544 | input rd_wr_c3; | |
| 7545 | //input readen_c5; | |
| 7546 | input [3:0] worden_c3; | |
| 7547 | input l2clk; | |
| 7548 | input tcu_pce_ov; | |
| 7549 | input tcu_pce; | |
| 7550 | input se; | |
| 7551 | input tcu_clk_stop; | |
| 7552 | ||
| 7553 | output [7:0] waysel_top_c4; | |
| 7554 | output [7:0] waysel_bot_c4; | |
| 7555 | output [8:0] set_top_c3b; // Set 8 will be inverted for top/bot | |
| 7556 | output [8:0] set_bot_c3b; // Set 8 will be inverted for top/bot | |
| 7557 | output coloff_top_c3b_l; | |
| 7558 | output coloff_bot_c3b_l; | |
| 7559 | //output coloff_top_c4_l ; | |
| 7560 | //output coloff_bot_c4_l; | |
| 7561 | //output [1:0] coloff_top_c5; | |
| 7562 | //output [1:0] coloff_bot_c5; | |
| 7563 | output writeen_top_c3b; | |
| 7564 | output writeen_bot_c3b; | |
| 7565 | //output readen_top_c5; | |
| 7566 | //output readen_bot_c5; | |
| 7567 | output l1clk; | |
| 7568 | output [3:0] worden_top_c3b; | |
| 7569 | output [3:0] worden_bot_c3b; | |
| 7570 | ||
| 7571 | ||
| 7572 | input [19:0] sat_lo0_bc_l; // Senseamp out from top-16kb | |
| 7573 | input [19:0] sat_hi0_bc_l; // Senseamp out from top-16kb | |
| 7574 | input [18:0] sat_lo1_bc_l; // Senseamp out from top-16kb | |
| 7575 | input [18:0] sat_hi1_bc_l; // Senseamp out from top-16kb | |
| 7576 | input [19:0] sab_lo0_bc_l; // Senseamp out from bot-16kb | |
| 7577 | input [19:0] sab_hi0_bc_l; // Senseamp out from bot-16kb | |
| 7578 | input [18:0] sab_lo1_bc_l; // Senseamp out from bot-16kb | |
| 7579 | input [18:0] sab_hi1_bc_l; // Senseamp out from bot-16kb | |
| 7580 | input [19:0] ldin0lo_b; | |
| 7581 | input [19:0] ldin0hi_b; | |
| 7582 | input [18:0] ldin1lo_b; | |
| 7583 | input [18:0] ldin1hi_b; | |
| 7584 | //input bnken_lat; // Address latch enable (1.5cycle) | |
| 7585 | output [19:0] ldout0lo_b; | |
| 7586 | output [19:0] ldout0hi_b; | |
| 7587 | output [18:0] ldout1lo_b; | |
| 7588 | output [18:0] ldout1hi_b; | |
| 7589 | ||
| 7590 | ||
| 7591 | input [9:0] red_d_in_00; | |
| 7592 | output [9:0] red_d_out_00; | |
| 7593 | input [2:0] fuse_l2d_rid_00; | |
| 7594 | input fuse_l2d_wren_00; | |
| 7595 | input fuse_l2d_reset_00_l; | |
| 7596 | input sel_quad_00; | |
| 7597 | ||
| 7598 | input [9:0] red_d_in_01; | |
| 7599 | output [9:0] red_d_out_01; | |
| 7600 | input [2:0] fuse_l2d_rid_01; | |
| 7601 | input fuse_l2d_wren_01; | |
| 7602 | input fuse_l2d_reset_01_l; | |
| 7603 | input sel_quad_01; | |
| 7604 | ||
| 7605 | output [9:0] red_addr_top; | |
| 7606 | output [9:0] red_addr_bot; | |
| 7607 | // forwarded | |
| 7608 | input [9:0] red_top_d_00; | |
| 7609 | input [9:0] red_top_d_01; | |
| 7610 | ||
| 7611 | output [77:0] cred; | |
| 7612 | //output fuse_l2d_reset_00_l_buf; | |
| 7613 | //output fuse_l2d_reset_01_l_buf; | |
| 7614 | ||
| 7615 | reg [7:0] waysel_top_c4; | |
| 7616 | reg [7:0] waysel_bot_c4; | |
| 7617 | reg [8:0] set_top_c3b; | |
| 7618 | reg [8:0] set_bot_c3b; | |
| 7619 | reg writeen_top_c3b; | |
| 7620 | reg writeen_bot_c3b; | |
| 7621 | reg [3:0] worden_top_c3b; | |
| 7622 | reg [3:0] worden_bot_c3b; | |
| 7623 | reg coloff_top_c3b_l; | |
| 7624 | reg coloff_bot_c3b_l; | |
| 7625 | reg [7:0] waysel_top_c3b; | |
| 7626 | reg [7:0] waysel_bot_c3b; | |
| 7627 | //always@(posedge l2clk) | |
| 7628 | always@(negedge l2clk) | |
| 7629 | begin | |
| 7630 | coloff_top_c3b_l <= ~coloff_c3; | |
| 7631 | coloff_bot_c3b_l <= ~coloff_c3; | |
| 7632 | worden_top_c3b[3:0] <= worden_c3[3:0]; | |
| 7633 | worden_bot_c3b[3:0] <= worden_c3[3:0]; | |
| 7634 | writeen_top_c3b <= ~rd_wr_c3; | |
| 7635 | writeen_bot_c3b <= ~rd_wr_c3; | |
| 7636 | end | |
| 7637 | ||
| 7638 | //always@(negedge l2clk) | |
| 7639 | //always@(l2clk or bnken_lat) | |
| 7640 | always@(l2clk or coloff_c4_l) | |
| 7641 | begin | |
| 7642 | // if(~bnken_lat) | |
| 7643 | if(~l2clk & coloff_c4_l) | |
| 7644 | begin | |
| 7645 | waysel_top_c3b[7:0] <= waysel_c3[7:0]; | |
| 7646 | waysel_bot_c3b[7:0] <= waysel_c3[7:0]; | |
| 7647 | set_bot_c3b[8:0] <= set_c3[8:0]; | |
| 7648 | set_top_c3b[8:0] <= {~set_c3[8],set_c3[7:0]}; | |
| 7649 | ||
| 7650 | end | |
| 7651 | end | |
| 7652 | ||
| 7653 | always@(posedge l2clk ) | |
| 7654 | begin | |
| 7655 | waysel_top_c4[7:0] <= waysel_top_c3b[7:0]; | |
| 7656 | waysel_bot_c4[7:0] <= waysel_bot_c3b[7:0]; | |
| 7657 | end | |
| 7658 | //assign readen_top_c5 = readen_c5; | |
| 7659 | //assign readen_bot_c5 = readen_c5; | |
| 7660 | //assign coloff_top_c5 = coloff_c5[1:0]; | |
| 7661 | //assign coloff_bot_c5 = coloff_c5[1:0]; | |
| 7662 | //assign coloff_top_c4_l = coloff_c4_l; | |
| 7663 | //assign coloff_bot_c4_l = coloff_c4_l; | |
| 7664 | ||
| 7665 | ||
| 7666 | wire [19:0] sat_lo0_bc; | |
| 7667 | wire [19:0] sab_lo0_bc; | |
| 7668 | wire [19:0] sat_hi0_bc; | |
| 7669 | wire [19:0] sab_hi0_bc; | |
| 7670 | ||
| 7671 | wire [18:0] sat_lo1_bc; | |
| 7672 | wire [18:0] sab_lo1_bc; | |
| 7673 | wire [18:0] sat_hi1_bc; | |
| 7674 | wire [18:0] sab_hi1_bc; | |
| 7675 | ||
| 7676 | ||
| 7677 | //always@(posedge l1clk) | |
| 7678 | //begin | |
| 7679 | assign sat_lo0_bc[19:0] = ~sat_lo0_bc_l[19:0]; | |
| 7680 | assign sab_lo0_bc[19:0] = ~sab_lo0_bc_l[19:0]; | |
| 7681 | assign sat_hi0_bc[19:0] = ~sat_hi0_bc_l[19:0]; | |
| 7682 | assign sab_hi0_bc[19:0] = ~sab_hi0_bc_l[19:0]; | |
| 7683 | ||
| 7684 | assign sat_lo1_bc[18:0] = ~sat_lo1_bc_l[18:0]; | |
| 7685 | assign sab_lo1_bc[18:0] = ~sab_lo1_bc_l[18:0]; | |
| 7686 | assign sat_hi1_bc[18:0] = ~sat_hi1_bc_l[18:0]; | |
| 7687 | assign sab_hi1_bc[18:0] = ~sab_hi1_bc_l[18:0]; | |
| 7688 | //end | |
| 7689 | ||
| 7690 | ||
| 7691 | ||
| 7692 | n2_l2d_sp_512kb_cust_or_macro__ports_3__width_20 or_ldout0lo_b | |
| 7693 | ( | |
| 7694 | .dout (ldout0lo_b[19:0]), | |
| 7695 | .din0 (sat_lo0_bc[19:0]), | |
| 7696 | .din1 (sab_lo0_bc[19:0]), | |
| 7697 | .din2 (ldin0lo_b[19:0]) | |
| 7698 | ); | |
| 7699 | ||
| 7700 | n2_l2d_sp_512kb_cust_or_macro__ports_3__width_20 or_ldout0hi_b | |
| 7701 | ( | |
| 7702 | .dout (ldout0hi_b[19:0]), | |
| 7703 | .din0 (sat_hi0_bc[19:0]), | |
| 7704 | .din1 (sab_hi0_bc[19:0]), | |
| 7705 | .din2 (ldin0hi_b[19:0]) | |
| 7706 | ); | |
| 7707 | ||
| 7708 | n2_l2d_sp_512kb_cust_or_macro__ports_3__width_19 or_ldout1lo_b | |
| 7709 | ( | |
| 7710 | .dout (ldout1lo_b[18:0]), | |
| 7711 | .din0 (sat_lo1_bc[18:0]), | |
| 7712 | .din1 (sab_lo1_bc[18:0]), | |
| 7713 | .din2 (ldin1lo_b[18:0]) | |
| 7714 | ); | |
| 7715 | ||
| 7716 | ||
| 7717 | n2_l2d_sp_512kb_cust_or_macro__ports_3__width_19 or_ldout1hi_b | |
| 7718 | ( | |
| 7719 | .dout (ldout1hi_b[18:0]), | |
| 7720 | .din0 (sat_hi1_bc[18:0]), | |
| 7721 | .din1 (sab_hi1_bc[18:0]), | |
| 7722 | .din2 (ldin1hi_b[18:0]) | |
| 7723 | ); | |
| 7724 | ||
| 7725 | ||
| 7726 | cl_sc1_l1hdr_12x clk_hdr ( | |
| 7727 | .l2clk (l2clk), | |
| 7728 | .se (se), | |
| 7729 | .pce (tcu_pce), | |
| 7730 | .pce_ov (tcu_pce_ov), | |
| 7731 | .stop (tcu_clk_stop), | |
| 7732 | .l1clk (l1clk) | |
| 7733 | ); | |
| 7734 | ||
| 7735 | ||
| 7736 | // Redudant row modelling | |
| 7737 | ||
| 7738 | ||
| 7739 | ||
| 7740 | reg [9:0] red_odd_0; | |
| 7741 | reg [9:0] red_odd_1; | |
| 7742 | reg [9:0] red_even_0; | |
| 7743 | reg [9:0] red_even_1; | |
| 7744 | reg [7:0] red_col_0; | |
| 7745 | reg [7:0] red_col_1; | |
| 7746 | //reg [9:0] red_d_out_00; | |
| 7747 | //reg [9:0] red_d_out_01; | |
| 7748 | ||
| 7749 | wire red_reg_clk_even_0; | |
| 7750 | wire red_reg_clk_even_1; | |
| 7751 | wire red_reg_clk_odd_0; | |
| 7752 | wire red_reg_clk_odd_1; | |
| 7753 | wire red_reg_clk_col_0; | |
| 7754 | wire red_reg_clk_col_1; | |
| 7755 | wire [9:0] red_data_00; | |
| 7756 | wire [9:0] red_data_01; | |
| 7757 | ||
| 7758 | // Initialize the register. | |
| 7759 | initial begin | |
| 7760 | ||
| 7761 | red_odd_0[9:0] = 10'b0; | |
| 7762 | red_odd_1[9:0] = 10'b0; | |
| 7763 | red_even_0[9:0]= 10'b0; | |
| 7764 | red_even_1[9:0]= 10'b0; | |
| 7765 | red_col_0[7:0] = 8'b0; | |
| 7766 | red_col_1[7:0] = 8'b0; | |
| 7767 | end | |
| 7768 | ||
| 7769 | assign red_reg_clk_even_0 =~((~l1clk & fuse_l2d_wren_00 & (fuse_l2d_rid_00[2:0]==3'b000) & sel_quad_00) | ~fuse_l2d_reset_00_l); | |
| 7770 | assign red_reg_clk_even_1 =~((~l1clk & fuse_l2d_wren_00 & (fuse_l2d_rid_00[2:0]==3'b010) & sel_quad_00) | ~fuse_l2d_reset_00_l); | |
| 7771 | assign red_reg_clk_col_0 =~((~l1clk & fuse_l2d_wren_00 & (fuse_l2d_rid_00[2:0]==3'b100) & sel_quad_00) | ~fuse_l2d_reset_00_l); | |
| 7772 | ||
| 7773 | assign red_reg_clk_odd_0 =~((~l1clk &fuse_l2d_wren_01& (fuse_l2d_rid_01[2:0]==3'b001) & sel_quad_01) | ~fuse_l2d_reset_01_l); | |
| 7774 | assign red_reg_clk_odd_1 =~((~l1clk &fuse_l2d_wren_01& (fuse_l2d_rid_01[2:0]==3'b011) & sel_quad_01) | ~fuse_l2d_reset_01_l); | |
| 7775 | assign red_reg_clk_col_1 =~((~l1clk &fuse_l2d_wren_01& (fuse_l2d_rid_01[2:0]==3'b101) & sel_quad_01) | ~fuse_l2d_reset_01_l); | |
| 7776 | ||
| 7777 | assign red_data_00[9:0] = red_d_in_00[9:0] & {10{fuse_l2d_reset_00_l}}; | |
| 7778 | assign red_data_01[9:0] = red_d_in_01[9:0] & {10{fuse_l2d_reset_01_l}}; | |
| 7779 | ||
| 7780 | always @(red_reg_clk_even_0 or red_reg_clk_even_1 or red_reg_clk_col_0 or red_reg_clk_odd_0 or red_reg_clk_odd_1 or red_reg_clk_col_1 or red_d_in_00 or red_d_in_01) begin | |
| 7781 | if (~red_reg_clk_even_0) begin | |
| 7782 | red_even_0[9:0] <= red_data_00[9:0]; | |
| 7783 | end | |
| 7784 | ||
| 7785 | if (~red_reg_clk_even_1) begin | |
| 7786 | red_even_1[9:0] <= red_data_00[9:0]; | |
| 7787 | end | |
| 7788 | ||
| 7789 | if (~red_reg_clk_col_0) begin | |
| 7790 | red_col_0[7:0] <= {red_data_00[9:8],red_data_00[5:0]}; | |
| 7791 | end | |
| 7792 | ||
| 7793 | if (~red_reg_clk_odd_0) begin | |
| 7794 | red_odd_0[9:0] <= red_data_01[9:0]; | |
| 7795 | end | |
| 7796 | ||
| 7797 | if (~red_reg_clk_odd_1) begin | |
| 7798 | red_odd_1[9:0] <= red_data_01[9:0]; | |
| 7799 | end | |
| 7800 | ||
| 7801 | if (~red_reg_clk_col_1) begin | |
| 7802 | red_col_1[7:0] <= {red_data_01[9:8],red_data_01[5:0]}; | |
| 7803 | end | |
| 7804 | end | |
| 7805 | ||
| 7806 | ||
| 7807 | // 00 = bot and 01 = top | |
| 7808 | ||
| 7809 | //always@(fuse_l2d_wren_00 or fuse_l2d_wren_01 or fuse_l2d_rid_01 or fuse_l2d_rid_00 | |
| 7810 | // or red_d_in_00 or red_d_in_01 or sel_quad_00 or sel_quad_01) | |
| 7811 | //begin | |
| 7812 | // if(fuse_l2d_wren_00 & ~fuse_l2d_rid_00[0] & set_bot_c3b[8] & (fuse_l2d_rid_00[2:1]==2'b00) & sel_quad_00) | |
| 7813 | // red_even_0 <= red_d_in_00; | |
| 7814 | // else if(fuse_l2d_wren_00 & ~fuse_l2d_rid_00[0] & set_top_c3b[8] & (fuse_l2d_rid_01[2:1]==2'b01) & sel_quad_00) | |
| 7815 | // red_even_1 <= red_d_in_00; | |
| 7816 | // else if(fuse_l2d_wren_00 & ~fuse_l2d_rid_00[0] & (fuse_l2d_rid_01[2:1]==2'b10) & sel_quad_00) | |
| 7817 | // red_col_0 <= red_d_in_00[7:0]; | |
| 7818 | // | |
| 7819 | // if(fuse_l2d_wren_01 & fuse_l2d_rid_01[0] & set_top_c3b[8] & (fuse_l2d_rid_01[2:1]==2'b00) & sel_quad_01) | |
| 7820 | // red_odd_0 <= red_d_in_01; | |
| 7821 | // else if(fuse_l2d_wren_01 & fuse_l2d_rid_01[0] & set_bot_c3b[8] & (fuse_l2d_rid_01[2:1]==2'b01) & sel_quad_01) | |
| 7822 | // red_odd_1 <= red_d_in_01; | |
| 7823 | // else if(fuse_l2d_wren_01 & fuse_l2d_rid_01[0] & (fuse_l2d_rid_01[2:1]==2'b10) & sel_quad_01) | |
| 7824 | // red_col_1 <= red_d_in_01[7:0]; | |
| 7825 | //end | |
| 7826 | // | |
| 7827 | ||
| 7828 | //assign red_addr_top = set_top_c3b[0] ? red_odd_0 : red_even_0; | |
| 7829 | //assign red_addr_bot = set_top_c3b[0] ? red_odd_1 : red_even_1; | |
| 7830 | assign red_addr_top = set_top_c3b[0] ? red_odd_1 : red_even_1; | |
| 7831 | assign red_addr_bot = set_top_c3b[0] ? red_odd_0 : red_even_0; | |
| 7832 | ||
| 7833 | assign red_d_out_00[7:0] = (red_even_0[7:0] & {8{fuse_l2d_rid_00[2:0]==3'b000}}) | | |
| 7834 | (red_even_1[7:0] & {8{fuse_l2d_rid_00[2:0]==3'b010}}) | | |
| 7835 | ({2'b0,(red_col_0[5:0] & {6{fuse_l2d_rid_00[2:0]==3'b100}})}) | | |
| 7836 | (red_top_d_00[7:0] & {8{~sel_quad_00}}); | |
| 7837 | ||
| 7838 | assign red_d_out_00[9:8] = (red_even_0[9:8] & {2{fuse_l2d_rid_00[2:0]==3'b000}}) | | |
| 7839 | (red_even_1[9:8] & {2{fuse_l2d_rid_00[2:0]==3'b010}}) | | |
| 7840 | (red_col_0[7:6] & {2{fuse_l2d_rid_00[2:0]==3'b100}}) | | |
| 7841 | (red_top_d_00[9:8] & {2{~sel_quad_00}}); | |
| 7842 | ||
| 7843 | ||
| 7844 | ||
| 7845 | ||
| 7846 | assign red_d_out_01[7:0] = (red_odd_0[7:0] & {8{fuse_l2d_rid_01[2:0]==3'b001}}) | | |
| 7847 | (red_odd_1[7:0] & {8{fuse_l2d_rid_01[2:0]==3'b011}}) | | |
| 7848 | ({2'b0,(red_col_1[5:0] & {6{fuse_l2d_rid_01[2:0]==3'b101}})}) | | |
| 7849 | (red_top_d_01[7:0] & {8{~sel_quad_01}}); | |
| 7850 | ||
| 7851 | assign red_d_out_01[9:8] = (red_odd_0[9:8] & {2{fuse_l2d_rid_01[2:0]==3'b001}}) | | |
| 7852 | (red_odd_1[9:8] & {2{fuse_l2d_rid_01[2:0]==3'b011}}) | | |
| 7853 | (red_col_1[7:6] & {2{fuse_l2d_rid_01[2:0]==3'b101}}) | | |
| 7854 | (red_top_d_01[9:8] & {2{~sel_quad_01}}); | |
| 7855 | ||
| 7856 | ||
| 7857 | ||
| 7858 | //always@(fuse_l2d_rid_00) | |
| 7859 | //begin | |
| 7860 | //case(fuse_l2d_rid_00) | |
| 7861 | //3'b000 : begin | |
| 7862 | // red_d_out_00 = red_even_0; | |
| 7863 | // red_d_out_01 = 10'b0; | |
| 7864 | // end | |
| 7865 | //3'b010 : begin | |
| 7866 | // red_d_out_00 = red_even_1; | |
| 7867 | // red_d_out_01 = 10'b0; | |
| 7868 | // end | |
| 7869 | //3'b100 : begin | |
| 7870 | // red_d_out_00 = {2'b0,red_col_0}; | |
| 7871 | // red_d_out_01 = 10'b0; | |
| 7872 | // end | |
| 7873 | // | |
| 7874 | //3'b001 : begin | |
| 7875 | // red_d_out_01 = red_odd_0; | |
| 7876 | // red_d_out_00 = 10'b0; | |
| 7877 | // end | |
| 7878 | //3'b011 : begin | |
| 7879 | // red_d_out_01 = red_odd_1; | |
| 7880 | // red_d_out_00 = 10'b0; | |
| 7881 | // end | |
| 7882 | //3'b101 : begin | |
| 7883 | // red_d_out_01 = {2'b0,red_col_1}; | |
| 7884 | // red_d_out_00 = 10'b0; | |
| 7885 | // end | |
| 7886 | // | |
| 7887 | //default : begin | |
| 7888 | // red_d_out_00 = red_top_d_00; | |
| 7889 | // red_d_out_01 = red_top_d_01; | |
| 7890 | // end | |
| 7891 | //endcase | |
| 7892 | //end | |
| 7893 | ||
| 7894 | // Col redudancy | |
| 7895 | ||
| 7896 | //reg [7:0] red_col_0; | |
| 7897 | //reg [7:0] red_col_1; | |
| 7898 | ||
| 7899 | reg [38:0] cred0; | |
| 7900 | reg [38:0] cred1; | |
| 7901 | ||
| 7902 | // Initialize cred0, cred1 | |
| 7903 | initial begin | |
| 7904 | cred0[38:0] = 39'b0; | |
| 7905 | cred1[38:0] = 39'b0; | |
| 7906 | end | |
| 7907 | ||
| 7908 | always@(red_col_0) | |
| 7909 | if(red_col_0[7] & red_col_0[6] & ~red_col_0[5]) | |
| 7910 | case(red_col_0) | |
| 7911 | 8'b11_0_00000 : cred0[18:0] = 19'b111_1111_1111_1111_1111; //0 | |
| 7912 | 8'b11_0_00001 : cred0[18:0] = 19'b111_1111_1111_1111_1110; //1 | |
| 7913 | 8'b11_0_00010 : cred0[18:0] = 19'b111_1111_1111_1111_1100; //2 | |
| 7914 | 8'b11_0_00011 : cred0[18:0] = 19'b111_1111_1111_1111_1000; //3 | |
| 7915 | 8'b11_0_00100 : cred0[18:0] = 19'b111_1111_1111_1111_0000; //4 | |
| 7916 | 8'b11_0_00101 : cred0[18:0] = 19'b111_1111_1111_1110_0000; //5 | |
| 7917 | 8'b11_0_00110 : cred0[18:0] = 19'b111_1111_1111_1100_0000; //6 | |
| 7918 | 8'b11_0_00111 : cred0[18:0] = 19'b111_1111_1111_1000_0000; //7 | |
| 7919 | 8'b11_0_01000 : cred0[18:0] = 19'b111_1111_1111_0000_0000; //8 | |
| 7920 | 8'b11_0_01001 : cred0[18:0] = 19'b111_1111_1110_0000_0000; //9 | |
| 7921 | 8'b11_0_01010 : cred0[18:0] = 19'b111_1111_1100_0000_0000; //10 | |
| 7922 | 8'b11_0_01011 : cred0[18:0] = 19'b111_1111_1000_0000_0000; //11 | |
| 7923 | 8'b11_0_01100 : cred0[18:0] = 19'b111_1111_0000_0000_0000; //12 | |
| 7924 | 8'b11_0_01101 : cred0[18:0] = 19'b111_1110_0000_0000_0000; //13 | |
| 7925 | 8'b11_0_01110 : cred0[18:0] = 19'b111_1100_0000_0000_0000; //14 | |
| 7926 | 8'b11_0_01111 : cred0[18:0] = 19'b111_1000_0000_0000_0000; //15 | |
| 7927 | 8'b11_0_10000 : cred0[18:0] = 19'b111_0000_0000_0000_0000; //16 | |
| 7928 | 8'b11_0_10001 : cred0[18:0] = 19'b110_0000_0000_0000_0000; //17 | |
| 7929 | 8'b11_0_10010 : cred0[18:0] = 19'b100_0000_0000_0000_0000; //18 | |
| 7930 | default : cred0[18:0] = 19'b0; | |
| 7931 | endcase | |
| 7932 | else cred0[18:0] = 19'b0; | |
| 7933 | ||
| 7934 | always@(red_col_0) | |
| 7935 | if(red_col_0[7] & red_col_0[6] & red_col_0[5]) | |
| 7936 | case(red_col_0) | |
| 7937 | 8'b11_1_00000 : cred0[38:19] = 20'b1111_1111_1111_1111_1111;//0 | |
| 7938 | 8'b11_1_00001 : cred0[38:19] = 20'b0111_1111_1111_1111_1111;//1 | |
| 7939 | 8'b11_1_00010 : cred0[38:19] = 20'b0011_1111_1111_1111_1111;//2 | |
| 7940 | 8'b11_1_00011 : cred0[38:19] = 20'b0001_1111_1111_1111_1111;//3 | |
| 7941 | 8'b11_1_00100 : cred0[38:19] = 20'b0000_1111_1111_1111_1111;//4 | |
| 7942 | 8'b11_1_00101 : cred0[38:19] = 20'b0000_0111_1111_1111_1111;//5 | |
| 7943 | 8'b11_1_00110 : cred0[38:19] = 20'b0000_0011_1111_1111_1111;//6 | |
| 7944 | 8'b11_1_00111 : cred0[38:19] = 20'b0000_0001_1111_1111_1111;//7 | |
| 7945 | 8'b11_1_01000 : cred0[38:19] = 20'b0000_0000_1111_1111_1111;//8 | |
| 7946 | 8'b11_1_01001 : cred0[38:19] = 20'b0000_0000_0111_1111_1111;//9 | |
| 7947 | 8'b11_1_01010 : cred0[38:19] = 20'b0000_0000_0011_1111_1111;//10 | |
| 7948 | 8'b11_1_01011 : cred0[38:19] = 20'b0000_0000_0001_1111_1111;//11 | |
| 7949 | 8'b11_1_01100 : cred0[38:19] = 20'b0000_0000_0000_1111_1111;//12 | |
| 7950 | 8'b11_1_01101 : cred0[38:19] = 20'b0000_0000_0000_0111_1111;//13 | |
| 7951 | 8'b11_1_01110 : cred0[38:19] = 20'b0000_0000_0000_0011_1111;//14 | |
| 7952 | 8'b11_1_01111 : cred0[38:19] = 20'b0000_0000_0000_0001_1111;//15 | |
| 7953 | 8'b11_1_10000 : cred0[38:19] = 20'b0000_0000_0000_0000_1111;//16 | |
| 7954 | 8'b11_1_10001 : cred0[38:19] = 20'b0000_0000_0000_0000_0111;//17 | |
| 7955 | 8'b11_1_10010 : cred0[38:19] = 20'b0000_0000_0000_0000_0011;//18 | |
| 7956 | 8'b11_1_10011 : cred0[38:19] = 20'b0000_0000_0000_0000_0001;//19 | |
| 7957 | default : cred0[38:19] = 20'b0; | |
| 7958 | endcase | |
| 7959 | else cred0[38:19] = 20'b0; | |
| 7960 | ||
| 7961 | always@(red_col_1) | |
| 7962 | if(red_col_1[7] & red_col_1[6] & red_col_1[5]) | |
| 7963 | case(red_col_1) | |
| 7964 | 8'b11_1_00000 : cred1[19:0] = 20'b1111_1111_1111_1111_1111; //0 | |
| 7965 | 8'b11_1_00001 : cred1[19:0] = 20'b1111_1111_1111_1111_1110; //1 | |
| 7966 | 8'b11_1_00010 : cred1[19:0] = 20'b1111_1111_1111_1111_1100; //2 | |
| 7967 | 8'b11_1_00011 : cred1[19:0] = 20'b1111_1111_1111_1111_1000; //3 | |
| 7968 | 8'b11_1_00100 : cred1[19:0] = 20'b1111_1111_1111_1111_0000; //4 | |
| 7969 | 8'b11_1_00101 : cred1[19:0] = 20'b1111_1111_1111_1110_0000; //5 | |
| 7970 | 8'b11_1_00110 : cred1[19:0] = 20'b1111_1111_1111_1100_0000; //6 | |
| 7971 | 8'b11_1_00111 : cred1[19:0] = 20'b1111_1111_1111_1000_0000; //7 | |
| 7972 | 8'b11_1_01000 : cred1[19:0] = 20'b1111_1111_1111_0000_0000; //8 | |
| 7973 | 8'b11_1_01001 : cred1[19:0] = 20'b1111_1111_1110_0000_0000; //9 | |
| 7974 | 8'b11_1_01010 : cred1[19:0] = 20'b1111_1111_1100_0000_0000; //10 | |
| 7975 | 8'b11_1_01011 : cred1[19:0] = 20'b1111_1111_1000_0000_0000; //11 | |
| 7976 | 8'b11_1_01100 : cred1[19:0] = 20'b1111_1111_0000_0000_0000; //12 | |
| 7977 | 8'b11_1_01101 : cred1[19:0] = 20'b1111_1110_0000_0000_0000; //13 | |
| 7978 | 8'b11_1_01110 : cred1[19:0] = 20'b1111_1100_0000_0000_0000; //14 | |
| 7979 | 8'b11_1_01111 : cred1[19:0] = 20'b1111_1000_0000_0000_0000; //15 | |
| 7980 | 8'b11_1_10000 : cred1[19:0] = 20'b1111_0000_0000_0000_0000; //16 | |
| 7981 | 8'b11_1_10001 : cred1[19:0] = 20'b1110_0000_0000_0000_0000; //17 | |
| 7982 | 8'b11_1_10010 : cred1[19:0] = 20'b1100_0000_0000_0000_0000; //18 | |
| 7983 | 8'b11_1_10011 : cred1[19:0] = 20'b1000_0000_0000_0000_0000; //19 | |
| 7984 | default : cred1[19:0] = 20'b0; | |
| 7985 | endcase | |
| 7986 | else cred1[19:0] = 20'b0; | |
| 7987 | ||
| 7988 | always@(red_col_1) | |
| 7989 | if(red_col_1[7] & red_col_1[6] & ~red_col_1[5]) | |
| 7990 | case(red_col_1) | |
| 7991 | 8'b11_0_00000 : cred1[38:20] = 19'b111_1111_1111_1111_1111;//0 | |
| 7992 | 8'b11_0_00001 : cred1[38:20] = 19'b011_1111_1111_1111_1111;//1 | |
| 7993 | 8'b11_0_00010 : cred1[38:20] = 19'b001_1111_1111_1111_1111;//2 | |
| 7994 | 8'b11_0_00011 : cred1[38:20] = 19'b000_1111_1111_1111_1111;//3 | |
| 7995 | 8'b11_0_00100 : cred1[38:20] = 19'b000_0111_1111_1111_1111;//4 | |
| 7996 | 8'b11_0_00101 : cred1[38:20] = 19'b000_0011_1111_1111_1111;//5 | |
| 7997 | 8'b11_0_00110 : cred1[38:20] = 19'b000_0001_1111_1111_1111;//6 | |
| 7998 | 8'b11_0_00111 : cred1[38:20] = 19'b000_0000_1111_1111_1111;//7 | |
| 7999 | 8'b11_0_01000 : cred1[38:20] = 19'b000_0000_0111_1111_1111;//8 | |
| 8000 | 8'b11_0_01001 : cred1[38:20] = 19'b000_0000_0011_1111_1111;//9 | |
| 8001 | 8'b11_0_01010 : cred1[38:20] = 19'b000_0000_0001_1111_1111;//10 | |
| 8002 | 8'b11_0_01011 : cred1[38:20] = 19'b000_0000_0000_1111_1111;//11 | |
| 8003 | 8'b11_0_01100 : cred1[38:20] = 19'b000_0000_0000_0111_1111;//12 | |
| 8004 | 8'b11_0_01101 : cred1[38:20] = 19'b000_0000_0000_0011_1111;//13 | |
| 8005 | 8'b11_0_01110 : cred1[38:20] = 19'b000_0000_0000_0001_1111;//14 | |
| 8006 | 8'b11_0_01111 : cred1[38:20] = 19'b000_0000_0000_0000_1111;//15 | |
| 8007 | 8'b11_0_10000 : cred1[38:20] = 19'b000_0000_0000_0000_0111;//16 | |
| 8008 | 8'b11_0_10001 : cred1[38:20] = 19'b000_0000_0000_0000_0011;//17 | |
| 8009 | 8'b11_0_10010 : cred1[38:20] = 19'b000_0000_0000_0000_0001;//18 | |
| 8010 | default : cred1[38:20] = 19'b0; | |
| 8011 | endcase | |
| 8012 | else cred1[38:20] = 19'b0; | |
| 8013 | ||
| 8014 | assign cred[77:0] = {cred1[38:0], cred0[38:0]}; | |
| 8015 | //assign cred[77:0] = 78'b0; | |
| 8016 | ||
| 8017 | ||
| 8018 | //assign fuse_l2d_reset_00_buf = fuse_l2d_reset_00; | |
| 8019 | //assign fuse_l2d_reset_01_buf = fuse_l2d_reset_01; | |
| 8020 | ||
| 8021 | ||
| 8022 | ||
| 8023 | ||
| 8024 | endmodule | |
| 8025 | ||
| 8026 | ||
| 8027 | // | |
| 8028 | // or macro for ports = 2,3 | |
| 8029 | // | |
| 8030 | // | |
| 8031 | ||
| 8032 | ||
| 8033 | ||
| 8034 | ||
| 8035 | ||
| 8036 | module n2_l2d_sp_512kb_cust_or_macro__ports_3__width_20 ( | |
| 8037 | din0, | |
| 8038 | din1, | |
| 8039 | din2, | |
| 8040 | dout); | |
| 8041 | input [19:0] din0; | |
| 8042 | input [19:0] din1; | |
| 8043 | input [19:0] din2; | |
| 8044 | output [19:0] dout; | |
| 8045 | ||
| 8046 | ||
| 8047 | ||
| 8048 | ||
| 8049 | ||
| 8050 | ||
| 8051 | or3 #(20) d0_0 ( | |
| 8052 | .in0(din0[19:0]), | |
| 8053 | .in1(din1[19:0]), | |
| 8054 | .in2(din2[19:0]), | |
| 8055 | .out(dout[19:0]) | |
| 8056 | ); | |
| 8057 | ||
| 8058 | ||
| 8059 | ||
| 8060 | ||
| 8061 | ||
| 8062 | ||
| 8063 | ||
| 8064 | ||
| 8065 | ||
| 8066 | endmodule | |
| 8067 | ||
| 8068 | ||
| 8069 | ||
| 8070 | ||
| 8071 | ||
| 8072 | // | |
| 8073 | // or macro for ports = 2,3 | |
| 8074 | // | |
| 8075 | // | |
| 8076 | ||
| 8077 | ||
| 8078 | ||
| 8079 | ||
| 8080 | ||
| 8081 | module n2_l2d_sp_512kb_cust_or_macro__ports_3__width_19 ( | |
| 8082 | din0, | |
| 8083 | din1, | |
| 8084 | din2, | |
| 8085 | dout); | |
| 8086 | input [18:0] din0; | |
| 8087 | input [18:0] din1; | |
| 8088 | input [18:0] din2; | |
| 8089 | output [18:0] dout; | |
| 8090 | ||
| 8091 | ||
| 8092 | ||
| 8093 | ||
| 8094 | ||
| 8095 | ||
| 8096 | or3 #(19) d0_0 ( | |
| 8097 | .in0(din0[18:0]), | |
| 8098 | .in1(din1[18:0]), | |
| 8099 | .in2(din2[18:0]), | |
| 8100 | .out(dout[18:0]) | |
| 8101 | ); | |
| 8102 | ||
| 8103 | ||
| 8104 | ||
| 8105 | ||
| 8106 | ||
| 8107 | ||
| 8108 | ||
| 8109 | ||
| 8110 | ||
| 8111 | endmodule | |
| 8112 | ||
| 8113 | ||
| 8114 | ||
| 8115 | ||
| 8116 | ||
| 8117 | module n2_l2d_ctrlio_cust ( | |
| 8118 | l2t_l2d_word_en_c2, | |
| 8119 | l2t_l2d_fbrd_c3, | |
| 8120 | l2t_l2d_col_offset_c2, | |
| 8121 | l2t_l2d_set_c2, | |
| 8122 | l2t_l2d_rd_wr_c3, | |
| 8123 | l2t_l2d_way_sel_c3, | |
| 8124 | l2t_l2d_fb_hit_c3, | |
| 8125 | l2clk, | |
| 8126 | tcu_aclk, | |
| 8127 | tcu_bclk, | |
| 8128 | tcu_scan_en, | |
| 8129 | tcu_pce_ov, | |
| 8130 | tcu_ce, | |
| 8131 | tcu_clk_stop, | |
| 8132 | array_wr_inhibit, | |
| 8133 | scan_in, | |
| 8134 | tcu_se_scancollar_in, | |
| 8135 | tcu_se_scancollar_out, | |
| 8136 | wayerr_c3, | |
| 8137 | l2t_l2d_pwrsav_ov_stg, | |
| 8138 | scan_out, | |
| 8139 | cache_col_offset_all_c7, | |
| 8140 | aclk, | |
| 8141 | bclk, | |
| 8142 | scan_en_clsrhdr, | |
| 8143 | l2b_l2d_fbdecc_c5, | |
| 8144 | l2t_l2d_stdecc_c2, | |
| 8145 | cache_decc_out_c5b, | |
| 8146 | l2d_decc_out_c6, | |
| 8147 | cache_decc_in_c3b_l, | |
| 8148 | l2d_l2t_decc_c52_mux, | |
| 8149 | cache_way_sel_c3_00, | |
| 8150 | cache_way_sel_c3_01, | |
| 8151 | cache_way_sel_c3_10, | |
| 8152 | cache_way_sel_c3_11, | |
| 8153 | cache_way_sel_c3_20, | |
| 8154 | cache_way_sel_c3_21, | |
| 8155 | cache_way_sel_c3_30, | |
| 8156 | cache_way_sel_c3_31, | |
| 8157 | cache_wayerr_c3_00, | |
| 8158 | cache_wayerr_c3_01, | |
| 8159 | cache_wayerr_c3_10, | |
| 8160 | cache_wayerr_c3_11, | |
| 8161 | cache_wayerr_c3_20, | |
| 8162 | cache_wayerr_c3_21, | |
| 8163 | cache_wayerr_c3_30, | |
| 8164 | cache_wayerr_c3_31, | |
| 8165 | cache_set_c3_00, | |
| 8166 | cache_set_c3_01, | |
| 8167 | cache_set_c3_10, | |
| 8168 | cache_set_c3_11, | |
| 8169 | cache_set_c3_20, | |
| 8170 | cache_set_c3_21, | |
| 8171 | cache_set_c3_30, | |
| 8172 | cache_set_c3_31, | |
| 8173 | cache_col_offset_c3_00, | |
| 8174 | cache_col_offset_c3_01, | |
| 8175 | cache_col_offset_c3_10, | |
| 8176 | cache_col_offset_c3_11, | |
| 8177 | cache_col_offset_c3_20, | |
| 8178 | cache_col_offset_c3_21, | |
| 8179 | cache_col_offset_c3_30, | |
| 8180 | cache_col_offset_c3_31, | |
| 8181 | cache_col_offset_c4_l_00, | |
| 8182 | cache_col_offset_c4_l_01, | |
| 8183 | cache_col_offset_c4_l_10, | |
| 8184 | cache_col_offset_c4_l_11, | |
| 8185 | cache_col_offset_c4_l_20, | |
| 8186 | cache_col_offset_c4_l_21, | |
| 8187 | cache_col_offset_c4_l_30, | |
| 8188 | cache_col_offset_c4_l_31, | |
| 8189 | cache_col_offset_c5_00, | |
| 8190 | cache_col_offset_c5_01, | |
| 8191 | cache_col_offset_c5_10, | |
| 8192 | cache_col_offset_c5_11, | |
| 8193 | cache_col_offset_c5_20, | |
| 8194 | cache_col_offset_c5_21, | |
| 8195 | cache_col_offset_c5_30, | |
| 8196 | cache_col_offset_c5_31, | |
| 8197 | cache_rd_wr_c3_00, | |
| 8198 | cache_rd_wr_c3_01, | |
| 8199 | cache_rd_wr_c3_10, | |
| 8200 | cache_rd_wr_c3_11, | |
| 8201 | cache_rd_wr_c3_20, | |
| 8202 | cache_rd_wr_c3_21, | |
| 8203 | cache_rd_wr_c3_30, | |
| 8204 | cache_rd_wr_c3_31, | |
| 8205 | cache_readen_c5_00, | |
| 8206 | cache_readen_c5_01, | |
| 8207 | cache_readen_c5_10, | |
| 8208 | cache_readen_c5_11, | |
| 8209 | cache_readen_c5_20, | |
| 8210 | cache_readen_c5_21, | |
| 8211 | cache_readen_c5_30, | |
| 8212 | cache_readen_c5_31, | |
| 8213 | cache_word_en_c3_00, | |
| 8214 | cache_word_en_c3_01, | |
| 8215 | cache_word_en_c3_10, | |
| 8216 | cache_word_en_c3_11, | |
| 8217 | cache_word_en_c3_20, | |
| 8218 | cache_word_en_c3_21, | |
| 8219 | cache_word_en_c3_30, | |
| 8220 | cache_word_en_c3_31, | |
| 8221 | tcu_pce_ov_00, | |
| 8222 | tcu_pce_ov_01, | |
| 8223 | tcu_pce_ov_10, | |
| 8224 | tcu_pce_ov_11, | |
| 8225 | tcu_pce_ov_20, | |
| 8226 | tcu_pce_ov_21, | |
| 8227 | tcu_pce_ov_30, | |
| 8228 | tcu_pce_ov_31, | |
| 8229 | tcu_pce_00, | |
| 8230 | tcu_pce_01, | |
| 8231 | tcu_pce_10, | |
| 8232 | tcu_pce_11, | |
| 8233 | tcu_pce_20, | |
| 8234 | tcu_pce_21, | |
| 8235 | tcu_pce_30, | |
| 8236 | tcu_pce_31, | |
| 8237 | tcu_clk_stop_00, | |
| 8238 | tcu_clk_stop_01, | |
| 8239 | tcu_clk_stop_10, | |
| 8240 | tcu_clk_stop_11, | |
| 8241 | tcu_clk_stop_20, | |
| 8242 | tcu_clk_stop_21, | |
| 8243 | tcu_clk_stop_30, | |
| 8244 | tcu_clk_stop_31, | |
| 8245 | se_00, | |
| 8246 | se_01, | |
| 8247 | se_10, | |
| 8248 | se_11, | |
| 8249 | se_20, | |
| 8250 | se_21, | |
| 8251 | se_30, | |
| 8252 | se_31, | |
| 8253 | l2b_l2d_fuse_l2d_data_in_d, | |
| 8254 | l2b_l2d_fuse_rid_d, | |
| 8255 | l2b_l2d_fuse_reset_l, | |
| 8256 | l2b_l2d_fuse_l2d_wren_d, | |
| 8257 | efc_fuse_data, | |
| 8258 | fuse_l2d_data_in_131, | |
| 8259 | fuse_l2d_rid_131, | |
| 8260 | fuse_l2d_wren_131, | |
| 8261 | fuse_l2d_reset_131_l, | |
| 8262 | fdout_131, | |
| 8263 | fuse_l2d_data_in_031, | |
| 8264 | fuse_l2d_rid_031, | |
| 8265 | fuse_l2d_wren_031, | |
| 8266 | fuse_l2d_reset_031_l, | |
| 8267 | fdout_031, | |
| 8268 | fuse_l2d_data_in_130, | |
| 8269 | fuse_l2d_rid_130, | |
| 8270 | fuse_l2d_wren_130, | |
| 8271 | fuse_l2d_reset_130_l, | |
| 8272 | fdout_130, | |
| 8273 | fuse_l2d_data_in_030, | |
| 8274 | fuse_l2d_rid_030, | |
| 8275 | fuse_l2d_wren_030, | |
| 8276 | fuse_l2d_reset_030_l, | |
| 8277 | fdout_030, | |
| 8278 | fuse_l2d_data_in_111, | |
| 8279 | fuse_l2d_rid_111, | |
| 8280 | fuse_l2d_wren_111, | |
| 8281 | fuse_l2d_reset_111_l, | |
| 8282 | fdout_111, | |
| 8283 | fuse_l2d_data_in_011, | |
| 8284 | fuse_l2d_rid_011, | |
| 8285 | fuse_l2d_wren_011, | |
| 8286 | fuse_l2d_reset_011_l, | |
| 8287 | fdout_011, | |
| 8288 | fuse_l2d_data_in_110, | |
| 8289 | fuse_l2d_rid_110, | |
| 8290 | fuse_l2d_wren_110, | |
| 8291 | fuse_l2d_reset_110_l, | |
| 8292 | fdout_110, | |
| 8293 | fuse_l2d_data_in_010, | |
| 8294 | fuse_l2d_rid_010, | |
| 8295 | fuse_l2d_wren_010, | |
| 8296 | fuse_l2d_reset_010_l, | |
| 8297 | fdout_010, | |
| 8298 | fuse_l2d_data_in_121, | |
| 8299 | fuse_l2d_rid_121, | |
| 8300 | fuse_l2d_wren_121, | |
| 8301 | fuse_l2d_reset_121_l, | |
| 8302 | fdout_121, | |
| 8303 | fuse_l2d_data_in_021, | |
| 8304 | fuse_l2d_rid_021, | |
| 8305 | fuse_l2d_wren_021, | |
| 8306 | fuse_l2d_reset_021_l, | |
| 8307 | fdout_021, | |
| 8308 | fuse_l2d_data_in_120, | |
| 8309 | fuse_l2d_rid_120, | |
| 8310 | fuse_l2d_wren_120, | |
| 8311 | fuse_l2d_reset_120_l, | |
| 8312 | fdout_120, | |
| 8313 | fuse_l2d_data_in_020, | |
| 8314 | fuse_l2d_rid_020, | |
| 8315 | fuse_l2d_wren_020, | |
| 8316 | fuse_l2d_reset_020_l, | |
| 8317 | fdout_020, | |
| 8318 | fuse_l2d_data_in_101, | |
| 8319 | fuse_l2d_rid_101, | |
| 8320 | fuse_l2d_wren_101, | |
| 8321 | fuse_l2d_reset_101_l, | |
| 8322 | fdout_101, | |
| 8323 | fuse_l2d_data_in_001, | |
| 8324 | fuse_l2d_rid_001, | |
| 8325 | fuse_l2d_wren_001, | |
| 8326 | fuse_l2d_reset_001_l, | |
| 8327 | fdout_001, | |
| 8328 | fuse_l2d_data_in_100, | |
| 8329 | fuse_l2d_rid_100, | |
| 8330 | fuse_l2d_wren_100, | |
| 8331 | fuse_l2d_reset_100_l, | |
| 8332 | fdout_100, | |
| 8333 | fuse_l2d_data_in_000, | |
| 8334 | fuse_l2d_rid_000, | |
| 8335 | fuse_l2d_wren_000, | |
| 8336 | fuse_l2d_reset_000_l, | |
| 8337 | fdout_000, | |
| 8338 | siclk_peri, | |
| 8339 | soclk_peri, | |
| 8340 | pce_ov_peri, | |
| 8341 | pce_peri, | |
| 8342 | scan_collarin_peri, | |
| 8343 | scan_collarout_peri, | |
| 8344 | wr_inhibit_peri, | |
| 8345 | clk_stop_peri, | |
| 8346 | wee_l_q00, | |
| 8347 | wee_l_q01, | |
| 8348 | wee_l_q10, | |
| 8349 | wee_l_q11, | |
| 8350 | wee_l_q20, | |
| 8351 | wee_l_q21, | |
| 8352 | wee_l_q30, | |
| 8353 | wee_l_q31, | |
| 8354 | delout00, | |
| 8355 | delout01, | |
| 8356 | delout10, | |
| 8357 | delout11, | |
| 8358 | delout20, | |
| 8359 | delout21, | |
| 8360 | delout30, | |
| 8361 | delout31); | |
| 8362 | wire tcu_array_wr_inhibit; | |
| 8363 | wire l1clk_in; | |
| 8364 | wire l1clk_intnl; | |
| 8365 | wire evit_pce_c6; | |
| 8366 | wire l1clk_evict_c6; | |
| 8367 | wire [8:0] ff_cache_set_c3_scanin; | |
| 8368 | wire [8:0] ff_cache_set_c3_scanout; | |
| 8369 | wire [8:0] cache_set_c3; | |
| 8370 | wire [3:0] ff_cache_col_offset_c3_scanin; | |
| 8371 | wire [3:0] ff_cache_col_offset_c3_scanout; | |
| 8372 | wire [3:0] cache_col_offset_c3; | |
| 8373 | wire [3:0] ff_cache_col_offset_c4_scanin; | |
| 8374 | wire [3:0] ff_cache_col_offset_c4_scanout; | |
| 8375 | wire [3:0] cache_col_offset_c4_muxsel; | |
| 8376 | wire [3:0] ff_cache_col_offset_c5_muxsel_scanin; | |
| 8377 | wire [3:0] ff_cache_col_offset_c5_muxsel_scanout; | |
| 8378 | wire [3:0] cache_col_offset_c5_muxsel; | |
| 8379 | wire [1:0] ff_cache_col_offset_c52_scanin; | |
| 8380 | wire [1:0] ff_cache_col_offset_c52_scanout; | |
| 8381 | wire [3:2] cache_col_offset_c52; | |
| 8382 | wire cache_col_offset_c5_muxsel_3_or_1; | |
| 8383 | wire [0:0] ff_cache_col_offset_c52_topsel_scanin; | |
| 8384 | wire [0:0] ff_cache_col_offset_c52_topsel_scanout; | |
| 8385 | wire cache_col_offset_c52_topsel; | |
| 8386 | wire cache_col_offset_all_c3; | |
| 8387 | wire [0:0] ff_cache_col_offset_all_c4_scanin; | |
| 8388 | wire [0:0] ff_cache_col_offset_all_c4_scanout; | |
| 8389 | wire cache_col_offset_all_c4; | |
| 8390 | wire [0:0] ff_cache_col_offset_all_c5_scanin; | |
| 8391 | wire [0:0] ff_cache_col_offset_all_c5_scanout; | |
| 8392 | wire cache_col_offset_all_c5; | |
| 8393 | wire [0:0] ff_cache_col_offset_all_c6_scanin; | |
| 8394 | wire [0:0] ff_cache_col_offset_all_c6_scanout; | |
| 8395 | wire cache_col_offset_all_c6; | |
| 8396 | wire [0:0] ff_cache_col_offset_all_c7_scanin; | |
| 8397 | wire [0:0] ff_cache_col_offset_all_c7_scanout; | |
| 8398 | wire tcu_array_wr_inhibit_n; | |
| 8399 | wire cache_col_offset_c3_2_tcu_array_wr_inhibit_n; | |
| 8400 | wire cache_col_offset_c3_0_tcu_array_wr_inhibit_n; | |
| 8401 | wire cache_col_offset_c3_3_tcu_array_wr_inhibit_n; | |
| 8402 | wire cache_col_offset_c3_1_tcu_array_wr_inhibit_n; | |
| 8403 | wire cache_col_offset_c4_tog_001_0_n; | |
| 8404 | wire cache_col_offset_c4_tog_101_0_n; | |
| 8405 | wire cache_col_offset_c4_tog_001_1_n; | |
| 8406 | wire cache_col_offset_c4_tog_101_1_n; | |
| 8407 | wire cache_col_offset_c4_tog_023_0_n; | |
| 8408 | wire cache_col_offset_c4_tog_123_0_n; | |
| 8409 | wire cache_col_offset_c4_tog_023_1_n; | |
| 8410 | wire cache_col_offset_c4_tog_123_1_n; | |
| 8411 | wire [1:0] cache_col_offset_c4_tog_001; | |
| 8412 | wire [1:0] cache_col_offset_c4_tog_101; | |
| 8413 | wire [1:0] cache_col_offset_c4_tog_023; | |
| 8414 | wire [1:0] cache_col_offset_c4_tog_123; | |
| 8415 | wire [3:0] cache_col_offset_c3_n; | |
| 8416 | wire [3:0] wr_inhibit_cache_col_offset_c3_l; | |
| 8417 | wire [3:0] wr_inhibit_cache_col_offset_c3; | |
| 8418 | wire [1:0] cache_col_offset_c4_tog_001_n; | |
| 8419 | wire wayerr_c3_n; | |
| 8420 | wire [1:0] wayerr_cache_col_offset_c4_l_tog_001; | |
| 8421 | wire [1:0] cache_col_offset_c4_tog_101_n; | |
| 8422 | wire [1:0] wayerr_cache_col_offset_c4_l_tog_101; | |
| 8423 | wire [1:0] cache_col_offset_c4_tog_023_n; | |
| 8424 | wire [1:0] wayerr_cache_col_offset_c4_l_tog_023; | |
| 8425 | wire [1:0] cache_col_offset_c4_tog_123_n; | |
| 8426 | wire [1:0] wayerr_cache_col_offset_c4_l_tog_123; | |
| 8427 | wire cache_col_offset_c3_top; | |
| 8428 | wire cache_col_offset_c3_bot; | |
| 8429 | wire [1:0] cache_col_offset_c4_tog_in_001; | |
| 8430 | wire [1:0] cache_col_offset_c4_tog_in_101; | |
| 8431 | wire [1:0] cache_col_offset_c4_tog_in_023; | |
| 8432 | wire [1:0] cache_col_offset_c4_tog_in_123; | |
| 8433 | wire [1:0] ff_cache_col_offset_c4_tog_001_scanin; | |
| 8434 | wire [1:0] ff_cache_col_offset_c4_tog_001_scanout; | |
| 8435 | wire [1:0] ff_cache_col_offset_c4_tog_101_scanin; | |
| 8436 | wire [1:0] ff_cache_col_offset_c4_tog_101_scanout; | |
| 8437 | wire [1:0] ff_cache_col_offset_c4_tog_023_scanin; | |
| 8438 | wire [1:0] ff_cache_col_offset_c4_tog_023_scanout; | |
| 8439 | wire [1:0] ff_cache_col_offset_c4_tog_123_scanin; | |
| 8440 | wire [1:0] ff_cache_col_offset_c4_tog_123_scanout; | |
| 8441 | wire [3:0] ff_cache_col_offset_c4_001_scanin; | |
| 8442 | wire [3:0] ff_cache_col_offset_c4_001_scanout; | |
| 8443 | wire [3:0] cache_col_offset_c4_001; | |
| 8444 | wire [3:0] ff_cache_col_offset_c4_101_scanin; | |
| 8445 | wire [3:0] ff_cache_col_offset_c4_101_scanout; | |
| 8446 | wire [3:0] cache_col_offset_c4_101; | |
| 8447 | wire [3:0] ff_cache_col_offset_c4_023_scanin; | |
| 8448 | wire [3:0] ff_cache_col_offset_c4_023_scanout; | |
| 8449 | wire [3:0] cache_col_offset_c4_023; | |
| 8450 | wire [3:0] ff_cache_col_offset_c4_123_scanin; | |
| 8451 | wire [3:0] ff_cache_col_offset_c4_123_scanout; | |
| 8452 | wire [3:0] cache_col_offset_c4_123; | |
| 8453 | wire [3:0] cache_col_offset_c5_001_in; | |
| 8454 | wire [3:0] cache_col_offset_c5_101_in; | |
| 8455 | wire [3:0] cache_col_offset_c5_023_in; | |
| 8456 | wire [3:0] cache_col_offset_c5_123_in; | |
| 8457 | wire [3:0] ff_cache_col_offset_c5_001_scanin; | |
| 8458 | wire [3:0] ff_cache_col_offset_c5_001_scanout; | |
| 8459 | wire [3:0] cache_col_offset_c5_001; | |
| 8460 | wire [3:0] ff_cache_col_offset_c5_101_scanin; | |
| 8461 | wire [3:0] ff_cache_col_offset_c5_101_scanout; | |
| 8462 | wire [3:0] cache_col_offset_c5_101; | |
| 8463 | wire [3:0] ff_cache_col_offset_c5_023_scanin; | |
| 8464 | wire [3:0] ff_cache_col_offset_c5_023_scanout; | |
| 8465 | wire [3:0] cache_col_offset_c5_023; | |
| 8466 | wire [3:0] ff_cache_col_offset_c5_123_scanin; | |
| 8467 | wire [3:0] ff_cache_col_offset_c5_123_scanout; | |
| 8468 | wire [3:0] cache_col_offset_c5_123; | |
| 8469 | wire cache_rd_wr_c3_generic; | |
| 8470 | wire cache_rd_wr_c3_next_stage; | |
| 8471 | wire [0:0] ff_cache_cache_rd_wr_c4_scanin; | |
| 8472 | wire [0:0] ff_cache_cache_rd_wr_c4_scanout; | |
| 8473 | wire cache_rd_wr_c4; | |
| 8474 | wire [0:0] ff_cache_cache_rd_wr_c5_00_scanin; | |
| 8475 | wire [0:0] ff_cache_cache_rd_wr_c5_00_scanout; | |
| 8476 | wire cache_rd_wr_c5_00; | |
| 8477 | wire [0:0] ff_cache_cache_rd_wr_c5_01_scanin; | |
| 8478 | wire [0:0] ff_cache_cache_rd_wr_c5_01_scanout; | |
| 8479 | wire cache_rd_wr_c5_01; | |
| 8480 | wire [0:0] ff_cache_cache_rd_wr_c5_20_scanin; | |
| 8481 | wire [0:0] ff_cache_cache_rd_wr_c5_20_scanout; | |
| 8482 | wire cache_rd_wr_c5_20; | |
| 8483 | wire [0:0] ff_cache_cache_rd_wr_c5_21_scanin; | |
| 8484 | wire [0:0] ff_cache_cache_rd_wr_c5_21_scanout; | |
| 8485 | wire cache_rd_wr_c5_21; | |
| 8486 | wire [15:0] ff_cache_word_en_c3_scanin; | |
| 8487 | wire [15:0] ff_cache_word_en_c3_scanout; | |
| 8488 | wire [15:0] cache_word_en_c3; | |
| 8489 | wire [0:0] ff_cache_sel_fbdecc_c4_scanin; | |
| 8490 | wire [0:0] ff_cache_sel_fbdecc_c4_scanout; | |
| 8491 | wire cache_sel_fbdecc_c4; | |
| 8492 | wire [0:0] ff_cache_sel_fbdecc_c5_scanin; | |
| 8493 | wire [0:0] ff_cache_sel_fbdecc_c5_scanout; | |
| 8494 | wire cache_sel_fbdecc_c5; | |
| 8495 | wire cache_sel_fbdecc_c5_n; | |
| 8496 | wire [77:0] ff_l2t_l2d_stdecc_c3_scanin; | |
| 8497 | wire [77:0] ff_l2t_l2d_stdecc_c3_scanout; | |
| 8498 | wire [77:0] l2t_l2d_stdecc_c3; | |
| 8499 | wire [0:0] ff_cache_fb_hit_c4_scanin; | |
| 8500 | wire [0:0] ff_cache_fb_hit_c4_scanout; | |
| 8501 | wire cache_fb_hit_c4; | |
| 8502 | wire [0:0] ff_cache_fb_hit_c5_scanin; | |
| 8503 | wire [0:0] ff_cache_fb_hit_c5_scanout; | |
| 8504 | wire cache_fb_hit_c5; | |
| 8505 | wire [0:0] ff_cache_fb_hit_c52_scanin; | |
| 8506 | wire [0:0] ff_cache_fb_hit_c52_scanout; | |
| 8507 | wire cache_fb_hit_c52; | |
| 8508 | wire cache_fb_hit_c52_n; | |
| 8509 | wire [38:0] ff_l2b_l2d_fbdecc_c52_lo0_1_scanin; | |
| 8510 | wire [38:0] ff_l2b_l2d_fbdecc_c52_lo0_1_scanout; | |
| 8511 | wire [38:0] ff_l2b_l2d_fbdecc_c52_lo0_2_scanin; | |
| 8512 | wire [38:0] ff_l2b_l2d_fbdecc_c52_lo0_2_scanout; | |
| 8513 | wire [38:0] ff_l2b_l2d_fbdecc_c52_hi0_1_scanin; | |
| 8514 | wire [38:0] ff_l2b_l2d_fbdecc_c52_hi0_1_scanout; | |
| 8515 | wire [38:0] ff_l2b_l2d_fbdecc_c52_hi0_2_scanin; | |
| 8516 | wire [38:0] ff_l2b_l2d_fbdecc_c52_hi0_2_scanout; | |
| 8517 | wire [38:0] ff_l2b_l2d_fbdecc_c52_lo0_3_scanin; | |
| 8518 | wire [38:0] ff_l2b_l2d_fbdecc_c52_lo0_3_scanout; | |
| 8519 | wire [38:0] ff_l2b_l2d_fbdecc_c52_lo0_4_scanin; | |
| 8520 | wire [38:0] ff_l2b_l2d_fbdecc_c52_lo0_4_scanout; | |
| 8521 | wire [38:0] ff_l2b_l2d_fbdecc_c52_hi0_3_scanin; | |
| 8522 | wire [38:0] ff_l2b_l2d_fbdecc_c52_hi0_3_scanout; | |
| 8523 | wire [38:0] ff_l2b_l2d_fbdecc_c52_hi0_4_scanin; | |
| 8524 | wire [38:0] ff_l2b_l2d_fbdecc_c52_hi0_4_scanout; | |
| 8525 | wire [38:0] ff_l2b_l2d_fbdecc_c52_lo1_1_scanin; | |
| 8526 | wire [38:0] ff_l2b_l2d_fbdecc_c52_lo1_1_scanout; | |
| 8527 | wire [38:0] ff_l2b_l2d_fbdecc_c52_lo1_2_scanin; | |
| 8528 | wire [38:0] ff_l2b_l2d_fbdecc_c52_lo1_2_scanout; | |
| 8529 | wire [38:0] ff_l2b_l2d_fbdecc_c52_hi1_1_scanin; | |
| 8530 | wire [38:0] ff_l2b_l2d_fbdecc_c52_hi1_1_scanout; | |
| 8531 | wire [38:0] ff_l2b_l2d_fbdecc_c52_hi1_2_scanin; | |
| 8532 | wire [38:0] ff_l2b_l2d_fbdecc_c52_hi1_2_scanout; | |
| 8533 | wire [38:0] ff_l2b_l2d_fbdecc_c52_lo1_3_scanin; | |
| 8534 | wire [38:0] ff_l2b_l2d_fbdecc_c52_lo1_3_scanout; | |
| 8535 | wire [38:0] ff_l2b_l2d_fbdecc_c52_lo1_4_scanin; | |
| 8536 | wire [38:0] ff_l2b_l2d_fbdecc_c52_lo1_4_scanout; | |
| 8537 | wire [38:0] ff_l2b_l2d_fbdecc_c52_hi1_3_scanin; | |
| 8538 | wire [38:0] ff_l2b_l2d_fbdecc_c52_hi1_3_scanout; | |
| 8539 | wire [38:0] ff_l2b_l2d_fbdecc_c52_hi1_4_scanin; | |
| 8540 | wire [38:0] ff_l2b_l2d_fbdecc_c52_hi1_4_scanout; | |
| 8541 | wire [38:0] ff_l2d_decc_out_c6_lo0_1_scanin; | |
| 8542 | wire [38:0] ff_l2d_decc_out_c6_lo0_1_scanout; | |
| 8543 | wire [155:0] l2d_l2t_decc_c52_0; | |
| 8544 | wire [38:0] ff_l2d_decc_out_c6_lo0_2_scanin; | |
| 8545 | wire [38:0] ff_l2d_decc_out_c6_lo0_2_scanout; | |
| 8546 | wire [38:0] ff_l2d_decc_out_c6_hi0_1_scanin; | |
| 8547 | wire [38:0] ff_l2d_decc_out_c6_hi0_1_scanout; | |
| 8548 | wire [38:0] ff_l2d_decc_out_c6_hi0_2_scanin; | |
| 8549 | wire [38:0] ff_l2d_decc_out_c6_hi0_2_scanout; | |
| 8550 | wire [38:0] ff_l2d_decc_out_c6_lo0_3_scanin; | |
| 8551 | wire [38:0] ff_l2d_decc_out_c6_lo0_3_scanout; | |
| 8552 | wire [155:0] l2d_l2t_decc_c52_1; | |
| 8553 | wire [38:0] ff_l2d_decc_out_c6_lo0_4_scanin; | |
| 8554 | wire [38:0] ff_l2d_decc_out_c6_lo0_4_scanout; | |
| 8555 | wire [38:0] ff_l2d_decc_out_c6_hi0_3_scanin; | |
| 8556 | wire [38:0] ff_l2d_decc_out_c6_hi0_3_scanout; | |
| 8557 | wire [38:0] ff_l2d_decc_out_c6_hi0_4_scanin; | |
| 8558 | wire [38:0] ff_l2d_decc_out_c6_hi0_4_scanout; | |
| 8559 | wire [38:0] ff_l2d_decc_out_c6_lo1_1_scanin; | |
| 8560 | wire [38:0] ff_l2d_decc_out_c6_lo1_1_scanout; | |
| 8561 | wire [155:0] l2d_l2t_decc_c52_2; | |
| 8562 | wire [38:0] ff_l2d_decc_out_c6_lo1_2_scanin; | |
| 8563 | wire [38:0] ff_l2d_decc_out_c6_lo1_2_scanout; | |
| 8564 | wire [38:0] ff_l2d_decc_out_c6_hi1_1_scanin; | |
| 8565 | wire [38:0] ff_l2d_decc_out_c6_hi1_1_scanout; | |
| 8566 | wire [38:0] ff_l2d_decc_out_c6_hi1_2_scanin; | |
| 8567 | wire [38:0] ff_l2d_decc_out_c6_hi1_2_scanout; | |
| 8568 | wire [38:0] ff_l2d_decc_out_c6_lo1_3_scanin; | |
| 8569 | wire [38:0] ff_l2d_decc_out_c6_lo1_3_scanout; | |
| 8570 | wire [155:0] l2d_l2t_decc_c52_3; | |
| 8571 | wire [38:0] ff_l2d_decc_out_c6_lo1_4_scanin; | |
| 8572 | wire [38:0] ff_l2d_decc_out_c6_lo1_4_scanout; | |
| 8573 | wire [38:0] ff_l2d_decc_out_c6_hi1_3_scanin; | |
| 8574 | wire [38:0] ff_l2d_decc_out_c6_hi1_3_scanout; | |
| 8575 | wire [38:0] ff_l2d_decc_out_c6_hi1_4_scanin; | |
| 8576 | wire [38:0] ff_l2d_decc_out_c6_hi1_4_scanout; | |
| 8577 | wire [155:0] cache_decc_out_0_c52; | |
| 8578 | wire [155:0] cache_decc_out_1_c52; | |
| 8579 | wire [155:0] cache_decc_out_2_c52; | |
| 8580 | wire [155:0] cache_decc_out_3_c52; | |
| 8581 | wire [623:0] cache_decc_out_c52; | |
| 8582 | wire cache_rd_wr_c3; | |
| 8583 | wire [155:0] l2d_l2t_decc_c52_20; | |
| 8584 | wire [155:0] l2d_l2t_decc_c52_31; | |
| 8585 | wire itis0000; | |
| 8586 | wire itis0001; | |
| 8587 | wire itis0010; | |
| 8588 | wire itis0011; | |
| 8589 | wire itis0100; | |
| 8590 | wire itis0101; | |
| 8591 | wire itis0110; | |
| 8592 | wire itis0111; | |
| 8593 | wire itis1000; | |
| 8594 | wire itis1001; | |
| 8595 | wire itis1010; | |
| 8596 | wire itis1011; | |
| 8597 | wire itis1100; | |
| 8598 | wire itis1101; | |
| 8599 | wire itis1110; | |
| 8600 | wire itis1111; | |
| 8601 | wire l2b_l2d_fuse_rid_d_0n; | |
| 8602 | wire or_fuse_l2d_rid_131; | |
| 8603 | wire stage1_mux_sel0; | |
| 8604 | wire or_fuse_l2d_rid_121; | |
| 8605 | wire stage1_mux_sel1; | |
| 8606 | wire stage1_mux_sel2; | |
| 8607 | wire [9:0] fdout_stage1; | |
| 8608 | wire or_fuse_l2d_rid_031; | |
| 8609 | wire stage2_mux_sel0; | |
| 8610 | wire or_fuse_l2d_rid_021; | |
| 8611 | wire stage2_mux_sel1; | |
| 8612 | wire stage2_mux_sel2; | |
| 8613 | wire [9:0] fdout_stage2; | |
| 8614 | wire or_fuse_l2d_rid_130; | |
| 8615 | wire stage3_mux_sel0; | |
| 8616 | wire or_fuse_l2d_rid_120; | |
| 8617 | wire stage3_mux_sel1; | |
| 8618 | wire stage3_mux_sel2; | |
| 8619 | wire [9:0] fdout_stage3; | |
| 8620 | wire or_fuse_l2d_rid_030; | |
| 8621 | wire stage4_mux_sel0; | |
| 8622 | wire or_fuse_l2d_rid_020; | |
| 8623 | wire stage4_mux_sel1; | |
| 8624 | wire stage4_mux_sel2; | |
| 8625 | wire [9:0] fdout_stage4; | |
| 8626 | wire or_fuse_l2d_rid_010; | |
| 8627 | wire stage10_mux_sel0; | |
| 8628 | wire or_fuse_l2d_rid_000; | |
| 8629 | wire stage10_mux_sel1; | |
| 8630 | wire stage10_mux_sel2; | |
| 8631 | wire [9:0] fdout_stage10; | |
| 8632 | wire or_fuse_l2d_rid_110; | |
| 8633 | wire stage20_mux_sel0; | |
| 8634 | wire or_fuse_l2d_rid_100; | |
| 8635 | wire stage20_mux_sel1; | |
| 8636 | wire stage20_mux_sel2; | |
| 8637 | wire [9:0] fdout_stage20; | |
| 8638 | wire or_fuse_l2d_rid_011; | |
| 8639 | wire stage30_mux_sel0; | |
| 8640 | wire or_fuse_l2d_rid_001; | |
| 8641 | wire stage30_mux_sel1; | |
| 8642 | wire stage30_mux_sel2; | |
| 8643 | wire [9:0] fdout_stage30; | |
| 8644 | wire or_fuse_l2d_rid_111; | |
| 8645 | wire stage40_mux_sel0; | |
| 8646 | wire or_fuse_l2d_rid_101; | |
| 8647 | wire stage40_mux_sel1; | |
| 8648 | wire stage40_mux_sel2; | |
| 8649 | wire [9:0] fdout_stage40; | |
| 8650 | wire l2b_l2d_fuse_rid_d_6n; | |
| 8651 | wire delout20_rgt; | |
| 8652 | wire delout31_rgt; | |
| 8653 | wire delout20_lft; | |
| 8654 | wire delout31_lft; | |
| 8655 | wire so_q23; | |
| 8656 | wire so_tstmod; | |
| 8657 | ||
| 8658 | ||
| 8659 | ||
| 8660 | input [15:0] l2t_l2d_word_en_c2; | |
| 8661 | input l2t_l2d_fbrd_c3; | |
| 8662 | input [3:0] l2t_l2d_col_offset_c2; | |
| 8663 | input [8:0] l2t_l2d_set_c2; | |
| 8664 | input l2t_l2d_rd_wr_c3; | |
| 8665 | input [15:0] l2t_l2d_way_sel_c3; | |
| 8666 | input l2t_l2d_fb_hit_c3; | |
| 8667 | input l2clk; | |
| 8668 | input tcu_aclk; | |
| 8669 | input tcu_bclk; | |
| 8670 | input tcu_scan_en; | |
| 8671 | input tcu_pce_ov; | |
| 8672 | input tcu_ce; | |
| 8673 | input tcu_clk_stop; | |
| 8674 | input array_wr_inhibit; | |
| 8675 | input scan_in; | |
| 8676 | input tcu_se_scancollar_in; | |
| 8677 | input tcu_se_scancollar_out; | |
| 8678 | input wayerr_c3; | |
| 8679 | input l2t_l2d_pwrsav_ov_stg; | |
| 8680 | output scan_out; | |
| 8681 | output cache_col_offset_all_c7; | |
| 8682 | output aclk; | |
| 8683 | output bclk; | |
| 8684 | output scan_en_clsrhdr; | |
| 8685 | ||
| 8686 | // I/O from Quads | |
| 8687 | ||
| 8688 | input [623:0] l2b_l2d_fbdecc_c5; // filbuf data | |
| 8689 | input [77:0] l2t_l2d_stdecc_c2; // store data input | |
| 8690 | // CHANGE 2 | |
| 8691 | //input [623:0] cache_decc_out_c52b_l; // quad 0 read data | |
| 8692 | input [623:0] cache_decc_out_c5b; // quad 0 read data | |
| 8693 | ||
| 8694 | output [623:0] l2d_decc_out_c6; // evict data | |
| 8695 | output [623:0] cache_decc_in_c3b_l; // store data | fbdecc data getting piped to quad | |
| 8696 | //output [155:0] l2d_l2t_decc_c6; // read data rtn to load 16B | |
| 8697 | output [155:0] l2d_l2t_decc_c52_mux; // read data rtn to load 16B | |
| 8698 | ||
| 8699 | output [15:0] cache_way_sel_c3_00; | |
| 8700 | output [15:0] cache_way_sel_c3_01; | |
| 8701 | output [15:0] cache_way_sel_c3_10; | |
| 8702 | output [15:0] cache_way_sel_c3_11; | |
| 8703 | output [15:0] cache_way_sel_c3_20; | |
| 8704 | output [15:0] cache_way_sel_c3_21; | |
| 8705 | output [15:0] cache_way_sel_c3_30; | |
| 8706 | output [15:0] cache_way_sel_c3_31; | |
| 8707 | ||
| 8708 | output cache_wayerr_c3_00; | |
| 8709 | output cache_wayerr_c3_01; | |
| 8710 | output cache_wayerr_c3_10; | |
| 8711 | output cache_wayerr_c3_11; | |
| 8712 | output cache_wayerr_c3_20; | |
| 8713 | output cache_wayerr_c3_21; | |
| 8714 | output cache_wayerr_c3_30; | |
| 8715 | output cache_wayerr_c3_31; | |
| 8716 | ||
| 8717 | ||
| 8718 | output [8:0] cache_set_c3_00; | |
| 8719 | output [8:0] cache_set_c3_01; | |
| 8720 | output [8:0] cache_set_c3_10; | |
| 8721 | output [8:0] cache_set_c3_11; | |
| 8722 | output [8:0] cache_set_c3_20; | |
| 8723 | output [8:0] cache_set_c3_21; | |
| 8724 | output [8:0] cache_set_c3_30; | |
| 8725 | output [8:0] cache_set_c3_31; | |
| 8726 | ||
| 8727 | output cache_col_offset_c3_00; | |
| 8728 | output cache_col_offset_c3_01; | |
| 8729 | output cache_col_offset_c3_10; | |
| 8730 | output cache_col_offset_c3_11; | |
| 8731 | output cache_col_offset_c3_20; | |
| 8732 | output cache_col_offset_c3_21; | |
| 8733 | output cache_col_offset_c3_30; | |
| 8734 | output cache_col_offset_c3_31; | |
| 8735 | ||
| 8736 | output cache_col_offset_c4_l_00; | |
| 8737 | output cache_col_offset_c4_l_01; | |
| 8738 | output cache_col_offset_c4_l_10; | |
| 8739 | output cache_col_offset_c4_l_11; | |
| 8740 | output cache_col_offset_c4_l_20; | |
| 8741 | output cache_col_offset_c4_l_21; | |
| 8742 | output cache_col_offset_c4_l_30; | |
| 8743 | output cache_col_offset_c4_l_31; | |
| 8744 | ||
| 8745 | output [1:0] cache_col_offset_c5_00; | |
| 8746 | output [1:0] cache_col_offset_c5_01; | |
| 8747 | output [1:0] cache_col_offset_c5_10; | |
| 8748 | output [1:0] cache_col_offset_c5_11; | |
| 8749 | output [1:0] cache_col_offset_c5_20; | |
| 8750 | output [1:0] cache_col_offset_c5_21; | |
| 8751 | output [1:0] cache_col_offset_c5_30; | |
| 8752 | output [1:0] cache_col_offset_c5_31; | |
| 8753 | ||
| 8754 | output cache_rd_wr_c3_00; | |
| 8755 | output cache_rd_wr_c3_01; | |
| 8756 | output cache_rd_wr_c3_10; | |
| 8757 | output cache_rd_wr_c3_11; | |
| 8758 | output cache_rd_wr_c3_20; | |
| 8759 | output cache_rd_wr_c3_21; | |
| 8760 | output cache_rd_wr_c3_30; | |
| 8761 | output cache_rd_wr_c3_31; | |
| 8762 | ||
| 8763 | ||
| 8764 | output cache_readen_c5_00; | |
| 8765 | output cache_readen_c5_01; | |
| 8766 | output cache_readen_c5_10; | |
| 8767 | output cache_readen_c5_11; | |
| 8768 | output cache_readen_c5_20; | |
| 8769 | output cache_readen_c5_21; | |
| 8770 | output cache_readen_c5_30; | |
| 8771 | output cache_readen_c5_31; | |
| 8772 | ||
| 8773 | output [3:0] cache_word_en_c3_00; | |
| 8774 | output [3:0] cache_word_en_c3_01; | |
| 8775 | output [3:0] cache_word_en_c3_10; | |
| 8776 | output [3:0] cache_word_en_c3_11; | |
| 8777 | output [3:0] cache_word_en_c3_20; | |
| 8778 | output [3:0] cache_word_en_c3_21; | |
| 8779 | output [3:0] cache_word_en_c3_30; | |
| 8780 | output [3:0] cache_word_en_c3_31; | |
| 8781 | ||
| 8782 | output tcu_pce_ov_00; | |
| 8783 | output tcu_pce_ov_01; | |
| 8784 | output tcu_pce_ov_10; | |
| 8785 | output tcu_pce_ov_11; | |
| 8786 | output tcu_pce_ov_20; | |
| 8787 | output tcu_pce_ov_21; | |
| 8788 | output tcu_pce_ov_30; | |
| 8789 | output tcu_pce_ov_31; | |
| 8790 | output tcu_pce_00; | |
| 8791 | output tcu_pce_01; | |
| 8792 | output tcu_pce_10; | |
| 8793 | output tcu_pce_11; | |
| 8794 | output tcu_pce_20; | |
| 8795 | output tcu_pce_21; | |
| 8796 | output tcu_pce_30; | |
| 8797 | output tcu_pce_31; | |
| 8798 | output tcu_clk_stop_00; | |
| 8799 | output tcu_clk_stop_01; | |
| 8800 | output tcu_clk_stop_10; | |
| 8801 | output tcu_clk_stop_11; | |
| 8802 | output tcu_clk_stop_20; | |
| 8803 | output tcu_clk_stop_21; | |
| 8804 | output tcu_clk_stop_30; | |
| 8805 | output tcu_clk_stop_31; | |
| 8806 | ||
| 8807 | output se_00; | |
| 8808 | output se_01; | |
| 8809 | output se_10; | |
| 8810 | output se_11; | |
| 8811 | output se_20; | |
| 8812 | output se_21; | |
| 8813 | output se_30; | |
| 8814 | output se_31; | |
| 8815 | // Redudancy | |
| 8816 | ||
| 8817 | input [9:0] l2b_l2d_fuse_l2d_data_in_d; | |
| 8818 | input [6:0] l2b_l2d_fuse_rid_d; | |
| 8819 | input l2b_l2d_fuse_reset_l; | |
| 8820 | input l2b_l2d_fuse_l2d_wren_d; | |
| 8821 | output [9:0] efc_fuse_data; | |
| 8822 | ||
| 8823 | // io to the ram | |
| 8824 | output [9:0] fuse_l2d_data_in_131; | |
| 8825 | output [4:0] fuse_l2d_rid_131; | |
| 8826 | output fuse_l2d_wren_131; | |
| 8827 | output fuse_l2d_reset_131_l; | |
| 8828 | input [9:0] fdout_131; | |
| 8829 | ||
| 8830 | output [9:0] fuse_l2d_data_in_031; | |
| 8831 | output [4:0] fuse_l2d_rid_031; | |
| 8832 | output fuse_l2d_wren_031; | |
| 8833 | output fuse_l2d_reset_031_l; | |
| 8834 | input [9:0] fdout_031; | |
| 8835 | ||
| 8836 | output [9:0] fuse_l2d_data_in_130; | |
| 8837 | output [4:0] fuse_l2d_rid_130; | |
| 8838 | output fuse_l2d_wren_130; | |
| 8839 | output fuse_l2d_reset_130_l; | |
| 8840 | input [9:0] fdout_130; | |
| 8841 | ||
| 8842 | output [9:0] fuse_l2d_data_in_030; | |
| 8843 | output [4:0] fuse_l2d_rid_030; | |
| 8844 | output fuse_l2d_wren_030; | |
| 8845 | output fuse_l2d_reset_030_l; | |
| 8846 | input [9:0] fdout_030; | |
| 8847 | ||
| 8848 | output [9:0] fuse_l2d_data_in_111; | |
| 8849 | output [4:0] fuse_l2d_rid_111; | |
| 8850 | output fuse_l2d_wren_111; | |
| 8851 | output fuse_l2d_reset_111_l; | |
| 8852 | input [9:0] fdout_111; | |
| 8853 | ||
| 8854 | ||
| 8855 | ||
| 8856 | output [9:0] fuse_l2d_data_in_011; | |
| 8857 | output [4:0] fuse_l2d_rid_011; | |
| 8858 | output fuse_l2d_wren_011; | |
| 8859 | output fuse_l2d_reset_011_l; | |
| 8860 | input [9:0] fdout_011; | |
| 8861 | ||
| 8862 | ||
| 8863 | output [9:0] fuse_l2d_data_in_110; | |
| 8864 | output [4:0] fuse_l2d_rid_110; | |
| 8865 | output fuse_l2d_wren_110; | |
| 8866 | output fuse_l2d_reset_110_l; | |
| 8867 | input [9:0] fdout_110; | |
| 8868 | ||
| 8869 | ||
| 8870 | output [9:0] fuse_l2d_data_in_010; | |
| 8871 | output [4:0] fuse_l2d_rid_010; | |
| 8872 | output fuse_l2d_wren_010; | |
| 8873 | output fuse_l2d_reset_010_l; | |
| 8874 | input [9:0] fdout_010; | |
| 8875 | ||
| 8876 | output [9:0] fuse_l2d_data_in_121; | |
| 8877 | output [4:0] fuse_l2d_rid_121; | |
| 8878 | output fuse_l2d_wren_121; | |
| 8879 | output fuse_l2d_reset_121_l; | |
| 8880 | input [9:0] fdout_121; | |
| 8881 | ||
| 8882 | ||
| 8883 | output [9:0] fuse_l2d_data_in_021; | |
| 8884 | output [4:0] fuse_l2d_rid_021; | |
| 8885 | output fuse_l2d_wren_021; | |
| 8886 | output fuse_l2d_reset_021_l; | |
| 8887 | input [9:0] fdout_021; | |
| 8888 | ||
| 8889 | output [9:0] fuse_l2d_data_in_120; | |
| 8890 | output [4:0] fuse_l2d_rid_120; | |
| 8891 | output fuse_l2d_wren_120; | |
| 8892 | output fuse_l2d_reset_120_l; | |
| 8893 | input [9:0] fdout_120; | |
| 8894 | ||
| 8895 | output [9:0] fuse_l2d_data_in_020; | |
| 8896 | output [4:0] fuse_l2d_rid_020; | |
| 8897 | output fuse_l2d_wren_020; | |
| 8898 | output fuse_l2d_reset_020_l; | |
| 8899 | input [9:0] fdout_020; | |
| 8900 | ||
| 8901 | output [9:0] fuse_l2d_data_in_101; | |
| 8902 | output [4:0] fuse_l2d_rid_101; | |
| 8903 | output fuse_l2d_wren_101; | |
| 8904 | output fuse_l2d_reset_101_l; | |
| 8905 | input [9:0] fdout_101; | |
| 8906 | ||
| 8907 | output [9:0] fuse_l2d_data_in_001; | |
| 8908 | output [4:0] fuse_l2d_rid_001; | |
| 8909 | output fuse_l2d_wren_001; | |
| 8910 | output fuse_l2d_reset_001_l; | |
| 8911 | input [9:0] fdout_001; | |
| 8912 | ||
| 8913 | output [9:0] fuse_l2d_data_in_100; | |
| 8914 | output [4:0] fuse_l2d_rid_100; | |
| 8915 | output fuse_l2d_wren_100; | |
| 8916 | output fuse_l2d_reset_100_l; | |
| 8917 | input [9:0] fdout_100; | |
| 8918 | ||
| 8919 | output [9:0] fuse_l2d_data_in_000; | |
| 8920 | output [4:0] fuse_l2d_rid_000; | |
| 8921 | output fuse_l2d_wren_000; | |
| 8922 | output fuse_l2d_reset_000_l; | |
| 8923 | input [9:0] fdout_000; | |
| 8924 | ||
| 8925 | output siclk_peri; | |
| 8926 | output soclk_peri; | |
| 8927 | output pce_ov_peri; | |
| 8928 | output pce_peri; | |
| 8929 | output scan_collarin_peri; | |
| 8930 | output scan_collarout_peri; | |
| 8931 | output wr_inhibit_peri; | |
| 8932 | output clk_stop_peri; | |
| 8933 | ||
| 8934 | output wee_l_q00; | |
| 8935 | output wee_l_q01; | |
| 8936 | output wee_l_q10; | |
| 8937 | output wee_l_q11; | |
| 8938 | output wee_l_q20; | |
| 8939 | output wee_l_q21; | |
| 8940 | output wee_l_q30; | |
| 8941 | output wee_l_q31; | |
| 8942 | ||
| 8943 | output delout00; | |
| 8944 | output delout01; | |
| 8945 | output delout10; | |
| 8946 | output delout11; | |
| 8947 | output delout20; | |
| 8948 | output delout21; | |
| 8949 | output delout30; | |
| 8950 | output delout31; | |
| 8951 | ||
| 8952 | ////////////////////////////////////////////////////////////////////////////// | |
| 8953 | assign tcu_array_wr_inhibit = array_wr_inhibit; | |
| 8954 | wire pce_ov; | |
| 8955 | wire siclk; | |
| 8956 | wire soclk; | |
| 8957 | //wire scan_out; | |
| 8958 | ||
| 8959 | //assign stop = tcu_clk_stop; | |
| 8960 | assign siclk = tcu_aclk; | |
| 8961 | assign soclk = tcu_bclk; | |
| 8962 | //assign se = tcu_scan_en; | |
| 8963 | assign pce_ov = tcu_pce_ov; | |
| 8964 | assign aclk = tcu_aclk; | |
| 8965 | assign bclk = tcu_bclk; | |
| 8966 | assign scan_en_clsrhdr = tcu_scan_en; | |
| 8967 | ||
| 8968 | assign siclk_peri = siclk; | |
| 8969 | assign soclk_peri = soclk; | |
| 8970 | assign pce_ov_peri = pce_ov; | |
| 8971 | assign pce_peri = tcu_ce; | |
| 8972 | assign scan_collarin_peri = tcu_se_scancollar_in; | |
| 8973 | assign scan_collarout_peri = tcu_se_scancollar_out; | |
| 8974 | assign wr_inhibit_peri = tcu_array_wr_inhibit; | |
| 8975 | assign clk_stop_peri = tcu_clk_stop; | |
| 8976 | ||
| 8977 | assign wee_l_q00 = ~tcu_array_wr_inhibit; | |
| 8978 | assign wee_l_q01 = ~tcu_array_wr_inhibit; | |
| 8979 | assign wee_l_q10 = ~tcu_array_wr_inhibit; | |
| 8980 | assign wee_l_q11 = ~tcu_array_wr_inhibit; | |
| 8981 | assign wee_l_q20 = ~tcu_array_wr_inhibit; | |
| 8982 | assign wee_l_q21 = ~tcu_array_wr_inhibit; | |
| 8983 | assign wee_l_q30 = ~tcu_array_wr_inhibit; | |
| 8984 | assign wee_l_q31 = ~tcu_array_wr_inhibit; | |
| 8985 | ||
| 8986 | ////////////////////////////////////////////////////////////////////////////// | |
| 8987 | ||
| 8988 | wire [623:0] cache_decc_in_c3b_l; | |
| 8989 | ||
| 8990 | wire [623:0] cache_decc_in_c3; | |
| 8991 | //wire [623:0] cache_decc_out_c52; | |
| 8992 | wire [623:0] concat_st_decc_out_c3; | |
| 8993 | wire [623:0] l2d_decc_out_c52; | |
| 8994 | wire [155:0] l2d_l2t_decc_c52; | |
| 8995 | wire [155:0] l2d_l2t_decc_c6; // read data rtn to load 16B | |
| 8996 | wire [623:0] l2b_l2d_fbdecc_c52; | |
| 8997 | wire [623:0] l2b_l2d_fbdecc_c5; | |
| 8998 | ||
| 8999 | ||
| 9000 | n2_l2d_sp_512kb_cust_l1clkhdr_ctl_macro l1_clk_in_hdr ( | |
| 9001 | .l2clk (l2clk), | |
| 9002 | .se (tcu_se_scancollar_in), | |
| 9003 | .l1en (tcu_ce), | |
| 9004 | .pce_ov (tcu_pce_ov), | |
| 9005 | .stop (tcu_clk_stop), | |
| 9006 | .l1clk (l1clk_in) | |
| 9007 | ); | |
| 9008 | ||
| 9009 | n2_l2d_sp_512kb_cust_l1clkhdr_ctl_macro l1_clk_intnl_hdr ( | |
| 9010 | .l2clk (l2clk), | |
| 9011 | .se (tcu_scan_en), | |
| 9012 | .l1en (tcu_ce), | |
| 9013 | .pce_ov (tcu_pce_ov), | |
| 9014 | .stop (tcu_clk_stop), | |
| 9015 | .l1clk (l1clk_intnl) | |
| 9016 | ); | |
| 9017 | ||
| 9018 | n2_l2d_sp_512kb_cust_l1clkhdr_ctl_macro l1_clk_evict_c6_hdr ( | |
| 9019 | .l2clk (l2clk), | |
| 9020 | .se (tcu_scan_en), | |
| 9021 | .l1en (evit_pce_c6), | |
| 9022 | .pce_ov (tcu_pce_ov), | |
| 9023 | .stop (tcu_clk_stop), | |
| 9024 | .l1clk (l1clk_evict_c6) | |
| 9025 | ); | |
| 9026 | ||
| 9027 | assign cache_way_sel_c3_00[15:0] = l2t_l2d_way_sel_c3[15:0]; | |
| 9028 | assign cache_way_sel_c3_01[15:0] = l2t_l2d_way_sel_c3[15:0]; | |
| 9029 | assign cache_way_sel_c3_10[15:0] = l2t_l2d_way_sel_c3[15:0]; | |
| 9030 | assign cache_way_sel_c3_11[15:0] = l2t_l2d_way_sel_c3[15:0]; | |
| 9031 | assign cache_way_sel_c3_20[15:0] = l2t_l2d_way_sel_c3[15:0]; | |
| 9032 | assign cache_way_sel_c3_21[15:0] = l2t_l2d_way_sel_c3[15:0]; | |
| 9033 | assign cache_way_sel_c3_30[15:0] = l2t_l2d_way_sel_c3[15:0]; | |
| 9034 | assign cache_way_sel_c3_31[15:0] = l2t_l2d_way_sel_c3[15:0]; | |
| 9035 | ||
| 9036 | ||
| 9037 | // | |
| 9038 | // Way select when more than one is turned on | |
| 9039 | // | |
| 9040 | ||
| 9041 | ||
| 9042 | assign cache_wayerr_c3_00 = wayerr_c3; | |
| 9043 | assign cache_wayerr_c3_01 = wayerr_c3; | |
| 9044 | assign cache_wayerr_c3_10 = wayerr_c3; | |
| 9045 | assign cache_wayerr_c3_11 = wayerr_c3; | |
| 9046 | assign cache_wayerr_c3_20 = wayerr_c3; | |
| 9047 | assign cache_wayerr_c3_21 = wayerr_c3; | |
| 9048 | assign cache_wayerr_c3_30 = wayerr_c3; | |
| 9049 | assign cache_wayerr_c3_31 = wayerr_c3; | |
| 9050 | ||
| 9051 | // set | |
| 9052 | ||
| 9053 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_9 ff_cache_set_c3 | |
| 9054 | ( | |
| 9055 | .scan_in(ff_cache_set_c3_scanin[8:0]), | |
| 9056 | .scan_out(ff_cache_set_c3_scanout[8:0]), | |
| 9057 | .din (l2t_l2d_set_c2[8:0]), | |
| 9058 | .l1clk (l1clk_in), | |
| 9059 | .dout (cache_set_c3[8:0]), | |
| 9060 | .siclk(siclk), | |
| 9061 | .soclk(soclk) | |
| 9062 | ); | |
| 9063 | ||
| 9064 | assign cache_set_c3_00[8:0] = cache_set_c3[8:0]; | |
| 9065 | assign cache_set_c3_01[8:0] = cache_set_c3[8:0]; | |
| 9066 | assign cache_set_c3_10[8:0] = cache_set_c3[8:0]; | |
| 9067 | assign cache_set_c3_11[8:0] = cache_set_c3[8:0]; | |
| 9068 | assign cache_set_c3_20[8:0] = cache_set_c3[8:0]; | |
| 9069 | assign cache_set_c3_21[8:0] = cache_set_c3[8:0]; | |
| 9070 | assign cache_set_c3_30[8:0] = cache_set_c3[8:0]; | |
| 9071 | assign cache_set_c3_31[8:0] = cache_set_c3[8:0]; | |
| 9072 | ||
| 9073 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_4 ff_cache_col_offset_c3 | |
| 9074 | ( | |
| 9075 | .scan_in(ff_cache_col_offset_c3_scanin[3:0]), | |
| 9076 | .scan_out(ff_cache_col_offset_c3_scanout[3:0]), | |
| 9077 | .din (l2t_l2d_col_offset_c2[3:0]), | |
| 9078 | .l1clk (l1clk_in), | |
| 9079 | .dout (cache_col_offset_c3[3:0]), | |
| 9080 | .siclk(siclk), | |
| 9081 | .soclk(soclk) | |
| 9082 | ); | |
| 9083 | ||
| 9084 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_4 ff_cache_col_offset_c4 | |
| 9085 | ( | |
| 9086 | .scan_in(ff_cache_col_offset_c4_scanin[3:0]), | |
| 9087 | .scan_out(ff_cache_col_offset_c4_scanout[3:0]), | |
| 9088 | .din (cache_col_offset_c3[3:0]), | |
| 9089 | .l1clk (l1clk_intnl), | |
| 9090 | .dout (cache_col_offset_c4_muxsel[3:0]), | |
| 9091 | .siclk(siclk), | |
| 9092 | .soclk(soclk) | |
| 9093 | ); | |
| 9094 | ||
| 9095 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_4 ff_cache_col_offset_c5_muxsel | |
| 9096 | ( | |
| 9097 | .scan_in(ff_cache_col_offset_c5_muxsel_scanin[3:0]), | |
| 9098 | .scan_out(ff_cache_col_offset_c5_muxsel_scanout[3:0]), | |
| 9099 | .din (cache_col_offset_c4_muxsel[3:0]), | |
| 9100 | .l1clk (l1clk_intnl), | |
| 9101 | .dout (cache_col_offset_c5_muxsel[3:0]), | |
| 9102 | .siclk(siclk), | |
| 9103 | .soclk(soclk) | |
| 9104 | ); | |
| 9105 | ||
| 9106 | ||
| 9107 | ||
| 9108 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_2 ff_cache_col_offset_c52 | |
| 9109 | ( | |
| 9110 | .scan_in(ff_cache_col_offset_c52_scanin[1:0]), | |
| 9111 | .scan_out(ff_cache_col_offset_c52_scanout[1:0]), | |
| 9112 | .din (cache_col_offset_c5_muxsel[3:2]), | |
| 9113 | .l1clk (l1clk_intnl), | |
| 9114 | .dout (cache_col_offset_c52[3:2]), | |
| 9115 | .siclk(siclk), | |
| 9116 | .soclk(soclk) | |
| 9117 | ); | |
| 9118 | ||
| 9119 | n2_l2d_sp_512kb_cust_or_macro__width_1 slice_or_col_offset_c5_3_1 | |
| 9120 | ( | |
| 9121 | .dout (cache_col_offset_c5_muxsel_3_or_1), | |
| 9122 | .din0 (cache_col_offset_c5_muxsel[3]), | |
| 9123 | .din1 (cache_col_offset_c5_muxsel[1]) | |
| 9124 | ); | |
| 9125 | ||
| 9126 | ||
| 9127 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_1 ff_cache_col_offset_c52_topsel | |
| 9128 | ( | |
| 9129 | .scan_in(ff_cache_col_offset_c52_topsel_scanin[0:0]), | |
| 9130 | .scan_out(ff_cache_col_offset_c52_topsel_scanout[0:0]), | |
| 9131 | // .din (cache_col_offset_c5_muxsel[3] | cache_col_offset_c5_muxsel[1]), | |
| 9132 | .din (cache_col_offset_c5_muxsel_3_or_1), | |
| 9133 | .l1clk (l1clk_intnl), | |
| 9134 | .dout (cache_col_offset_c52_topsel), | |
| 9135 | .siclk(siclk), | |
| 9136 | .soclk(soclk) | |
| 9137 | ); | |
| 9138 | ||
| 9139 | ||
| 9140 | //assign cache_col_offset_all_c3 = cache_col_offset_c3[3] & | |
| 9141 | // cache_col_offset_c3[2] & cache_col_offset_c3[1] & cache_col_offset_c3[0]; | |
| 9142 | ||
| 9143 | n2_l2d_sp_512kb_cust_and_macro__ports_4__width_1 slice_and_cache_col_offset_all_c3 | |
| 9144 | ( | |
| 9145 | .dout (cache_col_offset_all_c3), | |
| 9146 | .din3 (cache_col_offset_c3[3]), | |
| 9147 | .din2 (cache_col_offset_c3[2]), | |
| 9148 | .din1 (cache_col_offset_c3[1]), | |
| 9149 | .din0 (cache_col_offset_c3[0]) | |
| 9150 | ); | |
| 9151 | ||
| 9152 | ||
| 9153 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_1 ff_cache_col_offset_all_c4 | |
| 9154 | ( | |
| 9155 | .scan_in(ff_cache_col_offset_all_c4_scanin[0:0]), | |
| 9156 | .scan_out(ff_cache_col_offset_all_c4_scanout[0:0]), | |
| 9157 | .din (cache_col_offset_all_c3), | |
| 9158 | .l1clk (l1clk_intnl), | |
| 9159 | .dout (cache_col_offset_all_c4), | |
| 9160 | .siclk(siclk), | |
| 9161 | .soclk(soclk) | |
| 9162 | ); | |
| 9163 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_1 ff_cache_col_offset_all_c5 | |
| 9164 | ( | |
| 9165 | .scan_in(ff_cache_col_offset_all_c5_scanin[0:0]), | |
| 9166 | .scan_out(ff_cache_col_offset_all_c5_scanout[0:0]), | |
| 9167 | .din (cache_col_offset_all_c4), | |
| 9168 | .l1clk (l1clk_intnl), | |
| 9169 | .dout (cache_col_offset_all_c5), | |
| 9170 | .siclk(siclk), | |
| 9171 | .soclk(soclk) | |
| 9172 | ); | |
| 9173 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_1 ff_cache_col_offset_all_c6 | |
| 9174 | ( | |
| 9175 | .scan_in(ff_cache_col_offset_all_c6_scanin[0:0]), | |
| 9176 | .scan_out(ff_cache_col_offset_all_c6_scanout[0:0]), | |
| 9177 | .din (cache_col_offset_all_c5), | |
| 9178 | .l1clk (l1clk_intnl), | |
| 9179 | .dout (cache_col_offset_all_c6), | |
| 9180 | .siclk(siclk), | |
| 9181 | .soclk(soclk) | |
| 9182 | ); | |
| 9183 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_1 ff_cache_col_offset_all_c7 | |
| 9184 | ( | |
| 9185 | .scan_in(ff_cache_col_offset_all_c7_scanin[0:0]), | |
| 9186 | .scan_out(ff_cache_col_offset_all_c7_scanout[0:0]), | |
| 9187 | .din (cache_col_offset_all_c6), | |
| 9188 | .l1clk (l1clk_intnl), | |
| 9189 | .dout (cache_col_offset_all_c7), | |
| 9190 | .siclk(siclk), | |
| 9191 | .soclk(soclk) | |
| 9192 | ); | |
| 9193 | ||
| 9194 | ||
| 9195 | //assign evit_pce_c6 = cache_col_offset_all_c6 | l2t_l2d_pwrsav_ov_stg; | |
| 9196 | ||
| 9197 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_slice_evit_pce_c6 | |
| 9198 | ( | |
| 9199 | .dout (evit_pce_c6), | |
| 9200 | .din0 (cache_col_offset_all_c6), | |
| 9201 | .din1 (l2t_l2d_pwrsav_ov_stg) | |
| 9202 | ); | |
| 9203 | ||
| 9204 | ||
| 9205 | ||
| 9206 | ||
| 9207 | //assign cache_col_offset_c3_00 = |{cache_col_offset_c3[2],cache_col_offset_c3[0]}; | |
| 9208 | //assign cache_col_offset_c3_01 = |{cache_col_offset_c3[2],cache_col_offset_c3[0]}; | |
| 9209 | //assign cache_col_offset_c3_10 = |{cache_col_offset_c3[3],cache_col_offset_c3[1]}; | |
| 9210 | //assign cache_col_offset_c3_11 = |{cache_col_offset_c3[3],cache_col_offset_c3[1]}; | |
| 9211 | //assign cache_col_offset_c3_20 = |{cache_col_offset_c3[2],cache_col_offset_c3[0]}; | |
| 9212 | //assign cache_col_offset_c3_21 = |{cache_col_offset_c3[2],cache_col_offset_c3[0]}; | |
| 9213 | //assign cache_col_offset_c3_30 = |{cache_col_offset_c3[3],cache_col_offset_c3[1]}; | |
| 9214 | //assign cache_col_offset_c3_31 = |{cache_col_offset_c3[3],cache_col_offset_c3[1]}; | |
| 9215 | ||
| 9216 | ||
| 9217 | n2_l2d_sp_512kb_cust_inv_macro__width_1 inv_tcu_array_wr_inhibit | |
| 9218 | ( | |
| 9219 | .dout (tcu_array_wr_inhibit_n), | |
| 9220 | .din (tcu_array_wr_inhibit) | |
| 9221 | ); | |
| 9222 | ||
| 9223 | n2_l2d_sp_512kb_cust_and_macro__width_1 and_slice_cache_col_offset_c3_00_0 | |
| 9224 | ( | |
| 9225 | .dout (cache_col_offset_c3_2_tcu_array_wr_inhibit_n), | |
| 9226 | .din0 (tcu_array_wr_inhibit_n), | |
| 9227 | .din1 (cache_col_offset_c3[2]) | |
| 9228 | ); | |
| 9229 | ||
| 9230 | n2_l2d_sp_512kb_cust_and_macro__width_1 and_slice_cache_col_offset_c3_00_1 | |
| 9231 | ( | |
| 9232 | .dout (cache_col_offset_c3_0_tcu_array_wr_inhibit_n), | |
| 9233 | .din0 (tcu_array_wr_inhibit_n), | |
| 9234 | .din1 (cache_col_offset_c3[0]) | |
| 9235 | ); | |
| 9236 | ||
| 9237 | n2_l2d_sp_512kb_cust_and_macro__width_1 and_slice_cache_col_offset_c3_10_0 | |
| 9238 | ( | |
| 9239 | .dout (cache_col_offset_c3_3_tcu_array_wr_inhibit_n), | |
| 9240 | .din0 (tcu_array_wr_inhibit_n), | |
| 9241 | .din1 (cache_col_offset_c3[3]) | |
| 9242 | ); | |
| 9243 | ||
| 9244 | n2_l2d_sp_512kb_cust_and_macro__width_1 and_slice_cache_col_offset_c3_10_1 | |
| 9245 | ( | |
| 9246 | .dout (cache_col_offset_c3_1_tcu_array_wr_inhibit_n), | |
| 9247 | .din0 (tcu_array_wr_inhibit_n), | |
| 9248 | .din1 (cache_col_offset_c3[1]) | |
| 9249 | ); | |
| 9250 | ||
| 9251 | ||
| 9252 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_cache_col_offset_c3_00 | |
| 9253 | ( | |
| 9254 | .dout (cache_col_offset_c3_00), | |
| 9255 | .din0 (cache_col_offset_c3_2_tcu_array_wr_inhibit_n), | |
| 9256 | .din1 (cache_col_offset_c3_0_tcu_array_wr_inhibit_n) | |
| 9257 | ); | |
| 9258 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_cache_col_offset_c3_10 | |
| 9259 | ( | |
| 9260 | .dout (cache_col_offset_c3_10), | |
| 9261 | // .din0 (~tcu_array_wr_inhibit & cache_col_offset_c3[3]), | |
| 9262 | // .din1 (~tcu_array_wr_inhibit & cache_col_offset_c3[1]) | |
| 9263 | .din0 (cache_col_offset_c3_3_tcu_array_wr_inhibit_n), | |
| 9264 | .din1 (cache_col_offset_c3_1_tcu_array_wr_inhibit_n) | |
| 9265 | ); | |
| 9266 | ||
| 9267 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_cache_col_offset_c3_20 | |
| 9268 | ( | |
| 9269 | .dout (cache_col_offset_c3_20), | |
| 9270 | // .din0 (~tcu_array_wr_inhibit & cache_col_offset_c3[2]), | |
| 9271 | // .din1 (~tcu_array_wr_inhibit & cache_col_offset_c3[0]) | |
| 9272 | .din0 (cache_col_offset_c3_2_tcu_array_wr_inhibit_n), | |
| 9273 | .din1 (cache_col_offset_c3_0_tcu_array_wr_inhibit_n) | |
| 9274 | ); | |
| 9275 | ||
| 9276 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_cache_col_offset_c3_30 | |
| 9277 | ( | |
| 9278 | .dout (cache_col_offset_c3_30), | |
| 9279 | // .din0 (~tcu_array_wr_inhibit & cache_col_offset_c3[3]), | |
| 9280 | // .din1 (~tcu_array_wr_inhibit & cache_col_offset_c3[1]) | |
| 9281 | .din0 (cache_col_offset_c3_3_tcu_array_wr_inhibit_n), | |
| 9282 | .din1 (cache_col_offset_c3_1_tcu_array_wr_inhibit_n) | |
| 9283 | ); | |
| 9284 | ||
| 9285 | assign cache_col_offset_c3_01 = cache_col_offset_c3_00; | |
| 9286 | assign cache_col_offset_c3_11 = cache_col_offset_c3_10; | |
| 9287 | assign cache_col_offset_c3_21 = cache_col_offset_c3_20; | |
| 9288 | assign cache_col_offset_c3_31 = cache_col_offset_c3_30; | |
| 9289 | ||
| 9290 | //inv_macro inv_cache_col_offset_c3 (width=4) | |
| 9291 | // ( | |
| 9292 | // .dout (cache_col_offset_c3_1[3:0]), | |
| 9293 | // .din (cache_col_offset_c3[3:0]) | |
| 9294 | // ); | |
| 9295 | ||
| 9296 | //msff_ctl_macro ff_cache_col_offset_c4 (fs=1,width=4) | |
| 9297 | // ( | |
| 9298 | // .scan_in(ff_cache_col_offset_c4_scanin[3:0]), | |
| 9299 | // .scan_out(ff_cache_col_offset_c4_scanout[3:0]), | |
| 9300 | // .din (cache_col_offset_c4_l[3:0] & (cache_col_offset_c3[3:0] & {4{~tcu_array_wr_inhibit}})), | |
| 9301 | // .l1clk (l1clk_intnl), | |
| 9302 | // .dout (cache_col_offset_c4[3:0]), | |
| 9303 | // ); | |
| 9304 | // | |
| 9305 | //assign cache_col_offset_c4_l_00 = (&{cache_col_offset_c4_l[2],cache_col_offset_c4_l[0]}); | |
| 9306 | //assign cache_col_offset_c4_l_01 = (&{cache_col_offset_c4_l[2],cache_col_offset_c4_l[0]}); | |
| 9307 | //assign cache_col_offset_c4_l_10 = (&{cache_col_offset_c4_l[3],cache_col_offset_c4_l[1]}); | |
| 9308 | //assign cache_col_offset_c4_l_11 = (&{cache_col_offset_c4_l[3],cache_col_offset_c4_l[1]}); | |
| 9309 | //assign cache_col_offset_c4_l_20 = (&{cache_col_offset_c4_l[2],cache_col_offset_c4_l[0]}); | |
| 9310 | //assign cache_col_offset_c4_l_21 = (&{cache_col_offset_c4_l[2],cache_col_offset_c4_l[0]}); | |
| 9311 | //assign cache_col_offset_c4_l_30 = (&{cache_col_offset_c4_l[3],cache_col_offset_c4_l[1]}); | |
| 9312 | //assign cache_col_offset_c4_l_31 = (&{cache_col_offset_c4_l[3],cache_col_offset_c4_l[1]}); | |
| 9313 | ||
| 9314 | ||
| 9315 | n2_l2d_sp_512kb_cust_inv_macro__width_8 inv_cache_col_offset_c4_tog_all | |
| 9316 | ( | |
| 9317 | .dout ( { cache_col_offset_c4_tog_001_0_n, cache_col_offset_c4_tog_101_0_n, | |
| 9318 | cache_col_offset_c4_tog_001_1_n, cache_col_offset_c4_tog_101_1_n, | |
| 9319 | cache_col_offset_c4_tog_023_0_n, cache_col_offset_c4_tog_123_0_n, | |
| 9320 | cache_col_offset_c4_tog_023_1_n, cache_col_offset_c4_tog_123_1_n } ), | |
| 9321 | .din ( { cache_col_offset_c4_tog_001[0], cache_col_offset_c4_tog_101[0], | |
| 9322 | cache_col_offset_c4_tog_001[1], cache_col_offset_c4_tog_101[1], | |
| 9323 | cache_col_offset_c4_tog_023[0], cache_col_offset_c4_tog_123[0], | |
| 9324 | cache_col_offset_c4_tog_023[1], cache_col_offset_c4_tog_123[1] }) | |
| 9325 | ); | |
| 9326 | ||
| 9327 | //assign cache_col_offset_c4_l_00 = ~cache_col_offset_c4_tog_001[0] |tcu_array_wr_inhibit; | |
| 9328 | //assign cache_col_offset_c4_l_01 = ~cache_col_offset_c4_tog_101[0] |tcu_array_wr_inhibit; | |
| 9329 | //assign cache_col_offset_c4_l_10 = ~cache_col_offset_c4_tog_001[1] |tcu_array_wr_inhibit; | |
| 9330 | //assign cache_col_offset_c4_l_11 = ~cache_col_offset_c4_tog_101[1] |tcu_array_wr_inhibit; | |
| 9331 | //assign cache_col_offset_c4_l_20 = ~cache_col_offset_c4_tog_023[0] |tcu_array_wr_inhibit; | |
| 9332 | //assign cache_col_offset_c4_l_21 = ~cache_col_offset_c4_tog_123[0] |tcu_array_wr_inhibit; | |
| 9333 | //assign cache_col_offset_c4_l_30 = ~cache_col_offset_c4_tog_023[1] |tcu_array_wr_inhibit; | |
| 9334 | //assign cache_col_offset_c4_l_31 = ~cache_col_offset_c4_tog_123[1] |tcu_array_wr_inhibit; | |
| 9335 | ||
| 9336 | ||
| 9337 | n2_l2d_sp_512kb_cust_or_macro__width_8 slice_or_cache_col_offset_c4_l_00_to31 | |
| 9338 | ( | |
| 9339 | .dout ( { | |
| 9340 | cache_col_offset_c4_l_00, | |
| 9341 | cache_col_offset_c4_l_01, | |
| 9342 | cache_col_offset_c4_l_10, | |
| 9343 | cache_col_offset_c4_l_11, | |
| 9344 | cache_col_offset_c4_l_20, | |
| 9345 | cache_col_offset_c4_l_21, | |
| 9346 | cache_col_offset_c4_l_30, | |
| 9347 | cache_col_offset_c4_l_31 | |
| 9348 | } ), | |
| 9349 | .din0 ( { | |
| 9350 | cache_col_offset_c4_tog_001_0_n, | |
| 9351 | cache_col_offset_c4_tog_101_0_n, | |
| 9352 | cache_col_offset_c4_tog_001_1_n, | |
| 9353 | cache_col_offset_c4_tog_101_1_n, | |
| 9354 | cache_col_offset_c4_tog_023_0_n, | |
| 9355 | cache_col_offset_c4_tog_123_0_n, | |
| 9356 | cache_col_offset_c4_tog_023_1_n, | |
| 9357 | cache_col_offset_c4_tog_123_1_n | |
| 9358 | }), | |
| 9359 | .din1 ({8{tcu_array_wr_inhibit}}) | |
| 9360 | ); | |
| 9361 | ||
| 9362 | ||
| 9363 | ||
| 9364 | n2_l2d_sp_512kb_cust_inv_macro__width_4 inv_slice_cache_col_offset_c3_x | |
| 9365 | ( | |
| 9366 | .dout (cache_col_offset_c3_n[3:0]), | |
| 9367 | .din (cache_col_offset_c3[3:0]) | |
| 9368 | ); | |
| 9369 | ||
| 9370 | ||
| 9371 | n2_l2d_sp_512kb_cust_or_macro__width_4 or_wr_inhibit_cache_col_offset_c3 | |
| 9372 | ( | |
| 9373 | .dout (wr_inhibit_cache_col_offset_c3_l[3:0]), | |
| 9374 | // .din0 (~cache_col_offset_c3[3:0]), | |
| 9375 | .din0 (cache_col_offset_c3_n[3:0]), | |
| 9376 | .din1 ({4{tcu_array_wr_inhibit}}) | |
| 9377 | ); | |
| 9378 | ||
| 9379 | ||
| 9380 | n2_l2d_sp_512kb_cust_inv_macro__width_4 inv_wr_inhibit_cache_col_offset_c3 | |
| 9381 | ( | |
| 9382 | .dout (wr_inhibit_cache_col_offset_c3[3:0]), | |
| 9383 | .din (wr_inhibit_cache_col_offset_c3_l[3:0]) | |
| 9384 | ); | |
| 9385 | ||
| 9386 | n2_l2d_sp_512kb_cust_inv_macro__width_2 inv_slice_cache_col_offset_c4_tog_001_x | |
| 9387 | ( | |
| 9388 | .dout (cache_col_offset_c4_tog_001_n[1:0]), | |
| 9389 | .din (cache_col_offset_c4_tog_001[1:0]) | |
| 9390 | ); | |
| 9391 | ||
| 9392 | n2_l2d_sp_512kb_cust_inv_macro__width_1 inv_wayerr_c3 | |
| 9393 | ( | |
| 9394 | .dout (wayerr_c3_n), | |
| 9395 | .din (wayerr_c3) | |
| 9396 | ); | |
| 9397 | ||
| 9398 | n2_l2d_sp_512kb_cust_and_macro__width_2 and_wayerr_col_offset_c4_l_001 | |
| 9399 | ( | |
| 9400 | .dout (wayerr_cache_col_offset_c4_l_tog_001[1:0]), | |
| 9401 | .din0 (cache_col_offset_c4_tog_001_n[1:0]), | |
| 9402 | .din1 ({2{wayerr_c3_n}}) | |
| 9403 | ); | |
| 9404 | ||
| 9405 | n2_l2d_sp_512kb_cust_inv_macro__width_2 inv_slice_cache_col_offset_c4_tog_101_x | |
| 9406 | ( | |
| 9407 | .dout (cache_col_offset_c4_tog_101_n[1:0]), | |
| 9408 | .din (cache_col_offset_c4_tog_101[1:0]) | |
| 9409 | ); | |
| 9410 | ||
| 9411 | n2_l2d_sp_512kb_cust_and_macro__width_2 and_wayerr_col_offset_c4_l_101 | |
| 9412 | ( | |
| 9413 | .dout (wayerr_cache_col_offset_c4_l_tog_101[1:0]), | |
| 9414 | // .din0 (~cache_col_offset_c4_tog_101[1:0]), | |
| 9415 | .din0 (cache_col_offset_c4_tog_101_n[1:0]), | |
| 9416 | .din1 ({2{wayerr_c3_n}}) | |
| 9417 | ); | |
| 9418 | ||
| 9419 | n2_l2d_sp_512kb_cust_inv_macro__width_2 inv_slice_cache_col_offset_c4_tog_023_x | |
| 9420 | ( | |
| 9421 | .dout (cache_col_offset_c4_tog_023_n[1:0]), | |
| 9422 | .din (cache_col_offset_c4_tog_023[1:0]) | |
| 9423 | ); | |
| 9424 | ||
| 9425 | ||
| 9426 | n2_l2d_sp_512kb_cust_and_macro__width_2 and_wayerr_col_offset_c4_l_023 | |
| 9427 | ( | |
| 9428 | .dout (wayerr_cache_col_offset_c4_l_tog_023[1:0]), | |
| 9429 | .din0 (cache_col_offset_c4_tog_023_n[1:0]), | |
| 9430 | .din1 ({2{wayerr_c3_n}}) | |
| 9431 | ); | |
| 9432 | ||
| 9433 | n2_l2d_sp_512kb_cust_inv_macro__width_2 inv_slice_cache_col_offset_c4_tog_123_x | |
| 9434 | ( | |
| 9435 | .dout (cache_col_offset_c4_tog_123_n[1:0]), | |
| 9436 | .din (cache_col_offset_c4_tog_123[1:0]) | |
| 9437 | ); | |
| 9438 | ||
| 9439 | n2_l2d_sp_512kb_cust_and_macro__width_2 and_wayerr_col_offset_c4_l_123 | |
| 9440 | ( | |
| 9441 | .dout (wayerr_cache_col_offset_c4_l_tog_123[1:0]), | |
| 9442 | // .din0 (~cache_col_offset_c4_tog_123[1:0]), | |
| 9443 | .din0 (cache_col_offset_c4_tog_123_n[1:0]), | |
| 9444 | .din1 ({2{wayerr_c3_n}}) | |
| 9445 | ); | |
| 9446 | ||
| 9447 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_col_offset_c3_top | |
| 9448 | ( | |
| 9449 | .dout (cache_col_offset_c3_top), | |
| 9450 | .din0 (wr_inhibit_cache_col_offset_c3[3]), | |
| 9451 | .din1 (wr_inhibit_cache_col_offset_c3[1]) | |
| 9452 | ); | |
| 9453 | ||
| 9454 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_col_offset_c3_bot | |
| 9455 | ( | |
| 9456 | .dout (cache_col_offset_c3_bot), | |
| 9457 | .din0 (wr_inhibit_cache_col_offset_c3[2]), | |
| 9458 | .din1 (wr_inhibit_cache_col_offset_c3[0]) | |
| 9459 | ); | |
| 9460 | ||
| 9461 | n2_l2d_sp_512kb_cust_and_macro__width_2 and_cache_col_offset_c4_tog_in_001 | |
| 9462 | ( | |
| 9463 | .dout (cache_col_offset_c4_tog_in_001[1:0]), | |
| 9464 | .din0 (wayerr_cache_col_offset_c4_l_tog_001[1:0]), | |
| 9465 | .din1 ({cache_col_offset_c3_top,cache_col_offset_c3_bot}) | |
| 9466 | ); | |
| 9467 | ||
| 9468 | n2_l2d_sp_512kb_cust_and_macro__width_2 slice_cache_col_offset_c4_tog_in_101 | |
| 9469 | ( | |
| 9470 | .dout (cache_col_offset_c4_tog_in_101[1:0]), | |
| 9471 | .din0 (wayerr_cache_col_offset_c4_l_tog_101[1:0]), | |
| 9472 | .din1 ({cache_col_offset_c3_top,cache_col_offset_c3_bot}) | |
| 9473 | ); | |
| 9474 | n2_l2d_sp_512kb_cust_and_macro__width_2 slice_cache_col_offset_c4_tog_in_023 | |
| 9475 | ( | |
| 9476 | .dout (cache_col_offset_c4_tog_in_023[1:0]), | |
| 9477 | .din0 (wayerr_cache_col_offset_c4_l_tog_023[1:0]), | |
| 9478 | .din1 ({cache_col_offset_c3_top,cache_col_offset_c3_bot}) | |
| 9479 | ); | |
| 9480 | n2_l2d_sp_512kb_cust_and_macro__width_2 slice_cache_col_offset_c4_tog_in_123 | |
| 9481 | ( | |
| 9482 | .dout (cache_col_offset_c4_tog_in_123[1:0]), | |
| 9483 | .din0 (wayerr_cache_col_offset_c4_l_tog_123[1:0]), | |
| 9484 | .din1 ({cache_col_offset_c3_top,cache_col_offset_c3_bot}) | |
| 9485 | ); | |
| 9486 | ||
| 9487 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_2 ff_cache_col_offset_c4_tog_001 | |
| 9488 | ( | |
| 9489 | .scan_in(ff_cache_col_offset_c4_tog_001_scanin[1:0]), | |
| 9490 | .scan_out(ff_cache_col_offset_c4_tog_001_scanout[1:0]), | |
| 9491 | .din (cache_col_offset_c4_tog_in_001[1:0]), | |
| 9492 | .l1clk (l1clk_intnl), | |
| 9493 | .dout (cache_col_offset_c4_tog_001[1:0]), | |
| 9494 | .siclk(siclk), | |
| 9495 | .soclk(soclk) | |
| 9496 | ); | |
| 9497 | ||
| 9498 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_2 ff_cache_col_offset_c4_tog_101 | |
| 9499 | ( | |
| 9500 | .scan_in(ff_cache_col_offset_c4_tog_101_scanin[1:0]), | |
| 9501 | .scan_out(ff_cache_col_offset_c4_tog_101_scanout[1:0]), | |
| 9502 | .din (cache_col_offset_c4_tog_in_101[1:0]), | |
| 9503 | .l1clk (l1clk_intnl), | |
| 9504 | .dout (cache_col_offset_c4_tog_101[1:0]), | |
| 9505 | .siclk(siclk), | |
| 9506 | .soclk(soclk) | |
| 9507 | ); | |
| 9508 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_2 ff_cache_col_offset_c4_tog_023 | |
| 9509 | ( | |
| 9510 | .scan_in(ff_cache_col_offset_c4_tog_023_scanin[1:0]), | |
| 9511 | .scan_out(ff_cache_col_offset_c4_tog_023_scanout[1:0]), | |
| 9512 | .din (cache_col_offset_c4_tog_in_023[1:0]), | |
| 9513 | .l1clk (l1clk_intnl), | |
| 9514 | .dout (cache_col_offset_c4_tog_023[1:0]), | |
| 9515 | .siclk(siclk), | |
| 9516 | .soclk(soclk) | |
| 9517 | ); | |
| 9518 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_2 ff_cache_col_offset_c4_tog_123 | |
| 9519 | ( | |
| 9520 | .scan_in(ff_cache_col_offset_c4_tog_123_scanin[1:0]), | |
| 9521 | .scan_out(ff_cache_col_offset_c4_tog_123_scanout[1:0]), | |
| 9522 | .din (cache_col_offset_c4_tog_in_123[1:0]), | |
| 9523 | .l1clk (l1clk_intnl), | |
| 9524 | .dout (cache_col_offset_c4_tog_123[1:0]), | |
| 9525 | .siclk(siclk), | |
| 9526 | .soclk(soclk) | |
| 9527 | ); | |
| 9528 | ||
| 9529 | ||
| 9530 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_4 ff_cache_col_offset_c4_001 | |
| 9531 | ( | |
| 9532 | .scan_in(ff_cache_col_offset_c4_001_scanin[3:0]), | |
| 9533 | .scan_out(ff_cache_col_offset_c4_001_scanout[3:0]), | |
| 9534 | .din (wr_inhibit_cache_col_offset_c3[3:0]), | |
| 9535 | .l1clk (l1clk_intnl), | |
| 9536 | .dout (cache_col_offset_c4_001[3:0]), | |
| 9537 | .siclk(siclk), | |
| 9538 | .soclk(soclk) | |
| 9539 | ); | |
| 9540 | ||
| 9541 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_4 ff_cache_col_offset_c4_101 | |
| 9542 | ( | |
| 9543 | .scan_in(ff_cache_col_offset_c4_101_scanin[3:0]), | |
| 9544 | .scan_out(ff_cache_col_offset_c4_101_scanout[3:0]), | |
| 9545 | .din (wr_inhibit_cache_col_offset_c3[3:0]), | |
| 9546 | .l1clk (l1clk_intnl), | |
| 9547 | .dout (cache_col_offset_c4_101[3:0]), | |
| 9548 | .siclk(siclk), | |
| 9549 | .soclk(soclk) | |
| 9550 | ); | |
| 9551 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_4 ff_cache_col_offset_c4_023 | |
| 9552 | ( | |
| 9553 | .scan_in(ff_cache_col_offset_c4_023_scanin[3:0]), | |
| 9554 | .scan_out(ff_cache_col_offset_c4_023_scanout[3:0]), | |
| 9555 | .din (wr_inhibit_cache_col_offset_c3[3:0]), | |
| 9556 | .l1clk (l1clk_intnl), | |
| 9557 | .dout (cache_col_offset_c4_023[3:0]), | |
| 9558 | .siclk(siclk), | |
| 9559 | .soclk(soclk) | |
| 9560 | ); | |
| 9561 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_4 ff_cache_col_offset_c4_123 | |
| 9562 | ( | |
| 9563 | .scan_in(ff_cache_col_offset_c4_123_scanin[3:0]), | |
| 9564 | .scan_out(ff_cache_col_offset_c4_123_scanout[3:0]), | |
| 9565 | .din (wr_inhibit_cache_col_offset_c3[3:0]), | |
| 9566 | .l1clk (l1clk_intnl), | |
| 9567 | .dout (cache_col_offset_c4_123[3:0]), | |
| 9568 | .siclk(siclk), | |
| 9569 | .soclk(soclk) | |
| 9570 | ); | |
| 9571 | ||
| 9572 | n2_l2d_sp_512kb_cust_and_macro__width_4 and_cache_col_offset_c5_001_in | |
| 9573 | ( | |
| 9574 | .dout (cache_col_offset_c5_001_in[3:0]), | |
| 9575 | .din0 ({cache_col_offset_c4_tog_001[1:0],cache_col_offset_c4_tog_001[1:0]}), | |
| 9576 | .din1 (cache_col_offset_c4_001[3:0]) | |
| 9577 | ); | |
| 9578 | ||
| 9579 | n2_l2d_sp_512kb_cust_and_macro__width_4 and_cache_col_offset_c5_101_in | |
| 9580 | ( | |
| 9581 | .dout (cache_col_offset_c5_101_in[3:0]), | |
| 9582 | .din0 ({cache_col_offset_c4_tog_101[1:0],cache_col_offset_c4_tog_101[1:0]}), | |
| 9583 | .din1 (cache_col_offset_c4_101[3:0]) | |
| 9584 | ); | |
| 9585 | ||
| 9586 | n2_l2d_sp_512kb_cust_and_macro__width_4 and_cache_col_offset_c5_023_in | |
| 9587 | ( | |
| 9588 | .dout (cache_col_offset_c5_023_in[3:0]), | |
| 9589 | .din0 ({cache_col_offset_c4_tog_023[1:0],cache_col_offset_c4_tog_023[1:0]}), | |
| 9590 | .din1 (cache_col_offset_c4_023[3:0]) | |
| 9591 | ); | |
| 9592 | ||
| 9593 | n2_l2d_sp_512kb_cust_and_macro__width_4 and_cache_col_offset_c5_123_in | |
| 9594 | ( | |
| 9595 | .dout (cache_col_offset_c5_123_in[3:0]), | |
| 9596 | .din0 ({cache_col_offset_c4_tog_123[1:0],cache_col_offset_c4_tog_123[1:0]}), | |
| 9597 | .din1 (cache_col_offset_c4_123[3:0]) | |
| 9598 | ); | |
| 9599 | ||
| 9600 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_4 ff_cache_col_offset_c5_001 | |
| 9601 | ( | |
| 9602 | .scan_in(ff_cache_col_offset_c5_001_scanin[3:0]), | |
| 9603 | .scan_out(ff_cache_col_offset_c5_001_scanout[3:0]), | |
| 9604 | .din (cache_col_offset_c5_001_in[3:0]), | |
| 9605 | .l1clk (l1clk_intnl), | |
| 9606 | .dout (cache_col_offset_c5_001[3:0]), | |
| 9607 | .siclk(siclk), | |
| 9608 | .soclk(soclk) | |
| 9609 | ); | |
| 9610 | ||
| 9611 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_4 ff_cache_col_offset_c5_101 | |
| 9612 | ( | |
| 9613 | .scan_in(ff_cache_col_offset_c5_101_scanin[3:0]), | |
| 9614 | .scan_out(ff_cache_col_offset_c5_101_scanout[3:0]), | |
| 9615 | .din (cache_col_offset_c5_101_in[3:0]), | |
| 9616 | .l1clk (l1clk_intnl), | |
| 9617 | .dout (cache_col_offset_c5_101[3:0]), | |
| 9618 | .siclk(siclk), | |
| 9619 | .soclk(soclk) | |
| 9620 | ); | |
| 9621 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_4 ff_cache_col_offset_c5_023 | |
| 9622 | ( | |
| 9623 | .scan_in(ff_cache_col_offset_c5_023_scanin[3:0]), | |
| 9624 | .scan_out(ff_cache_col_offset_c5_023_scanout[3:0]), | |
| 9625 | .din (cache_col_offset_c5_023_in[3:0]), | |
| 9626 | .l1clk (l1clk_intnl), | |
| 9627 | .dout (cache_col_offset_c5_023[3:0]), | |
| 9628 | .siclk(siclk), | |
| 9629 | .soclk(soclk) | |
| 9630 | ); | |
| 9631 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_4 ff_cache_col_offset_c5_123 | |
| 9632 | ( | |
| 9633 | .scan_in(ff_cache_col_offset_c5_123_scanin[3:0]), | |
| 9634 | .scan_out(ff_cache_col_offset_c5_123_scanout[3:0]), | |
| 9635 | .din (cache_col_offset_c5_123_in[3:0]), | |
| 9636 | .l1clk (l1clk_intnl), | |
| 9637 | .dout (cache_col_offset_c5_123[3:0]), | |
| 9638 | .siclk(siclk), | |
| 9639 | .soclk(soclk) | |
| 9640 | ); | |
| 9641 | ||
| 9642 | //assign cache_col_offset_c4_l_00 = ~(|{cache_col_offset_c4[2],cache_col_offset_c4[0]}); | |
| 9643 | //assign cache_col_offset_c4_l_01 = ~(|{cache_col_offset_c4[2],cache_col_offset_c4[0]}); | |
| 9644 | //assign cache_col_offset_c4_l_10 = ~(|{cache_col_offset_c4[3],cache_col_offset_c4[1]}); | |
| 9645 | //assign cache_col_offset_c4_l_11 = ~(|{cache_col_offset_c4[3],cache_col_offset_c4[1]}); | |
| 9646 | //assign cache_col_offset_c4_l_20 = ~(|{cache_col_offset_c4[2],cache_col_offset_c4[0]}); | |
| 9647 | //assign cache_col_offset_c4_l_21 = ~(|{cache_col_offset_c4[2],cache_col_offset_c4[0]}); | |
| 9648 | //assign cache_col_offset_c4_l_30 = ~(|{cache_col_offset_c4[3],cache_col_offset_c4[1]}); | |
| 9649 | //assign cache_col_offset_c4_l_31 = ~(|{cache_col_offset_c4[3],cache_col_offset_c4[1]}); | |
| 9650 | ||
| 9651 | assign cache_col_offset_c5_00[1:0] = {cache_col_offset_c5_001[2],cache_col_offset_c5_001[0]}; | |
| 9652 | assign cache_col_offset_c5_01[1:0] = {cache_col_offset_c5_101[2],cache_col_offset_c5_101[0]}; | |
| 9653 | assign cache_col_offset_c5_10[1:0] = {cache_col_offset_c5_001[3],cache_col_offset_c5_001[1]}; | |
| 9654 | assign cache_col_offset_c5_11[1:0] = {cache_col_offset_c5_101[3],cache_col_offset_c5_101[1]}; | |
| 9655 | assign cache_col_offset_c5_20[1:0] = {cache_col_offset_c5_023[2],cache_col_offset_c5_023[0]}; | |
| 9656 | assign cache_col_offset_c5_21[1:0] = {cache_col_offset_c5_123[2],cache_col_offset_c5_123[0]}; | |
| 9657 | assign cache_col_offset_c5_30[1:0] = {cache_col_offset_c5_023[3],cache_col_offset_c5_023[1]}; | |
| 9658 | assign cache_col_offset_c5_31[1:0] = {cache_col_offset_c5_123[3],cache_col_offset_c5_123[1]}; | |
| 9659 | ||
| 9660 | ||
| 9661 | // read writes signals | |
| 9662 | ||
| 9663 | ||
| 9664 | ||
| 9665 | ||
| 9666 | //assign cache_rd_wr_c3_00 = cache_rd_wr_c3 | tcu_array_wr_inhibit; | |
| 9667 | //assign cache_rd_wr_c3_01 = cache_rd_wr_c3 | tcu_array_wr_inhibit; | |
| 9668 | //assign cache_rd_wr_c3_10 = cache_rd_wr_c3 | tcu_array_wr_inhibit; | |
| 9669 | //assign cache_rd_wr_c3_11 = cache_rd_wr_c3 | tcu_array_wr_inhibit; | |
| 9670 | //assign cache_rd_wr_c3_20 = cache_rd_wr_c3 | tcu_array_wr_inhibit; | |
| 9671 | //assign cache_rd_wr_c3_21 = cache_rd_wr_c3 | tcu_array_wr_inhibit; | |
| 9672 | //assign cache_rd_wr_c3_30 = cache_rd_wr_c3 | tcu_array_wr_inhibit; | |
| 9673 | //assign cache_rd_wr_c3_31 = cache_rd_wr_c3 | tcu_array_wr_inhibit; | |
| 9674 | //assign cache_rd_wr_c3_next_stage = cache_rd_wr_c3 | tcu_array_wr_inhibit; | |
| 9675 | ||
| 9676 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_x111 | |
| 9677 | ( | |
| 9678 | .dout (cache_rd_wr_c3_generic), | |
| 9679 | .din0 (l2t_l2d_rd_wr_c3), | |
| 9680 | .din1 (1'b0) | |
| 9681 | ); | |
| 9682 | ||
| 9683 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_x112 | |
| 9684 | ( | |
| 9685 | .dout (cache_rd_wr_c3_next_stage), | |
| 9686 | .din0 (l2t_l2d_rd_wr_c3), | |
| 9687 | .din1 (1'b0) | |
| 9688 | ); | |
| 9689 | ||
| 9690 | ||
| 9691 | assign cache_rd_wr_c3_00 = cache_rd_wr_c3_generic; | |
| 9692 | assign cache_rd_wr_c3_01 = cache_rd_wr_c3_generic; | |
| 9693 | assign cache_rd_wr_c3_10 = cache_rd_wr_c3_generic; | |
| 9694 | assign cache_rd_wr_c3_11 = cache_rd_wr_c3_generic; | |
| 9695 | assign cache_rd_wr_c3_20 = cache_rd_wr_c3_generic; | |
| 9696 | assign cache_rd_wr_c3_21 = cache_rd_wr_c3_generic; | |
| 9697 | assign cache_rd_wr_c3_30 = cache_rd_wr_c3_generic; | |
| 9698 | assign cache_rd_wr_c3_31 = cache_rd_wr_c3_generic; | |
| 9699 | ||
| 9700 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_1 ff_cache_cache_rd_wr_c4 | |
| 9701 | ( | |
| 9702 | .scan_in(ff_cache_cache_rd_wr_c4_scanin[0:0]), | |
| 9703 | .scan_out(ff_cache_cache_rd_wr_c4_scanout[0:0]), | |
| 9704 | .din (cache_rd_wr_c3_next_stage), | |
| 9705 | .l1clk (l1clk_intnl), | |
| 9706 | .dout (cache_rd_wr_c4), | |
| 9707 | .siclk(siclk), | |
| 9708 | .soclk(soclk) | |
| 9709 | ); | |
| 9710 | ||
| 9711 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_1 ff_cache_cache_rd_wr_c5_00 | |
| 9712 | ( | |
| 9713 | .scan_in(ff_cache_cache_rd_wr_c5_00_scanin[0:0]), | |
| 9714 | .scan_out(ff_cache_cache_rd_wr_c5_00_scanout[0:0]), | |
| 9715 | .din (cache_rd_wr_c4), | |
| 9716 | .l1clk (l1clk_intnl), | |
| 9717 | .dout (cache_rd_wr_c5_00), | |
| 9718 | .siclk(siclk), | |
| 9719 | .soclk(soclk) | |
| 9720 | ); | |
| 9721 | ||
| 9722 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_1 ff_cache_cache_rd_wr_c5_01 | |
| 9723 | ( | |
| 9724 | .scan_in(ff_cache_cache_rd_wr_c5_01_scanin[0:0]), | |
| 9725 | .scan_out(ff_cache_cache_rd_wr_c5_01_scanout[0:0]), | |
| 9726 | .din (cache_rd_wr_c4), | |
| 9727 | .l1clk (l1clk_intnl), | |
| 9728 | .dout (cache_rd_wr_c5_01), | |
| 9729 | .siclk(siclk), | |
| 9730 | .soclk(soclk) | |
| 9731 | ); | |
| 9732 | ||
| 9733 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_1 ff_cache_cache_rd_wr_c5_20 | |
| 9734 | ( | |
| 9735 | .scan_in(ff_cache_cache_rd_wr_c5_20_scanin[0:0]), | |
| 9736 | .scan_out(ff_cache_cache_rd_wr_c5_20_scanout[0:0]), | |
| 9737 | .din (cache_rd_wr_c4), | |
| 9738 | .l1clk (l1clk_intnl), | |
| 9739 | .dout (cache_rd_wr_c5_20), | |
| 9740 | .siclk(siclk), | |
| 9741 | .soclk(soclk) | |
| 9742 | ); | |
| 9743 | ||
| 9744 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_1 ff_cache_cache_rd_wr_c5_21 | |
| 9745 | ( | |
| 9746 | .scan_in(ff_cache_cache_rd_wr_c5_21_scanin[0:0]), | |
| 9747 | .scan_out(ff_cache_cache_rd_wr_c5_21_scanout[0:0]), | |
| 9748 | .din (cache_rd_wr_c4), | |
| 9749 | .l1clk (l1clk_intnl), | |
| 9750 | .dout (cache_rd_wr_c5_21), | |
| 9751 | .siclk(siclk), | |
| 9752 | .soclk(soclk) | |
| 9753 | ); | |
| 9754 | ||
| 9755 | n2_l2d_sp_512kb_cust_and_macro__width_8 and_slice_cache_rd_wr_c5_x | |
| 9756 | ( | |
| 9757 | .dout ({cache_readen_c5_00, | |
| 9758 | cache_readen_c5_01, | |
| 9759 | cache_readen_c5_10, | |
| 9760 | cache_readen_c5_11, | |
| 9761 | cache_readen_c5_20, | |
| 9762 | cache_readen_c5_21, | |
| 9763 | cache_readen_c5_30, | |
| 9764 | cache_readen_c5_31 | |
| 9765 | }), | |
| 9766 | .din0 ({cache_rd_wr_c5_00, | |
| 9767 | cache_rd_wr_c5_01, | |
| 9768 | cache_rd_wr_c5_00, | |
| 9769 | cache_rd_wr_c5_01, | |
| 9770 | cache_rd_wr_c5_20, | |
| 9771 | cache_rd_wr_c5_21, | |
| 9772 | cache_rd_wr_c5_20, | |
| 9773 | cache_rd_wr_c5_21 | |
| 9774 | }), | |
| 9775 | .din1 ({8{tcu_array_wr_inhibit_n}}) | |
| 9776 | ); | |
| 9777 | ||
| 9778 | ||
| 9779 | //assign cache_readen_c5_00 = cache_rd_wr_c5_00 & ~tcu_array_wr_inhibit; | |
| 9780 | //assign cache_readen_c5_01 = cache_rd_wr_c5_01 & ~tcu_array_wr_inhibit; | |
| 9781 | //assign cache_readen_c5_10 = cache_rd_wr_c5_00 & ~tcu_array_wr_inhibit; | |
| 9782 | //assign cache_readen_c5_11 = cache_rd_wr_c5_01 & ~tcu_array_wr_inhibit; | |
| 9783 | //assign cache_readen_c5_20 = cache_rd_wr_c5_20 & ~tcu_array_wr_inhibit; | |
| 9784 | //assign cache_readen_c5_21 = cache_rd_wr_c5_21 & ~tcu_array_wr_inhibit; | |
| 9785 | //assign cache_readen_c5_30 = cache_rd_wr_c5_20 & ~tcu_array_wr_inhibit; | |
| 9786 | //assign cache_readen_c5_31 = cache_rd_wr_c5_21 & ~tcu_array_wr_inhibit; | |
| 9787 | ||
| 9788 | ||
| 9789 | // word enables for writes | |
| 9790 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_16 ff_cache_word_en_c3 | |
| 9791 | ( | |
| 9792 | .scan_in(ff_cache_word_en_c3_scanin[15:0]), | |
| 9793 | .scan_out(ff_cache_word_en_c3_scanout[15:0]), | |
| 9794 | .din (l2t_l2d_word_en_c2[15:0]), | |
| 9795 | .l1clk (l1clk_in), | |
| 9796 | .dout (cache_word_en_c3[15:0]), | |
| 9797 | .siclk(siclk), | |
| 9798 | .soclk(soclk) | |
| 9799 | ); | |
| 9800 | ||
| 9801 | ||
| 9802 | ||
| 9803 | //assign cache_word_en_c3_11[3:0] = {cache_word_en_c3[4],cache_word_en_c3[6], cache_word_en_c3[12],cache_word_en_c3[14]}; | |
| 9804 | //assign cache_word_en_c3_10[3:0] = {cache_word_en_c3[14],cache_word_en_c3[12], cache_word_en_c3[6],cache_word_en_c3[4]}; | |
| 9805 | //assign cache_word_en_c3_01[3:0] = {cache_word_en_c3[0],cache_word_en_c3[2], cache_word_en_c3[8],cache_word_en_c3[10]}; | |
| 9806 | //assign cache_word_en_c3_00[3:0] = {cache_word_en_c3[10],cache_word_en_c3[8], cache_word_en_c3[2],cache_word_en_c3[0]}; | |
| 9807 | //assign cache_word_en_c3_21[3:0] = {cache_word_en_c3[1],cache_word_en_c3[3], cache_word_en_c3[9],cache_word_en_c3[11]}; | |
| 9808 | //assign cache_word_en_c3_20[3:0] = {cache_word_en_c3[11],cache_word_en_c3[9], cache_word_en_c3[3],cache_word_en_c3[1]}; | |
| 9809 | //assign cache_word_en_c3_31[3:0] = {cache_word_en_c3[5],cache_word_en_c3[7], cache_word_en_c3[13],cache_word_en_c3[15]}; | |
| 9810 | //assign cache_word_en_c3_30[3:0] = {cache_word_en_c3[15],cache_word_en_c3[13], cache_word_en_c3[7],cache_word_en_c3[5]}; | |
| 9811 | ||
| 9812 | ||
| 9813 | assign cache_word_en_c3_01[3:0] = {cache_word_en_c3[2], cache_word_en_c3[0],cache_word_en_c3[10],cache_word_en_c3[8]}; | |
| 9814 | assign cache_word_en_c3_11[3:0] = {cache_word_en_c3[6], cache_word_en_c3[4],cache_word_en_c3[14],cache_word_en_c3[12]}; | |
| 9815 | assign cache_word_en_c3_21[3:0] = {cache_word_en_c3[3], cache_word_en_c3[1],cache_word_en_c3[11],cache_word_en_c3[9] }; | |
| 9816 | assign cache_word_en_c3_31[3:0] = {cache_word_en_c3[7], cache_word_en_c3[5],cache_word_en_c3[15],cache_word_en_c3[13]}; | |
| 9817 | ||
| 9818 | assign cache_word_en_c3_00[3:0] = {cache_word_en_c3[10],cache_word_en_c3[8], cache_word_en_c3[2],cache_word_en_c3[0]}; | |
| 9819 | assign cache_word_en_c3_10[3:0] = {cache_word_en_c3[14],cache_word_en_c3[12], cache_word_en_c3[6],cache_word_en_c3[4]}; | |
| 9820 | assign cache_word_en_c3_20[3:0] = {cache_word_en_c3[11],cache_word_en_c3[9], cache_word_en_c3[3],cache_word_en_c3[1]}; | |
| 9821 | assign cache_word_en_c3_30[3:0] = {cache_word_en_c3[15],cache_word_en_c3[13], cache_word_en_c3[7],cache_word_en_c3[5]}; | |
| 9822 | ||
| 9823 | ||
| 9824 | ||
| 9825 | ||
| 9826 | ||
| 9827 | ||
| 9828 | ||
| 9829 | ||
| 9830 | ||
| 9831 | ||
| 9832 | // data going out | |
| 9833 | // sel fill data instead of store data. | |
| 9834 | ||
| 9835 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_1 ff_cache_sel_fbdecc_c4 | |
| 9836 | ( | |
| 9837 | .scan_in(ff_cache_sel_fbdecc_c4_scanin[0:0]), | |
| 9838 | .scan_out(ff_cache_sel_fbdecc_c4_scanout[0:0]), | |
| 9839 | .din (l2t_l2d_fbrd_c3), | |
| 9840 | .l1clk (l1clk_in), | |
| 9841 | .dout (cache_sel_fbdecc_c4), | |
| 9842 | .siclk(siclk), | |
| 9843 | .soclk(soclk) | |
| 9844 | ); | |
| 9845 | ||
| 9846 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_1 ff_cache_sel_fbdecc_c5 | |
| 9847 | ( | |
| 9848 | .scan_in(ff_cache_sel_fbdecc_c5_scanin[0:0]), | |
| 9849 | .scan_out(ff_cache_sel_fbdecc_c5_scanout[0:0]), | |
| 9850 | .din (cache_sel_fbdecc_c4), | |
| 9851 | .l1clk (l1clk_intnl), | |
| 9852 | .dout (cache_sel_fbdecc_c5), | |
| 9853 | .siclk(siclk), | |
| 9854 | .soclk(soclk) | |
| 9855 | ); | |
| 9856 | ||
| 9857 | ||
| 9858 | /// | |
| 9859 | // This portion will concat and prepare store data | |
| 9860 | // it will then mux fill dat awith store data and drive it to memory | |
| 9861 | // | |
| 9862 | ||
| 9863 | ||
| 9864 | n2_l2d_sp_512kb_cust_inv_macro__width_1 cache_sel_fbdecc_c5_inv_slice ( | |
| 9865 | .dout (cache_sel_fbdecc_c5_n), | |
| 9866 | .din (cache_sel_fbdecc_c5) | |
| 9867 | ); | |
| 9868 | ||
| 9869 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_78 ff_l2t_l2d_stdecc_c3 | |
| 9870 | ( | |
| 9871 | .scan_in(ff_l2t_l2d_stdecc_c3_scanin[77:0]), | |
| 9872 | .scan_out(ff_l2t_l2d_stdecc_c3_scanout[77:0]), | |
| 9873 | .din (l2t_l2d_stdecc_c2[77:0]), | |
| 9874 | .l1clk (l1clk_in), | |
| 9875 | .dout (l2t_l2d_stdecc_c3[77:0]), | |
| 9876 | .siclk(siclk), | |
| 9877 | .soclk(soclk) | |
| 9878 | ); | |
| 9879 | ||
| 9880 | ||
| 9881 | ||
| 9882 | assign concat_st_decc_out_c3[623:0] = {l2t_l2d_stdecc_c3[77:0], l2t_l2d_stdecc_c3[77:0], | |
| 9883 | l2t_l2d_stdecc_c3[77:0], l2t_l2d_stdecc_c3[77:0], l2t_l2d_stdecc_c3[77:0], | |
| 9884 | l2t_l2d_stdecc_c3[77:0], l2t_l2d_stdecc_c3[77:0], l2t_l2d_stdecc_c3[77:0]}; | |
| 9885 | ||
| 9886 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__width_39 mux_cache_decc_in_c3_1 | |
| 9887 | ( | |
| 9888 | .dout (cache_decc_in_c3[38:0]), | |
| 9889 | .din0 (concat_st_decc_out_c3[38:0]), | |
| 9890 | .din1 (l2b_l2d_fbdecc_c5[38:0]), | |
| 9891 | .sel0 (cache_sel_fbdecc_c5_n), | |
| 9892 | .sel1 (cache_sel_fbdecc_c5) | |
| 9893 | ); | |
| 9894 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__width_39 mux_cache_decc_in_c3_2 | |
| 9895 | ( | |
| 9896 | .dout (cache_decc_in_c3[77:39]), | |
| 9897 | .din0 (concat_st_decc_out_c3[77:39]), | |
| 9898 | .din1 (l2b_l2d_fbdecc_c5[77:39]), | |
| 9899 | .sel0 (cache_sel_fbdecc_c5_n), | |
| 9900 | .sel1 (cache_sel_fbdecc_c5) | |
| 9901 | ); | |
| 9902 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__width_39 mux_cache_decc_in_c3_3 | |
| 9903 | ( | |
| 9904 | .dout (cache_decc_in_c3[116:78]), | |
| 9905 | .din0 (concat_st_decc_out_c3[116:78]), | |
| 9906 | .din1 (l2b_l2d_fbdecc_c5[116:78]), | |
| 9907 | .sel0 (cache_sel_fbdecc_c5_n), | |
| 9908 | .sel1 (cache_sel_fbdecc_c5) | |
| 9909 | ); | |
| 9910 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__width_39 mux_cache_decc_in_c3_4 | |
| 9911 | ( | |
| 9912 | .dout (cache_decc_in_c3[155:117]), | |
| 9913 | .din0 (concat_st_decc_out_c3[155:117]), | |
| 9914 | .din1 (l2b_l2d_fbdecc_c5[155:117]), | |
| 9915 | .sel0 (cache_sel_fbdecc_c5_n), | |
| 9916 | .sel1 (cache_sel_fbdecc_c5) | |
| 9917 | ); | |
| 9918 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__width_39 mux_cache_decc_in_c3_5 | |
| 9919 | ( | |
| 9920 | .dout (cache_decc_in_c3[194:156]), | |
| 9921 | .din0 (concat_st_decc_out_c3[194:156]), | |
| 9922 | .din1 (l2b_l2d_fbdecc_c5[194:156]), | |
| 9923 | .sel0 (cache_sel_fbdecc_c5_n), | |
| 9924 | .sel1 (cache_sel_fbdecc_c5) | |
| 9925 | ); | |
| 9926 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__width_39 mux_cache_decc_in_c3_6 | |
| 9927 | ( | |
| 9928 | .dout (cache_decc_in_c3[233:195]), | |
| 9929 | .din0 (concat_st_decc_out_c3[233:195]), | |
| 9930 | .din1 (l2b_l2d_fbdecc_c5[233:195]), | |
| 9931 | .sel0 (cache_sel_fbdecc_c5_n), | |
| 9932 | .sel1 (cache_sel_fbdecc_c5) | |
| 9933 | ); | |
| 9934 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__width_39 mux_cache_decc_in_c3_7 | |
| 9935 | ( | |
| 9936 | .dout (cache_decc_in_c3[272:234]), | |
| 9937 | .din0 (concat_st_decc_out_c3[272:234]), | |
| 9938 | .din1 (l2b_l2d_fbdecc_c5[272:234]), | |
| 9939 | .sel0 (cache_sel_fbdecc_c5_n), | |
| 9940 | .sel1 (cache_sel_fbdecc_c5) | |
| 9941 | ); | |
| 9942 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__width_39 mux_cache_decc_in_c3_8 | |
| 9943 | ( | |
| 9944 | .dout (cache_decc_in_c3[311:273]), | |
| 9945 | .din0 (concat_st_decc_out_c3[311:273]), | |
| 9946 | .din1 (l2b_l2d_fbdecc_c5[311:273]), | |
| 9947 | .sel0 (cache_sel_fbdecc_c5_n), | |
| 9948 | .sel1 (cache_sel_fbdecc_c5) | |
| 9949 | ); | |
| 9950 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__width_39 mux_cache_decc_in_c3_9 | |
| 9951 | ( | |
| 9952 | .dout (cache_decc_in_c3[350:312]), | |
| 9953 | .din0 (concat_st_decc_out_c3[350:312]), | |
| 9954 | .din1 (l2b_l2d_fbdecc_c5[350:312]), | |
| 9955 | .sel0 (cache_sel_fbdecc_c5_n), | |
| 9956 | .sel1 (cache_sel_fbdecc_c5) | |
| 9957 | ); | |
| 9958 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__width_39 mux_cache_decc_in_c3_10 | |
| 9959 | ( | |
| 9960 | .dout (cache_decc_in_c3[389:351]), | |
| 9961 | .din0 (concat_st_decc_out_c3[389:351]), | |
| 9962 | .din1 (l2b_l2d_fbdecc_c5[389:351]), | |
| 9963 | .sel0 (cache_sel_fbdecc_c5_n), | |
| 9964 | .sel1 (cache_sel_fbdecc_c5) | |
| 9965 | ); | |
| 9966 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__width_39 mux_cache_decc_in_c3_11 | |
| 9967 | ( | |
| 9968 | .dout (cache_decc_in_c3[428:390]), | |
| 9969 | .din0 (concat_st_decc_out_c3[428:390]), | |
| 9970 | .din1 (l2b_l2d_fbdecc_c5[428:390]), | |
| 9971 | .sel0 (cache_sel_fbdecc_c5_n), | |
| 9972 | .sel1 (cache_sel_fbdecc_c5) | |
| 9973 | ); | |
| 9974 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__width_39 mux_cache_decc_in_c3_12 | |
| 9975 | ( | |
| 9976 | .dout (cache_decc_in_c3[467:429]), | |
| 9977 | .din0 (concat_st_decc_out_c3[467:429]), | |
| 9978 | .din1 (l2b_l2d_fbdecc_c5[467:429]), | |
| 9979 | .sel0 (cache_sel_fbdecc_c5_n), | |
| 9980 | .sel1 (cache_sel_fbdecc_c5) | |
| 9981 | ); | |
| 9982 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__width_39 mux_cache_decc_in_c3_13 | |
| 9983 | ( | |
| 9984 | .dout (cache_decc_in_c3[506:468]), | |
| 9985 | .din0 (concat_st_decc_out_c3[506:468]), | |
| 9986 | .din1 (l2b_l2d_fbdecc_c5[506:468]), | |
| 9987 | .sel0 (cache_sel_fbdecc_c5_n), | |
| 9988 | .sel1 (cache_sel_fbdecc_c5) | |
| 9989 | ); | |
| 9990 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__width_39 mux_cache_decc_in_c3_14 | |
| 9991 | ( | |
| 9992 | .dout (cache_decc_in_c3[545:507]), | |
| 9993 | .din0 (concat_st_decc_out_c3[545:507]), | |
| 9994 | .din1 (l2b_l2d_fbdecc_c5[545:507]), | |
| 9995 | .sel0 (cache_sel_fbdecc_c5_n), | |
| 9996 | .sel1 (cache_sel_fbdecc_c5) | |
| 9997 | ); | |
| 9998 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__width_39 mux_cache_decc_in_c3_15 | |
| 9999 | ( | |
| 10000 | .dout (cache_decc_in_c3[584:546]), | |
| 10001 | .din0 (concat_st_decc_out_c3[584:546]), | |
| 10002 | .din1 (l2b_l2d_fbdecc_c5[584:546]), | |
| 10003 | .sel0 (cache_sel_fbdecc_c5_n), | |
| 10004 | .sel1 (cache_sel_fbdecc_c5) | |
| 10005 | ); | |
| 10006 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__width_39 mux_cache_decc_in_c3_16 | |
| 10007 | ( | |
| 10008 | .dout (cache_decc_in_c3[623:585]), | |
| 10009 | .din0 (concat_st_decc_out_c3[623:585]), | |
| 10010 | .din1 (l2b_l2d_fbdecc_c5[623:585]), | |
| 10011 | .sel0 (cache_sel_fbdecc_c5_n), | |
| 10012 | .sel1 (cache_sel_fbdecc_c5) | |
| 10013 | ); | |
| 10014 | ||
| 10015 | ||
| 10016 | // CHANGE 1 | |
| 10017 | //always@(negedge l1clk) | |
| 10018 | //begin | |
| 10019 | // cache_decc_in_c3b_l[623:0] <= ~cache_decc_in_c3[623:0]; | |
| 10020 | //end | |
| 10021 | // | |
| 10022 | ||
| 10023 | n2_l2d_sp_512kb_cust_tisram_blbi_macro__width_624 j3 | |
| 10024 | ( | |
| 10025 | .l1clk ( l1clk_intnl), | |
| 10026 | .d_a (cache_decc_in_c3[623:0]), | |
| 10027 | .q_b_l (cache_decc_in_c3b_l[623:0]) | |
| 10028 | ); | |
| 10029 | ||
| 10030 | ||
| 10031 | //assign cache_decc_in_c3b_l[623:0] = ~cache_decc_in_c3b[623:0]; | |
| 10032 | ||
| 10033 | // | |
| 10034 | // This portion will bypass filldata | |
| 10035 | // and send out read data from meory or filldata | |
| 10036 | ||
| 10037 | // sel fill buffer data over l2$ data. | |
| 10038 | ||
| 10039 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_1 ff_cache_fb_hit_c4 | |
| 10040 | ( | |
| 10041 | .scan_in(ff_cache_fb_hit_c4_scanin[0:0]), | |
| 10042 | .scan_out(ff_cache_fb_hit_c4_scanout[0:0]), | |
| 10043 | .din (l2t_l2d_fb_hit_c3), | |
| 10044 | .l1clk (l1clk_in), | |
| 10045 | .dout (cache_fb_hit_c4), | |
| 10046 | .siclk(siclk), | |
| 10047 | .soclk(soclk) | |
| 10048 | ); | |
| 10049 | ||
| 10050 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_1 ff_cache_fb_hit_c5 | |
| 10051 | ( | |
| 10052 | .scan_in(ff_cache_fb_hit_c5_scanin[0:0]), | |
| 10053 | .scan_out(ff_cache_fb_hit_c5_scanout[0:0]), | |
| 10054 | .din (cache_fb_hit_c4), | |
| 10055 | .l1clk (l1clk_intnl), | |
| 10056 | .dout (cache_fb_hit_c5), | |
| 10057 | .siclk(siclk), | |
| 10058 | .soclk(soclk) | |
| 10059 | ); | |
| 10060 | ||
| 10061 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_1 ff_cache_fb_hit_c52 | |
| 10062 | ( | |
| 10063 | .scan_in(ff_cache_fb_hit_c52_scanin[0:0]), | |
| 10064 | .scan_out(ff_cache_fb_hit_c52_scanout[0:0]), | |
| 10065 | .din (cache_fb_hit_c5), | |
| 10066 | .l1clk (l1clk_intnl), | |
| 10067 | .dout (cache_fb_hit_c52), | |
| 10068 | .siclk(siclk), | |
| 10069 | .soclk(soclk) | |
| 10070 | ); | |
| 10071 | ||
| 10072 | n2_l2d_sp_512kb_cust_inv_macro__width_1 cache_fb_hit_c52_inv_slice ( | |
| 10073 | .dout (cache_fb_hit_c52_n), | |
| 10074 | .din (cache_fb_hit_c52) | |
| 10075 | ); | |
| 10076 | ||
| 10077 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c52_lo0_1 | |
| 10078 | ( | |
| 10079 | .scan_in(ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[38:0]), | |
| 10080 | .scan_out(ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[38:0]), | |
| 10081 | .dout (l2b_l2d_fbdecc_c52[38:0]), | |
| 10082 | .din (l2b_l2d_fbdecc_c5[38:0]), | |
| 10083 | .l1clk (l1clk_intnl), | |
| 10084 | .siclk(siclk), | |
| 10085 | .soclk(soclk) | |
| 10086 | ); | |
| 10087 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c52_lo0_2 | |
| 10088 | ( | |
| 10089 | .scan_in(ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[38:0]), | |
| 10090 | .scan_out(ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[38:0]), | |
| 10091 | .dout (l2b_l2d_fbdecc_c52[77:39]), | |
| 10092 | .din (l2b_l2d_fbdecc_c5[77:39]), | |
| 10093 | .l1clk (l1clk_intnl), | |
| 10094 | .siclk(siclk), | |
| 10095 | .soclk(soclk) | |
| 10096 | ); | |
| 10097 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c52_hi0_1 | |
| 10098 | ( | |
| 10099 | .scan_in(ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[38:0]), | |
| 10100 | .scan_out(ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[38:0]), | |
| 10101 | .dout (l2b_l2d_fbdecc_c52[116:78]), | |
| 10102 | .din (l2b_l2d_fbdecc_c5[116:78]), | |
| 10103 | .l1clk (l1clk_intnl), | |
| 10104 | .siclk(siclk), | |
| 10105 | .soclk(soclk) | |
| 10106 | ); | |
| 10107 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c52_hi0_2 | |
| 10108 | ( | |
| 10109 | .scan_in(ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[38:0]), | |
| 10110 | .scan_out(ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[38:0]), | |
| 10111 | .dout (l2b_l2d_fbdecc_c52[155:117]), | |
| 10112 | .din (l2b_l2d_fbdecc_c5[155:117]), | |
| 10113 | .l1clk (l1clk_intnl), | |
| 10114 | .siclk(siclk), | |
| 10115 | .soclk(soclk) | |
| 10116 | ); | |
| 10117 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c52_lo0_3 | |
| 10118 | ( | |
| 10119 | .scan_in(ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[38:0]), | |
| 10120 | .scan_out(ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[38:0]), | |
| 10121 | .dout (l2b_l2d_fbdecc_c52[194:156]), | |
| 10122 | .din (l2b_l2d_fbdecc_c5[194:156]), | |
| 10123 | .l1clk (l1clk_intnl), | |
| 10124 | .siclk(siclk), | |
| 10125 | .soclk(soclk) | |
| 10126 | ); | |
| 10127 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c52_lo0_4 | |
| 10128 | ( | |
| 10129 | .scan_in(ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[38:0]), | |
| 10130 | .scan_out(ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[38:0]), | |
| 10131 | .dout (l2b_l2d_fbdecc_c52[233:195]), | |
| 10132 | .din (l2b_l2d_fbdecc_c5[233:195]), | |
| 10133 | .l1clk (l1clk_intnl), | |
| 10134 | .siclk(siclk), | |
| 10135 | .soclk(soclk) | |
| 10136 | ); | |
| 10137 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c52_hi0_3 | |
| 10138 | ( | |
| 10139 | .scan_in(ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[38:0]), | |
| 10140 | .scan_out(ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[38:0]), | |
| 10141 | .dout (l2b_l2d_fbdecc_c52[272:234]), | |
| 10142 | .din (l2b_l2d_fbdecc_c5[272:234]), | |
| 10143 | .l1clk (l1clk_intnl), | |
| 10144 | .siclk(siclk), | |
| 10145 | .soclk(soclk) | |
| 10146 | ); | |
| 10147 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c52_hi0_4 | |
| 10148 | ( | |
| 10149 | .scan_in(ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[38:0]), | |
| 10150 | .scan_out(ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[38:0]), | |
| 10151 | .dout (l2b_l2d_fbdecc_c52[311:273]), | |
| 10152 | .din (l2b_l2d_fbdecc_c5[311:273]), | |
| 10153 | .l1clk (l1clk_intnl), | |
| 10154 | .siclk(siclk), | |
| 10155 | .soclk(soclk) | |
| 10156 | ); | |
| 10157 | ||
| 10158 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c52_lo1_1 | |
| 10159 | ( | |
| 10160 | .scan_in(ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[38:0]), | |
| 10161 | .scan_out(ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[38:0]), | |
| 10162 | .dout (l2b_l2d_fbdecc_c52[350:312]), | |
| 10163 | .din (l2b_l2d_fbdecc_c5[350:312]), | |
| 10164 | .l1clk (l1clk_intnl), | |
| 10165 | .siclk(siclk), | |
| 10166 | .soclk(soclk) | |
| 10167 | ); | |
| 10168 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c52_lo1_2 | |
| 10169 | ( | |
| 10170 | .scan_in(ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[38:0]), | |
| 10171 | .scan_out(ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[38:0]), | |
| 10172 | .dout (l2b_l2d_fbdecc_c52[389:351]), | |
| 10173 | .din (l2b_l2d_fbdecc_c5[389:351]), | |
| 10174 | .l1clk (l1clk_intnl), | |
| 10175 | .siclk(siclk), | |
| 10176 | .soclk(soclk) | |
| 10177 | ); | |
| 10178 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c52_hi1_1 | |
| 10179 | ( | |
| 10180 | .scan_in(ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[38:0]), | |
| 10181 | .scan_out(ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[38:0]), | |
| 10182 | .dout (l2b_l2d_fbdecc_c52[428:390]), | |
| 10183 | .din (l2b_l2d_fbdecc_c5[428:390]), | |
| 10184 | .l1clk (l1clk_intnl), | |
| 10185 | .siclk(siclk), | |
| 10186 | .soclk(soclk) | |
| 10187 | ); | |
| 10188 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c52_hi1_2 | |
| 10189 | ( | |
| 10190 | .scan_in(ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[38:0]), | |
| 10191 | .scan_out(ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[38:0]), | |
| 10192 | .dout (l2b_l2d_fbdecc_c52[467:429]), | |
| 10193 | .din (l2b_l2d_fbdecc_c5[467:429]), | |
| 10194 | .l1clk (l1clk_intnl), | |
| 10195 | .siclk(siclk), | |
| 10196 | .soclk(soclk) | |
| 10197 | ); | |
| 10198 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c52_lo1_3 | |
| 10199 | ( | |
| 10200 | .scan_in(ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[38:0]), | |
| 10201 | .scan_out(ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[38:0]), | |
| 10202 | .dout (l2b_l2d_fbdecc_c52[506:468]), | |
| 10203 | .din (l2b_l2d_fbdecc_c5[506:468]), | |
| 10204 | .l1clk (l1clk_intnl), | |
| 10205 | .siclk(siclk), | |
| 10206 | .soclk(soclk) | |
| 10207 | ); | |
| 10208 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c52_lo1_4 | |
| 10209 | ( | |
| 10210 | .scan_in(ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[38:0]), | |
| 10211 | .scan_out(ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[38:0]), | |
| 10212 | .dout (l2b_l2d_fbdecc_c52[545:507]), | |
| 10213 | .din (l2b_l2d_fbdecc_c5[545:507]), | |
| 10214 | .l1clk (l1clk_intnl), | |
| 10215 | .siclk(siclk), | |
| 10216 | .soclk(soclk) | |
| 10217 | ); | |
| 10218 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c52_hi1_3 | |
| 10219 | ( | |
| 10220 | .scan_in(ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[38:0]), | |
| 10221 | .scan_out(ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[38:0]), | |
| 10222 | .dout (l2b_l2d_fbdecc_c52[584:546]), | |
| 10223 | .din (l2b_l2d_fbdecc_c5[584:546]), | |
| 10224 | .l1clk (l1clk_intnl), | |
| 10225 | .siclk(siclk), | |
| 10226 | .soclk(soclk) | |
| 10227 | ); | |
| 10228 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2b_l2d_fbdecc_c52_hi1_4 | |
| 10229 | ( | |
| 10230 | .scan_in(ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[38:0]), | |
| 10231 | .scan_out(ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[38:0]), | |
| 10232 | .dout (l2b_l2d_fbdecc_c52[623:585]), | |
| 10233 | .din (l2b_l2d_fbdecc_c5[623:585]), | |
| 10234 | .l1clk (l1clk_intnl), | |
| 10235 | .siclk(siclk), | |
| 10236 | .soclk(soclk) | |
| 10237 | ); | |
| 10238 | ||
| 10239 | ||
| 10240 | // CHECK | |
| 10241 | ||
| 10242 | //assign cache_decc_out_c52= {cache_decc_out_3_c52[155:0], cache_decc_out_2_c52[155:0], | |
| 10243 | // cache_decc_out_1_c52[155:0],cache_decc_out_0_c52[155:0]}; | |
| 10244 | ||
| 10245 | //mux_macro mux_rd_decc_out_c52_1 (width=39,ports=2,mux=aonpe) | |
| 10246 | // ( | |
| 10247 | // .dout (rd_decc_out_c52[38:0]), | |
| 10248 | // .din0 (cache_decc_out_c52[38:0]), | |
| 10249 | // .din1 (l2b_l2d_fbdecc_c52[38:0]), | |
| 10250 | // .sel0 (cache_fb_hit_c52_n), | |
| 10251 | // .sel1 (cache_fb_hit_c52) | |
| 10252 | // ); | |
| 10253 | //mux_macro mux_rd_decc_out_c52_2 (width=39,ports=2,mux=aonpe) | |
| 10254 | // ( | |
| 10255 | // .dout (rd_decc_out_c52[77:39]), | |
| 10256 | // .din0 (cache_decc_out_c52[77:39]), | |
| 10257 | // .din1 (l2b_l2d_fbdecc_c52[77:39]), | |
| 10258 | // .sel0 (cache_fb_hit_c52_n), | |
| 10259 | // .sel1 (cache_fb_hit_c52) | |
| 10260 | // ); | |
| 10261 | //mux_macro mux_rd_decc_out_c52_3 (width=39,ports=2,mux=aonpe) | |
| 10262 | // ( | |
| 10263 | // .dout (rd_decc_out_c52[116:78]), | |
| 10264 | // .din0 (cache_decc_out_c52[116:78]), | |
| 10265 | // .din1 (l2b_l2d_fbdecc_c52[116:78]), | |
| 10266 | // .sel0 (cache_fb_hit_c52_n), | |
| 10267 | // .sel1 (cache_fb_hit_c52) | |
| 10268 | // ); | |
| 10269 | //mux_macro mux_rd_decc_out_c52_4 (width=39,ports=2,mux=aonpe) | |
| 10270 | // ( | |
| 10271 | // .dout (rd_decc_out_c52[155:117]), | |
| 10272 | // .din0 (cache_decc_out_c52[155:117]), | |
| 10273 | // .din1 (l2b_l2d_fbdecc_c52[155:117]), | |
| 10274 | // .sel0 (cache_fb_hit_c52_n), | |
| 10275 | // .sel1 (cache_fb_hit_c52) | |
| 10276 | // ); | |
| 10277 | //mux_macro mux_rd_decc_out_c52_5 (width=39,ports=2,mux=aonpe) | |
| 10278 | // ( | |
| 10279 | // .dout (rd_decc_out_c52[194:156]), | |
| 10280 | // .din0 (cache_decc_out_c52[194:156]), | |
| 10281 | // .din1 (l2b_l2d_fbdecc_c52[194:156]), | |
| 10282 | // .sel0 (cache_fb_hit_c52_n), | |
| 10283 | // .sel1 (cache_fb_hit_c52) | |
| 10284 | // ); | |
| 10285 | //mux_macro mux_rd_decc_out_c52_6 (width=39,ports=2,mux=aonpe) | |
| 10286 | // ( | |
| 10287 | // .dout (rd_decc_out_c52[233:195]), | |
| 10288 | // .din0 (cache_decc_out_c52[233:195]), | |
| 10289 | // .din1 (l2b_l2d_fbdecc_c52[233:195]), | |
| 10290 | // .sel0 (cache_fb_hit_c52_n), | |
| 10291 | // .sel1 (cache_fb_hit_c52) | |
| 10292 | // ); | |
| 10293 | //mux_macro mux_rd_decc_out_c52_7 (width=39,ports=2,mux=aonpe) | |
| 10294 | // ( | |
| 10295 | // .dout (rd_decc_out_c52[272:234]), | |
| 10296 | // .din0 (cache_decc_out_c52[272:234]), | |
| 10297 | // .din1 (l2b_l2d_fbdecc_c52[272:234]), | |
| 10298 | // .sel0 (cache_fb_hit_c52_n), | |
| 10299 | // .sel1 (cache_fb_hit_c52) | |
| 10300 | // ); | |
| 10301 | //mux_macro mux_rd_decc_out_c52_8 (width=39,ports=2,mux=aonpe) | |
| 10302 | // ( | |
| 10303 | // .dout (rd_decc_out_c52[311:273]), | |
| 10304 | // .din0 (cache_decc_out_c52[311:273]), | |
| 10305 | // .din1 (l2b_l2d_fbdecc_c52[311:273]), | |
| 10306 | // .sel0 (cache_fb_hit_c52_n), | |
| 10307 | // .sel1 (cache_fb_hit_c52) | |
| 10308 | // ); | |
| 10309 | //mux_macro mux_rd_decc_out_c52_9 (width=39,ports=2,mux=aonpe) | |
| 10310 | // ( | |
| 10311 | // .dout (rd_decc_out_c52[350:312]), | |
| 10312 | // .din0 (cache_decc_out_c52[350:312]), | |
| 10313 | // .din1 (l2b_l2d_fbdecc_c52[350:312]), | |
| 10314 | // .sel0 (cache_fb_hit_c52_n), | |
| 10315 | // .sel1 (cache_fb_hit_c52) | |
| 10316 | // ); | |
| 10317 | //mux_macro mux_rd_decc_out_c52_10 (width=39,ports=2,mux=aonpe) | |
| 10318 | // ( | |
| 10319 | // .dout (rd_decc_out_c52[389:351]), | |
| 10320 | // .din0 (cache_decc_out_c52[389:351]), | |
| 10321 | // .din1 (l2b_l2d_fbdecc_c52[389:351]), | |
| 10322 | // .sel0 (cache_fb_hit_c52_n), | |
| 10323 | // .sel1 (cache_fb_hit_c52) | |
| 10324 | // ); | |
| 10325 | //mux_macro mux_rd_decc_out_c52_11 (width=39,ports=2,mux=aonpe) | |
| 10326 | // ( | |
| 10327 | // .dout (rd_decc_out_c52[428:390]), | |
| 10328 | // .din0 (cache_decc_out_c52[428:390]), | |
| 10329 | // .din1 (l2b_l2d_fbdecc_c52[428:390]), | |
| 10330 | // .sel0 (cache_fb_hit_c52_n), | |
| 10331 | // .sel1 (cache_fb_hit_c52) | |
| 10332 | // ); | |
| 10333 | //mux_macro mux_rd_decc_out_c52_12 (width=39,ports=2,mux=aonpe) | |
| 10334 | // ( | |
| 10335 | // .dout (rd_decc_out_c52[467:429]), | |
| 10336 | // .din0 (cache_decc_out_c52[467:429]), | |
| 10337 | // .din1 (l2b_l2d_fbdecc_c52[467:429]), | |
| 10338 | // .sel0 (cache_fb_hit_c52_n), | |
| 10339 | // .sel1 (cache_fb_hit_c52) | |
| 10340 | // ); | |
| 10341 | //mux_macro mux_rd_decc_out_c52_13 (width=39,ports=2,mux=aonpe) | |
| 10342 | // ( | |
| 10343 | // .dout (rd_decc_out_c52[506:468]), | |
| 10344 | // .din0 (cache_decc_out_c52[506:468]), | |
| 10345 | // .din1 (l2b_l2d_fbdecc_c52[506:468]), | |
| 10346 | // .sel0 (cache_fb_hit_c52_n), | |
| 10347 | // .sel1 (cache_fb_hit_c52) | |
| 10348 | // ); | |
| 10349 | //mux_macro mux_rd_decc_out_c52_14 (width=39,ports=2,mux=aonpe) | |
| 10350 | // ( | |
| 10351 | // .dout (rd_decc_out_c52[545:507]), | |
| 10352 | // .din0 (cache_decc_out_c52[545:507]), | |
| 10353 | // .din1 (l2b_l2d_fbdecc_c52[545:507]), | |
| 10354 | // .sel0 (cache_fb_hit_c52_n), | |
| 10355 | // .sel1 (cache_fb_hit_c52) | |
| 10356 | // ); | |
| 10357 | //mux_macro mux_rd_decc_out_c52_15 (width=39,ports=2,mux=aonpe) | |
| 10358 | // ( | |
| 10359 | // .dout (rd_decc_out_c52[584:546]), | |
| 10360 | // .din0 (cache_decc_out_c52[584:546]), | |
| 10361 | // .din1 (l2b_l2d_fbdecc_c52[584:546]), | |
| 10362 | // .sel0 (cache_fb_hit_c52_n), | |
| 10363 | // .sel1 (cache_fb_hit_c52) | |
| 10364 | // ); | |
| 10365 | //mux_macro mux_rd_decc_out_c52_16 (width=39,ports=2,mux=aonpe) | |
| 10366 | // ( | |
| 10367 | // .dout (rd_decc_out_c52[623:585]), | |
| 10368 | // .din0 (cache_decc_out_c52[623:585]), | |
| 10369 | // .din1 (l2b_l2d_fbdecc_c52[623:585]), | |
| 10370 | // .sel0 (cache_fb_hit_c52_n), | |
| 10371 | // .sel1 (cache_fb_hit_c52) | |
| 10372 | // ); | |
| 10373 | ||
| 10374 | //assign l2d_decc_out_c52[623:0] = rd_decc_out_c52[623:0]; | |
| 10375 | ||
| 10376 | //split following bus into 39 chunk because of the scan connection | |
| 10377 | //msff_ctl_macro ff_l2d_decc_out_c6_0 (width=156) | |
| 10378 | // ( | |
| 10379 | // .scan_in(ff_l2d_decc_out_c6_0_scanin), | |
| 10380 | // .scan_out(ff_l2d_decc_out_c6_0_scanout), | |
| 10381 | // .dout (l2d_decc_out_c6[155:0]), | |
| 10382 | // .din (l2d_l2t_decc_c52_0[155:0]), | |
| 10383 | // .l1clk (l1clk_evict_c6), | |
| 10384 | // ); | |
| 10385 | // | |
| 10386 | //msff_ctl_macro ff_l2d_decc_out_c6_1 (width=156) | |
| 10387 | // ( | |
| 10388 | // .scan_in(ff_l2d_decc_out_c6_1_scanin), | |
| 10389 | // .scan_out(ff_l2d_decc_out_c6_1_scanout), | |
| 10390 | // .dout (l2d_decc_out_c6[311:156]), | |
| 10391 | // .din (l2d_l2t_decc_c52_1[155:0]), | |
| 10392 | // .l1clk (l1clk_evict_c6), | |
| 10393 | // ); | |
| 10394 | // | |
| 10395 | //msff_ctl_macro ff_l2d_decc_out_c6_2 (width=156) | |
| 10396 | // ( | |
| 10397 | // .scan_in(ff_l2d_decc_out_c6_2_scanin), | |
| 10398 | // .scan_out(ff_l2d_decc_out_c6_2_scanout), | |
| 10399 | // .dout (l2d_decc_out_c6[467:312]), | |
| 10400 | // .din (l2d_l2t_decc_c52_2[155:0]), | |
| 10401 | // .l1clk (l1clk_evict_c6), | |
| 10402 | // ); | |
| 10403 | // | |
| 10404 | //msff_ctl_macro ff_l2d_decc_out_c6_3 (width=156) | |
| 10405 | // ( | |
| 10406 | // .scan_in(ff_l2d_decc_out_c6_3_scanin), | |
| 10407 | // .scan_out(ff_l2d_decc_out_c6_3_scanout), | |
| 10408 | // .dout (l2d_decc_out_c6[623:468]), | |
| 10409 | // .din (l2d_l2t_decc_c52_3[155:0]), | |
| 10410 | // .l1clk (l1clk_evict_c6), | |
| 10411 | // ); | |
| 10412 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_decc_out_c6_lo0_1 | |
| 10413 | ( | |
| 10414 | .scan_in(ff_l2d_decc_out_c6_lo0_1_scanin[38:0]), | |
| 10415 | .scan_out(ff_l2d_decc_out_c6_lo0_1_scanout[38:0]), | |
| 10416 | .dout (l2d_decc_out_c6[38:0]), | |
| 10417 | .din (l2d_l2t_decc_c52_0[38:0]), | |
| 10418 | .l1clk (l1clk_evict_c6), | |
| 10419 | .siclk(siclk), | |
| 10420 | .soclk(soclk) | |
| 10421 | ); | |
| 10422 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_decc_out_c6_lo0_2 | |
| 10423 | ( | |
| 10424 | .scan_in(ff_l2d_decc_out_c6_lo0_2_scanin[38:0]), | |
| 10425 | .scan_out(ff_l2d_decc_out_c6_lo0_2_scanout[38:0]), | |
| 10426 | .dout (l2d_decc_out_c6[77:39]), | |
| 10427 | .din (l2d_l2t_decc_c52_0[77:39]), | |
| 10428 | .l1clk (l1clk_evict_c6), | |
| 10429 | .siclk(siclk), | |
| 10430 | .soclk(soclk) | |
| 10431 | ); | |
| 10432 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_decc_out_c6_hi0_1 | |
| 10433 | ( | |
| 10434 | .scan_in(ff_l2d_decc_out_c6_hi0_1_scanin[38:0]), | |
| 10435 | .scan_out(ff_l2d_decc_out_c6_hi0_1_scanout[38:0]), | |
| 10436 | .dout (l2d_decc_out_c6[116:78]), | |
| 10437 | .din (l2d_l2t_decc_c52_0[116:78]), | |
| 10438 | .l1clk (l1clk_evict_c6), | |
| 10439 | .siclk(siclk), | |
| 10440 | .soclk(soclk) | |
| 10441 | ); | |
| 10442 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_decc_out_c6_hi0_2 | |
| 10443 | ( | |
| 10444 | .scan_in(ff_l2d_decc_out_c6_hi0_2_scanin[38:0]), | |
| 10445 | .scan_out(ff_l2d_decc_out_c6_hi0_2_scanout[38:0]), | |
| 10446 | .dout (l2d_decc_out_c6[155:117]), | |
| 10447 | .din (l2d_l2t_decc_c52_0[155:117]), | |
| 10448 | .l1clk (l1clk_evict_c6), | |
| 10449 | .siclk(siclk), | |
| 10450 | .soclk(soclk) | |
| 10451 | ); | |
| 10452 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_decc_out_c6_lo0_3 | |
| 10453 | ( | |
| 10454 | .scan_in(ff_l2d_decc_out_c6_lo0_3_scanin[38:0]), | |
| 10455 | .scan_out(ff_l2d_decc_out_c6_lo0_3_scanout[38:0]), | |
| 10456 | .dout (l2d_decc_out_c6[194:156]), | |
| 10457 | .din (l2d_l2t_decc_c52_1[38:0]), | |
| 10458 | .l1clk (l1clk_evict_c6), | |
| 10459 | .siclk(siclk), | |
| 10460 | .soclk(soclk) | |
| 10461 | ); | |
| 10462 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_decc_out_c6_lo0_4 | |
| 10463 | ( | |
| 10464 | .scan_in(ff_l2d_decc_out_c6_lo0_4_scanin[38:0]), | |
| 10465 | .scan_out(ff_l2d_decc_out_c6_lo0_4_scanout[38:0]), | |
| 10466 | .dout (l2d_decc_out_c6[233:195]), | |
| 10467 | .din (l2d_l2t_decc_c52_1[77:39]), | |
| 10468 | .l1clk (l1clk_evict_c6), | |
| 10469 | .siclk(siclk), | |
| 10470 | .soclk(soclk) | |
| 10471 | ); | |
| 10472 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_decc_out_c6_hi0_3 | |
| 10473 | ( | |
| 10474 | .scan_in(ff_l2d_decc_out_c6_hi0_3_scanin[38:0]), | |
| 10475 | .scan_out(ff_l2d_decc_out_c6_hi0_3_scanout[38:0]), | |
| 10476 | .dout (l2d_decc_out_c6[272:234]), | |
| 10477 | .din (l2d_l2t_decc_c52_1[116:78]), | |
| 10478 | .l1clk (l1clk_evict_c6), | |
| 10479 | .siclk(siclk), | |
| 10480 | .soclk(soclk) | |
| 10481 | ); | |
| 10482 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_decc_out_c6_hi0_4 | |
| 10483 | ( | |
| 10484 | .scan_in(ff_l2d_decc_out_c6_hi0_4_scanin[38:0]), | |
| 10485 | .scan_out(ff_l2d_decc_out_c6_hi0_4_scanout[38:0]), | |
| 10486 | .dout (l2d_decc_out_c6[311:273]), | |
| 10487 | .din (l2d_l2t_decc_c52_1[155:117]), | |
| 10488 | .l1clk (l1clk_evict_c6), | |
| 10489 | .siclk(siclk), | |
| 10490 | .soclk(soclk) | |
| 10491 | ); | |
| 10492 | ||
| 10493 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_decc_out_c6_lo1_1 | |
| 10494 | ( | |
| 10495 | .scan_in(ff_l2d_decc_out_c6_lo1_1_scanin[38:0]), | |
| 10496 | .scan_out(ff_l2d_decc_out_c6_lo1_1_scanout[38:0]), | |
| 10497 | .dout (l2d_decc_out_c6[350:312]), | |
| 10498 | .din (l2d_l2t_decc_c52_2[38:0]), | |
| 10499 | .l1clk (l1clk_evict_c6), | |
| 10500 | .siclk(siclk), | |
| 10501 | .soclk(soclk) | |
| 10502 | ); | |
| 10503 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_decc_out_c6_lo1_2 | |
| 10504 | ( | |
| 10505 | .scan_in(ff_l2d_decc_out_c6_lo1_2_scanin[38:0]), | |
| 10506 | .scan_out(ff_l2d_decc_out_c6_lo1_2_scanout[38:0]), | |
| 10507 | .dout (l2d_decc_out_c6[389:351]), | |
| 10508 | .din (l2d_l2t_decc_c52_2[77:39]), | |
| 10509 | .l1clk (l1clk_evict_c6), | |
| 10510 | .siclk(siclk), | |
| 10511 | .soclk(soclk) | |
| 10512 | ); | |
| 10513 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_decc_out_c6_hi1_1 | |
| 10514 | ( | |
| 10515 | .scan_in(ff_l2d_decc_out_c6_hi1_1_scanin[38:0]), | |
| 10516 | .scan_out(ff_l2d_decc_out_c6_hi1_1_scanout[38:0]), | |
| 10517 | .dout (l2d_decc_out_c6[428:390]), | |
| 10518 | .din (l2d_l2t_decc_c52_2[116:78]), | |
| 10519 | .l1clk (l1clk_evict_c6), | |
| 10520 | .siclk(siclk), | |
| 10521 | .soclk(soclk) | |
| 10522 | ); | |
| 10523 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_decc_out_c6_hi1_2 | |
| 10524 | ( | |
| 10525 | .scan_in(ff_l2d_decc_out_c6_hi1_2_scanin[38:0]), | |
| 10526 | .scan_out(ff_l2d_decc_out_c6_hi1_2_scanout[38:0]), | |
| 10527 | .dout (l2d_decc_out_c6[467:429]), | |
| 10528 | .din (l2d_l2t_decc_c52_2[155:117]), | |
| 10529 | .l1clk (l1clk_evict_c6), | |
| 10530 | .siclk(siclk), | |
| 10531 | .soclk(soclk) | |
| 10532 | ); | |
| 10533 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_decc_out_c6_lo1_3 | |
| 10534 | ( | |
| 10535 | .scan_in(ff_l2d_decc_out_c6_lo1_3_scanin[38:0]), | |
| 10536 | .scan_out(ff_l2d_decc_out_c6_lo1_3_scanout[38:0]), | |
| 10537 | .dout (l2d_decc_out_c6[506:468]), | |
| 10538 | .din (l2d_l2t_decc_c52_3[38:0]), | |
| 10539 | .l1clk (l1clk_evict_c6), | |
| 10540 | .siclk(siclk), | |
| 10541 | .soclk(soclk) | |
| 10542 | ); | |
| 10543 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_decc_out_c6_lo1_4 | |
| 10544 | ( | |
| 10545 | .scan_in(ff_l2d_decc_out_c6_lo1_4_scanin[38:0]), | |
| 10546 | .scan_out(ff_l2d_decc_out_c6_lo1_4_scanout[38:0]), | |
| 10547 | .dout (l2d_decc_out_c6[545:507]), | |
| 10548 | .din (l2d_l2t_decc_c52_3[77:39]), | |
| 10549 | .l1clk (l1clk_evict_c6), | |
| 10550 | .siclk(siclk), | |
| 10551 | .soclk(soclk) | |
| 10552 | ); | |
| 10553 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_decc_out_c6_hi1_3 | |
| 10554 | ( | |
| 10555 | .scan_in(ff_l2d_decc_out_c6_hi1_3_scanin[38:0]), | |
| 10556 | .scan_out(ff_l2d_decc_out_c6_hi1_3_scanout[38:0]), | |
| 10557 | .dout (l2d_decc_out_c6[584:546]), | |
| 10558 | .din (l2d_l2t_decc_c52_3[116:78]), | |
| 10559 | .l1clk (l1clk_evict_c6), | |
| 10560 | .siclk(siclk), | |
| 10561 | .soclk(soclk) | |
| 10562 | ); | |
| 10563 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_39 ff_l2d_decc_out_c6_hi1_4 | |
| 10564 | ( | |
| 10565 | .scan_in(ff_l2d_decc_out_c6_hi1_4_scanin[38:0]), | |
| 10566 | .scan_out(ff_l2d_decc_out_c6_hi1_4_scanout[38:0]), | |
| 10567 | .dout (l2d_decc_out_c6[623:585]), | |
| 10568 | .din (l2d_l2t_decc_c52_3[155:117]), | |
| 10569 | .l1clk (l1clk_evict_c6), | |
| 10570 | .siclk(siclk), | |
| 10571 | .soclk(soclk) | |
| 10572 | ); | |
| 10573 | ||
| 10574 | ||
| 10575 | //////////////////////////////////////////////////////////////////////// | |
| 10576 | // The 64B-16B mux will be performed in the full custom data array. | |
| 10577 | // if the col offsets are non one hot, l2t will cause the hold signal | |
| 10578 | // to be high causing the output mux to hold its old value. | |
| 10579 | //////////////////////////////////////////////////////////////////////// | |
| 10580 | //assign sel_top = cache_col_offset_c52[0] | cache_col_offset_c52[2]; | |
| 10581 | //assign sel_bot = cache_col_offset_c52[1] | cache_col_offset_c52[3]; | |
| 10582 | // | |
| 10583 | //assign l2d_l2t_decc_c52[155:0] = sel_top ? cache_decc_out_top_c52b[155:0] : | |
| 10584 | // cache_decc_out_bot_c52b[155:0]; | |
| 10585 | ||
| 10586 | //reg [155:0] cache_decc_out_0_c52; | |
| 10587 | //reg [155:0] cache_decc_out_1_c52; | |
| 10588 | //reg [155:0] cache_decc_out_2_c52; | |
| 10589 | //reg [155:0] cache_decc_out_3_c52; | |
| 10590 | ||
| 10591 | //CHANGE 2 | |
| 10592 | //always@(posedge l1clk) | |
| 10593 | //begin | |
| 10594 | // | |
| 10595 | // cache_decc_out_0_c52_d[155:0] <= cache_decc_out_c52b_l[155:0]; | |
| 10596 | // cache_decc_out_1_c52_d[155:0] <= cache_decc_out_c52b_l[311:156]; | |
| 10597 | // cache_decc_out_2_c52_d[155:0] <= cache_decc_out_c52b_l[467:312]; | |
| 10598 | // cache_decc_out_3_c52_d[155:0] <= cache_decc_out_c52b_l[623:468]; | |
| 10599 | //end | |
| 10600 | ||
| 10601 | n2_l2d_sp_512kb_cust_tisram_bla_macro__width_156 ff_cache_decc_out_0_c52_d | |
| 10602 | ( | |
| 10603 | .q_a (cache_decc_out_0_c52[155:0]), | |
| 10604 | .d_b (cache_decc_out_c5b[155:0]), | |
| 10605 | .l1clk (l1clk_intnl) | |
| 10606 | ); | |
| 10607 | ||
| 10608 | n2_l2d_sp_512kb_cust_tisram_bla_macro__width_156 ff_cache_decc_out_1_c52_d | |
| 10609 | ( | |
| 10610 | .q_a (cache_decc_out_1_c52[155:0]), | |
| 10611 | .d_b (cache_decc_out_c5b[311:156]), | |
| 10612 | .l1clk (l1clk_intnl) | |
| 10613 | ); | |
| 10614 | ||
| 10615 | ||
| 10616 | n2_l2d_sp_512kb_cust_tisram_bla_macro__width_156 ff_cache_decc_out_2_c52_d | |
| 10617 | ( | |
| 10618 | .q_a (cache_decc_out_2_c52[155:0]), | |
| 10619 | .d_b (cache_decc_out_c5b[467:312]), | |
| 10620 | .l1clk (l1clk_intnl) | |
| 10621 | ); | |
| 10622 | ||
| 10623 | n2_l2d_sp_512kb_cust_tisram_bla_macro__width_156 ff_cache_decc_out_3_c52_d | |
| 10624 | ( | |
| 10625 | .q_a (cache_decc_out_3_c52[155:0]), | |
| 10626 | .d_b (cache_decc_out_c5b[623:468]), | |
| 10627 | .l1clk (l1clk_intnl) | |
| 10628 | ); | |
| 10629 | ||
| 10630 | ||
| 10631 | // The following portion of the code is used for verification | |
| 10632 | // synopsys translate_off | |
| 10633 | assign cache_decc_out_c52[623:0] = {cache_decc_out_3_c52[155:0],cache_decc_out_2_c52[155:0], | |
| 10634 | cache_decc_out_1_c52[155:0],cache_decc_out_0_c52[155:0]}; | |
| 10635 | ||
| 10636 | assign cache_rd_wr_c3 = l2t_l2d_rd_wr_c3; | |
| 10637 | // synopsys translate_on | |
| 10638 | ||
| 10639 | ||
| 10640 | // CHANGE 10 | |
| 10641 | //always@(negedge l1clk) | |
| 10642 | //begin | |
| 10643 | // cache_decc_out_0_c52b[155:0] <= cache_decc_out_0_c52[155:0]; | |
| 10644 | // cache_decc_out_1_c52b[155:0] <= cache_decc_out_1_c52[155:0]; | |
| 10645 | // cache_decc_out_2_c52b[155:0] <= cache_decc_out_2_c52[155:0]; | |
| 10646 | // cache_decc_out_3_c52b[155:0] <= cache_decc_out_3_c52[155:0]; | |
| 10647 | //end | |
| 10648 | // | |
| 10649 | ||
| 10650 | ||
| 10651 | //always@(negedge l1clk) | |
| 10652 | //begin | |
| 10653 | // //l2b_l2d_fbdecc_c52b[623:0] <= l2b_l2d_fbdecc_c52[623:0]; | |
| 10654 | // //cache_fb_hit_c52b <= cache_fb_hit_c52; | |
| 10655 | // //cache_col_offset_c52b[3:0] <= cache_col_offset_c52[3:0]; | |
| 10656 | //end | |
| 10657 | ||
| 10658 | //mux_macro mux_cache_data_out_c52 (width=156,ports=4,mux=aonpe,stack=156c) | |
| 10659 | // ( | |
| 10660 | // .dout (cache_data_out_c52[155:0]), | |
| 10661 | // .din0 (cache_decc_out_0_c52[155:0]), | |
| 10662 | // .din1 (cache_decc_out_1_c52[155:0]), | |
| 10663 | // .din2 (cache_decc_out_2_c52[155:0]), | |
| 10664 | // .din3 (cache_decc_out_3_c52[155:0]), | |
| 10665 | // .sel0 (cache_col_offset_c52[0]), | |
| 10666 | // .sel1 (cache_col_offset_c52[1]), | |
| 10667 | // .sel2 (cache_col_offset_c52[2]), | |
| 10668 | // .sel3 (cache_col_offset_c52[3]) | |
| 10669 | // ); | |
| 10670 | ||
| 10671 | //always@(cache_decc_out_0_c52 or cache_decc_out_1_c52 or cache_decc_out_2_c52 | |
| 10672 | // or cache_decc_out_3_c52 or cache_col_offset_c52 or l2b_l2d_fbdecc_c52 or cache_fb_hit_c52) | |
| 10673 | //begin | |
| 10674 | //case(cache_col_offset_c52) | |
| 10675 | //4'b0001 : begin | |
| 10676 | // fill_bypass_data_c52[155:0] = l2b_l2d_fbdecc_c52[155:0]; | |
| 10677 | // end | |
| 10678 | //4'b0010 : begin | |
| 10679 | // fill_bypass_data_c52[155:0] = l2b_l2d_fbdecc_c52[311:156]; | |
| 10680 | // end | |
| 10681 | //4'b0100 : begin | |
| 10682 | // fill_bypass_data_c52[155:0] = l2b_l2d_fbdecc_c52[467:312]; | |
| 10683 | // end | |
| 10684 | //4'b1000 : begin | |
| 10685 | // fill_bypass_data_c52[155:0] = l2b_l2d_fbdecc_c52[623:468]; | |
| 10686 | // end | |
| 10687 | //default : begin | |
| 10688 | // fill_bypass_data_c52[155:0] = 156'b0; | |
| 10689 | // end | |
| 10690 | //endcase | |
| 10691 | //end | |
| 10692 | ||
| 10693 | //mux_macro mux_fill_bypass_data_c52 (width=156,ports=4,mux=aonpe,stack=156c) | |
| 10694 | // ( | |
| 10695 | // .dout (fill_bypass_data_c52[155:0]), | |
| 10696 | // .din0 (l2b_l2d_fbdecc_c52[155:0]), | |
| 10697 | // .din1 (l2b_l2d_fbdecc_c52[311:156]), | |
| 10698 | // .din2 (l2b_l2d_fbdecc_c52[467:312]), | |
| 10699 | // .din3 (l2b_l2d_fbdecc_c52[623:468]), | |
| 10700 | // .sel0 (cache_col_offset_c52[0]), | |
| 10701 | // .sel1 (cache_col_offset_c52[1]), | |
| 10702 | // .sel2 (cache_col_offset_c52[2]), | |
| 10703 | // .sel3 (cache_col_offset_c52[3]) | |
| 10704 | // ); | |
| 10705 | ||
| 10706 | //assign l2d_l2t_decc_c52[155:0] = cache_fb_hit_c52 ? | |
| 10707 | // fill_bypass_data_c52[155:0] : cache_data_out_c52[155:0] ; | |
| 10708 | ||
| 10709 | //inv_macro inv_cache_fb_hit_c52 (width=1) | |
| 10710 | // ( | |
| 10711 | // .dout (cache_fb_hit_c52_n), | |
| 10712 | // .din (cache_fb_hit_c52) | |
| 10713 | // ); | |
| 10714 | ||
| 10715 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__stack_156c__width_156 mux_l2d_l2t_decc_c52_0 | |
| 10716 | ( | |
| 10717 | .dout (l2d_l2t_decc_c52_0[155:0]), | |
| 10718 | .din0 (l2b_l2d_fbdecc_c52[155:0]), | |
| 10719 | .din1 (cache_decc_out_0_c52[155:0]), | |
| 10720 | .sel0 (cache_fb_hit_c52), | |
| 10721 | .sel1 (cache_fb_hit_c52_n) | |
| 10722 | ); | |
| 10723 | ||
| 10724 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__stack_156c__width_156 mux_l2d_l2t_decc_c52_1 | |
| 10725 | ( | |
| 10726 | .dout (l2d_l2t_decc_c52_1[155:0]), | |
| 10727 | .din0 (l2b_l2d_fbdecc_c52[311:156]), | |
| 10728 | .din1 (cache_decc_out_1_c52[155:0]), | |
| 10729 | .sel0 (cache_fb_hit_c52), | |
| 10730 | .sel1 (cache_fb_hit_c52_n) | |
| 10731 | ); | |
| 10732 | ||
| 10733 | ||
| 10734 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__stack_156c__width_156 mux_l2d_l2t_decc_c52_2 | |
| 10735 | ( | |
| 10736 | .dout (l2d_l2t_decc_c52_2[155:0]), | |
| 10737 | .din0 (l2b_l2d_fbdecc_c52[467:312]), | |
| 10738 | .din1 (cache_decc_out_2_c52[155:0]), | |
| 10739 | .sel0 (cache_fb_hit_c52), | |
| 10740 | .sel1 (cache_fb_hit_c52_n) | |
| 10741 | ); | |
| 10742 | ||
| 10743 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__stack_156c__width_156 mux_l2d_l2t_decc_c52_3 | |
| 10744 | ( | |
| 10745 | .dout (l2d_l2t_decc_c52_3[155:0]), | |
| 10746 | .din0 (l2b_l2d_fbdecc_c52[623:468]), | |
| 10747 | .din1 (cache_decc_out_3_c52[155:0]), | |
| 10748 | .sel0 (cache_fb_hit_c52), | |
| 10749 | .sel1 (cache_fb_hit_c52_n) | |
| 10750 | ); | |
| 10751 | ||
| 10752 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__stack_156c__width_156 mux_l2d_l2t_decc_c52_20 | |
| 10753 | ( | |
| 10754 | .dout (l2d_l2t_decc_c52_20[155:0]), | |
| 10755 | .din0 (l2d_l2t_decc_c52_2[155:0]), | |
| 10756 | .din1 (l2d_l2t_decc_c52_0[155:0]), | |
| 10757 | .sel0 (cache_col_offset_c52[2]), | |
| 10758 | .sel1 (~cache_col_offset_c52[2]) | |
| 10759 | ); | |
| 10760 | ||
| 10761 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__stack_156c__width_156 mux_l2d_l2t_decc_c52_31 | |
| 10762 | ( | |
| 10763 | .dout (l2d_l2t_decc_c52_31[155:0]), | |
| 10764 | .din0 (l2d_l2t_decc_c52_3[155:0]), | |
| 10765 | .din1 (l2d_l2t_decc_c52_1[155:0]), | |
| 10766 | .sel0 (cache_col_offset_c52[3]), | |
| 10767 | .sel1 (~cache_col_offset_c52[3]) | |
| 10768 | ); | |
| 10769 | ||
| 10770 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__stack_156c__width_156 mux_l2d_l2t_decc_c52_topsel | |
| 10771 | ( | |
| 10772 | .dout (l2d_l2t_decc_c52_mux[155:0]), | |
| 10773 | .din0 (l2d_l2t_decc_c52_31[155:0]), | |
| 10774 | .din1 (l2d_l2t_decc_c52_20[155:0]), | |
| 10775 | .sel0 (cache_col_offset_c52_topsel), | |
| 10776 | .sel1 (~cache_col_offset_c52_topsel) | |
| 10777 | ); | |
| 10778 | ||
| 10779 | //msff_ctl_macro ff_l2d_l2t_decc_c6 (width=156) | |
| 10780 | // ( | |
| 10781 | // .scan_in(ff_l2d_l2t_decc_c6_scanin), | |
| 10782 | // .scan_out(ff_l2d_l2t_decc_c6_scanout), | |
| 10783 | // .dout (l2d_l2t_decc_c6[155:0]), | |
| 10784 | // .din (l2d_l2t_decc_c52_topsel[155:0]), | |
| 10785 | // .l1clk (l1clk_intnl), | |
| 10786 | // ); | |
| 10787 | ||
| 10788 | ||
| 10789 | ||
| 10790 | ||
| 10791 | ||
| 10792 | // tcu signals | |
| 10793 | ||
| 10794 | assign tcu_pce_ov_00 = tcu_pce_ov; | |
| 10795 | assign tcu_pce_ov_01 = tcu_pce_ov; | |
| 10796 | assign tcu_pce_ov_10 = tcu_pce_ov; | |
| 10797 | assign tcu_pce_ov_11 = tcu_pce_ov; | |
| 10798 | assign tcu_pce_ov_20 = tcu_pce_ov; | |
| 10799 | assign tcu_pce_ov_21 = tcu_pce_ov; | |
| 10800 | assign tcu_pce_ov_30 = tcu_pce_ov; | |
| 10801 | assign tcu_pce_ov_31 = tcu_pce_ov; | |
| 10802 | assign tcu_pce_00 = tcu_ce; | |
| 10803 | assign tcu_pce_01 = tcu_ce; | |
| 10804 | assign tcu_pce_10 = tcu_ce; | |
| 10805 | assign tcu_pce_11 = tcu_ce; | |
| 10806 | assign tcu_pce_20 = tcu_ce; | |
| 10807 | assign tcu_pce_21 = tcu_ce; | |
| 10808 | assign tcu_pce_30 = tcu_ce; | |
| 10809 | assign tcu_pce_31 = tcu_ce; | |
| 10810 | assign tcu_clk_stop_00 = tcu_clk_stop; | |
| 10811 | assign tcu_clk_stop_01 = tcu_clk_stop; | |
| 10812 | assign tcu_clk_stop_10 = tcu_clk_stop; | |
| 10813 | assign tcu_clk_stop_11 = tcu_clk_stop; | |
| 10814 | assign tcu_clk_stop_20 = tcu_clk_stop; | |
| 10815 | assign tcu_clk_stop_21 = tcu_clk_stop; | |
| 10816 | assign tcu_clk_stop_30 = tcu_clk_stop; | |
| 10817 | assign tcu_clk_stop_31 = tcu_clk_stop; | |
| 10818 | ||
| 10819 | ||
| 10820 | assign se_00 = tcu_scan_en; | |
| 10821 | assign se_01 = tcu_scan_en; | |
| 10822 | assign se_10 = tcu_scan_en; | |
| 10823 | assign se_11 = tcu_scan_en; | |
| 10824 | assign se_20 = tcu_scan_en; | |
| 10825 | assign se_21 = tcu_scan_en; | |
| 10826 | assign se_30 = tcu_scan_en; | |
| 10827 | assign se_31 = tcu_scan_en; | |
| 10828 | ||
| 10829 | // Redudancy | |
| 10830 | ||
| 10831 | wire [4:0] fuse_l2d_rid_100; | |
| 10832 | wire [4:0] fuse_l2d_rid_110; | |
| 10833 | wire [4:0] fuse_l2d_rid_101; | |
| 10834 | wire [4:0] fuse_l2d_rid_111; | |
| 10835 | wire [4:0] fuse_l2d_rid_120; | |
| 10836 | wire [4:0] fuse_l2d_rid_121; | |
| 10837 | wire [4:0] fuse_l2d_rid_130; | |
| 10838 | wire [4:0] fuse_l2d_rid_131; | |
| 10839 | wire [4:0] fuse_l2d_rid_000; | |
| 10840 | wire [4:0] fuse_l2d_rid_001; | |
| 10841 | wire [4:0] fuse_l2d_rid_010; | |
| 10842 | wire [4:0] fuse_l2d_rid_011; | |
| 10843 | wire [4:0] fuse_l2d_rid_020; | |
| 10844 | wire [4:0] fuse_l2d_rid_021; | |
| 10845 | wire [4:0] fuse_l2d_rid_030; | |
| 10846 | wire [4:0] fuse_l2d_rid_031; | |
| 10847 | ||
| 10848 | //assign fuse_l2d_rid_111[4:0] = {(l2b_l2d_fuse_rid_d[6:3] == 4'b0000),(l2b_l2d_fuse_rid_d[6:3] == 4'b0001),l2b_l2d_fuse_rid_d[2:0]}; | |
| 10849 | //assign fuse_l2d_rid_011[4:0] = {(l2b_l2d_fuse_rid_d[6:3] == 4'b0000),(l2b_l2d_fuse_rid_d[6:3] == 4'b0001),l2b_l2d_fuse_rid_d[2:0]}; | |
| 10850 | //assign fuse_l2d_rid_101[4:0] = {(l2b_l2d_fuse_rid_d[6:3] == 4'b0010),(l2b_l2d_fuse_rid_d[6:3] == 4'b0011),l2b_l2d_fuse_rid_d[2:0]}; | |
| 10851 | //assign fuse_l2d_rid_001[4:0] = {(l2b_l2d_fuse_rid_d[6:3] == 4'b0010),(l2b_l2d_fuse_rid_d[6:3] == 4'b0011),l2b_l2d_fuse_rid_d[2:0]}; | |
| 10852 | //assign fuse_l2d_rid_110[4:0] = {(l2b_l2d_fuse_rid_d[6:3] == 4'b0100),(l2b_l2d_fuse_rid_d[6:3] == 4'b0101),l2b_l2d_fuse_rid_d[2:0]}; | |
| 10853 | //assign fuse_l2d_rid_010[4:0] = {(l2b_l2d_fuse_rid_d[6:3] == 4'b0100),(l2b_l2d_fuse_rid_d[6:3] == 4'b0101),l2b_l2d_fuse_rid_d[2:0]}; | |
| 10854 | //assign fuse_l2d_rid_100[4:0] = {(l2b_l2d_fuse_rid_d[6:3] == 4'b0110),(l2b_l2d_fuse_rid_d[6:3] == 4'b0111),l2b_l2d_fuse_rid_d[2:0]}; | |
| 10855 | //assign fuse_l2d_rid_000[4:0] = {(l2b_l2d_fuse_rid_d[6:3] == 4'b0110),(l2b_l2d_fuse_rid_d[6:3] == 4'b0111),l2b_l2d_fuse_rid_d[2:0]}; | |
| 10856 | //assign fuse_l2d_rid_131[4:0] = {(l2b_l2d_fuse_rid_d[6:3] == 4'b1000),(l2b_l2d_fuse_rid_d[6:3] == 4'b1001),l2b_l2d_fuse_rid_d[2:0]}; | |
| 10857 | //assign fuse_l2d_rid_031[4:0] = {(l2b_l2d_fuse_rid_d[6:3] == 4'b1000),(l2b_l2d_fuse_rid_d[6:3] == 4'b1001),l2b_l2d_fuse_rid_d[2:0]}; | |
| 10858 | //assign fuse_l2d_rid_121[4:0] = {(l2b_l2d_fuse_rid_d[6:3] == 4'b1010),(l2b_l2d_fuse_rid_d[6:3] == 4'b1011),l2b_l2d_fuse_rid_d[2:0]}; | |
| 10859 | //assign fuse_l2d_rid_021[4:0] = {(l2b_l2d_fuse_rid_d[6:3] == 4'b1010),(l2b_l2d_fuse_rid_d[6:3] == 4'b1011),l2b_l2d_fuse_rid_d[2:0]}; | |
| 10860 | //assign fuse_l2d_rid_130[4:0] = {(l2b_l2d_fuse_rid_d[6:3] == 4'b1100),(l2b_l2d_fuse_rid_d[6:3] == 4'b1101),l2b_l2d_fuse_rid_d[2:0]}; | |
| 10861 | //assign fuse_l2d_rid_030[4:0] = {(l2b_l2d_fuse_rid_d[6:3] == 4'b1100),(l2b_l2d_fuse_rid_d[6:3] == 4'b1101),l2b_l2d_fuse_rid_d[2:0]}; | |
| 10862 | //assign fuse_l2d_rid_120[4:0] = {(l2b_l2d_fuse_rid_d[6:3] == 4'b1110),(l2b_l2d_fuse_rid_d[6:3] == 4'b1111),l2b_l2d_fuse_rid_d[2:0]}; | |
| 10863 | //assign fuse_l2d_rid_020[4:0] = {(l2b_l2d_fuse_rid_d[6:3] == 4'b1110),(l2b_l2d_fuse_rid_d[6:3] == 4'b1111),l2b_l2d_fuse_rid_d[2:0]}; | |
| 10864 | ||
| 10865 | ||
| 10866 | ||
| 10867 | n2_l2d_sp_512kb_cust_cmp_macro__width_4 cmp_l2b_l2d_fuse_rid_d_0 | |
| 10868 | ( | |
| 10869 | .dout (itis0000), | |
| 10870 | .din0 (4'b0000), | |
| 10871 | .din1 (l2b_l2d_fuse_rid_d[6:3]) | |
| 10872 | ); | |
| 10873 | ||
| 10874 | n2_l2d_sp_512kb_cust_cmp_macro__width_4 cmp_l2b_l2d_fuse_rid_d_1 | |
| 10875 | ( | |
| 10876 | .dout (itis0001), | |
| 10877 | .din0 (4'b0001), | |
| 10878 | .din1 (l2b_l2d_fuse_rid_d[6:3]) | |
| 10879 | ); | |
| 10880 | ||
| 10881 | n2_l2d_sp_512kb_cust_cmp_macro__width_4 cmp_l2b_l2d_fuse_rid_d_2 | |
| 10882 | ( | |
| 10883 | .dout (itis0010), | |
| 10884 | .din0 (4'b0010), | |
| 10885 | .din1 (l2b_l2d_fuse_rid_d[6:3]) | |
| 10886 | ); | |
| 10887 | ||
| 10888 | n2_l2d_sp_512kb_cust_cmp_macro__width_4 cmp_l2b_l2d_fuse_rid_d_3 | |
| 10889 | ( | |
| 10890 | .dout (itis0011), | |
| 10891 | .din0 (4'b0011), | |
| 10892 | .din1 (l2b_l2d_fuse_rid_d[6:3]) | |
| 10893 | ); | |
| 10894 | ||
| 10895 | n2_l2d_sp_512kb_cust_cmp_macro__width_4 cmp_l2b_l2d_fuse_rid_d_4 | |
| 10896 | ( | |
| 10897 | .dout (itis0100), | |
| 10898 | .din0 (4'b0100), | |
| 10899 | .din1 (l2b_l2d_fuse_rid_d[6:3]) | |
| 10900 | ); | |
| 10901 | ||
| 10902 | n2_l2d_sp_512kb_cust_cmp_macro__width_4 cmp_l2b_l2d_fuse_rid_d_5 | |
| 10903 | ( | |
| 10904 | .dout (itis0101), | |
| 10905 | .din0 (4'b0101), | |
| 10906 | .din1 (l2b_l2d_fuse_rid_d[6:3]) | |
| 10907 | ); | |
| 10908 | ||
| 10909 | n2_l2d_sp_512kb_cust_cmp_macro__width_4 cmp_l2b_l2d_fuse_rid_d_6 | |
| 10910 | ( | |
| 10911 | .dout (itis0110), | |
| 10912 | .din0 (4'b0110), | |
| 10913 | .din1 (l2b_l2d_fuse_rid_d[6:3]) | |
| 10914 | ); | |
| 10915 | n2_l2d_sp_512kb_cust_cmp_macro__width_4 cmp_l2b_l2d_fuse_rid_d_7 | |
| 10916 | ( | |
| 10917 | .dout (itis0111), | |
| 10918 | .din0 (4'b0111), | |
| 10919 | .din1 (l2b_l2d_fuse_rid_d[6:3]) | |
| 10920 | ); | |
| 10921 | ||
| 10922 | n2_l2d_sp_512kb_cust_cmp_macro__width_4 cmp_l2b_l2d_fuse_rid_d_8 | |
| 10923 | ( | |
| 10924 | .dout (itis1000), | |
| 10925 | .din0 (4'b1000), | |
| 10926 | .din1 (l2b_l2d_fuse_rid_d[6:3]) | |
| 10927 | ); | |
| 10928 | ||
| 10929 | n2_l2d_sp_512kb_cust_cmp_macro__width_4 cmp_l2b_l2d_fuse_rid_d_9 | |
| 10930 | ( | |
| 10931 | .dout (itis1001), | |
| 10932 | .din0 (4'b1001), | |
| 10933 | .din1 (l2b_l2d_fuse_rid_d[6:3]) | |
| 10934 | ); | |
| 10935 | ||
| 10936 | n2_l2d_sp_512kb_cust_cmp_macro__width_4 cmp_l2b_l2d_fuse_rid_d_02 | |
| 10937 | ( | |
| 10938 | .dout (itis1010), | |
| 10939 | .din0 (4'b1010), | |
| 10940 | .din1 (l2b_l2d_fuse_rid_d[6:3]) | |
| 10941 | ); | |
| 10942 | ||
| 10943 | n2_l2d_sp_512kb_cust_cmp_macro__width_4 cmp_l2b_l2d_fuse_rid_d_03 | |
| 10944 | ( | |
| 10945 | .dout (itis1011), | |
| 10946 | .din0 (4'b1011), | |
| 10947 | .din1 (l2b_l2d_fuse_rid_d[6:3]) | |
| 10948 | ); | |
| 10949 | ||
| 10950 | n2_l2d_sp_512kb_cust_cmp_macro__width_4 cmp_l2b_l2d_fuse_rid_d_04 | |
| 10951 | ( | |
| 10952 | .dout (itis1100), | |
| 10953 | .din0 (4'b1100), | |
| 10954 | .din1 (l2b_l2d_fuse_rid_d[6:3]) | |
| 10955 | ); | |
| 10956 | ||
| 10957 | n2_l2d_sp_512kb_cust_cmp_macro__width_4 cmp_l2b_l2d_fuse_rid_d_05 | |
| 10958 | ( | |
| 10959 | .dout (itis1101), | |
| 10960 | .din0 (4'b1101), | |
| 10961 | .din1 (l2b_l2d_fuse_rid_d[6:3]) | |
| 10962 | ); | |
| 10963 | ||
| 10964 | n2_l2d_sp_512kb_cust_cmp_macro__width_4 cmp_l2b_l2d_fuse_rid_d_06 | |
| 10965 | ( | |
| 10966 | .dout (itis1110), | |
| 10967 | .din0 (4'b1110), | |
| 10968 | .din1 (l2b_l2d_fuse_rid_d[6:3]) | |
| 10969 | ); | |
| 10970 | n2_l2d_sp_512kb_cust_cmp_macro__width_4 cmp_l2b_l2d_fuse_rid_d_07 | |
| 10971 | ( | |
| 10972 | .dout (itis1111), | |
| 10973 | .din0 (4'b1111), | |
| 10974 | .din1 (l2b_l2d_fuse_rid_d[6:3]) | |
| 10975 | ); | |
| 10976 | ||
| 10977 | ||
| 10978 | assign fuse_l2d_rid_111[4:0] = {itis0000,itis0001,l2b_l2d_fuse_rid_d[2:0]}; | |
| 10979 | assign fuse_l2d_rid_011[4:0] = {itis0000,itis0001,l2b_l2d_fuse_rid_d[2:0]}; | |
| 10980 | assign fuse_l2d_rid_101[4:0] = {itis0010,itis0011,l2b_l2d_fuse_rid_d[2:0]}; | |
| 10981 | assign fuse_l2d_rid_001[4:0] = {itis0010,itis0011,l2b_l2d_fuse_rid_d[2:0]}; | |
| 10982 | assign fuse_l2d_rid_110[4:0] = {itis0100,itis0101,l2b_l2d_fuse_rid_d[2:0]}; | |
| 10983 | assign fuse_l2d_rid_010[4:0] = {itis0100,itis0101,l2b_l2d_fuse_rid_d[2:0]}; | |
| 10984 | assign fuse_l2d_rid_100[4:0] = {itis0110,itis0111,l2b_l2d_fuse_rid_d[2:0]}; | |
| 10985 | assign fuse_l2d_rid_000[4:0] = {itis0110,itis0111,l2b_l2d_fuse_rid_d[2:0]}; | |
| 10986 | assign fuse_l2d_rid_131[4:0] = {itis1000,itis1001,l2b_l2d_fuse_rid_d[2:0]}; | |
| 10987 | assign fuse_l2d_rid_031[4:0] = {itis1000,itis1001,l2b_l2d_fuse_rid_d[2:0]}; | |
| 10988 | assign fuse_l2d_rid_121[4:0] = {itis1010,itis1011,l2b_l2d_fuse_rid_d[2:0]}; | |
| 10989 | assign fuse_l2d_rid_021[4:0] = {itis1010,itis1011,l2b_l2d_fuse_rid_d[2:0]}; | |
| 10990 | assign fuse_l2d_rid_130[4:0] = {itis1100,itis1101,l2b_l2d_fuse_rid_d[2:0]}; | |
| 10991 | assign fuse_l2d_rid_030[4:0] = {itis1100,itis1101,l2b_l2d_fuse_rid_d[2:0]}; | |
| 10992 | assign fuse_l2d_rid_120[4:0] = {itis1110,itis1111,l2b_l2d_fuse_rid_d[2:0]}; | |
| 10993 | assign fuse_l2d_rid_020[4:0] = {itis1110,itis1111,l2b_l2d_fuse_rid_d[2:0]}; | |
| 10994 | ||
| 10995 | ||
| 10996 | assign fuse_l2d_data_in_100[9:0] = l2b_l2d_fuse_l2d_data_in_d[9:0]; | |
| 10997 | assign fuse_l2d_data_in_110[9:0] = l2b_l2d_fuse_l2d_data_in_d[9:0]; | |
| 10998 | assign fuse_l2d_data_in_101[9:0] = l2b_l2d_fuse_l2d_data_in_d[9:0]; | |
| 10999 | assign fuse_l2d_data_in_111[9:0] = l2b_l2d_fuse_l2d_data_in_d[9:0]; | |
| 11000 | assign fuse_l2d_data_in_120[9:0] = l2b_l2d_fuse_l2d_data_in_d[9:0]; | |
| 11001 | assign fuse_l2d_data_in_121[9:0] = l2b_l2d_fuse_l2d_data_in_d[9:0]; | |
| 11002 | assign fuse_l2d_data_in_130[9:0] = l2b_l2d_fuse_l2d_data_in_d[9:0]; | |
| 11003 | assign fuse_l2d_data_in_131[9:0] = l2b_l2d_fuse_l2d_data_in_d[9:0]; | |
| 11004 | assign fuse_l2d_data_in_000[9:0] = l2b_l2d_fuse_l2d_data_in_d[9:0]; | |
| 11005 | assign fuse_l2d_data_in_001[9:0] = l2b_l2d_fuse_l2d_data_in_d[9:0]; | |
| 11006 | assign fuse_l2d_data_in_010[9:0] = l2b_l2d_fuse_l2d_data_in_d[9:0]; | |
| 11007 | assign fuse_l2d_data_in_011[9:0] = l2b_l2d_fuse_l2d_data_in_d[9:0]; | |
| 11008 | assign fuse_l2d_data_in_020[9:0] = l2b_l2d_fuse_l2d_data_in_d[9:0]; | |
| 11009 | assign fuse_l2d_data_in_021[9:0] = l2b_l2d_fuse_l2d_data_in_d[9:0]; | |
| 11010 | assign fuse_l2d_data_in_030[9:0] = l2b_l2d_fuse_l2d_data_in_d[9:0]; | |
| 11011 | assign fuse_l2d_data_in_031[9:0] = l2b_l2d_fuse_l2d_data_in_d[9:0]; | |
| 11012 | ||
| 11013 | assign fuse_l2d_wren_100 = l2b_l2d_fuse_l2d_wren_d; | |
| 11014 | assign fuse_l2d_wren_110 = l2b_l2d_fuse_l2d_wren_d; | |
| 11015 | assign fuse_l2d_wren_101 = l2b_l2d_fuse_l2d_wren_d; | |
| 11016 | assign fuse_l2d_wren_111 = l2b_l2d_fuse_l2d_wren_d; | |
| 11017 | assign fuse_l2d_wren_120 = l2b_l2d_fuse_l2d_wren_d; | |
| 11018 | assign fuse_l2d_wren_121 = l2b_l2d_fuse_l2d_wren_d; | |
| 11019 | assign fuse_l2d_wren_130 = l2b_l2d_fuse_l2d_wren_d; | |
| 11020 | assign fuse_l2d_wren_131 = l2b_l2d_fuse_l2d_wren_d; | |
| 11021 | assign fuse_l2d_wren_000 = l2b_l2d_fuse_l2d_wren_d; | |
| 11022 | assign fuse_l2d_wren_001 = l2b_l2d_fuse_l2d_wren_d; | |
| 11023 | assign fuse_l2d_wren_010 = l2b_l2d_fuse_l2d_wren_d; | |
| 11024 | assign fuse_l2d_wren_011 = l2b_l2d_fuse_l2d_wren_d; | |
| 11025 | assign fuse_l2d_wren_020 = l2b_l2d_fuse_l2d_wren_d; | |
| 11026 | assign fuse_l2d_wren_021 = l2b_l2d_fuse_l2d_wren_d; | |
| 11027 | assign fuse_l2d_wren_030 = l2b_l2d_fuse_l2d_wren_d; | |
| 11028 | assign fuse_l2d_wren_031 = l2b_l2d_fuse_l2d_wren_d; | |
| 11029 | ||
| 11030 | assign fuse_l2d_reset_000_l = l2b_l2d_fuse_reset_l; | |
| 11031 | assign fuse_l2d_reset_001_l = l2b_l2d_fuse_reset_l; | |
| 11032 | assign fuse_l2d_reset_010_l = l2b_l2d_fuse_reset_l; | |
| 11033 | assign fuse_l2d_reset_011_l = l2b_l2d_fuse_reset_l; | |
| 11034 | assign fuse_l2d_reset_020_l = l2b_l2d_fuse_reset_l; | |
| 11035 | assign fuse_l2d_reset_021_l = l2b_l2d_fuse_reset_l; | |
| 11036 | assign fuse_l2d_reset_030_l = l2b_l2d_fuse_reset_l; | |
| 11037 | assign fuse_l2d_reset_031_l = l2b_l2d_fuse_reset_l; | |
| 11038 | assign fuse_l2d_reset_100_l = l2b_l2d_fuse_reset_l; | |
| 11039 | assign fuse_l2d_reset_101_l = l2b_l2d_fuse_reset_l; | |
| 11040 | assign fuse_l2d_reset_110_l = l2b_l2d_fuse_reset_l; | |
| 11041 | assign fuse_l2d_reset_111_l = l2b_l2d_fuse_reset_l; | |
| 11042 | assign fuse_l2d_reset_120_l = l2b_l2d_fuse_reset_l; | |
| 11043 | assign fuse_l2d_reset_121_l = l2b_l2d_fuse_reset_l; | |
| 11044 | assign fuse_l2d_reset_130_l = l2b_l2d_fuse_reset_l; | |
| 11045 | assign fuse_l2d_reset_131_l = l2b_l2d_fuse_reset_l; | |
| 11046 | ||
| 11047 | ||
| 11048 | //assign stage1_mux_sel0 = |(fuse_l2d_rid_131[4:3]); | |
| 11049 | //assign stage1_mux_sel1 = |(fuse_l2d_rid_121[4:3]); | |
| 11050 | //assign stage1_mux_sel2 = ~(stage1_mux_sel0 | stage1_mux_sel1); | |
| 11051 | ||
| 11052 | n2_l2d_sp_512kb_cust_inv_macro__width_1 inv_l2b_l2d_fuse_rid_d_0n | |
| 11053 | ( | |
| 11054 | .dout (l2b_l2d_fuse_rid_d_0n), | |
| 11055 | .din (l2b_l2d_fuse_rid_d[0]) | |
| 11056 | ); | |
| 11057 | ||
| 11058 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_rid_131 | |
| 11059 | ( | |
| 11060 | .dout (or_fuse_l2d_rid_131), | |
| 11061 | .din0 (fuse_l2d_rid_131[4]), | |
| 11062 | .din1 (fuse_l2d_rid_131[3]) | |
| 11063 | ); | |
| 11064 | ||
| 11065 | n2_l2d_sp_512kb_cust_and_macro__width_1 and_rid_131 | |
| 11066 | ( | |
| 11067 | .dout (stage1_mux_sel0), | |
| 11068 | .din0 (or_fuse_l2d_rid_131), | |
| 11069 | .din1 (l2b_l2d_fuse_rid_d[0]) | |
| 11070 | ); | |
| 11071 | ||
| 11072 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_rid_121 | |
| 11073 | ( | |
| 11074 | .dout (or_fuse_l2d_rid_121), | |
| 11075 | .din0 (fuse_l2d_rid_121[4]), | |
| 11076 | .din1 (fuse_l2d_rid_121[3]) | |
| 11077 | ); | |
| 11078 | ||
| 11079 | n2_l2d_sp_512kb_cust_and_macro__width_1 and_rid_121 | |
| 11080 | ( | |
| 11081 | .dout (stage1_mux_sel1), | |
| 11082 | .din0 (or_fuse_l2d_rid_121), | |
| 11083 | .din1 (l2b_l2d_fuse_rid_d[0]) | |
| 11084 | ); | |
| 11085 | ||
| 11086 | n2_l2d_sp_512kb_cust_nor_macro__width_1 or_stage1_mux_sel2 | |
| 11087 | ( | |
| 11088 | .dout (stage1_mux_sel2), | |
| 11089 | .din0 (stage1_mux_sel0), | |
| 11090 | .din1 (stage1_mux_sel1) | |
| 11091 | ); | |
| 11092 | ||
| 11093 | ||
| 11094 | ||
| 11095 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_3__width_10 mux_fdout_stage1 | |
| 11096 | ( | |
| 11097 | .dout (fdout_stage1[9:0]), | |
| 11098 | .din0 (fdout_131[9:0]), | |
| 11099 | .din1 (fdout_121[9:0]), | |
| 11100 | .din2 (10'b0), | |
| 11101 | .sel0 (stage1_mux_sel0), | |
| 11102 | .sel1 (stage1_mux_sel1), | |
| 11103 | .sel2 (stage1_mux_sel2) | |
| 11104 | ); | |
| 11105 | ||
| 11106 | //assign stage2_mux_sel0 = |(fuse_l2d_rid_031[4:3]); | |
| 11107 | //assign stage2_mux_sel1 = |(fuse_l2d_rid_021[4:3]); | |
| 11108 | //assign stage2_mux_sel2 = ~(stage2_mux_sel0 | stage2_mux_sel1); | |
| 11109 | ||
| 11110 | ||
| 11111 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_rid_031 | |
| 11112 | ( | |
| 11113 | .dout (or_fuse_l2d_rid_031), | |
| 11114 | .din0 (fuse_l2d_rid_031[4]), | |
| 11115 | .din1 (fuse_l2d_rid_031[3]) | |
| 11116 | ); | |
| 11117 | ||
| 11118 | n2_l2d_sp_512kb_cust_and_macro__width_1 and_rid_031 | |
| 11119 | ( | |
| 11120 | .dout (stage2_mux_sel0), | |
| 11121 | .din0 (or_fuse_l2d_rid_031), | |
| 11122 | .din1 (l2b_l2d_fuse_rid_d_0n) | |
| 11123 | ); | |
| 11124 | ||
| 11125 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_rid_021 | |
| 11126 | ( | |
| 11127 | .dout (or_fuse_l2d_rid_021), | |
| 11128 | .din0 (fuse_l2d_rid_021[4]), | |
| 11129 | .din1 (fuse_l2d_rid_021[3]) | |
| 11130 | ); | |
| 11131 | ||
| 11132 | n2_l2d_sp_512kb_cust_and_macro__width_1 and_rid_021 | |
| 11133 | ( | |
| 11134 | .dout (stage2_mux_sel1), | |
| 11135 | .din0 (or_fuse_l2d_rid_021), | |
| 11136 | .din1 (l2b_l2d_fuse_rid_d_0n) | |
| 11137 | ); | |
| 11138 | ||
| 11139 | ||
| 11140 | n2_l2d_sp_512kb_cust_nor_macro__width_1 or_stage2_mux_sel2 | |
| 11141 | ( | |
| 11142 | .dout (stage2_mux_sel2), | |
| 11143 | .din0 (stage2_mux_sel0), | |
| 11144 | .din1 (stage2_mux_sel1) | |
| 11145 | ); | |
| 11146 | ||
| 11147 | ||
| 11148 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_3__width_10 mux_fdout_stage2 | |
| 11149 | ( | |
| 11150 | .dout (fdout_stage2[9:0]), | |
| 11151 | .din0 (fdout_031[9:0]), | |
| 11152 | .din1 (fdout_021[9:0]), | |
| 11153 | .din2 (fdout_stage1[9:0]), | |
| 11154 | .sel0 (stage2_mux_sel0), | |
| 11155 | .sel1 (stage2_mux_sel1), | |
| 11156 | .sel2 (stage2_mux_sel2) | |
| 11157 | ); | |
| 11158 | ||
| 11159 | //assign stage3_mux_sel0 = |(fuse_l2d_rid_130[4:3]); | |
| 11160 | //assign stage3_mux_sel1 = |(fuse_l2d_rid_120[4:3]); | |
| 11161 | //assign stage3_mux_sel2 = ~(stage3_mux_sel0 | stage3_mux_sel1); | |
| 11162 | ||
| 11163 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_rid_130 | |
| 11164 | ( | |
| 11165 | .dout (or_fuse_l2d_rid_130), | |
| 11166 | .din0 (fuse_l2d_rid_130[4]), | |
| 11167 | .din1 (fuse_l2d_rid_130[3]) | |
| 11168 | ); | |
| 11169 | ||
| 11170 | n2_l2d_sp_512kb_cust_and_macro__width_1 and_rid_130 | |
| 11171 | ( | |
| 11172 | .dout (stage3_mux_sel0), | |
| 11173 | .din0 (or_fuse_l2d_rid_130), | |
| 11174 | .din1 (l2b_l2d_fuse_rid_d[0]) | |
| 11175 | ); | |
| 11176 | ||
| 11177 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_rid_120 | |
| 11178 | ( | |
| 11179 | .dout (or_fuse_l2d_rid_120), | |
| 11180 | .din0 (fuse_l2d_rid_120[4]), | |
| 11181 | .din1 (fuse_l2d_rid_120[3]) | |
| 11182 | ); | |
| 11183 | ||
| 11184 | n2_l2d_sp_512kb_cust_and_macro__width_1 and_rid_120 | |
| 11185 | ( | |
| 11186 | .dout (stage3_mux_sel1), | |
| 11187 | .din0 (or_fuse_l2d_rid_120), | |
| 11188 | .din1 (l2b_l2d_fuse_rid_d[0]) | |
| 11189 | ); | |
| 11190 | ||
| 11191 | n2_l2d_sp_512kb_cust_nor_macro__width_1 or_stage3_mux_sel2 | |
| 11192 | ( | |
| 11193 | .dout (stage3_mux_sel2), | |
| 11194 | .din0 (stage3_mux_sel0), | |
| 11195 | .din1 (stage3_mux_sel1) | |
| 11196 | ); | |
| 11197 | ||
| 11198 | ||
| 11199 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_3__width_10 mux_fdout_stage3 | |
| 11200 | ( | |
| 11201 | .dout (fdout_stage3[9:0]), | |
| 11202 | .din0 (fdout_130[9:0]), | |
| 11203 | .din1 (fdout_120[9:0]), | |
| 11204 | .din2 (fdout_stage2[9:0]), | |
| 11205 | .sel0 (stage3_mux_sel0), | |
| 11206 | .sel1 (stage3_mux_sel1), | |
| 11207 | .sel2 (stage3_mux_sel2) | |
| 11208 | ); | |
| 11209 | ||
| 11210 | //assign stage4_mux_sel0 = |(fuse_l2d_rid_030[4:3]); | |
| 11211 | //assign stage4_mux_sel1 = |(fuse_l2d_rid_020[4:3]); | |
| 11212 | //assign stage4_mux_sel2 = ~(stage4_mux_sel0 | stage4_mux_sel1); | |
| 11213 | ||
| 11214 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_rid_030 | |
| 11215 | ( | |
| 11216 | .dout (or_fuse_l2d_rid_030), | |
| 11217 | .din0 (fuse_l2d_rid_030[4]), | |
| 11218 | .din1 (fuse_l2d_rid_030[3]) | |
| 11219 | ); | |
| 11220 | ||
| 11221 | n2_l2d_sp_512kb_cust_and_macro__width_1 and_rid_030 | |
| 11222 | ( | |
| 11223 | .dout (stage4_mux_sel0), | |
| 11224 | .din0 (or_fuse_l2d_rid_030), | |
| 11225 | .din1 (l2b_l2d_fuse_rid_d_0n) | |
| 11226 | ); | |
| 11227 | ||
| 11228 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_rid_020 | |
| 11229 | ( | |
| 11230 | .dout (or_fuse_l2d_rid_020), | |
| 11231 | .din0 (fuse_l2d_rid_020[4]), | |
| 11232 | .din1 (fuse_l2d_rid_020[3]) | |
| 11233 | ); | |
| 11234 | ||
| 11235 | n2_l2d_sp_512kb_cust_and_macro__width_1 and_rid_020 | |
| 11236 | ( | |
| 11237 | .dout (stage4_mux_sel1), | |
| 11238 | .din0 (or_fuse_l2d_rid_020), | |
| 11239 | .din1 (l2b_l2d_fuse_rid_d_0n) | |
| 11240 | ); | |
| 11241 | ||
| 11242 | n2_l2d_sp_512kb_cust_nor_macro__width_1 or_stage4_mux_sel2 | |
| 11243 | ( | |
| 11244 | .dout (stage4_mux_sel2), | |
| 11245 | .din0 (stage4_mux_sel0), | |
| 11246 | .din1 (stage4_mux_sel1) | |
| 11247 | ); | |
| 11248 | ||
| 11249 | ||
| 11250 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_3__width_10 mux_fdout_stage4 | |
| 11251 | ( | |
| 11252 | .dout (fdout_stage4[9:0]), | |
| 11253 | .din0 (fdout_030[9:0]), | |
| 11254 | .din1 (fdout_020[9:0]), | |
| 11255 | .din2 (fdout_stage3[9:0]), | |
| 11256 | .sel0 (stage4_mux_sel0), | |
| 11257 | .sel1 (stage4_mux_sel1), | |
| 11258 | .sel2 (stage4_mux_sel2) | |
| 11259 | ); | |
| 11260 | ||
| 11261 | // Right to left | |
| 11262 | ||
| 11263 | //assign stage10_mux_sel0 = |(fuse_l2d_rid_010[4:3]); | |
| 11264 | //assign stage10_mux_sel1 = |(fuse_l2d_rid_000[4:3]); | |
| 11265 | //assign stage10_mux_sel2 = ~(stage10_mux_sel0 | stage10_mux_sel1); | |
| 11266 | ||
| 11267 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_rid_010 | |
| 11268 | ( | |
| 11269 | .dout (or_fuse_l2d_rid_010), | |
| 11270 | .din0 (fuse_l2d_rid_010[4]), | |
| 11271 | .din1 (fuse_l2d_rid_010[3]) | |
| 11272 | ); | |
| 11273 | ||
| 11274 | n2_l2d_sp_512kb_cust_and_macro__width_1 and_rid_010 | |
| 11275 | ( | |
| 11276 | .dout (stage10_mux_sel0), | |
| 11277 | .din0 (or_fuse_l2d_rid_010), | |
| 11278 | .din1 (l2b_l2d_fuse_rid_d_0n) | |
| 11279 | ); | |
| 11280 | ||
| 11281 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_rid_000 | |
| 11282 | ( | |
| 11283 | .dout (or_fuse_l2d_rid_000), | |
| 11284 | .din0 (fuse_l2d_rid_000[4]), | |
| 11285 | .din1 (fuse_l2d_rid_000[3]) | |
| 11286 | ); | |
| 11287 | ||
| 11288 | n2_l2d_sp_512kb_cust_and_macro__width_1 and_rid_000 | |
| 11289 | ( | |
| 11290 | .dout (stage10_mux_sel1), | |
| 11291 | .din0 (or_fuse_l2d_rid_000), | |
| 11292 | .din1 (l2b_l2d_fuse_rid_d_0n) | |
| 11293 | ); | |
| 11294 | ||
| 11295 | n2_l2d_sp_512kb_cust_nor_macro__width_1 or_stage10_mux_sel2 | |
| 11296 | ( | |
| 11297 | .dout (stage10_mux_sel2), | |
| 11298 | .din0 (stage10_mux_sel0), | |
| 11299 | .din1 (stage10_mux_sel1) | |
| 11300 | ); | |
| 11301 | ||
| 11302 | ||
| 11303 | ||
| 11304 | ||
| 11305 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_3__width_10 mux_fdout_stage10 | |
| 11306 | ( | |
| 11307 | .dout (fdout_stage10[9:0]), | |
| 11308 | .din0 (fdout_010[9:0]), | |
| 11309 | .din1 (fdout_000[9:0]), | |
| 11310 | .din2 (10'b0), | |
| 11311 | .sel0 (stage10_mux_sel0), | |
| 11312 | .sel1 (stage10_mux_sel1), | |
| 11313 | .sel2 (stage10_mux_sel2) | |
| 11314 | ); | |
| 11315 | ||
| 11316 | //assign stage20_mux_sel0 = |(fuse_l2d_rid_110[4:3]); | |
| 11317 | //assign stage20_mux_sel1 = |(fuse_l2d_rid_100[4:3]); | |
| 11318 | //assign stage20_mux_sel2 = ~(stage20_mux_sel0 | stage20_mux_sel1); | |
| 11319 | ||
| 11320 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_rid_110 | |
| 11321 | ( | |
| 11322 | .dout (or_fuse_l2d_rid_110), | |
| 11323 | .din0 (fuse_l2d_rid_110[4]), | |
| 11324 | .din1 (fuse_l2d_rid_110[3]) | |
| 11325 | ); | |
| 11326 | ||
| 11327 | n2_l2d_sp_512kb_cust_and_macro__width_1 and_rid_110 | |
| 11328 | ( | |
| 11329 | .dout (stage20_mux_sel0), | |
| 11330 | .din0 (or_fuse_l2d_rid_110), | |
| 11331 | .din1 (l2b_l2d_fuse_rid_d[0]) | |
| 11332 | ); | |
| 11333 | ||
| 11334 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_rid_100 | |
| 11335 | ( | |
| 11336 | .dout (or_fuse_l2d_rid_100), | |
| 11337 | .din0 (fuse_l2d_rid_100[4]), | |
| 11338 | .din1 (fuse_l2d_rid_100[3]) | |
| 11339 | ); | |
| 11340 | ||
| 11341 | n2_l2d_sp_512kb_cust_and_macro__width_1 and_rid_100 | |
| 11342 | ( | |
| 11343 | .dout (stage20_mux_sel1), | |
| 11344 | .din0 (or_fuse_l2d_rid_100), | |
| 11345 | .din1 (l2b_l2d_fuse_rid_d[0]) | |
| 11346 | ); | |
| 11347 | ||
| 11348 | n2_l2d_sp_512kb_cust_nor_macro__width_1 or_stage20_mux_sel2 | |
| 11349 | ( | |
| 11350 | .dout (stage20_mux_sel2), | |
| 11351 | .din0 (stage20_mux_sel0), | |
| 11352 | .din1 (stage20_mux_sel1) | |
| 11353 | ); | |
| 11354 | ||
| 11355 | ||
| 11356 | ||
| 11357 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_3__width_10 mux_fdout_stage20 | |
| 11358 | ( | |
| 11359 | .dout (fdout_stage20[9:0]), | |
| 11360 | .din0 (fdout_110[9:0]), | |
| 11361 | .din1 (fdout_100[9:0]), | |
| 11362 | .din2 (fdout_stage10[9:0]), | |
| 11363 | .sel0 (stage20_mux_sel0), | |
| 11364 | .sel1 (stage20_mux_sel1), | |
| 11365 | .sel2 (stage20_mux_sel2) | |
| 11366 | ); | |
| 11367 | ||
| 11368 | //assign stage30_mux_sel0 = |(fuse_l2d_rid_011[4:3]); | |
| 11369 | //assign stage30_mux_sel1 = |(fuse_l2d_rid_001[4:3]); | |
| 11370 | //assign stage30_mux_sel2 = ~(stage30_mux_sel0 | stage30_mux_sel1); | |
| 11371 | ||
| 11372 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_rid_011 | |
| 11373 | ( | |
| 11374 | .dout (or_fuse_l2d_rid_011), | |
| 11375 | .din0 (fuse_l2d_rid_011[4]), | |
| 11376 | .din1 (fuse_l2d_rid_011[3]) | |
| 11377 | ); | |
| 11378 | ||
| 11379 | n2_l2d_sp_512kb_cust_and_macro__width_1 and_rid_011 | |
| 11380 | ( | |
| 11381 | .dout (stage30_mux_sel0), | |
| 11382 | .din0 (or_fuse_l2d_rid_011), | |
| 11383 | .din1 (l2b_l2d_fuse_rid_d_0n) | |
| 11384 | ); | |
| 11385 | ||
| 11386 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_rid_001 | |
| 11387 | ( | |
| 11388 | .dout (or_fuse_l2d_rid_001), | |
| 11389 | .din0 (fuse_l2d_rid_001[4]), | |
| 11390 | .din1 (fuse_l2d_rid_001[3]) | |
| 11391 | ); | |
| 11392 | ||
| 11393 | n2_l2d_sp_512kb_cust_and_macro__width_1 and_rid_001 | |
| 11394 | ( | |
| 11395 | .dout (stage30_mux_sel1), | |
| 11396 | .din0 (or_fuse_l2d_rid_001), | |
| 11397 | .din1 (l2b_l2d_fuse_rid_d_0n) | |
| 11398 | ); | |
| 11399 | ||
| 11400 | n2_l2d_sp_512kb_cust_nor_macro__width_1 or_1stage20_mux_sel2 | |
| 11401 | ( | |
| 11402 | .dout (stage30_mux_sel2), | |
| 11403 | .din0 (stage30_mux_sel0), | |
| 11404 | .din1 (stage30_mux_sel1) | |
| 11405 | ); | |
| 11406 | ||
| 11407 | ||
| 11408 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_3__width_10 mux_fdout_stage30 | |
| 11409 | ( | |
| 11410 | .dout (fdout_stage30[9:0]), | |
| 11411 | .din0 (fdout_011[9:0]), | |
| 11412 | .din1 (fdout_001[9:0]), | |
| 11413 | .din2 (fdout_stage20[9:0]), | |
| 11414 | .sel0 (stage30_mux_sel0), | |
| 11415 | .sel1 (stage30_mux_sel1), | |
| 11416 | .sel2 (stage30_mux_sel2) | |
| 11417 | ); | |
| 11418 | ||
| 11419 | //assign stage40_mux_sel0 = |(fuse_l2d_rid_111[4:3]); | |
| 11420 | //assign stage40_mux_sel1 = |(fuse_l2d_rid_101[4:3]); | |
| 11421 | //assign stage40_mux_sel2 = ~(stage40_mux_sel0 | stage40_mux_sel1); | |
| 11422 | ||
| 11423 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_rid_111 | |
| 11424 | ( | |
| 11425 | .dout (or_fuse_l2d_rid_111), | |
| 11426 | .din0 (fuse_l2d_rid_111[4]), | |
| 11427 | .din1 (fuse_l2d_rid_111[3]) | |
| 11428 | ); | |
| 11429 | ||
| 11430 | n2_l2d_sp_512kb_cust_and_macro__width_1 and_rid_111 | |
| 11431 | ( | |
| 11432 | .dout (stage40_mux_sel0), | |
| 11433 | .din0 (or_fuse_l2d_rid_111), | |
| 11434 | .din1 (l2b_l2d_fuse_rid_d[0]) | |
| 11435 | ); | |
| 11436 | ||
| 11437 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_rid_101 | |
| 11438 | ( | |
| 11439 | .dout (or_fuse_l2d_rid_101), | |
| 11440 | .din0 (fuse_l2d_rid_101[4]), | |
| 11441 | .din1 (fuse_l2d_rid_101[3]) | |
| 11442 | ); | |
| 11443 | ||
| 11444 | n2_l2d_sp_512kb_cust_and_macro__width_1 and_rid_101 | |
| 11445 | ( | |
| 11446 | .dout (stage40_mux_sel1), | |
| 11447 | .din0 (or_fuse_l2d_rid_101), | |
| 11448 | .din1 (l2b_l2d_fuse_rid_d[0]) | |
| 11449 | ); | |
| 11450 | ||
| 11451 | n2_l2d_sp_512kb_cust_nor_macro__width_1 or_1stage40_mux_sel2 | |
| 11452 | ( | |
| 11453 | .dout (stage40_mux_sel2), | |
| 11454 | .din0 (stage40_mux_sel0), | |
| 11455 | .din1 (stage40_mux_sel1) | |
| 11456 | ); | |
| 11457 | ||
| 11458 | ||
| 11459 | ||
| 11460 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_3__width_10 mux_fdout_stage40 | |
| 11461 | ( | |
| 11462 | .dout (fdout_stage40[9:0]), | |
| 11463 | .din0 (fdout_111[9:0]), | |
| 11464 | .din1 (fdout_101[9:0]), | |
| 11465 | .din2 (fdout_stage30[9:0]), | |
| 11466 | .sel0 (stage40_mux_sel0), | |
| 11467 | .sel1 (stage40_mux_sel1), | |
| 11468 | .sel2 (stage40_mux_sel2) | |
| 11469 | ); | |
| 11470 | ||
| 11471 | n2_l2d_sp_512kb_cust_inv_macro__width_1 inv_l2b_l2d_fuse_rid_d_6n | |
| 11472 | ( | |
| 11473 | .dout (l2b_l2d_fuse_rid_d_6n), | |
| 11474 | .din (l2b_l2d_fuse_rid_d[6]) | |
| 11475 | ); | |
| 11476 | ||
| 11477 | n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__width_10 mux_fdout_fnl | |
| 11478 | ( | |
| 11479 | .dout (efc_fuse_data[9:0]), | |
| 11480 | .din0 (fdout_stage40[9:0]), | |
| 11481 | .din1 (fdout_stage4[9:0]), | |
| 11482 | .sel0 (l2b_l2d_fuse_rid_d_6n), | |
| 11483 | .sel1 (l2b_l2d_fuse_rid_d[6]) | |
| 11484 | ); | |
| 11485 | ||
| 11486 | ||
| 11487 | assign delout00 = delout20_rgt; | |
| 11488 | assign delout01 = delout20_rgt; | |
| 11489 | assign delout10 = delout31_rgt; | |
| 11490 | assign delout11 = delout31_rgt; | |
| 11491 | assign delout20 = delout20_lft; | |
| 11492 | assign delout21 = delout20_lft; | |
| 11493 | assign delout30 = delout31_lft; | |
| 11494 | assign delout31 = delout31_lft; | |
| 11495 | ||
| 11496 | n2_l2d_tstmod_cust tstmod | |
| 11497 | ( | |
| 11498 | .rd_wr_c3 (l2t_l2d_rd_wr_c3), | |
| 11499 | .wayerr_c3 (wayerr_c3 ), | |
| 11500 | .wr_inhibit (tcu_array_wr_inhibit ), | |
| 11501 | .coloff_c3 (cache_col_offset_c3[3:0]), | |
| 11502 | .l2clk (l2clk), | |
| 11503 | .scanen (tcu_scan_en), | |
| 11504 | .si (so_q23 ), | |
| 11505 | .siclk (tcu_aclk), | |
| 11506 | .soclk (tcu_bclk), | |
| 11507 | .so (so_tstmod ), | |
| 11508 | .delout20_rgt (delout20_rgt ), | |
| 11509 | .delout31_lft (delout31_lft ), | |
| 11510 | .delout31_rgt (delout31_rgt ), | |
| 11511 | .delout20_lft (delout20_lft) | |
| 11512 | ) ; | |
| 11513 | ||
| 11514 | // scanorder start | |
| 11515 | // ff_cache_cache_rd_wr_c4_scanin | |
| 11516 | // ff_cache_set_c3_scanin[8] | |
| 11517 | // ff_cache_set_c3_scanin[7] | |
| 11518 | // ff_cache_set_c3_scanin[6] | |
| 11519 | // ff_cache_set_c3_scanin[5] | |
| 11520 | // ff_cache_set_c3_scanin[4] | |
| 11521 | // ff_cache_set_c3_scanin[3] | |
| 11522 | // ff_cache_set_c3_scanin[2] | |
| 11523 | // ff_cache_set_c3_scanin[1] | |
| 11524 | // ff_cache_set_c3_scanin[0] | |
| 11525 | // ff_cache_word_en_c3_scanin[1] | |
| 11526 | // ff_cache_word_en_c3_scanin[3] | |
| 11527 | // ff_cache_word_en_c3_scanin[5] | |
| 11528 | // ff_cache_word_en_c3_scanin[7] | |
| 11529 | // ff_cache_word_en_c3_scanin[9] | |
| 11530 | // ff_cache_word_en_c3_scanin[11] | |
| 11531 | // ff_cache_word_en_c3_scanin[13] | |
| 11532 | // ff_cache_word_en_c3_scanin[15] | |
| 11533 | // ff_cache_col_offset_c3_scanin[0] | |
| 11534 | // ff_cache_col_offset_c4_scanin[0] | |
| 11535 | // ff_cache_col_offset_c5_muxsel_scanin[0] | |
| 11536 | // ff_cache_col_offset_c5_muxsel_scanin[1] | |
| 11537 | // ff_cache_col_offset_c4_scanin[1] | |
| 11538 | // ff_cache_col_offset_c3_scanin[1] | |
| 11539 | // ff_cache_col_offset_c3_scanin[2] | |
| 11540 | // ff_cache_col_offset_c4_scanin[2] | |
| 11541 | // ff_cache_col_offset_c5_muxsel_scanin[2] | |
| 11542 | // ff_cache_col_offset_c5_muxsel_scanin[3] | |
| 11543 | // ff_cache_col_offset_c4_scanin[3] | |
| 11544 | // ff_cache_col_offset_c3_scanin[3] | |
| 11545 | // ff_cache_col_offset_all_c4_scanin | |
| 11546 | // ff_cache_col_offset_all_c5_scanin | |
| 11547 | // ff_cache_col_offset_all_c6_scanin | |
| 11548 | // ff_cache_col_offset_all_c7_scanin | |
| 11549 | // ff_cache_word_en_c3_scanin[0] | |
| 11550 | // ff_cache_word_en_c3_scanin[2] | |
| 11551 | // ff_cache_word_en_c3_scanin[4] | |
| 11552 | // ff_cache_word_en_c3_scanin[6] | |
| 11553 | // ff_cache_word_en_c3_scanin[8] | |
| 11554 | // ff_cache_word_en_c3_scanin[10] | |
| 11555 | // ff_cache_word_en_c3_scanin[12] | |
| 11556 | // ff_cache_word_en_c3_scanin[14] | |
| 11557 | // ff_cache_col_offset_c52_scanin[1] | |
| 11558 | // ff_cache_col_offset_c52_scanin[0] | |
| 11559 | ||
| 11560 | // ff_cache_col_offset_c52_topsel_scanin | |
| 11561 | // ff_cache_fb_hit_c4_scanin | |
| 11562 | // ff_cache_fb_hit_c5_scanin | |
| 11563 | // ff_cache_fb_hit_c52_scanin | |
| 11564 | // ff_cache_sel_fbdecc_c4_scanin | |
| 11565 | // ff_cache_sel_fbdecc_c5_scanin | |
| 11566 | ||
| 11567 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[0] | |
| 11568 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[0] | |
| 11569 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[0] | |
| 11570 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[0] | |
| 11571 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[1] | |
| 11572 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[1] | |
| 11573 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[1] | |
| 11574 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[1] | |
| 11575 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[2] | |
| 11576 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[2] | |
| 11577 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[2] | |
| 11578 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[2] | |
| 11579 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[3] | |
| 11580 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[3] | |
| 11581 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[3] | |
| 11582 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[3] | |
| 11583 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[4] | |
| 11584 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[4] | |
| 11585 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[4] | |
| 11586 | ||
| 11587 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[9] | |
| 11588 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[9] | |
| 11589 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[9] | |
| 11590 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[8] | |
| 11591 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[8] | |
| 11592 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[8] | |
| 11593 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[8] | |
| 11594 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[7] | |
| 11595 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[7] | |
| 11596 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[7] | |
| 11597 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[7] | |
| 11598 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[6] | |
| 11599 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[6] | |
| 11600 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[6] | |
| 11601 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[6] | |
| 11602 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[5] | |
| 11603 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[5] | |
| 11604 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[5] | |
| 11605 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[5] | |
| 11606 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[4] | |
| 11607 | ||
| 11608 | // ff_l2t_l2d_stdecc_c3_scanin[77:39] | |
| 11609 | // ff_cache_col_offset_c5_023_scanin[0] | |
| 11610 | // ff_cache_col_offset_c5_023_scanin[2] | |
| 11611 | // ff_cache_col_offset_c4_023_scanin[0] | |
| 11612 | // ff_cache_col_offset_c4_023_scanin[2] | |
| 11613 | // ff_cache_col_offset_c4_tog_023_scanin[0] | |
| 11614 | // ff_cache_cache_rd_wr_c5_20_scanin | |
| 11615 | // ff_cache_col_offset_c5_023_scanin[1] | |
| 11616 | // ff_cache_col_offset_c5_023_scanin[3] | |
| 11617 | // ff_cache_col_offset_c4_023_scanin[1] | |
| 11618 | // ff_cache_col_offset_c4_023_scanin[3] | |
| 11619 | // ff_cache_col_offset_c4_tog_023_scanin[1] | |
| 11620 | ||
| 11621 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[19] | |
| 11622 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[19] | |
| 11623 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[18] | |
| 11624 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[18] | |
| 11625 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[18] | |
| 11626 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[18] | |
| 11627 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[17] | |
| 11628 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[17] | |
| 11629 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[17] | |
| 11630 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[17] | |
| 11631 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[16] | |
| 11632 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[16] | |
| 11633 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[16] | |
| 11634 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[16] | |
| 11635 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[15] | |
| 11636 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[15] | |
| 11637 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[15] | |
| 11638 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[15] | |
| 11639 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[14] | |
| 11640 | ||
| 11641 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[9] | |
| 11642 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[10] | |
| 11643 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[10] | |
| 11644 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[10] | |
| 11645 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[10] | |
| 11646 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[11] | |
| 11647 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[11] | |
| 11648 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[11] | |
| 11649 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[11] | |
| 11650 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[12] | |
| 11651 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[12] | |
| 11652 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[12] | |
| 11653 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[12] | |
| 11654 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[13] | |
| 11655 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[13] | |
| 11656 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[13] | |
| 11657 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[13] | |
| 11658 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[14] | |
| 11659 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[14] | |
| 11660 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[14] | |
| 11661 | ||
| 11662 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[19] | |
| 11663 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[19] | |
| 11664 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[18] | |
| 11665 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[18] | |
| 11666 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[18] | |
| 11667 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[18] | |
| 11668 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[17] | |
| 11669 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[17] | |
| 11670 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[17] | |
| 11671 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[17] | |
| 11672 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[16] | |
| 11673 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[16] | |
| 11674 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[16] | |
| 11675 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[16] | |
| 11676 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[15] | |
| 11677 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[15] | |
| 11678 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[15] | |
| 11679 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[15] | |
| 11680 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[14] | |
| 11681 | ||
| 11682 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[9] | |
| 11683 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[10] | |
| 11684 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[10] | |
| 11685 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[10] | |
| 11686 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[10] | |
| 11687 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[11] | |
| 11688 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[11] | |
| 11689 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[11] | |
| 11690 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[11] | |
| 11691 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[12] | |
| 11692 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[12] | |
| 11693 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[12] | |
| 11694 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[12] | |
| 11695 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[13] | |
| 11696 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[13] | |
| 11697 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[13] | |
| 11698 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[13] | |
| 11699 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[14] | |
| 11700 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[14] | |
| 11701 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[14] | |
| 11702 | ||
| 11703 | ||
| 11704 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[0] | |
| 11705 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[0] | |
| 11706 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[0] | |
| 11707 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[0] | |
| 11708 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[1] | |
| 11709 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[1] | |
| 11710 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[1] | |
| 11711 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[1] | |
| 11712 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[2] | |
| 11713 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[2] | |
| 11714 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[2] | |
| 11715 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[2] | |
| 11716 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[3] | |
| 11717 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[3] | |
| 11718 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[3] | |
| 11719 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[3] | |
| 11720 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[4] | |
| 11721 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[4] | |
| 11722 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[4] | |
| 11723 | ||
| 11724 | ||
| 11725 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[9] | |
| 11726 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[9] | |
| 11727 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[9] | |
| 11728 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[8] | |
| 11729 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[8] | |
| 11730 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[8] | |
| 11731 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[8] | |
| 11732 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[7] | |
| 11733 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[7] | |
| 11734 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[7] | |
| 11735 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[7] | |
| 11736 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[6] | |
| 11737 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[6] | |
| 11738 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[6] | |
| 11739 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[6] | |
| 11740 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[5] | |
| 11741 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[5] | |
| 11742 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[5] | |
| 11743 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[5] | |
| 11744 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[4] | |
| 11745 | ||
| 11746 | ||
| 11747 | // ff_l2d_decc_out_c6_lo0_2_scanin[0] | |
| 11748 | // ff_l2d_decc_out_c6_lo0_4_scanin[0] | |
| 11749 | // ff_l2d_decc_out_c6_hi0_2_scanin[0] | |
| 11750 | // ff_l2d_decc_out_c6_hi0_4_scanin[0] | |
| 11751 | // ff_l2d_decc_out_c6_lo1_2_scanin[0] | |
| 11752 | // ff_l2d_decc_out_c6_lo1_4_scanin[0] | |
| 11753 | // ff_l2d_decc_out_c6_hi1_2_scanin[0] | |
| 11754 | // ff_l2d_decc_out_c6_hi1_4_scanin[0] | |
| 11755 | // ff_l2d_decc_out_c6_lo0_2_scanin[1] | |
| 11756 | // ff_l2d_decc_out_c6_lo0_4_scanin[1] | |
| 11757 | // ff_l2d_decc_out_c6_hi0_2_scanin[1] | |
| 11758 | // ff_l2d_decc_out_c6_hi0_4_scanin[1] | |
| 11759 | // ff_l2d_decc_out_c6_lo1_2_scanin[1] | |
| 11760 | // ff_l2d_decc_out_c6_lo1_4_scanin[1] | |
| 11761 | // ff_l2d_decc_out_c6_hi1_2_scanin[1] | |
| 11762 | // ff_l2d_decc_out_c6_hi1_4_scanin[1] | |
| 11763 | // ff_l2d_decc_out_c6_lo0_2_scanin[2] | |
| 11764 | // ff_l2d_decc_out_c6_lo0_4_scanin[2] | |
| 11765 | // ff_l2d_decc_out_c6_hi0_2_scanin[2] | |
| 11766 | // ff_l2d_decc_out_c6_hi0_4_scanin[2] | |
| 11767 | // ff_l2d_decc_out_c6_lo1_2_scanin[2] | |
| 11768 | // ff_l2d_decc_out_c6_lo1_4_scanin[2] | |
| 11769 | // ff_l2d_decc_out_c6_hi1_2_scanin[2] | |
| 11770 | // ff_l2d_decc_out_c6_hi1_4_scanin[2] | |
| 11771 | // ff_l2d_decc_out_c6_lo0_2_scanin[3] | |
| 11772 | // ff_l2d_decc_out_c6_lo0_4_scanin[3] | |
| 11773 | // ff_l2d_decc_out_c6_hi0_2_scanin[3] | |
| 11774 | // ff_l2d_decc_out_c6_hi0_4_scanin[3] | |
| 11775 | // ff_l2d_decc_out_c6_lo1_2_scanin[3] | |
| 11776 | // ff_l2d_decc_out_c6_lo1_4_scanin[3] | |
| 11777 | // ff_l2d_decc_out_c6_hi1_2_scanin[3] | |
| 11778 | // ff_l2d_decc_out_c6_hi1_4_scanin[3] | |
| 11779 | // ff_l2d_decc_out_c6_lo0_2_scanin[4] | |
| 11780 | // ff_l2d_decc_out_c6_lo0_4_scanin[4] | |
| 11781 | // ff_l2d_decc_out_c6_hi0_2_scanin[4] | |
| 11782 | // ff_l2d_decc_out_c6_hi0_4_scanin[4] | |
| 11783 | // ff_l2d_decc_out_c6_lo1_2_scanin[4] | |
| 11784 | // ff_l2d_decc_out_c6_lo1_4_scanin[4] | |
| 11785 | // ff_l2d_decc_out_c6_hi1_2_scanin[4] | |
| 11786 | // ff_l2d_decc_out_c6_hi1_4_scanin[4] | |
| 11787 | // ff_l2d_decc_out_c6_lo0_2_scanin[5] | |
| 11788 | // ff_l2d_decc_out_c6_lo0_4_scanin[5] | |
| 11789 | // ff_l2d_decc_out_c6_hi0_2_scanin[5] | |
| 11790 | // ff_l2d_decc_out_c6_hi0_4_scanin[5] | |
| 11791 | // ff_l2d_decc_out_c6_lo1_2_scanin[5] | |
| 11792 | // ff_l2d_decc_out_c6_lo1_4_scanin[5] | |
| 11793 | // ff_l2d_decc_out_c6_hi1_2_scanin[5] | |
| 11794 | // ff_l2d_decc_out_c6_hi1_4_scanin[5] | |
| 11795 | // ff_l2d_decc_out_c6_lo0_2_scanin[6] | |
| 11796 | // ff_l2d_decc_out_c6_lo0_4_scanin[6] | |
| 11797 | // ff_l2d_decc_out_c6_hi0_2_scanin[6] | |
| 11798 | // ff_l2d_decc_out_c6_hi0_4_scanin[6] | |
| 11799 | // ff_l2d_decc_out_c6_lo1_2_scanin[6] | |
| 11800 | // ff_l2d_decc_out_c6_lo1_4_scanin[6] | |
| 11801 | // ff_l2d_decc_out_c6_hi1_2_scanin[6] | |
| 11802 | // ff_l2d_decc_out_c6_hi1_4_scanin[6] | |
| 11803 | // ff_l2d_decc_out_c6_lo0_2_scanin[7] | |
| 11804 | // ff_l2d_decc_out_c6_lo0_4_scanin[7] | |
| 11805 | // ff_l2d_decc_out_c6_hi0_2_scanin[7] | |
| 11806 | // ff_l2d_decc_out_c6_hi0_4_scanin[7] | |
| 11807 | // ff_l2d_decc_out_c6_lo1_2_scanin[7] | |
| 11808 | // ff_l2d_decc_out_c6_lo1_4_scanin[7] | |
| 11809 | // ff_l2d_decc_out_c6_hi1_2_scanin[7] | |
| 11810 | // ff_l2d_decc_out_c6_hi1_4_scanin[7] | |
| 11811 | // ff_l2d_decc_out_c6_lo0_2_scanin[8] | |
| 11812 | // ff_l2d_decc_out_c6_lo0_4_scanin[8] | |
| 11813 | // ff_l2d_decc_out_c6_hi0_2_scanin[8] | |
| 11814 | // ff_l2d_decc_out_c6_hi0_4_scanin[8] | |
| 11815 | // ff_l2d_decc_out_c6_lo1_2_scanin[8] | |
| 11816 | // ff_l2d_decc_out_c6_lo1_4_scanin[8] | |
| 11817 | // ff_l2d_decc_out_c6_hi1_2_scanin[8] | |
| 11818 | // ff_l2d_decc_out_c6_hi1_4_scanin[8] | |
| 11819 | // ff_l2d_decc_out_c6_lo0_2_scanin[9] | |
| 11820 | // ff_l2d_decc_out_c6_lo0_4_scanin[9] | |
| 11821 | // ff_l2d_decc_out_c6_hi0_2_scanin[9] | |
| 11822 | // ff_l2d_decc_out_c6_hi0_4_scanin[9] | |
| 11823 | // ff_l2d_decc_out_c6_lo1_2_scanin[9] | |
| 11824 | // ff_l2d_decc_out_c6_lo1_4_scanin[9] | |
| 11825 | // ff_l2d_decc_out_c6_hi1_2_scanin[9] | |
| 11826 | // ff_l2d_decc_out_c6_hi1_4_scanin[9] | |
| 11827 | ||
| 11828 | // ff_l2d_decc_out_c6_lo0_2_scanin[10] | |
| 11829 | // ff_l2d_decc_out_c6_lo0_4_scanin[10] | |
| 11830 | // ff_l2d_decc_out_c6_hi0_2_scanin[10] | |
| 11831 | // ff_l2d_decc_out_c6_hi0_4_scanin[10] | |
| 11832 | // ff_l2d_decc_out_c6_lo1_2_scanin[10] | |
| 11833 | // ff_l2d_decc_out_c6_lo1_4_scanin[10] | |
| 11834 | // ff_l2d_decc_out_c6_hi1_2_scanin[10] | |
| 11835 | // ff_l2d_decc_out_c6_hi1_4_scanin[10] | |
| 11836 | // ff_l2d_decc_out_c6_lo0_2_scanin[11] | |
| 11837 | // ff_l2d_decc_out_c6_lo0_4_scanin[11] | |
| 11838 | // ff_l2d_decc_out_c6_hi0_2_scanin[11] | |
| 11839 | // ff_l2d_decc_out_c6_hi0_4_scanin[11] | |
| 11840 | // ff_l2d_decc_out_c6_lo1_2_scanin[11] | |
| 11841 | // ff_l2d_decc_out_c6_lo1_4_scanin[11] | |
| 11842 | // ff_l2d_decc_out_c6_hi1_2_scanin[11] | |
| 11843 | // ff_l2d_decc_out_c6_hi1_4_scanin[11] | |
| 11844 | // ff_l2d_decc_out_c6_lo0_2_scanin[12] | |
| 11845 | // ff_l2d_decc_out_c6_lo0_4_scanin[12] | |
| 11846 | // ff_l2d_decc_out_c6_hi0_2_scanin[12] | |
| 11847 | // ff_l2d_decc_out_c6_hi0_4_scanin[12] | |
| 11848 | // ff_l2d_decc_out_c6_lo1_2_scanin[12] | |
| 11849 | // ff_l2d_decc_out_c6_lo1_4_scanin[12] | |
| 11850 | // ff_l2d_decc_out_c6_hi1_2_scanin[12] | |
| 11851 | // ff_l2d_decc_out_c6_hi1_4_scanin[12] | |
| 11852 | // ff_l2d_decc_out_c6_lo0_2_scanin[13] | |
| 11853 | // ff_l2d_decc_out_c6_lo0_4_scanin[13] | |
| 11854 | // ff_l2d_decc_out_c6_hi0_2_scanin[13] | |
| 11855 | // ff_l2d_decc_out_c6_hi0_4_scanin[13] | |
| 11856 | // ff_l2d_decc_out_c6_lo1_2_scanin[13] | |
| 11857 | // ff_l2d_decc_out_c6_lo1_4_scanin[13] | |
| 11858 | // ff_l2d_decc_out_c6_hi1_2_scanin[13] | |
| 11859 | // ff_l2d_decc_out_c6_hi1_4_scanin[13] | |
| 11860 | // ff_l2d_decc_out_c6_lo0_2_scanin[14] | |
| 11861 | // ff_l2d_decc_out_c6_lo0_4_scanin[14] | |
| 11862 | // ff_l2d_decc_out_c6_hi0_2_scanin[14] | |
| 11863 | // ff_l2d_decc_out_c6_hi0_4_scanin[14] | |
| 11864 | // ff_l2d_decc_out_c6_lo1_2_scanin[14] | |
| 11865 | // ff_l2d_decc_out_c6_lo1_4_scanin[14] | |
| 11866 | // ff_l2d_decc_out_c6_hi1_2_scanin[14] | |
| 11867 | // ff_l2d_decc_out_c6_hi1_4_scanin[14] | |
| 11868 | // ff_l2d_decc_out_c6_lo0_2_scanin[15] | |
| 11869 | // ff_l2d_decc_out_c6_lo0_4_scanin[15] | |
| 11870 | // ff_l2d_decc_out_c6_hi0_2_scanin[15] | |
| 11871 | // ff_l2d_decc_out_c6_hi0_4_scanin[15] | |
| 11872 | // ff_l2d_decc_out_c6_lo1_2_scanin[15] | |
| 11873 | // ff_l2d_decc_out_c6_lo1_4_scanin[15] | |
| 11874 | // ff_l2d_decc_out_c6_hi1_2_scanin[15] | |
| 11875 | // ff_l2d_decc_out_c6_hi1_4_scanin[15] | |
| 11876 | // ff_l2d_decc_out_c6_lo0_2_scanin[16] | |
| 11877 | // ff_l2d_decc_out_c6_lo0_4_scanin[16] | |
| 11878 | // ff_l2d_decc_out_c6_hi0_2_scanin[16] | |
| 11879 | // ff_l2d_decc_out_c6_hi0_4_scanin[16] | |
| 11880 | // ff_l2d_decc_out_c6_lo1_2_scanin[16] | |
| 11881 | // ff_l2d_decc_out_c6_lo1_4_scanin[16] | |
| 11882 | // ff_l2d_decc_out_c6_hi1_2_scanin[16] | |
| 11883 | // ff_l2d_decc_out_c6_hi1_4_scanin[16] | |
| 11884 | // ff_l2d_decc_out_c6_lo0_2_scanin[17] | |
| 11885 | // ff_l2d_decc_out_c6_lo0_4_scanin[17] | |
| 11886 | // ff_l2d_decc_out_c6_hi0_2_scanin[17] | |
| 11887 | // ff_l2d_decc_out_c6_hi0_4_scanin[17] | |
| 11888 | // ff_l2d_decc_out_c6_lo1_2_scanin[17] | |
| 11889 | // ff_l2d_decc_out_c6_lo1_4_scanin[17] | |
| 11890 | // ff_l2d_decc_out_c6_hi1_2_scanin[17] | |
| 11891 | // ff_l2d_decc_out_c6_hi1_4_scanin[17] | |
| 11892 | // ff_l2d_decc_out_c6_lo0_2_scanin[18] | |
| 11893 | // ff_l2d_decc_out_c6_lo0_4_scanin[18] | |
| 11894 | // ff_l2d_decc_out_c6_hi0_2_scanin[18] | |
| 11895 | // ff_l2d_decc_out_c6_hi0_4_scanin[18] | |
| 11896 | // ff_l2d_decc_out_c6_lo1_2_scanin[18] | |
| 11897 | // ff_l2d_decc_out_c6_lo1_4_scanin[18] | |
| 11898 | // ff_l2d_decc_out_c6_hi1_2_scanin[18] | |
| 11899 | // ff_l2d_decc_out_c6_hi1_4_scanin[18] | |
| 11900 | // ff_l2d_decc_out_c6_lo0_2_scanin[19] | |
| 11901 | // ff_l2d_decc_out_c6_lo0_4_scanin[19] | |
| 11902 | // ff_l2d_decc_out_c6_hi0_2_scanin[19] | |
| 11903 | // ff_l2d_decc_out_c6_hi0_4_scanin[19] | |
| 11904 | ||
| 11905 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[19] | |
| 11906 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[19] | |
| 11907 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[20] | |
| 11908 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[20] | |
| 11909 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[20] | |
| 11910 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[20] | |
| 11911 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[21] | |
| 11912 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[21] | |
| 11913 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[21] | |
| 11914 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[21] | |
| 11915 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[22] | |
| 11916 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[22] | |
| 11917 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[22] | |
| 11918 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[22] | |
| 11919 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[23] | |
| 11920 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[23] | |
| 11921 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[23] | |
| 11922 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[23] | |
| 11923 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[24] | |
| 11924 | ||
| 11925 | ||
| 11926 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[29] | |
| 11927 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[28] | |
| 11928 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[28] | |
| 11929 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[28] | |
| 11930 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[28] | |
| 11931 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[27] | |
| 11932 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[27] | |
| 11933 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[27] | |
| 11934 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[27] | |
| 11935 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[26] | |
| 11936 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[26] | |
| 11937 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[26] | |
| 11938 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[26] | |
| 11939 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[25] | |
| 11940 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[25] | |
| 11941 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[25] | |
| 11942 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[25] | |
| 11943 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[24] | |
| 11944 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[24] | |
| 11945 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[24] | |
| 11946 | ||
| 11947 | // ff_cache_col_offset_c5_123_scanin[0] | |
| 11948 | // ff_cache_col_offset_c5_123_scanin[2] | |
| 11949 | // ff_cache_col_offset_c4_123_scanin[0] | |
| 11950 | // ff_cache_col_offset_c4_123_scanin[2] | |
| 11951 | // ff_cache_col_offset_c4_tog_123_scanin[0] | |
| 11952 | // ff_cache_cache_rd_wr_c5_21_scanin | |
| 11953 | // ff_cache_col_offset_c5_123_scanin[1] | |
| 11954 | // ff_cache_col_offset_c5_123_scanin[3] | |
| 11955 | // ff_cache_col_offset_c4_123_scanin[1] | |
| 11956 | // ff_cache_col_offset_c4_123_scanin[3] | |
| 11957 | // ff_cache_col_offset_c4_tog_123_scanin[1] | |
| 11958 | ||
| 11959 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[38] | |
| 11960 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[38] | |
| 11961 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[38] | |
| 11962 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[38] | |
| 11963 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[37] | |
| 11964 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[37] | |
| 11965 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[37] | |
| 11966 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[37] | |
| 11967 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[36] | |
| 11968 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[36] | |
| 11969 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[36] | |
| 11970 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[36] | |
| 11971 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[35] | |
| 11972 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[35] | |
| 11973 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[35] | |
| 11974 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[35] | |
| 11975 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[34] | |
| 11976 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[34] | |
| 11977 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[34] | |
| 11978 | ||
| 11979 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[29] | |
| 11980 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[29] | |
| 11981 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[29] | |
| 11982 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[30] | |
| 11983 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[30] | |
| 11984 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[30] | |
| 11985 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[30] | |
| 11986 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[31] | |
| 11987 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[31] | |
| 11988 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[31] | |
| 11989 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[31] | |
| 11990 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[32] | |
| 11991 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[32] | |
| 11992 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[32] | |
| 11993 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[32] | |
| 11994 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[33] | |
| 11995 | // ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[33] | |
| 11996 | // ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[33] | |
| 11997 | // ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[33] | |
| 11998 | // ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[34] | |
| 11999 | ||
| 12000 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[38] | |
| 12001 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[38] | |
| 12002 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[38] | |
| 12003 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[38] | |
| 12004 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[37] | |
| 12005 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[37] | |
| 12006 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[37] | |
| 12007 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[37] | |
| 12008 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[36] | |
| 12009 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[36] | |
| 12010 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[36] | |
| 12011 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[36] | |
| 12012 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[35] | |
| 12013 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[35] | |
| 12014 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[35] | |
| 12015 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[35] | |
| 12016 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[34] | |
| 12017 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[34] | |
| 12018 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[34] | |
| 12019 | ||
| 12020 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[29] | |
| 12021 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[29] | |
| 12022 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[29] | |
| 12023 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[30] | |
| 12024 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[30] | |
| 12025 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[30] | |
| 12026 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[30] | |
| 12027 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[31] | |
| 12028 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[31] | |
| 12029 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[31] | |
| 12030 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[31] | |
| 12031 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[32] | |
| 12032 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[32] | |
| 12033 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[32] | |
| 12034 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[32] | |
| 12035 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[33] | |
| 12036 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[33] | |
| 12037 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[33] | |
| 12038 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[33] | |
| 12039 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[34] | |
| 12040 | ||
| 12041 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[19] | |
| 12042 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[19] | |
| 12043 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[20] | |
| 12044 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[20] | |
| 12045 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[20] | |
| 12046 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[20] | |
| 12047 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[21] | |
| 12048 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[21] | |
| 12049 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[21] | |
| 12050 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[21] | |
| 12051 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[22] | |
| 12052 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[22] | |
| 12053 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[22] | |
| 12054 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[22] | |
| 12055 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[23] | |
| 12056 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[23] | |
| 12057 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[23] | |
| 12058 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[23] | |
| 12059 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[24] | |
| 12060 | ||
| 12061 | ||
| 12062 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[29] | |
| 12063 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[28] | |
| 12064 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[28] | |
| 12065 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[28] | |
| 12066 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[28] | |
| 12067 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[27] | |
| 12068 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[27] | |
| 12069 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[27] | |
| 12070 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[27] | |
| 12071 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[26] | |
| 12072 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[26] | |
| 12073 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[26] | |
| 12074 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[26] | |
| 12075 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[25] | |
| 12076 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[25] | |
| 12077 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[25] | |
| 12078 | // ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[25] | |
| 12079 | // ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[24] | |
| 12080 | // ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[24] | |
| 12081 | // ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[24] | |
| 12082 | ||
| 12083 | // ff_l2d_decc_out_c6_lo1_2_scanin[19] | |
| 12084 | // ff_l2d_decc_out_c6_lo1_4_scanin[19] | |
| 12085 | // ff_l2d_decc_out_c6_hi1_2_scanin[19] | |
| 12086 | // ff_l2d_decc_out_c6_hi1_4_scanin[19] | |
| 12087 | // ff_l2d_decc_out_c6_lo0_2_scanin[20] | |
| 12088 | // ff_l2d_decc_out_c6_lo0_4_scanin[20] | |
| 12089 | // ff_l2d_decc_out_c6_hi0_2_scanin[20] | |
| 12090 | // ff_l2d_decc_out_c6_hi0_4_scanin[20] | |
| 12091 | // ff_l2d_decc_out_c6_lo1_2_scanin[20] | |
| 12092 | // ff_l2d_decc_out_c6_lo1_4_scanin[20] | |
| 12093 | // ff_l2d_decc_out_c6_hi1_2_scanin[20] | |
| 12094 | // ff_l2d_decc_out_c6_hi1_4_scanin[20] | |
| 12095 | // ff_l2d_decc_out_c6_lo0_2_scanin[21] | |
| 12096 | // ff_l2d_decc_out_c6_lo0_4_scanin[21] | |
| 12097 | // ff_l2d_decc_out_c6_hi0_2_scanin[21] | |
| 12098 | // ff_l2d_decc_out_c6_hi0_4_scanin[21] | |
| 12099 | // ff_l2d_decc_out_c6_lo1_2_scanin[21] | |
| 12100 | // ff_l2d_decc_out_c6_lo1_4_scanin[21] | |
| 12101 | // ff_l2d_decc_out_c6_hi1_2_scanin[21] | |
| 12102 | // ff_l2d_decc_out_c6_hi1_4_scanin[21] | |
| 12103 | // ff_l2d_decc_out_c6_lo0_2_scanin[22] | |
| 12104 | // ff_l2d_decc_out_c6_lo0_4_scanin[22] | |
| 12105 | // ff_l2d_decc_out_c6_hi0_2_scanin[22] | |
| 12106 | // ff_l2d_decc_out_c6_hi0_4_scanin[22] | |
| 12107 | // ff_l2d_decc_out_c6_lo1_2_scanin[22] | |
| 12108 | // ff_l2d_decc_out_c6_lo1_4_scanin[22] | |
| 12109 | // ff_l2d_decc_out_c6_hi1_2_scanin[22] | |
| 12110 | // ff_l2d_decc_out_c6_hi1_4_scanin[22] | |
| 12111 | // ff_l2d_decc_out_c6_lo0_2_scanin[23] | |
| 12112 | // ff_l2d_decc_out_c6_lo0_4_scanin[23] | |
| 12113 | // ff_l2d_decc_out_c6_hi0_2_scanin[23] | |
| 12114 | // ff_l2d_decc_out_c6_hi0_4_scanin[23] | |
| 12115 | // ff_l2d_decc_out_c6_lo1_2_scanin[23] | |
| 12116 | // ff_l2d_decc_out_c6_lo1_4_scanin[23] | |
| 12117 | // ff_l2d_decc_out_c6_hi1_2_scanin[23] | |
| 12118 | // ff_l2d_decc_out_c6_hi1_4_scanin[23] | |
| 12119 | // ff_l2d_decc_out_c6_lo0_2_scanin[24] | |
| 12120 | // ff_l2d_decc_out_c6_lo0_4_scanin[24] | |
| 12121 | // ff_l2d_decc_out_c6_hi0_2_scanin[24] | |
| 12122 | // ff_l2d_decc_out_c6_hi0_4_scanin[24] | |
| 12123 | // ff_l2d_decc_out_c6_lo1_2_scanin[24] | |
| 12124 | // ff_l2d_decc_out_c6_lo1_4_scanin[24] | |
| 12125 | // ff_l2d_decc_out_c6_hi1_2_scanin[24] | |
| 12126 | // ff_l2d_decc_out_c6_hi1_4_scanin[24] | |
| 12127 | // ff_l2d_decc_out_c6_lo0_2_scanin[25] | |
| 12128 | // ff_l2d_decc_out_c6_lo0_4_scanin[25] | |
| 12129 | // ff_l2d_decc_out_c6_hi0_2_scanin[25] | |
| 12130 | // ff_l2d_decc_out_c6_hi0_4_scanin[25] | |
| 12131 | // ff_l2d_decc_out_c6_lo1_2_scanin[25] | |
| 12132 | // ff_l2d_decc_out_c6_lo1_4_scanin[25] | |
| 12133 | // ff_l2d_decc_out_c6_hi1_2_scanin[25] | |
| 12134 | // ff_l2d_decc_out_c6_hi1_4_scanin[25] | |
| 12135 | // ff_l2d_decc_out_c6_lo0_2_scanin[26] | |
| 12136 | // ff_l2d_decc_out_c6_lo0_4_scanin[26] | |
| 12137 | // ff_l2d_decc_out_c6_hi0_2_scanin[26] | |
| 12138 | // ff_l2d_decc_out_c6_hi0_4_scanin[26] | |
| 12139 | // ff_l2d_decc_out_c6_lo1_2_scanin[26] | |
| 12140 | // ff_l2d_decc_out_c6_lo1_4_scanin[26] | |
| 12141 | // ff_l2d_decc_out_c6_hi1_2_scanin[26] | |
| 12142 | // ff_l2d_decc_out_c6_hi1_4_scanin[26] | |
| 12143 | // ff_l2d_decc_out_c6_lo0_2_scanin[27] | |
| 12144 | // ff_l2d_decc_out_c6_lo0_4_scanin[27] | |
| 12145 | // ff_l2d_decc_out_c6_hi0_2_scanin[27] | |
| 12146 | // ff_l2d_decc_out_c6_hi0_4_scanin[27] | |
| 12147 | // ff_l2d_decc_out_c6_lo1_2_scanin[27] | |
| 12148 | // ff_l2d_decc_out_c6_lo1_4_scanin[27] | |
| 12149 | // ff_l2d_decc_out_c6_hi1_2_scanin[27] | |
| 12150 | // ff_l2d_decc_out_c6_hi1_4_scanin[27] | |
| 12151 | // ff_l2d_decc_out_c6_lo0_2_scanin[28] | |
| 12152 | // ff_l2d_decc_out_c6_lo0_4_scanin[28] | |
| 12153 | // ff_l2d_decc_out_c6_hi0_2_scanin[28] | |
| 12154 | // ff_l2d_decc_out_c6_hi0_4_scanin[28] | |
| 12155 | // ff_l2d_decc_out_c6_lo1_2_scanin[28] | |
| 12156 | // ff_l2d_decc_out_c6_lo1_4_scanin[28] | |
| 12157 | // ff_l2d_decc_out_c6_hi1_2_scanin[28] | |
| 12158 | // ff_l2d_decc_out_c6_hi1_4_scanin[28] | |
| 12159 | // ff_l2d_decc_out_c6_lo0_2_scanin[29] | |
| 12160 | // ff_l2d_decc_out_c6_lo0_4_scanin[29] | |
| 12161 | ||
| 12162 | // ff_l2d_decc_out_c6_hi0_2_scanin[29] | |
| 12163 | // ff_l2d_decc_out_c6_hi0_4_scanin[29] | |
| 12164 | // ff_l2d_decc_out_c6_lo1_2_scanin[29] | |
| 12165 | // ff_l2d_decc_out_c6_lo1_4_scanin[29] | |
| 12166 | // ff_l2d_decc_out_c6_hi1_2_scanin[29] | |
| 12167 | // ff_l2d_decc_out_c6_hi1_4_scanin[29] | |
| 12168 | // ff_l2d_decc_out_c6_lo0_2_scanin[30] | |
| 12169 | // ff_l2d_decc_out_c6_lo0_4_scanin[30] | |
| 12170 | // ff_l2d_decc_out_c6_hi0_2_scanin[30] | |
| 12171 | // ff_l2d_decc_out_c6_hi0_4_scanin[30] | |
| 12172 | // ff_l2d_decc_out_c6_lo1_2_scanin[30] | |
| 12173 | // ff_l2d_decc_out_c6_lo1_4_scanin[30] | |
| 12174 | // ff_l2d_decc_out_c6_hi1_2_scanin[30] | |
| 12175 | // ff_l2d_decc_out_c6_hi1_4_scanin[30] | |
| 12176 | // ff_l2d_decc_out_c6_lo0_2_scanin[31] | |
| 12177 | // ff_l2d_decc_out_c6_lo0_4_scanin[31] | |
| 12178 | // ff_l2d_decc_out_c6_hi0_2_scanin[31] | |
| 12179 | // ff_l2d_decc_out_c6_hi0_4_scanin[31] | |
| 12180 | // ff_l2d_decc_out_c6_lo1_2_scanin[31] | |
| 12181 | // ff_l2d_decc_out_c6_lo1_4_scanin[31] | |
| 12182 | // ff_l2d_decc_out_c6_hi1_2_scanin[31] | |
| 12183 | // ff_l2d_decc_out_c6_hi1_4_scanin[31] | |
| 12184 | // ff_l2d_decc_out_c6_lo0_2_scanin[32] | |
| 12185 | // ff_l2d_decc_out_c6_lo0_4_scanin[32] | |
| 12186 | // ff_l2d_decc_out_c6_hi0_2_scanin[32] | |
| 12187 | // ff_l2d_decc_out_c6_hi0_4_scanin[32] | |
| 12188 | // ff_l2d_decc_out_c6_lo1_2_scanin[32] | |
| 12189 | // ff_l2d_decc_out_c6_lo1_4_scanin[32] | |
| 12190 | // ff_l2d_decc_out_c6_hi1_2_scanin[32] | |
| 12191 | // ff_l2d_decc_out_c6_hi1_4_scanin[32] | |
| 12192 | // ff_l2d_decc_out_c6_lo0_2_scanin[33] | |
| 12193 | // ff_l2d_decc_out_c6_lo0_4_scanin[33] | |
| 12194 | // ff_l2d_decc_out_c6_hi0_2_scanin[33] | |
| 12195 | // ff_l2d_decc_out_c6_hi0_4_scanin[33] | |
| 12196 | // ff_l2d_decc_out_c6_lo1_2_scanin[33] | |
| 12197 | // ff_l2d_decc_out_c6_lo1_4_scanin[33] | |
| 12198 | // ff_l2d_decc_out_c6_hi1_2_scanin[33] | |
| 12199 | // ff_l2d_decc_out_c6_hi1_4_scanin[33] | |
| 12200 | // ff_l2d_decc_out_c6_lo0_2_scanin[34] | |
| 12201 | // ff_l2d_decc_out_c6_lo0_4_scanin[34] | |
| 12202 | // ff_l2d_decc_out_c6_hi0_2_scanin[34] | |
| 12203 | // ff_l2d_decc_out_c6_hi0_4_scanin[34] | |
| 12204 | // ff_l2d_decc_out_c6_lo1_2_scanin[34] | |
| 12205 | // ff_l2d_decc_out_c6_lo1_4_scanin[34] | |
| 12206 | // ff_l2d_decc_out_c6_hi1_2_scanin[34] | |
| 12207 | // ff_l2d_decc_out_c6_hi1_4_scanin[34] | |
| 12208 | // ff_l2d_decc_out_c6_lo0_2_scanin[35] | |
| 12209 | // ff_l2d_decc_out_c6_lo0_4_scanin[35] | |
| 12210 | // ff_l2d_decc_out_c6_hi0_2_scanin[35] | |
| 12211 | // ff_l2d_decc_out_c6_hi0_4_scanin[35] | |
| 12212 | // ff_l2d_decc_out_c6_lo1_2_scanin[35] | |
| 12213 | // ff_l2d_decc_out_c6_lo1_4_scanin[35] | |
| 12214 | // ff_l2d_decc_out_c6_hi1_2_scanin[35] | |
| 12215 | // ff_l2d_decc_out_c6_hi1_4_scanin[35] | |
| 12216 | // ff_l2d_decc_out_c6_lo0_2_scanin[36] | |
| 12217 | // ff_l2d_decc_out_c6_lo0_4_scanin[36] | |
| 12218 | // ff_l2d_decc_out_c6_hi0_2_scanin[36] | |
| 12219 | // ff_l2d_decc_out_c6_hi0_4_scanin[36] | |
| 12220 | // ff_l2d_decc_out_c6_lo1_2_scanin[36] | |
| 12221 | // ff_l2d_decc_out_c6_lo1_4_scanin[36] | |
| 12222 | // ff_l2d_decc_out_c6_hi1_2_scanin[36] | |
| 12223 | // ff_l2d_decc_out_c6_hi1_4_scanin[36] | |
| 12224 | // ff_l2d_decc_out_c6_lo0_2_scanin[37] | |
| 12225 | // ff_l2d_decc_out_c6_lo0_4_scanin[37] | |
| 12226 | // ff_l2d_decc_out_c6_hi0_2_scanin[37] | |
| 12227 | // ff_l2d_decc_out_c6_hi0_4_scanin[37] | |
| 12228 | // ff_l2d_decc_out_c6_lo1_2_scanin[37] | |
| 12229 | // ff_l2d_decc_out_c6_lo1_4_scanin[37] | |
| 12230 | // ff_l2d_decc_out_c6_hi1_2_scanin[37] | |
| 12231 | // ff_l2d_decc_out_c6_hi1_4_scanin[37] | |
| 12232 | // ff_l2d_decc_out_c6_lo0_2_scanin[38] | |
| 12233 | // ff_l2d_decc_out_c6_lo0_4_scanin[38] | |
| 12234 | // ff_l2d_decc_out_c6_hi0_2_scanin[38] | |
| 12235 | // ff_l2d_decc_out_c6_hi0_4_scanin[38] | |
| 12236 | // ff_l2d_decc_out_c6_lo1_2_scanin[38] | |
| 12237 | // ff_l2d_decc_out_c6_lo1_4_scanin[38] | |
| 12238 | // ff_l2d_decc_out_c6_hi1_2_scanin[38] | |
| 12239 | // ff_l2d_decc_out_c6_hi1_4_scanin[38] | |
| 12240 | // so_tstmod | |
| 12241 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[19] | |
| 12242 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[19] | |
| 12243 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[20] | |
| 12244 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[20] | |
| 12245 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[20] | |
| 12246 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[20] | |
| 12247 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[21] | |
| 12248 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[21] | |
| 12249 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[21] | |
| 12250 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[21] | |
| 12251 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[22] | |
| 12252 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[22] | |
| 12253 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[22] | |
| 12254 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[22] | |
| 12255 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[23] | |
| 12256 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[23] | |
| 12257 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[23] | |
| 12258 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[23] | |
| 12259 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[24] | |
| 12260 | ||
| 12261 | ||
| 12262 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[29] | |
| 12263 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[28] | |
| 12264 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[28] | |
| 12265 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[28] | |
| 12266 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[28] | |
| 12267 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[27] | |
| 12268 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[27] | |
| 12269 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[27] | |
| 12270 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[27] | |
| 12271 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[26] | |
| 12272 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[26] | |
| 12273 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[26] | |
| 12274 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[26] | |
| 12275 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[25] | |
| 12276 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[25] | |
| 12277 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[25] | |
| 12278 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[25] | |
| 12279 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[24] | |
| 12280 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[24] | |
| 12281 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[24] | |
| 12282 | ||
| 12283 | // ff_cache_col_offset_c5_101_scanin[0] | |
| 12284 | // ff_cache_col_offset_c5_101_scanin[2] | |
| 12285 | // ff_cache_col_offset_c4_101_scanin[0] | |
| 12286 | // ff_cache_col_offset_c4_101_scanin[2] | |
| 12287 | // ff_cache_col_offset_c4_tog_101_scanin[0] | |
| 12288 | // ff_cache_cache_rd_wr_c5_01_scanin | |
| 12289 | // ff_cache_col_offset_c5_101_scanin[1] | |
| 12290 | // ff_cache_col_offset_c5_101_scanin[3] | |
| 12291 | // ff_cache_col_offset_c4_101_scanin[1] | |
| 12292 | // ff_cache_col_offset_c4_101_scanin[3] | |
| 12293 | // ff_cache_col_offset_c4_tog_101_scanin[1] | |
| 12294 | ||
| 12295 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[38] | |
| 12296 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[38] | |
| 12297 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[38] | |
| 12298 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[38] | |
| 12299 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[37] | |
| 12300 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[37] | |
| 12301 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[37] | |
| 12302 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[37] | |
| 12303 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[36] | |
| 12304 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[36] | |
| 12305 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[36] | |
| 12306 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[36] | |
| 12307 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[35] | |
| 12308 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[35] | |
| 12309 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[35] | |
| 12310 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[35] | |
| 12311 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[34] | |
| 12312 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[34] | |
| 12313 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[34] | |
| 12314 | ||
| 12315 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[29] | |
| 12316 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[29] | |
| 12317 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[29] | |
| 12318 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[30] | |
| 12319 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[30] | |
| 12320 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[30] | |
| 12321 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[30] | |
| 12322 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[31] | |
| 12323 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[31] | |
| 12324 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[31] | |
| 12325 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[31] | |
| 12326 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[32] | |
| 12327 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[32] | |
| 12328 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[32] | |
| 12329 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[32] | |
| 12330 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[33] | |
| 12331 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[33] | |
| 12332 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[33] | |
| 12333 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[33] | |
| 12334 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[34] | |
| 12335 | ||
| 12336 | // ff_l2t_l2d_stdecc_c3_scanin[0:38] | |
| 12337 | ||
| 12338 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[38] | |
| 12339 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[38] | |
| 12340 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[38] | |
| 12341 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[38] | |
| 12342 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[37] | |
| 12343 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[37] | |
| 12344 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[37] | |
| 12345 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[37] | |
| 12346 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[36] | |
| 12347 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[36] | |
| 12348 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[36] | |
| 12349 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[36] | |
| 12350 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[35] | |
| 12351 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[35] | |
| 12352 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[35] | |
| 12353 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[35] | |
| 12354 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[34] | |
| 12355 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[34] | |
| 12356 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[34] | |
| 12357 | ||
| 12358 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[29] | |
| 12359 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[29] | |
| 12360 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[29] | |
| 12361 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[30] | |
| 12362 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[30] | |
| 12363 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[30] | |
| 12364 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[30] | |
| 12365 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[31] | |
| 12366 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[31] | |
| 12367 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[31] | |
| 12368 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[31] | |
| 12369 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[32] | |
| 12370 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[32] | |
| 12371 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[32] | |
| 12372 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[32] | |
| 12373 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[33] | |
| 12374 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[33] | |
| 12375 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[33] | |
| 12376 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[33] | |
| 12377 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[34] | |
| 12378 | ||
| 12379 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[19] | |
| 12380 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[19] | |
| 12381 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[20] | |
| 12382 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[20] | |
| 12383 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[20] | |
| 12384 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[20] | |
| 12385 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[21] | |
| 12386 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[21] | |
| 12387 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[21] | |
| 12388 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[21] | |
| 12389 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[22] | |
| 12390 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[22] | |
| 12391 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[22] | |
| 12392 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[22] | |
| 12393 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[23] | |
| 12394 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[23] | |
| 12395 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[23] | |
| 12396 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[23] | |
| 12397 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[24] | |
| 12398 | ||
| 12399 | ||
| 12400 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[29] | |
| 12401 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[28] | |
| 12402 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[28] | |
| 12403 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[28] | |
| 12404 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[28] | |
| 12405 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[27] | |
| 12406 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[27] | |
| 12407 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[27] | |
| 12408 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[27] | |
| 12409 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[26] | |
| 12410 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[26] | |
| 12411 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[26] | |
| 12412 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[26] | |
| 12413 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[25] | |
| 12414 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[25] | |
| 12415 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[25] | |
| 12416 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[25] | |
| 12417 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[24] | |
| 12418 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[24] | |
| 12419 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[24] | |
| 12420 | ||
| 12421 | // ff_l2d_decc_out_c6_lo1_1_scanin[19] | |
| 12422 | // ff_l2d_decc_out_c6_lo1_3_scanin[19] | |
| 12423 | // ff_l2d_decc_out_c6_hi1_1_scanin[19] | |
| 12424 | // ff_l2d_decc_out_c6_hi1_3_scanin[19] | |
| 12425 | // ff_l2d_decc_out_c6_lo0_1_scanin[20] | |
| 12426 | // ff_l2d_decc_out_c6_lo0_3_scanin[20] | |
| 12427 | // ff_l2d_decc_out_c6_hi0_1_scanin[20] | |
| 12428 | // ff_l2d_decc_out_c6_hi0_3_scanin[20] | |
| 12429 | // ff_l2d_decc_out_c6_lo1_1_scanin[20] | |
| 12430 | // ff_l2d_decc_out_c6_lo1_3_scanin[20] | |
| 12431 | // ff_l2d_decc_out_c6_hi1_1_scanin[20] | |
| 12432 | // ff_l2d_decc_out_c6_hi1_3_scanin[20] | |
| 12433 | // ff_l2d_decc_out_c6_lo0_1_scanin[21] | |
| 12434 | // ff_l2d_decc_out_c6_lo0_3_scanin[21] | |
| 12435 | // ff_l2d_decc_out_c6_hi0_1_scanin[21] | |
| 12436 | // ff_l2d_decc_out_c6_hi0_3_scanin[21] | |
| 12437 | // ff_l2d_decc_out_c6_lo1_1_scanin[21] | |
| 12438 | // ff_l2d_decc_out_c6_lo1_3_scanin[21] | |
| 12439 | // ff_l2d_decc_out_c6_hi1_1_scanin[21] | |
| 12440 | // ff_l2d_decc_out_c6_hi1_3_scanin[21] | |
| 12441 | // ff_l2d_decc_out_c6_lo0_1_scanin[22] | |
| 12442 | // ff_l2d_decc_out_c6_lo0_3_scanin[22] | |
| 12443 | // ff_l2d_decc_out_c6_hi0_1_scanin[22] | |
| 12444 | // ff_l2d_decc_out_c6_hi0_3_scanin[22] | |
| 12445 | // ff_l2d_decc_out_c6_lo1_1_scanin[22] | |
| 12446 | // ff_l2d_decc_out_c6_lo1_3_scanin[22] | |
| 12447 | // ff_l2d_decc_out_c6_hi1_1_scanin[22] | |
| 12448 | // ff_l2d_decc_out_c6_hi1_3_scanin[22] | |
| 12449 | // ff_l2d_decc_out_c6_lo0_1_scanin[23] | |
| 12450 | // ff_l2d_decc_out_c6_lo0_3_scanin[23] | |
| 12451 | // ff_l2d_decc_out_c6_hi0_1_scanin[23] | |
| 12452 | // ff_l2d_decc_out_c6_hi0_3_scanin[23] | |
| 12453 | // ff_l2d_decc_out_c6_lo1_1_scanin[23] | |
| 12454 | // ff_l2d_decc_out_c6_lo1_3_scanin[23] | |
| 12455 | // ff_l2d_decc_out_c6_hi1_1_scanin[23] | |
| 12456 | // ff_l2d_decc_out_c6_hi1_3_scanin[23] | |
| 12457 | // ff_l2d_decc_out_c6_lo0_1_scanin[24] | |
| 12458 | // ff_l2d_decc_out_c6_lo0_3_scanin[24] | |
| 12459 | // ff_l2d_decc_out_c6_hi0_1_scanin[24] | |
| 12460 | // ff_l2d_decc_out_c6_hi0_3_scanin[24] | |
| 12461 | // ff_l2d_decc_out_c6_lo1_1_scanin[24] | |
| 12462 | // ff_l2d_decc_out_c6_lo1_3_scanin[24] | |
| 12463 | // ff_l2d_decc_out_c6_hi1_1_scanin[24] | |
| 12464 | // ff_l2d_decc_out_c6_hi1_3_scanin[24] | |
| 12465 | // ff_l2d_decc_out_c6_lo0_1_scanin[25] | |
| 12466 | // ff_l2d_decc_out_c6_lo0_3_scanin[25] | |
| 12467 | // ff_l2d_decc_out_c6_hi0_1_scanin[25] | |
| 12468 | // ff_l2d_decc_out_c6_hi0_3_scanin[25] | |
| 12469 | // ff_l2d_decc_out_c6_lo1_1_scanin[25] | |
| 12470 | // ff_l2d_decc_out_c6_lo1_3_scanin[25] | |
| 12471 | // ff_l2d_decc_out_c6_hi1_1_scanin[25] | |
| 12472 | // ff_l2d_decc_out_c6_hi1_3_scanin[25] | |
| 12473 | // ff_l2d_decc_out_c6_lo0_1_scanin[26] | |
| 12474 | // ff_l2d_decc_out_c6_lo0_3_scanin[26] | |
| 12475 | // ff_l2d_decc_out_c6_hi0_1_scanin[26] | |
| 12476 | // ff_l2d_decc_out_c6_hi0_3_scanin[26] | |
| 12477 | // ff_l2d_decc_out_c6_lo1_1_scanin[26] | |
| 12478 | // ff_l2d_decc_out_c6_lo1_3_scanin[26] | |
| 12479 | // ff_l2d_decc_out_c6_hi1_1_scanin[26] | |
| 12480 | // ff_l2d_decc_out_c6_hi1_3_scanin[26] | |
| 12481 | // ff_l2d_decc_out_c6_lo0_1_scanin[27] | |
| 12482 | // ff_l2d_decc_out_c6_lo0_3_scanin[27] | |
| 12483 | // ff_l2d_decc_out_c6_hi0_1_scanin[27] | |
| 12484 | // ff_l2d_decc_out_c6_hi0_3_scanin[27] | |
| 12485 | // ff_l2d_decc_out_c6_lo1_1_scanin[27] | |
| 12486 | // ff_l2d_decc_out_c6_lo1_3_scanin[27] | |
| 12487 | // ff_l2d_decc_out_c6_hi1_1_scanin[27] | |
| 12488 | // ff_l2d_decc_out_c6_hi1_3_scanin[27] | |
| 12489 | // ff_l2d_decc_out_c6_lo0_1_scanin[28] | |
| 12490 | // ff_l2d_decc_out_c6_lo0_3_scanin[28] | |
| 12491 | // ff_l2d_decc_out_c6_hi0_1_scanin[28] | |
| 12492 | // ff_l2d_decc_out_c6_hi0_3_scanin[28] | |
| 12493 | // ff_l2d_decc_out_c6_lo1_1_scanin[28] | |
| 12494 | // ff_l2d_decc_out_c6_lo1_3_scanin[28] | |
| 12495 | // ff_l2d_decc_out_c6_hi1_1_scanin[28] | |
| 12496 | // ff_l2d_decc_out_c6_hi1_3_scanin[28] | |
| 12497 | // ff_l2d_decc_out_c6_lo0_1_scanin[29] | |
| 12498 | // ff_l2d_decc_out_c6_lo0_3_scanin[29] | |
| 12499 | ||
| 12500 | // ff_l2d_decc_out_c6_hi0_1_scanin[29] | |
| 12501 | // ff_l2d_decc_out_c6_hi0_3_scanin[29] | |
| 12502 | // ff_l2d_decc_out_c6_lo1_1_scanin[29] | |
| 12503 | // ff_l2d_decc_out_c6_lo1_3_scanin[29] | |
| 12504 | // ff_l2d_decc_out_c6_hi1_1_scanin[29] | |
| 12505 | // ff_l2d_decc_out_c6_hi1_3_scanin[29] | |
| 12506 | // ff_l2d_decc_out_c6_lo0_1_scanin[30] | |
| 12507 | // ff_l2d_decc_out_c6_lo0_3_scanin[30] | |
| 12508 | // ff_l2d_decc_out_c6_hi0_1_scanin[30] | |
| 12509 | // ff_l2d_decc_out_c6_hi0_3_scanin[30] | |
| 12510 | // ff_l2d_decc_out_c6_lo1_1_scanin[30] | |
| 12511 | // ff_l2d_decc_out_c6_lo1_3_scanin[30] | |
| 12512 | // ff_l2d_decc_out_c6_hi1_1_scanin[30] | |
| 12513 | // ff_l2d_decc_out_c6_hi1_3_scanin[30] | |
| 12514 | // ff_l2d_decc_out_c6_lo0_1_scanin[31] | |
| 12515 | // ff_l2d_decc_out_c6_lo0_3_scanin[31] | |
| 12516 | // ff_l2d_decc_out_c6_hi0_1_scanin[31] | |
| 12517 | // ff_l2d_decc_out_c6_hi0_3_scanin[31] | |
| 12518 | // ff_l2d_decc_out_c6_lo1_1_scanin[31] | |
| 12519 | // ff_l2d_decc_out_c6_lo1_3_scanin[31] | |
| 12520 | // ff_l2d_decc_out_c6_hi1_1_scanin[31] | |
| 12521 | // ff_l2d_decc_out_c6_hi1_3_scanin[31] | |
| 12522 | // ff_l2d_decc_out_c6_lo0_1_scanin[32] | |
| 12523 | // ff_l2d_decc_out_c6_lo0_3_scanin[32] | |
| 12524 | // ff_l2d_decc_out_c6_hi0_1_scanin[32] | |
| 12525 | // ff_l2d_decc_out_c6_hi0_3_scanin[32] | |
| 12526 | // ff_l2d_decc_out_c6_lo1_1_scanin[32] | |
| 12527 | // ff_l2d_decc_out_c6_lo1_3_scanin[32] | |
| 12528 | // ff_l2d_decc_out_c6_hi1_1_scanin[32] | |
| 12529 | // ff_l2d_decc_out_c6_hi1_3_scanin[32] | |
| 12530 | // ff_l2d_decc_out_c6_lo0_1_scanin[33] | |
| 12531 | // ff_l2d_decc_out_c6_lo0_3_scanin[33] | |
| 12532 | // ff_l2d_decc_out_c6_hi0_1_scanin[33] | |
| 12533 | // ff_l2d_decc_out_c6_hi0_3_scanin[33] | |
| 12534 | // ff_l2d_decc_out_c6_lo1_1_scanin[33] | |
| 12535 | // ff_l2d_decc_out_c6_lo1_3_scanin[33] | |
| 12536 | // ff_l2d_decc_out_c6_hi1_1_scanin[33] | |
| 12537 | // ff_l2d_decc_out_c6_hi1_3_scanin[33] | |
| 12538 | // ff_l2d_decc_out_c6_lo0_1_scanin[34] | |
| 12539 | // ff_l2d_decc_out_c6_lo0_3_scanin[34] | |
| 12540 | // ff_l2d_decc_out_c6_hi0_1_scanin[34] | |
| 12541 | // ff_l2d_decc_out_c6_hi0_3_scanin[34] | |
| 12542 | // ff_l2d_decc_out_c6_lo1_1_scanin[34] | |
| 12543 | // ff_l2d_decc_out_c6_lo1_3_scanin[34] | |
| 12544 | // ff_l2d_decc_out_c6_hi1_1_scanin[34] | |
| 12545 | // ff_l2d_decc_out_c6_hi1_3_scanin[34] | |
| 12546 | // ff_l2d_decc_out_c6_lo0_1_scanin[35] | |
| 12547 | // ff_l2d_decc_out_c6_lo0_3_scanin[35] | |
| 12548 | // ff_l2d_decc_out_c6_hi0_1_scanin[35] | |
| 12549 | // ff_l2d_decc_out_c6_hi0_3_scanin[35] | |
| 12550 | // ff_l2d_decc_out_c6_lo1_1_scanin[35] | |
| 12551 | // ff_l2d_decc_out_c6_lo1_3_scanin[35] | |
| 12552 | // ff_l2d_decc_out_c6_hi1_1_scanin[35] | |
| 12553 | // ff_l2d_decc_out_c6_hi1_3_scanin[35] | |
| 12554 | // ff_l2d_decc_out_c6_lo0_1_scanin[36] | |
| 12555 | // ff_l2d_decc_out_c6_lo0_3_scanin[36] | |
| 12556 | // ff_l2d_decc_out_c6_hi0_1_scanin[36] | |
| 12557 | // ff_l2d_decc_out_c6_hi0_3_scanin[36] | |
| 12558 | // ff_l2d_decc_out_c6_lo1_1_scanin[36] | |
| 12559 | // ff_l2d_decc_out_c6_lo1_3_scanin[36] | |
| 12560 | // ff_l2d_decc_out_c6_hi1_1_scanin[36] | |
| 12561 | // ff_l2d_decc_out_c6_hi1_3_scanin[36] | |
| 12562 | // ff_l2d_decc_out_c6_lo0_1_scanin[37] | |
| 12563 | // ff_l2d_decc_out_c6_lo0_3_scanin[37] | |
| 12564 | // ff_l2d_decc_out_c6_hi0_1_scanin[37] | |
| 12565 | // ff_l2d_decc_out_c6_hi0_3_scanin[37] | |
| 12566 | // ff_l2d_decc_out_c6_lo1_1_scanin[37] | |
| 12567 | // ff_l2d_decc_out_c6_lo1_3_scanin[37] | |
| 12568 | // ff_l2d_decc_out_c6_hi1_1_scanin[37] | |
| 12569 | // ff_l2d_decc_out_c6_hi1_3_scanin[37] | |
| 12570 | // ff_l2d_decc_out_c6_lo0_1_scanin[38] | |
| 12571 | // ff_l2d_decc_out_c6_lo0_3_scanin[38] | |
| 12572 | // ff_l2d_decc_out_c6_hi0_1_scanin[38] | |
| 12573 | // ff_l2d_decc_out_c6_hi0_3_scanin[38] | |
| 12574 | // ff_l2d_decc_out_c6_lo1_1_scanin[38] | |
| 12575 | // ff_l2d_decc_out_c6_lo1_3_scanin[38] | |
| 12576 | // ff_l2d_decc_out_c6_hi1_1_scanin[38] | |
| 12577 | // ff_l2d_decc_out_c6_hi1_3_scanin[38] | |
| 12578 | ||
| 12579 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[0] | |
| 12580 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[0] | |
| 12581 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[0] | |
| 12582 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[0] | |
| 12583 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[1] | |
| 12584 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[1] | |
| 12585 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[1] | |
| 12586 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[1] | |
| 12587 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[2] | |
| 12588 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[2] | |
| 12589 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[2] | |
| 12590 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[2] | |
| 12591 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[3] | |
| 12592 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[3] | |
| 12593 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[3] | |
| 12594 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[3] | |
| 12595 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[4] | |
| 12596 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[4] | |
| 12597 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[4] | |
| 12598 | ||
| 12599 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[9] | |
| 12600 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[9] | |
| 12601 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[9] | |
| 12602 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[8] | |
| 12603 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[8] | |
| 12604 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[8] | |
| 12605 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[8] | |
| 12606 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[7] | |
| 12607 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[7] | |
| 12608 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[7] | |
| 12609 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[7] | |
| 12610 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[6] | |
| 12611 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[6] | |
| 12612 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[6] | |
| 12613 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[6] | |
| 12614 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[5] | |
| 12615 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[5] | |
| 12616 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[5] | |
| 12617 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[5] | |
| 12618 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[4] | |
| 12619 | ||
| 12620 | // ff_cache_col_offset_c5_001_scanin[0] | |
| 12621 | // ff_cache_col_offset_c5_001_scanin[2] | |
| 12622 | // ff_cache_col_offset_c4_001_scanin[0] | |
| 12623 | // ff_cache_col_offset_c4_001_scanin[2] | |
| 12624 | // ff_cache_col_offset_c4_tog_001_scanin[0] | |
| 12625 | // ff_cache_cache_rd_wr_c5_00_scanin | |
| 12626 | // ff_cache_col_offset_c5_001_scanin[1] | |
| 12627 | // ff_cache_col_offset_c5_001_scanin[3] | |
| 12628 | // ff_cache_col_offset_c4_001_scanin[1] | |
| 12629 | // ff_cache_col_offset_c4_001_scanin[3] | |
| 12630 | // ff_cache_col_offset_c4_tog_001_scanin[1] | |
| 12631 | ||
| 12632 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[19] | |
| 12633 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[19] | |
| 12634 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[18] | |
| 12635 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[18] | |
| 12636 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[18] | |
| 12637 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[18] | |
| 12638 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[17] | |
| 12639 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[17] | |
| 12640 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[17] | |
| 12641 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[17] | |
| 12642 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[16] | |
| 12643 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[16] | |
| 12644 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[16] | |
| 12645 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[16] | |
| 12646 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[15] | |
| 12647 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[15] | |
| 12648 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[15] | |
| 12649 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[15] | |
| 12650 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[14] | |
| 12651 | ||
| 12652 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[9] | |
| 12653 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[10] | |
| 12654 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[10] | |
| 12655 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[10] | |
| 12656 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[10] | |
| 12657 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[11] | |
| 12658 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[11] | |
| 12659 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[11] | |
| 12660 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[11] | |
| 12661 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[12] | |
| 12662 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[12] | |
| 12663 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[12] | |
| 12664 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[12] | |
| 12665 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[13] | |
| 12666 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[13] | |
| 12667 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[13] | |
| 12668 | // ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[13] | |
| 12669 | // ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[14] | |
| 12670 | // ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[14] | |
| 12671 | // ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[14] | |
| 12672 | ||
| 12673 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[19] | |
| 12674 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[19] | |
| 12675 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[18] | |
| 12676 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[18] | |
| 12677 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[18] | |
| 12678 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[18] | |
| 12679 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[17] | |
| 12680 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[17] | |
| 12681 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[17] | |
| 12682 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[17] | |
| 12683 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[16] | |
| 12684 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[16] | |
| 12685 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[16] | |
| 12686 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[16] | |
| 12687 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[15] | |
| 12688 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[15] | |
| 12689 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[15] | |
| 12690 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[15] | |
| 12691 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[14] | |
| 12692 | ||
| 12693 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[9] | |
| 12694 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[10] | |
| 12695 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[10] | |
| 12696 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[10] | |
| 12697 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[10] | |
| 12698 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[11] | |
| 12699 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[11] | |
| 12700 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[11] | |
| 12701 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[11] | |
| 12702 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[12] | |
| 12703 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[12] | |
| 12704 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[12] | |
| 12705 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[12] | |
| 12706 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[13] | |
| 12707 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[13] | |
| 12708 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[13] | |
| 12709 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[13] | |
| 12710 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[14] | |
| 12711 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[14] | |
| 12712 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[14] | |
| 12713 | ||
| 12714 | ||
| 12715 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[0] | |
| 12716 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[0] | |
| 12717 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[0] | |
| 12718 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[0] | |
| 12719 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[1] | |
| 12720 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[1] | |
| 12721 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[1] | |
| 12722 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[1] | |
| 12723 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[2] | |
| 12724 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[2] | |
| 12725 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[2] | |
| 12726 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[2] | |
| 12727 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[3] | |
| 12728 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[3] | |
| 12729 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[3] | |
| 12730 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[3] | |
| 12731 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[4] | |
| 12732 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[4] | |
| 12733 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[4] | |
| 12734 | ||
| 12735 | ||
| 12736 | ||
| 12737 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[9] | |
| 12738 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[9] | |
| 12739 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[9] | |
| 12740 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[8] | |
| 12741 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[8] | |
| 12742 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[8] | |
| 12743 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[8] | |
| 12744 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[7] | |
| 12745 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[7] | |
| 12746 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[7] | |
| 12747 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[7] | |
| 12748 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[6] | |
| 12749 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[6] | |
| 12750 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[6] | |
| 12751 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[6] | |
| 12752 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[5] | |
| 12753 | // ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[5] | |
| 12754 | // ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[5] | |
| 12755 | // ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[5] | |
| 12756 | // ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[4] | |
| 12757 | ||
| 12758 | ||
| 12759 | // ff_l2d_decc_out_c6_lo0_1_scanin[0] | |
| 12760 | // ff_l2d_decc_out_c6_lo0_3_scanin[0] | |
| 12761 | // ff_l2d_decc_out_c6_hi0_1_scanin[0] | |
| 12762 | // ff_l2d_decc_out_c6_hi0_3_scanin[0] | |
| 12763 | // ff_l2d_decc_out_c6_lo1_1_scanin[0] | |
| 12764 | // ff_l2d_decc_out_c6_lo1_3_scanin[0] | |
| 12765 | // ff_l2d_decc_out_c6_hi1_1_scanin[0] | |
| 12766 | // ff_l2d_decc_out_c6_hi1_3_scanin[0] | |
| 12767 | // ff_l2d_decc_out_c6_lo0_1_scanin[1] | |
| 12768 | // ff_l2d_decc_out_c6_lo0_3_scanin[1] | |
| 12769 | // ff_l2d_decc_out_c6_hi0_1_scanin[1] | |
| 12770 | // ff_l2d_decc_out_c6_hi0_3_scanin[1] | |
| 12771 | // ff_l2d_decc_out_c6_lo1_1_scanin[1] | |
| 12772 | // ff_l2d_decc_out_c6_lo1_3_scanin[1] | |
| 12773 | // ff_l2d_decc_out_c6_hi1_1_scanin[1] | |
| 12774 | // ff_l2d_decc_out_c6_hi1_3_scanin[1] | |
| 12775 | // ff_l2d_decc_out_c6_lo0_1_scanin[2] | |
| 12776 | // ff_l2d_decc_out_c6_lo0_3_scanin[2] | |
| 12777 | // ff_l2d_decc_out_c6_hi0_1_scanin[2] | |
| 12778 | // ff_l2d_decc_out_c6_hi0_3_scanin[2] | |
| 12779 | // ff_l2d_decc_out_c6_lo1_1_scanin[2] | |
| 12780 | // ff_l2d_decc_out_c6_lo1_3_scanin[2] | |
| 12781 | // ff_l2d_decc_out_c6_hi1_1_scanin[2] | |
| 12782 | // ff_l2d_decc_out_c6_hi1_3_scanin[2] | |
| 12783 | // ff_l2d_decc_out_c6_lo0_1_scanin[3] | |
| 12784 | // ff_l2d_decc_out_c6_lo0_3_scanin[3] | |
| 12785 | // ff_l2d_decc_out_c6_hi0_1_scanin[3] | |
| 12786 | // ff_l2d_decc_out_c6_hi0_3_scanin[3] | |
| 12787 | // ff_l2d_decc_out_c6_lo1_1_scanin[3] | |
| 12788 | // ff_l2d_decc_out_c6_lo1_3_scanin[3] | |
| 12789 | // ff_l2d_decc_out_c6_hi1_1_scanin[3] | |
| 12790 | // ff_l2d_decc_out_c6_hi1_3_scanin[3] | |
| 12791 | // ff_l2d_decc_out_c6_lo0_1_scanin[4] | |
| 12792 | // ff_l2d_decc_out_c6_lo0_3_scanin[4] | |
| 12793 | // ff_l2d_decc_out_c6_hi0_1_scanin[4] | |
| 12794 | // ff_l2d_decc_out_c6_hi0_3_scanin[4] | |
| 12795 | // ff_l2d_decc_out_c6_lo1_1_scanin[4] | |
| 12796 | // ff_l2d_decc_out_c6_lo1_3_scanin[4] | |
| 12797 | // ff_l2d_decc_out_c6_hi1_1_scanin[4] | |
| 12798 | // ff_l2d_decc_out_c6_hi1_3_scanin[4] | |
| 12799 | // ff_l2d_decc_out_c6_lo0_1_scanin[5] | |
| 12800 | // ff_l2d_decc_out_c6_lo0_3_scanin[5] | |
| 12801 | // ff_l2d_decc_out_c6_hi0_1_scanin[5] | |
| 12802 | // ff_l2d_decc_out_c6_hi0_3_scanin[5] | |
| 12803 | // ff_l2d_decc_out_c6_lo1_1_scanin[5] | |
| 12804 | // ff_l2d_decc_out_c6_lo1_3_scanin[5] | |
| 12805 | // ff_l2d_decc_out_c6_hi1_1_scanin[5] | |
| 12806 | // ff_l2d_decc_out_c6_hi1_3_scanin[5] | |
| 12807 | // ff_l2d_decc_out_c6_lo0_1_scanin[6] | |
| 12808 | // ff_l2d_decc_out_c6_lo0_3_scanin[6] | |
| 12809 | // ff_l2d_decc_out_c6_hi0_1_scanin[6] | |
| 12810 | // ff_l2d_decc_out_c6_hi0_3_scanin[6] | |
| 12811 | // ff_l2d_decc_out_c6_lo1_1_scanin[6] | |
| 12812 | // ff_l2d_decc_out_c6_lo1_3_scanin[6] | |
| 12813 | // ff_l2d_decc_out_c6_hi1_1_scanin[6] | |
| 12814 | // ff_l2d_decc_out_c6_hi1_3_scanin[6] | |
| 12815 | // ff_l2d_decc_out_c6_lo0_1_scanin[7] | |
| 12816 | // ff_l2d_decc_out_c6_lo0_3_scanin[7] | |
| 12817 | // ff_l2d_decc_out_c6_hi0_1_scanin[7] | |
| 12818 | // ff_l2d_decc_out_c6_hi0_3_scanin[7] | |
| 12819 | // ff_l2d_decc_out_c6_lo1_1_scanin[7] | |
| 12820 | // ff_l2d_decc_out_c6_lo1_3_scanin[7] | |
| 12821 | // ff_l2d_decc_out_c6_hi1_1_scanin[7] | |
| 12822 | // ff_l2d_decc_out_c6_hi1_3_scanin[7] | |
| 12823 | // ff_l2d_decc_out_c6_lo0_1_scanin[8] | |
| 12824 | // ff_l2d_decc_out_c6_lo0_3_scanin[8] | |
| 12825 | // ff_l2d_decc_out_c6_hi0_1_scanin[8] | |
| 12826 | // ff_l2d_decc_out_c6_hi0_3_scanin[8] | |
| 12827 | // ff_l2d_decc_out_c6_lo1_1_scanin[8] | |
| 12828 | // ff_l2d_decc_out_c6_lo1_3_scanin[8] | |
| 12829 | // ff_l2d_decc_out_c6_hi1_1_scanin[8] | |
| 12830 | // ff_l2d_decc_out_c6_hi1_3_scanin[8] | |
| 12831 | // ff_l2d_decc_out_c6_lo0_1_scanin[9] | |
| 12832 | // ff_l2d_decc_out_c6_lo0_3_scanin[9] | |
| 12833 | // ff_l2d_decc_out_c6_hi0_1_scanin[9] | |
| 12834 | // ff_l2d_decc_out_c6_hi0_3_scanin[9] | |
| 12835 | // ff_l2d_decc_out_c6_lo1_1_scanin[9] | |
| 12836 | // ff_l2d_decc_out_c6_lo1_3_scanin[9] | |
| 12837 | // ff_l2d_decc_out_c6_hi1_1_scanin[9] | |
| 12838 | // ff_l2d_decc_out_c6_hi1_3_scanin[9] | |
| 12839 | ||
| 12840 | // ff_l2d_decc_out_c6_lo0_1_scanin[10] | |
| 12841 | // ff_l2d_decc_out_c6_lo0_3_scanin[10] | |
| 12842 | // ff_l2d_decc_out_c6_hi0_1_scanin[10] | |
| 12843 | // ff_l2d_decc_out_c6_hi0_3_scanin[10] | |
| 12844 | // ff_l2d_decc_out_c6_lo1_1_scanin[10] | |
| 12845 | // ff_l2d_decc_out_c6_lo1_3_scanin[10] | |
| 12846 | // ff_l2d_decc_out_c6_hi1_1_scanin[10] | |
| 12847 | // ff_l2d_decc_out_c6_hi1_3_scanin[10] | |
| 12848 | // ff_l2d_decc_out_c6_lo0_1_scanin[11] | |
| 12849 | // ff_l2d_decc_out_c6_lo0_3_scanin[11] | |
| 12850 | // ff_l2d_decc_out_c6_hi0_1_scanin[11] | |
| 12851 | // ff_l2d_decc_out_c6_hi0_3_scanin[11] | |
| 12852 | // ff_l2d_decc_out_c6_lo1_1_scanin[11] | |
| 12853 | // ff_l2d_decc_out_c6_lo1_3_scanin[11] | |
| 12854 | // ff_l2d_decc_out_c6_hi1_1_scanin[11] | |
| 12855 | // ff_l2d_decc_out_c6_hi1_3_scanin[11] | |
| 12856 | // ff_l2d_decc_out_c6_lo0_1_scanin[12] | |
| 12857 | // ff_l2d_decc_out_c6_lo0_3_scanin[12] | |
| 12858 | // ff_l2d_decc_out_c6_hi0_1_scanin[12] | |
| 12859 | // ff_l2d_decc_out_c6_hi0_3_scanin[12] | |
| 12860 | // ff_l2d_decc_out_c6_lo1_1_scanin[12] | |
| 12861 | // ff_l2d_decc_out_c6_lo1_3_scanin[12] | |
| 12862 | // ff_l2d_decc_out_c6_hi1_1_scanin[12] | |
| 12863 | // ff_l2d_decc_out_c6_hi1_3_scanin[12] | |
| 12864 | // ff_l2d_decc_out_c6_lo0_1_scanin[13] | |
| 12865 | // ff_l2d_decc_out_c6_lo0_3_scanin[13] | |
| 12866 | // ff_l2d_decc_out_c6_hi0_1_scanin[13] | |
| 12867 | // ff_l2d_decc_out_c6_hi0_3_scanin[13] | |
| 12868 | // ff_l2d_decc_out_c6_lo1_1_scanin[13] | |
| 12869 | // ff_l2d_decc_out_c6_lo1_3_scanin[13] | |
| 12870 | // ff_l2d_decc_out_c6_hi1_1_scanin[13] | |
| 12871 | // ff_l2d_decc_out_c6_hi1_3_scanin[13] | |
| 12872 | // ff_l2d_decc_out_c6_lo0_1_scanin[14] | |
| 12873 | // ff_l2d_decc_out_c6_lo0_3_scanin[14] | |
| 12874 | // ff_l2d_decc_out_c6_hi0_1_scanin[14] | |
| 12875 | // ff_l2d_decc_out_c6_hi0_3_scanin[14] | |
| 12876 | // ff_l2d_decc_out_c6_lo1_1_scanin[14] | |
| 12877 | // ff_l2d_decc_out_c6_lo1_3_scanin[14] | |
| 12878 | // ff_l2d_decc_out_c6_hi1_1_scanin[14] | |
| 12879 | // ff_l2d_decc_out_c6_hi1_3_scanin[14] | |
| 12880 | // ff_l2d_decc_out_c6_lo0_1_scanin[15] | |
| 12881 | // ff_l2d_decc_out_c6_lo0_3_scanin[15] | |
| 12882 | // ff_l2d_decc_out_c6_hi0_1_scanin[15] | |
| 12883 | // ff_l2d_decc_out_c6_hi0_3_scanin[15] | |
| 12884 | // ff_l2d_decc_out_c6_lo1_1_scanin[15] | |
| 12885 | // ff_l2d_decc_out_c6_lo1_3_scanin[15] | |
| 12886 | // ff_l2d_decc_out_c6_hi1_1_scanin[15] | |
| 12887 | // ff_l2d_decc_out_c6_hi1_3_scanin[15] | |
| 12888 | // ff_l2d_decc_out_c6_lo0_1_scanin[16] | |
| 12889 | // ff_l2d_decc_out_c6_lo0_3_scanin[16] | |
| 12890 | // ff_l2d_decc_out_c6_hi0_1_scanin[16] | |
| 12891 | // ff_l2d_decc_out_c6_hi0_3_scanin[16] | |
| 12892 | // ff_l2d_decc_out_c6_lo1_1_scanin[16] | |
| 12893 | // ff_l2d_decc_out_c6_lo1_3_scanin[16] | |
| 12894 | // ff_l2d_decc_out_c6_hi1_1_scanin[16] | |
| 12895 | // ff_l2d_decc_out_c6_hi1_3_scanin[16] | |
| 12896 | // ff_l2d_decc_out_c6_lo0_1_scanin[17] | |
| 12897 | // ff_l2d_decc_out_c6_lo0_3_scanin[17] | |
| 12898 | // ff_l2d_decc_out_c6_hi0_1_scanin[17] | |
| 12899 | // ff_l2d_decc_out_c6_hi0_3_scanin[17] | |
| 12900 | // ff_l2d_decc_out_c6_lo1_1_scanin[17] | |
| 12901 | // ff_l2d_decc_out_c6_lo1_3_scanin[17] | |
| 12902 | // ff_l2d_decc_out_c6_hi1_1_scanin[17] | |
| 12903 | // ff_l2d_decc_out_c6_hi1_3_scanin[17] | |
| 12904 | // ff_l2d_decc_out_c6_lo0_1_scanin[18] | |
| 12905 | // ff_l2d_decc_out_c6_lo0_3_scanin[18] | |
| 12906 | // ff_l2d_decc_out_c6_hi0_1_scanin[18] | |
| 12907 | // ff_l2d_decc_out_c6_hi0_3_scanin[18] | |
| 12908 | // ff_l2d_decc_out_c6_lo1_1_scanin[18] | |
| 12909 | // ff_l2d_decc_out_c6_lo1_3_scanin[18] | |
| 12910 | // ff_l2d_decc_out_c6_hi1_1_scanin[18] | |
| 12911 | // ff_l2d_decc_out_c6_hi1_3_scanin[18] | |
| 12912 | // ff_l2d_decc_out_c6_lo0_1_scanin[19] | |
| 12913 | // ff_l2d_decc_out_c6_lo0_3_scanin[19] | |
| 12914 | // ff_l2d_decc_out_c6_hi0_1_scanin[19] | |
| 12915 | // ff_l2d_decc_out_c6_hi0_3_scanin[19] | |
| 12916 | // scanorder end | |
| 12917 | // fixscan start | |
| 12918 | assign ff_cache_cache_rd_wr_c4_scanin=scan_in; | |
| 12919 | assign ff_cache_set_c3_scanin[8]=ff_cache_cache_rd_wr_c4_scanout; | |
| 12920 | assign ff_cache_set_c3_scanin[7]=ff_cache_set_c3_scanout[8]; | |
| 12921 | assign ff_cache_set_c3_scanin[6]=ff_cache_set_c3_scanout[7]; | |
| 12922 | assign ff_cache_set_c3_scanin[5]=ff_cache_set_c3_scanout[6]; | |
| 12923 | assign ff_cache_set_c3_scanin[4]=ff_cache_set_c3_scanout[5]; | |
| 12924 | assign ff_cache_set_c3_scanin[3]=ff_cache_set_c3_scanout[4]; | |
| 12925 | assign ff_cache_set_c3_scanin[2]=ff_cache_set_c3_scanout[3]; | |
| 12926 | assign ff_cache_set_c3_scanin[1]=ff_cache_set_c3_scanout[2]; | |
| 12927 | assign ff_cache_set_c3_scanin[0]=ff_cache_set_c3_scanout[1]; | |
| 12928 | assign ff_cache_word_en_c3_scanin[1]=ff_cache_set_c3_scanout[0]; | |
| 12929 | assign ff_cache_word_en_c3_scanin[3]=ff_cache_word_en_c3_scanout[1]; | |
| 12930 | assign ff_cache_word_en_c3_scanin[5]=ff_cache_word_en_c3_scanout[3]; | |
| 12931 | assign ff_cache_word_en_c3_scanin[7]=ff_cache_word_en_c3_scanout[5]; | |
| 12932 | assign ff_cache_word_en_c3_scanin[9]=ff_cache_word_en_c3_scanout[7]; | |
| 12933 | assign ff_cache_word_en_c3_scanin[11]=ff_cache_word_en_c3_scanout[9]; | |
| 12934 | assign ff_cache_word_en_c3_scanin[13]=ff_cache_word_en_c3_scanout[11]; | |
| 12935 | assign ff_cache_word_en_c3_scanin[15]=ff_cache_word_en_c3_scanout[13]; | |
| 12936 | assign ff_cache_col_offset_c3_scanin[0]=ff_cache_word_en_c3_scanout[15]; | |
| 12937 | assign ff_cache_col_offset_c4_scanin[0]=ff_cache_col_offset_c3_scanout[0]; | |
| 12938 | assign ff_cache_col_offset_c5_muxsel_scanin[0]=ff_cache_col_offset_c4_scanout[0]; | |
| 12939 | assign ff_cache_col_offset_c5_muxsel_scanin[1]=ff_cache_col_offset_c5_muxsel_scanout[0]; | |
| 12940 | assign ff_cache_col_offset_c4_scanin[1]=ff_cache_col_offset_c5_muxsel_scanout[1]; | |
| 12941 | assign ff_cache_col_offset_c3_scanin[1]=ff_cache_col_offset_c4_scanout[1]; | |
| 12942 | assign ff_cache_col_offset_c3_scanin[2]=ff_cache_col_offset_c3_scanout[1]; | |
| 12943 | assign ff_cache_col_offset_c4_scanin[2]=ff_cache_col_offset_c3_scanout[2]; | |
| 12944 | assign ff_cache_col_offset_c5_muxsel_scanin[2]=ff_cache_col_offset_c4_scanout[2]; | |
| 12945 | assign ff_cache_col_offset_c5_muxsel_scanin[3]=ff_cache_col_offset_c5_muxsel_scanout[2]; | |
| 12946 | assign ff_cache_col_offset_c4_scanin[3]=ff_cache_col_offset_c5_muxsel_scanout[3]; | |
| 12947 | assign ff_cache_col_offset_c3_scanin[3]=ff_cache_col_offset_c4_scanout[3]; | |
| 12948 | assign ff_cache_col_offset_all_c4_scanin=ff_cache_col_offset_c3_scanout[3]; | |
| 12949 | assign ff_cache_col_offset_all_c5_scanin=ff_cache_col_offset_all_c4_scanout; | |
| 12950 | assign ff_cache_col_offset_all_c6_scanin=ff_cache_col_offset_all_c5_scanout; | |
| 12951 | assign ff_cache_col_offset_all_c7_scanin=ff_cache_col_offset_all_c6_scanout; | |
| 12952 | assign ff_cache_word_en_c3_scanin[0]=ff_cache_col_offset_all_c7_scanout; | |
| 12953 | assign ff_cache_word_en_c3_scanin[2]=ff_cache_word_en_c3_scanout[0]; | |
| 12954 | assign ff_cache_word_en_c3_scanin[4]=ff_cache_word_en_c3_scanout[2]; | |
| 12955 | assign ff_cache_word_en_c3_scanin[6]=ff_cache_word_en_c3_scanout[4]; | |
| 12956 | assign ff_cache_word_en_c3_scanin[8]=ff_cache_word_en_c3_scanout[6]; | |
| 12957 | assign ff_cache_word_en_c3_scanin[10]=ff_cache_word_en_c3_scanout[8]; | |
| 12958 | assign ff_cache_word_en_c3_scanin[12]=ff_cache_word_en_c3_scanout[10]; | |
| 12959 | assign ff_cache_word_en_c3_scanin[14]=ff_cache_word_en_c3_scanout[12]; | |
| 12960 | assign ff_cache_col_offset_c52_scanin[1]=ff_cache_word_en_c3_scanout[14]; | |
| 12961 | assign ff_cache_col_offset_c52_scanin[0]=ff_cache_col_offset_c52_scanout[1]; | |
| 12962 | assign ff_cache_col_offset_c52_topsel_scanin=ff_cache_col_offset_c52_scanout[0]; | |
| 12963 | assign ff_cache_fb_hit_c4_scanin=ff_cache_col_offset_c52_topsel_scanout; | |
| 12964 | assign ff_cache_fb_hit_c5_scanin=ff_cache_fb_hit_c4_scanout; | |
| 12965 | assign ff_cache_fb_hit_c52_scanin=ff_cache_fb_hit_c5_scanout; | |
| 12966 | assign ff_cache_sel_fbdecc_c4_scanin=ff_cache_fb_hit_c52_scanout; | |
| 12967 | assign ff_cache_sel_fbdecc_c5_scanin=ff_cache_sel_fbdecc_c4_scanout; | |
| 12968 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[0]=ff_cache_sel_fbdecc_c5_scanout; | |
| 12969 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[0]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[0]; | |
| 12970 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[0]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[0]; | |
| 12971 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[0]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[0]; | |
| 12972 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[1]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[0]; | |
| 12973 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[1]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[1]; | |
| 12974 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[1]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[1]; | |
| 12975 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[1]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[1]; | |
| 12976 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[2]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[1]; | |
| 12977 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[2]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[2]; | |
| 12978 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[2]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[2]; | |
| 12979 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[2]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[2]; | |
| 12980 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[3]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[2]; | |
| 12981 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[3]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[3]; | |
| 12982 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[3]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[3]; | |
| 12983 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[3]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[3]; | |
| 12984 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[4]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[3]; | |
| 12985 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[4]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[4]; | |
| 12986 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[4]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[4]; | |
| 12987 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[9]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[4]; | |
| 12988 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[9]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[9]; | |
| 12989 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[9]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[9]; | |
| 12990 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[8]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[9]; | |
| 12991 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[8]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[8]; | |
| 12992 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[8]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[8]; | |
| 12993 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[8]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[8]; | |
| 12994 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[7]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[8]; | |
| 12995 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[7]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[7]; | |
| 12996 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[7]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[7]; | |
| 12997 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[7]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[7]; | |
| 12998 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[6]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[7]; | |
| 12999 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[6]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[6]; | |
| 13000 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[6]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[6]; | |
| 13001 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[6]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[6]; | |
| 13002 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[5]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[6]; | |
| 13003 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[5]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[5]; | |
| 13004 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[5]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[5]; | |
| 13005 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[5]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[5]; | |
| 13006 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[4]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[5]; | |
| 13007 | assign ff_l2t_l2d_stdecc_c3_scanin[77]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[4]; | |
| 13008 | assign ff_l2t_l2d_stdecc_c3_scanin[76]=ff_l2t_l2d_stdecc_c3_scanout[77]; | |
| 13009 | assign ff_l2t_l2d_stdecc_c3_scanin[75]=ff_l2t_l2d_stdecc_c3_scanout[76]; | |
| 13010 | assign ff_l2t_l2d_stdecc_c3_scanin[74]=ff_l2t_l2d_stdecc_c3_scanout[75]; | |
| 13011 | assign ff_l2t_l2d_stdecc_c3_scanin[73]=ff_l2t_l2d_stdecc_c3_scanout[74]; | |
| 13012 | assign ff_l2t_l2d_stdecc_c3_scanin[72]=ff_l2t_l2d_stdecc_c3_scanout[73]; | |
| 13013 | assign ff_l2t_l2d_stdecc_c3_scanin[71]=ff_l2t_l2d_stdecc_c3_scanout[72]; | |
| 13014 | assign ff_l2t_l2d_stdecc_c3_scanin[70]=ff_l2t_l2d_stdecc_c3_scanout[71]; | |
| 13015 | assign ff_l2t_l2d_stdecc_c3_scanin[69]=ff_l2t_l2d_stdecc_c3_scanout[70]; | |
| 13016 | assign ff_l2t_l2d_stdecc_c3_scanin[68]=ff_l2t_l2d_stdecc_c3_scanout[69]; | |
| 13017 | assign ff_l2t_l2d_stdecc_c3_scanin[67]=ff_l2t_l2d_stdecc_c3_scanout[68]; | |
| 13018 | assign ff_l2t_l2d_stdecc_c3_scanin[66]=ff_l2t_l2d_stdecc_c3_scanout[67]; | |
| 13019 | assign ff_l2t_l2d_stdecc_c3_scanin[65]=ff_l2t_l2d_stdecc_c3_scanout[66]; | |
| 13020 | assign ff_l2t_l2d_stdecc_c3_scanin[64]=ff_l2t_l2d_stdecc_c3_scanout[65]; | |
| 13021 | assign ff_l2t_l2d_stdecc_c3_scanin[63]=ff_l2t_l2d_stdecc_c3_scanout[64]; | |
| 13022 | assign ff_l2t_l2d_stdecc_c3_scanin[62]=ff_l2t_l2d_stdecc_c3_scanout[63]; | |
| 13023 | assign ff_l2t_l2d_stdecc_c3_scanin[61]=ff_l2t_l2d_stdecc_c3_scanout[62]; | |
| 13024 | assign ff_l2t_l2d_stdecc_c3_scanin[60]=ff_l2t_l2d_stdecc_c3_scanout[61]; | |
| 13025 | assign ff_l2t_l2d_stdecc_c3_scanin[59]=ff_l2t_l2d_stdecc_c3_scanout[60]; | |
| 13026 | assign ff_l2t_l2d_stdecc_c3_scanin[58]=ff_l2t_l2d_stdecc_c3_scanout[59]; | |
| 13027 | assign ff_l2t_l2d_stdecc_c3_scanin[57]=ff_l2t_l2d_stdecc_c3_scanout[58]; | |
| 13028 | assign ff_l2t_l2d_stdecc_c3_scanin[56]=ff_l2t_l2d_stdecc_c3_scanout[57]; | |
| 13029 | assign ff_l2t_l2d_stdecc_c3_scanin[55]=ff_l2t_l2d_stdecc_c3_scanout[56]; | |
| 13030 | assign ff_l2t_l2d_stdecc_c3_scanin[54]=ff_l2t_l2d_stdecc_c3_scanout[55]; | |
| 13031 | assign ff_l2t_l2d_stdecc_c3_scanin[53]=ff_l2t_l2d_stdecc_c3_scanout[54]; | |
| 13032 | assign ff_l2t_l2d_stdecc_c3_scanin[52]=ff_l2t_l2d_stdecc_c3_scanout[53]; | |
| 13033 | assign ff_l2t_l2d_stdecc_c3_scanin[51]=ff_l2t_l2d_stdecc_c3_scanout[52]; | |
| 13034 | assign ff_l2t_l2d_stdecc_c3_scanin[50]=ff_l2t_l2d_stdecc_c3_scanout[51]; | |
| 13035 | assign ff_l2t_l2d_stdecc_c3_scanin[49]=ff_l2t_l2d_stdecc_c3_scanout[50]; | |
| 13036 | assign ff_l2t_l2d_stdecc_c3_scanin[48]=ff_l2t_l2d_stdecc_c3_scanout[49]; | |
| 13037 | assign ff_l2t_l2d_stdecc_c3_scanin[47]=ff_l2t_l2d_stdecc_c3_scanout[48]; | |
| 13038 | assign ff_l2t_l2d_stdecc_c3_scanin[46]=ff_l2t_l2d_stdecc_c3_scanout[47]; | |
| 13039 | assign ff_l2t_l2d_stdecc_c3_scanin[45]=ff_l2t_l2d_stdecc_c3_scanout[46]; | |
| 13040 | assign ff_l2t_l2d_stdecc_c3_scanin[44]=ff_l2t_l2d_stdecc_c3_scanout[45]; | |
| 13041 | assign ff_l2t_l2d_stdecc_c3_scanin[43]=ff_l2t_l2d_stdecc_c3_scanout[44]; | |
| 13042 | assign ff_l2t_l2d_stdecc_c3_scanin[42]=ff_l2t_l2d_stdecc_c3_scanout[43]; | |
| 13043 | assign ff_l2t_l2d_stdecc_c3_scanin[41]=ff_l2t_l2d_stdecc_c3_scanout[42]; | |
| 13044 | assign ff_l2t_l2d_stdecc_c3_scanin[40]=ff_l2t_l2d_stdecc_c3_scanout[41]; | |
| 13045 | assign ff_l2t_l2d_stdecc_c3_scanin[39]=ff_l2t_l2d_stdecc_c3_scanout[40]; | |
| 13046 | assign ff_cache_col_offset_c5_023_scanin[0]=ff_l2t_l2d_stdecc_c3_scanout[39]; | |
| 13047 | assign ff_cache_col_offset_c5_023_scanin[2]=ff_cache_col_offset_c5_023_scanout[0]; | |
| 13048 | assign ff_cache_col_offset_c4_023_scanin[0]=ff_cache_col_offset_c5_023_scanout[2]; | |
| 13049 | assign ff_cache_col_offset_c4_023_scanin[2]=ff_cache_col_offset_c4_023_scanout[0]; | |
| 13050 | assign ff_cache_col_offset_c4_tog_023_scanin[0]=ff_cache_col_offset_c4_023_scanout[2]; | |
| 13051 | assign ff_cache_cache_rd_wr_c5_20_scanin=ff_cache_col_offset_c4_tog_023_scanout[0]; | |
| 13052 | assign ff_cache_col_offset_c5_023_scanin[1]=ff_cache_cache_rd_wr_c5_20_scanout; | |
| 13053 | assign ff_cache_col_offset_c5_023_scanin[3]=ff_cache_col_offset_c5_023_scanout[1]; | |
| 13054 | assign ff_cache_col_offset_c4_023_scanin[1]=ff_cache_col_offset_c5_023_scanout[3]; | |
| 13055 | assign ff_cache_col_offset_c4_023_scanin[3]=ff_cache_col_offset_c4_023_scanout[1]; | |
| 13056 | assign ff_cache_col_offset_c4_tog_023_scanin[1]=ff_cache_col_offset_c4_023_scanout[3]; | |
| 13057 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[19]=ff_cache_col_offset_c4_tog_023_scanout[1]; | |
| 13058 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[19]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[19]; | |
| 13059 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[18]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[19]; | |
| 13060 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[18]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[18]; | |
| 13061 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[18]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[18]; | |
| 13062 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[18]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[18]; | |
| 13063 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[17]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[18]; | |
| 13064 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[17]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[17]; | |
| 13065 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[17]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[17]; | |
| 13066 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[17]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[17]; | |
| 13067 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[16]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[17]; | |
| 13068 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[16]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[16]; | |
| 13069 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[16]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[16]; | |
| 13070 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[16]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[16]; | |
| 13071 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[15]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[16]; | |
| 13072 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[15]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[15]; | |
| 13073 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[15]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[15]; | |
| 13074 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[15]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[15]; | |
| 13075 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[14]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[15]; | |
| 13076 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[9]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[14]; | |
| 13077 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[10]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[9]; | |
| 13078 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[10]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[10]; | |
| 13079 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[10]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[10]; | |
| 13080 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[10]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[10]; | |
| 13081 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[11]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[10]; | |
| 13082 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[11]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[11]; | |
| 13083 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[11]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[11]; | |
| 13084 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[11]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[11]; | |
| 13085 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[12]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[11]; | |
| 13086 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[12]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[12]; | |
| 13087 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[12]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[12]; | |
| 13088 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[12]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[12]; | |
| 13089 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[13]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[12]; | |
| 13090 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[13]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[13]; | |
| 13091 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[13]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[13]; | |
| 13092 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[13]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[13]; | |
| 13093 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[14]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[13]; | |
| 13094 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[14]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[14]; | |
| 13095 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[14]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[14]; | |
| 13096 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[19]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[14]; | |
| 13097 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[19]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[19]; | |
| 13098 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[18]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[19]; | |
| 13099 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[18]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[18]; | |
| 13100 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[18]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[18]; | |
| 13101 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[18]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[18]; | |
| 13102 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[17]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[18]; | |
| 13103 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[17]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[17]; | |
| 13104 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[17]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[17]; | |
| 13105 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[17]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[17]; | |
| 13106 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[16]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[17]; | |
| 13107 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[16]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[16]; | |
| 13108 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[16]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[16]; | |
| 13109 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[16]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[16]; | |
| 13110 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[15]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[16]; | |
| 13111 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[15]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[15]; | |
| 13112 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[15]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[15]; | |
| 13113 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[15]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[15]; | |
| 13114 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[14]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[15]; | |
| 13115 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[9]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[14]; | |
| 13116 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[10]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[9]; | |
| 13117 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[10]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[10]; | |
| 13118 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[10]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[10]; | |
| 13119 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[10]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[10]; | |
| 13120 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[11]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[10]; | |
| 13121 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[11]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[11]; | |
| 13122 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[11]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[11]; | |
| 13123 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[11]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[11]; | |
| 13124 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[12]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[11]; | |
| 13125 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[12]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[12]; | |
| 13126 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[12]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[12]; | |
| 13127 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[12]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[12]; | |
| 13128 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[13]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[12]; | |
| 13129 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[13]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[13]; | |
| 13130 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[13]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[13]; | |
| 13131 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[13]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[13]; | |
| 13132 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[14]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[13]; | |
| 13133 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[14]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[14]; | |
| 13134 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[14]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[14]; | |
| 13135 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[0]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[14]; | |
| 13136 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[0]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[0]; | |
| 13137 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[0]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[0]; | |
| 13138 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[0]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[0]; | |
| 13139 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[1]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[0]; | |
| 13140 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[1]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[1]; | |
| 13141 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[1]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[1]; | |
| 13142 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[1]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[1]; | |
| 13143 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[2]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[1]; | |
| 13144 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[2]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[2]; | |
| 13145 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[2]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[2]; | |
| 13146 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[2]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[2]; | |
| 13147 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[3]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[2]; | |
| 13148 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[3]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[3]; | |
| 13149 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[3]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[3]; | |
| 13150 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[3]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[3]; | |
| 13151 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[4]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[3]; | |
| 13152 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[4]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[4]; | |
| 13153 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[4]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[4]; | |
| 13154 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[9]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[4]; | |
| 13155 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[9]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[9]; | |
| 13156 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[9]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[9]; | |
| 13157 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[8]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[9]; | |
| 13158 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[8]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[8]; | |
| 13159 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[8]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[8]; | |
| 13160 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[8]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[8]; | |
| 13161 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[7]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[8]; | |
| 13162 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[7]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[7]; | |
| 13163 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[7]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[7]; | |
| 13164 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[7]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[7]; | |
| 13165 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[6]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[7]; | |
| 13166 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[6]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[6]; | |
| 13167 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[6]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[6]; | |
| 13168 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[6]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[6]; | |
| 13169 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[5]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[6]; | |
| 13170 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[5]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[5]; | |
| 13171 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[5]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[5]; | |
| 13172 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[5]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[5]; | |
| 13173 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[4]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[5]; | |
| 13174 | assign ff_l2d_decc_out_c6_lo0_2_scanin[0]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[4]; | |
| 13175 | assign ff_l2d_decc_out_c6_lo0_4_scanin[0]=ff_l2d_decc_out_c6_lo0_2_scanout[0]; | |
| 13176 | assign ff_l2d_decc_out_c6_hi0_2_scanin[0]=ff_l2d_decc_out_c6_lo0_4_scanout[0]; | |
| 13177 | assign ff_l2d_decc_out_c6_hi0_4_scanin[0]=ff_l2d_decc_out_c6_hi0_2_scanout[0]; | |
| 13178 | assign ff_l2d_decc_out_c6_lo1_2_scanin[0]=ff_l2d_decc_out_c6_hi0_4_scanout[0]; | |
| 13179 | assign ff_l2d_decc_out_c6_lo1_4_scanin[0]=ff_l2d_decc_out_c6_lo1_2_scanout[0]; | |
| 13180 | assign ff_l2d_decc_out_c6_hi1_2_scanin[0]=ff_l2d_decc_out_c6_lo1_4_scanout[0]; | |
| 13181 | assign ff_l2d_decc_out_c6_hi1_4_scanin[0]=ff_l2d_decc_out_c6_hi1_2_scanout[0]; | |
| 13182 | assign ff_l2d_decc_out_c6_lo0_2_scanin[1]=ff_l2d_decc_out_c6_hi1_4_scanout[0]; | |
| 13183 | assign ff_l2d_decc_out_c6_lo0_4_scanin[1]=ff_l2d_decc_out_c6_lo0_2_scanout[1]; | |
| 13184 | assign ff_l2d_decc_out_c6_hi0_2_scanin[1]=ff_l2d_decc_out_c6_lo0_4_scanout[1]; | |
| 13185 | assign ff_l2d_decc_out_c6_hi0_4_scanin[1]=ff_l2d_decc_out_c6_hi0_2_scanout[1]; | |
| 13186 | assign ff_l2d_decc_out_c6_lo1_2_scanin[1]=ff_l2d_decc_out_c6_hi0_4_scanout[1]; | |
| 13187 | assign ff_l2d_decc_out_c6_lo1_4_scanin[1]=ff_l2d_decc_out_c6_lo1_2_scanout[1]; | |
| 13188 | assign ff_l2d_decc_out_c6_hi1_2_scanin[1]=ff_l2d_decc_out_c6_lo1_4_scanout[1]; | |
| 13189 | assign ff_l2d_decc_out_c6_hi1_4_scanin[1]=ff_l2d_decc_out_c6_hi1_2_scanout[1]; | |
| 13190 | assign ff_l2d_decc_out_c6_lo0_2_scanin[2]=ff_l2d_decc_out_c6_hi1_4_scanout[1]; | |
| 13191 | assign ff_l2d_decc_out_c6_lo0_4_scanin[2]=ff_l2d_decc_out_c6_lo0_2_scanout[2]; | |
| 13192 | assign ff_l2d_decc_out_c6_hi0_2_scanin[2]=ff_l2d_decc_out_c6_lo0_4_scanout[2]; | |
| 13193 | assign ff_l2d_decc_out_c6_hi0_4_scanin[2]=ff_l2d_decc_out_c6_hi0_2_scanout[2]; | |
| 13194 | assign ff_l2d_decc_out_c6_lo1_2_scanin[2]=ff_l2d_decc_out_c6_hi0_4_scanout[2]; | |
| 13195 | assign ff_l2d_decc_out_c6_lo1_4_scanin[2]=ff_l2d_decc_out_c6_lo1_2_scanout[2]; | |
| 13196 | assign ff_l2d_decc_out_c6_hi1_2_scanin[2]=ff_l2d_decc_out_c6_lo1_4_scanout[2]; | |
| 13197 | assign ff_l2d_decc_out_c6_hi1_4_scanin[2]=ff_l2d_decc_out_c6_hi1_2_scanout[2]; | |
| 13198 | assign ff_l2d_decc_out_c6_lo0_2_scanin[3]=ff_l2d_decc_out_c6_hi1_4_scanout[2]; | |
| 13199 | assign ff_l2d_decc_out_c6_lo0_4_scanin[3]=ff_l2d_decc_out_c6_lo0_2_scanout[3]; | |
| 13200 | assign ff_l2d_decc_out_c6_hi0_2_scanin[3]=ff_l2d_decc_out_c6_lo0_4_scanout[3]; | |
| 13201 | assign ff_l2d_decc_out_c6_hi0_4_scanin[3]=ff_l2d_decc_out_c6_hi0_2_scanout[3]; | |
| 13202 | assign ff_l2d_decc_out_c6_lo1_2_scanin[3]=ff_l2d_decc_out_c6_hi0_4_scanout[3]; | |
| 13203 | assign ff_l2d_decc_out_c6_lo1_4_scanin[3]=ff_l2d_decc_out_c6_lo1_2_scanout[3]; | |
| 13204 | assign ff_l2d_decc_out_c6_hi1_2_scanin[3]=ff_l2d_decc_out_c6_lo1_4_scanout[3]; | |
| 13205 | assign ff_l2d_decc_out_c6_hi1_4_scanin[3]=ff_l2d_decc_out_c6_hi1_2_scanout[3]; | |
| 13206 | assign ff_l2d_decc_out_c6_lo0_2_scanin[4]=ff_l2d_decc_out_c6_hi1_4_scanout[3]; | |
| 13207 | assign ff_l2d_decc_out_c6_lo0_4_scanin[4]=ff_l2d_decc_out_c6_lo0_2_scanout[4]; | |
| 13208 | assign ff_l2d_decc_out_c6_hi0_2_scanin[4]=ff_l2d_decc_out_c6_lo0_4_scanout[4]; | |
| 13209 | assign ff_l2d_decc_out_c6_hi0_4_scanin[4]=ff_l2d_decc_out_c6_hi0_2_scanout[4]; | |
| 13210 | assign ff_l2d_decc_out_c6_lo1_2_scanin[4]=ff_l2d_decc_out_c6_hi0_4_scanout[4]; | |
| 13211 | assign ff_l2d_decc_out_c6_lo1_4_scanin[4]=ff_l2d_decc_out_c6_lo1_2_scanout[4]; | |
| 13212 | assign ff_l2d_decc_out_c6_hi1_2_scanin[4]=ff_l2d_decc_out_c6_lo1_4_scanout[4]; | |
| 13213 | assign ff_l2d_decc_out_c6_hi1_4_scanin[4]=ff_l2d_decc_out_c6_hi1_2_scanout[4]; | |
| 13214 | assign ff_l2d_decc_out_c6_lo0_2_scanin[5]=ff_l2d_decc_out_c6_hi1_4_scanout[4]; | |
| 13215 | assign ff_l2d_decc_out_c6_lo0_4_scanin[5]=ff_l2d_decc_out_c6_lo0_2_scanout[5]; | |
| 13216 | assign ff_l2d_decc_out_c6_hi0_2_scanin[5]=ff_l2d_decc_out_c6_lo0_4_scanout[5]; | |
| 13217 | assign ff_l2d_decc_out_c6_hi0_4_scanin[5]=ff_l2d_decc_out_c6_hi0_2_scanout[5]; | |
| 13218 | assign ff_l2d_decc_out_c6_lo1_2_scanin[5]=ff_l2d_decc_out_c6_hi0_4_scanout[5]; | |
| 13219 | assign ff_l2d_decc_out_c6_lo1_4_scanin[5]=ff_l2d_decc_out_c6_lo1_2_scanout[5]; | |
| 13220 | assign ff_l2d_decc_out_c6_hi1_2_scanin[5]=ff_l2d_decc_out_c6_lo1_4_scanout[5]; | |
| 13221 | assign ff_l2d_decc_out_c6_hi1_4_scanin[5]=ff_l2d_decc_out_c6_hi1_2_scanout[5]; | |
| 13222 | assign ff_l2d_decc_out_c6_lo0_2_scanin[6]=ff_l2d_decc_out_c6_hi1_4_scanout[5]; | |
| 13223 | assign ff_l2d_decc_out_c6_lo0_4_scanin[6]=ff_l2d_decc_out_c6_lo0_2_scanout[6]; | |
| 13224 | assign ff_l2d_decc_out_c6_hi0_2_scanin[6]=ff_l2d_decc_out_c6_lo0_4_scanout[6]; | |
| 13225 | assign ff_l2d_decc_out_c6_hi0_4_scanin[6]=ff_l2d_decc_out_c6_hi0_2_scanout[6]; | |
| 13226 | assign ff_l2d_decc_out_c6_lo1_2_scanin[6]=ff_l2d_decc_out_c6_hi0_4_scanout[6]; | |
| 13227 | assign ff_l2d_decc_out_c6_lo1_4_scanin[6]=ff_l2d_decc_out_c6_lo1_2_scanout[6]; | |
| 13228 | assign ff_l2d_decc_out_c6_hi1_2_scanin[6]=ff_l2d_decc_out_c6_lo1_4_scanout[6]; | |
| 13229 | assign ff_l2d_decc_out_c6_hi1_4_scanin[6]=ff_l2d_decc_out_c6_hi1_2_scanout[6]; | |
| 13230 | assign ff_l2d_decc_out_c6_lo0_2_scanin[7]=ff_l2d_decc_out_c6_hi1_4_scanout[6]; | |
| 13231 | assign ff_l2d_decc_out_c6_lo0_4_scanin[7]=ff_l2d_decc_out_c6_lo0_2_scanout[7]; | |
| 13232 | assign ff_l2d_decc_out_c6_hi0_2_scanin[7]=ff_l2d_decc_out_c6_lo0_4_scanout[7]; | |
| 13233 | assign ff_l2d_decc_out_c6_hi0_4_scanin[7]=ff_l2d_decc_out_c6_hi0_2_scanout[7]; | |
| 13234 | assign ff_l2d_decc_out_c6_lo1_2_scanin[7]=ff_l2d_decc_out_c6_hi0_4_scanout[7]; | |
| 13235 | assign ff_l2d_decc_out_c6_lo1_4_scanin[7]=ff_l2d_decc_out_c6_lo1_2_scanout[7]; | |
| 13236 | assign ff_l2d_decc_out_c6_hi1_2_scanin[7]=ff_l2d_decc_out_c6_lo1_4_scanout[7]; | |
| 13237 | assign ff_l2d_decc_out_c6_hi1_4_scanin[7]=ff_l2d_decc_out_c6_hi1_2_scanout[7]; | |
| 13238 | assign ff_l2d_decc_out_c6_lo0_2_scanin[8]=ff_l2d_decc_out_c6_hi1_4_scanout[7]; | |
| 13239 | assign ff_l2d_decc_out_c6_lo0_4_scanin[8]=ff_l2d_decc_out_c6_lo0_2_scanout[8]; | |
| 13240 | assign ff_l2d_decc_out_c6_hi0_2_scanin[8]=ff_l2d_decc_out_c6_lo0_4_scanout[8]; | |
| 13241 | assign ff_l2d_decc_out_c6_hi0_4_scanin[8]=ff_l2d_decc_out_c6_hi0_2_scanout[8]; | |
| 13242 | assign ff_l2d_decc_out_c6_lo1_2_scanin[8]=ff_l2d_decc_out_c6_hi0_4_scanout[8]; | |
| 13243 | assign ff_l2d_decc_out_c6_lo1_4_scanin[8]=ff_l2d_decc_out_c6_lo1_2_scanout[8]; | |
| 13244 | assign ff_l2d_decc_out_c6_hi1_2_scanin[8]=ff_l2d_decc_out_c6_lo1_4_scanout[8]; | |
| 13245 | assign ff_l2d_decc_out_c6_hi1_4_scanin[8]=ff_l2d_decc_out_c6_hi1_2_scanout[8]; | |
| 13246 | assign ff_l2d_decc_out_c6_lo0_2_scanin[9]=ff_l2d_decc_out_c6_hi1_4_scanout[8]; | |
| 13247 | assign ff_l2d_decc_out_c6_lo0_4_scanin[9]=ff_l2d_decc_out_c6_lo0_2_scanout[9]; | |
| 13248 | assign ff_l2d_decc_out_c6_hi0_2_scanin[9]=ff_l2d_decc_out_c6_lo0_4_scanout[9]; | |
| 13249 | assign ff_l2d_decc_out_c6_hi0_4_scanin[9]=ff_l2d_decc_out_c6_hi0_2_scanout[9]; | |
| 13250 | assign ff_l2d_decc_out_c6_lo1_2_scanin[9]=ff_l2d_decc_out_c6_hi0_4_scanout[9]; | |
| 13251 | assign ff_l2d_decc_out_c6_lo1_4_scanin[9]=ff_l2d_decc_out_c6_lo1_2_scanout[9]; | |
| 13252 | assign ff_l2d_decc_out_c6_hi1_2_scanin[9]=ff_l2d_decc_out_c6_lo1_4_scanout[9]; | |
| 13253 | assign ff_l2d_decc_out_c6_hi1_4_scanin[9]=ff_l2d_decc_out_c6_hi1_2_scanout[9]; | |
| 13254 | assign ff_l2d_decc_out_c6_lo0_2_scanin[10]=ff_l2d_decc_out_c6_hi1_4_scanout[9]; | |
| 13255 | assign ff_l2d_decc_out_c6_lo0_4_scanin[10]=ff_l2d_decc_out_c6_lo0_2_scanout[10]; | |
| 13256 | assign ff_l2d_decc_out_c6_hi0_2_scanin[10]=ff_l2d_decc_out_c6_lo0_4_scanout[10]; | |
| 13257 | assign ff_l2d_decc_out_c6_hi0_4_scanin[10]=ff_l2d_decc_out_c6_hi0_2_scanout[10]; | |
| 13258 | assign ff_l2d_decc_out_c6_lo1_2_scanin[10]=ff_l2d_decc_out_c6_hi0_4_scanout[10]; | |
| 13259 | assign ff_l2d_decc_out_c6_lo1_4_scanin[10]=ff_l2d_decc_out_c6_lo1_2_scanout[10]; | |
| 13260 | assign ff_l2d_decc_out_c6_hi1_2_scanin[10]=ff_l2d_decc_out_c6_lo1_4_scanout[10]; | |
| 13261 | assign ff_l2d_decc_out_c6_hi1_4_scanin[10]=ff_l2d_decc_out_c6_hi1_2_scanout[10]; | |
| 13262 | assign ff_l2d_decc_out_c6_lo0_2_scanin[11]=ff_l2d_decc_out_c6_hi1_4_scanout[10]; | |
| 13263 | assign ff_l2d_decc_out_c6_lo0_4_scanin[11]=ff_l2d_decc_out_c6_lo0_2_scanout[11]; | |
| 13264 | assign ff_l2d_decc_out_c6_hi0_2_scanin[11]=ff_l2d_decc_out_c6_lo0_4_scanout[11]; | |
| 13265 | assign ff_l2d_decc_out_c6_hi0_4_scanin[11]=ff_l2d_decc_out_c6_hi0_2_scanout[11]; | |
| 13266 | assign ff_l2d_decc_out_c6_lo1_2_scanin[11]=ff_l2d_decc_out_c6_hi0_4_scanout[11]; | |
| 13267 | assign ff_l2d_decc_out_c6_lo1_4_scanin[11]=ff_l2d_decc_out_c6_lo1_2_scanout[11]; | |
| 13268 | assign ff_l2d_decc_out_c6_hi1_2_scanin[11]=ff_l2d_decc_out_c6_lo1_4_scanout[11]; | |
| 13269 | assign ff_l2d_decc_out_c6_hi1_4_scanin[11]=ff_l2d_decc_out_c6_hi1_2_scanout[11]; | |
| 13270 | assign ff_l2d_decc_out_c6_lo0_2_scanin[12]=ff_l2d_decc_out_c6_hi1_4_scanout[11]; | |
| 13271 | assign ff_l2d_decc_out_c6_lo0_4_scanin[12]=ff_l2d_decc_out_c6_lo0_2_scanout[12]; | |
| 13272 | assign ff_l2d_decc_out_c6_hi0_2_scanin[12]=ff_l2d_decc_out_c6_lo0_4_scanout[12]; | |
| 13273 | assign ff_l2d_decc_out_c6_hi0_4_scanin[12]=ff_l2d_decc_out_c6_hi0_2_scanout[12]; | |
| 13274 | assign ff_l2d_decc_out_c6_lo1_2_scanin[12]=ff_l2d_decc_out_c6_hi0_4_scanout[12]; | |
| 13275 | assign ff_l2d_decc_out_c6_lo1_4_scanin[12]=ff_l2d_decc_out_c6_lo1_2_scanout[12]; | |
| 13276 | assign ff_l2d_decc_out_c6_hi1_2_scanin[12]=ff_l2d_decc_out_c6_lo1_4_scanout[12]; | |
| 13277 | assign ff_l2d_decc_out_c6_hi1_4_scanin[12]=ff_l2d_decc_out_c6_hi1_2_scanout[12]; | |
| 13278 | assign ff_l2d_decc_out_c6_lo0_2_scanin[13]=ff_l2d_decc_out_c6_hi1_4_scanout[12]; | |
| 13279 | assign ff_l2d_decc_out_c6_lo0_4_scanin[13]=ff_l2d_decc_out_c6_lo0_2_scanout[13]; | |
| 13280 | assign ff_l2d_decc_out_c6_hi0_2_scanin[13]=ff_l2d_decc_out_c6_lo0_4_scanout[13]; | |
| 13281 | assign ff_l2d_decc_out_c6_hi0_4_scanin[13]=ff_l2d_decc_out_c6_hi0_2_scanout[13]; | |
| 13282 | assign ff_l2d_decc_out_c6_lo1_2_scanin[13]=ff_l2d_decc_out_c6_hi0_4_scanout[13]; | |
| 13283 | assign ff_l2d_decc_out_c6_lo1_4_scanin[13]=ff_l2d_decc_out_c6_lo1_2_scanout[13]; | |
| 13284 | assign ff_l2d_decc_out_c6_hi1_2_scanin[13]=ff_l2d_decc_out_c6_lo1_4_scanout[13]; | |
| 13285 | assign ff_l2d_decc_out_c6_hi1_4_scanin[13]=ff_l2d_decc_out_c6_hi1_2_scanout[13]; | |
| 13286 | assign ff_l2d_decc_out_c6_lo0_2_scanin[14]=ff_l2d_decc_out_c6_hi1_4_scanout[13]; | |
| 13287 | assign ff_l2d_decc_out_c6_lo0_4_scanin[14]=ff_l2d_decc_out_c6_lo0_2_scanout[14]; | |
| 13288 | assign ff_l2d_decc_out_c6_hi0_2_scanin[14]=ff_l2d_decc_out_c6_lo0_4_scanout[14]; | |
| 13289 | assign ff_l2d_decc_out_c6_hi0_4_scanin[14]=ff_l2d_decc_out_c6_hi0_2_scanout[14]; | |
| 13290 | assign ff_l2d_decc_out_c6_lo1_2_scanin[14]=ff_l2d_decc_out_c6_hi0_4_scanout[14]; | |
| 13291 | assign ff_l2d_decc_out_c6_lo1_4_scanin[14]=ff_l2d_decc_out_c6_lo1_2_scanout[14]; | |
| 13292 | assign ff_l2d_decc_out_c6_hi1_2_scanin[14]=ff_l2d_decc_out_c6_lo1_4_scanout[14]; | |
| 13293 | assign ff_l2d_decc_out_c6_hi1_4_scanin[14]=ff_l2d_decc_out_c6_hi1_2_scanout[14]; | |
| 13294 | assign ff_l2d_decc_out_c6_lo0_2_scanin[15]=ff_l2d_decc_out_c6_hi1_4_scanout[14]; | |
| 13295 | assign ff_l2d_decc_out_c6_lo0_4_scanin[15]=ff_l2d_decc_out_c6_lo0_2_scanout[15]; | |
| 13296 | assign ff_l2d_decc_out_c6_hi0_2_scanin[15]=ff_l2d_decc_out_c6_lo0_4_scanout[15]; | |
| 13297 | assign ff_l2d_decc_out_c6_hi0_4_scanin[15]=ff_l2d_decc_out_c6_hi0_2_scanout[15]; | |
| 13298 | assign ff_l2d_decc_out_c6_lo1_2_scanin[15]=ff_l2d_decc_out_c6_hi0_4_scanout[15]; | |
| 13299 | assign ff_l2d_decc_out_c6_lo1_4_scanin[15]=ff_l2d_decc_out_c6_lo1_2_scanout[15]; | |
| 13300 | assign ff_l2d_decc_out_c6_hi1_2_scanin[15]=ff_l2d_decc_out_c6_lo1_4_scanout[15]; | |
| 13301 | assign ff_l2d_decc_out_c6_hi1_4_scanin[15]=ff_l2d_decc_out_c6_hi1_2_scanout[15]; | |
| 13302 | assign ff_l2d_decc_out_c6_lo0_2_scanin[16]=ff_l2d_decc_out_c6_hi1_4_scanout[15]; | |
| 13303 | assign ff_l2d_decc_out_c6_lo0_4_scanin[16]=ff_l2d_decc_out_c6_lo0_2_scanout[16]; | |
| 13304 | assign ff_l2d_decc_out_c6_hi0_2_scanin[16]=ff_l2d_decc_out_c6_lo0_4_scanout[16]; | |
| 13305 | assign ff_l2d_decc_out_c6_hi0_4_scanin[16]=ff_l2d_decc_out_c6_hi0_2_scanout[16]; | |
| 13306 | assign ff_l2d_decc_out_c6_lo1_2_scanin[16]=ff_l2d_decc_out_c6_hi0_4_scanout[16]; | |
| 13307 | assign ff_l2d_decc_out_c6_lo1_4_scanin[16]=ff_l2d_decc_out_c6_lo1_2_scanout[16]; | |
| 13308 | assign ff_l2d_decc_out_c6_hi1_2_scanin[16]=ff_l2d_decc_out_c6_lo1_4_scanout[16]; | |
| 13309 | assign ff_l2d_decc_out_c6_hi1_4_scanin[16]=ff_l2d_decc_out_c6_hi1_2_scanout[16]; | |
| 13310 | assign ff_l2d_decc_out_c6_lo0_2_scanin[17]=ff_l2d_decc_out_c6_hi1_4_scanout[16]; | |
| 13311 | assign ff_l2d_decc_out_c6_lo0_4_scanin[17]=ff_l2d_decc_out_c6_lo0_2_scanout[17]; | |
| 13312 | assign ff_l2d_decc_out_c6_hi0_2_scanin[17]=ff_l2d_decc_out_c6_lo0_4_scanout[17]; | |
| 13313 | assign ff_l2d_decc_out_c6_hi0_4_scanin[17]=ff_l2d_decc_out_c6_hi0_2_scanout[17]; | |
| 13314 | assign ff_l2d_decc_out_c6_lo1_2_scanin[17]=ff_l2d_decc_out_c6_hi0_4_scanout[17]; | |
| 13315 | assign ff_l2d_decc_out_c6_lo1_4_scanin[17]=ff_l2d_decc_out_c6_lo1_2_scanout[17]; | |
| 13316 | assign ff_l2d_decc_out_c6_hi1_2_scanin[17]=ff_l2d_decc_out_c6_lo1_4_scanout[17]; | |
| 13317 | assign ff_l2d_decc_out_c6_hi1_4_scanin[17]=ff_l2d_decc_out_c6_hi1_2_scanout[17]; | |
| 13318 | assign ff_l2d_decc_out_c6_lo0_2_scanin[18]=ff_l2d_decc_out_c6_hi1_4_scanout[17]; | |
| 13319 | assign ff_l2d_decc_out_c6_lo0_4_scanin[18]=ff_l2d_decc_out_c6_lo0_2_scanout[18]; | |
| 13320 | assign ff_l2d_decc_out_c6_hi0_2_scanin[18]=ff_l2d_decc_out_c6_lo0_4_scanout[18]; | |
| 13321 | assign ff_l2d_decc_out_c6_hi0_4_scanin[18]=ff_l2d_decc_out_c6_hi0_2_scanout[18]; | |
| 13322 | assign ff_l2d_decc_out_c6_lo1_2_scanin[18]=ff_l2d_decc_out_c6_hi0_4_scanout[18]; | |
| 13323 | assign ff_l2d_decc_out_c6_lo1_4_scanin[18]=ff_l2d_decc_out_c6_lo1_2_scanout[18]; | |
| 13324 | assign ff_l2d_decc_out_c6_hi1_2_scanin[18]=ff_l2d_decc_out_c6_lo1_4_scanout[18]; | |
| 13325 | assign ff_l2d_decc_out_c6_hi1_4_scanin[18]=ff_l2d_decc_out_c6_hi1_2_scanout[18]; | |
| 13326 | assign ff_l2d_decc_out_c6_lo0_2_scanin[19]=ff_l2d_decc_out_c6_hi1_4_scanout[18]; | |
| 13327 | assign ff_l2d_decc_out_c6_lo0_4_scanin[19]=ff_l2d_decc_out_c6_lo0_2_scanout[19]; | |
| 13328 | assign ff_l2d_decc_out_c6_hi0_2_scanin[19]=ff_l2d_decc_out_c6_lo0_4_scanout[19]; | |
| 13329 | assign ff_l2d_decc_out_c6_hi0_4_scanin[19]=ff_l2d_decc_out_c6_hi0_2_scanout[19]; | |
| 13330 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[19]=ff_l2d_decc_out_c6_hi0_4_scanout[19]; | |
| 13331 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[19]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[19]; | |
| 13332 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[20]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[19]; | |
| 13333 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[20]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[20]; | |
| 13334 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[20]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[20]; | |
| 13335 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[20]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[20]; | |
| 13336 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[21]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[20]; | |
| 13337 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[21]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[21]; | |
| 13338 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[21]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[21]; | |
| 13339 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[21]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[21]; | |
| 13340 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[22]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[21]; | |
| 13341 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[22]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[22]; | |
| 13342 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[22]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[22]; | |
| 13343 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[22]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[22]; | |
| 13344 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[23]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[22]; | |
| 13345 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[23]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[23]; | |
| 13346 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[23]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[23]; | |
| 13347 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[23]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[23]; | |
| 13348 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[24]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[23]; | |
| 13349 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[29]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[24]; | |
| 13350 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[28]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[29]; | |
| 13351 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[28]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[28]; | |
| 13352 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[28]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[28]; | |
| 13353 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[28]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[28]; | |
| 13354 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[27]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[28]; | |
| 13355 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[27]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[27]; | |
| 13356 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[27]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[27]; | |
| 13357 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[27]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[27]; | |
| 13358 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[26]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[27]; | |
| 13359 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[26]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[26]; | |
| 13360 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[26]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[26]; | |
| 13361 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[26]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[26]; | |
| 13362 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[25]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[26]; | |
| 13363 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[25]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[25]; | |
| 13364 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[25]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[25]; | |
| 13365 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[25]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[25]; | |
| 13366 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[24]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[25]; | |
| 13367 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[24]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[24]; | |
| 13368 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[24]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[24]; | |
| 13369 | assign ff_cache_col_offset_c5_123_scanin[0]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[24]; | |
| 13370 | assign ff_cache_col_offset_c5_123_scanin[2]=ff_cache_col_offset_c5_123_scanout[0]; | |
| 13371 | assign ff_cache_col_offset_c4_123_scanin[0]=ff_cache_col_offset_c5_123_scanout[2]; | |
| 13372 | assign ff_cache_col_offset_c4_123_scanin[2]=ff_cache_col_offset_c4_123_scanout[0]; | |
| 13373 | assign ff_cache_col_offset_c4_tog_123_scanin[0]=ff_cache_col_offset_c4_123_scanout[2]; | |
| 13374 | assign ff_cache_cache_rd_wr_c5_21_scanin=ff_cache_col_offset_c4_tog_123_scanout[0]; | |
| 13375 | assign ff_cache_col_offset_c5_123_scanin[1]=ff_cache_cache_rd_wr_c5_21_scanout; | |
| 13376 | assign ff_cache_col_offset_c5_123_scanin[3]=ff_cache_col_offset_c5_123_scanout[1]; | |
| 13377 | assign ff_cache_col_offset_c4_123_scanin[1]=ff_cache_col_offset_c5_123_scanout[3]; | |
| 13378 | assign ff_cache_col_offset_c4_123_scanin[3]=ff_cache_col_offset_c4_123_scanout[1]; | |
| 13379 | assign ff_cache_col_offset_c4_tog_123_scanin[1]=ff_cache_col_offset_c4_123_scanout[3]; | |
| 13380 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[38]=ff_cache_col_offset_c4_tog_123_scanout[1]; | |
| 13381 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[38]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[38]; | |
| 13382 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[38]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[38]; | |
| 13383 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[38]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[38]; | |
| 13384 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[37]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[38]; | |
| 13385 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[37]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[37]; | |
| 13386 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[37]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[37]; | |
| 13387 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[37]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[37]; | |
| 13388 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[36]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[37]; | |
| 13389 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[36]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[36]; | |
| 13390 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[36]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[36]; | |
| 13391 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[36]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[36]; | |
| 13392 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[35]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[36]; | |
| 13393 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[35]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[35]; | |
| 13394 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[35]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[35]; | |
| 13395 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[35]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[35]; | |
| 13396 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[34]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[35]; | |
| 13397 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[34]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[34]; | |
| 13398 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[34]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[34]; | |
| 13399 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[29]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[34]; | |
| 13400 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[29]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[29]; | |
| 13401 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[29]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[29]; | |
| 13402 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[30]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[29]; | |
| 13403 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[30]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[30]; | |
| 13404 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[30]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[30]; | |
| 13405 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[30]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[30]; | |
| 13406 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[31]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[30]; | |
| 13407 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[31]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[31]; | |
| 13408 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[31]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[31]; | |
| 13409 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[31]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[31]; | |
| 13410 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[32]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[31]; | |
| 13411 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[32]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[32]; | |
| 13412 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[32]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[32]; | |
| 13413 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[32]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[32]; | |
| 13414 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[33]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[32]; | |
| 13415 | assign ff_l2b_l2d_fbdecc_c52_hi0_4_scanin[33]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[33]; | |
| 13416 | assign ff_l2b_l2d_fbdecc_c52_lo1_4_scanin[33]=ff_l2b_l2d_fbdecc_c52_hi0_4_scanout[33]; | |
| 13417 | assign ff_l2b_l2d_fbdecc_c52_hi1_4_scanin[33]=ff_l2b_l2d_fbdecc_c52_lo1_4_scanout[33]; | |
| 13418 | assign ff_l2b_l2d_fbdecc_c52_lo0_4_scanin[34]=ff_l2b_l2d_fbdecc_c52_hi1_4_scanout[33]; | |
| 13419 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[38]=ff_l2b_l2d_fbdecc_c52_lo0_4_scanout[34]; | |
| 13420 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[38]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[38]; | |
| 13421 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[38]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[38]; | |
| 13422 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[38]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[38]; | |
| 13423 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[37]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[38]; | |
| 13424 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[37]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[37]; | |
| 13425 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[37]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[37]; | |
| 13426 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[37]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[37]; | |
| 13427 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[36]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[37]; | |
| 13428 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[36]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[36]; | |
| 13429 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[36]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[36]; | |
| 13430 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[36]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[36]; | |
| 13431 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[35]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[36]; | |
| 13432 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[35]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[35]; | |
| 13433 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[35]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[35]; | |
| 13434 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[35]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[35]; | |
| 13435 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[34]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[35]; | |
| 13436 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[34]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[34]; | |
| 13437 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[34]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[34]; | |
| 13438 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[29]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[34]; | |
| 13439 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[29]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[29]; | |
| 13440 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[29]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[29]; | |
| 13441 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[30]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[29]; | |
| 13442 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[30]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[30]; | |
| 13443 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[30]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[30]; | |
| 13444 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[30]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[30]; | |
| 13445 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[31]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[30]; | |
| 13446 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[31]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[31]; | |
| 13447 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[31]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[31]; | |
| 13448 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[31]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[31]; | |
| 13449 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[32]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[31]; | |
| 13450 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[32]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[32]; | |
| 13451 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[32]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[32]; | |
| 13452 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[32]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[32]; | |
| 13453 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[33]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[32]; | |
| 13454 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[33]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[33]; | |
| 13455 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[33]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[33]; | |
| 13456 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[33]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[33]; | |
| 13457 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[34]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[33]; | |
| 13458 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[19]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[34]; | |
| 13459 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[19]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[19]; | |
| 13460 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[20]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[19]; | |
| 13461 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[20]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[20]; | |
| 13462 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[20]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[20]; | |
| 13463 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[20]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[20]; | |
| 13464 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[21]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[20]; | |
| 13465 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[21]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[21]; | |
| 13466 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[21]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[21]; | |
| 13467 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[21]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[21]; | |
| 13468 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[22]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[21]; | |
| 13469 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[22]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[22]; | |
| 13470 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[22]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[22]; | |
| 13471 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[22]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[22]; | |
| 13472 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[23]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[22]; | |
| 13473 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[23]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[23]; | |
| 13474 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[23]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[23]; | |
| 13475 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[23]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[23]; | |
| 13476 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[24]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[23]; | |
| 13477 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[29]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[24]; | |
| 13478 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[28]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[29]; | |
| 13479 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[28]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[28]; | |
| 13480 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[28]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[28]; | |
| 13481 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[28]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[28]; | |
| 13482 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[27]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[28]; | |
| 13483 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[27]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[27]; | |
| 13484 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[27]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[27]; | |
| 13485 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[27]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[27]; | |
| 13486 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[26]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[27]; | |
| 13487 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[26]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[26]; | |
| 13488 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[26]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[26]; | |
| 13489 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[26]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[26]; | |
| 13490 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[25]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[26]; | |
| 13491 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[25]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[25]; | |
| 13492 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[25]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[25]; | |
| 13493 | assign ff_l2b_l2d_fbdecc_c52_lo0_2_scanin[25]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[25]; | |
| 13494 | assign ff_l2b_l2d_fbdecc_c52_hi1_2_scanin[24]=ff_l2b_l2d_fbdecc_c52_lo0_2_scanout[25]; | |
| 13495 | assign ff_l2b_l2d_fbdecc_c52_lo1_2_scanin[24]=ff_l2b_l2d_fbdecc_c52_hi1_2_scanout[24]; | |
| 13496 | assign ff_l2b_l2d_fbdecc_c52_hi0_2_scanin[24]=ff_l2b_l2d_fbdecc_c52_lo1_2_scanout[24]; | |
| 13497 | assign ff_l2d_decc_out_c6_lo1_2_scanin[19]=ff_l2b_l2d_fbdecc_c52_hi0_2_scanout[24]; | |
| 13498 | assign ff_l2d_decc_out_c6_lo1_4_scanin[19]=ff_l2d_decc_out_c6_lo1_2_scanout[19]; | |
| 13499 | assign ff_l2d_decc_out_c6_hi1_2_scanin[19]=ff_l2d_decc_out_c6_lo1_4_scanout[19]; | |
| 13500 | assign ff_l2d_decc_out_c6_hi1_4_scanin[19]=ff_l2d_decc_out_c6_hi1_2_scanout[19]; | |
| 13501 | assign ff_l2d_decc_out_c6_lo0_2_scanin[20]=ff_l2d_decc_out_c6_hi1_4_scanout[19]; | |
| 13502 | assign ff_l2d_decc_out_c6_lo0_4_scanin[20]=ff_l2d_decc_out_c6_lo0_2_scanout[20]; | |
| 13503 | assign ff_l2d_decc_out_c6_hi0_2_scanin[20]=ff_l2d_decc_out_c6_lo0_4_scanout[20]; | |
| 13504 | assign ff_l2d_decc_out_c6_hi0_4_scanin[20]=ff_l2d_decc_out_c6_hi0_2_scanout[20]; | |
| 13505 | assign ff_l2d_decc_out_c6_lo1_2_scanin[20]=ff_l2d_decc_out_c6_hi0_4_scanout[20]; | |
| 13506 | assign ff_l2d_decc_out_c6_lo1_4_scanin[20]=ff_l2d_decc_out_c6_lo1_2_scanout[20]; | |
| 13507 | assign ff_l2d_decc_out_c6_hi1_2_scanin[20]=ff_l2d_decc_out_c6_lo1_4_scanout[20]; | |
| 13508 | assign ff_l2d_decc_out_c6_hi1_4_scanin[20]=ff_l2d_decc_out_c6_hi1_2_scanout[20]; | |
| 13509 | assign ff_l2d_decc_out_c6_lo0_2_scanin[21]=ff_l2d_decc_out_c6_hi1_4_scanout[20]; | |
| 13510 | assign ff_l2d_decc_out_c6_lo0_4_scanin[21]=ff_l2d_decc_out_c6_lo0_2_scanout[21]; | |
| 13511 | assign ff_l2d_decc_out_c6_hi0_2_scanin[21]=ff_l2d_decc_out_c6_lo0_4_scanout[21]; | |
| 13512 | assign ff_l2d_decc_out_c6_hi0_4_scanin[21]=ff_l2d_decc_out_c6_hi0_2_scanout[21]; | |
| 13513 | assign ff_l2d_decc_out_c6_lo1_2_scanin[21]=ff_l2d_decc_out_c6_hi0_4_scanout[21]; | |
| 13514 | assign ff_l2d_decc_out_c6_lo1_4_scanin[21]=ff_l2d_decc_out_c6_lo1_2_scanout[21]; | |
| 13515 | assign ff_l2d_decc_out_c6_hi1_2_scanin[21]=ff_l2d_decc_out_c6_lo1_4_scanout[21]; | |
| 13516 | assign ff_l2d_decc_out_c6_hi1_4_scanin[21]=ff_l2d_decc_out_c6_hi1_2_scanout[21]; | |
| 13517 | assign ff_l2d_decc_out_c6_lo0_2_scanin[22]=ff_l2d_decc_out_c6_hi1_4_scanout[21]; | |
| 13518 | assign ff_l2d_decc_out_c6_lo0_4_scanin[22]=ff_l2d_decc_out_c6_lo0_2_scanout[22]; | |
| 13519 | assign ff_l2d_decc_out_c6_hi0_2_scanin[22]=ff_l2d_decc_out_c6_lo0_4_scanout[22]; | |
| 13520 | assign ff_l2d_decc_out_c6_hi0_4_scanin[22]=ff_l2d_decc_out_c6_hi0_2_scanout[22]; | |
| 13521 | assign ff_l2d_decc_out_c6_lo1_2_scanin[22]=ff_l2d_decc_out_c6_hi0_4_scanout[22]; | |
| 13522 | assign ff_l2d_decc_out_c6_lo1_4_scanin[22]=ff_l2d_decc_out_c6_lo1_2_scanout[22]; | |
| 13523 | assign ff_l2d_decc_out_c6_hi1_2_scanin[22]=ff_l2d_decc_out_c6_lo1_4_scanout[22]; | |
| 13524 | assign ff_l2d_decc_out_c6_hi1_4_scanin[22]=ff_l2d_decc_out_c6_hi1_2_scanout[22]; | |
| 13525 | assign ff_l2d_decc_out_c6_lo0_2_scanin[23]=ff_l2d_decc_out_c6_hi1_4_scanout[22]; | |
| 13526 | assign ff_l2d_decc_out_c6_lo0_4_scanin[23]=ff_l2d_decc_out_c6_lo0_2_scanout[23]; | |
| 13527 | assign ff_l2d_decc_out_c6_hi0_2_scanin[23]=ff_l2d_decc_out_c6_lo0_4_scanout[23]; | |
| 13528 | assign ff_l2d_decc_out_c6_hi0_4_scanin[23]=ff_l2d_decc_out_c6_hi0_2_scanout[23]; | |
| 13529 | assign ff_l2d_decc_out_c6_lo1_2_scanin[23]=ff_l2d_decc_out_c6_hi0_4_scanout[23]; | |
| 13530 | assign ff_l2d_decc_out_c6_lo1_4_scanin[23]=ff_l2d_decc_out_c6_lo1_2_scanout[23]; | |
| 13531 | assign ff_l2d_decc_out_c6_hi1_2_scanin[23]=ff_l2d_decc_out_c6_lo1_4_scanout[23]; | |
| 13532 | assign ff_l2d_decc_out_c6_hi1_4_scanin[23]=ff_l2d_decc_out_c6_hi1_2_scanout[23]; | |
| 13533 | assign ff_l2d_decc_out_c6_lo0_2_scanin[24]=ff_l2d_decc_out_c6_hi1_4_scanout[23]; | |
| 13534 | assign ff_l2d_decc_out_c6_lo0_4_scanin[24]=ff_l2d_decc_out_c6_lo0_2_scanout[24]; | |
| 13535 | assign ff_l2d_decc_out_c6_hi0_2_scanin[24]=ff_l2d_decc_out_c6_lo0_4_scanout[24]; | |
| 13536 | assign ff_l2d_decc_out_c6_hi0_4_scanin[24]=ff_l2d_decc_out_c6_hi0_2_scanout[24]; | |
| 13537 | assign ff_l2d_decc_out_c6_lo1_2_scanin[24]=ff_l2d_decc_out_c6_hi0_4_scanout[24]; | |
| 13538 | assign ff_l2d_decc_out_c6_lo1_4_scanin[24]=ff_l2d_decc_out_c6_lo1_2_scanout[24]; | |
| 13539 | assign ff_l2d_decc_out_c6_hi1_2_scanin[24]=ff_l2d_decc_out_c6_lo1_4_scanout[24]; | |
| 13540 | assign ff_l2d_decc_out_c6_hi1_4_scanin[24]=ff_l2d_decc_out_c6_hi1_2_scanout[24]; | |
| 13541 | assign ff_l2d_decc_out_c6_lo0_2_scanin[25]=ff_l2d_decc_out_c6_hi1_4_scanout[24]; | |
| 13542 | assign ff_l2d_decc_out_c6_lo0_4_scanin[25]=ff_l2d_decc_out_c6_lo0_2_scanout[25]; | |
| 13543 | assign ff_l2d_decc_out_c6_hi0_2_scanin[25]=ff_l2d_decc_out_c6_lo0_4_scanout[25]; | |
| 13544 | assign ff_l2d_decc_out_c6_hi0_4_scanin[25]=ff_l2d_decc_out_c6_hi0_2_scanout[25]; | |
| 13545 | assign ff_l2d_decc_out_c6_lo1_2_scanin[25]=ff_l2d_decc_out_c6_hi0_4_scanout[25]; | |
| 13546 | assign ff_l2d_decc_out_c6_lo1_4_scanin[25]=ff_l2d_decc_out_c6_lo1_2_scanout[25]; | |
| 13547 | assign ff_l2d_decc_out_c6_hi1_2_scanin[25]=ff_l2d_decc_out_c6_lo1_4_scanout[25]; | |
| 13548 | assign ff_l2d_decc_out_c6_hi1_4_scanin[25]=ff_l2d_decc_out_c6_hi1_2_scanout[25]; | |
| 13549 | assign ff_l2d_decc_out_c6_lo0_2_scanin[26]=ff_l2d_decc_out_c6_hi1_4_scanout[25]; | |
| 13550 | assign ff_l2d_decc_out_c6_lo0_4_scanin[26]=ff_l2d_decc_out_c6_lo0_2_scanout[26]; | |
| 13551 | assign ff_l2d_decc_out_c6_hi0_2_scanin[26]=ff_l2d_decc_out_c6_lo0_4_scanout[26]; | |
| 13552 | assign ff_l2d_decc_out_c6_hi0_4_scanin[26]=ff_l2d_decc_out_c6_hi0_2_scanout[26]; | |
| 13553 | assign ff_l2d_decc_out_c6_lo1_2_scanin[26]=ff_l2d_decc_out_c6_hi0_4_scanout[26]; | |
| 13554 | assign ff_l2d_decc_out_c6_lo1_4_scanin[26]=ff_l2d_decc_out_c6_lo1_2_scanout[26]; | |
| 13555 | assign ff_l2d_decc_out_c6_hi1_2_scanin[26]=ff_l2d_decc_out_c6_lo1_4_scanout[26]; | |
| 13556 | assign ff_l2d_decc_out_c6_hi1_4_scanin[26]=ff_l2d_decc_out_c6_hi1_2_scanout[26]; | |
| 13557 | assign ff_l2d_decc_out_c6_lo0_2_scanin[27]=ff_l2d_decc_out_c6_hi1_4_scanout[26]; | |
| 13558 | assign ff_l2d_decc_out_c6_lo0_4_scanin[27]=ff_l2d_decc_out_c6_lo0_2_scanout[27]; | |
| 13559 | assign ff_l2d_decc_out_c6_hi0_2_scanin[27]=ff_l2d_decc_out_c6_lo0_4_scanout[27]; | |
| 13560 | assign ff_l2d_decc_out_c6_hi0_4_scanin[27]=ff_l2d_decc_out_c6_hi0_2_scanout[27]; | |
| 13561 | assign ff_l2d_decc_out_c6_lo1_2_scanin[27]=ff_l2d_decc_out_c6_hi0_4_scanout[27]; | |
| 13562 | assign ff_l2d_decc_out_c6_lo1_4_scanin[27]=ff_l2d_decc_out_c6_lo1_2_scanout[27]; | |
| 13563 | assign ff_l2d_decc_out_c6_hi1_2_scanin[27]=ff_l2d_decc_out_c6_lo1_4_scanout[27]; | |
| 13564 | assign ff_l2d_decc_out_c6_hi1_4_scanin[27]=ff_l2d_decc_out_c6_hi1_2_scanout[27]; | |
| 13565 | assign ff_l2d_decc_out_c6_lo0_2_scanin[28]=ff_l2d_decc_out_c6_hi1_4_scanout[27]; | |
| 13566 | assign ff_l2d_decc_out_c6_lo0_4_scanin[28]=ff_l2d_decc_out_c6_lo0_2_scanout[28]; | |
| 13567 | assign ff_l2d_decc_out_c6_hi0_2_scanin[28]=ff_l2d_decc_out_c6_lo0_4_scanout[28]; | |
| 13568 | assign ff_l2d_decc_out_c6_hi0_4_scanin[28]=ff_l2d_decc_out_c6_hi0_2_scanout[28]; | |
| 13569 | assign ff_l2d_decc_out_c6_lo1_2_scanin[28]=ff_l2d_decc_out_c6_hi0_4_scanout[28]; | |
| 13570 | assign ff_l2d_decc_out_c6_lo1_4_scanin[28]=ff_l2d_decc_out_c6_lo1_2_scanout[28]; | |
| 13571 | assign ff_l2d_decc_out_c6_hi1_2_scanin[28]=ff_l2d_decc_out_c6_lo1_4_scanout[28]; | |
| 13572 | assign ff_l2d_decc_out_c6_hi1_4_scanin[28]=ff_l2d_decc_out_c6_hi1_2_scanout[28]; | |
| 13573 | assign ff_l2d_decc_out_c6_lo0_2_scanin[29]=ff_l2d_decc_out_c6_hi1_4_scanout[28]; | |
| 13574 | assign ff_l2d_decc_out_c6_lo0_4_scanin[29]=ff_l2d_decc_out_c6_lo0_2_scanout[29]; | |
| 13575 | assign ff_l2d_decc_out_c6_hi0_2_scanin[29]=ff_l2d_decc_out_c6_lo0_4_scanout[29]; | |
| 13576 | assign ff_l2d_decc_out_c6_hi0_4_scanin[29]=ff_l2d_decc_out_c6_hi0_2_scanout[29]; | |
| 13577 | assign ff_l2d_decc_out_c6_lo1_2_scanin[29]=ff_l2d_decc_out_c6_hi0_4_scanout[29]; | |
| 13578 | assign ff_l2d_decc_out_c6_lo1_4_scanin[29]=ff_l2d_decc_out_c6_lo1_2_scanout[29]; | |
| 13579 | assign ff_l2d_decc_out_c6_hi1_2_scanin[29]=ff_l2d_decc_out_c6_lo1_4_scanout[29]; | |
| 13580 | assign ff_l2d_decc_out_c6_hi1_4_scanin[29]=ff_l2d_decc_out_c6_hi1_2_scanout[29]; | |
| 13581 | assign ff_l2d_decc_out_c6_lo0_2_scanin[30]=ff_l2d_decc_out_c6_hi1_4_scanout[29]; | |
| 13582 | assign ff_l2d_decc_out_c6_lo0_4_scanin[30]=ff_l2d_decc_out_c6_lo0_2_scanout[30]; | |
| 13583 | assign ff_l2d_decc_out_c6_hi0_2_scanin[30]=ff_l2d_decc_out_c6_lo0_4_scanout[30]; | |
| 13584 | assign ff_l2d_decc_out_c6_hi0_4_scanin[30]=ff_l2d_decc_out_c6_hi0_2_scanout[30]; | |
| 13585 | assign ff_l2d_decc_out_c6_lo1_2_scanin[30]=ff_l2d_decc_out_c6_hi0_4_scanout[30]; | |
| 13586 | assign ff_l2d_decc_out_c6_lo1_4_scanin[30]=ff_l2d_decc_out_c6_lo1_2_scanout[30]; | |
| 13587 | assign ff_l2d_decc_out_c6_hi1_2_scanin[30]=ff_l2d_decc_out_c6_lo1_4_scanout[30]; | |
| 13588 | assign ff_l2d_decc_out_c6_hi1_4_scanin[30]=ff_l2d_decc_out_c6_hi1_2_scanout[30]; | |
| 13589 | assign ff_l2d_decc_out_c6_lo0_2_scanin[31]=ff_l2d_decc_out_c6_hi1_4_scanout[30]; | |
| 13590 | assign ff_l2d_decc_out_c6_lo0_4_scanin[31]=ff_l2d_decc_out_c6_lo0_2_scanout[31]; | |
| 13591 | assign ff_l2d_decc_out_c6_hi0_2_scanin[31]=ff_l2d_decc_out_c6_lo0_4_scanout[31]; | |
| 13592 | assign ff_l2d_decc_out_c6_hi0_4_scanin[31]=ff_l2d_decc_out_c6_hi0_2_scanout[31]; | |
| 13593 | assign ff_l2d_decc_out_c6_lo1_2_scanin[31]=ff_l2d_decc_out_c6_hi0_4_scanout[31]; | |
| 13594 | assign ff_l2d_decc_out_c6_lo1_4_scanin[31]=ff_l2d_decc_out_c6_lo1_2_scanout[31]; | |
| 13595 | assign ff_l2d_decc_out_c6_hi1_2_scanin[31]=ff_l2d_decc_out_c6_lo1_4_scanout[31]; | |
| 13596 | assign ff_l2d_decc_out_c6_hi1_4_scanin[31]=ff_l2d_decc_out_c6_hi1_2_scanout[31]; | |
| 13597 | assign ff_l2d_decc_out_c6_lo0_2_scanin[32]=ff_l2d_decc_out_c6_hi1_4_scanout[31]; | |
| 13598 | assign ff_l2d_decc_out_c6_lo0_4_scanin[32]=ff_l2d_decc_out_c6_lo0_2_scanout[32]; | |
| 13599 | assign ff_l2d_decc_out_c6_hi0_2_scanin[32]=ff_l2d_decc_out_c6_lo0_4_scanout[32]; | |
| 13600 | assign ff_l2d_decc_out_c6_hi0_4_scanin[32]=ff_l2d_decc_out_c6_hi0_2_scanout[32]; | |
| 13601 | assign ff_l2d_decc_out_c6_lo1_2_scanin[32]=ff_l2d_decc_out_c6_hi0_4_scanout[32]; | |
| 13602 | assign ff_l2d_decc_out_c6_lo1_4_scanin[32]=ff_l2d_decc_out_c6_lo1_2_scanout[32]; | |
| 13603 | assign ff_l2d_decc_out_c6_hi1_2_scanin[32]=ff_l2d_decc_out_c6_lo1_4_scanout[32]; | |
| 13604 | assign ff_l2d_decc_out_c6_hi1_4_scanin[32]=ff_l2d_decc_out_c6_hi1_2_scanout[32]; | |
| 13605 | assign ff_l2d_decc_out_c6_lo0_2_scanin[33]=ff_l2d_decc_out_c6_hi1_4_scanout[32]; | |
| 13606 | assign ff_l2d_decc_out_c6_lo0_4_scanin[33]=ff_l2d_decc_out_c6_lo0_2_scanout[33]; | |
| 13607 | assign ff_l2d_decc_out_c6_hi0_2_scanin[33]=ff_l2d_decc_out_c6_lo0_4_scanout[33]; | |
| 13608 | assign ff_l2d_decc_out_c6_hi0_4_scanin[33]=ff_l2d_decc_out_c6_hi0_2_scanout[33]; | |
| 13609 | assign ff_l2d_decc_out_c6_lo1_2_scanin[33]=ff_l2d_decc_out_c6_hi0_4_scanout[33]; | |
| 13610 | assign ff_l2d_decc_out_c6_lo1_4_scanin[33]=ff_l2d_decc_out_c6_lo1_2_scanout[33]; | |
| 13611 | assign ff_l2d_decc_out_c6_hi1_2_scanin[33]=ff_l2d_decc_out_c6_lo1_4_scanout[33]; | |
| 13612 | assign ff_l2d_decc_out_c6_hi1_4_scanin[33]=ff_l2d_decc_out_c6_hi1_2_scanout[33]; | |
| 13613 | assign ff_l2d_decc_out_c6_lo0_2_scanin[34]=ff_l2d_decc_out_c6_hi1_4_scanout[33]; | |
| 13614 | assign ff_l2d_decc_out_c6_lo0_4_scanin[34]=ff_l2d_decc_out_c6_lo0_2_scanout[34]; | |
| 13615 | assign ff_l2d_decc_out_c6_hi0_2_scanin[34]=ff_l2d_decc_out_c6_lo0_4_scanout[34]; | |
| 13616 | assign ff_l2d_decc_out_c6_hi0_4_scanin[34]=ff_l2d_decc_out_c6_hi0_2_scanout[34]; | |
| 13617 | assign ff_l2d_decc_out_c6_lo1_2_scanin[34]=ff_l2d_decc_out_c6_hi0_4_scanout[34]; | |
| 13618 | assign ff_l2d_decc_out_c6_lo1_4_scanin[34]=ff_l2d_decc_out_c6_lo1_2_scanout[34]; | |
| 13619 | assign ff_l2d_decc_out_c6_hi1_2_scanin[34]=ff_l2d_decc_out_c6_lo1_4_scanout[34]; | |
| 13620 | assign ff_l2d_decc_out_c6_hi1_4_scanin[34]=ff_l2d_decc_out_c6_hi1_2_scanout[34]; | |
| 13621 | assign ff_l2d_decc_out_c6_lo0_2_scanin[35]=ff_l2d_decc_out_c6_hi1_4_scanout[34]; | |
| 13622 | assign ff_l2d_decc_out_c6_lo0_4_scanin[35]=ff_l2d_decc_out_c6_lo0_2_scanout[35]; | |
| 13623 | assign ff_l2d_decc_out_c6_hi0_2_scanin[35]=ff_l2d_decc_out_c6_lo0_4_scanout[35]; | |
| 13624 | assign ff_l2d_decc_out_c6_hi0_4_scanin[35]=ff_l2d_decc_out_c6_hi0_2_scanout[35]; | |
| 13625 | assign ff_l2d_decc_out_c6_lo1_2_scanin[35]=ff_l2d_decc_out_c6_hi0_4_scanout[35]; | |
| 13626 | assign ff_l2d_decc_out_c6_lo1_4_scanin[35]=ff_l2d_decc_out_c6_lo1_2_scanout[35]; | |
| 13627 | assign ff_l2d_decc_out_c6_hi1_2_scanin[35]=ff_l2d_decc_out_c6_lo1_4_scanout[35]; | |
| 13628 | assign ff_l2d_decc_out_c6_hi1_4_scanin[35]=ff_l2d_decc_out_c6_hi1_2_scanout[35]; | |
| 13629 | assign ff_l2d_decc_out_c6_lo0_2_scanin[36]=ff_l2d_decc_out_c6_hi1_4_scanout[35]; | |
| 13630 | assign ff_l2d_decc_out_c6_lo0_4_scanin[36]=ff_l2d_decc_out_c6_lo0_2_scanout[36]; | |
| 13631 | assign ff_l2d_decc_out_c6_hi0_2_scanin[36]=ff_l2d_decc_out_c6_lo0_4_scanout[36]; | |
| 13632 | assign ff_l2d_decc_out_c6_hi0_4_scanin[36]=ff_l2d_decc_out_c6_hi0_2_scanout[36]; | |
| 13633 | assign ff_l2d_decc_out_c6_lo1_2_scanin[36]=ff_l2d_decc_out_c6_hi0_4_scanout[36]; | |
| 13634 | assign ff_l2d_decc_out_c6_lo1_4_scanin[36]=ff_l2d_decc_out_c6_lo1_2_scanout[36]; | |
| 13635 | assign ff_l2d_decc_out_c6_hi1_2_scanin[36]=ff_l2d_decc_out_c6_lo1_4_scanout[36]; | |
| 13636 | assign ff_l2d_decc_out_c6_hi1_4_scanin[36]=ff_l2d_decc_out_c6_hi1_2_scanout[36]; | |
| 13637 | assign ff_l2d_decc_out_c6_lo0_2_scanin[37]=ff_l2d_decc_out_c6_hi1_4_scanout[36]; | |
| 13638 | assign ff_l2d_decc_out_c6_lo0_4_scanin[37]=ff_l2d_decc_out_c6_lo0_2_scanout[37]; | |
| 13639 | assign ff_l2d_decc_out_c6_hi0_2_scanin[37]=ff_l2d_decc_out_c6_lo0_4_scanout[37]; | |
| 13640 | assign ff_l2d_decc_out_c6_hi0_4_scanin[37]=ff_l2d_decc_out_c6_hi0_2_scanout[37]; | |
| 13641 | assign ff_l2d_decc_out_c6_lo1_2_scanin[37]=ff_l2d_decc_out_c6_hi0_4_scanout[37]; | |
| 13642 | assign ff_l2d_decc_out_c6_lo1_4_scanin[37]=ff_l2d_decc_out_c6_lo1_2_scanout[37]; | |
| 13643 | assign ff_l2d_decc_out_c6_hi1_2_scanin[37]=ff_l2d_decc_out_c6_lo1_4_scanout[37]; | |
| 13644 | assign ff_l2d_decc_out_c6_hi1_4_scanin[37]=ff_l2d_decc_out_c6_hi1_2_scanout[37]; | |
| 13645 | assign ff_l2d_decc_out_c6_lo0_2_scanin[38]=ff_l2d_decc_out_c6_hi1_4_scanout[37]; | |
| 13646 | assign ff_l2d_decc_out_c6_lo0_4_scanin[38]=ff_l2d_decc_out_c6_lo0_2_scanout[38]; | |
| 13647 | assign ff_l2d_decc_out_c6_hi0_2_scanin[38]=ff_l2d_decc_out_c6_lo0_4_scanout[38]; | |
| 13648 | assign ff_l2d_decc_out_c6_hi0_4_scanin[38]=ff_l2d_decc_out_c6_hi0_2_scanout[38]; | |
| 13649 | assign ff_l2d_decc_out_c6_lo1_2_scanin[38]=ff_l2d_decc_out_c6_hi0_4_scanout[38]; | |
| 13650 | assign ff_l2d_decc_out_c6_lo1_4_scanin[38]=ff_l2d_decc_out_c6_lo1_2_scanout[38]; | |
| 13651 | assign ff_l2d_decc_out_c6_hi1_2_scanin[38]=ff_l2d_decc_out_c6_lo1_4_scanout[38]; | |
| 13652 | assign ff_l2d_decc_out_c6_hi1_4_scanin[38]=ff_l2d_decc_out_c6_hi1_2_scanout[38]; | |
| 13653 | assign so_q23=ff_l2d_decc_out_c6_hi1_4_scanout[38]; | |
| 13654 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[19]=so_tstmod; | |
| 13655 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[19]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[19]; | |
| 13656 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[20]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[19]; | |
| 13657 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[20]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[20]; | |
| 13658 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[20]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[20]; | |
| 13659 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[20]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[20]; | |
| 13660 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[21]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[20]; | |
| 13661 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[21]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[21]; | |
| 13662 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[21]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[21]; | |
| 13663 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[21]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[21]; | |
| 13664 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[22]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[21]; | |
| 13665 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[22]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[22]; | |
| 13666 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[22]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[22]; | |
| 13667 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[22]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[22]; | |
| 13668 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[23]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[22]; | |
| 13669 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[23]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[23]; | |
| 13670 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[23]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[23]; | |
| 13671 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[23]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[23]; | |
| 13672 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[24]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[23]; | |
| 13673 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[29]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[24]; | |
| 13674 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[28]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[29]; | |
| 13675 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[28]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[28]; | |
| 13676 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[28]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[28]; | |
| 13677 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[28]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[28]; | |
| 13678 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[27]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[28]; | |
| 13679 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[27]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[27]; | |
| 13680 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[27]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[27]; | |
| 13681 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[27]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[27]; | |
| 13682 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[26]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[27]; | |
| 13683 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[26]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[26]; | |
| 13684 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[26]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[26]; | |
| 13685 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[26]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[26]; | |
| 13686 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[25]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[26]; | |
| 13687 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[25]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[25]; | |
| 13688 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[25]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[25]; | |
| 13689 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[25]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[25]; | |
| 13690 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[24]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[25]; | |
| 13691 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[24]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[24]; | |
| 13692 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[24]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[24]; | |
| 13693 | assign ff_cache_col_offset_c5_101_scanin[0]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[24]; | |
| 13694 | assign ff_cache_col_offset_c5_101_scanin[2]=ff_cache_col_offset_c5_101_scanout[0]; | |
| 13695 | assign ff_cache_col_offset_c4_101_scanin[0]=ff_cache_col_offset_c5_101_scanout[2]; | |
| 13696 | assign ff_cache_col_offset_c4_101_scanin[2]=ff_cache_col_offset_c4_101_scanout[0]; | |
| 13697 | assign ff_cache_col_offset_c4_tog_101_scanin[0]=ff_cache_col_offset_c4_101_scanout[2]; | |
| 13698 | assign ff_cache_cache_rd_wr_c5_01_scanin=ff_cache_col_offset_c4_tog_101_scanout[0]; | |
| 13699 | assign ff_cache_col_offset_c5_101_scanin[1]=ff_cache_cache_rd_wr_c5_01_scanout; | |
| 13700 | assign ff_cache_col_offset_c5_101_scanin[3]=ff_cache_col_offset_c5_101_scanout[1]; | |
| 13701 | assign ff_cache_col_offset_c4_101_scanin[1]=ff_cache_col_offset_c5_101_scanout[3]; | |
| 13702 | assign ff_cache_col_offset_c4_101_scanin[3]=ff_cache_col_offset_c4_101_scanout[1]; | |
| 13703 | assign ff_cache_col_offset_c4_tog_101_scanin[1]=ff_cache_col_offset_c4_101_scanout[3]; | |
| 13704 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[38]=ff_cache_col_offset_c4_tog_101_scanout[1]; | |
| 13705 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[38]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[38]; | |
| 13706 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[38]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[38]; | |
| 13707 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[38]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[38]; | |
| 13708 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[37]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[38]; | |
| 13709 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[37]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[37]; | |
| 13710 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[37]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[37]; | |
| 13711 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[37]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[37]; | |
| 13712 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[36]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[37]; | |
| 13713 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[36]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[36]; | |
| 13714 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[36]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[36]; | |
| 13715 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[36]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[36]; | |
| 13716 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[35]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[36]; | |
| 13717 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[35]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[35]; | |
| 13718 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[35]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[35]; | |
| 13719 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[35]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[35]; | |
| 13720 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[34]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[35]; | |
| 13721 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[34]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[34]; | |
| 13722 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[34]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[34]; | |
| 13723 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[29]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[34]; | |
| 13724 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[29]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[29]; | |
| 13725 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[29]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[29]; | |
| 13726 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[30]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[29]; | |
| 13727 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[30]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[30]; | |
| 13728 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[30]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[30]; | |
| 13729 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[30]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[30]; | |
| 13730 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[31]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[30]; | |
| 13731 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[31]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[31]; | |
| 13732 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[31]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[31]; | |
| 13733 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[31]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[31]; | |
| 13734 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[32]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[31]; | |
| 13735 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[32]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[32]; | |
| 13736 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[32]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[32]; | |
| 13737 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[32]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[32]; | |
| 13738 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[33]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[32]; | |
| 13739 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[33]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[33]; | |
| 13740 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[33]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[33]; | |
| 13741 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[33]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[33]; | |
| 13742 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[34]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[33]; | |
| 13743 | assign ff_l2t_l2d_stdecc_c3_scanin[0]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[34]; | |
| 13744 | assign ff_l2t_l2d_stdecc_c3_scanin[1]=ff_l2t_l2d_stdecc_c3_scanout[0]; | |
| 13745 | assign ff_l2t_l2d_stdecc_c3_scanin[2]=ff_l2t_l2d_stdecc_c3_scanout[1]; | |
| 13746 | assign ff_l2t_l2d_stdecc_c3_scanin[3]=ff_l2t_l2d_stdecc_c3_scanout[2]; | |
| 13747 | assign ff_l2t_l2d_stdecc_c3_scanin[4]=ff_l2t_l2d_stdecc_c3_scanout[3]; | |
| 13748 | assign ff_l2t_l2d_stdecc_c3_scanin[5]=ff_l2t_l2d_stdecc_c3_scanout[4]; | |
| 13749 | assign ff_l2t_l2d_stdecc_c3_scanin[6]=ff_l2t_l2d_stdecc_c3_scanout[5]; | |
| 13750 | assign ff_l2t_l2d_stdecc_c3_scanin[7]=ff_l2t_l2d_stdecc_c3_scanout[6]; | |
| 13751 | assign ff_l2t_l2d_stdecc_c3_scanin[8]=ff_l2t_l2d_stdecc_c3_scanout[7]; | |
| 13752 | assign ff_l2t_l2d_stdecc_c3_scanin[9]=ff_l2t_l2d_stdecc_c3_scanout[8]; | |
| 13753 | assign ff_l2t_l2d_stdecc_c3_scanin[10]=ff_l2t_l2d_stdecc_c3_scanout[9]; | |
| 13754 | assign ff_l2t_l2d_stdecc_c3_scanin[11]=ff_l2t_l2d_stdecc_c3_scanout[10]; | |
| 13755 | assign ff_l2t_l2d_stdecc_c3_scanin[12]=ff_l2t_l2d_stdecc_c3_scanout[11]; | |
| 13756 | assign ff_l2t_l2d_stdecc_c3_scanin[13]=ff_l2t_l2d_stdecc_c3_scanout[12]; | |
| 13757 | assign ff_l2t_l2d_stdecc_c3_scanin[14]=ff_l2t_l2d_stdecc_c3_scanout[13]; | |
| 13758 | assign ff_l2t_l2d_stdecc_c3_scanin[15]=ff_l2t_l2d_stdecc_c3_scanout[14]; | |
| 13759 | assign ff_l2t_l2d_stdecc_c3_scanin[16]=ff_l2t_l2d_stdecc_c3_scanout[15]; | |
| 13760 | assign ff_l2t_l2d_stdecc_c3_scanin[17]=ff_l2t_l2d_stdecc_c3_scanout[16]; | |
| 13761 | assign ff_l2t_l2d_stdecc_c3_scanin[18]=ff_l2t_l2d_stdecc_c3_scanout[17]; | |
| 13762 | assign ff_l2t_l2d_stdecc_c3_scanin[19]=ff_l2t_l2d_stdecc_c3_scanout[18]; | |
| 13763 | assign ff_l2t_l2d_stdecc_c3_scanin[20]=ff_l2t_l2d_stdecc_c3_scanout[19]; | |
| 13764 | assign ff_l2t_l2d_stdecc_c3_scanin[21]=ff_l2t_l2d_stdecc_c3_scanout[20]; | |
| 13765 | assign ff_l2t_l2d_stdecc_c3_scanin[22]=ff_l2t_l2d_stdecc_c3_scanout[21]; | |
| 13766 | assign ff_l2t_l2d_stdecc_c3_scanin[23]=ff_l2t_l2d_stdecc_c3_scanout[22]; | |
| 13767 | assign ff_l2t_l2d_stdecc_c3_scanin[24]=ff_l2t_l2d_stdecc_c3_scanout[23]; | |
| 13768 | assign ff_l2t_l2d_stdecc_c3_scanin[25]=ff_l2t_l2d_stdecc_c3_scanout[24]; | |
| 13769 | assign ff_l2t_l2d_stdecc_c3_scanin[26]=ff_l2t_l2d_stdecc_c3_scanout[25]; | |
| 13770 | assign ff_l2t_l2d_stdecc_c3_scanin[27]=ff_l2t_l2d_stdecc_c3_scanout[26]; | |
| 13771 | assign ff_l2t_l2d_stdecc_c3_scanin[28]=ff_l2t_l2d_stdecc_c3_scanout[27]; | |
| 13772 | assign ff_l2t_l2d_stdecc_c3_scanin[29]=ff_l2t_l2d_stdecc_c3_scanout[28]; | |
| 13773 | assign ff_l2t_l2d_stdecc_c3_scanin[30]=ff_l2t_l2d_stdecc_c3_scanout[29]; | |
| 13774 | assign ff_l2t_l2d_stdecc_c3_scanin[31]=ff_l2t_l2d_stdecc_c3_scanout[30]; | |
| 13775 | assign ff_l2t_l2d_stdecc_c3_scanin[32]=ff_l2t_l2d_stdecc_c3_scanout[31]; | |
| 13776 | assign ff_l2t_l2d_stdecc_c3_scanin[33]=ff_l2t_l2d_stdecc_c3_scanout[32]; | |
| 13777 | assign ff_l2t_l2d_stdecc_c3_scanin[34]=ff_l2t_l2d_stdecc_c3_scanout[33]; | |
| 13778 | assign ff_l2t_l2d_stdecc_c3_scanin[35]=ff_l2t_l2d_stdecc_c3_scanout[34]; | |
| 13779 | assign ff_l2t_l2d_stdecc_c3_scanin[36]=ff_l2t_l2d_stdecc_c3_scanout[35]; | |
| 13780 | assign ff_l2t_l2d_stdecc_c3_scanin[37]=ff_l2t_l2d_stdecc_c3_scanout[36]; | |
| 13781 | assign ff_l2t_l2d_stdecc_c3_scanin[38]=ff_l2t_l2d_stdecc_c3_scanout[37]; | |
| 13782 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[38]=ff_l2t_l2d_stdecc_c3_scanout[38]; | |
| 13783 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[38]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[38]; | |
| 13784 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[38]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[38]; | |
| 13785 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[38]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[38]; | |
| 13786 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[37]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[38]; | |
| 13787 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[37]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[37]; | |
| 13788 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[37]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[37]; | |
| 13789 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[37]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[37]; | |
| 13790 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[36]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[37]; | |
| 13791 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[36]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[36]; | |
| 13792 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[36]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[36]; | |
| 13793 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[36]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[36]; | |
| 13794 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[35]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[36]; | |
| 13795 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[35]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[35]; | |
| 13796 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[35]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[35]; | |
| 13797 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[35]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[35]; | |
| 13798 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[34]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[35]; | |
| 13799 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[34]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[34]; | |
| 13800 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[34]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[34]; | |
| 13801 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[29]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[34]; | |
| 13802 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[29]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[29]; | |
| 13803 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[29]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[29]; | |
| 13804 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[30]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[29]; | |
| 13805 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[30]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[30]; | |
| 13806 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[30]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[30]; | |
| 13807 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[30]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[30]; | |
| 13808 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[31]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[30]; | |
| 13809 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[31]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[31]; | |
| 13810 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[31]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[31]; | |
| 13811 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[31]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[31]; | |
| 13812 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[32]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[31]; | |
| 13813 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[32]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[32]; | |
| 13814 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[32]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[32]; | |
| 13815 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[32]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[32]; | |
| 13816 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[33]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[32]; | |
| 13817 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[33]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[33]; | |
| 13818 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[33]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[33]; | |
| 13819 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[33]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[33]; | |
| 13820 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[34]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[33]; | |
| 13821 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[19]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[34]; | |
| 13822 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[19]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[19]; | |
| 13823 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[20]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[19]; | |
| 13824 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[20]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[20]; | |
| 13825 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[20]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[20]; | |
| 13826 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[20]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[20]; | |
| 13827 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[21]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[20]; | |
| 13828 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[21]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[21]; | |
| 13829 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[21]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[21]; | |
| 13830 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[21]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[21]; | |
| 13831 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[22]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[21]; | |
| 13832 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[22]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[22]; | |
| 13833 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[22]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[22]; | |
| 13834 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[22]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[22]; | |
| 13835 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[23]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[22]; | |
| 13836 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[23]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[23]; | |
| 13837 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[23]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[23]; | |
| 13838 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[23]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[23]; | |
| 13839 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[24]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[23]; | |
| 13840 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[29]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[24]; | |
| 13841 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[28]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[29]; | |
| 13842 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[28]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[28]; | |
| 13843 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[28]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[28]; | |
| 13844 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[28]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[28]; | |
| 13845 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[27]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[28]; | |
| 13846 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[27]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[27]; | |
| 13847 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[27]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[27]; | |
| 13848 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[27]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[27]; | |
| 13849 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[26]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[27]; | |
| 13850 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[26]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[26]; | |
| 13851 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[26]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[26]; | |
| 13852 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[26]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[26]; | |
| 13853 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[25]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[26]; | |
| 13854 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[25]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[25]; | |
| 13855 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[25]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[25]; | |
| 13856 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[25]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[25]; | |
| 13857 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[24]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[25]; | |
| 13858 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[24]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[24]; | |
| 13859 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[24]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[24]; | |
| 13860 | assign ff_l2d_decc_out_c6_lo1_1_scanin[19]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[24]; | |
| 13861 | assign ff_l2d_decc_out_c6_lo1_3_scanin[19]=ff_l2d_decc_out_c6_lo1_1_scanout[19]; | |
| 13862 | assign ff_l2d_decc_out_c6_hi1_1_scanin[19]=ff_l2d_decc_out_c6_lo1_3_scanout[19]; | |
| 13863 | assign ff_l2d_decc_out_c6_hi1_3_scanin[19]=ff_l2d_decc_out_c6_hi1_1_scanout[19]; | |
| 13864 | assign ff_l2d_decc_out_c6_lo0_1_scanin[20]=ff_l2d_decc_out_c6_hi1_3_scanout[19]; | |
| 13865 | assign ff_l2d_decc_out_c6_lo0_3_scanin[20]=ff_l2d_decc_out_c6_lo0_1_scanout[20]; | |
| 13866 | assign ff_l2d_decc_out_c6_hi0_1_scanin[20]=ff_l2d_decc_out_c6_lo0_3_scanout[20]; | |
| 13867 | assign ff_l2d_decc_out_c6_hi0_3_scanin[20]=ff_l2d_decc_out_c6_hi0_1_scanout[20]; | |
| 13868 | assign ff_l2d_decc_out_c6_lo1_1_scanin[20]=ff_l2d_decc_out_c6_hi0_3_scanout[20]; | |
| 13869 | assign ff_l2d_decc_out_c6_lo1_3_scanin[20]=ff_l2d_decc_out_c6_lo1_1_scanout[20]; | |
| 13870 | assign ff_l2d_decc_out_c6_hi1_1_scanin[20]=ff_l2d_decc_out_c6_lo1_3_scanout[20]; | |
| 13871 | assign ff_l2d_decc_out_c6_hi1_3_scanin[20]=ff_l2d_decc_out_c6_hi1_1_scanout[20]; | |
| 13872 | assign ff_l2d_decc_out_c6_lo0_1_scanin[21]=ff_l2d_decc_out_c6_hi1_3_scanout[20]; | |
| 13873 | assign ff_l2d_decc_out_c6_lo0_3_scanin[21]=ff_l2d_decc_out_c6_lo0_1_scanout[21]; | |
| 13874 | assign ff_l2d_decc_out_c6_hi0_1_scanin[21]=ff_l2d_decc_out_c6_lo0_3_scanout[21]; | |
| 13875 | assign ff_l2d_decc_out_c6_hi0_3_scanin[21]=ff_l2d_decc_out_c6_hi0_1_scanout[21]; | |
| 13876 | assign ff_l2d_decc_out_c6_lo1_1_scanin[21]=ff_l2d_decc_out_c6_hi0_3_scanout[21]; | |
| 13877 | assign ff_l2d_decc_out_c6_lo1_3_scanin[21]=ff_l2d_decc_out_c6_lo1_1_scanout[21]; | |
| 13878 | assign ff_l2d_decc_out_c6_hi1_1_scanin[21]=ff_l2d_decc_out_c6_lo1_3_scanout[21]; | |
| 13879 | assign ff_l2d_decc_out_c6_hi1_3_scanin[21]=ff_l2d_decc_out_c6_hi1_1_scanout[21]; | |
| 13880 | assign ff_l2d_decc_out_c6_lo0_1_scanin[22]=ff_l2d_decc_out_c6_hi1_3_scanout[21]; | |
| 13881 | assign ff_l2d_decc_out_c6_lo0_3_scanin[22]=ff_l2d_decc_out_c6_lo0_1_scanout[22]; | |
| 13882 | assign ff_l2d_decc_out_c6_hi0_1_scanin[22]=ff_l2d_decc_out_c6_lo0_3_scanout[22]; | |
| 13883 | assign ff_l2d_decc_out_c6_hi0_3_scanin[22]=ff_l2d_decc_out_c6_hi0_1_scanout[22]; | |
| 13884 | assign ff_l2d_decc_out_c6_lo1_1_scanin[22]=ff_l2d_decc_out_c6_hi0_3_scanout[22]; | |
| 13885 | assign ff_l2d_decc_out_c6_lo1_3_scanin[22]=ff_l2d_decc_out_c6_lo1_1_scanout[22]; | |
| 13886 | assign ff_l2d_decc_out_c6_hi1_1_scanin[22]=ff_l2d_decc_out_c6_lo1_3_scanout[22]; | |
| 13887 | assign ff_l2d_decc_out_c6_hi1_3_scanin[22]=ff_l2d_decc_out_c6_hi1_1_scanout[22]; | |
| 13888 | assign ff_l2d_decc_out_c6_lo0_1_scanin[23]=ff_l2d_decc_out_c6_hi1_3_scanout[22]; | |
| 13889 | assign ff_l2d_decc_out_c6_lo0_3_scanin[23]=ff_l2d_decc_out_c6_lo0_1_scanout[23]; | |
| 13890 | assign ff_l2d_decc_out_c6_hi0_1_scanin[23]=ff_l2d_decc_out_c6_lo0_3_scanout[23]; | |
| 13891 | assign ff_l2d_decc_out_c6_hi0_3_scanin[23]=ff_l2d_decc_out_c6_hi0_1_scanout[23]; | |
| 13892 | assign ff_l2d_decc_out_c6_lo1_1_scanin[23]=ff_l2d_decc_out_c6_hi0_3_scanout[23]; | |
| 13893 | assign ff_l2d_decc_out_c6_lo1_3_scanin[23]=ff_l2d_decc_out_c6_lo1_1_scanout[23]; | |
| 13894 | assign ff_l2d_decc_out_c6_hi1_1_scanin[23]=ff_l2d_decc_out_c6_lo1_3_scanout[23]; | |
| 13895 | assign ff_l2d_decc_out_c6_hi1_3_scanin[23]=ff_l2d_decc_out_c6_hi1_1_scanout[23]; | |
| 13896 | assign ff_l2d_decc_out_c6_lo0_1_scanin[24]=ff_l2d_decc_out_c6_hi1_3_scanout[23]; | |
| 13897 | assign ff_l2d_decc_out_c6_lo0_3_scanin[24]=ff_l2d_decc_out_c6_lo0_1_scanout[24]; | |
| 13898 | assign ff_l2d_decc_out_c6_hi0_1_scanin[24]=ff_l2d_decc_out_c6_lo0_3_scanout[24]; | |
| 13899 | assign ff_l2d_decc_out_c6_hi0_3_scanin[24]=ff_l2d_decc_out_c6_hi0_1_scanout[24]; | |
| 13900 | assign ff_l2d_decc_out_c6_lo1_1_scanin[24]=ff_l2d_decc_out_c6_hi0_3_scanout[24]; | |
| 13901 | assign ff_l2d_decc_out_c6_lo1_3_scanin[24]=ff_l2d_decc_out_c6_lo1_1_scanout[24]; | |
| 13902 | assign ff_l2d_decc_out_c6_hi1_1_scanin[24]=ff_l2d_decc_out_c6_lo1_3_scanout[24]; | |
| 13903 | assign ff_l2d_decc_out_c6_hi1_3_scanin[24]=ff_l2d_decc_out_c6_hi1_1_scanout[24]; | |
| 13904 | assign ff_l2d_decc_out_c6_lo0_1_scanin[25]=ff_l2d_decc_out_c6_hi1_3_scanout[24]; | |
| 13905 | assign ff_l2d_decc_out_c6_lo0_3_scanin[25]=ff_l2d_decc_out_c6_lo0_1_scanout[25]; | |
| 13906 | assign ff_l2d_decc_out_c6_hi0_1_scanin[25]=ff_l2d_decc_out_c6_lo0_3_scanout[25]; | |
| 13907 | assign ff_l2d_decc_out_c6_hi0_3_scanin[25]=ff_l2d_decc_out_c6_hi0_1_scanout[25]; | |
| 13908 | assign ff_l2d_decc_out_c6_lo1_1_scanin[25]=ff_l2d_decc_out_c6_hi0_3_scanout[25]; | |
| 13909 | assign ff_l2d_decc_out_c6_lo1_3_scanin[25]=ff_l2d_decc_out_c6_lo1_1_scanout[25]; | |
| 13910 | assign ff_l2d_decc_out_c6_hi1_1_scanin[25]=ff_l2d_decc_out_c6_lo1_3_scanout[25]; | |
| 13911 | assign ff_l2d_decc_out_c6_hi1_3_scanin[25]=ff_l2d_decc_out_c6_hi1_1_scanout[25]; | |
| 13912 | assign ff_l2d_decc_out_c6_lo0_1_scanin[26]=ff_l2d_decc_out_c6_hi1_3_scanout[25]; | |
| 13913 | assign ff_l2d_decc_out_c6_lo0_3_scanin[26]=ff_l2d_decc_out_c6_lo0_1_scanout[26]; | |
| 13914 | assign ff_l2d_decc_out_c6_hi0_1_scanin[26]=ff_l2d_decc_out_c6_lo0_3_scanout[26]; | |
| 13915 | assign ff_l2d_decc_out_c6_hi0_3_scanin[26]=ff_l2d_decc_out_c6_hi0_1_scanout[26]; | |
| 13916 | assign ff_l2d_decc_out_c6_lo1_1_scanin[26]=ff_l2d_decc_out_c6_hi0_3_scanout[26]; | |
| 13917 | assign ff_l2d_decc_out_c6_lo1_3_scanin[26]=ff_l2d_decc_out_c6_lo1_1_scanout[26]; | |
| 13918 | assign ff_l2d_decc_out_c6_hi1_1_scanin[26]=ff_l2d_decc_out_c6_lo1_3_scanout[26]; | |
| 13919 | assign ff_l2d_decc_out_c6_hi1_3_scanin[26]=ff_l2d_decc_out_c6_hi1_1_scanout[26]; | |
| 13920 | assign ff_l2d_decc_out_c6_lo0_1_scanin[27]=ff_l2d_decc_out_c6_hi1_3_scanout[26]; | |
| 13921 | assign ff_l2d_decc_out_c6_lo0_3_scanin[27]=ff_l2d_decc_out_c6_lo0_1_scanout[27]; | |
| 13922 | assign ff_l2d_decc_out_c6_hi0_1_scanin[27]=ff_l2d_decc_out_c6_lo0_3_scanout[27]; | |
| 13923 | assign ff_l2d_decc_out_c6_hi0_3_scanin[27]=ff_l2d_decc_out_c6_hi0_1_scanout[27]; | |
| 13924 | assign ff_l2d_decc_out_c6_lo1_1_scanin[27]=ff_l2d_decc_out_c6_hi0_3_scanout[27]; | |
| 13925 | assign ff_l2d_decc_out_c6_lo1_3_scanin[27]=ff_l2d_decc_out_c6_lo1_1_scanout[27]; | |
| 13926 | assign ff_l2d_decc_out_c6_hi1_1_scanin[27]=ff_l2d_decc_out_c6_lo1_3_scanout[27]; | |
| 13927 | assign ff_l2d_decc_out_c6_hi1_3_scanin[27]=ff_l2d_decc_out_c6_hi1_1_scanout[27]; | |
| 13928 | assign ff_l2d_decc_out_c6_lo0_1_scanin[28]=ff_l2d_decc_out_c6_hi1_3_scanout[27]; | |
| 13929 | assign ff_l2d_decc_out_c6_lo0_3_scanin[28]=ff_l2d_decc_out_c6_lo0_1_scanout[28]; | |
| 13930 | assign ff_l2d_decc_out_c6_hi0_1_scanin[28]=ff_l2d_decc_out_c6_lo0_3_scanout[28]; | |
| 13931 | assign ff_l2d_decc_out_c6_hi0_3_scanin[28]=ff_l2d_decc_out_c6_hi0_1_scanout[28]; | |
| 13932 | assign ff_l2d_decc_out_c6_lo1_1_scanin[28]=ff_l2d_decc_out_c6_hi0_3_scanout[28]; | |
| 13933 | assign ff_l2d_decc_out_c6_lo1_3_scanin[28]=ff_l2d_decc_out_c6_lo1_1_scanout[28]; | |
| 13934 | assign ff_l2d_decc_out_c6_hi1_1_scanin[28]=ff_l2d_decc_out_c6_lo1_3_scanout[28]; | |
| 13935 | assign ff_l2d_decc_out_c6_hi1_3_scanin[28]=ff_l2d_decc_out_c6_hi1_1_scanout[28]; | |
| 13936 | assign ff_l2d_decc_out_c6_lo0_1_scanin[29]=ff_l2d_decc_out_c6_hi1_3_scanout[28]; | |
| 13937 | assign ff_l2d_decc_out_c6_lo0_3_scanin[29]=ff_l2d_decc_out_c6_lo0_1_scanout[29]; | |
| 13938 | assign ff_l2d_decc_out_c6_hi0_1_scanin[29]=ff_l2d_decc_out_c6_lo0_3_scanout[29]; | |
| 13939 | assign ff_l2d_decc_out_c6_hi0_3_scanin[29]=ff_l2d_decc_out_c6_hi0_1_scanout[29]; | |
| 13940 | assign ff_l2d_decc_out_c6_lo1_1_scanin[29]=ff_l2d_decc_out_c6_hi0_3_scanout[29]; | |
| 13941 | assign ff_l2d_decc_out_c6_lo1_3_scanin[29]=ff_l2d_decc_out_c6_lo1_1_scanout[29]; | |
| 13942 | assign ff_l2d_decc_out_c6_hi1_1_scanin[29]=ff_l2d_decc_out_c6_lo1_3_scanout[29]; | |
| 13943 | assign ff_l2d_decc_out_c6_hi1_3_scanin[29]=ff_l2d_decc_out_c6_hi1_1_scanout[29]; | |
| 13944 | assign ff_l2d_decc_out_c6_lo0_1_scanin[30]=ff_l2d_decc_out_c6_hi1_3_scanout[29]; | |
| 13945 | assign ff_l2d_decc_out_c6_lo0_3_scanin[30]=ff_l2d_decc_out_c6_lo0_1_scanout[30]; | |
| 13946 | assign ff_l2d_decc_out_c6_hi0_1_scanin[30]=ff_l2d_decc_out_c6_lo0_3_scanout[30]; | |
| 13947 | assign ff_l2d_decc_out_c6_hi0_3_scanin[30]=ff_l2d_decc_out_c6_hi0_1_scanout[30]; | |
| 13948 | assign ff_l2d_decc_out_c6_lo1_1_scanin[30]=ff_l2d_decc_out_c6_hi0_3_scanout[30]; | |
| 13949 | assign ff_l2d_decc_out_c6_lo1_3_scanin[30]=ff_l2d_decc_out_c6_lo1_1_scanout[30]; | |
| 13950 | assign ff_l2d_decc_out_c6_hi1_1_scanin[30]=ff_l2d_decc_out_c6_lo1_3_scanout[30]; | |
| 13951 | assign ff_l2d_decc_out_c6_hi1_3_scanin[30]=ff_l2d_decc_out_c6_hi1_1_scanout[30]; | |
| 13952 | assign ff_l2d_decc_out_c6_lo0_1_scanin[31]=ff_l2d_decc_out_c6_hi1_3_scanout[30]; | |
| 13953 | assign ff_l2d_decc_out_c6_lo0_3_scanin[31]=ff_l2d_decc_out_c6_lo0_1_scanout[31]; | |
| 13954 | assign ff_l2d_decc_out_c6_hi0_1_scanin[31]=ff_l2d_decc_out_c6_lo0_3_scanout[31]; | |
| 13955 | assign ff_l2d_decc_out_c6_hi0_3_scanin[31]=ff_l2d_decc_out_c6_hi0_1_scanout[31]; | |
| 13956 | assign ff_l2d_decc_out_c6_lo1_1_scanin[31]=ff_l2d_decc_out_c6_hi0_3_scanout[31]; | |
| 13957 | assign ff_l2d_decc_out_c6_lo1_3_scanin[31]=ff_l2d_decc_out_c6_lo1_1_scanout[31]; | |
| 13958 | assign ff_l2d_decc_out_c6_hi1_1_scanin[31]=ff_l2d_decc_out_c6_lo1_3_scanout[31]; | |
| 13959 | assign ff_l2d_decc_out_c6_hi1_3_scanin[31]=ff_l2d_decc_out_c6_hi1_1_scanout[31]; | |
| 13960 | assign ff_l2d_decc_out_c6_lo0_1_scanin[32]=ff_l2d_decc_out_c6_hi1_3_scanout[31]; | |
| 13961 | assign ff_l2d_decc_out_c6_lo0_3_scanin[32]=ff_l2d_decc_out_c6_lo0_1_scanout[32]; | |
| 13962 | assign ff_l2d_decc_out_c6_hi0_1_scanin[32]=ff_l2d_decc_out_c6_lo0_3_scanout[32]; | |
| 13963 | assign ff_l2d_decc_out_c6_hi0_3_scanin[32]=ff_l2d_decc_out_c6_hi0_1_scanout[32]; | |
| 13964 | assign ff_l2d_decc_out_c6_lo1_1_scanin[32]=ff_l2d_decc_out_c6_hi0_3_scanout[32]; | |
| 13965 | assign ff_l2d_decc_out_c6_lo1_3_scanin[32]=ff_l2d_decc_out_c6_lo1_1_scanout[32]; | |
| 13966 | assign ff_l2d_decc_out_c6_hi1_1_scanin[32]=ff_l2d_decc_out_c6_lo1_3_scanout[32]; | |
| 13967 | assign ff_l2d_decc_out_c6_hi1_3_scanin[32]=ff_l2d_decc_out_c6_hi1_1_scanout[32]; | |
| 13968 | assign ff_l2d_decc_out_c6_lo0_1_scanin[33]=ff_l2d_decc_out_c6_hi1_3_scanout[32]; | |
| 13969 | assign ff_l2d_decc_out_c6_lo0_3_scanin[33]=ff_l2d_decc_out_c6_lo0_1_scanout[33]; | |
| 13970 | assign ff_l2d_decc_out_c6_hi0_1_scanin[33]=ff_l2d_decc_out_c6_lo0_3_scanout[33]; | |
| 13971 | assign ff_l2d_decc_out_c6_hi0_3_scanin[33]=ff_l2d_decc_out_c6_hi0_1_scanout[33]; | |
| 13972 | assign ff_l2d_decc_out_c6_lo1_1_scanin[33]=ff_l2d_decc_out_c6_hi0_3_scanout[33]; | |
| 13973 | assign ff_l2d_decc_out_c6_lo1_3_scanin[33]=ff_l2d_decc_out_c6_lo1_1_scanout[33]; | |
| 13974 | assign ff_l2d_decc_out_c6_hi1_1_scanin[33]=ff_l2d_decc_out_c6_lo1_3_scanout[33]; | |
| 13975 | assign ff_l2d_decc_out_c6_hi1_3_scanin[33]=ff_l2d_decc_out_c6_hi1_1_scanout[33]; | |
| 13976 | assign ff_l2d_decc_out_c6_lo0_1_scanin[34]=ff_l2d_decc_out_c6_hi1_3_scanout[33]; | |
| 13977 | assign ff_l2d_decc_out_c6_lo0_3_scanin[34]=ff_l2d_decc_out_c6_lo0_1_scanout[34]; | |
| 13978 | assign ff_l2d_decc_out_c6_hi0_1_scanin[34]=ff_l2d_decc_out_c6_lo0_3_scanout[34]; | |
| 13979 | assign ff_l2d_decc_out_c6_hi0_3_scanin[34]=ff_l2d_decc_out_c6_hi0_1_scanout[34]; | |
| 13980 | assign ff_l2d_decc_out_c6_lo1_1_scanin[34]=ff_l2d_decc_out_c6_hi0_3_scanout[34]; | |
| 13981 | assign ff_l2d_decc_out_c6_lo1_3_scanin[34]=ff_l2d_decc_out_c6_lo1_1_scanout[34]; | |
| 13982 | assign ff_l2d_decc_out_c6_hi1_1_scanin[34]=ff_l2d_decc_out_c6_lo1_3_scanout[34]; | |
| 13983 | assign ff_l2d_decc_out_c6_hi1_3_scanin[34]=ff_l2d_decc_out_c6_hi1_1_scanout[34]; | |
| 13984 | assign ff_l2d_decc_out_c6_lo0_1_scanin[35]=ff_l2d_decc_out_c6_hi1_3_scanout[34]; | |
| 13985 | assign ff_l2d_decc_out_c6_lo0_3_scanin[35]=ff_l2d_decc_out_c6_lo0_1_scanout[35]; | |
| 13986 | assign ff_l2d_decc_out_c6_hi0_1_scanin[35]=ff_l2d_decc_out_c6_lo0_3_scanout[35]; | |
| 13987 | assign ff_l2d_decc_out_c6_hi0_3_scanin[35]=ff_l2d_decc_out_c6_hi0_1_scanout[35]; | |
| 13988 | assign ff_l2d_decc_out_c6_lo1_1_scanin[35]=ff_l2d_decc_out_c6_hi0_3_scanout[35]; | |
| 13989 | assign ff_l2d_decc_out_c6_lo1_3_scanin[35]=ff_l2d_decc_out_c6_lo1_1_scanout[35]; | |
| 13990 | assign ff_l2d_decc_out_c6_hi1_1_scanin[35]=ff_l2d_decc_out_c6_lo1_3_scanout[35]; | |
| 13991 | assign ff_l2d_decc_out_c6_hi1_3_scanin[35]=ff_l2d_decc_out_c6_hi1_1_scanout[35]; | |
| 13992 | assign ff_l2d_decc_out_c6_lo0_1_scanin[36]=ff_l2d_decc_out_c6_hi1_3_scanout[35]; | |
| 13993 | assign ff_l2d_decc_out_c6_lo0_3_scanin[36]=ff_l2d_decc_out_c6_lo0_1_scanout[36]; | |
| 13994 | assign ff_l2d_decc_out_c6_hi0_1_scanin[36]=ff_l2d_decc_out_c6_lo0_3_scanout[36]; | |
| 13995 | assign ff_l2d_decc_out_c6_hi0_3_scanin[36]=ff_l2d_decc_out_c6_hi0_1_scanout[36]; | |
| 13996 | assign ff_l2d_decc_out_c6_lo1_1_scanin[36]=ff_l2d_decc_out_c6_hi0_3_scanout[36]; | |
| 13997 | assign ff_l2d_decc_out_c6_lo1_3_scanin[36]=ff_l2d_decc_out_c6_lo1_1_scanout[36]; | |
| 13998 | assign ff_l2d_decc_out_c6_hi1_1_scanin[36]=ff_l2d_decc_out_c6_lo1_3_scanout[36]; | |
| 13999 | assign ff_l2d_decc_out_c6_hi1_3_scanin[36]=ff_l2d_decc_out_c6_hi1_1_scanout[36]; | |
| 14000 | assign ff_l2d_decc_out_c6_lo0_1_scanin[37]=ff_l2d_decc_out_c6_hi1_3_scanout[36]; | |
| 14001 | assign ff_l2d_decc_out_c6_lo0_3_scanin[37]=ff_l2d_decc_out_c6_lo0_1_scanout[37]; | |
| 14002 | assign ff_l2d_decc_out_c6_hi0_1_scanin[37]=ff_l2d_decc_out_c6_lo0_3_scanout[37]; | |
| 14003 | assign ff_l2d_decc_out_c6_hi0_3_scanin[37]=ff_l2d_decc_out_c6_hi0_1_scanout[37]; | |
| 14004 | assign ff_l2d_decc_out_c6_lo1_1_scanin[37]=ff_l2d_decc_out_c6_hi0_3_scanout[37]; | |
| 14005 | assign ff_l2d_decc_out_c6_lo1_3_scanin[37]=ff_l2d_decc_out_c6_lo1_1_scanout[37]; | |
| 14006 | assign ff_l2d_decc_out_c6_hi1_1_scanin[37]=ff_l2d_decc_out_c6_lo1_3_scanout[37]; | |
| 14007 | assign ff_l2d_decc_out_c6_hi1_3_scanin[37]=ff_l2d_decc_out_c6_hi1_1_scanout[37]; | |
| 14008 | assign ff_l2d_decc_out_c6_lo0_1_scanin[38]=ff_l2d_decc_out_c6_hi1_3_scanout[37]; | |
| 14009 | assign ff_l2d_decc_out_c6_lo0_3_scanin[38]=ff_l2d_decc_out_c6_lo0_1_scanout[38]; | |
| 14010 | assign ff_l2d_decc_out_c6_hi0_1_scanin[38]=ff_l2d_decc_out_c6_lo0_3_scanout[38]; | |
| 14011 | assign ff_l2d_decc_out_c6_hi0_3_scanin[38]=ff_l2d_decc_out_c6_hi0_1_scanout[38]; | |
| 14012 | assign ff_l2d_decc_out_c6_lo1_1_scanin[38]=ff_l2d_decc_out_c6_hi0_3_scanout[38]; | |
| 14013 | assign ff_l2d_decc_out_c6_lo1_3_scanin[38]=ff_l2d_decc_out_c6_lo1_1_scanout[38]; | |
| 14014 | assign ff_l2d_decc_out_c6_hi1_1_scanin[38]=ff_l2d_decc_out_c6_lo1_3_scanout[38]; | |
| 14015 | assign ff_l2d_decc_out_c6_hi1_3_scanin[38]=ff_l2d_decc_out_c6_hi1_1_scanout[38]; | |
| 14016 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[0]=ff_l2d_decc_out_c6_hi1_3_scanout[38]; | |
| 14017 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[0]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[0]; | |
| 14018 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[0]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[0]; | |
| 14019 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[0]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[0]; | |
| 14020 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[1]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[0]; | |
| 14021 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[1]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[1]; | |
| 14022 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[1]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[1]; | |
| 14023 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[1]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[1]; | |
| 14024 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[2]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[1]; | |
| 14025 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[2]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[2]; | |
| 14026 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[2]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[2]; | |
| 14027 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[2]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[2]; | |
| 14028 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[3]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[2]; | |
| 14029 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[3]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[3]; | |
| 14030 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[3]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[3]; | |
| 14031 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[3]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[3]; | |
| 14032 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[4]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[3]; | |
| 14033 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[4]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[4]; | |
| 14034 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[4]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[4]; | |
| 14035 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[9]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[4]; | |
| 14036 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[9]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[9]; | |
| 14037 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[9]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[9]; | |
| 14038 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[8]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[9]; | |
| 14039 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[8]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[8]; | |
| 14040 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[8]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[8]; | |
| 14041 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[8]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[8]; | |
| 14042 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[7]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[8]; | |
| 14043 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[7]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[7]; | |
| 14044 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[7]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[7]; | |
| 14045 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[7]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[7]; | |
| 14046 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[6]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[7]; | |
| 14047 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[6]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[6]; | |
| 14048 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[6]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[6]; | |
| 14049 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[6]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[6]; | |
| 14050 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[5]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[6]; | |
| 14051 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[5]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[5]; | |
| 14052 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[5]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[5]; | |
| 14053 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[5]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[5]; | |
| 14054 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[4]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[5]; | |
| 14055 | assign ff_cache_col_offset_c5_001_scanin[0]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[4]; | |
| 14056 | assign ff_cache_col_offset_c5_001_scanin[2]=ff_cache_col_offset_c5_001_scanout[0]; | |
| 14057 | assign ff_cache_col_offset_c4_001_scanin[0]=ff_cache_col_offset_c5_001_scanout[2]; | |
| 14058 | assign ff_cache_col_offset_c4_001_scanin[2]=ff_cache_col_offset_c4_001_scanout[0]; | |
| 14059 | assign ff_cache_col_offset_c4_tog_001_scanin[0]=ff_cache_col_offset_c4_001_scanout[2]; | |
| 14060 | assign ff_cache_cache_rd_wr_c5_00_scanin=ff_cache_col_offset_c4_tog_001_scanout[0]; | |
| 14061 | assign ff_cache_col_offset_c5_001_scanin[1]=ff_cache_cache_rd_wr_c5_00_scanout; | |
| 14062 | assign ff_cache_col_offset_c5_001_scanin[3]=ff_cache_col_offset_c5_001_scanout[1]; | |
| 14063 | assign ff_cache_col_offset_c4_001_scanin[1]=ff_cache_col_offset_c5_001_scanout[3]; | |
| 14064 | assign ff_cache_col_offset_c4_001_scanin[3]=ff_cache_col_offset_c4_001_scanout[1]; | |
| 14065 | assign ff_cache_col_offset_c4_tog_001_scanin[1]=ff_cache_col_offset_c4_001_scanout[3]; | |
| 14066 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[19]=ff_cache_col_offset_c4_tog_001_scanout[1]; | |
| 14067 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[19]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[19]; | |
| 14068 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[18]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[19]; | |
| 14069 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[18]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[18]; | |
| 14070 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[18]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[18]; | |
| 14071 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[18]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[18]; | |
| 14072 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[17]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[18]; | |
| 14073 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[17]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[17]; | |
| 14074 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[17]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[17]; | |
| 14075 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[17]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[17]; | |
| 14076 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[16]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[17]; | |
| 14077 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[16]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[16]; | |
| 14078 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[16]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[16]; | |
| 14079 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[16]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[16]; | |
| 14080 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[15]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[16]; | |
| 14081 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[15]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[15]; | |
| 14082 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[15]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[15]; | |
| 14083 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[15]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[15]; | |
| 14084 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[14]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[15]; | |
| 14085 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[9]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[14]; | |
| 14086 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[10]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[9]; | |
| 14087 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[10]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[10]; | |
| 14088 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[10]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[10]; | |
| 14089 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[10]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[10]; | |
| 14090 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[11]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[10]; | |
| 14091 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[11]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[11]; | |
| 14092 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[11]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[11]; | |
| 14093 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[11]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[11]; | |
| 14094 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[12]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[11]; | |
| 14095 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[12]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[12]; | |
| 14096 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[12]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[12]; | |
| 14097 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[12]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[12]; | |
| 14098 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[13]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[12]; | |
| 14099 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[13]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[13]; | |
| 14100 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[13]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[13]; | |
| 14101 | assign ff_l2b_l2d_fbdecc_c52_hi1_3_scanin[13]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[13]; | |
| 14102 | assign ff_l2b_l2d_fbdecc_c52_lo0_3_scanin[14]=ff_l2b_l2d_fbdecc_c52_hi1_3_scanout[13]; | |
| 14103 | assign ff_l2b_l2d_fbdecc_c52_hi0_3_scanin[14]=ff_l2b_l2d_fbdecc_c52_lo0_3_scanout[14]; | |
| 14104 | assign ff_l2b_l2d_fbdecc_c52_lo1_3_scanin[14]=ff_l2b_l2d_fbdecc_c52_hi0_3_scanout[14]; | |
| 14105 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[19]=ff_l2b_l2d_fbdecc_c52_lo1_3_scanout[14]; | |
| 14106 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[19]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[19]; | |
| 14107 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[18]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[19]; | |
| 14108 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[18]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[18]; | |
| 14109 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[18]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[18]; | |
| 14110 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[18]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[18]; | |
| 14111 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[17]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[18]; | |
| 14112 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[17]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[17]; | |
| 14113 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[17]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[17]; | |
| 14114 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[17]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[17]; | |
| 14115 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[16]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[17]; | |
| 14116 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[16]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[16]; | |
| 14117 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[16]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[16]; | |
| 14118 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[16]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[16]; | |
| 14119 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[15]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[16]; | |
| 14120 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[15]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[15]; | |
| 14121 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[15]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[15]; | |
| 14122 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[15]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[15]; | |
| 14123 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[14]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[15]; | |
| 14124 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[9]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[14]; | |
| 14125 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[10]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[9]; | |
| 14126 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[10]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[10]; | |
| 14127 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[10]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[10]; | |
| 14128 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[10]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[10]; | |
| 14129 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[11]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[10]; | |
| 14130 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[11]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[11]; | |
| 14131 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[11]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[11]; | |
| 14132 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[11]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[11]; | |
| 14133 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[12]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[11]; | |
| 14134 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[12]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[12]; | |
| 14135 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[12]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[12]; | |
| 14136 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[12]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[12]; | |
| 14137 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[13]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[12]; | |
| 14138 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[13]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[13]; | |
| 14139 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[13]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[13]; | |
| 14140 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[13]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[13]; | |
| 14141 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[14]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[13]; | |
| 14142 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[14]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[14]; | |
| 14143 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[14]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[14]; | |
| 14144 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[0]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[14]; | |
| 14145 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[0]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[0]; | |
| 14146 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[0]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[0]; | |
| 14147 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[0]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[0]; | |
| 14148 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[1]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[0]; | |
| 14149 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[1]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[1]; | |
| 14150 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[1]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[1]; | |
| 14151 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[1]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[1]; | |
| 14152 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[2]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[1]; | |
| 14153 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[2]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[2]; | |
| 14154 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[2]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[2]; | |
| 14155 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[2]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[2]; | |
| 14156 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[3]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[2]; | |
| 14157 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[3]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[3]; | |
| 14158 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[3]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[3]; | |
| 14159 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[3]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[3]; | |
| 14160 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[4]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[3]; | |
| 14161 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[4]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[4]; | |
| 14162 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[4]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[4]; | |
| 14163 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[9]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[4]; | |
| 14164 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[9]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[9]; | |
| 14165 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[9]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[9]; | |
| 14166 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[8]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[9]; | |
| 14167 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[8]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[8]; | |
| 14168 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[8]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[8]; | |
| 14169 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[8]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[8]; | |
| 14170 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[7]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[8]; | |
| 14171 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[7]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[7]; | |
| 14172 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[7]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[7]; | |
| 14173 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[7]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[7]; | |
| 14174 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[6]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[7]; | |
| 14175 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[6]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[6]; | |
| 14176 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[6]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[6]; | |
| 14177 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[6]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[6]; | |
| 14178 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[5]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[6]; | |
| 14179 | assign ff_l2b_l2d_fbdecc_c52_lo1_1_scanin[5]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[5]; | |
| 14180 | assign ff_l2b_l2d_fbdecc_c52_hi0_1_scanin[5]=ff_l2b_l2d_fbdecc_c52_lo1_1_scanout[5]; | |
| 14181 | assign ff_l2b_l2d_fbdecc_c52_lo0_1_scanin[5]=ff_l2b_l2d_fbdecc_c52_hi0_1_scanout[5]; | |
| 14182 | assign ff_l2b_l2d_fbdecc_c52_hi1_1_scanin[4]=ff_l2b_l2d_fbdecc_c52_lo0_1_scanout[5]; | |
| 14183 | assign ff_l2d_decc_out_c6_lo0_1_scanin[0]=ff_l2b_l2d_fbdecc_c52_hi1_1_scanout[4]; | |
| 14184 | assign ff_l2d_decc_out_c6_lo0_3_scanin[0]=ff_l2d_decc_out_c6_lo0_1_scanout[0]; | |
| 14185 | assign ff_l2d_decc_out_c6_hi0_1_scanin[0]=ff_l2d_decc_out_c6_lo0_3_scanout[0]; | |
| 14186 | assign ff_l2d_decc_out_c6_hi0_3_scanin[0]=ff_l2d_decc_out_c6_hi0_1_scanout[0]; | |
| 14187 | assign ff_l2d_decc_out_c6_lo1_1_scanin[0]=ff_l2d_decc_out_c6_hi0_3_scanout[0]; | |
| 14188 | assign ff_l2d_decc_out_c6_lo1_3_scanin[0]=ff_l2d_decc_out_c6_lo1_1_scanout[0]; | |
| 14189 | assign ff_l2d_decc_out_c6_hi1_1_scanin[0]=ff_l2d_decc_out_c6_lo1_3_scanout[0]; | |
| 14190 | assign ff_l2d_decc_out_c6_hi1_3_scanin[0]=ff_l2d_decc_out_c6_hi1_1_scanout[0]; | |
| 14191 | assign ff_l2d_decc_out_c6_lo0_1_scanin[1]=ff_l2d_decc_out_c6_hi1_3_scanout[0]; | |
| 14192 | assign ff_l2d_decc_out_c6_lo0_3_scanin[1]=ff_l2d_decc_out_c6_lo0_1_scanout[1]; | |
| 14193 | assign ff_l2d_decc_out_c6_hi0_1_scanin[1]=ff_l2d_decc_out_c6_lo0_3_scanout[1]; | |
| 14194 | assign ff_l2d_decc_out_c6_hi0_3_scanin[1]=ff_l2d_decc_out_c6_hi0_1_scanout[1]; | |
| 14195 | assign ff_l2d_decc_out_c6_lo1_1_scanin[1]=ff_l2d_decc_out_c6_hi0_3_scanout[1]; | |
| 14196 | assign ff_l2d_decc_out_c6_lo1_3_scanin[1]=ff_l2d_decc_out_c6_lo1_1_scanout[1]; | |
| 14197 | assign ff_l2d_decc_out_c6_hi1_1_scanin[1]=ff_l2d_decc_out_c6_lo1_3_scanout[1]; | |
| 14198 | assign ff_l2d_decc_out_c6_hi1_3_scanin[1]=ff_l2d_decc_out_c6_hi1_1_scanout[1]; | |
| 14199 | assign ff_l2d_decc_out_c6_lo0_1_scanin[2]=ff_l2d_decc_out_c6_hi1_3_scanout[1]; | |
| 14200 | assign ff_l2d_decc_out_c6_lo0_3_scanin[2]=ff_l2d_decc_out_c6_lo0_1_scanout[2]; | |
| 14201 | assign ff_l2d_decc_out_c6_hi0_1_scanin[2]=ff_l2d_decc_out_c6_lo0_3_scanout[2]; | |
| 14202 | assign ff_l2d_decc_out_c6_hi0_3_scanin[2]=ff_l2d_decc_out_c6_hi0_1_scanout[2]; | |
| 14203 | assign ff_l2d_decc_out_c6_lo1_1_scanin[2]=ff_l2d_decc_out_c6_hi0_3_scanout[2]; | |
| 14204 | assign ff_l2d_decc_out_c6_lo1_3_scanin[2]=ff_l2d_decc_out_c6_lo1_1_scanout[2]; | |
| 14205 | assign ff_l2d_decc_out_c6_hi1_1_scanin[2]=ff_l2d_decc_out_c6_lo1_3_scanout[2]; | |
| 14206 | assign ff_l2d_decc_out_c6_hi1_3_scanin[2]=ff_l2d_decc_out_c6_hi1_1_scanout[2]; | |
| 14207 | assign ff_l2d_decc_out_c6_lo0_1_scanin[3]=ff_l2d_decc_out_c6_hi1_3_scanout[2]; | |
| 14208 | assign ff_l2d_decc_out_c6_lo0_3_scanin[3]=ff_l2d_decc_out_c6_lo0_1_scanout[3]; | |
| 14209 | assign ff_l2d_decc_out_c6_hi0_1_scanin[3]=ff_l2d_decc_out_c6_lo0_3_scanout[3]; | |
| 14210 | assign ff_l2d_decc_out_c6_hi0_3_scanin[3]=ff_l2d_decc_out_c6_hi0_1_scanout[3]; | |
| 14211 | assign ff_l2d_decc_out_c6_lo1_1_scanin[3]=ff_l2d_decc_out_c6_hi0_3_scanout[3]; | |
| 14212 | assign ff_l2d_decc_out_c6_lo1_3_scanin[3]=ff_l2d_decc_out_c6_lo1_1_scanout[3]; | |
| 14213 | assign ff_l2d_decc_out_c6_hi1_1_scanin[3]=ff_l2d_decc_out_c6_lo1_3_scanout[3]; | |
| 14214 | assign ff_l2d_decc_out_c6_hi1_3_scanin[3]=ff_l2d_decc_out_c6_hi1_1_scanout[3]; | |
| 14215 | assign ff_l2d_decc_out_c6_lo0_1_scanin[4]=ff_l2d_decc_out_c6_hi1_3_scanout[3]; | |
| 14216 | assign ff_l2d_decc_out_c6_lo0_3_scanin[4]=ff_l2d_decc_out_c6_lo0_1_scanout[4]; | |
| 14217 | assign ff_l2d_decc_out_c6_hi0_1_scanin[4]=ff_l2d_decc_out_c6_lo0_3_scanout[4]; | |
| 14218 | assign ff_l2d_decc_out_c6_hi0_3_scanin[4]=ff_l2d_decc_out_c6_hi0_1_scanout[4]; | |
| 14219 | assign ff_l2d_decc_out_c6_lo1_1_scanin[4]=ff_l2d_decc_out_c6_hi0_3_scanout[4]; | |
| 14220 | assign ff_l2d_decc_out_c6_lo1_3_scanin[4]=ff_l2d_decc_out_c6_lo1_1_scanout[4]; | |
| 14221 | assign ff_l2d_decc_out_c6_hi1_1_scanin[4]=ff_l2d_decc_out_c6_lo1_3_scanout[4]; | |
| 14222 | assign ff_l2d_decc_out_c6_hi1_3_scanin[4]=ff_l2d_decc_out_c6_hi1_1_scanout[4]; | |
| 14223 | assign ff_l2d_decc_out_c6_lo0_1_scanin[5]=ff_l2d_decc_out_c6_hi1_3_scanout[4]; | |
| 14224 | assign ff_l2d_decc_out_c6_lo0_3_scanin[5]=ff_l2d_decc_out_c6_lo0_1_scanout[5]; | |
| 14225 | assign ff_l2d_decc_out_c6_hi0_1_scanin[5]=ff_l2d_decc_out_c6_lo0_3_scanout[5]; | |
| 14226 | assign ff_l2d_decc_out_c6_hi0_3_scanin[5]=ff_l2d_decc_out_c6_hi0_1_scanout[5]; | |
| 14227 | assign ff_l2d_decc_out_c6_lo1_1_scanin[5]=ff_l2d_decc_out_c6_hi0_3_scanout[5]; | |
| 14228 | assign ff_l2d_decc_out_c6_lo1_3_scanin[5]=ff_l2d_decc_out_c6_lo1_1_scanout[5]; | |
| 14229 | assign ff_l2d_decc_out_c6_hi1_1_scanin[5]=ff_l2d_decc_out_c6_lo1_3_scanout[5]; | |
| 14230 | assign ff_l2d_decc_out_c6_hi1_3_scanin[5]=ff_l2d_decc_out_c6_hi1_1_scanout[5]; | |
| 14231 | assign ff_l2d_decc_out_c6_lo0_1_scanin[6]=ff_l2d_decc_out_c6_hi1_3_scanout[5]; | |
| 14232 | assign ff_l2d_decc_out_c6_lo0_3_scanin[6]=ff_l2d_decc_out_c6_lo0_1_scanout[6]; | |
| 14233 | assign ff_l2d_decc_out_c6_hi0_1_scanin[6]=ff_l2d_decc_out_c6_lo0_3_scanout[6]; | |
| 14234 | assign ff_l2d_decc_out_c6_hi0_3_scanin[6]=ff_l2d_decc_out_c6_hi0_1_scanout[6]; | |
| 14235 | assign ff_l2d_decc_out_c6_lo1_1_scanin[6]=ff_l2d_decc_out_c6_hi0_3_scanout[6]; | |
| 14236 | assign ff_l2d_decc_out_c6_lo1_3_scanin[6]=ff_l2d_decc_out_c6_lo1_1_scanout[6]; | |
| 14237 | assign ff_l2d_decc_out_c6_hi1_1_scanin[6]=ff_l2d_decc_out_c6_lo1_3_scanout[6]; | |
| 14238 | assign ff_l2d_decc_out_c6_hi1_3_scanin[6]=ff_l2d_decc_out_c6_hi1_1_scanout[6]; | |
| 14239 | assign ff_l2d_decc_out_c6_lo0_1_scanin[7]=ff_l2d_decc_out_c6_hi1_3_scanout[6]; | |
| 14240 | assign ff_l2d_decc_out_c6_lo0_3_scanin[7]=ff_l2d_decc_out_c6_lo0_1_scanout[7]; | |
| 14241 | assign ff_l2d_decc_out_c6_hi0_1_scanin[7]=ff_l2d_decc_out_c6_lo0_3_scanout[7]; | |
| 14242 | assign ff_l2d_decc_out_c6_hi0_3_scanin[7]=ff_l2d_decc_out_c6_hi0_1_scanout[7]; | |
| 14243 | assign ff_l2d_decc_out_c6_lo1_1_scanin[7]=ff_l2d_decc_out_c6_hi0_3_scanout[7]; | |
| 14244 | assign ff_l2d_decc_out_c6_lo1_3_scanin[7]=ff_l2d_decc_out_c6_lo1_1_scanout[7]; | |
| 14245 | assign ff_l2d_decc_out_c6_hi1_1_scanin[7]=ff_l2d_decc_out_c6_lo1_3_scanout[7]; | |
| 14246 | assign ff_l2d_decc_out_c6_hi1_3_scanin[7]=ff_l2d_decc_out_c6_hi1_1_scanout[7]; | |
| 14247 | assign ff_l2d_decc_out_c6_lo0_1_scanin[8]=ff_l2d_decc_out_c6_hi1_3_scanout[7]; | |
| 14248 | assign ff_l2d_decc_out_c6_lo0_3_scanin[8]=ff_l2d_decc_out_c6_lo0_1_scanout[8]; | |
| 14249 | assign ff_l2d_decc_out_c6_hi0_1_scanin[8]=ff_l2d_decc_out_c6_lo0_3_scanout[8]; | |
| 14250 | assign ff_l2d_decc_out_c6_hi0_3_scanin[8]=ff_l2d_decc_out_c6_hi0_1_scanout[8]; | |
| 14251 | assign ff_l2d_decc_out_c6_lo1_1_scanin[8]=ff_l2d_decc_out_c6_hi0_3_scanout[8]; | |
| 14252 | assign ff_l2d_decc_out_c6_lo1_3_scanin[8]=ff_l2d_decc_out_c6_lo1_1_scanout[8]; | |
| 14253 | assign ff_l2d_decc_out_c6_hi1_1_scanin[8]=ff_l2d_decc_out_c6_lo1_3_scanout[8]; | |
| 14254 | assign ff_l2d_decc_out_c6_hi1_3_scanin[8]=ff_l2d_decc_out_c6_hi1_1_scanout[8]; | |
| 14255 | assign ff_l2d_decc_out_c6_lo0_1_scanin[9]=ff_l2d_decc_out_c6_hi1_3_scanout[8]; | |
| 14256 | assign ff_l2d_decc_out_c6_lo0_3_scanin[9]=ff_l2d_decc_out_c6_lo0_1_scanout[9]; | |
| 14257 | assign ff_l2d_decc_out_c6_hi0_1_scanin[9]=ff_l2d_decc_out_c6_lo0_3_scanout[9]; | |
| 14258 | assign ff_l2d_decc_out_c6_hi0_3_scanin[9]=ff_l2d_decc_out_c6_hi0_1_scanout[9]; | |
| 14259 | assign ff_l2d_decc_out_c6_lo1_1_scanin[9]=ff_l2d_decc_out_c6_hi0_3_scanout[9]; | |
| 14260 | assign ff_l2d_decc_out_c6_lo1_3_scanin[9]=ff_l2d_decc_out_c6_lo1_1_scanout[9]; | |
| 14261 | assign ff_l2d_decc_out_c6_hi1_1_scanin[9]=ff_l2d_decc_out_c6_lo1_3_scanout[9]; | |
| 14262 | assign ff_l2d_decc_out_c6_hi1_3_scanin[9]=ff_l2d_decc_out_c6_hi1_1_scanout[9]; | |
| 14263 | assign ff_l2d_decc_out_c6_lo0_1_scanin[10]=ff_l2d_decc_out_c6_hi1_3_scanout[9]; | |
| 14264 | assign ff_l2d_decc_out_c6_lo0_3_scanin[10]=ff_l2d_decc_out_c6_lo0_1_scanout[10]; | |
| 14265 | assign ff_l2d_decc_out_c6_hi0_1_scanin[10]=ff_l2d_decc_out_c6_lo0_3_scanout[10]; | |
| 14266 | assign ff_l2d_decc_out_c6_hi0_3_scanin[10]=ff_l2d_decc_out_c6_hi0_1_scanout[10]; | |
| 14267 | assign ff_l2d_decc_out_c6_lo1_1_scanin[10]=ff_l2d_decc_out_c6_hi0_3_scanout[10]; | |
| 14268 | assign ff_l2d_decc_out_c6_lo1_3_scanin[10]=ff_l2d_decc_out_c6_lo1_1_scanout[10]; | |
| 14269 | assign ff_l2d_decc_out_c6_hi1_1_scanin[10]=ff_l2d_decc_out_c6_lo1_3_scanout[10]; | |
| 14270 | assign ff_l2d_decc_out_c6_hi1_3_scanin[10]=ff_l2d_decc_out_c6_hi1_1_scanout[10]; | |
| 14271 | assign ff_l2d_decc_out_c6_lo0_1_scanin[11]=ff_l2d_decc_out_c6_hi1_3_scanout[10]; | |
| 14272 | assign ff_l2d_decc_out_c6_lo0_3_scanin[11]=ff_l2d_decc_out_c6_lo0_1_scanout[11]; | |
| 14273 | assign ff_l2d_decc_out_c6_hi0_1_scanin[11]=ff_l2d_decc_out_c6_lo0_3_scanout[11]; | |
| 14274 | assign ff_l2d_decc_out_c6_hi0_3_scanin[11]=ff_l2d_decc_out_c6_hi0_1_scanout[11]; | |
| 14275 | assign ff_l2d_decc_out_c6_lo1_1_scanin[11]=ff_l2d_decc_out_c6_hi0_3_scanout[11]; | |
| 14276 | assign ff_l2d_decc_out_c6_lo1_3_scanin[11]=ff_l2d_decc_out_c6_lo1_1_scanout[11]; | |
| 14277 | assign ff_l2d_decc_out_c6_hi1_1_scanin[11]=ff_l2d_decc_out_c6_lo1_3_scanout[11]; | |
| 14278 | assign ff_l2d_decc_out_c6_hi1_3_scanin[11]=ff_l2d_decc_out_c6_hi1_1_scanout[11]; | |
| 14279 | assign ff_l2d_decc_out_c6_lo0_1_scanin[12]=ff_l2d_decc_out_c6_hi1_3_scanout[11]; | |
| 14280 | assign ff_l2d_decc_out_c6_lo0_3_scanin[12]=ff_l2d_decc_out_c6_lo0_1_scanout[12]; | |
| 14281 | assign ff_l2d_decc_out_c6_hi0_1_scanin[12]=ff_l2d_decc_out_c6_lo0_3_scanout[12]; | |
| 14282 | assign ff_l2d_decc_out_c6_hi0_3_scanin[12]=ff_l2d_decc_out_c6_hi0_1_scanout[12]; | |
| 14283 | assign ff_l2d_decc_out_c6_lo1_1_scanin[12]=ff_l2d_decc_out_c6_hi0_3_scanout[12]; | |
| 14284 | assign ff_l2d_decc_out_c6_lo1_3_scanin[12]=ff_l2d_decc_out_c6_lo1_1_scanout[12]; | |
| 14285 | assign ff_l2d_decc_out_c6_hi1_1_scanin[12]=ff_l2d_decc_out_c6_lo1_3_scanout[12]; | |
| 14286 | assign ff_l2d_decc_out_c6_hi1_3_scanin[12]=ff_l2d_decc_out_c6_hi1_1_scanout[12]; | |
| 14287 | assign ff_l2d_decc_out_c6_lo0_1_scanin[13]=ff_l2d_decc_out_c6_hi1_3_scanout[12]; | |
| 14288 | assign ff_l2d_decc_out_c6_lo0_3_scanin[13]=ff_l2d_decc_out_c6_lo0_1_scanout[13]; | |
| 14289 | assign ff_l2d_decc_out_c6_hi0_1_scanin[13]=ff_l2d_decc_out_c6_lo0_3_scanout[13]; | |
| 14290 | assign ff_l2d_decc_out_c6_hi0_3_scanin[13]=ff_l2d_decc_out_c6_hi0_1_scanout[13]; | |
| 14291 | assign ff_l2d_decc_out_c6_lo1_1_scanin[13]=ff_l2d_decc_out_c6_hi0_3_scanout[13]; | |
| 14292 | assign ff_l2d_decc_out_c6_lo1_3_scanin[13]=ff_l2d_decc_out_c6_lo1_1_scanout[13]; | |
| 14293 | assign ff_l2d_decc_out_c6_hi1_1_scanin[13]=ff_l2d_decc_out_c6_lo1_3_scanout[13]; | |
| 14294 | assign ff_l2d_decc_out_c6_hi1_3_scanin[13]=ff_l2d_decc_out_c6_hi1_1_scanout[13]; | |
| 14295 | assign ff_l2d_decc_out_c6_lo0_1_scanin[14]=ff_l2d_decc_out_c6_hi1_3_scanout[13]; | |
| 14296 | assign ff_l2d_decc_out_c6_lo0_3_scanin[14]=ff_l2d_decc_out_c6_lo0_1_scanout[14]; | |
| 14297 | assign ff_l2d_decc_out_c6_hi0_1_scanin[14]=ff_l2d_decc_out_c6_lo0_3_scanout[14]; | |
| 14298 | assign ff_l2d_decc_out_c6_hi0_3_scanin[14]=ff_l2d_decc_out_c6_hi0_1_scanout[14]; | |
| 14299 | assign ff_l2d_decc_out_c6_lo1_1_scanin[14]=ff_l2d_decc_out_c6_hi0_3_scanout[14]; | |
| 14300 | assign ff_l2d_decc_out_c6_lo1_3_scanin[14]=ff_l2d_decc_out_c6_lo1_1_scanout[14]; | |
| 14301 | assign ff_l2d_decc_out_c6_hi1_1_scanin[14]=ff_l2d_decc_out_c6_lo1_3_scanout[14]; | |
| 14302 | assign ff_l2d_decc_out_c6_hi1_3_scanin[14]=ff_l2d_decc_out_c6_hi1_1_scanout[14]; | |
| 14303 | assign ff_l2d_decc_out_c6_lo0_1_scanin[15]=ff_l2d_decc_out_c6_hi1_3_scanout[14]; | |
| 14304 | assign ff_l2d_decc_out_c6_lo0_3_scanin[15]=ff_l2d_decc_out_c6_lo0_1_scanout[15]; | |
| 14305 | assign ff_l2d_decc_out_c6_hi0_1_scanin[15]=ff_l2d_decc_out_c6_lo0_3_scanout[15]; | |
| 14306 | assign ff_l2d_decc_out_c6_hi0_3_scanin[15]=ff_l2d_decc_out_c6_hi0_1_scanout[15]; | |
| 14307 | assign ff_l2d_decc_out_c6_lo1_1_scanin[15]=ff_l2d_decc_out_c6_hi0_3_scanout[15]; | |
| 14308 | assign ff_l2d_decc_out_c6_lo1_3_scanin[15]=ff_l2d_decc_out_c6_lo1_1_scanout[15]; | |
| 14309 | assign ff_l2d_decc_out_c6_hi1_1_scanin[15]=ff_l2d_decc_out_c6_lo1_3_scanout[15]; | |
| 14310 | assign ff_l2d_decc_out_c6_hi1_3_scanin[15]=ff_l2d_decc_out_c6_hi1_1_scanout[15]; | |
| 14311 | assign ff_l2d_decc_out_c6_lo0_1_scanin[16]=ff_l2d_decc_out_c6_hi1_3_scanout[15]; | |
| 14312 | assign ff_l2d_decc_out_c6_lo0_3_scanin[16]=ff_l2d_decc_out_c6_lo0_1_scanout[16]; | |
| 14313 | assign ff_l2d_decc_out_c6_hi0_1_scanin[16]=ff_l2d_decc_out_c6_lo0_3_scanout[16]; | |
| 14314 | assign ff_l2d_decc_out_c6_hi0_3_scanin[16]=ff_l2d_decc_out_c6_hi0_1_scanout[16]; | |
| 14315 | assign ff_l2d_decc_out_c6_lo1_1_scanin[16]=ff_l2d_decc_out_c6_hi0_3_scanout[16]; | |
| 14316 | assign ff_l2d_decc_out_c6_lo1_3_scanin[16]=ff_l2d_decc_out_c6_lo1_1_scanout[16]; | |
| 14317 | assign ff_l2d_decc_out_c6_hi1_1_scanin[16]=ff_l2d_decc_out_c6_lo1_3_scanout[16]; | |
| 14318 | assign ff_l2d_decc_out_c6_hi1_3_scanin[16]=ff_l2d_decc_out_c6_hi1_1_scanout[16]; | |
| 14319 | assign ff_l2d_decc_out_c6_lo0_1_scanin[17]=ff_l2d_decc_out_c6_hi1_3_scanout[16]; | |
| 14320 | assign ff_l2d_decc_out_c6_lo0_3_scanin[17]=ff_l2d_decc_out_c6_lo0_1_scanout[17]; | |
| 14321 | assign ff_l2d_decc_out_c6_hi0_1_scanin[17]=ff_l2d_decc_out_c6_lo0_3_scanout[17]; | |
| 14322 | assign ff_l2d_decc_out_c6_hi0_3_scanin[17]=ff_l2d_decc_out_c6_hi0_1_scanout[17]; | |
| 14323 | assign ff_l2d_decc_out_c6_lo1_1_scanin[17]=ff_l2d_decc_out_c6_hi0_3_scanout[17]; | |
| 14324 | assign ff_l2d_decc_out_c6_lo1_3_scanin[17]=ff_l2d_decc_out_c6_lo1_1_scanout[17]; | |
| 14325 | assign ff_l2d_decc_out_c6_hi1_1_scanin[17]=ff_l2d_decc_out_c6_lo1_3_scanout[17]; | |
| 14326 | assign ff_l2d_decc_out_c6_hi1_3_scanin[17]=ff_l2d_decc_out_c6_hi1_1_scanout[17]; | |
| 14327 | assign ff_l2d_decc_out_c6_lo0_1_scanin[18]=ff_l2d_decc_out_c6_hi1_3_scanout[17]; | |
| 14328 | assign ff_l2d_decc_out_c6_lo0_3_scanin[18]=ff_l2d_decc_out_c6_lo0_1_scanout[18]; | |
| 14329 | assign ff_l2d_decc_out_c6_hi0_1_scanin[18]=ff_l2d_decc_out_c6_lo0_3_scanout[18]; | |
| 14330 | assign ff_l2d_decc_out_c6_hi0_3_scanin[18]=ff_l2d_decc_out_c6_hi0_1_scanout[18]; | |
| 14331 | assign ff_l2d_decc_out_c6_lo1_1_scanin[18]=ff_l2d_decc_out_c6_hi0_3_scanout[18]; | |
| 14332 | assign ff_l2d_decc_out_c6_lo1_3_scanin[18]=ff_l2d_decc_out_c6_lo1_1_scanout[18]; | |
| 14333 | assign ff_l2d_decc_out_c6_hi1_1_scanin[18]=ff_l2d_decc_out_c6_lo1_3_scanout[18]; | |
| 14334 | assign ff_l2d_decc_out_c6_hi1_3_scanin[18]=ff_l2d_decc_out_c6_hi1_1_scanout[18]; | |
| 14335 | assign ff_l2d_decc_out_c6_lo0_1_scanin[19]=ff_l2d_decc_out_c6_hi1_3_scanout[18]; | |
| 14336 | assign ff_l2d_decc_out_c6_lo0_3_scanin[19]=ff_l2d_decc_out_c6_lo0_1_scanout[19]; | |
| 14337 | assign ff_l2d_decc_out_c6_hi0_1_scanin[19]=ff_l2d_decc_out_c6_lo0_3_scanout[19]; | |
| 14338 | assign ff_l2d_decc_out_c6_hi0_3_scanin[19]=ff_l2d_decc_out_c6_hi0_1_scanout[19]; | |
| 14339 | assign scan_out=ff_l2d_decc_out_c6_hi0_3_scanout[19]; | |
| 14340 | // fixscan end | |
| 14341 | endmodule | |
| 14342 | ||
| 14343 | ||
| 14344 | ||
| 14345 | ||
| 14346 | ||
| 14347 | ||
| 14348 | // any PARAMS parms go into naming of macro | |
| 14349 | ||
| 14350 | module n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_9 ( | |
| 14351 | din, | |
| 14352 | l1clk, | |
| 14353 | scan_in, | |
| 14354 | siclk, | |
| 14355 | soclk, | |
| 14356 | dout, | |
| 14357 | scan_out); | |
| 14358 | wire [8:0] fdin; | |
| 14359 | ||
| 14360 | input [8:0] din; | |
| 14361 | input l1clk; | |
| 14362 | input [8:0] scan_in; | |
| 14363 | ||
| 14364 | ||
| 14365 | input siclk; | |
| 14366 | input soclk; | |
| 14367 | ||
| 14368 | output [8:0] dout; | |
| 14369 | output [8:0] scan_out; | |
| 14370 | assign fdin[8:0] = din[8:0]; | |
| 14371 | ||
| 14372 | ||
| 14373 | ||
| 14374 | ||
| 14375 | ||
| 14376 | ||
| 14377 | dff #(9) d0_0 ( | |
| 14378 | .l1clk(l1clk), | |
| 14379 | .siclk(siclk), | |
| 14380 | .soclk(soclk), | |
| 14381 | .d(fdin[8:0]), | |
| 14382 | .si(scan_in[8:0]), | |
| 14383 | .so(scan_out[8:0]), | |
| 14384 | .q(dout[8:0]) | |
| 14385 | ); | |
| 14386 | ||
| 14387 | ||
| 14388 | ||
| 14389 | ||
| 14390 | ||
| 14391 | ||
| 14392 | ||
| 14393 | ||
| 14394 | ||
| 14395 | ||
| 14396 | ||
| 14397 | ||
| 14398 | endmodule | |
| 14399 | ||
| 14400 | ||
| 14401 | ||
| 14402 | ||
| 14403 | ||
| 14404 | ||
| 14405 | ||
| 14406 | ||
| 14407 | ||
| 14408 | ||
| 14409 | ||
| 14410 | ||
| 14411 | ||
| 14412 | // any PARAMS parms go into naming of macro | |
| 14413 | ||
| 14414 | module n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_4 ( | |
| 14415 | din, | |
| 14416 | l1clk, | |
| 14417 | scan_in, | |
| 14418 | siclk, | |
| 14419 | soclk, | |
| 14420 | dout, | |
| 14421 | scan_out); | |
| 14422 | wire [3:0] fdin; | |
| 14423 | ||
| 14424 | input [3:0] din; | |
| 14425 | input l1clk; | |
| 14426 | input [3:0] scan_in; | |
| 14427 | ||
| 14428 | ||
| 14429 | input siclk; | |
| 14430 | input soclk; | |
| 14431 | ||
| 14432 | output [3:0] dout; | |
| 14433 | output [3:0] scan_out; | |
| 14434 | assign fdin[3:0] = din[3:0]; | |
| 14435 | ||
| 14436 | ||
| 14437 | ||
| 14438 | ||
| 14439 | ||
| 14440 | ||
| 14441 | dff #(4) d0_0 ( | |
| 14442 | .l1clk(l1clk), | |
| 14443 | .siclk(siclk), | |
| 14444 | .soclk(soclk), | |
| 14445 | .d(fdin[3:0]), | |
| 14446 | .si(scan_in[3:0]), | |
| 14447 | .so(scan_out[3:0]), | |
| 14448 | .q(dout[3:0]) | |
| 14449 | ); | |
| 14450 | ||
| 14451 | ||
| 14452 | ||
| 14453 | ||
| 14454 | ||
| 14455 | ||
| 14456 | ||
| 14457 | ||
| 14458 | ||
| 14459 | ||
| 14460 | ||
| 14461 | ||
| 14462 | endmodule | |
| 14463 | ||
| 14464 | ||
| 14465 | ||
| 14466 | ||
| 14467 | ||
| 14468 | ||
| 14469 | ||
| 14470 | ||
| 14471 | ||
| 14472 | ||
| 14473 | ||
| 14474 | ||
| 14475 | ||
| 14476 | // any PARAMS parms go into naming of macro | |
| 14477 | ||
| 14478 | module n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_2 ( | |
| 14479 | din, | |
| 14480 | l1clk, | |
| 14481 | scan_in, | |
| 14482 | siclk, | |
| 14483 | soclk, | |
| 14484 | dout, | |
| 14485 | scan_out); | |
| 14486 | wire [1:0] fdin; | |
| 14487 | ||
| 14488 | input [1:0] din; | |
| 14489 | input l1clk; | |
| 14490 | input [1:0] scan_in; | |
| 14491 | ||
| 14492 | ||
| 14493 | input siclk; | |
| 14494 | input soclk; | |
| 14495 | ||
| 14496 | output [1:0] dout; | |
| 14497 | output [1:0] scan_out; | |
| 14498 | assign fdin[1:0] = din[1:0]; | |
| 14499 | ||
| 14500 | ||
| 14501 | ||
| 14502 | ||
| 14503 | ||
| 14504 | ||
| 14505 | dff #(2) d0_0 ( | |
| 14506 | .l1clk(l1clk), | |
| 14507 | .siclk(siclk), | |
| 14508 | .soclk(soclk), | |
| 14509 | .d(fdin[1:0]), | |
| 14510 | .si(scan_in[1:0]), | |
| 14511 | .so(scan_out[1:0]), | |
| 14512 | .q(dout[1:0]) | |
| 14513 | ); | |
| 14514 | ||
| 14515 | ||
| 14516 | ||
| 14517 | ||
| 14518 | ||
| 14519 | ||
| 14520 | ||
| 14521 | ||
| 14522 | ||
| 14523 | ||
| 14524 | ||
| 14525 | ||
| 14526 | endmodule | |
| 14527 | ||
| 14528 | ||
| 14529 | ||
| 14530 | ||
| 14531 | ||
| 14532 | ||
| 14533 | ||
| 14534 | ||
| 14535 | ||
| 14536 | // | |
| 14537 | // and macro for ports = 2,3,4 | |
| 14538 | // | |
| 14539 | // | |
| 14540 | ||
| 14541 | ||
| 14542 | ||
| 14543 | ||
| 14544 | ||
| 14545 | module n2_l2d_sp_512kb_cust_and_macro__ports_4__width_1 ( | |
| 14546 | din0, | |
| 14547 | din1, | |
| 14548 | din2, | |
| 14549 | din3, | |
| 14550 | dout); | |
| 14551 | input [0:0] din0; | |
| 14552 | input [0:0] din1; | |
| 14553 | input [0:0] din2; | |
| 14554 | input [0:0] din3; | |
| 14555 | output [0:0] dout; | |
| 14556 | ||
| 14557 | ||
| 14558 | ||
| 14559 | ||
| 14560 | ||
| 14561 | ||
| 14562 | and4 #(1) d0_0 ( | |
| 14563 | .in0(din0[0:0]), | |
| 14564 | .in1(din1[0:0]), | |
| 14565 | .in2(din2[0:0]), | |
| 14566 | .in3(din3[0:0]), | |
| 14567 | .out(dout[0:0]) | |
| 14568 | ); | |
| 14569 | ||
| 14570 | ||
| 14571 | ||
| 14572 | ||
| 14573 | ||
| 14574 | ||
| 14575 | ||
| 14576 | ||
| 14577 | ||
| 14578 | endmodule | |
| 14579 | ||
| 14580 | ||
| 14581 | ||
| 14582 | ||
| 14583 | ||
| 14584 | // | |
| 14585 | // invert macro | |
| 14586 | // | |
| 14587 | // | |
| 14588 | ||
| 14589 | ||
| 14590 | ||
| 14591 | ||
| 14592 | ||
| 14593 | module n2_l2d_sp_512kb_cust_inv_macro__width_1 ( | |
| 14594 | din, | |
| 14595 | dout); | |
| 14596 | input [0:0] din; | |
| 14597 | output [0:0] dout; | |
| 14598 | ||
| 14599 | ||
| 14600 | ||
| 14601 | ||
| 14602 | ||
| 14603 | ||
| 14604 | inv #(1) d0_0 ( | |
| 14605 | .in(din[0:0]), | |
| 14606 | .out(dout[0:0]) | |
| 14607 | ); | |
| 14608 | ||
| 14609 | ||
| 14610 | ||
| 14611 | ||
| 14612 | ||
| 14613 | ||
| 14614 | ||
| 14615 | ||
| 14616 | ||
| 14617 | endmodule | |
| 14618 | ||
| 14619 | ||
| 14620 | ||
| 14621 | ||
| 14622 | ||
| 14623 | // | |
| 14624 | // invert macro | |
| 14625 | // | |
| 14626 | // | |
| 14627 | ||
| 14628 | ||
| 14629 | ||
| 14630 | ||
| 14631 | ||
| 14632 | module n2_l2d_sp_512kb_cust_inv_macro__width_8 ( | |
| 14633 | din, | |
| 14634 | dout); | |
| 14635 | input [7:0] din; | |
| 14636 | output [7:0] dout; | |
| 14637 | ||
| 14638 | ||
| 14639 | ||
| 14640 | ||
| 14641 | ||
| 14642 | ||
| 14643 | inv #(8) d0_0 ( | |
| 14644 | .in(din[7:0]), | |
| 14645 | .out(dout[7:0]) | |
| 14646 | ); | |
| 14647 | ||
| 14648 | ||
| 14649 | ||
| 14650 | ||
| 14651 | ||
| 14652 | ||
| 14653 | ||
| 14654 | ||
| 14655 | ||
| 14656 | endmodule | |
| 14657 | ||
| 14658 | ||
| 14659 | ||
| 14660 | ||
| 14661 | ||
| 14662 | // | |
| 14663 | // or macro for ports = 2,3 | |
| 14664 | // | |
| 14665 | // | |
| 14666 | ||
| 14667 | ||
| 14668 | ||
| 14669 | ||
| 14670 | ||
| 14671 | module n2_l2d_sp_512kb_cust_or_macro__width_8 ( | |
| 14672 | din0, | |
| 14673 | din1, | |
| 14674 | dout); | |
| 14675 | input [7:0] din0; | |
| 14676 | input [7:0] din1; | |
| 14677 | output [7:0] dout; | |
| 14678 | ||
| 14679 | ||
| 14680 | ||
| 14681 | ||
| 14682 | ||
| 14683 | ||
| 14684 | or2 #(8) d0_0 ( | |
| 14685 | .in0(din0[7:0]), | |
| 14686 | .in1(din1[7:0]), | |
| 14687 | .out(dout[7:0]) | |
| 14688 | ); | |
| 14689 | ||
| 14690 | ||
| 14691 | ||
| 14692 | ||
| 14693 | ||
| 14694 | ||
| 14695 | ||
| 14696 | ||
| 14697 | ||
| 14698 | endmodule | |
| 14699 | ||
| 14700 | ||
| 14701 | ||
| 14702 | ||
| 14703 | ||
| 14704 | // | |
| 14705 | // invert macro | |
| 14706 | // | |
| 14707 | // | |
| 14708 | ||
| 14709 | ||
| 14710 | ||
| 14711 | ||
| 14712 | ||
| 14713 | module n2_l2d_sp_512kb_cust_inv_macro__width_4 ( | |
| 14714 | din, | |
| 14715 | dout); | |
| 14716 | input [3:0] din; | |
| 14717 | output [3:0] dout; | |
| 14718 | ||
| 14719 | ||
| 14720 | ||
| 14721 | ||
| 14722 | ||
| 14723 | ||
| 14724 | inv #(4) d0_0 ( | |
| 14725 | .in(din[3:0]), | |
| 14726 | .out(dout[3:0]) | |
| 14727 | ); | |
| 14728 | ||
| 14729 | ||
| 14730 | ||
| 14731 | ||
| 14732 | ||
| 14733 | ||
| 14734 | ||
| 14735 | ||
| 14736 | ||
| 14737 | endmodule | |
| 14738 | ||
| 14739 | ||
| 14740 | ||
| 14741 | ||
| 14742 | ||
| 14743 | // | |
| 14744 | // or macro for ports = 2,3 | |
| 14745 | // | |
| 14746 | // | |
| 14747 | ||
| 14748 | ||
| 14749 | ||
| 14750 | ||
| 14751 | ||
| 14752 | module n2_l2d_sp_512kb_cust_or_macro__width_4 ( | |
| 14753 | din0, | |
| 14754 | din1, | |
| 14755 | dout); | |
| 14756 | input [3:0] din0; | |
| 14757 | input [3:0] din1; | |
| 14758 | output [3:0] dout; | |
| 14759 | ||
| 14760 | ||
| 14761 | ||
| 14762 | ||
| 14763 | ||
| 14764 | ||
| 14765 | or2 #(4) d0_0 ( | |
| 14766 | .in0(din0[3:0]), | |
| 14767 | .in1(din1[3:0]), | |
| 14768 | .out(dout[3:0]) | |
| 14769 | ); | |
| 14770 | ||
| 14771 | ||
| 14772 | ||
| 14773 | ||
| 14774 | ||
| 14775 | ||
| 14776 | ||
| 14777 | ||
| 14778 | ||
| 14779 | endmodule | |
| 14780 | ||
| 14781 | ||
| 14782 | ||
| 14783 | ||
| 14784 | ||
| 14785 | // | |
| 14786 | // and macro for ports = 2,3,4 | |
| 14787 | // | |
| 14788 | // | |
| 14789 | ||
| 14790 | ||
| 14791 | ||
| 14792 | ||
| 14793 | ||
| 14794 | module n2_l2d_sp_512kb_cust_and_macro__width_2 ( | |
| 14795 | din0, | |
| 14796 | din1, | |
| 14797 | dout); | |
| 14798 | input [1:0] din0; | |
| 14799 | input [1:0] din1; | |
| 14800 | output [1:0] dout; | |
| 14801 | ||
| 14802 | ||
| 14803 | ||
| 14804 | ||
| 14805 | ||
| 14806 | ||
| 14807 | and2 #(2) d0_0 ( | |
| 14808 | .in0(din0[1:0]), | |
| 14809 | .in1(din1[1:0]), | |
| 14810 | .out(dout[1:0]) | |
| 14811 | ); | |
| 14812 | ||
| 14813 | ||
| 14814 | ||
| 14815 | ||
| 14816 | ||
| 14817 | ||
| 14818 | ||
| 14819 | ||
| 14820 | ||
| 14821 | endmodule | |
| 14822 | ||
| 14823 | ||
| 14824 | ||
| 14825 | ||
| 14826 | ||
| 14827 | // | |
| 14828 | // and macro for ports = 2,3,4 | |
| 14829 | // | |
| 14830 | // | |
| 14831 | ||
| 14832 | ||
| 14833 | ||
| 14834 | ||
| 14835 | ||
| 14836 | module n2_l2d_sp_512kb_cust_and_macro__width_4 ( | |
| 14837 | din0, | |
| 14838 | din1, | |
| 14839 | dout); | |
| 14840 | input [3:0] din0; | |
| 14841 | input [3:0] din1; | |
| 14842 | output [3:0] dout; | |
| 14843 | ||
| 14844 | ||
| 14845 | ||
| 14846 | ||
| 14847 | ||
| 14848 | ||
| 14849 | and2 #(4) d0_0 ( | |
| 14850 | .in0(din0[3:0]), | |
| 14851 | .in1(din1[3:0]), | |
| 14852 | .out(dout[3:0]) | |
| 14853 | ); | |
| 14854 | ||
| 14855 | ||
| 14856 | ||
| 14857 | ||
| 14858 | ||
| 14859 | ||
| 14860 | ||
| 14861 | ||
| 14862 | ||
| 14863 | endmodule | |
| 14864 | ||
| 14865 | ||
| 14866 | ||
| 14867 | ||
| 14868 | ||
| 14869 | // | |
| 14870 | // and macro for ports = 2,3,4 | |
| 14871 | // | |
| 14872 | // | |
| 14873 | ||
| 14874 | ||
| 14875 | ||
| 14876 | ||
| 14877 | ||
| 14878 | module n2_l2d_sp_512kb_cust_and_macro__width_8 ( | |
| 14879 | din0, | |
| 14880 | din1, | |
| 14881 | dout); | |
| 14882 | input [7:0] din0; | |
| 14883 | input [7:0] din1; | |
| 14884 | output [7:0] dout; | |
| 14885 | ||
| 14886 | ||
| 14887 | ||
| 14888 | ||
| 14889 | ||
| 14890 | ||
| 14891 | and2 #(8) d0_0 ( | |
| 14892 | .in0(din0[7:0]), | |
| 14893 | .in1(din1[7:0]), | |
| 14894 | .out(dout[7:0]) | |
| 14895 | ); | |
| 14896 | ||
| 14897 | ||
| 14898 | ||
| 14899 | ||
| 14900 | ||
| 14901 | ||
| 14902 | ||
| 14903 | ||
| 14904 | ||
| 14905 | endmodule | |
| 14906 | ||
| 14907 | ||
| 14908 | ||
| 14909 | ||
| 14910 | ||
| 14911 | ||
| 14912 | ||
| 14913 | ||
| 14914 | ||
| 14915 | // any PARAMS parms go into naming of macro | |
| 14916 | ||
| 14917 | module n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_78 ( | |
| 14918 | din, | |
| 14919 | l1clk, | |
| 14920 | scan_in, | |
| 14921 | siclk, | |
| 14922 | soclk, | |
| 14923 | dout, | |
| 14924 | scan_out); | |
| 14925 | wire [77:0] fdin; | |
| 14926 | ||
| 14927 | input [77:0] din; | |
| 14928 | input l1clk; | |
| 14929 | input [77:0] scan_in; | |
| 14930 | ||
| 14931 | ||
| 14932 | input siclk; | |
| 14933 | input soclk; | |
| 14934 | ||
| 14935 | output [77:0] dout; | |
| 14936 | output [77:0] scan_out; | |
| 14937 | assign fdin[77:0] = din[77:0]; | |
| 14938 | ||
| 14939 | ||
| 14940 | ||
| 14941 | ||
| 14942 | ||
| 14943 | ||
| 14944 | dff #(78) d0_0 ( | |
| 14945 | .l1clk(l1clk), | |
| 14946 | .siclk(siclk), | |
| 14947 | .soclk(soclk), | |
| 14948 | .d(fdin[77:0]), | |
| 14949 | .si(scan_in[77:0]), | |
| 14950 | .so(scan_out[77:0]), | |
| 14951 | .q(dout[77:0]) | |
| 14952 | ); | |
| 14953 | ||
| 14954 | ||
| 14955 | ||
| 14956 | ||
| 14957 | ||
| 14958 | ||
| 14959 | ||
| 14960 | ||
| 14961 | ||
| 14962 | ||
| 14963 | ||
| 14964 | ||
| 14965 | endmodule | |
| 14966 | ||
| 14967 | ||
| 14968 | ||
| 14969 | ||
| 14970 | ||
| 14971 | ||
| 14972 | ||
| 14973 | ||
| 14974 | ||
| 14975 | // general mux macro for pass-gate and and-or muxes with/wout priority encoders | |
| 14976 | // also for pass-gate with decoder | |
| 14977 | ||
| 14978 | ||
| 14979 | ||
| 14980 | ||
| 14981 | ||
| 14982 | // any PARAMS parms go into naming of macro | |
| 14983 | ||
| 14984 | module n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__width_39 ( | |
| 14985 | din0, | |
| 14986 | sel0, | |
| 14987 | din1, | |
| 14988 | sel1, | |
| 14989 | dout); | |
| 14990 | wire buffout0; | |
| 14991 | wire buffout1; | |
| 14992 | ||
| 14993 | input [38:0] din0; | |
| 14994 | input sel0; | |
| 14995 | input [38:0] din1; | |
| 14996 | input sel1; | |
| 14997 | output [38:0] dout; | |
| 14998 | ||
| 14999 | ||
| 15000 | ||
| 15001 | ||
| 15002 | ||
| 15003 | cl_dp1_muxbuff2_8x c0_0 ( | |
| 15004 | .in0(sel0), | |
| 15005 | .in1(sel1), | |
| 15006 | .out0(buffout0), | |
| 15007 | .out1(buffout1) | |
| 15008 | ); | |
| 15009 | mux2s #(39) d0_0 ( | |
| 15010 | .sel0(buffout0), | |
| 15011 | .sel1(buffout1), | |
| 15012 | .in0(din0[38:0]), | |
| 15013 | .in1(din1[38:0]), | |
| 15014 | .dout(dout[38:0]) | |
| 15015 | ); | |
| 15016 | ||
| 15017 | ||
| 15018 | ||
| 15019 | ||
| 15020 | ||
| 15021 | ||
| 15022 | ||
| 15023 | ||
| 15024 | ||
| 15025 | ||
| 15026 | ||
| 15027 | ||
| 15028 | ||
| 15029 | endmodule | |
| 15030 | ||
| 15031 | ||
| 15032 | // | |
| 15033 | // macro for cl_mc1_tisram_blbi_8x flop | |
| 15034 | // | |
| 15035 | // | |
| 15036 | ||
| 15037 | ||
| 15038 | ||
| 15039 | ||
| 15040 | ||
| 15041 | module n2_l2d_sp_512kb_cust_tisram_blbi_macro__width_624 ( | |
| 15042 | d_a, | |
| 15043 | l1clk, | |
| 15044 | q_b_l); | |
| 15045 | input [623:0] d_a; | |
| 15046 | input l1clk; | |
| 15047 | output [623:0] q_b_l; | |
| 15048 | ||
| 15049 | ||
| 15050 | ||
| 15051 | ||
| 15052 | ||
| 15053 | ||
| 15054 | tisram_blb_inv #(624) d0_0 ( | |
| 15055 | .d(d_a[623:0]), | |
| 15056 | .l1clk(l1clk), | |
| 15057 | .latout_l(q_b_l[623:0]) | |
| 15058 | ); | |
| 15059 | ||
| 15060 | ||
| 15061 | ||
| 15062 | ||
| 15063 | ||
| 15064 | ||
| 15065 | ||
| 15066 | ||
| 15067 | ||
| 15068 | ||
| 15069 | //place::generic_place($width,$stack,$left); | |
| 15070 | ||
| 15071 | endmodule | |
| 15072 | ||
| 15073 | ||
| 15074 | ||
| 15075 | ||
| 15076 | ||
| 15077 | // | |
| 15078 | // macro for cl_mc1_tisram_bla_{4}x flops | |
| 15079 | // | |
| 15080 | // | |
| 15081 | ||
| 15082 | ||
| 15083 | ||
| 15084 | ||
| 15085 | ||
| 15086 | module n2_l2d_sp_512kb_cust_tisram_bla_macro__width_156 ( | |
| 15087 | d_b, | |
| 15088 | l1clk, | |
| 15089 | q_a); | |
| 15090 | input [155:0] d_b; | |
| 15091 | input l1clk; | |
| 15092 | output [155:0] q_a; | |
| 15093 | ||
| 15094 | ||
| 15095 | ||
| 15096 | ||
| 15097 | ||
| 15098 | ||
| 15099 | tisram_bla #(156) d0_0 ( | |
| 15100 | .d_b(d_b[155:0]), | |
| 15101 | .l1clk(l1clk), | |
| 15102 | .q_a(q_a[155:0]) | |
| 15103 | ); | |
| 15104 | ||
| 15105 | ||
| 15106 | ||
| 15107 | ||
| 15108 | ||
| 15109 | ||
| 15110 | ||
| 15111 | ||
| 15112 | ||
| 15113 | ||
| 15114 | //place::generic_place($width,$stack,$left); | |
| 15115 | ||
| 15116 | endmodule | |
| 15117 | ||
| 15118 | ||
| 15119 | ||
| 15120 | ||
| 15121 | ||
| 15122 | // general mux macro for pass-gate and and-or muxes with/wout priority encoders | |
| 15123 | // also for pass-gate with decoder | |
| 15124 | ||
| 15125 | ||
| 15126 | ||
| 15127 | ||
| 15128 | ||
| 15129 | // any PARAMS parms go into naming of macro | |
| 15130 | ||
| 15131 | module n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__stack_156c__width_156 ( | |
| 15132 | din0, | |
| 15133 | sel0, | |
| 15134 | din1, | |
| 15135 | sel1, | |
| 15136 | dout); | |
| 15137 | wire buffout0; | |
| 15138 | wire buffout1; | |
| 15139 | ||
| 15140 | input [155:0] din0; | |
| 15141 | input sel0; | |
| 15142 | input [155:0] din1; | |
| 15143 | input sel1; | |
| 15144 | output [155:0] dout; | |
| 15145 | ||
| 15146 | ||
| 15147 | ||
| 15148 | ||
| 15149 | ||
| 15150 | cl_dp1_muxbuff2_8x c0_0 ( | |
| 15151 | .in0(sel0), | |
| 15152 | .in1(sel1), | |
| 15153 | .out0(buffout0), | |
| 15154 | .out1(buffout1) | |
| 15155 | ); | |
| 15156 | mux2s #(156) d0_0 ( | |
| 15157 | .sel0(buffout0), | |
| 15158 | .sel1(buffout1), | |
| 15159 | .in0(din0[155:0]), | |
| 15160 | .in1(din1[155:0]), | |
| 15161 | .dout(dout[155:0]) | |
| 15162 | ); | |
| 15163 | ||
| 15164 | ||
| 15165 | ||
| 15166 | ||
| 15167 | ||
| 15168 | ||
| 15169 | ||
| 15170 | ||
| 15171 | ||
| 15172 | ||
| 15173 | ||
| 15174 | ||
| 15175 | ||
| 15176 | endmodule | |
| 15177 | ||
| 15178 | ||
| 15179 | // | |
| 15180 | // comparator macro (output is 1 if both inputs are equal; 0 otherwise) | |
| 15181 | // | |
| 15182 | // | |
| 15183 | ||
| 15184 | ||
| 15185 | ||
| 15186 | ||
| 15187 | ||
| 15188 | module n2_l2d_sp_512kb_cust_cmp_macro__width_4 ( | |
| 15189 | din0, | |
| 15190 | din1, | |
| 15191 | dout); | |
| 15192 | input [3:0] din0; | |
| 15193 | input [3:0] din1; | |
| 15194 | output dout; | |
| 15195 | ||
| 15196 | ||
| 15197 | ||
| 15198 | ||
| 15199 | ||
| 15200 | ||
| 15201 | cmp #(4) m0_0 ( | |
| 15202 | .in0(din0[3:0]), | |
| 15203 | .in1(din1[3:0]), | |
| 15204 | .out(dout) | |
| 15205 | ); | |
| 15206 | ||
| 15207 | ||
| 15208 | ||
| 15209 | ||
| 15210 | ||
| 15211 | ||
| 15212 | ||
| 15213 | ||
| 15214 | ||
| 15215 | ||
| 15216 | endmodule | |
| 15217 | ||
| 15218 | ||
| 15219 | ||
| 15220 | ||
| 15221 | ||
| 15222 | // | |
| 15223 | // nor macro for ports = 2,3 | |
| 15224 | // | |
| 15225 | // | |
| 15226 | ||
| 15227 | ||
| 15228 | ||
| 15229 | ||
| 15230 | ||
| 15231 | module n2_l2d_sp_512kb_cust_nor_macro__width_1 ( | |
| 15232 | din0, | |
| 15233 | din1, | |
| 15234 | dout); | |
| 15235 | input [0:0] din0; | |
| 15236 | input [0:0] din1; | |
| 15237 | output [0:0] dout; | |
| 15238 | ||
| 15239 | ||
| 15240 | ||
| 15241 | ||
| 15242 | ||
| 15243 | ||
| 15244 | nor2 #(1) d0_0 ( | |
| 15245 | .in0(din0[0:0]), | |
| 15246 | .in1(din1[0:0]), | |
| 15247 | .out(dout[0:0]) | |
| 15248 | ); | |
| 15249 | ||
| 15250 | ||
| 15251 | ||
| 15252 | ||
| 15253 | ||
| 15254 | ||
| 15255 | ||
| 15256 | endmodule | |
| 15257 | ||
| 15258 | ||
| 15259 | ||
| 15260 | ||
| 15261 | ||
| 15262 | // general mux macro for pass-gate and and-or muxes with/wout priority encoders | |
| 15263 | // also for pass-gate with decoder | |
| 15264 | ||
| 15265 | ||
| 15266 | ||
| 15267 | ||
| 15268 | ||
| 15269 | // any PARAMS parms go into naming of macro | |
| 15270 | ||
| 15271 | module n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_3__width_10 ( | |
| 15272 | din0, | |
| 15273 | sel0, | |
| 15274 | din1, | |
| 15275 | sel1, | |
| 15276 | din2, | |
| 15277 | sel2, | |
| 15278 | dout); | |
| 15279 | wire buffout0; | |
| 15280 | wire buffout1; | |
| 15281 | wire buffout2; | |
| 15282 | ||
| 15283 | input [9:0] din0; | |
| 15284 | input sel0; | |
| 15285 | input [9:0] din1; | |
| 15286 | input sel1; | |
| 15287 | input [9:0] din2; | |
| 15288 | input sel2; | |
| 15289 | output [9:0] dout; | |
| 15290 | ||
| 15291 | ||
| 15292 | ||
| 15293 | ||
| 15294 | ||
| 15295 | cl_dp1_muxbuff3_8x c0_0 ( | |
| 15296 | .in0(sel0), | |
| 15297 | .in1(sel1), | |
| 15298 | .in2(sel2), | |
| 15299 | .out0(buffout0), | |
| 15300 | .out1(buffout1), | |
| 15301 | .out2(buffout2) | |
| 15302 | ); | |
| 15303 | mux3s #(10) d0_0 ( | |
| 15304 | .sel0(buffout0), | |
| 15305 | .sel1(buffout1), | |
| 15306 | .sel2(buffout2), | |
| 15307 | .in0(din0[9:0]), | |
| 15308 | .in1(din1[9:0]), | |
| 15309 | .in2(din2[9:0]), | |
| 15310 | .dout(dout[9:0]) | |
| 15311 | ); | |
| 15312 | ||
| 15313 | ||
| 15314 | ||
| 15315 | ||
| 15316 | ||
| 15317 | ||
| 15318 | ||
| 15319 | ||
| 15320 | ||
| 15321 | ||
| 15322 | ||
| 15323 | ||
| 15324 | ||
| 15325 | endmodule | |
| 15326 | ||
| 15327 | ||
| 15328 | // general mux macro for pass-gate and and-or muxes with/wout priority encoders | |
| 15329 | // also for pass-gate with decoder | |
| 15330 | ||
| 15331 | ||
| 15332 | ||
| 15333 | ||
| 15334 | ||
| 15335 | // any PARAMS parms go into naming of macro | |
| 15336 | ||
| 15337 | module n2_l2d_sp_512kb_cust_mux_macro__mux_aonpe__ports_2__width_10 ( | |
| 15338 | din0, | |
| 15339 | sel0, | |
| 15340 | din1, | |
| 15341 | sel1, | |
| 15342 | dout); | |
| 15343 | wire buffout0; | |
| 15344 | wire buffout1; | |
| 15345 | ||
| 15346 | input [9:0] din0; | |
| 15347 | input sel0; | |
| 15348 | input [9:0] din1; | |
| 15349 | input sel1; | |
| 15350 | output [9:0] dout; | |
| 15351 | ||
| 15352 | ||
| 15353 | ||
| 15354 | ||
| 15355 | ||
| 15356 | cl_dp1_muxbuff2_8x c0_0 ( | |
| 15357 | .in0(sel0), | |
| 15358 | .in1(sel1), | |
| 15359 | .out0(buffout0), | |
| 15360 | .out1(buffout1) | |
| 15361 | ); | |
| 15362 | mux2s #(10) d0_0 ( | |
| 15363 | .sel0(buffout0), | |
| 15364 | .sel1(buffout1), | |
| 15365 | .in0(din0[9:0]), | |
| 15366 | .in1(din1[9:0]), | |
| 15367 | .dout(dout[9:0]) | |
| 15368 | ); | |
| 15369 | ||
| 15370 | ||
| 15371 | ||
| 15372 | ||
| 15373 | ||
| 15374 | ||
| 15375 | ||
| 15376 | ||
| 15377 | ||
| 15378 | ||
| 15379 | ||
| 15380 | ||
| 15381 | ||
| 15382 | endmodule | |
| 15383 | ||
| 15384 | ||
| 15385 | ||
| 15386 | module n2_l2d_tstmod_cust ( | |
| 15387 | rd_wr_c3, | |
| 15388 | wayerr_c3, | |
| 15389 | wr_inhibit, | |
| 15390 | coloff_c3, | |
| 15391 | l2clk, | |
| 15392 | scanen, | |
| 15393 | si, | |
| 15394 | siclk, | |
| 15395 | soclk, | |
| 15396 | so, | |
| 15397 | delout20_rgt, | |
| 15398 | delout31_lft, | |
| 15399 | delout31_rgt, | |
| 15400 | delout20_lft) ; | |
| 15401 | wire not_wayerr_c3; | |
| 15402 | wire coloff_c3_1_3; | |
| 15403 | wire coloff_c3_2_0; | |
| 15404 | wire [1:0] msff_read_c4_scanin; | |
| 15405 | wire [1:0] msff_read_c4_scanout; | |
| 15406 | wire msff_buf_out_top_scanin; | |
| 15407 | wire msff_buf_out_top_scanout; | |
| 15408 | wire msff_buf_out_bot_scanin; | |
| 15409 | wire msff_buf_out_bot_scanout; | |
| 15410 | wire [2:0] msff_buf_out_corse_scanin; | |
| 15411 | wire [2:0] msff_buf_out_corse_scanout; | |
| 15412 | wire [2:0] msff_buf_out_fine_scanin; | |
| 15413 | wire [2:0] msff_buf_out_fine_scanout; | |
| 15414 | wire wr_inhibit_n; | |
| 15415 | wire [2:0] ff_buf_out_corse_n; | |
| 15416 | wire [2:0] ff_buf_out_fine_n; | |
| 15417 | ||
| 15418 | //----------------------------------------------------------- | |
| 15419 | // I/O declarations | |
| 15420 | //----------------------------------------------------------- | |
| 15421 | input rd_wr_c3; // | |
| 15422 | input wayerr_c3; // added 9/21/2005 | |
| 15423 | input wr_inhibit; // | |
| 15424 | // coloff_c3<3:0>, | |
| 15425 | input [3:0] coloff_c3; // | |
| 15426 | input l2clk; // | |
| 15427 | input scanen; // | |
| 15428 | input si; // | |
| 15429 | input siclk; // | |
| 15430 | input soclk; // | |
| 15431 | ||
| 15432 | output so; // | |
| 15433 | output delout20_rgt; // | |
| 15434 | output delout31_lft; // | |
| 15435 | output delout31_rgt; // | |
| 15436 | output delout20_lft; // | |
| 15437 | ||
| 15438 | ||
| 15439 | //----------------------------------------------------------------------------- | |
| 15440 | // Wire/reg declarations | |
| 15441 | //----------------------------------------------------------------------------- | |
| 15442 | ||
| 15443 | // connecting between n2_l2d_tstmod_logic & n2_l2d_tstmod_delay_cust | |
| 15444 | wire l1clk; | |
| 15445 | wire tst_bnken31_setb; | |
| 15446 | wire tst_bnken02_setb; | |
| 15447 | wire tst_bnken31_rstb; | |
| 15448 | wire tst_bnken02_rstb; | |
| 15449 | wire tst_bnken31_rstb_n; | |
| 15450 | wire tst_bnken02_rstb_n; | |
| 15451 | //wire so_internal; | |
| 15452 | wire tstmod_rst_l; | |
| 15453 | wire [5:0] corse_sel; | |
| 15454 | wire [7:0] fine_sel; | |
| 15455 | ||
| 15456 | ||
| 15457 | wire [1:0] tst_read_c3a; | |
| 15458 | //wire [1:0] tst_read_c3b; | |
| 15459 | //wire [3:0] tst_read_c4; | |
| 15460 | //wire [3:0] tst_so; | |
| 15461 | wire [1:0] tst_so; | |
| 15462 | wire [2:0] tst_so_corse; | |
| 15463 | wire [2:0] tst_so_fine; | |
| 15464 | wire tst_so_en0; | |
| 15465 | ||
| 15466 | wire ff_buf_out_top; | |
| 15467 | wire [2:0] ff_buf_out_corse; | |
| 15468 | wire [2:0] ff_buf_out_fine; | |
| 15469 | wire ff_buf_out_bot; | |
| 15470 | ||
| 15471 | ||
| 15472 | // start n2_l2d_tstmod_logic | |
| 15473 | ||
| 15474 | ||
| 15475 | n2_l2d_sp_512kb_cust_l1clkhdr_ctl_macro l1_clk_hdr ( | |
| 15476 | .l2clk (l2clk), | |
| 15477 | .se (scanen), | |
| 15478 | .l1en (1'b1), | |
| 15479 | .pce_ov (1'b1), | |
| 15480 | .stop (1'b0), | |
| 15481 | .l1clk (l1clk) | |
| 15482 | ); | |
| 15483 | ||
| 15484 | ||
| 15485 | ||
| 15486 | //assign tst_read_c3a[1] = (~wayerr_c3 & rd_wr_c3 & (coloff_c3[3] | coloff_c3[1])); | |
| 15487 | //assign tst_read_c3a[0] = (~wayerr_c3 & rd_wr_c3 & (coloff_c3[2] | coloff_c3[0])); | |
| 15488 | ||
| 15489 | ||
| 15490 | n2_l2d_sp_512kb_cust_inv_macro__width_1 inv_wayerr_c3 | |
| 15491 | ( | |
| 15492 | .dout (not_wayerr_c3), | |
| 15493 | .din (wayerr_c3) | |
| 15494 | ); | |
| 15495 | ||
| 15496 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_coloff_c3_1_3 | |
| 15497 | ( | |
| 15498 | .din0 (coloff_c3[1]), | |
| 15499 | .din1 (coloff_c3[3]), | |
| 15500 | .dout (coloff_c3_1_3) | |
| 15501 | ); | |
| 15502 | ||
| 15503 | ||
| 15504 | n2_l2d_sp_512kb_cust_or_macro__width_1 or_coloff_c3_2_3 | |
| 15505 | ( | |
| 15506 | .din0 (coloff_c3[2]), | |
| 15507 | .din1 (coloff_c3[0]), | |
| 15508 | .dout (coloff_c3_2_0) | |
| 15509 | ); | |
| 15510 | ||
| 15511 | n2_l2d_sp_512kb_cust_and_macro__ports_3__width_1 and_tst_read_c3a_1 | |
| 15512 | ( | |
| 15513 | .dout (tst_read_c3a[1]), | |
| 15514 | .din0 (not_wayerr_c3), | |
| 15515 | .din1 (coloff_c3_1_3), | |
| 15516 | .din2 (rd_wr_c3) | |
| 15517 | ); | |
| 15518 | ||
| 15519 | n2_l2d_sp_512kb_cust_and_macro__ports_3__width_1 and_tst_read_c3a_0 | |
| 15520 | ( | |
| 15521 | .dout (tst_read_c3a[0]), | |
| 15522 | .din0 (not_wayerr_c3), | |
| 15523 | .din1 (coloff_c3_2_0), | |
| 15524 | .din2 (rd_wr_c3) | |
| 15525 | ); | |
| 15526 | ||
| 15527 | n2_l2d_sp_512kb_cust_tisram_blb_macro__dmsff_4x__width_1 blb_read_c3_1 | |
| 15528 | ( | |
| 15529 | .l1clk (l1clk), | |
| 15530 | .d_a (tst_read_c3a[1]), | |
| 15531 | .q_b (tst_bnken31_setb) | |
| 15532 | ); | |
| 15533 | n2_l2d_sp_512kb_cust_tisram_blb_macro__dmsff_4x__width_1 blb_read_c3_0 | |
| 15534 | ( | |
| 15535 | .l1clk (l1clk), | |
| 15536 | .d_a (tst_read_c3a[0]), | |
| 15537 | .q_b (tst_bnken02_setb) | |
| 15538 | ); | |
| 15539 | ||
| 15540 | //initialize | |
| 15541 | //assign tst_read_c4[3:0] = 4'b0; | |
| 15542 | ||
| 15543 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_2 msff_read_c4 | |
| 15544 | ( | |
| 15545 | .scan_in (msff_read_c4_scanin[1:0]), | |
| 15546 | .scan_out (msff_read_c4_scanout[1:0]), | |
| 15547 | .din ( tst_read_c3a[1:0] & {~tst_bnken31_rstb_n,~tst_bnken02_rstb_n} ), | |
| 15548 | .l1clk ( l1clk ), | |
| 15549 | .dout ( {tst_bnken31_rstb_n,tst_bnken02_rstb_n} ), | |
| 15550 | .siclk(siclk), | |
| 15551 | .soclk(soclk) | |
| 15552 | ); | |
| 15553 | ||
| 15554 | ||
| 15555 | //assign tst_bnken31_rstb = ~tst_bnken31_rstb_n; | |
| 15556 | //assign tst_bnken02_rstb = ~tst_bnken02_rstb_n; | |
| 15557 | ||
| 15558 | n2_l2d_sp_512kb_cust_inv_macro__width_1 inv_tst_bnken31_rstb | |
| 15559 | ( | |
| 15560 | .dout (tst_bnken31_rstb), | |
| 15561 | .din (tst_bnken31_rstb_n) | |
| 15562 | ); | |
| 15563 | ||
| 15564 | n2_l2d_sp_512kb_cust_inv_macro__width_1 inv_tst_bnken02_rstb | |
| 15565 | ( | |
| 15566 | .dout (tst_bnken02_rstb), | |
| 15567 | .din (tst_bnken02_rstb_n) | |
| 15568 | ); | |
| 15569 | ||
| 15570 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_1 msff_buf_out_top | |
| 15571 | ( | |
| 15572 | .scan_in (msff_buf_out_top_scanin), | |
| 15573 | .scan_out (msff_buf_out_top_scanout), | |
| 15574 | .din ( ff_buf_out_top ), | |
| 15575 | .l1clk ( l1clk ), | |
| 15576 | .dout ( ff_buf_out_top ), | |
| 15577 | .siclk(siclk), | |
| 15578 | .soclk(soclk) | |
| 15579 | ); | |
| 15580 | ||
| 15581 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_1 msff_buf_out_bot | |
| 15582 | ( | |
| 15583 | .scan_in (msff_buf_out_bot_scanin), | |
| 15584 | .scan_out (msff_buf_out_bot_scanout), | |
| 15585 | .din ( ff_buf_out_bot ), | |
| 15586 | .l1clk ( l1clk ), | |
| 15587 | .dout ( ff_buf_out_bot ), | |
| 15588 | .siclk(siclk), | |
| 15589 | .soclk(soclk) | |
| 15590 | ); | |
| 15591 | ||
| 15592 | ||
| 15593 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_3 msff_buf_out_corse | |
| 15594 | ( | |
| 15595 | .scan_in (msff_buf_out_corse_scanin[2:0]), | |
| 15596 | .scan_out (msff_buf_out_corse_scanout[2:0]), | |
| 15597 | .din ( ff_buf_out_corse[2:0] ), | |
| 15598 | .l1clk ( l1clk ), | |
| 15599 | .dout ( ff_buf_out_corse[2:0] ), | |
| 15600 | .siclk(siclk), | |
| 15601 | .soclk(soclk) | |
| 15602 | ); | |
| 15603 | ||
| 15604 | n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_3 msff_buf_out_fine | |
| 15605 | ( | |
| 15606 | .scan_in (msff_buf_out_fine_scanin[2:0]), | |
| 15607 | .scan_out (msff_buf_out_fine_scanout[2:0]), | |
| 15608 | .din ( ff_buf_out_fine[2:0] ), | |
| 15609 | .l1clk ( l1clk ), | |
| 15610 | .dout ( ff_buf_out_fine[2:0] ), | |
| 15611 | .siclk(siclk), | |
| 15612 | .soclk(soclk) | |
| 15613 | ); | |
| 15614 | ||
| 15615 | //assign tstmod_rst_l = ff_buf_out_top & ff_buf_out_bot & ~wr_inhibit; | |
| 15616 | ||
| 15617 | ||
| 15618 | n2_l2d_sp_512kb_cust_inv_macro__width_1 inv_wr_inhibit | |
| 15619 | ( | |
| 15620 | .dout (wr_inhibit_n), | |
| 15621 | .din (wr_inhibit) | |
| 15622 | ); | |
| 15623 | ||
| 15624 | n2_l2d_sp_512kb_cust_and_macro__ports_3__width_1 and_tstmod_rst_l | |
| 15625 | ( | |
| 15626 | .dout (tstmod_rst_l), | |
| 15627 | .din0 (ff_buf_out_top), | |
| 15628 | .din1 (ff_buf_out_bot), | |
| 15629 | .din2 (wr_inhibit_n) | |
| 15630 | ); | |
| 15631 | ||
| 15632 | ||
| 15633 | n2_l2d_sp_512kb_cust_inv_macro__width_3 inv_ff_buf_out_corse_012 | |
| 15634 | ( | |
| 15635 | .dout (ff_buf_out_corse_n[2:0]), | |
| 15636 | .din (ff_buf_out_corse[2:0]) | |
| 15637 | ); | |
| 15638 | ||
| 15639 | ||
| 15640 | ||
| 15641 | ||
| 15642 | ||
| 15643 | //decoding: 3-to-8. 2/3, 1/0 swapped | |
| 15644 | //assign corse_sel[5] = ff_buf_out_corse[2] & ~ff_buf_out_corse[1] & ~ff_buf_out_corse[0]; | |
| 15645 | ||
| 15646 | n2_l2d_sp_512kb_cust_and_macro__ports_3__width_1 and_corse_sel_5 | |
| 15647 | ( | |
| 15648 | .dout (corse_sel[5]), | |
| 15649 | .din0 (ff_buf_out_corse[2]), | |
| 15650 | .din1 (ff_buf_out_corse_n[1]), | |
| 15651 | .din2 (ff_buf_out_corse_n[0]) | |
| 15652 | ); | |
| 15653 | ||
| 15654 | //assign corse_sel[4] = ff_buf_out_corse[2] & ~ff_buf_out_corse[1] & ff_buf_out_corse[0]; | |
| 15655 | ||
| 15656 | n2_l2d_sp_512kb_cust_and_macro__ports_3__width_1 and_corse_sel_4 | |
| 15657 | ( | |
| 15658 | .dout (corse_sel[4]), | |
| 15659 | .din0 (ff_buf_out_corse[2]), | |
| 15660 | .din1 (ff_buf_out_corse_n[1]), | |
| 15661 | .din2 (ff_buf_out_corse[0]) | |
| 15662 | ); | |
| 15663 | ||
| 15664 | //assign corse_sel[3] = ~ff_buf_out_corse[2] & ff_buf_out_corse[1] & ~ff_buf_out_corse[0]; | |
| 15665 | ||
| 15666 | n2_l2d_sp_512kb_cust_and_macro__ports_3__width_1 and_corse_sel_3 | |
| 15667 | ( | |
| 15668 | .dout (corse_sel[3]), | |
| 15669 | .din0 (ff_buf_out_corse_n[2]), | |
| 15670 | .din1 (ff_buf_out_corse[1]), | |
| 15671 | .din2 (ff_buf_out_corse_n[0]) | |
| 15672 | ); | |
| 15673 | ||
| 15674 | //assign corse_sel[2] = ~ff_buf_out_corse[2] & ff_buf_out_corse[1] & ff_buf_out_corse[0]; | |
| 15675 | ||
| 15676 | n2_l2d_sp_512kb_cust_and_macro__ports_3__width_1 and_corse_sel_2 | |
| 15677 | ( | |
| 15678 | .dout (corse_sel[2]), | |
| 15679 | .din0 (ff_buf_out_corse_n[2]), | |
| 15680 | .din1 (ff_buf_out_corse[1]), | |
| 15681 | .din2 (ff_buf_out_corse[0]) | |
| 15682 | ); | |
| 15683 | ||
| 15684 | //assign corse_sel[1] = ~ff_buf_out_corse[2] & ~ff_buf_out_corse[1] & ~ff_buf_out_corse[0]; | |
| 15685 | ||
| 15686 | n2_l2d_sp_512kb_cust_and_macro__ports_3__width_1 and_corse_sel_1 | |
| 15687 | ( | |
| 15688 | .dout (corse_sel[1]), | |
| 15689 | .din0 (ff_buf_out_corse_n[2]), | |
| 15690 | .din1 (ff_buf_out_corse_n[1]), | |
| 15691 | .din2 (ff_buf_out_corse_n[0]) | |
| 15692 | ); | |
| 15693 | ||
| 15694 | //assign corse_sel[0] = ~ff_buf_out_corse[2] & ~ff_buf_out_corse[1] & ff_buf_out_corse[0]; | |
| 15695 | ||
| 15696 | n2_l2d_sp_512kb_cust_and_macro__ports_3__width_1 and_corse_sel_0 | |
| 15697 | ( | |
| 15698 | .dout (corse_sel[0]), | |
| 15699 | .din0 (ff_buf_out_corse_n[2]), | |
| 15700 | .din1 (ff_buf_out_corse_n[1]), | |
| 15701 | .din2 (ff_buf_out_corse[0]) | |
| 15702 | ); | |
| 15703 | ||
| 15704 | n2_l2d_sp_512kb_cust_inv_macro__width_3 inv_ff_buf_out_fine_n | |
| 15705 | ( | |
| 15706 | .dout (ff_buf_out_fine_n[2:0]), | |
| 15707 | .din (ff_buf_out_fine[2:0]) | |
| 15708 | ); | |
| 15709 | ||
| 15710 | ||
| 15711 | //assign fine_sel[7] = ff_buf_out_fine[2] & ff_buf_out_fine[1] & ~ff_buf_out_fine[0]; | |
| 15712 | ||
| 15713 | n2_l2d_sp_512kb_cust_and_macro__ports_3__width_1 and_fine_sel_7 | |
| 15714 | ( | |
| 15715 | .dout (fine_sel[7]), | |
| 15716 | .din0 (ff_buf_out_fine[2]), | |
| 15717 | .din1 (ff_buf_out_fine[1]), | |
| 15718 | .din2 (ff_buf_out_fine_n[0]) | |
| 15719 | ); | |
| 15720 | ||
| 15721 | //assign fine_sel[6] = ff_buf_out_fine[2] & ff_buf_out_fine[1] & ff_buf_out_fine[0]; | |
| 15722 | ||
| 15723 | ||
| 15724 | n2_l2d_sp_512kb_cust_and_macro__ports_3__width_1 and_fine_sel_6 | |
| 15725 | ( | |
| 15726 | .dout (fine_sel[6]), | |
| 15727 | .din0 (ff_buf_out_fine[2]), | |
| 15728 | .din1 (ff_buf_out_fine[1]), | |
| 15729 | .din2 (ff_buf_out_fine[0]) | |
| 15730 | ); | |
| 15731 | ||
| 15732 | //assign fine_sel[5] = ff_buf_out_fine[2] & ~ff_buf_out_fine[1] & ~ff_buf_out_fine[0]; | |
| 15733 | ||
| 15734 | ||
| 15735 | n2_l2d_sp_512kb_cust_and_macro__ports_3__width_1 and_fine_sel_5 | |
| 15736 | ( | |
| 15737 | .dout (fine_sel[5]), | |
| 15738 | .din0 (ff_buf_out_fine[2]), | |
| 15739 | .din1 (ff_buf_out_fine_n[1]), | |
| 15740 | .din2 (ff_buf_out_fine_n[0]) | |
| 15741 | ); | |
| 15742 | ||
| 15743 | //assign fine_sel[4] = ff_buf_out_fine[2] & ~ff_buf_out_fine[1] & ff_buf_out_fine[0]; | |
| 15744 | ||
| 15745 | ||
| 15746 | n2_l2d_sp_512kb_cust_and_macro__ports_3__width_1 and_fine_sel_4 | |
| 15747 | ( | |
| 15748 | .dout (fine_sel[4]), | |
| 15749 | .din0 (ff_buf_out_fine[2]), | |
| 15750 | .din1 (ff_buf_out_fine_n[1]), | |
| 15751 | .din2 (ff_buf_out_fine[0]) | |
| 15752 | ); | |
| 15753 | ||
| 15754 | //assign fine_sel[3] = ~ff_buf_out_fine[2] & ff_buf_out_fine[1] & ~ff_buf_out_fine[0]; | |
| 15755 | ||
| 15756 | ||
| 15757 | n2_l2d_sp_512kb_cust_and_macro__ports_3__width_1 and_fine_sel_3 | |
| 15758 | ( | |
| 15759 | .dout (fine_sel[3]), | |
| 15760 | .din0 (ff_buf_out_fine_n[2]), | |
| 15761 | .din1 (ff_buf_out_fine[1]), | |
| 15762 | .din2 (ff_buf_out_fine_n[0]) | |
| 15763 | ); | |
| 15764 | ||
| 15765 | //assign fine_sel[2] = ~ff_buf_out_fine[2] & ff_buf_out_fine[1] & ff_buf_out_fine[0]; | |
| 15766 | ||
| 15767 | ||
| 15768 | n2_l2d_sp_512kb_cust_and_macro__ports_3__width_1 and_fine_sel_2 | |
| 15769 | ( | |
| 15770 | .dout (fine_sel[2]), | |
| 15771 | .din0 (ff_buf_out_fine_n[2]), | |
| 15772 | .din1 (ff_buf_out_fine[1]), | |
| 15773 | .din2 (ff_buf_out_fine[0]) | |
| 15774 | ); | |
| 15775 | ||
| 15776 | //assign fine_sel[1] = ~ff_buf_out_fine[2] & ~ff_buf_out_fine[1] & ~ff_buf_out_fine[0]; | |
| 15777 | ||
| 15778 | ||
| 15779 | n2_l2d_sp_512kb_cust_and_macro__ports_3__width_1 and_fine_sel_1 | |
| 15780 | ( | |
| 15781 | .dout (fine_sel[1]), | |
| 15782 | .din0 (ff_buf_out_fine_n[2]), | |
| 15783 | .din1 (ff_buf_out_fine_n[1]), | |
| 15784 | .din2 (ff_buf_out_fine_n[0]) | |
| 15785 | ); | |
| 15786 | ||
| 15787 | //assign fine_sel[0] = ~ff_buf_out_fine[2] & ~ff_buf_out_fine[1] & ff_buf_out_fine[0]; | |
| 15788 | ||
| 15789 | ||
| 15790 | n2_l2d_sp_512kb_cust_and_macro__ports_3__width_1 and_fine_sel_0 | |
| 15791 | ( | |
| 15792 | .dout (fine_sel[0]), | |
| 15793 | .din0 (ff_buf_out_fine_n[2]), | |
| 15794 | .din1 (ff_buf_out_fine_n[1]), | |
| 15795 | .din2 (ff_buf_out_fine[0]) | |
| 15796 | ); | |
| 15797 | ||
| 15798 | ||
| 15799 | //end of n2_l2d_tstmod_logic | |
| 15800 | ||
| 15801 | n2_l2d_tstmod_delay_cust tstmod_delay // NOT ATPGABLE | |
| 15802 | ( | |
| 15803 | .l1clk (l1clk), | |
| 15804 | .tstmod_rst_l (tstmod_rst_l), | |
| 15805 | .tst_bnken31_setb(tst_bnken31_setb), | |
| 15806 | .tst_bnken02_setb(tst_bnken02_setb), | |
| 15807 | .tst_bnken31_rstb(tst_bnken31_rstb), | |
| 15808 | .tst_bnken02_rstb(tst_bnken02_rstb), | |
| 15809 | .corse_sel (corse_sel[5:0]), | |
| 15810 | .fine_sel (fine_sel[7:0]), | |
| 15811 | .delout31_lft (delout31_lft), | |
| 15812 | .delout31_rgt (delout31_rgt), | |
| 15813 | .delout20_lft (delout20_lft), | |
| 15814 | .delout20_rgt (delout20_rgt) | |
| 15815 | ); | |
| 15816 | ||
| 15817 | ||
| 15818 | ||
| 15819 | // scanorder start | |
| 15820 | //msff_read_c4_scanin[1:0] | |
| 15821 | //msff_buf_out_top_scanin | |
| 15822 | //msff_buf_out_corse_scanin[0] | |
| 15823 | //msff_buf_out_corse_scanin[1] | |
| 15824 | //msff_buf_out_corse_scanin[2] | |
| 15825 | //msff_buf_out_fine_scanin[0] | |
| 15826 | //msff_buf_out_fine_scanin[1] | |
| 15827 | //msff_buf_out_fine_scanin[2] | |
| 15828 | //msff_buf_out_bot_scanin | |
| 15829 | // scanorder end281 // fixscan start | |
| 15830 | assign msff_read_c4_scanin[1]=si; | |
| 15831 | assign msff_read_c4_scanin[0]=msff_read_c4_scanout[1]; | |
| 15832 | assign msff_buf_out_top_scanin=msff_read_c4_scanout[0]; | |
| 15833 | assign msff_buf_out_corse_scanin[0]=msff_buf_out_top_scanout; | |
| 15834 | assign msff_buf_out_corse_scanin[1]=msff_buf_out_corse_scanout[0]; | |
| 15835 | assign msff_buf_out_corse_scanin[2]=msff_buf_out_corse_scanout[1]; | |
| 15836 | assign msff_buf_out_fine_scanin[0]=msff_buf_out_corse_scanout[2]; | |
| 15837 | assign msff_buf_out_fine_scanin[1]=msff_buf_out_fine_scanout[0]; | |
| 15838 | assign msff_buf_out_fine_scanin[2]=msff_buf_out_fine_scanout[1]; | |
| 15839 | assign msff_buf_out_bot_scanin=msff_buf_out_fine_scanout[2]; | |
| 15840 | assign so=msff_buf_out_bot_scanout; | |
| 15841 | // fixscan end | |
| 15842 | endmodule // main program | |
| 15843 | ||
| 15844 | ////////////////////////////////////////////// | |
| 15845 | ////////////////////////////////////////////// | |
| 15846 | ////////////////////////////////////////////// | |
| 15847 | ////////////////////////////////////////////// | |
| 15848 | ////////////////////////////////////////////// | |
| 15849 | ////////////////////////////////////////////// | |
| 15850 | ////////////////////////////////////////////// | |
| 15851 | ////////////////////////////////////////////// | |
| 15852 | ////////////////////////////////////////////// | |
| 15853 | ////////////////////////////////////////////// | |
| 15854 | ////////////////////////////////////////////// | |
| 15855 | // THE FOLLOWING MODULE IS BLACKBOX TO ATPG | |
| 15856 | ////////////////////////////////////////////// | |
| 15857 | ||
| 15858 | module n2_l2d_tstmod_delay_cust ( | |
| 15859 | l1clk, | |
| 15860 | tstmod_rst_l, | |
| 15861 | tst_bnken31_setb, | |
| 15862 | tst_bnken02_setb, | |
| 15863 | tst_bnken31_rstb, | |
| 15864 | tst_bnken02_rstb, | |
| 15865 | corse_sel, | |
| 15866 | fine_sel, | |
| 15867 | delout31_lft, | |
| 15868 | delout31_rgt, | |
| 15869 | delout20_lft, | |
| 15870 | delout20_rgt) ; | |
| 15871 | ||
| 15872 | input l1clk; | |
| 15873 | input tstmod_rst_l; | |
| 15874 | input tst_bnken31_setb; | |
| 15875 | input tst_bnken02_setb; | |
| 15876 | input tst_bnken31_rstb; | |
| 15877 | input tst_bnken02_rstb; | |
| 15878 | input [5:0] corse_sel; | |
| 15879 | input [7:0] fine_sel; | |
| 15880 | ||
| 15881 | output delout31_lft; | |
| 15882 | output delout31_rgt; | |
| 15883 | output delout20_lft; | |
| 15884 | output delout20_rgt; | |
| 15885 | ||
| 15886 | wire [5:0] corse_sel_muxout; | |
| 15887 | wire [7:1] fine_sel_muxout; | |
| 15888 | ||
| 15889 | wire delayline_en_31; | |
| 15890 | wire delayline_en_02; | |
| 15891 | wire fine_dout_31; | |
| 15892 | wire fine_dout_02; | |
| 15893 | ||
| 15894 | assign corse_sel_muxout[5:0] = ( {1'b0,corse_sel_muxout[5:1]} & {~({5{tstmod_rst_l}} & corse_sel[5:1]),(tstmod_rst_l & ~corse_sel[0])}) | | |
| 15895 | ({6{l1clk}} & {{{5{tstmod_rst_l}} & corse_sel[5:1]},(~(tstmod_rst_l & ~corse_sel[0])) & tstmod_rst_l}); | |
| 15896 | ||
| 15897 | // | |
| 15898 | //assign fine_sel_muxout[7:1] = ( ({corse_sel_muxout[0],fine_sel_muxout[7:2]}) & (~fine_sel[7:1]) ) | |
| 15899 | // | ({&{corse_sel_muxout[0]}} & fine_sel[7:1]); | |
| 15900 | ||
| 15901 | ||
| 15902 | assign fine_sel_muxout[7:1] = ( ({corse_sel_muxout[0],fine_sel_muxout[7:2]}) & (~fine_sel[7:1]) ) | | |
| 15903 | ({7{corse_sel_muxout[0]}} & fine_sel[7:1]); | |
| 15904 | ||
| 15905 | ||
| 15906 | srlatch1 latch1_31 | |
| 15907 | ( | |
| 15908 | .setl (~(l1clk & tstmod_rst_l & tst_bnken31_setb)), | |
| 15909 | .rstl1 (tstmod_rst_l), | |
| 15910 | .rstl2 (l1clk|~tst_bnken31_rstb), | |
| 15911 | .out (delayline_en_31) | |
| 15912 | ); | |
| 15913 | ||
| 15914 | srlatch1 latch1_02 | |
| 15915 | ( | |
| 15916 | .setl (~(l1clk & tstmod_rst_l & tst_bnken02_setb)), | |
| 15917 | .rstl1 (tstmod_rst_l), | |
| 15918 | .rstl2 (l1clk|~tst_bnken02_rstb), | |
| 15919 | .out (delayline_en_02) | |
| 15920 | ); | |
| 15921 | ||
| 15922 | srlatch2 latch2_31 | |
| 15923 | ( | |
| 15924 | .setl1 (~(fine_sel_muxout[1] & delayline_en_31 & ~fine_sel[0])), | |
| 15925 | .setl2 (~(corse_sel_muxout[0] & delayline_en_31 & fine_sel[0])), | |
| 15926 | .rstl (delayline_en_31), | |
| 15927 | .out (fine_dout_31) | |
| 15928 | ); | |
| 15929 | ||
| 15930 | srlatch2 latch2_02 | |
| 15931 | ( | |
| 15932 | .setl1 (~(fine_sel_muxout[1] & delayline_en_02 & ~fine_sel[0])), | |
| 15933 | .setl2 (~(corse_sel_muxout[0] & delayline_en_02 & fine_sel[0])), | |
| 15934 | .rstl (delayline_en_02), | |
| 15935 | .out (fine_dout_02) | |
| 15936 | ); | |
| 15937 | ||
| 15938 | assign delout31_lft = ~fine_dout_31; | |
| 15939 | assign delout31_rgt = ~fine_dout_31; | |
| 15940 | assign delout20_lft = ~fine_dout_02; | |
| 15941 | assign delout20_rgt = ~fine_dout_02; | |
| 15942 | endmodule //n2_l2d_tstmod_delay_cust | |
| 15943 | ||
| 15944 | ||
| 15945 | module srlatch1 ( | |
| 15946 | setl, | |
| 15947 | rstl1, | |
| 15948 | rstl2, | |
| 15949 | out) ; | |
| 15950 | ||
| 15951 | input setl; | |
| 15952 | input rstl1; | |
| 15953 | input rstl2; | |
| 15954 | output out; | |
| 15955 | ||
| 15956 | reg out; | |
| 15957 | ||
| 15958 | always @(setl or rstl1 or rstl2) | |
| 15959 | begin | |
| 15960 | if(~setl) out = 1'b1; | |
| 15961 | else if( ~(rstl1 & rstl2) ) out = 1'b0; | |
| 15962 | end | |
| 15963 | endmodule // srlatch1 | |
| 15964 | ||
| 15965 | ||
| 15966 | module srlatch2 ( | |
| 15967 | setl1, | |
| 15968 | setl2, | |
| 15969 | rstl, | |
| 15970 | out) ; | |
| 15971 | ||
| 15972 | input setl1; | |
| 15973 | input setl2; | |
| 15974 | input rstl; | |
| 15975 | output out; | |
| 15976 | ||
| 15977 | reg out; | |
| 15978 | ||
| 15979 | always @(setl1 or setl2 or rstl) begin | |
| 15980 | if( (setl1==0) || (setl2==0)) out = 1'b1; | |
| 15981 | else if(~rstl) out = 1'b0; | |
| 15982 | end | |
| 15983 | endmodule // srlatch2 | |
| 15984 | ||
| 15985 | ||
| 15986 | // | |
| 15987 | // and macro for ports = 2,3,4 | |
| 15988 | // | |
| 15989 | // | |
| 15990 | ||
| 15991 | ||
| 15992 | ||
| 15993 | ||
| 15994 | ||
| 15995 | module n2_l2d_sp_512kb_cust_and_macro__ports_3__width_1 ( | |
| 15996 | din0, | |
| 15997 | din1, | |
| 15998 | din2, | |
| 15999 | dout); | |
| 16000 | input [0:0] din0; | |
| 16001 | input [0:0] din1; | |
| 16002 | input [0:0] din2; | |
| 16003 | output [0:0] dout; | |
| 16004 | ||
| 16005 | ||
| 16006 | ||
| 16007 | ||
| 16008 | ||
| 16009 | ||
| 16010 | and3 #(1) d0_0 ( | |
| 16011 | .in0(din0[0:0]), | |
| 16012 | .in1(din1[0:0]), | |
| 16013 | .in2(din2[0:0]), | |
| 16014 | .out(dout[0:0]) | |
| 16015 | ); | |
| 16016 | ||
| 16017 | ||
| 16018 | ||
| 16019 | ||
| 16020 | ||
| 16021 | ||
| 16022 | ||
| 16023 | ||
| 16024 | ||
| 16025 | endmodule | |
| 16026 | ||
| 16027 | ||
| 16028 | ||
| 16029 | ||
| 16030 | ||
| 16031 | // | |
| 16032 | // macro for cl_mc1_tisram_blb_{8,4}x flops | |
| 16033 | // | |
| 16034 | // | |
| 16035 | ||
| 16036 | ||
| 16037 | ||
| 16038 | ||
| 16039 | ||
| 16040 | module n2_l2d_sp_512kb_cust_tisram_blb_macro__dmsff_4x__width_1 ( | |
| 16041 | d_a, | |
| 16042 | l1clk, | |
| 16043 | q_b); | |
| 16044 | input [0:0] d_a; | |
| 16045 | input l1clk; | |
| 16046 | output [0:0] q_b; | |
| 16047 | ||
| 16048 | ||
| 16049 | ||
| 16050 | ||
| 16051 | ||
| 16052 | ||
| 16053 | tisram_blb #(1) d0_0 ( | |
| 16054 | .d(d_a[0:0]), | |
| 16055 | .l1clk(l1clk), | |
| 16056 | .latout_l(q_b[0:0]) | |
| 16057 | ); | |
| 16058 | ||
| 16059 | ||
| 16060 | ||
| 16061 | ||
| 16062 | ||
| 16063 | ||
| 16064 | ||
| 16065 | ||
| 16066 | ||
| 16067 | ||
| 16068 | //place::generic_place($width,$stack,$left); | |
| 16069 | ||
| 16070 | endmodule | |
| 16071 | ||
| 16072 | ||
| 16073 | ||
| 16074 | ||
| 16075 | ||
| 16076 | ||
| 16077 | ||
| 16078 | ||
| 16079 | ||
| 16080 | // any PARAMS parms go into naming of macro | |
| 16081 | ||
| 16082 | module n2_l2d_sp_512kb_cust_msff_ctl_macro__fs_1__width_3 ( | |
| 16083 | din, | |
| 16084 | l1clk, | |
| 16085 | scan_in, | |
| 16086 | siclk, | |
| 16087 | soclk, | |
| 16088 | dout, | |
| 16089 | scan_out); | |
| 16090 | wire [2:0] fdin; | |
| 16091 | ||
| 16092 | input [2:0] din; | |
| 16093 | input l1clk; | |
| 16094 | input [2:0] scan_in; | |
| 16095 | ||
| 16096 | ||
| 16097 | input siclk; | |
| 16098 | input soclk; | |
| 16099 | ||
| 16100 | output [2:0] dout; | |
| 16101 | output [2:0] scan_out; | |
| 16102 | assign fdin[2:0] = din[2:0]; | |
| 16103 | ||
| 16104 | ||
| 16105 | ||
| 16106 | ||
| 16107 | ||
| 16108 | ||
| 16109 | dff #(3) d0_0 ( | |
| 16110 | .l1clk(l1clk), | |
| 16111 | .siclk(siclk), | |
| 16112 | .soclk(soclk), | |
| 16113 | .d(fdin[2:0]), | |
| 16114 | .si(scan_in[2:0]), | |
| 16115 | .so(scan_out[2:0]), | |
| 16116 | .q(dout[2:0]) | |
| 16117 | ); | |
| 16118 | ||
| 16119 | ||
| 16120 | ||
| 16121 | ||
| 16122 | ||
| 16123 | ||
| 16124 | ||
| 16125 | ||
| 16126 | ||
| 16127 | ||
| 16128 | ||
| 16129 | ||
| 16130 | endmodule | |
| 16131 | ||
| 16132 | ||
| 16133 | ||
| 16134 | ||
| 16135 | ||
| 16136 | ||
| 16137 | ||
| 16138 | ||
| 16139 | ||
| 16140 | // | |
| 16141 | // invert macro | |
| 16142 | // | |
| 16143 | // | |
| 16144 | ||
| 16145 | ||
| 16146 | ||
| 16147 | ||
| 16148 | ||
| 16149 | module n2_l2d_sp_512kb_cust_inv_macro__width_3 ( | |
| 16150 | din, | |
| 16151 | dout); | |
| 16152 | input [2:0] din; | |
| 16153 | output [2:0] dout; | |
| 16154 | ||
| 16155 | ||
| 16156 | ||
| 16157 | ||
| 16158 | ||
| 16159 | ||
| 16160 | inv #(3) d0_0 ( | |
| 16161 | .in(din[2:0]), | |
| 16162 | .out(dout[2:0]) | |
| 16163 | ); | |
| 16164 | ||
| 16165 | ||
| 16166 | ||
| 16167 | ||
| 16168 | ||
| 16169 | ||
| 16170 | ||
| 16171 | ||
| 16172 | ||
| 16173 | endmodule | |
| 16174 | ||
| 16175 | ||
| 16176 | ||
| 16177 | ||
| 16178 | ||
| 16179 | ||
| 16180 | ||
| 16181 | /* ******************************************** | |
| 16182 | ||
| 16183 | TRUTH TABLE FOR CLK OUTPUT | |
| 16184 | ||
| 16185 | div_en div_bypass div_r div_f cclk | |
| 16186 | ========================================= | |
| 16187 | 0 0 1 0 gclk | |
| 16188 | 1 0 div_ph 1 div_ph | |
| 16189 | x 1 1 0 gclk | |
| 16190 | ||
| 16191 | ******************************************** */ | |
| 16192 | ||
| 16193 | ||
| 16194 | ||
| 16195 | ||
| 16196 | ||
| 16197 | module n2_clk_clstr_hdr_cust ( | |
| 16198 | gclk, | |
| 16199 | l2clk, | |
| 16200 | cluster_arst_l, | |
| 16201 | ccu_div_ph, | |
| 16202 | cluster_div_en, | |
| 16203 | tcu_div_bypass, | |
| 16204 | scan_in, | |
| 16205 | scan_en, | |
| 16206 | tcu_aclk, | |
| 16207 | tcu_bclk, | |
| 16208 | ccu_cmp_slow_sync_en, | |
| 16209 | ccu_slow_cmp_sync_en, | |
| 16210 | tcu_pce_ov, | |
| 16211 | tcu_clk_stop, | |
| 16212 | rst_por_, | |
| 16213 | rst_wmr_, | |
| 16214 | rst_wmr_protect, | |
| 16215 | tcu_wr_inhibit, | |
| 16216 | tcu_atpg_mode, | |
| 16217 | array_wr_inhibit, | |
| 16218 | aclk_wmr, | |
| 16219 | aclk, | |
| 16220 | bclk, | |
| 16221 | cmp_slow_sync_en, | |
| 16222 | slow_cmp_sync_en, | |
| 16223 | pce_ov, | |
| 16224 | por_, | |
| 16225 | wmr_, | |
| 16226 | wmr_protect, | |
| 16227 | scan_out, | |
| 16228 | cclk | |
| 16229 | ); | |
| 16230 | ||
| 16231 | // ******************************* | |
| 16232 | // port declaration | |
| 16233 | // ******************************* | |
| 16234 | ||
| 16235 | input gclk; | |
| 16236 | input l2clk; | |
| 16237 | input cluster_arst_l; | |
| 16238 | input ccu_div_ph; | |
| 16239 | input cluster_div_en; | |
| 16240 | input tcu_div_bypass; | |
| 16241 | input scan_in; | |
| 16242 | input scan_en; | |
| 16243 | input tcu_aclk; | |
| 16244 | input tcu_bclk; | |
| 16245 | input ccu_cmp_slow_sync_en; | |
| 16246 | input ccu_slow_cmp_sync_en; | |
| 16247 | input tcu_pce_ov; | |
| 16248 | input tcu_clk_stop; | |
| 16249 | input rst_por_; | |
| 16250 | input rst_wmr_; | |
| 16251 | input rst_wmr_protect; | |
| 16252 | input tcu_wr_inhibit; | |
| 16253 | input tcu_atpg_mode; | |
| 16254 | output array_wr_inhibit; | |
| 16255 | output aclk_wmr; | |
| 16256 | output aclk; | |
| 16257 | output bclk; | |
| 16258 | output cmp_slow_sync_en; | |
| 16259 | output slow_cmp_sync_en; | |
| 16260 | output pce_ov; | |
| 16261 | output por_; | |
| 16262 | output wmr_; | |
| 16263 | output wmr_protect; | |
| 16264 | output scan_out; | |
| 16265 | output cclk; | |
| 16266 | ||
| 16267 | ||
| 16268 | // ******************************* | |
| 16269 | // wire declaration | |
| 16270 | // ******************************* | |
| 16271 | ||
| 16272 | wire gclk; | |
| 16273 | wire l2clk; | |
| 16274 | wire cluster_arst_l; | |
| 16275 | wire ccu_div_ph; | |
| 16276 | wire cluster_div_en; | |
| 16277 | wire tcu_div_bypass; | |
| 16278 | wire scan_in; | |
| 16279 | wire scan_en; | |
| 16280 | wire tcu_aclk; | |
| 16281 | wire tcu_bclk; | |
| 16282 | wire ccu_cmp_slow_sync_en; | |
| 16283 | wire ccu_slow_cmp_sync_en; | |
| 16284 | wire tcu_pce_ov; | |
| 16285 | wire tcu_clk_stop; | |
| 16286 | wire rst_por_; | |
| 16287 | wire rst_wmr_; | |
| 16288 | wire rst_wmr_protect; | |
| 16289 | wire tcu_wr_inhibit; // to be made input | |
| 16290 | wire tcu_atpg_mode; // to be made input | |
| 16291 | wire array_wr_inhibit; // to be made output | |
| 16292 | wire aclk_wmr; | |
| 16293 | wire aclk; | |
| 16294 | wire bclk; | |
| 16295 | wire cmp_slow_sync_en; | |
| 16296 | wire slow_cmp_sync_en; | |
| 16297 | wire pce_ov; | |
| 16298 | wire por_; | |
| 16299 | wire wmr_; | |
| 16300 | wire wmr_protect; | |
| 16301 | wire scan_out; | |
| 16302 | wire cclk; | |
| 16303 | ||
| 16304 | ||
| 16305 | // additional internal nets | |
| 16306 | wire div_r; | |
| 16307 | // wire div_f; // vlint | |
| 16308 | ||
| 16309 | wire cluster_div_en_n; | |
| 16310 | wire tcu_div_bypass_n; | |
| 16311 | ||
| 16312 | ||
| 16313 | wire sel0; | |
| 16314 | wire sel1; | |
| 16315 | // wire sel2; // vlint | |
| 16316 | ||
| 16317 | wire div_out; | |
| 16318 | // wire div_r_n; // vlint | |
| 16319 | // wire div_f_n; // vlint | |
| 16320 | ||
| 16321 | // wire gclk_n; // vlint | |
| 16322 | wire array_wr_inhibit_n; | |
| 16323 | ||
| 16324 | ||
| 16325 | wire cclk_n; | |
| 16326 | wire pre_cclk; | |
| 16327 | wire div_clk; | |
| 16328 | ||
| 16329 | wire l1clk; | |
| 16330 | wire l1gclk; | |
| 16331 | ||
| 16332 | wire aclk_gated; | |
| 16333 | wire bclk_gated; | |
| 16334 | wire scan_en_gated; | |
| 16335 | wire scan_out_pre_mux; | |
| 16336 | ||
| 16337 | wire aclk_gated_n; | |
| 16338 | wire bclk_gated_n; | |
| 16339 | wire scan_en_gated_n; | |
| 16340 | wire tcu_atpg_mode_n; | |
| 16341 | ||
| 16342 | wire scan_ch; | |
| 16343 | ||
| 16344 | // wire clk_stop_muxed; // vlint | |
| 16345 | // wire clk_stop_q; // vlint | |
| 16346 | wire clk_stop_synced; | |
| 16347 | ||
| 16348 | wire rst_wmr_protect_n; | |
| 16349 | wire aclk_wmr_n; | |
| 16350 | wire div_r_sync; | |
| 16351 | wire sel0_n; | |
| 16352 | wire sel1_n; | |
| 16353 | wire div_ph_blatch; | |
| 16354 | wire div_r_sync_n; | |
| 16355 | wire div_mux; | |
| 16356 | ||
| 16357 | // ********************************************************** | |
| 16358 | // buffered & gated stuff | |
| 16359 | // ********************************************************** | |
| 16360 | ||
| 16361 | cl_u1_buf_1x aclk_buf ( .in( tcu_aclk ), .out ( aclk ) ); | |
| 16362 | cl_u1_buf_1x bclk_buf ( .in( tcu_bclk ), .out ( bclk ) ); | |
| 16363 | cl_u1_buf_1x pce_ov_buf ( .in( tcu_pce_ov ), .out ( pce_ov ) ); | |
| 16364 | cl_u1_buf_1x wmr_protect_buf ( .in( rst_wmr_protect ), .out ( wmr_protect ) ); | |
| 16365 | ||
| 16366 | // assign aclk_gated = aclk & tcu_atpg_mode; | |
| 16367 | // assign bclk_gated = bclk & tcu_atpg_mode; | |
| 16368 | // assign scan_en_gated = scan_en & tcu_atpg_mode; | |
| 16369 | // implemented right here | |
| 16370 | cl_u1_nand2_1x aclk_gated_nand ( .in0 (aclk), .in1 (tcu_atpg_mode), .out (aclk_gated_n) ); | |
| 16371 | cl_u1_nand2_1x bclk_gated_nand ( .in0 (bclk), .in1 (tcu_atpg_mode), .out (bclk_gated_n) ); | |
| 16372 | cl_u1_nand2_1x scan_en_gated_nand ( .in0 (scan_en), .in1 (tcu_atpg_mode), .out (scan_en_gated_n) ); | |
| 16373 | cl_u1_inv_1x aclk_gated_inv ( .in (aclk_gated_n), .out (aclk_gated) ); | |
| 16374 | cl_u1_inv_1x bclk_gated_inv ( .in (bclk_gated_n), .out (bclk_gated) ); | |
| 16375 | cl_u1_inv_1x scan_en_gated_inv ( .in (scan_en_gated_n), .out (scan_en_gated) ); | |
| 16376 | ||
| 16377 | // assign scan_out = tcu_atpg_mode ? scan_out_pre_mux : scan_in ; | |
| 16378 | // implemented below, and as instance "scan_chain_mux" | |
| 16379 | cl_u1_inv_1x tcu_atpg_mode_inv ( .in (tcu_atpg_mode) , .out (tcu_atpg_mode_n) ); | |
| 16380 | ||
| 16381 | ||
| 16382 | // assign aclk_wmr = ~rst_wmr_protect & tcu_aclk; | |
| 16383 | ||
| 16384 | ||
| 16385 | cl_u1_inv_1x wmr_protect_inv ( .in (rst_wmr_protect) , .out (rst_wmr_protect_n) ); | |
| 16386 | ||
| 16387 | cl_u1_nand2_1x aclk_wmr_gate ( | |
| 16388 | .in0 (aclk), | |
| 16389 | .in1 (rst_wmr_protect_n), | |
| 16390 | .out (aclk_wmr_n) | |
| 16391 | ); | |
| 16392 | ||
| 16393 | cl_u1_inv_1x aclk_wmr_inv ( .in (aclk_wmr_n) , .out (aclk_wmr) ); | |
| 16394 | ||
| 16395 | // cl_u1_inv_1x gclk_inv ( .in (gclk) , .out (gclk_n) ); // vlint | |
| 16396 | ||
| 16397 | // ********************************************************** | |
| 16398 | // l1hdr for scan | |
| 16399 | // ********************************************************** | |
| 16400 | ||
| 16401 | n2_clk_clstr_hdr_l1hdr gclk_header ( | |
| 16402 | .l2clk(gclk), | |
| 16403 | .l1clk(l1gclk), | |
| 16404 | .pce(1'b1), | |
| 16405 | .se(scan_en_gated), | |
| 16406 | .pce_ov(1'b1), | |
| 16407 | .stop(1'b0) // ECO1.2 - not allowed to stop local clocks | |
| 16408 | ); | |
| 16409 | ||
| 16410 | n2_clk_clstr_hdr_l1hdr l1_header ( | |
| 16411 | .l2clk(l2clk), | |
| 16412 | .l1clk(l1clk), | |
| 16413 | .pce(1'b1), | |
| 16414 | .se(scan_en_gated), | |
| 16415 | .pce_ov(1'b1), | |
| 16416 | .stop(1'b0) // ECO1.3 - false info; no action needed | |
| 16417 | ); | |
| 16418 | ||
| 16419 | // ********************************************************** | |
| 16420 | // make observe flops part of scan chain (observe only) | |
| 16421 | // ********************************************************** | |
| 16422 | ||
| 16423 | n2_clk_clstr_hdr_obs_flops observe_flops ( | |
| 16424 | .tcu_clk_stop (tcu_clk_stop), | |
| 16425 | .ccu_div_ph (ccu_div_ph), | |
| 16426 | .array_wr_inhibit (array_wr_inhibit), | |
| 16427 | .l1clk (l1gclk), | |
| 16428 | .aclk (aclk_gated), | |
| 16429 | .bclk (bclk_gated), | |
| 16430 | .scan_in (scan_in), | |
| 16431 | .scan_out (scan_ch) | |
| 16432 | ); | |
| 16433 | ||
| 16434 | cl_sc1_aomux2_1x scan_chain_mux ( | |
| 16435 | .sel0 ( tcu_atpg_mode ), | |
| 16436 | .sel1 ( tcu_atpg_mode_n ), | |
| 16437 | .in0 ( scan_out_pre_mux ), | |
| 16438 | .in1 ( scan_in ), | |
| 16439 | .out ( scan_out ) | |
| 16440 | ); | |
| 16441 | ||
| 16442 | ||
| 16443 | // ********************************************************** | |
| 16444 | // synchronize the control signals | |
| 16445 | // ********************************************************** | |
| 16446 | ||
| 16447 | n2_clk_clstr_hdr_sync control_sig_sync ( | |
| 16448 | .div_r ( div_r_sync ), | |
| 16449 | .gclk ( l1gclk ), | |
| 16450 | .l1clk ( l1clk ), | |
| 16451 | .ccu_slow_cmp_sync_en ( ccu_slow_cmp_sync_en), | |
| 16452 | .ccu_cmp_slow_sync_en ( ccu_cmp_slow_sync_en), | |
| 16453 | .rst_por_ ( rst_por_), | |
| 16454 | .rst_wmr_ ( rst_wmr_), | |
| 16455 | .scan_in ( scan_ch ), | |
| 16456 | .aclk ( aclk_gated ), | |
| 16457 | .bclk ( bclk_gated ), | |
| 16458 | .slow_cmp_sync_en ( slow_cmp_sync_en ), | |
| 16459 | .cmp_slow_sync_en ( cmp_slow_sync_en ), | |
| 16460 | .por_ ( por_ ), | |
| 16461 | .wmr_ ( wmr_ ), | |
| 16462 | .scan_out ( scan_out_pre_mux ) | |
| 16463 | ); | |
| 16464 | ||
| 16465 | ||
| 16466 | // ********************************************************** | |
| 16467 | // divider & mux model | |
| 16468 | // ********************************************************** | |
| 16469 | ||
| 16470 | wire ccu_div_ph_ff; | |
| 16471 | wire ccu_div_ph_flop_unused; | |
| 16472 | ||
| 16473 | // first flop ccu_div_ph | |
| 16474 | cl_sc1_msff_1x ccu_div_ph_flop ( | |
| 16475 | .d ( ccu_div_ph ), | |
| 16476 | .l1clk ( gclk ), | |
| 16477 | .si ( 1'b0 ), | |
| 16478 | .siclk ( 1'b0 ), | |
| 16479 | .soclk ( 1'b0 ), | |
| 16480 | .q ( ccu_div_ph_ff ), | |
| 16481 | .so (ccu_div_ph_flop_unused) | |
| 16482 | ); | |
| 16483 | ||
| 16484 | // div_r = sel1 (ie, ~div_en | tcu_div_bypass ) | div_ph | |
| 16485 | // div_f = sel0 (ie, div_en & ~tcu_div_bypass ) | |
| 16486 | // | |
| 16487 | ||
| 16488 | // sel0 = ~div_bypass & div_en // div_ph select | |
| 16489 | // sel1 = div_bypass | ~div_en // gclk select | |
| 16490 | ||
| 16491 | cl_u1_inv_1x div_bypass_inv ( .in (tcu_div_bypass), .out (tcu_div_bypass_n) ); | |
| 16492 | cl_u1_inv_1x cluster_div_inv ( .in (cluster_div_en), .out (cluster_div_en_n) ); | |
| 16493 | ||
| 16494 | // | |
| 16495 | // generate sel0 - div_ph sel | |
| 16496 | // | |
| 16497 | ||
| 16498 | cl_u1_nand2_1x sel0_n_gen ( | |
| 16499 | .in0 (tcu_div_bypass_n), | |
| 16500 | .in1 (cluster_div_en), | |
| 16501 | .out (sel0_n) | |
| 16502 | ); | |
| 16503 | ||
| 16504 | cl_u1_inv_1x sel0_gen ( .in (sel0_n), .out (sel0) ); | |
| 16505 | ||
| 16506 | ||
| 16507 | // | |
| 16508 | // generate sel1 - gclk sel | |
| 16509 | // | |
| 16510 | ||
| 16511 | cl_u1_nor2_1x sel2_n_gen ( | |
| 16512 | .in0 (cluster_div_en_n), | |
| 16513 | .in1 (tcu_div_bypass), | |
| 16514 | .out (sel1_n) | |
| 16515 | ); | |
| 16516 | ||
| 16517 | cl_u1_inv_1x sel1_gen ( .in (sel1_n), .out (sel1) ); | |
| 16518 | ||
| 16519 | ||
| 16520 | // gate off div_r | |
| 16521 | //cl_u1_nor2_1x div_r_gate ( | |
| 16522 | // .in0 (sel1), | |
| 16523 | // .in1 (div_ph_blatch), | |
| 16524 | // .out (div_r_n) | |
| 16525 | //); | |
| 16526 | wire blatch_divr_unused; | |
| 16527 | cl_sc1_blatch_4x blatch_divr ( | |
| 16528 | .latout(div_ph_blatch), .d(ccu_div_ph_ff), .l1clk (gclk), | |
| 16529 | .so (blatch_divr_unused), .si (1'b0), .siclk(1'b0), .soclk(1'b0) ); | |
| 16530 | ||
| 16531 | //cl_u1_nor2_1x div_r_gate ( | |
| 16532 | // .in0 (sel1), | |
| 16533 | // .in1 (div_ph_blatch), | |
| 16534 | // .out (div_r_n) | |
| 16535 | //); | |
| 16536 | ||
| 16537 | cl_u1_buf_1x div_r_buf ( .in (div_ph_blatch), .out (div_r ) ); | |
| 16538 | ||
| 16539 | ||
| 16540 | // | |
| 16541 | // divider model | |
| 16542 | // | |
| 16543 | ||
| 16544 | // creating the div_r_to_syncronizer to mimic generation of | |
| 16545 | //div_r in schematic. | |
| 16546 | ||
| 16547 | cl_u1_nor2_1x div_r_sync_gen_nor ( | |
| 16548 | .in0 (sel0_n), | |
| 16549 | .in1 (ccu_div_ph_ff), | |
| 16550 | .out (div_r_sync_n) | |
| 16551 | ); | |
| 16552 | ||
| 16553 | cl_u1_inv_1x div_r_sync_gen_inv ( .in (div_r_sync_n), .out (div_r_sync) ); | |
| 16554 | ||
| 16555 | cl_sc1_aomux2_1x alatch_in ( | |
| 16556 | .sel0 (~sel1 ), | |
| 16557 | .sel1 ( sel1 ), | |
| 16558 | .in0 ( div_r ), | |
| 16559 | .in1 ( div_clk ), | |
| 16560 | .out ( div_mux ) | |
| 16561 | ); | |
| 16562 | ||
| 16563 | wire gclk_reset; | |
| 16564 | wire gclk_reset_n; | |
| 16565 | cl_u1_nor2_1x nor_gclk_reset ( .in0 (sel1), .in1 (gclk), .out (gclk_reset_n)); | |
| 16566 | cl_u1_inv_1x inv_gclk_reset ( .in (gclk_reset_n), .out (gclk_reset)); | |
| 16567 | ||
| 16568 | ||
| 16569 | wire alatch_unused; | |
| 16570 | cl_sc1_alatch_4x alatch ( | |
| 16571 | .q(div_out), .d(div_mux), .l1clk (gclk_reset), | |
| 16572 | .so (alatch_unused), .si (1'b0), .siclk(1'b0), .soclk(1'b0), .se(1'b0) ); | |
| 16573 | ||
| 16574 | // muxed clock out | |
| 16575 | cl_sc1_aomux2_1x final_mux ( | |
| 16576 | .sel0 ( sel0 ), | |
| 16577 | .sel1 ( sel1 ), | |
| 16578 | .in0 ( div_out ), | |
| 16579 | .in1 ( gclk ), | |
| 16580 | .out ( div_clk ) | |
| 16581 | ); | |
| 16582 | ||
| 16583 | // ********************************************************** | |
| 16584 | // clkstop for l2clk (via control of cclk) | |
| 16585 | // ********************************************************** | |
| 16586 | ||
| 16587 | // 1. sync up clock stop (these are non-scanned) | |
| 16588 | n2_clk_clstr_hdr_clk_stop_syncff clk_stop_syncff ( | |
| 16589 | .din ( tcu_clk_stop ), | |
| 16590 | .synced ( clk_stop_synced ), | |
| 16591 | .clkin ( gclk ), | |
| 16592 | .sync_clk ( div_clk ), | |
| 16593 | .sel ( div_r_sync ) | |
| 16594 | ||
| 16595 | ); | |
| 16596 | ||
| 16597 | wire clk_stop_synced_stg1; | |
| 16598 | wire clk_stop_synced_stg2; | |
| 16599 | wire clk_stop_del_stg1_unused; | |
| 16600 | wire clk_stop_del_stg2_unused; | |
| 16601 | // 2. now delay sync'd up clock stop (these are non-scanned) | |
| 16602 | cl_sc1_msff_1x clk_stop_del_stg1 ( | |
| 16603 | .d (clk_stop_synced), .q (clk_stop_synced_stg1), .l1clk (div_clk), | |
| 16604 | .siclk (1'b0), .soclk (1'b0), .si (1'b0), .so (clk_stop_del_stg1_unused) | |
| 16605 | ); | |
| 16606 | ||
| 16607 | cl_sc1_msff_1x clk_stop_del_stg2 ( | |
| 16608 | .d (clk_stop_synced_stg1), .q (clk_stop_synced_stg2), .l1clk (div_clk), | |
| 16609 | .siclk (1'b0), .soclk (1'b0), .si (1'b0), .so (clk_stop_del_stg2_unused) | |
| 16610 | ); | |
| 16611 | ||
| 16612 | wire clk_stop_synced_stg2_gated; | |
| 16613 | wire clk_stop_synced_stg2_n; | |
| 16614 | ||
| 16615 | cl_u1_inv_1x clk_stop_stg2_inv ( .in (clk_stop_synced_stg2), .out (clk_stop_synced_stg2_n) ); | |
| 16616 | ||
| 16617 | // ECO1.5 - pushed the gate after the latch in the clk-stop instance "clk_stopper" | |
| 16618 | // cl_u1_nor2_1x clk_stop_stg2_nor ( .in0 (clk_stop_synced_stg2_n), .in1 (tcu_atpg_mode), .out (clk_stop_synced_stg2_gated) ); | |
| 16619 | // | |
| 16620 | // 3. use blatch & and-gate for controlling clock | |
| 16621 | n2_clk_clstr_hdr_clkgate clk_stopper ( | |
| 16622 | .l2clk(div_clk), | |
| 16623 | .l1clk(pre_cclk), | |
| 16624 | .atpg_mode(tcu_atpg_mode), | |
| 16625 | .clken(clk_stop_synced_stg2_n) | |
| 16626 | ); | |
| 16627 | ||
| 16628 | // 4. finally gate-off with async reset | |
| 16629 | // assign cclk = pre_cclk & cluster_arst_l; | |
| 16630 | ||
| 16631 | cl_u1_nand2_1x cclk_nand ( .in0 (pre_cclk), .in1 (cluster_arst_l), .out (cclk_n) ); | |
| 16632 | cl_u1_inv_1x cclk_inv ( .in (cclk_n), .out (cclk) ); | |
| 16633 | ||
| 16634 | ||
| 16635 | // ********************************************************** | |
| 16636 | // array write inhibit operation | |
| 16637 | // ********************************************************** | |
| 16638 | ||
| 16639 | wire clk_stop_synced_n; | |
| 16640 | ||
| 16641 | wire clk_stop_synced_stg3; | |
| 16642 | wire clk_stop_synced_stg4; | |
| 16643 | wire clk_stop_synced_stg5; | |
| 16644 | ||
| 16645 | wire array_wr_inhibit1; | |
| 16646 | wire array_wr_inhibit2; | |
| 16647 | ||
| 16648 | wire array_wr_inhibit1_n; | |
| 16649 | wire array_wr_inhibit2_n; | |
| 16650 | wire cluster_arst; | |
| 16651 | wire clk_stop_del_stg3_unused; | |
| 16652 | wire clk_stop_del_stg4_unused; | |
| 16653 | wire clk_stop_del_stg5_unused; | |
| 16654 | ||
| 16655 | cl_sc1_msff_1x clk_stop_del_stg3 ( | |
| 16656 | .d (clk_stop_synced_stg2), .q (clk_stop_synced_stg3), .l1clk (div_clk), | |
| 16657 | .siclk (1'b0), .soclk (1'b0), .si (1'b0), .so (clk_stop_del_stg3_unused) | |
| 16658 | ); | |
| 16659 | ||
| 16660 | cl_sc1_msff_1x clk_stop_del_stg4 ( | |
| 16661 | .d (clk_stop_synced_stg3), .q (clk_stop_synced_stg4), .l1clk (div_clk), | |
| 16662 | .siclk (1'b0), .soclk (1'b0), .si (1'b0), .so (clk_stop_del_stg4_unused) | |
| 16663 | ); | |
| 16664 | ||
| 16665 | cl_sc1_msff_1x clk_stop_del_stg5 ( | |
| 16666 | .d (clk_stop_synced_stg4), .q (clk_stop_synced_stg5), .l1clk (div_clk), | |
| 16667 | .siclk (1'b0), .soclk (1'b0), .si (1'b0), .so (clk_stop_del_stg5_unused) | |
| 16668 | ); | |
| 16669 | ||
| 16670 | ||
| 16671 | // assign array_wr_inhibit1 = clk_stop_synced & clk_stop_synced_stg5; | |
| 16672 | ||
| 16673 | cl_u1_nand3_1x clk_stop_and_delayed ( // ECO1.4 - changed cl_u1_nand2_1x | |
| 16674 | .in0 (clk_stop_synced), | |
| 16675 | .in1 (clk_stop_synced_stg5), | |
| 16676 | .in2 (tcu_atpg_mode_n), | |
| 16677 | .out (array_wr_inhibit1_n) | |
| 16678 | ); | |
| 16679 | ||
| 16680 | cl_u1_inv_1x array_wr_inhibit1_inv ( .in(array_wr_inhibit1_n), .out(array_wr_inhibit1) ); | |
| 16681 | ||
| 16682 | ||
| 16683 | // assign array_wr_inhibit2 = (~clk_stop_synced) & wr_inhibit_q2; | |
| 16684 | cl_u1_inv_1x clk_stop_synced_inv ( .in(clk_stop_synced), .out(clk_stop_synced_n) ); | |
| 16685 | ||
| 16686 | // ECO1.1 - removed nand gate from path of tcu_wr_inhibit | |
| 16687 | // and replaced with buffer | |
| 16688 | // | |
| 16689 | // cl_u1_nand2_1x clk_stop_synced_and_wr_inhibit_q2 ( | |
| 16690 | // .in0 (clk_stop_synced_n), | |
| 16691 | // .in1 (tcu_wr_inhibit), // (wr_inhibit_q2), | |
| 16692 | // .out (array_wr_inhibit2_n) | |
| 16693 | // ); | |
| 16694 | // | |
| 16695 | // cl_u1_inv_1x array_wr_inhibit2_inv ( .in(array_wr_inhibit2_n), .out(array_wr_inhibit2) ); | |
| 16696 | cl_u1_buf_1x array_wr_inhibit2_buf ( .in(tcu_wr_inhibit), .out(array_wr_inhibit2) ); | |
| 16697 | ||
| 16698 | ||
| 16699 | // assign array_wr_inhibit = array_wr_inhibit1 | array_wr_inhibit2 | (~cluster_arst_l); | |
| 16700 | ||
| 16701 | cl_u1_inv_1x cluster_arst_inv (.in (cluster_arst_l), .out (cluster_arst)); | |
| 16702 | ||
| 16703 | cl_u1_nor3_1x array_wr_inhibit_nor ( | |
| 16704 | .in0 (array_wr_inhibit1), | |
| 16705 | .in1 (array_wr_inhibit2), | |
| 16706 | .in2 (cluster_arst), | |
| 16707 | .out (array_wr_inhibit_n) | |
| 16708 | ); | |
| 16709 | ||
| 16710 | cl_u1_inv_1x array_wr_inhibit_inv (.in (array_wr_inhibit_n), .out (array_wr_inhibit)); | |
| 16711 | ||
| 16712 | endmodule // n2_clk_clstr_hdr_cust | |
| 16713 | ||
| 16714 | ||
| 16715 | ||
| 16716 | ||
| 16717 | // ********************************************************** | |
| 16718 | // (fictitous) observe flop module for ATPG purposes | |
| 16719 | // ********************************************************** | |
| 16720 | ||
| 16721 | module n2_clk_clstr_hdr_obs_flops ( | |
| 16722 | tcu_clk_stop, | |
| 16723 | ccu_div_ph, | |
| 16724 | array_wr_inhibit, | |
| 16725 | l1clk, | |
| 16726 | aclk, | |
| 16727 | bclk, | |
| 16728 | scan_in, | |
| 16729 | scan_out | |
| 16730 | ); | |
| 16731 | ||
| 16732 | input tcu_clk_stop; | |
| 16733 | input ccu_div_ph; | |
| 16734 | input array_wr_inhibit; | |
| 16735 | input l1clk; | |
| 16736 | input aclk; | |
| 16737 | input bclk; | |
| 16738 | input scan_in; | |
| 16739 | output scan_out; | |
| 16740 | ||
| 16741 | wire tcu_clk_stop; | |
| 16742 | wire ccu_div_ph; | |
| 16743 | wire array_wr_inhibit; | |
| 16744 | wire l1clk; | |
| 16745 | wire aclk; | |
| 16746 | wire bclk; | |
| 16747 | wire scan_in; | |
| 16748 | wire scan_out; | |
| 16749 | ||
| 16750 | wire scan_ch1; | |
| 16751 | wire scan_ch2; | |
| 16752 | wire obs_ff1_unused; | |
| 16753 | wire obs_ff2_unused; | |
| 16754 | wire obs_ff3_unused; | |
| 16755 | ||
| 16756 | cl_sc1_msff_1x obs_ff1 ( | |
| 16757 | .d ( tcu_clk_stop ), | |
| 16758 | .l1clk ( l1clk ), | |
| 16759 | .si ( scan_in ), | |
| 16760 | .siclk ( aclk ), | |
| 16761 | .soclk ( bclk ), | |
| 16762 | .q (obs_ff1_unused ), | |
| 16763 | .so ( scan_ch1 ) | |
| 16764 | ); | |
| 16765 | ||
| 16766 | cl_sc1_msff_1x obs_ff2 ( | |
| 16767 | .d ( ccu_div_ph ), | |
| 16768 | .l1clk ( l1clk ), | |
| 16769 | .si ( scan_ch1 ), | |
| 16770 | .siclk ( aclk ), | |
| 16771 | .soclk ( bclk ), | |
| 16772 | .q (obs_ff2_unused ), | |
| 16773 | .so ( scan_ch2 ) | |
| 16774 | ); | |
| 16775 | ||
| 16776 | cl_sc1_msff_1x obs_ff3 ( | |
| 16777 | .d ( array_wr_inhibit ), | |
| 16778 | .l1clk ( l1clk ), | |
| 16779 | .si ( scan_ch2 ), | |
| 16780 | .siclk ( aclk ), | |
| 16781 | .soclk ( bclk ), | |
| 16782 | .q (obs_ff3_unused ), | |
| 16783 | .so ( scan_out ) | |
| 16784 | ); | |
| 16785 | endmodule // n2_clk_clstr_hdr_obs_flops | |
| 16786 | ||
| 16787 | ||
| 16788 | // ********************************************************** | |
| 16789 | // (fictitous) synchronizer module for ATPG purposes | |
| 16790 | // ********************************************************** | |
| 16791 | ||
| 16792 | module n2_clk_clstr_hdr_sync ( | |
| 16793 | div_r, | |
| 16794 | gclk, | |
| 16795 | l1clk, | |
| 16796 | ccu_slow_cmp_sync_en , | |
| 16797 | ccu_cmp_slow_sync_en , | |
| 16798 | rst_por_ , | |
| 16799 | rst_wmr_ , | |
| 16800 | scan_in, | |
| 16801 | aclk, | |
| 16802 | bclk, | |
| 16803 | slow_cmp_sync_en, | |
| 16804 | cmp_slow_sync_en, | |
| 16805 | por_, | |
| 16806 | wmr_, | |
| 16807 | scan_out | |
| 16808 | ); | |
| 16809 | ||
| 16810 | ||
| 16811 | input div_r; | |
| 16812 | input gclk; | |
| 16813 | input l1clk; | |
| 16814 | input ccu_slow_cmp_sync_en ; | |
| 16815 | input ccu_cmp_slow_sync_en ; | |
| 16816 | input rst_por_ ; | |
| 16817 | input rst_wmr_ ; | |
| 16818 | input scan_in; | |
| 16819 | input aclk; | |
| 16820 | input bclk; | |
| 16821 | ||
| 16822 | output slow_cmp_sync_en; | |
| 16823 | output cmp_slow_sync_en; | |
| 16824 | output por_; | |
| 16825 | output wmr_; | |
| 16826 | output scan_out; | |
| 16827 | ||
| 16828 | wire div_r; | |
| 16829 | // wire div_r_n; // vlint | |
| 16830 | wire gclk; | |
| 16831 | // wire gclk_n; // vlint | |
| 16832 | wire l1clk; | |
| 16833 | ||
| 16834 | wire ccu_slow_cmp_sync_en ; | |
| 16835 | wire slow_cmp_sync_en; | |
| 16836 | wire ccu_cmp_slow_sync_en ; | |
| 16837 | wire cmp_slow_sync_en; | |
| 16838 | wire rst_por_ ; | |
| 16839 | wire por_; | |
| 16840 | ||
| 16841 | wire rst_wmr_ ; | |
| 16842 | wire wmr_; | |
| 16843 | ||
| 16844 | wire scan_in; | |
| 16845 | wire scan_out; | |
| 16846 | wire aclk; | |
| 16847 | wire bclk; | |
| 16848 | ||
| 16849 | wire scan_ch1; | |
| 16850 | wire scan_ch2; | |
| 16851 | wire scan_ch3; | |
| 16852 | ||
| 16853 | ||
| 16854 | // slow_cmp_sync_en | |
| 16855 | n2_clk_clstr_hdr_sync_ff slow_cmp_sync_en_syncff ( | |
| 16856 | .din ( ccu_slow_cmp_sync_en ), | |
| 16857 | .synced ( slow_cmp_sync_en ), | |
| 16858 | .clkin ( gclk ), | |
| 16859 | .sync_clk ( l1clk ), | |
| 16860 | .sel ( div_r ), | |
| 16861 | .siclk ( aclk ), | |
| 16862 | .soclk ( bclk ), | |
| 16863 | .si ( scan_in ), | |
| 16864 | .so ( scan_ch1 ) | |
| 16865 | ); | |
| 16866 | ||
| 16867 | // cmp_slow_sync_en | |
| 16868 | n2_clk_clstr_hdr_sync_ff cmp_slow_sync_en_syncff ( | |
| 16869 | .din ( ccu_cmp_slow_sync_en ), | |
| 16870 | .synced ( cmp_slow_sync_en ), | |
| 16871 | .clkin ( gclk ), | |
| 16872 | .sync_clk ( l1clk ), | |
| 16873 | .sel ( div_r ), | |
| 16874 | .siclk ( aclk ), | |
| 16875 | .soclk ( bclk ), | |
| 16876 | .si ( scan_ch1 ), | |
| 16877 | .so ( scan_ch2 ) | |
| 16878 | ); | |
| 16879 | ||
| 16880 | // por_ | |
| 16881 | n2_clk_clstr_hdr_sync_ff por_syncff ( | |
| 16882 | .din ( rst_por_ ), | |
| 16883 | .synced ( por_ ), | |
| 16884 | .clkin ( gclk ), | |
| 16885 | .sync_clk ( l1clk ), | |
| 16886 | .sel ( div_r ), | |
| 16887 | .siclk ( aclk ), | |
| 16888 | .soclk ( bclk ), | |
| 16889 | .si ( scan_ch2 ), | |
| 16890 | .so ( scan_ch3 ) | |
| 16891 | ); | |
| 16892 | ||
| 16893 | // wmr_ | |
| 16894 | n2_clk_clstr_hdr_sync_ff wmr_syncff ( | |
| 16895 | .din ( rst_wmr_ ), | |
| 16896 | .synced ( wmr_ ), | |
| 16897 | .clkin ( gclk ), | |
| 16898 | .sync_clk ( l1clk ), | |
| 16899 | .sel ( div_r ), | |
| 16900 | .siclk ( aclk ), | |
| 16901 | .soclk ( bclk ), | |
| 16902 | .si ( scan_ch3 ), | |
| 16903 | .so ( scan_out ) | |
| 16904 | ); | |
| 16905 | ||
| 16906 | endmodule // n2_clk_clstr_hdr_sync | |
| 16907 | ||
| 16908 | ||
| 16909 | // ********************************************************** | |
| 16910 | // (fictitous) 1-bit synchronizer for ATPG purposes | |
| 16911 | // ********************************************************** | |
| 16912 | ||
| 16913 | module n2_clk_clstr_hdr_sync_ff ( | |
| 16914 | din, | |
| 16915 | synced, | |
| 16916 | clkin, | |
| 16917 | sync_clk, | |
| 16918 | sel, | |
| 16919 | siclk, | |
| 16920 | soclk, | |
| 16921 | si, | |
| 16922 | so | |
| 16923 | ); | |
| 16924 | ||
| 16925 | input din; | |
| 16926 | output synced; | |
| 16927 | input clkin; | |
| 16928 | input sync_clk; | |
| 16929 | input siclk; | |
| 16930 | input soclk; | |
| 16931 | input si; | |
| 16932 | output so; | |
| 16933 | input sel; | |
| 16934 | ||
| 16935 | wire din; | |
| 16936 | wire synced; | |
| 16937 | wire clkin; | |
| 16938 | wire sync_clk; | |
| 16939 | wire siclk; | |
| 16940 | wire soclk; | |
| 16941 | wire si; | |
| 16942 | wire so; | |
| 16943 | wire sel; | |
| 16944 | ||
| 16945 | wire so_tmp; | |
| 16946 | wire sel_n; | |
| 16947 | wire din_q1; | |
| 16948 | wire din_muxed; | |
| 16949 | ||
| 16950 | cl_u1_inv_1x sel_inv ( .in ( sel ), .out ( sel_n ) ); | |
| 16951 | ||
| 16952 | cl_sc1_aomux2_1x sync_mux1 ( | |
| 16953 | .sel0 ( sel_n ), | |
| 16954 | .sel1 ( sel ), | |
| 16955 | .in0 ( din_q1 ), | |
| 16956 | .in1 ( din ), | |
| 16957 | .out ( din_muxed ) | |
| 16958 | ); | |
| 16959 | ||
| 16960 | cl_sc1_msff_1x din_stg1 ( | |
| 16961 | .d ( din_muxed ), | |
| 16962 | .l1clk ( clkin ), | |
| 16963 | .si ( si ), | |
| 16964 | .siclk ( siclk ), | |
| 16965 | .soclk ( soclk ), | |
| 16966 | .q ( din_q1 ), | |
| 16967 | .so ( so_tmp ) | |
| 16968 | ); | |
| 16969 | ||
| 16970 | cl_sc1_msff_1x din_stg2 ( | |
| 16971 | .d ( din_q1 ), | |
| 16972 | .l1clk ( sync_clk ), | |
| 16973 | .si ( so_tmp ), | |
| 16974 | .siclk ( siclk ), | |
| 16975 | .soclk ( soclk ), | |
| 16976 | .q ( synced ), | |
| 16977 | .so ( so ) | |
| 16978 | ); | |
| 16979 | endmodule // n2_clk_clstr_hdr_sync_ff | |
| 16980 | ||
| 16981 | ||
| 16982 | // ********************************************************** | |
| 16983 | // (fictitous) module for clock stop sync. | |
| 16984 | // ********************************************************** | |
| 16985 | module n2_clk_clstr_hdr_clk_stop_syncff ( | |
| 16986 | din, | |
| 16987 | synced, | |
| 16988 | clkin, | |
| 16989 | sync_clk, | |
| 16990 | sel | |
| 16991 | ); | |
| 16992 | ||
| 16993 | input din; | |
| 16994 | output synced; | |
| 16995 | input clkin; | |
| 16996 | input sync_clk; | |
| 16997 | input sel; | |
| 16998 | ||
| 16999 | wire din; | |
| 17000 | wire synced; | |
| 17001 | wire clkin; | |
| 17002 | wire sync_clk; | |
| 17003 | wire sel; | |
| 17004 | ||
| 17005 | wire [2:0] so_unused; | |
| 17006 | ||
| 17007 | wire sel_n; | |
| 17008 | wire din_q1_lat; | |
| 17009 | wire din_q1; | |
| 17010 | wire din_muxed; | |
| 17011 | ||
| 17012 | cl_u1_inv_1x sel_inv ( .in(sel), .out(sel_n) ); | |
| 17013 | ||
| 17014 | cl_sc1_aomux2_1x sync_mux1 ( | |
| 17015 | .sel0 ( sel_n ), .sel1 ( sel ), | |
| 17016 | .in0 ( din_q1 ), .in1 ( din ), | |
| 17017 | .out ( din_muxed ) | |
| 17018 | ); | |
| 17019 | ||
| 17020 | cl_sc1_msff_1x din_stg1 ( | |
| 17021 | .d ( din_muxed ), .l1clk ( clkin ), .q ( din_q1 ), | |
| 17022 | .si ( 1'b0 ), .siclk ( 1'b0 ), .soclk ( 1'b0 ), | |
| 17023 | .so (so_unused[0])); | |
| 17024 | ||
| 17025 | cl_sc1_blatch_4x blatch ( | |
| 17026 | .latout(din_q1_lat), .d(din_q1), .l1clk (clkin), | |
| 17027 | .so (so_unused[1]), .si (1'b0), .siclk(1'b0), .soclk(1'b0) ); | |
| 17028 | ||
| 17029 | cl_sc1_msff_1x din_stg2 ( | |
| 17030 | .d ( din_q1_lat ), .l1clk ( sync_clk ), .q ( synced ), | |
| 17031 | .siclk ( 1'b0 ), .soclk ( 1'b0 ), .si ( 1'b0 ), .so (so_unused[2] ) ); | |
| 17032 | ||
| 17033 | endmodule // n2_clk_clstr_hdr_clk_stop_sync_ff | |
| 17034 | ||
| 17035 | ||
| 17036 | ||
| 17037 | module n2_clk_clstr_hdr_clkgate ( | |
| 17038 | atpg_mode, | |
| 17039 | clken, | |
| 17040 | l2clk, | |
| 17041 | l1clk | |
| 17042 | ); | |
| 17043 | ||
| 17044 | input atpg_mode; | |
| 17045 | input clken; // clken, active high | |
| 17046 | input l2clk; // level 2 clock, from clock grid | |
| 17047 | output l1clk; | |
| 17048 | ||
| 17049 | wire atpg_mode, clken, l2clk, l1clk; | |
| 17050 | ||
| 17051 | wire clken_gated; | |
| 17052 | wire clken_gated_n; | |
| 17053 | wire l1clk_n; | |
| 17054 | wire clken_lat; | |
| 17055 | wire so_unused; | |
| 17056 | ||
| 17057 | cl_sc1_blatch_4x blatch ( | |
| 17058 | .latout(clken_lat), .d(clken), .l1clk (l2clk), | |
| 17059 | .so (so_unused), .si (1'b0), .siclk(1'b0), .soclk(1'b0) ); | |
| 17060 | ||
| 17061 | cl_u1_nor2_1x clken_nor ( .in0(clken_lat), .in1(atpg_mode), .out(clken_gated_n) ); | |
| 17062 | cl_u1_inv_1x clken_gated_inv ( .in(clken_gated_n), .out(clken_gated) ); | |
| 17063 | ||
| 17064 | cl_u1_nand2_1x clk_nand ( .in0(clken_gated), .in1(l2clk), .out(l1clk_n) ); | |
| 17065 | cl_u1_inv_1x clk_inv ( .in(l1clk_n), .out(l1clk) ); | |
| 17066 | ||
| 17067 | endmodule // n2_clk_clstr_hdr_clkgate | |
| 17068 | ||
| 17069 | module n2_clk_clstr_hdr_l1hdr ( | |
| 17070 | l2clk, | |
| 17071 | se, | |
| 17072 | pce, | |
| 17073 | pce_ov, | |
| 17074 | stop, | |
| 17075 | l1clk | |
| 17076 | ); | |
| 17077 | ||
| 17078 | input l2clk; // level 2 clock, from clock grid | |
| 17079 | input se; // Scan Enable | |
| 17080 | input pce; // Clock enable for local power savings | |
| 17081 | input pce_ov; // TCU sourced clock enable override for testing | |
| 17082 | input stop; // TCU/CCU sourced clock stop for debug | |
| 17083 | output l1clk; | |
| 17084 | ||
| 17085 | reg l1en; | |
| 17086 | ||
| 17087 | always @ (l2clk or stop or pce or pce_ov ) begin // vlint fix - latch model | |
| 17088 | if (!l2clk) | |
| 17089 | l1en = (~stop & ( pce | pce_ov )); // vlint fix - replaced w/blocking | |
| 17090 | end | |
| 17091 | ||
| 17092 | assign l1clk = (l2clk & l1en) | se; // se is async and highest priority | |
| 17093 | ||
| 17094 | endmodule // n2_clk_clstr_hdr_l1hdr | |
| 17095 | ||
| 17096 | ||
| 17097 | ||
| 17098 | ||
| 17099 | ||
| 17100 | ||
| 17101 | ||
| 17102 | ||
| 17103 | module n2_clk_l2d_cmp_cust ( | |
| 17104 | cclk, | |
| 17105 | l2clk | |
| 17106 | ); | |
| 17107 | ||
| 17108 | input cclk; | |
| 17109 | output l2clk; | |
| 17110 | ||
| 17111 | wire cclk; | |
| 17112 | wire l2clk; | |
| 17113 | ||
| 17114 | assign #1 l2clk = cclk; | |
| 17115 | ||
| 17116 | endmodule | |
| 17117 | ||
| 17118 | ||
| 17119 |