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129 | .\" ======================================================================== | |
130 | .\" | |
131 | .IX Title "SCANTEST 1" | |
132 | .TH SCANTEST 1 "2003-07-24" "perl v5.8.0" "User Contributed Perl Documentation" | |
133 | .SH "NAME" | |
134 | scantest \- Perl script for scan pattern generation. | |
135 | .SH "SYNOPSIS" | |
136 | .IX Header "SYNOPSIS" | |
137 | scantest [options] gate_level_netlist | |
138 | .SH "ABSTRACT" | |
139 | .IX Header "ABSTRACT" | |
140 | \&\*(L"scantest\*(R" is a front-end interface for use of the ScanTest | |
141 | package for automatic test pattern generation using FastScan. | |
142 | \&\*(L"scantest\*(R" controls the creation of the test procedure file, | |
143 | FastScan command file and execution script, as well as the | |
144 | generation and simulation of test patterns. | |
145 | .SH "DESCRIPTION" | |
146 | .IX Header "DESCRIPTION" | |
147 | The intention behind \*(L"scantest\*(R" is to simplify the \s-1ATPG\s0 flow. | |
148 | If a design file conforms to the built-in defaults the entire | |
149 | flow can be run by specifying only the design file: | |
150 | .Sp | |
151 | .RS 4 | |
152 | scantest design_file | |
153 | .RE | |
154 | .PP | |
155 | The default design settings are as follows: | |
156 | .IP "\(bu one scan chain" 4 | |
157 | .IX Item "one scan chain" | |
158 | .PD 0 | |
159 | .ie n .IP "\(bu clock port is named ""clk""" 4 | |
160 | .el .IP "\(bu clock port is named ``clk''" 4 | |
161 | .IX Item "clock port is named clk" | |
162 | .ie n .IP "\(bu scanin port is named ""si""" 4 | |
163 | .el .IP "\(bu scanin port is named ``si''" 4 | |
164 | .IX Item "scanin port is named si" | |
165 | .ie n .IP "\(bu scanout port is named ""so""" 4 | |
166 | .el .IP "\(bu scanout port is named ``so''" 4 | |
167 | .IX Item "scanout port is named so" | |
168 | .ie n .IP "\(bu scanenable port is named ""se""" 4 | |
169 | .el .IP "\(bu scanenable port is named ``se''" 4 | |
170 | .IX Item "scanenable port is named se" | |
171 | .PD | |
172 | .PP | |
173 | If the design does not conform to these defaults, switches | |
174 | are available to modify the operation of \*(L"scantest\*(R". | |
175 | .Sh "\s-1OPTIONS\s0" | |
176 | .IX Subsection "OPTIONS" | |
177 | .IP "\-[no]atpg" 4 | |
178 | .IX Item "-[no]atpg" | |
179 | Run atpg only. If the option is negated, only simulation | |
180 | is performed. This is the same as specifying \*(L"\-sim\*(R" | |
181 | .IP "\-bb or \-blackbox" 4 | |
182 | .IX Item "-bb or -blackbox" | |
183 | Enable automatic black box recognition. Typically this option | |
184 | should not be required. The switch can be used to force | |
185 | continuation of the flow in the presence of missing cells. | |
186 | Coverage is likely to be poor. | |
187 | .Sp | |
188 | Before setting this switch the user is advised to check that | |
189 | correct version of the library is being referenced and that | |
190 | all verilog files have been specified. | |
191 | .Sp | |
192 | In the event that a view is known to be missing (such as a | |
193 | memory block) this switch will need to be specified. | |
194 | .IP "\-clk" 4 | |
195 | .IX Item "-clk" | |
196 | Introduces a comma separated list of rising edge active clocks. | |
197 | Default settings are overridden. Default names must be given | |
198 | explicitly if needed. | |
199 | .IP "\-comb" 4 | |
200 | .IX Item "-comb" | |
201 | Specifies that the block has no sequential cells. Normally | |
202 | \&\*(L"scantest\*(R" searches for the presence of default or user | |
203 | specified clock ports. Specifying \*(L"\-comb\*(R" suppresses this | |
204 | behavior. | |
205 | .IP "\-design" 4 | |
206 | .IX Item "-design" | |
207 | Optional switch that introduces a single design file. | |
208 | .IP "\-dftlib" 4 | |
209 | .IX Item "-dftlib" | |
210 | Allows a non-default FastScan library to be specified. | |
211 | .Sp | |
212 | The \s-1DFT\s0 library is normally \*(L"$LIBDIR/u1/atpg/u1.mdl\*(R". | |
213 | This switch is provided for library debug purposes. Do not | |
214 | use it in the normal flow! | |
215 | .IP "\-[no]dofile" 4 | |
216 | .IX Item "-[no]dofile" | |
217 | If set, this switch causes only the FastScan command file | |
218 | (dofile) to be generated. | |
219 | .Sp | |
220 | If negated, the switch allows the flow to proceed without | |
221 | generating a new default command file. The command file | |
222 | should be already present. This switch allows the user | |
223 | to develop a custom command file. | |
224 | .IP "\-dumpdir" 4 | |
225 | .IX Item "-dumpdir" | |
226 | Allows a non-default dump directory to be specified. | |
227 | .Sp | |
228 | By default, \*(L"scantest\*(R" creates a dump area for simulation | |
229 | files in either \*(L"/export/home/bw\*(R" (scratch area available | |
230 | when running under dream) or \*(L"/tmp\*(R". The user is free to | |
231 | choose somewhere else. | |
232 | .Sp | |
233 | A subdirectory composed of the user's name and process | |
234 | id is created into which the simulation files are dumped. | |
235 | .RS 4 | |
236 | .Sp | |
237 | .RS 4 | |
238 | \&\s-1NOTE:\s0 The dump directory is never cleaned out. The user | |
239 | is responsible for ensuring that unnecessary files are | |
240 | removed. | |
241 | .RE | |
242 | .RE | |
243 | .RS 4 | |
244 | .RE | |
245 | .IP "\-flist" 4 | |
246 | .IX Item "-flist" | |
247 | Specifies verilog include files. This switch is necessary | |
248 | if the design is spread over multiple files. | |
249 | .Sp | |
250 | By default no include files are assumed. | |
251 | .IP "\-fslog" 4 | |
252 | .IX Item "-fslog" | |
253 | Specifies an alternate name for the fastscan log file. | |
254 | .IP "\-help" 4 | |
255 | .IX Item "-help" | |
256 | Prints the list of switches with brief descriptions and | |
257 | default settings. | |
258 | .IP "\-hi" 4 | |
259 | .IX Item "-hi" | |
260 | Introduces a comma separated list of input ports which | |
261 | need to be contrained high. | |
262 | .Sp | |
263 | By default none are assumed. | |
264 | .IP "\-lo" 4 | |
265 | .IX Item "-lo" | |
266 | Introduces a comma separated list of input ports which | |
267 | need to be contrained low. | |
268 | .Sp | |
269 | By default none are assumed. | |
270 | .IP "\-ph1" 4 | |
271 | .IX Item "-ph1" | |
272 | Introduces a comma separated list of rising edge active clocks. | |
273 | This switch is an alias for \*(L"clk\*(R". | |
274 | .IP "\-ph2" 4 | |
275 | .IX Item "-ph2" | |
276 | Introduces a comma separated list of falling edge active clocks. | |
277 | .Sp | |
278 | By default none are assumed. | |
279 | .IP "\-[no]runfile" 4 | |
280 | .IX Item "-[no]runfile" | |
281 | If set, this switch causes only the FastScan run file to be | |
282 | generated. | |
283 | .Sp | |
284 | If negated, the switch allows the flow to proceed without | |
285 | generating a new default run file. The run file needs to | |
286 | be already present. This switch allows the user to invoke | |
287 | FastScan with customized settings. | |
288 | .IP "\-se" 4 | |
289 | .IX Item "-se" | |
290 | Introduces a comma separated list of scanenable ports. | |
291 | Typically, only one scan enable port is expected. This | |
292 | switch is provided to specify a non-default port name. | |
293 | .Sp | |
294 | In the event that the default name, \*(L"se\*(R", is also required | |
295 | it needs to be explicitly specified. | |
296 | .IP "\-si" 4 | |
297 | .IX Item "-si" | |
298 | Introduces a comma separated list of scanin ports. The | |
299 | default setting is overwritten. If the default name, \*(L"si\*(R", | |
300 | is also required it needs to be explicitly specified. | |
301 | .Sp | |
302 | The order of the scanin ports must match that of the | |
303 | corresponding scanout ports. | |
304 | .IP "\-[no]simulation" 4 | |
305 | .IX Item "-[no]simulation" | |
306 | If set, this switch causes only simulation to be performed. | |
307 | If negated, the switch halts the flow after pattern | |
308 | generation. | |
309 | .IP "\-smalljob" 4 | |
310 | .IX Item "-smalljob" | |
311 | Selects a 20 minute FastScan license. This works for small | |
312 | jobs when no licence is available on the default large queue. | |
313 | .IP "\-so" 4 | |
314 | .IX Item "-so" | |
315 | Introduces a comma separated list of scanout ports. The | |
316 | default setting is overwritten. If the default name, \*(L"so\*(R", | |
317 | is also required it needs to be explicitly specified. | |
318 | .Sp | |
319 | The order of the scanout ports must match that of the | |
320 | corresponding scanin ports. | |
321 | .IP "\-[no]tpfile" 4 | |
322 | .IX Item "-[no]tpfile" | |
323 | If set, this switch causes only the FastScan test procedure | |
324 | file to be generated. | |
325 | .Sp | |
326 | If negated, the switch allows the flow to proceed without | |
327 | generating a new default test procedure file. The test | |
328 | procedure file should be already present. This switch allows | |
329 | the user to develop a custom protocol. | |
330 | .IP "\-top" 4 | |
331 | .IX Item "-top" | |
332 | This switch specifies the name of the top module. By default | |
333 | the top module name is taken from the root of the design | |
334 | file. The switch is necessary if the top module name does | |
335 | not match the design file name or if there are multiple top | |
336 | modules present. | |
337 | .IP "\-verbose" 4 | |
338 | .IX Item "-verbose" | |
339 | If set, this switch will cause untestable fault information | |
340 | to be added to the \s-1ATPG\s0 log file. If coverage is low, this | |
341 | additional information could be large. | |
342 | .IP "\-vverbose" 4 | |
343 | .IX Item "-vverbose" | |
344 | The \*(L"vverbose\*(R" flag adds instance coverage information to | |
345 | the \s-1ATPG\s0 log file. If the design file contains a large number | |
346 | of instances, printing the additional statistics slows down | |
347 | the flow and increases the size of the log file. | |
348 | .IP "\-vlist" 4 | |
349 | .IX Item "-vlist" | |
350 | Allows multiple design files and/or libraries to be listed | |
351 | in a separate file. Internally this switch is used to reference | |
352 | the m1 library (\*(L"$LIBDIR/m1/compiled/m1.vL\*(R"). If this switch | |
353 | is used and the m1 library also needs to be referenced the | |
354 | library must be explicitly specified. | |
355 | .SH "ENVIRONMENT" | |
356 | .IX Header "ENVIRONMENT" | |
357 | \&\*(L"scantest\*(R" uses two environment variables: | |
358 | .IP "\s-1LIBDIR\s0" 4 | |
359 | .IX Item "LIBDIR" | |
360 | Specifies the location of the design libraries. | |
361 | .IP "\s-1USER\s0" 4 | |
362 | .IX Item "USER" | |
363 | Identifies where the default dump directory will be created. | |
364 | .SH "SEE ALSO" | |
365 | .IX Header "SEE ALSO" | |
366 | \&\fIScanTest\fR\|(3), http://www.mentor.com/dft | |
367 | .SH "AUTHOR" | |
368 | .IX Header "AUTHOR" | |
369 | Roger Mistely, <roger.mistely@sun.com> |