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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / tools / perlmod / sjm_tstgen.pl,1.37
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AT		 1# ========== Copyright Header Begin ==========================================
2#
3# OpenSPARC T2 Processor File: sjm_tstgen.pl,1.37
4# Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5# 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6#
7# * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8#
9# This program is free software; you can redistribute it and/or modify
10# it under the terms of the GNU General Public License as published by
11# the Free Software Foundation; version 2 of the License.
12#
13# This program is distributed in the hope that it will be useful,
14# but WITHOUT ANY WARRANTY; without even the implied warranty of
15# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16# GNU General Public License for more details.
17#
18# You should have received a copy of the GNU General Public License
19# along with this program; if not, write to the Free Software
20# Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21#
22# For the avoidance of doubt, and except that if any non-GPL license
23# choice is available it will apply instead, Sun elects to use only
24# the General Public License version 2 (GPLv2) at this time for any
25# software where a choice of GPL license versions is made
26# available with the language indicating that GPLv2 or any later version
27# may be used, or where a choice of which version of the GPL is applied is
28# otherwise unspecified.
29#
30# Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31# CA 95054 USA or visit www.sun.com if you need additional information or
32# have any questions.
33#
34# ========== Copyright Header End ============================================
35
36use Getopt::Long;
37use Math::BigInt;
38
39# default opts
40my $opt_sjm4 = 1;
41my $opt_sjm5 = 1;
42my $opt_tm4 = 0;
43my $opt_tm5 = 0;
44my $opt_seed = 0;
45my $opt_debug = 0;
46my $opt_help = 0;
47my $opt_max_num_txns = 100;
48my $opt_max_num_cycles = 10000;
49my $opt_max_mem = 0x80;
50my $max_mem = "0x20_00000000";
51my $opt_align_rd_64b = 0;
52my $opt_align_wr_64b = 1;
53my $opt_num_mem_addrs = 20;
54my $opt_num_nc_addrs = 20;
55my $opt_num_dma_blks = 8;
56my $opt_dma_min_size = 0x40;
57my $opt_dma_max_size = 0x400;
58my $opt_mem_default = 0;
59my $opt_nc_default = 0;
60my @opt_config_id;
61$opt_config_id[4] = "28";
62$opt_config_id[5] = "30";
63my @opt_config_iosyncadr;
64$opt_config_iosyncadr[4] = "0x7CF00BEEF00";
65$opt_config_iosyncadr[5] = "0x7EF00BEEF00";
66my $opt_timeout = "10000";
67my $opt_init_mem = 1;
68my $opt_init_nc = 1;
69my $opt_init_dma = 0;
70my $opt_data_rand = 1;
71my $opt_data_pattern = 0xffffffff;
72my $opt_txn_default = 1;
73my %default_wt_txn = ("NCRD" => 40,
74 "NCWR" => 40,
75 "NCBRD" => 40,
76 "NCBWR" => 40,
77 "WRI" => 40,
78 "WRIS" => 20,
79 "WRM" => 20,
80 "RDD" => 40,
81 "RDS" => 10,
82 "INT" => 10,
83 );
84my %wt_txn = ("IDLE" => 1);
85my $opt_min_wait = 10;
86my $opt_max_wait = 20;
87my $opt_rpt_wt = 0;
88my $opt_rpt_min = 2;
89my $opt_rpt_max = 10;
90my $opt_burst = 1;
91my $opt_burst_min_wait = 0;
92my $opt_burst_max_wait = 4;
93my $opt_burst_min_duration = 5;
94my $opt_burst_max_duration = 10;
95my $opt_burst_min_interval = 10;
96my $opt_burst_max_interval = 20;
97my %opt_wt_nc_be = ("ZERO" =>10,
98 "ALIGN" => 60,
99 "CONT" => 20,
100 "RAND" => 10);
101my %opt_wt_wrm_be = ("ZERO" =>10,
102 "ALT" => 10,
103 "CONT" => 60,
104 "RAND" => 20);
105my %opt_wt_nc_size = ("1" => 20,
106 "2" => 20,
107 "4" => 20,
108 "8" => 20,
109 "16" => 20);
110my %nc_size_align = ("1" => 0,
111 "2" => 1,
112 "4" => 2,
113 "8" => 3,
114 "16" => 4);
115my @opt_wt_l2_bank = (10,10,10,10);
116my @opt_int_max;
117$opt_int_max[4] = 20;
118$opt_int_max[5] = 20;
119my $opt_int_num_rand_tgt = 8;
120my $opt_int_en = 1;
121my $opt_int_only = 0;
122my @int_cnt;
123$int_cnt[4] = 0;
124$int_cnt[5] = 0;
125my $opt_wt_mem_ue_err = 0;
126my $opt_wt_nc_ue_err = 0;
127
128# RSVD09 = CWR in jbus_mon? exclude
129#my @rsvd_ttypes = (0x00,0x01,0x09,0x18,0x19,0x1B,0x1C,0x1D,0x1E);
130my @rsvd_ttypes = (0x00,0x01,0x18,0x19,0x1B,0x1C,0x1D,0x1E);
131
132# process command line arguments
133Getopt::Long::Configure ('prefix=-') ;
134Getopt::Long::Configure ('no_ignore_case') ;
135Getopt::Long::Configure ('permute') ;
136
137# Subroutines
138sub print_config {
139 $OUT=$_[0];
140 print $OUT "#--------------------------------------------------------- \n";
141 print $OUT "# print_config():\n";
142 print $OUT "#\topt_sjm4: $opt_sjm4\n";
143 print $OUT "#\topt_sjm5: $opt_sjm5\n";
144 print $OUT "#\topt_tm4: $opt_tm4\n";
145 print $OUT "#\topt_tm5: $opt_tm5\n";
146 print $OUT "#\topt_seed: $opt_seed\n";
147 print $OUT "#\topt_debug: $opt_debug\n";
148 print $OUT "#\topt_max_num_txns: $opt_max_num_txns\n";
149 print $OUT "#\topt_max_num_cycles: $opt_max_num_cycles\n";
150 print $OUT "#\topt_min_wait: $opt_min_wait\n";
151 print $OUT "#\topt_max_wait: $opt_max_wait\n";
152 print $OUT "#\topt_rpt_wt: $opt_rpt_wt\n";
153 print $OUT "#\topt_rpt_min: $opt_rpt_min\n";
154 print $OUT "#\topt_rpt_max: $opt_rpt_max\n";
155 print $OUT "#\topt_burst: $opt_burst\n";
156 print $OUT "#\topt_burst_min_wait: $opt_burst_min_wait\n";
157 print $OUT "#\topt_burst_max_wait: $opt_burst_max_wait\n";
158 print $OUT "#\topt_burst_min_duration: $opt_burst_min_duration\n";
159 print $OUT "#\topt_burst_max_duration: $opt_burst_max_duration\n";
160 print $OUT "#\topt_burst_min_interval: $opt_burst_min_interval\n";
161 print $OUT "#\topt_burst_max_interval: $opt_burst_max_interval\n";
162 print $OUT "#\topt_max_mem: $opt_max_mem\n";
163 print $OUT "#\tmax_mem: $max_mem\n";
164 print $OUT "#\topt_align_rd_64b: $opt_align_rd_64b\n";
165 print $OUT "#\topt_align_wr_64b: $opt_align_wr_64b\n";
166 print $OUT "#\topt_mem_default: $opt_mem_default\n";
167 print $OUT "#\topt_nc_default: $opt_nc_default\n";
168 print $OUT "#\topt_num_mem_addrs: $opt_num_mem_addrs\n";
169 print $OUT "#\topt_num_nc_addrs: $opt_num_nc_addrs\n";
170 print $OUT "#\topt_num_dma_blks: $opt_num_dma_blks\n";
171 print $OUT "#\topt_dma_min_size: $opt_dma_min_size\n";
172 print $OUT "#\topt_dma_max_size: $opt_dma_max_size\n";
173 print $OUT "#\topt_mem_*: \n";
174 for ($i=0;$i<@opt_mem_base;$i++) {
175 printf $OUT "#\topt_mem_*[%d]: label: %s base: %s size: %s weight: %s\n",
176 $i,$opt_mem_label[$i],$opt_mem_base[$i],$opt_mem_size[$i],$opt_mem_wt[$i];
177 }
178 print $OUT "#\topt_nc_*: \n";
179 for ($i=0;$i<@opt_nc_base;$i++) {
180 printf $OUT "#\topt_nc_*[%d]: label: %s base: %s size: %s weight: %s\n",
181 $i,$opt_nc_label[$i],$opt_nc_base[$i],$opt_nc_size[$i],$opt_nc_wt[$i];
182 }
183 for ($i=4;$i<=5;$i++) {
184 print $OUT "#\topt_config_id[$i]: $opt_config_id[$i] \n";
185 print $OUT "#\topt_config_iosyncadr[$i]: $opt_config_iosyncadr[$i] \n";
186 }
187 print $OUT "#\topt_timeout: $opt_timeout\n";
188 print $OUT "#\topt_init_mem: $opt_init_mem\n";
189 print $OUT "#\topt_init_nc: $opt_init_nc\n";
190 print $OUT "#\topt_init_dma: $opt_init_dma\n";
191 print $OUT "#\topt_data_rand: $opt_data_pattern\n";
192 print $OUT "#\topt_txn_default: $opt_txn_default\n";
193 while (($key,$value) = each(%opt_wt_txn)) {
194 if (defined $value) {
195 print $OUT "#\topt_wt_txn_$key: \t$value \n";
196 }
197 }
198 while (($key,$value) = each(%wt_txn)) {
199 print $OUT "#\t\twt_txn_$key: \t$value \n";
200 }
201 while (($key,$value) = each(%opt_wt_nc_be)) {
202 if (defined $value) {
203 print $OUT "#\topt_nc_be_$key: \t$value \n";
204 }
205 }
206 while (($key,$value) = each(%opt_wt_wrm_be)) {
207 if (defined $value) {
208 print $OUT "#\topt_wrm_be_$key: \t$value \n";
209 }
210 }
211 while (($key,$value) = each(%opt_wt_nc_size)) {
212 if (defined $value) {
213 print $OUT "#\topt_nc_size$key: \t$value \n";
214 }
215 }
216 for ($i=0;$i<@opt_wt_l2_bank;$i++) {
217 print $OUT "#\topt_wt_l2_bank[$i]: $opt_wt_l2_bank[$i]\n";
218 }
219 for ($i=0;$i<@opt_int_tgt;$i++) {
220 print $OUT "#\topt_int_tgt[$i]: $opt_int_tgt[$i]\n";
221 }
222 print $OUT "#\topt_int_num_rand_tgt: $opt_int_num_rand_tgt\n";
223 for ($i=4;$i<=5;$i++) {
224 print $OUT "#\topt_int_max$i: $opt_int_max[$i]\n";
225 }
226 print $OUT "#\topt_wt_mem_ue_err: $opt_wt_mem_ue_err \n";
227 print $OUT "#\topt_wt_nc_ue_err: $opt_wt_mem_ue_err \n";
228 print $OUT "#\topt_help: $opt_help\n";
229 print $OUT "#--------------------------------------------------------- \n\n";
230}
231
232sub usage() {
233 print "\nUsage: $PROG_NAME <options> \n";
234 print " Options: [default]\n";
235 print "\t-seed=<arg> - Set random seed to <arg> [required]\n";
236 print "\t-f=<file> - Read in options from <file>\n";
237 print "\t-sjm4/-nosjm4 - Generate file for SJM 4 [on]\n";
238 print "\t-sjm5/-nosjm5 - Generate file for SJM 5 [on]\n";
239 print "\t-tm4/-notm4 - I/O Bridge in slot 4 - do not generate sjm_4.cmd [off]\n";
240 print "\t-tm5/-notm5 - I/O Bridge in slot 5 - do not generate sjm_5.cmd [off]\n";
241 print "\t-debug - Print debug and option info [off]\n";
242 print "\t-max_num_txns=<num> - Max number of txns per SJM file [50]\n";
243 print "\t-max_num_cycles=<num> - Max number of cycles per SJM file [10000]\n";
244 print "\t-min_wait=<num> - Min WAIT cycles between txns [10]\n";
245 print "\t-max_wait=<num> - Max WAIT cycles between txns [20]\n";
246 print "\t-rpt_wt=<num> - Repeat txn type <num>% [0]\n";
247 print "\t-rpt_min=<num> - Min number of repeat txn type[2]\n";
248 print "\t-rpt_max=<num> - Max number of repeat txn type[10]\n";
249 print "\t-burst/-noburst - Enable Burst mode [on]\n";
250 print "\t-burst_min_wait=<num> - Min WAIT cycles between txns during burst[0]\n";
251 print "\t-burst_max_wait=<num> - Max WAIT cycles between txns during burst[0]\n";
252 print "\t-burst_min_duration=<num> - Min number of txns in burst [5] \n";
253 print "\t-burst_max_duration=<num> - Max number of txns in burst [10] \n";
254 print "\t-burst_min_interval=<num> - Min number of txns between bursts [10] \n";
255 print "\t-burst_max_interval=<num> - Max number of txns between bursts [20] \n";
256 print "\t-max_mem=<num> - Max memory size (GB) for default mem space [128]\n";
257 print "\t-align_rd_64b/-noalign_rd_64b - Force 64B alignment for memory read/NCBRD addrs [off]\n";
258 print "\t-align_wr_64b/-noalign_wr_64b - Force 64B alignment for memory write/NCBWR addrs [on]\n";
259 print "\t-mem_default/-nomem_default - Use default memory space [off]\n";
260 print "\t-nc_default/-nonc_default - Use default NC spaces [off] \n";
261 print "\t-num_mem_addrs=<num> - Number of random memory addrs per SJM file [20]\n";
262 print "\t-num_nc_addrs=<num> - Number of random NC addrs per SJM file [20]\n";
263 print "\t-num_dma_blks=<num> - Number of random DMA blocks per SJM file [8]\n";
264 print "\t-dma_min_size=<num> - Minimum size (in bytes) of DMA Block [0x40]\n";
265 print "\t-dma_max_size=<num> - Maximum size (in bytes) of DMA Block [0x400]\n";
266 print "\t-mem_label=<name> - Define mem space <name>\n";
267 print "\t-mem_wt=<num> - Weight for mem space\n";
268 print "\t-mem_base=<addr> - Base address for mem space\n";
269 print "\t-mem_size=<size> - Size of mem space\n";
270 print "\t\tMultiple mem spaces may be defined.\n";
271 print "\t\tIf no mem spaces defined, use default mem space\n";
272 print "\t-nc_label=<name> - Define NC space <name>\n";
273 print "\t-nc_wt=<num> - Weight for NC space\n";
274 print "\t-nc_base=<addr> - Base address for NC space\n";
275 print "\t-nc_size=<size> - Size of NC space\n";
276 print "\t\tMultiple NC spaces may be defined.\n";
277 print "\t\tIf no NC spaces defined, use default NC spaces:\n";
278 print "\t\t\tFAKE_DMA \n";
279 print "\t\t\tAID<N>_NC_8MB for sjm4 AID (if -sjm4) \n";
280 print "\t\t\tAID<N>_NC_64GB for sjm4 AID (if -sjm4) \n";
281 print "\t\t\tAID<N>_NC_8MB for sjm5 AID (if -sjm5) \n";
282 print "\t\t\tAID<N>_NC_64GB for sjm5 AID (if -sjm5) \n";
283 print "\t-config_id4/5=<aid> - Set config AID for SJM 4/5 [1c/1e]\n";
284 print "\t-config_iosyncadr4/5=<addr> - Set config iosyncadr for SJM 4/5 [0x7CF00BEEF00/0x7EF00BEEF00]\n";
285 print "\t-timeout=<num> - Set SJM Timeout value [10000]\n";
286 print "\t-init_mem/-noinit_mem - Initialize all mem addrs [on]\n";
287 print "\t-init_nc/-noinit_nc - Initialize all NC addrs [on]\n";
288 print "\t-init_dma/-noinit_dma - Initialize all DMA blocks [off]\n";
289 print "\t-data_rand/-nodata_rand - Use random data patterns for write data [on]\n";
290 print "\t-data_pattern=<data> - Use <data> for write data (if -norand_data) [0xffffffff]\n";
291 print "\t-txn_default/-notxn_default - Use default txn weights [on]\n";
292 print "\t\tDefault Txn Weights:\n";
293 while (($key,$value) = each(%default_wt_txn)) {
294 if (defined $value) {
295 print "\t\t\t$key: \t$value \n";
296 }
297 }
298 print "\t-wt_txn_<type>=<num> - Set weight for txn type <type> overrides defaults\n";
299 print "\t-wt_nc_be_zero/align/cont/rand=<num> - Set weights for NCRD/NCWR Byte Mask types [10/60/20/10]\n";
300 print "\t-wt_nc_size1/2/4/8/16=<num> - Set weights for NCRD/NCWR sizes (for wt_nc_be_align) [20/20/20/20/20]\n";
301 print "\t-wt_nc_wrm_zero/cont/rand=<num> - Set weights for WRM Byte Mask types [10/60/30]\n";
302 print "\t-wt_l2_bank0/1/2/3=<num> - Set weights for L2 Banks 0/1/2/3 (addr[7:6]) [10/10/10/10]\n";
303 print "\t-int_tgt=<num> - Add thread <num> as INT target\n";
304 print "\t-int_num_rand_tgt=<num> - # of random INT target threads (if no -int_tgt) [8]\n";
305 print "\t-int_max4=<num> - Maximum # if INT commands in SJM4 command file [20]\n";
306 print "\t-int_max5=<num> - Maximum # if INT commands in SJM5 command file [20]\n";
307 print "\t (# of outstanding INTs controlled by -int_tgt/-int_num_rand_tgs)\n";
308 print "\t-wt_mem_ue_err=<num> - Set weight for UE err on mem Writes [0]\n";
309 print "\t-wt_nc_ue_err=<num> - Set weight for UE err on NC Writes [0]\n";
310 print "\t-h|u|help - Print this usage info\n";
311 print "\n\tFor backwards compatibility with older versions of this script:\n";
312 print "\t -t - Same as -tm5 \n";
313 print "\t -n=<num> - Same as -max_num_txns=<num>\n";
314 print "\t -int_en=<0 or 1> - Enable INT txns [1] \n";
315 print "\t -int_only - Generate only INT txns [off] \n";
316
317
318 if ($opt_debug) {
319 print_config(STDOUT);
320 }
321 exit;
322}
323
324sub wt_random {
325 local @wt_array;
326 local $i;
327 local $total_wt;
328 $total_wt = 0;
329 for ($i=0;$i<@_;$i++) {
330 if (not defined $_[$i]) {
331 $_[$i] = 0;
332 }
333 $total_wt += $_[$i];
334 }
335 $wt_array[0] = ($_[0] * 1000)/$total_wt ;
336 for ($i=1;$i<@_;$i++) {
337 $wt_array[$i] = $wt_array[$i-1] + ($_[$i] * 1000)/$total_wt;
338 }
339 $rnd = rand(1000);
340 for ($i=0;$i<@wt_array;$i++) {
341 if ($rnd <= $wt_array[$i]) {
342 last;
343 }
344 }
345 return $i;
346}
347
348sub wt_random_hash {
349 local %hash = @_;
350 local @hash_keys = keys(%hash);
351 local @hash_values = values(%hash);
352
353 return $hash_keys[wt_random(@hash_values)];
354}
355
356sub alignAddr {
357 local $addr = $_[0];
358 local $align = $_[1];
359
360 local $mask = 0xffffffff << $align;
361 return ($addr & $mask);
362}
363
364sub genRandAddr {
365 local $base;
366 local $size;
367 local $addr;
368 local $align;
369 local $bank;
370
371 $base = Math::BigInt->new($_[0]);
372 $size = Math::BigInt->new($_[1]);
373 if (defined $_[2]) {
374 $align = $_[2];
375 } else {
376 $align = 0;
377 }
378
379 $size_hi = $size >> 32;
380 $size_lo = $size & 0xffffffff;
381
382 if ($size_hi == 0) {
383 $offset_hi = 0;
384 $offset_lo = int(rand($size_lo));
385 } else {
386 $offset_hi = Math::BigInt->new(int(rand($size_hi)));
387 $offset_lo = Math::BigInt->new(int(rand(0xffffffff)));
388 }
389
390 $bank = wt_random(@opt_wt_l2_bank);
391 $offset_lo = ($offset_lo & 0xffffff3f) | ($bank<<6 & 0x000000c0);
392 $offset = ($offset_hi << 32) + $offset_lo;
393
394 $addr = $base + $offset;
395 $addr_hi = $addr >> 32;
396 #$addr_lo = $addr & 0xffffffff;
397 $addr_lo = alignAddr($addr & 0xffffffff,$align);
398
399 if ($opt_debug) {
400 printf "base: %03x_%08x size: %03x_%08x offset: %03x_%08x addr: %03x_%08x\n",
401 $base>>32,($base & 0x000ffffffff),$size_hi,$size_lo,$offset_hi,$offset_lo,$addr_hi,$addr_lo;
402 }
403 return ($addr_hi,$addr_lo);
404}
405
406sub getRandData {
407 local $size = $_[0];
408 local $i;
409 local $mask;
410 local $data;
411 local $data_str = "";
412
413 if ($size == 1) {
414 $mask=0xff;
415 } elsif ($size == 2) {
416 $mask=0xffff;
417 } else {
418 $mask=0xffffffff;
419 }
420
421 for ($i=0;$i<$size;$i=$i+4) {
422 if ($opt_data_rand) {
423 $data = rand(0xffffffff);
424 } else {
425 $data = $opt_data_pattern;
426 }
427 $data = $data & $mask;
428
429 $data_str = sprintf("%s 0x%x",$data_str,$data);
430 }
431
432 return $data_str;
433}
434# Hack
435@posByteMask = (0xffffffff,0xfffffffe,0xfffffffc,0xfffffff8,
436 0xfffffff0,0xffffffe0,0xffffffc0,0xffffff80,
437 0xffffff00,0xfffffe00,0xfffffc00,0xfffff800,
438 0xfffff000,0xffffe000,0xffffc000,0xffff8000,
439 0xffff0000,0xfffe0000,0xfffc0000,0xfff80000,
440 0xfff00000,0xffe00000,0xffc00000,0xff800000,
441 0xff000000,0xfe000000,0xfc000000,0xf8000000,
442 0xf0000000,0xe0000000,0xc0000000,0x80000000,
443 0x00000000);
444sub byteMask {
445 local $start = $_[0];
446 local $end = $_[1];
447 local $be_hi;
448 local $be_lo;
449 local $be_hir;
450 local $be_lor;
451
452 if ($start < 32) {
453 $be_hi = 0xffffffff;
454 $be_lo = $posByteMask[$start];
455 } else {
456 $be_hi = $posByteMask[$start-32];
457 $be_lo = 0x00000000;
458 }
459 if ($end < 32) {
460 $be_hi = 0x00000000;
461 $be_lo &= ~$posByteMask[$end];
462 } else {
463 $be_hi &= ~$posByteMask[$end-32];
464 }
465 $be_hir = reverseMask($be_hi);
466 $be_lor = reverseMask($be_lo);
467 return ($be_lor,$be_hir);
468}
469sub reverseMask {
470 local $mask = $_[0];
471 local $i;
472 local $tmpmask;
473
474 $tmpmask = 0;
475 for ($i=0;$i<32;$i++) {
476 $tmpmask <<= 1;
477 $tmpmask |= $mask & 0x1;
478 $mask >>=1;
479 }
480 return $tmpmask;
481}
482# Generate SJM Commands for each TTYPE
483sub genCmdRD {
484 local $idx = int(rand(@mem_addr_lo));
485 local $addr_hi = $mem_addr_hi[$idx];
486 local $addr_lo = $mem_addr_lo[$idx];
487
488 if ($opt_align_rd_64b) {
489 $addr_lo = alignAddr($addr_lo,6);
490 }
491 printf SJM "READ 0x%03x%08x nosnoop\n",$addr_hi,$addr_lo;
492 return (1,5);
493}
494sub genCmdRDD {
495 local $idx = int(rand(@mem_addr_lo));
496 local $addr_hi = $mem_addr_hi[$idx];
497 local $addr_lo = $mem_addr_lo[$idx];
498
499 if ($opt_align_rd_64b) {
500 $addr_lo = alignAddr($addr_lo,6);
501 }
502 printf SJM "READBLK 0x%03x%08x\n",$addr_hi,$addr_lo;
503 return (1,5);
504}
505sub genCmdRDS {
506 local $idx = int(rand(@mem_addr_lo));
507 local $addr_hi = $mem_addr_hi[$idx];
508 local $addr_lo = $mem_addr_lo[$idx];
509
510 if ($opt_align_rd_64b) {
511 $addr_lo = alignAddr($addr_lo,6);
512 }
513 printf SJM "READ 0x%03x%08x \n",$addr_hi,$addr_lo;
514 return (1,5);
515}
516sub genCmdRDSA {
517 local $idx = int(rand(@mem_addr_lo));
518 local $addr_hi = $mem_addr_hi[$idx];
519 local $addr_lo = $mem_addr_lo[$idx];
520
521 if ($opt_align_rd_64b) {
522 $addr_lo = alignAddr($addr_lo,6);
523 }
524 printf SJM "IFETCH 0x%03x%08x \n",$addr_hi,$addr_lo;
525 return (1,5);
526}
527sub genCmdRDO {
528 local $ttype = 0x06;
529 local $mask = 0;
530 local $idx = int(rand(@mem_addr_lo));
531 local $addr_hi = $mem_addr_hi[$idx];
532 local $addr_lo = $mem_addr_lo[$idx];
533 local $adtype = 0xc0 | 0xa << 2 | rand(4);
534
535 if ($opt_align_rd_64b) {
536 $addr_lo = alignAddr($addr_lo,6);
537 }
538 # RDO can be generated by SJM w/ WRITE or OWN command.
539 # But Niagara will ignore causing SJM Timeout.
540 # Use BUSERROR instead to fake it
541 printf SJM "BUSERROR 0x%02x 0x%03x%08x 0x%04x 0x%02x \n",
542 $ttype,$addr_hi,$addr_lo,$mask,$adtype;
543
544 return (1,1);
545}
546sub genCmdOWN {
547 local $ttype = 0x07;
548 local $mask = 0;
549 local $idx = int(rand(@mem_addr_lo));
550 local $addr_hi = $mem_addr_hi[$idx];
551 local $addr_lo = $mem_addr_lo[$idx];
552 local $adtype = 0xc0 | 0xb << 2 | rand(4);
553
554 if ($opt_align_rd_64b) {
555 $addr_lo = alignAddr($addr_lo,6);
556 }
557 # OWN can be generated by SJM w/ OWN command.
558 # But Niagara will ignore causing SJM Timeout.
559 # Use BUSERROR instead to fake it
560 printf SJM "BUSERROR 0x%02x 0x%03x%08x 0x%04x 0x%02x \n",
561 $ttype,$addr_hi,$addr_lo,$mask,$adtype;
562
563 return (1,1);
564}
565sub genCmdINV {
566 local $aid = $_[0];
567 local $ttype = 0x08;
568 local $mask = 0;
569 local $idx = int(rand(@mem_addr_lo));
570 local $addr_hi = $mem_addr_hi[$idx];
571 local $addr_lo = $mem_addr_lo[$idx];
572 local $adtype = 0xc0 | $aid << 2 | 0x0;
573
574 if ($opt_align_wr_64b) {
575 $addr_lo = alignAddr($addr_lo,6);
576 }
577 printf SJM "BUSERROR 0x%02x 0x%03x%08x 0x%04x 0x%02x \n",
578 $ttype,$addr_hi,$addr_lo,$mask,$adtype;
579
580 return (1,1);
581}
582sub checkSjmAddr {
583 local $aid = $_[0];
584 local $addr_hi = $_[1];
585 local $addr_lo = $_[2];
586
587 if ((($addr_hi == 0x400) && (($addr_lo >> 23) == ($aid & 0x1f))) ||
588 (($addr_hi >> 4) == (0x60 | ($aid & 0x1f)))) {
589 return 1;
590 } else {
591 return 0;
592 }
593}
594sub genCmdNCWRC {
595 # NCWRC not allowed to SJM addrs (Bug2376)
596 local @ok_addr_lo;
597 local @ok_addr_hi;
598 local $ok_addr_cnt = 0;
599 for ($i=0;$i<@nc_addr_lo;$i++) {
600 checkSjmAddr($opt_config_id[4],$nc_addr_hi[$i],$nc_addr_lo[$i]),
601 checkSjmAddr($opt_config_id[5],$nc_addr_hi[$i],$nc_addr_lo[$i]);
602 if (not (($opt_sjm4 && checkSjmAddr($opt_config_id[4],$nc_addr_hi[$i],$nc_addr_lo[$i])) ||
603 ($opt_sjm5 && checkSjmAddr($opt_config_id[5],$nc_addr_hi[$i],$nc_addr_lo[$i])))) {
604 $ok_addr_hi[$ok_addr_cnt] = $nc_addr_hi[$i];
605 $ok_addr_lo[$ok_addr_cnt] = $nc_addr_lo[$i];
606 $ok_addr_cnt++;
607 }
608 }
609 # otherwise same as NCWR + "compress"
610 local $idx = int(rand(@ok_addr_lo));
611 local $addr_hi = $ok_addr_hi[$idx];
612 local $addr_lo = $ok_addr_lo[$idx];
613 local $type = wt_random_hash(%opt_wt_nc_be);
614 local $size = wt_random_hash(%opt_wt_nc_size);
615 local $be = 0;
616 local $start = 0;
617 local $end = 0;
618
619 if ($opt_debug) {
620 printf SJM "# NCWRC type: %s \n",$type;
621 }
622 if ($type eq "ZERO") {
623 printf SJM "WRITEMSKIO 0x%03x%08x %04x %s compress\n",$addr_hi,$addr_lo,0,getRandData(16);
624 } elsif ($type eq "ALIGN") {
625 printf SJM "WRITEIO 0x%03x%08x %d %s compress\n",$addr_hi,alignAddr($addr_lo,$nc_size_align{$size}),$size,getRandData($size);
626 } elsif ($type eq "CONT") {
627 $start = $addr_lo & 0xf;
628 $end = $start+int(rand(16-$start))+1;
629 $be = (0xffff << (16-$end)) & (0xffff >> $start);
630 if ($opt_debug) {
631 printf SJM "# NCWRC type: %s addr: 0x%03x_%08x start: %0d end: %0d be: 0x%04x\n",
632 $type,$addr_hi,$addr_lo,$start,$end,$be;
633 }
634 printf SJM "WRITEMSKIO 0x%03x%08x %04x %s compress\n",$addr_hi,$addr_lo,$be,getRandData(16);
635 } elsif ($type eq "RAND") {
636 printf SJM "WRITEMSKIO 0x%03x%08x %04x %s compress\n",$addr_hi,$addr_lo,rand(0x10000),getRandData(16);
637 }
638 return (1,2);
639}
640sub genCmdWRM {
641 local $idx = int(rand(@mem_addr_lo));
642 local $addr_hi = $mem_addr_hi[$idx];
643 local $addr_lo = $mem_addr_lo[$idx];
644 local $type = wt_random_hash(%opt_wt_wrm_be);
645 local $be_hi = 0;
646 local $be_lo = 0;
647 local $start = 0;
648 local $end = 0;
649
650 if ($type eq "ZERO") {
651 $be_hi = 0;
652 $be_lo = 0;
653 } elsif ($type eq "ALT") {
654 $be_hi = (rand()%2 == 0) ? 0x55555555 : 0xaaaaaaaa;
655 $be_lo = $be_hi;
656 } elsif ($type eq "CONT") {
657 #$start = int(rand(2)) ? ($addr_lo & 0x3f) : 0;
658 $start = (rand()%2 == 0) ? ($addr_lo & 0x3f) : 0;
659 $end = (rand()%2 == 0) ? $start+int(rand(64-$start)) : 64;
660 ($be_hi,$be_lo) = byteMask($start,$end);
661 } elsif ($type eq "RAND") {
662 $be_hi = rand(0xffffffff);
663 $be_lo = rand(0xffffffff);
664 }
665
666 if ($opt_debug) {
667 printf SJM "# WRM type: %s addr_hi: %03x addr_lo %08x start: %0d end: %0d be_hi: %08x be_lo: %08x\n",
668 $type,$addr_hi,$addr_lo,$start,$end,$be_hi,$be_lo;
669 }
670
671 if ($opt_align_wr_64b) {
672 $addr_lo = alignAddr($addr_lo,6);
673 }
674 printf SJM "WRITEMSK 0x%03x%08x 0x%08x%08x +\n",$addr_hi,$addr_lo,$be_hi,$be_lo;
675 printf SJM " %s +\n",getRandData(16);
676 printf SJM " %s +\n",getRandData(16);
677 printf SJM " %s +\n",getRandData(16);
678 printf SJM " %s \n",getRandData(16);
679
680 return (1,5);
681}
682sub genCmdWRB {
683 local $aid = $_[0];
684 local $ttype = 0x0C;
685 local $mask = 0;
686 local $idx = int(rand(@mem_addr_lo));
687 local $addr_hi = $mem_addr_hi[$idx];
688 local $addr_lo = $mem_addr_lo[$idx];
689 local $adtype = 0xc0 | $aid << 2 | 0x0;
690
691 if ($opt_align_wr_64b) {
692 $addr_lo = alignAddr($addr_lo,6);
693 }
694 # WRB Address
695 printf SJM "BUSERROR 0x%02x 0x%03x%08x 0x%04x 0x%02x multi\n",
696 $ttype,$addr_hi,$addr_lo,$mask,$adtype;
697 # WRB Data
698 printf SJM "BUSERROR 0x%02x 0x%03x%08x 0x%04x 0x%02x multi\n",
699 0xff,0xfff,0xffffffff,0xffff,0x00;
700 printf SJM "BUSERROR 0x%02x 0x%03x%08x 0x%04x 0x%02x multi\n",
701 0xff,0xfff,0xffffffff,0xffff,0x00;
702 printf SJM "BUSERROR 0x%02x 0x%03x%08x 0x%04x 0x%02x multi\n",
703 0xff,0xfff,0xffffffff,0xffff,0x00;
704 printf SJM "BUSERROR 0x%02x 0x%03x%08x 0x%04x 0x%02x \n",
705 0xff,0xfff,0xffffffff,0xffff,0x00;
706
707 return (1,5);
708}
709sub genCmdWRBC {
710 local $aid = $_[0];
711 local $ttype = 0x0D;
712 local $mask = 0;
713 local $idx = int(rand(@mem_addr_lo));
714 local $addr_hi = $mem_addr_hi[$idx];
715 local $addr_lo = $mem_addr_lo[$idx];
716 local $adtype = 0xc0 | $aid << 2 | 0x0;
717
718 if ($opt_align_wr_64b) {
719 $addr_lo = alignAddr($addr_lo,6);
720 }
721 # WRBC Address
722 printf SJM "BUSERROR 0x%02x 0x%03x%08x 0x%04x 0x%02x multi\n",
723 $ttype,$addr_hi,$addr_lo,$mask,$adtype;
724 # WRBC Data
725 printf SJM "BUSERROR 0x%02x 0x%03x%08x 0x%04x 0x%02x multi\n",
726 0xff,0xfff,0xffffffff,0xffff,0x00;
727 printf SJM "BUSERROR 0x%02x 0x%03x%08x 0x%04x 0x%02x multi\n",
728 0xff,0xfff,0xffffffff,0xffff,0x00;
729 printf SJM "BUSERROR 0x%02x 0x%03x%08x 0x%04x 0x%02x multi\n",
730 0xff,0xfff,0xffffffff,0xffff,0x00;
731 printf SJM "BUSERROR 0x%02x 0x%03x%08x 0x%04x 0x%02x \n",
732 0xff,0xfff,0xffffffff,0xffff,0x00;
733 return (1,1);
734}
735sub genCmdWRI {
736 local $idx = int(rand(@mem_addr_lo));
737 local $addr_hi = $mem_addr_hi[$idx];
738 local $addr_lo = $mem_addr_lo[$idx];
739
740 if ($opt_align_wr_64b) {
741 $addr_lo = alignAddr($addr_lo,6);
742 }
743
744 printf SJM "WRITEBLK 0x%03x%08x +\n",$addr_hi,$addr_lo;
745 printf SJM " %s +\n",getRandData(16);
746 printf SJM " %s +\n",getRandData(16);
747 printf SJM " %s +\n",getRandData(16);
748 printf SJM " %s \n",getRandData(16);
749 return (1,5);
750}
751sub genCmdWRIS {
752 local $idx = int(rand(@mem_addr_lo));
753 local $addr_hi = $mem_addr_hi[$idx];
754 local $addr_lo = $mem_addr_lo[$idx];
755
756 if ($opt_align_wr_64b) {
757 $addr_lo = alignAddr($addr_lo,6);
758 }
759 # RDS to get line in cache
760 printf SJM "READ 0x%03x%08x \n",$addr_hi,$addr_lo;
761 # WRIS
762 printf SJM "WRITEBLK 0x%03x%08x +\n",$addr_hi,$addr_lo;
763 printf SJM " %s +\n",getRandData(16);
764 printf SJM " %s +\n",getRandData(16);
765 printf SJM " %s +\n",getRandData(16);
766 printf SJM " %s \n",getRandData(16);
767 return (2,10);
768}
769sub genCmdNCRD {
770 local $idx = int(rand(@nc_addr_lo));
771 local $addr_hi = $nc_addr_hi[$idx];
772 local $addr_lo = $nc_addr_lo[$idx];
773 local $type = wt_random_hash(%opt_wt_nc_be);
774 local $size = wt_random_hash(%opt_wt_nc_size);
775 local $be = 0;
776 local $start = 0;
777 local $end = 0;
778
779 if ($opt_debug) {
780 printf SJM "# NCRD type: %s \n",$type;
781 }
782 if ($type eq "ZERO") {
783 printf SJM "READMSKIO 0x%03x%08x %04x\n",$addr_hi,$addr_lo,0;
784 } elsif ($type eq "ALIGN") {
785 printf SJM "READIO 0x%03x%08x %d\n",$addr_hi,alignAddr($addr_lo,$nc_size_align{$size}),$size;
786 } elsif ($type eq "CONT") {
787 $start = $addr_lo & 0xf;
788 $end = $start+int(rand(16-$start))+1;
789 $be = (0xffff << (16-$end)) & (0xffff >> $start);
790 if ($opt_debug) {
791 printf SJM "# NCRD type: %s addr: 0x%03x_%08x start: %0d end: %0d be: 0x%04x\n",
792 $type,$addr_hi,$addr_lo,$start,$end,$be;
793 }
794 printf SJM "READMSKIO 0x%03x%08x %04x\n",$addr_hi,$addr_lo,$be;
795 } elsif ($type eq "RAND") {
796 printf SJM "READMSKIO 0x%03x%08x %04x\n",$addr_hi,$addr_lo,rand(0x10000);
797 }
798 return (1,2);
799}
800sub genCmdNCBRD {
801 local $idx = int(rand(@nc_addr_lo));
802 local $addr_hi = $nc_addr_hi[$idx];
803 local $addr_lo = $nc_addr_lo[$idx];
804
805 if ($opt_align_rd_64b) {
806 $addr_lo = alignAddr($addr_lo,6);
807 }
808 printf SJM "READBLKIO 0x%03x%08x\n",$addr_hi,$addr_lo;
809 return (1,5);
810}
811sub genCmdNCWR {
812 local $idx = int(rand(@nc_addr_lo));
813 local $addr_hi = $nc_addr_hi[$idx];
814 local $addr_lo = $nc_addr_lo[$idx];
815 local $type = wt_random_hash(%opt_wt_nc_be);
816 local $size = wt_random_hash(%opt_wt_nc_size);
817 local $be = 0;
818 local $start = 0;
819 local $end = 0;
820
821 if ($opt_debug) {
822 printf SJM "# NCWR type: %s \n",$type;
823 }
824 if ($type eq "ZERO") {
825 printf SJM "WRITEMSKIO 0x%03x%08x %04x %s\n",$addr_hi,$addr_lo,0,getRandData(16);
826 } elsif ($type eq "ALIGN") {
827 printf SJM "WRITEIO 0x%03x%08x %d %s\n",$addr_hi,alignAddr($addr_lo,$nc_size_align{$size}),$size,getRandData($size);
828 } elsif ($type eq "CONT") {
829 $start = $addr_lo & 0xf;
830 $end = $start+int(rand(16-$start))+1;
831 $be = (0xffff << (16-$end)) & (0xffff >> $start);
832 if ($opt_debug) {
833 printf SJM "# NCWR type: %s addr: 0x%03x_%08x start: %0d end: %0d be: 0x%04x\n",
834 $type,$addr_hi,$addr_lo,$start,$end,$be;
835 }
836 printf SJM "WRITEMSKIO 0x%03x%08x %04x %s\n",$addr_hi,$addr_lo,$be,getRandData(16);
837 } elsif ($type eq "RAND") {
838 printf SJM "WRITEMSKIO 0x%03x%08x %04x %s\n",$addr_hi,$addr_lo,rand(0x10000),getRandData(16);
839 }
840 return (1,2);
841}
842sub genCmdNCBWR {
843 local $idx = int(rand(@nc_addr_lo));
844 local $addr_hi = $nc_addr_hi[$idx];
845 local $addr_lo = $nc_addr_lo[$idx];
846
847 if ($opt_align_wr_64b) {
848 $addr_lo = alignAddr($addr_lo,6);
849 }
850
851 printf SJM "WRITEBLKIO 0x%03x%08x +\n",$addr_hi,$addr_lo;
852 printf SJM " %s +\n",getRandData(16);
853 printf SJM " %s +\n",getRandData(16);
854 printf SJM " %s +\n",getRandData(16);
855 printf SJM " %s \n",getRandData(16);
856 return (1,5);
857}
858sub genCmdINT {
859 local $aid = $_[0];
860 local $tgt = rand(32);
861 local $addr_hi; # 15 bits [42:28]
862 local $addr_lo; # 28 bits [27:0]
863
864 $threadID = $int_tgt[int(rand(@int_tgt))];
865 $addr_hi = ($threadID << 8) | ($aid << 3);
866 $addr_lo = 0;
867
868 printf SJM "INT 0x%04x%07x +\n",$addr_hi,$addr_lo;
869 printf SJM " %s +\n",getRandData(16);
870 printf SJM " %s +\n",getRandData(16);
871 printf SJM " %s +\n",getRandData(16);
872 printf SJM " %s \n",getRandData(16);
873
874 return (1,6);
875}
876sub genCmdINTACK {
877 local $aid = $_[0];
878 local $ttype = 0x15;
879 local $addr = 0;
880 local $mask = 0;
881 local $adtype = 0xc0 | $aid << 2 | 0x0;
882
883 printf SJM "BUSERROR 0x%02x 0x%011x 0x%04x 0x%02x \n",
884 $ttype,$addr,$mask,$adtype;
885
886 return (1,1);
887}
888sub genCmdINTNACK {
889 local $aid = $_[0];
890 local $ttype = 0x16;
891 local $addr = 0;
892 local $mask = 0;
893 local $adtype = 0xc0 | $aid << 2 | 0x0;
894
895 printf SJM "BUSERROR 0x%02x 0x%011x 0x%04x 0x%02x \n",
896 $ttype,$addr,$mask,$adtype;
897
898 return (1,1);
899}
900sub genCmdXIR {
901 local $aid = $_[0];
902 local $ttype = 0x17;
903 local $addr = 0;
904 local $mask = 0;
905 local $adtype = 0xc0 | $aid << 2 | 0x0;
906
907 #printf SJM "BUSERROR 0x%02x 0x%011x 0x%04x 0x%02x \n",
908 # $ttype,$addr,$mask,$adtype;
909 printf SJM "XIR \n";
910
911 return (1,1);
912}
913sub genCmdCHANGE {
914 local $aid = $_[0];
915 local $ttype = 0x1a;
916 local $addr = 0;
917 local $mask = 0;
918 local $adtype = 0xc0 | $aid << 2 | 0x0;
919 local $i;
920
921 printf SJM "BUSERROR 0x%02x 0x%011x 0x%04x 0x%02x multi\n",
922 $ttype,$addr,$mask,$adtype;
923 # Force IDLE Cycles after CHANGE
924 for ($i=0;$i<32;$i++) {
925 printf SJM "BUSERROR 0x%02x 0x%011x 0x%04x 0x%02x %s\n",0x1f,0x0,0x0,0xff,($i<31) ? "multi " : "";
926 }
927
928 return (1,33);
929}
930sub genCmdRSVD {
931 local $aid = $_[0];
932 local $ttype = $rsvd_ttypes[rand(@rsvd_ttypes)];
933 local $addr = 0;
934 local $mask = 0;
935 local $adtype = 0xc0 | $aid << 2 | 0x0;
936
937 printf SJM "BUSERROR 0x%02x 0x%011x 0x%04x 0x%02x \n",
938 $ttype,$addr,$mask,$adtype;
939
940 return (1,1);
941}
942sub genCmdIDLE {
943 local $ttype = 0x1f;
944 local $addr = 0;
945 local $mask = 0;
946 #local $adtype = 0xff;
947 local $adtype = 0xc0 | int(rand(64));
948
949 printf SJM "BUSERROR 0x%02x 0x%011x 0x%04x 0x%02x \n",
950 $ttype,$addr,$mask,$adtype;
951
952 return (1,1);
953}
954sub genCmdDMA_WR {
955 local $idx = int(rand(@dma_size));
956 local $size = $dma_size[$idx];
957 local $addr_hi = $dma_addr_hi[$idx];
958 local $addr_lo = $dma_addr_lo[$idx];
959 local $be_hi;
960 local $be_lo;
961 local $start;
962 local $end;
963 local $txn_cnt = 0;
964 local $cyc_cnt = 0;
965
966 printf SJM "# DMA_WR addr: 0x%03x%08x size: %0x\n",$addr_hi,$addr_lo,$size;
967 $start = $addr_lo & 0x3f;
968 $end = 64;
969 if ($start != 0) {
970 ($be_hi,$be_lo) = byteMask($start,$end);
971 printf SJM "WRITEMSK 0x%03x%08x 0x%08x%08x +\n",$addr_hi,$addr_lo,$be_hi,$be_lo;
972 printf SJM " %s +\n",getRandData(16);
973 printf SJM " %s +\n",getRandData(16);
974 printf SJM " %s +\n",getRandData(16);
975 printf SJM " %s \n",getRandData(16);
976 $size -= (64-$start);
977 $addr_lo += (64-$start);
978 $txn_cnt += 1;
979 $cyc_cnt += 5;
980
981 $wait = $opt_burst_min_wait + int(rand($opt_burst_max_wait-$opt_burst_min_wait));
982 printf SJM "WAIT $wait \n\n";
983 $cyc_cnt += $wait;
984 }
985 while ($size >= 64) {
986 printf SJM "WRITEBLK 0x%03x%08x +\n", $addr_hi,$addr_lo;
987 printf SJM " %s +\n",getRandData(16);
988 printf SJM " %s +\n",getRandData(16);
989 printf SJM " %s +\n",getRandData(16);
990 printf SJM " %s \n",getRandData(16);
991 $size -= 64;
992 $addr_lo += 64;
993 $txn_cnt += 1;
994 $cyc_cnt += 5;
995
996 $wait = $opt_burst_min_wait + int(rand($opt_burst_max_wait-$opt_burst_min_wait));
997 printf SJM "WAIT $wait \n\n";
998 $cyc_cnt += $wait;
999 }
1000 $start = 0;
1001 $end = $size;
1002 if ($end != 0) {
1003 ($be_hi,$be_lo) = byteMask($start,$end);
1004 printf SJM "WRITEMSK 0x%03x%08x 0x%08x%08x +\n",$addr_hi,$addr_lo,$be_hi,$be_lo;
1005 printf SJM " %s +\n",getRandData(16);
1006 printf SJM " %s +\n",getRandData(16);
1007 printf SJM " %s +\n",getRandData(16);
1008 printf SJM " %s \n",getRandData(16);
1009 $size -= $end;
1010 $addr_lo += $end;
1011 $txn_cnt += 1;
1012 $cyc_cnt += 5;
1013 }
1014
1015 push @init_dma_size, $dma_size[$idx];
1016 push @init_dma_addr_hi, $dma_addr_hi[$idx];
1017 push @init_dma_addr_lo, $dma_addr_lo[$idx];
1018
1019 return ($txn_cnt,$cyc_cnt);
1020}
1021sub genCmdDMA_RD {
1022 local $txn_cnt = 0;
1023 local $cyc_cnt = 0;
1024 if (@init_dma_size == 0) {
1025 ($txn_cnt,$cyc_cnt) = genCmdDMA_WR();
1026 }
1027 local $idx = int(rand(@init_dma_size));
1028 local $size = $init_dma_size[$idx];
1029 local $addr_hi = $init_dma_addr_hi[$idx];
1030 local $addr_lo = $init_dma_addr_lo[$idx];
1031 local $start;
1032 local $end;
1033
1034 printf SJM "# DMA_RD addr: 0x%03x%08x size: %0x\n",$addr_hi,$addr_lo,$size;
1035 $start = $addr_lo & 0x3f;
1036 $end = 64;
1037 if ($start != 0) {
1038 ($be_hi,$be_lo) = byteMask($start,$end);
1039 printf SJM "RDBLK 0x%03x%08x \n",$addr_hi,$addr_lo;
1040 $size -= (64-$start);
1041 $addr_lo += (64-$start);
1042 $txn_cnt += 1;
1043 $cyc_cnt += 5;
1044
1045 $wait = $opt_burst_min_wait + int(rand($opt_burst_max_wait-$opt_burst_min_wait));
1046 printf SJM "WAIT $wait \n\n";
1047 $cyc_cnt += $wait;
1048 }
1049 while ($size >= 64) {
1050 printf SJM "RDBLK 0x%03x%08x \n", $addr_hi,$addr_lo;
1051 $size -= 64;
1052 $addr_lo += 64;
1053 $txn_cnt += 1;
1054 $cyc_cnt += 5;
1055
1056 $wait = $opt_burst_min_wait + int(rand($opt_burst_max_wait-$opt_burst_min_wait));
1057 printf SJM "WAIT $wait \n\n";
1058 $cyc_cnt += $wait;
1059 }
1060 $start = 0;
1061 $end = $size;
1062 if ($end != 0) {
1063 printf SJM "RDBLK 0x%03x%08x \n",$addr_hi,$addr_lo;
1064 $size -= $end;
1065 $addr_lo += $end;
1066 $txn_cnt += 1;
1067 $cyc_cnt += 5;
1068 }
1069 return ($txn_cnt,$cyc_cnt);
1070}
1071sub genCmdNCDMA_WR {
1072 local $idx = int(rand(@dma_size));
1073 local $size = $dma_size[$idx];
1074 local $addr_hi = $dma_addr_hi[$idx];
1075 local $addr_lo = $dma_addr_lo[$idx];
1076 local $be;
1077 local $start;
1078 local $end;
1079 local $txn_cnt = 0;
1080 local $cyc_cnt = 0;
1081
1082 printf SJM "# NCDMA_WR addr: 0x%03x%08x size: %0x\n",$addr_hi,$addr_lo,$size;
1083 # Prologue - NCWR
1084 while (($addr_lo & 0x3f) != 0) {
1085 if ((($addr_lo & 0xf) == 0) && ($size > 16)) {
1086 $start = 0;
1087 $end = 16;
1088 } else {
1089 $start = $addr_lo & 0xf;
1090 $end = ($start >= 8) ? 16 : 8;
1091 }
1092 $be = (0xffff << (16-$end)) & (0xffff >> $start);
1093 if ($opt_debug) {
1094 printf SJM "# NCDMA_WR: addr: 0x%03x_%08x start: %0d end: %0d be: 0x%04x\n",
1095 $addr_hi,$addr_lo,$start,$end,$be;
1096 }
1097 printf SJM "WRITEMSKIO 0x%03x%08x 0x%04x +\n",$addr_hi,$addr_lo,$be;
1098 printf SJM " %s \n",getRandData(16);
1099 $size -= ($end-$start);
1100 $addr_lo += ($end-$start);
1101 $txn_cnt += 1;
1102 $cyc_cnt += 2;
1103
1104 $wait = $opt_burst_min_wait + int(rand($opt_burst_max_wait-$opt_burst_min_wait));
1105 printf SJM "WAIT $wait \n\n";
1106 $cyc_cnt += $wait;
1107 }
1108 # Body - NCBWR
1109 while ($size >= 64) {
1110 printf SJM "WRITEBLKIO 0x%03x%08x +\n", $addr_hi,$addr_lo;
1111 printf SJM " %s +\n",getRandData(16);
1112 printf SJM " %s +\n",getRandData(16);
1113 printf SJM " %s +\n",getRandData(16);
1114 printf SJM " %s \n",getRandData(16);
1115 $size -= 64;
1116 $addr_lo += 64;
1117 $txn_cnt += 1;
1118 $cyc_cnt += 5;
1119
1120 $wait = $opt_burst_min_wait + int(rand($opt_burst_max_wait-$opt_burst_min_wait));
1121 printf SJM "WAIT $wait \n\n";
1122 $cyc_cnt += $wait;
1123 }
1124 # Epilogue - NCWR
1125 while ($size > 0) {
1126 if ((($addr_lo & 0xf) == 0) && ($size > 16)) {
1127 $start = 0;
1128 $end = 16;
1129 } else {
1130 $start = $addr_lo & 0xf;
1131 $end = ($size > 8) ? $start + 8 : $start + $size;
1132 }
1133 $be = (0xffff << (16-$end)) & (0xffff >> $start);
1134 if ($opt_debug) {
1135 printf SJM "# NCDMA_WR: addr: 0x%03x_%08x start: %0d end: %0d be: 0x%04x\n",
1136 $addr_hi,$addr_lo,$start,$end,$be;
1137 }
1138 printf SJM "WRITEMSKIO 0x%03x%08x 0x%04x +\n",$addr_hi,$addr_lo,$be;
1139 printf SJM " %s \n",getRandData(16);
1140 $size -= ($end-$start);
1141 $addr_lo += ($end-$start);
1142 $txn_cnt += 1;
1143 $cyc_cnt += 2;
1144
1145 $wait = $opt_burst_min_wait + int(rand($opt_burst_max_wait-$opt_burst_min_wait));
1146 printf SJM "WAIT $wait \n\n";
1147 $cyc_cnt += $wait;
1148 }
1149
1150 push @init_dma_size, $dma_size[$idx];
1151 push @init_dma_addr_hi, $dma_addr_hi[$idx];
1152 push @init_dma_addr_lo, $dma_addr_lo[$idx];
1153
1154 return ($txn_cnt,$cyc_cnt);
1155}
1156sub genCmdNCDMA_RD {
1157 local $txn_cnt = 0;
1158 local $cyc_cnt = 0;
1159 if (@init_dma_size == 0) {
1160 ($txn_cnt,$cyc_cnt) = genCmdNCDMA_WR();
1161 }
1162 local $idx = int(rand(@init_dma_size));
1163 local $size = $init_dma_size[$idx];
1164 local $addr_hi = $init_dma_addr_hi[$idx];
1165 local $addr_lo = $init_dma_addr_lo[$idx];
1166 local $be;
1167 local $start;
1168 local $end;
1169 local $txn_cnt = 0;
1170 local $cyc_cnt = 0;
1171
1172 printf SJM "# NCDMA_RD addr: 0x%03x%08x size: %0x\n",$addr_hi,$addr_lo,$size;
1173 # Prologue - NCRD
1174 while (($addr_lo & 0x3f) != 0) {
1175 if ((($addr_lo & 0xf) == 0) && ($size > 16)) {
1176 $start = 0;
1177 $end = 16;
1178 } else {
1179 $start = $addr_lo & 0xf;
1180 $end = ($start >= 8) ? 16 : 8;
1181 }
1182 $be = (0xffff << (16-$end)) & (0xffff >> $start);
1183 if ($opt_debug) {
1184 printf SJM "# NCDMA_RD: addr: 0x%03x_%08x start: %0d end: %0d be: 0x%04x\n",
1185 $addr_hi,$addr_lo,$start,$end,$be;
1186 }
1187 printf SJM "READMSKIO 0x%03x%08x 0x%04x \n",$addr_hi,$addr_lo,$be;
1188 $size -= ($end-$start);
1189 $addr_lo += ($end-$start);
1190 $txn_cnt += 1;
1191 $cyc_cnt += 2;
1192
1193 $wait = $opt_burst_min_wait + int(rand($opt_burst_max_wait-$opt_burst_min_wait));
1194 printf SJM "WAIT $wait \n\n";
1195 $cyc_cnt += $wait;
1196 }
1197 # Body - NCBRD
1198 while ($size >= 64) {
1199 printf SJM "READBLKIO 0x%03x%08x \n", $addr_hi,$addr_lo;
1200 $size -= 64;
1201 $addr_lo += 64;
1202 $txn_cnt += 1;
1203 $cyc_cnt += 5;
1204
1205 $wait = $opt_burst_min_wait + int(rand($opt_burst_max_wait-$opt_burst_min_wait));
1206 printf SJM "WAIT $wait \n\n";
1207 $cyc_cnt += $wait;
1208 }
1209 # Epilogue - NCRD
1210 while ($size > 0) {
1211 if ((($addr_lo & 0xf) == 0) && ($size > 16)) {
1212 $start = 0;
1213 $end = 16;
1214 } else {
1215 $start = $addr_lo & 0xf;
1216 $end = ($size > 8) ? $start + 8 : $start + $size;
1217 }
1218 $be = (0xffff << (16-$end)) & (0xffff >> $start);
1219 if ($opt_debug) {
1220 printf SJM "# NCDMA_RD: addr: 0x%03x_%08x start: %0d end: %0d be: 0x%04x\n",
1221 $addr_hi,$addr_lo,$start,$end,$be;
1222 }
1223 printf SJM "READMSK 0x%03x%08x 0x%04x +\n",$addr_hi,$addr_lo,$be;
1224 printf SJM " %s \n",getRandData(16);
1225 $size -= ($end-$start);
1226 $addr_lo += ($end-$start);
1227 $txn_cnt += 1;
1228 $cyc_cnt += 2;
1229
1230 $wait = $opt_burst_min_wait + int(rand($opt_burst_max_wait-$opt_burst_min_wait));
1231 printf SJM "WAIT $wait \n\n";
1232 $cyc_cnt += $wait;
1233 }
1234 return ($txn_cnt,$cyc_cnt);
1235}
1236sub genCmdNCWR_UE {
1237 local $aid = $_[0];
1238 local $ttype = 0x12;
1239 local $mask = 0;
1240 local $idx = int(rand(@nc_addr_lo));
1241 local $addr_hi = $nc_addr_hi[$idx];
1242 local $addr_lo = $nc_addr_lo[$idx];
1243 local $adtype = 0xc0 | $aid << 2 | 0x0;
1244 local $type = wt_random_hash(%opt_wt_nc_be);
1245 local $size = wt_random_hash(%opt_wt_nc_size);
1246 local $start = 0;
1247 local $end = 0;
1248
1249 if ($type eq "ZERO") {
1250 $mask = 0;
1251 } elsif ($type eq "ALIGN") {
1252 $addr_lo = alignAddr($addr_lo,$nc_size_align{$size});
1253 $start = $addr_lo & 0xf;
1254 $end = $start+$size;
1255 $mask = (0xffff << (16-$end)) & (0xffff >> $start);
1256 } elsif ($type eq "CONT") {
1257 $start = $addr_lo & 0xf;
1258 $end = $start+int(rand(16-$start))+1;
1259 $mask = (0xffff << (16-$end)) & (0xffff >> $start);
1260 } elsif ($type eq "RAND") {
1261 $mask = int(rand(0x10000));
1262 }
1263 if ($opt_debug) {
1264 printf SJM "# NCWR_UE type: %s addr: 0x%03x_%08x size: %0d start: %0d end: %0d be: 0x%04x\n",
1265 $type,$addr_hi,$addr_lo,$size,$start,$end,$mask;
1266 }
1267 # NCWR Addr
1268 printf SJM "BUSERROR 0x%02x 0x%03x%08x 0x%04x 0x%02x multi\n",
1269 $ttype,$addr_hi,$addr_lo,$mask,$adtype;
1270 # NCWR Data
1271 $ttype = ($opt_data_rand) ? int(rand(0x100)) : ($opt_data_pattern & 0xff);
1272 $addr_hi = ($opt_data_rand) ? int(rand(0x1000)) : ($opt_data_pattern & 0xfff);
1273 $addr_lo = ($opt_data_rand) ? int(rand(0xffffffff)) : ($opt_data_pattern & 0xffffffff);
1274 $mask = ($opt_data_rand) ? int(rand(0x10000)) : ($opt_data_pattern & 0xffff);
1275 $adtype = 0x10;
1276 printf SJM "BUSERROR 0x%02x 0x%03x%08x 0x%04x 0x%02x \n",
1277 $ttype,$addr_hi,$addr_lo,$mask,$adtype;
1278
1279 return (1,2);
1280}
1281sub genCmdNCBWR_UE {
1282 local $aid = $_[0];
1283 local $ttype = 0x13;
1284 local $mask = 0;
1285 local $idx = int(rand(@nc_addr_lo));
1286 local $addr_hi = $nc_addr_hi[$idx];
1287 local $addr_lo = $nc_addr_lo[$idx];
1288 local $adtype = 0xc0 | $aid << 2 | 0x0;
1289 local $i;
1290
1291 # NCBWR Addr
1292 printf SJM "BUSERROR 0x%02x 0x%03x%08x 0x%04x 0x%02x multi\n",
1293 $ttype,$addr_hi,$addr_lo,$mask,$adtype;
1294 # NCBWR Data
1295 $ue_err_cyc = int(rand(4));
1296 for ($i=0;$i<4;$i++) {
1297 $ttype = ($opt_data_rand) ? int(rand(0x100)) : ($opt_data_pattern & 0xff);
1298 $addr_hi = ($opt_data_rand) ? int(rand(0x1000)) : ($opt_data_pattern & 0xfff);
1299 $addr_lo = ($opt_data_rand) ? int(rand(0xffffffff)) : ($opt_data_pattern & 0xffffffff);
1300 $mask = ($opt_data_rand) ? int(rand(0x10000)) : ($opt_data_pattern & 0xffff);
1301 $adtype = (($i == $ue_err_cyc) || (int(rand(10)) == 0)) ? 0x10 : 0x00;
1302 printf SJM "BUSERROR 0x%02x 0x%03x%08x 0x%04x 0x%02x %s\n",
1303 $ttype,$addr_hi,$addr_lo,$mask,$adtype,($i==3) ? " " : "multi";
1304 }
1305
1306 return (1,5);
1307}
1308sub genCmdWRI_UE {
1309 local $aid = $_[0];
1310 local $ttype = 0x0e;
1311 local $mask = 0;
1312 local $idx = int(rand(@mem_addr_lo));
1313 local $addr_hi = $mem_addr_hi[$idx];
1314 local $addr_lo = $mem_addr_lo[$idx];
1315 local $adtype = 0xc0 | $aid << 2 | 0x0;
1316 local $i;
1317
1318 # WRI Addr
1319 printf SJM "BUSERROR 0x%02x 0x%03x%08x 0x%04x 0x%02x multi\n",
1320 $ttype,$addr_hi,$addr_lo,$mask,$adtype;
1321 # WRI Data
1322 $ue_err_cyc = int(rand(4));
1323 for ($i=0;$i<4;$i++) {
1324 $ttype = ($opt_data_rand) ? int(rand(0x100)) : ($opt_data_pattern & 0xff);
1325 $addr_hi = ($opt_data_rand) ? int(rand(0x1000)) : ($opt_data_pattern & 0xfff);
1326 $addr_lo = ($opt_data_rand) ? int(rand(0xffffffff)) : ($opt_data_pattern & 0xffffffff);
1327 $mask = ($opt_data_rand) ? int(rand(0x10000)) : ($opt_data_pattern & 0xffff);
1328 $adtype = (($i == $ue_err_cyc) || (int(rand(10)) == 0)) ? 0x10 : 0x00;
1329 printf SJM "BUSERROR 0x%02x 0x%03x%08x 0x%04x 0x%02x %s\n",
1330 $ttype,$addr_hi,$addr_lo,$mask,$adtype,($i==3) ? " " : "multi";
1331 }
1332
1333 return (1,5);
1334}
1335sub genCmdWRIS_UE {
1336 local $aid = $_[0];
1337 local $ttype = 0x0f;
1338 local $mask = 0;
1339 local $idx = int(rand(@mem_addr_lo));
1340 local $addr_hi = $mem_addr_hi[$idx];
1341 local $addr_lo = $mem_addr_lo[$idx];
1342 local $adtype = 0xc0 | $aid << 2 | 0x0;
1343 local $i;
1344
1345 # WRIS Addr
1346 printf SJM "BUSERROR 0x%02x 0x%03x%08x 0x%04x 0x%02x multi\n",
1347 $ttype,$addr_hi,$addr_lo,$mask,$adtype;
1348 # WRIS Data
1349 $ue_err_cyc = int(rand(4));
1350 for ($i=0;$i<4;$i++) {
1351 $ttype = ($opt_data_rand) ? int(rand(0x100)) : ($opt_data_pattern & 0xff);
1352 $addr_hi = ($opt_data_rand) ? int(rand(0x1000)) : ($opt_data_pattern & 0xfff);
1353 $addr_lo = ($opt_data_rand) ? int(rand(0xffffffff)) : ($opt_data_pattern & 0xffffffff);
1354 $mask = ($opt_data_rand) ? int(rand(0x10000)) : ($opt_data_pattern & 0xffff);
1355 $adtype = (($i == $ue_err_cyc) || (int(rand(10)) == 0)) ? 0x10 : 0x00;
1356 printf SJM "BUSERROR 0x%02x 0x%03x%08x 0x%04x 0x%02x %s\n",
1357 $ttype,$addr_hi,$addr_lo,$mask,$adtype,($i==3) ? " " : "multi";
1358 }
1359
1360 return (1,5);
1361}
1362sub genCmdWRM_UE {
1363 local $aid = $_[0];
1364 local $ttype = 0x0b;
1365 local $mask = 0;
1366 local $idx = int(rand(@mem_addr_lo));
1367 local $addr_hi = $mem_addr_hi[$idx];
1368 local $addr_lo = $mem_addr_lo[$idx];
1369 local $adtype = 0xc0 | $aid << 2 | 0x0;
1370 local $i;
1371
1372 # WRM Addr
1373 printf SJM "BUSERROR 0x%02x 0x%03x%08x 0x%04x 0x%02x multi\n",
1374 $ttype,$addr_hi,$addr_lo,$mask,$adtype;
1375 # WRM Data
1376 $ue_err_cyc = int(rand(4));
1377 for ($i=0;$i<4;$i++) {
1378 $ttype = ($opt_data_rand) ? int(rand(0x100)) : ($opt_data_pattern & 0xff);
1379 $addr_hi = ($opt_data_rand) ? int(rand(0x1000)) : ($opt_data_pattern & 0xfff);
1380 $addr_lo = ($opt_data_rand) ? int(rand(0xffffffff)) : ($opt_data_pattern & 0xffffffff);
1381 $mask = ($opt_data_rand) ? int(rand(0x10000)) : ($opt_data_pattern & 0xffff);
1382 $adtype = (($i == $ue_err_cyc) || (int(rand(10)) == 0)) ? 0x10 : 0x00;
1383 printf SJM "BUSERROR 0x%02x 0x%03x%08x 0x%04x 0x%02x %s\n",
1384 $ttype,$addr_hi,$addr_lo,$mask,$adtype,($i==3) ? " " : "multi";
1385 }
1386
1387 return (1,5);
1388}
1389sub genCmdUNEXP_DR16 {
1390 local $aid = int(rand(4));
1391 local $tid = int(rand(4));
1392 local $adtype = 0x80 | $aid << 2 | $tid;
1393 local $mask = ($opt_data_rand) ? int(rand(0x10000)) : ($opt_data_pattern & 0xffff);
1394 local $ttype = ($opt_data_rand) ? int(rand(0x100)) : ($opt_data_pattern & 0x1f);
1395 local $addr_hi = ($opt_data_rand) ? int(rand(0x1000)) : ($opt_data_pattern & 0xfff);
1396 local $addr_lo = ($opt_data_rand) ? int(rand(0xffffffff)) : ($opt_data_pattern & 0xffffffff);
1397
1398 # UNEXP_DR16 (Read16)
1399 printf SJM "BUSERROR 0x%02x 0x%03x%08x 0x%04x 0x%02x\n",
1400 $ttype,$addr_hi,$addr_lo,$mask,$adtype;
1401
1402 return (1,1);
1403}
1404sub genCmdUNEXP_DR64 {
1405 local $aid = int(rand(4));
1406 local $tid = int(rand(4));
1407 local $adtype = 0x40 | $aid << 2 | $tid;
1408 local $mask = ($opt_data_rand) ? int(rand(0x10000)) : ($opt_data_pattern & 0xffff);
1409 local $ttype = ($opt_data_rand) ? int(rand(0x100)) : ($opt_data_pattern & 0x1f);
1410 local $addr_hi = ($opt_data_rand) ? int(rand(0x1000)) : ($opt_data_pattern & 0xfff);
1411 local $addr_lo = ($opt_data_rand) ? int(rand(0xffffffff)) : ($opt_data_pattern & 0xffffffff);
1412
1413 # UNEXP_DR64 (Read64)
1414 printf SJM "BUSERROR 0x%02x 0x%03x%08x 0x%04x 0x%02x multi\n",
1415 $ttype,$addr_hi,$addr_lo,$mask,$adtype;
1416 for ($i=1;$i<4;$i++) {
1417 $adtype = 0x00;
1418 $ttype = ($opt_data_rand) ? int(rand(0x100)) : ($opt_data_pattern & 0xff);
1419 $addr_hi = ($opt_data_rand) ? int(rand(0x1000)) : ($opt_data_pattern & 0xfff);
1420 $addr_lo = ($opt_data_rand) ? int(rand(0xffffffff)) : ($opt_data_pattern & 0xffffffff);
1421 $mask = ($opt_data_rand) ? int(rand(0x10000)) : ($opt_data_pattern & 0xffff);
1422 printf SJM "BUSERROR 0x%02x 0x%03x%08x 0x%04x 0x%02x %s\n",
1423 $ttype,$addr_hi,$addr_lo,$mask,$adtype,($i==3) ? " " : "multi";
1424 }
1425 return (1,4);
1426}
1427sub genCmdNONEX_RD {
1428 local $nonex_rd_type = int(rand(4));
1429
1430 if ($nonex_rd_type == 0) {
1431 genCmdNONEX_RD_MEM_NC();
1432 } elsif ($nonex_rd_type == 1) {
1433 genCmdNONEX_RD_NC_MEM();
1434 } else {
1435 genCmdNONEX_RD_MEMSIZE();
1436 }
1437}
1438sub genCmdNONEX_WR {
1439 local $nonex_wr_type = int(rand(4));
1440
1441 if ($nonex_wr_type == 0) {
1442 genCmdNONEX_WR_MEM_NC();
1443 } elsif ($nonex_wr_type == 1) {
1444 genCmdNONEX_WR_NC_MEM();
1445 } else {
1446 genCmdNONEX_WR_MEMSIZE();
1447 }
1448}
1449sub genCmdNONEX_RD_MEMSIZE {
1450 local $offset = int(rand(128-$opt_max_mem)) + $opt_max_mem;
1451 local $addr_hi = $offset >> 2;
1452 local $addr_lo = ($offset & 0x3) << 30 | int(rand(0x3fffffff));
1453 local $nc_mem = int(rand(2));
1454 local $type = wt_random_hash(%opt_wt_nc_be);
1455 local $size = wt_random_hash(%opt_wt_nc_size);
1456
1457 # NONEX_RD (addr > MEMSIZE)
1458 if ($nc_mem == 0) {
1459 if ($opt_align_rd_64b) {
1460 $addr_lo = alignAddr($addr_lo,6);
1461 }
1462 printf SJM "READBLK 0x%03x%08x\n",$addr_hi,$addr_lo;
1463 } else {
1464 $addr_hi = $addr_hi | 0x600;
1465 printf SJM "READIO 0x%03x%08x %d\n",$addr_hi,alignAddr($addr_lo,$nc_size_align{$size}),$size;
1466 }
1467
1468 return (1,2);
1469}
1470sub genCmdNONEX_RD_NC_MEM {
1471 local $idx = int(rand(@mem_addr_lo));
1472 local $addr_hi = $mem_addr_hi[$idx];
1473 local $addr_lo = $mem_addr_lo[$idx];
1474 local $type = wt_random_hash(%opt_wt_nc_be);
1475 local $size = wt_random_hash(%opt_wt_nc_size);
1476
1477 # NONEX_RD (NCRD to MEM Space)
1478 printf SJM "READIO 0x%03x%08x %d\n",$addr_hi,alignAddr($addr_lo,$nc_size_align{$size}),$size;
1479
1480 return (1,2);
1481}
1482sub genCmdNONEX_RD_MEM_NC {
1483 local $idx = int(rand(@mem_addr_lo));
1484 local $addr_hi = $mem_addr_hi[$idx];
1485 local $addr_lo = $mem_addr_lo[$idx];
1486 #local $nctype = int(rand(3));
1487 local $nctype = int(rand(2));
1488 local $aid = int(rand(4));
1489
1490 # NONEX_RD (RD* to NC Space)
1491 # nctype = 0: Fake DMA
1492 # nctype = 1: 64GB NC
1493 # nctype = 2: 8MB NC
1494 # Workaround for Bug5391 - exclude 8MB NC space
1495 if ($nctype == 0) {
1496 $addr_hi = $addr_hi | 0x600;
1497 } elsif ($nctype == 1) {
1498 $addr_hi = $addr_hi | 0x600 | $aid << 4;
1499 #} elsif ($nctype == 2) {
1500 # $addr_lo = ($addr_lo & 0x7fffff) | $aid << 23;
1501 # $addr_hi = 0x400;
1502 }
1503
1504 if ($opt_align_rd_64b) {
1505 $addr_lo = alignAddr($addr_lo,6);
1506 }
1507 printf SJM "READBLK 0x%03x%08x\n",$addr_hi,$addr_lo;
1508 return (1,2);
1509}
1510sub genCmdNONEX_WR_MEMSIZE {
1511 local $offset = int(rand(128-$opt_max_mem)) + $opt_max_mem;
1512 local $addr_hi = $offset >> 2;
1513 local $addr_lo = ($offset & 0x3) << 30 | int(rand(0x3fffffff));
1514 local $nc_mem = int(rand(2));
1515 local $type = wt_random_hash(%opt_wt_nc_be);
1516 local $size = wt_random_hash(%opt_wt_nc_size);
1517
1518 # NONEX_WR (addr > MEMSIZE)
1519 if ($nc_mem == 0) {
1520 $addr_lo = alignAddr($addr_lo,6);
1521 printf SJM "WRITEBLK 0x%03x%08x +\n",$addr_hi,$addr_lo;
1522 printf SJM " %s +\n",getRandData(16);
1523 printf SJM " %s +\n",getRandData(16);
1524 printf SJM " %s +\n",getRandData(16);
1525 printf SJM " %s \n",getRandData(16);
1526 return (1,5);
1527 } else {
1528 $addr_hi = $addr_hi | 0x600;
1529 printf SJM "WRITEIO 0x%03x%08x %d %s\n",$addr_hi,alignAddr($addr_lo,$nc_size_align{$size}),$size,getRandData($size);
1530 return (1,2);
1531 }
1532
1533}
1534sub genCmdNONEX_WR_NC_MEM {
1535 local $idx = int(rand(@mem_addr_lo));
1536 local $addr_hi = $mem_addr_hi[$idx];
1537 local $addr_lo = $mem_addr_lo[$idx];
1538 local $type = wt_random_hash(%opt_wt_nc_be);
1539 local $size = wt_random_hash(%opt_wt_nc_size);
1540
1541 # NONEX_WR (NCWR to MEM Space)
1542 printf SJM "WRITEIO 0x%03x%08x %d %s\n",$addr_hi,alignAddr($addr_lo,$nc_size_align{$size}),$size,getRandData($size);
1543
1544 return (1,2);
1545}
1546sub genCmdNONEX_WR_MEM_NC {
1547 local $idx = int(rand(@mem_addr_lo));
1548 local $addr_hi = $mem_addr_hi[$idx];
1549 local $addr_lo = $mem_addr_lo[$idx];
1550 local $nctype = int(rand(3));
1551 local $aid = int(rand(4));
1552
1553 # NONEX_WR (WR* to NC Space)
1554 # nctype = 0: Fake DMA
1555 # nctype = 1: 8MB NC
1556 # nctype = 2: 64GB NC
1557 if ($nctype == 0) {
1558 $addr_hi = $addr_hi | 0x600;
1559 } elsif ($nctype == 1) {
1560 $addr_lo = ($addr_lo & 0x7fffff) | $aid << 23;
1561 $addr_hi = 0x400;
1562 } elsif ($nctype == 2) {
1563 $addr_hi = $addr_hi | 0x600 | $aid << 4;
1564 }
1565
1566 if ($opt_align_rd_64b) {
1567 $addr_lo = alignAddr($addr_lo,6);
1568 }
1569 printf SJM "WRITEBLK 0x%03x%08x +\n",$addr_hi,$addr_lo;
1570 printf SJM " %s +\n",getRandData(16);
1571 printf SJM " %s +\n",getRandData(16);
1572 printf SJM " %s +\n",getRandData(16);
1573 printf SJM " %s \n",getRandData(16);
1574 return (1,5);
1575}
1576sub genCmdFATAL {
1577 local $count;
1578
1579 if (int(rand(2)) == 1) {
1580 $count = 4;
1581 } else {
1582 $count = int(rand(3)) + 1;
1583 }
1584 printf SJM "DOK ON %d\n",$count;
1585
1586 return (1,$count);
1587}
1588# Generate SJM Command File
1589sub genSjmFile {
1590 local $mem_space_cnt;
1591 local $nc_space_cnt;
1592
1593 $sjm_num = $_[0];
1594 $sjm_fname = "sjm_".$sjm_num.".cmd";
1595 open (SJM,">$sjm_fname") || die "Unable to open file $sjm_fname";
1596
1597 print "Generating SJM Command File $sjm_fname \n";
1598
1599 # Generate addresses
1600 print "Generating Addresses\n";
1601 if (@mem_base > 0) {
1602 for ($i=0;$i<$opt_num_mem_addrs;$i++) {
1603 $mem_space = wt_random(@mem_wt);
1604 $mem_space_cnt[$mem_space]++;
1605 ($mem_addr_hi[$i],$mem_addr_lo[$i]) = genRandAddr($mem_base[$mem_space],$mem_size[$mem_space]);
1606 }
1607 }
1608 if (@nc_base > 0) {
1609 for ($i=0;$i<$opt_num_nc_addrs;$i++) {
1610 $nc_space = wt_random(@nc_wt);
1611 $nc_space_cnt[$nc_space]++;
1612 ($nc_addr_hi[$i],$nc_addr_lo[$i]) = genRandAddr($nc_base[$nc_space],$nc_size[$nc_space]);
1613 }
1614 }
1615
1616 # Generate DMA Blocks
1617 print "Generating DMA Blocks\n";
1618 if (@mem_base > 0) {
1619 for ($i=0;$i<$opt_num_dma_blks;$i++) {
1620 $dma_size[$i] = $opt_dma_min_size + int(rand($opt_dma_max_size-$opt_dma_min_size));
1621 $mem_space = wt_random(@mem_wt);
1622 $size = Math::BigInt->new($mem_size[$mem_space]);
1623 if ($size > $dma_size[$i]) {
1624 ($dma_addr_hi[$i],$dma_addr_lo[$i]) = genRandAddr($mem_base[$mem_space],($size-$dma_size[$i]));
1625 } else {
1626 $dma_size[$i] = $size;
1627 ($dma_addr_hi[$i],$dma_addr_lo[$i]) = genRandAddr($mem_base[$mem_space],0);
1628 }
1629 }
1630 }
1631
1632 # Generate file
1633 # Common Header
1634 print SJM "CONFIG id=$opt_config_id[$sjm_num] iosyncadr=$opt_config_iosyncadr[$sjm_num] \n";
1635 print SJM "\# SJM Command File $sjm_fname \n";
1636 print SJM "\# Seed: $opt_seed \n";
1637 print SJM "\# Memory Spaces: \n";
1638 for ($i=0;$i<@mem_base;$i++) {
1639 printf SJM "#\tMEM%0d: label: %-16s base: %15s size: %15s weight: %s\n",
1640 $i,$mem_label[$i],$mem_base[$i],$mem_size[$i],$mem_wt[$i];
1641 }
1642 print SJM "\# NC Spaces: \n";
1643 for ($i=0;$i<@nc_base;$i++) {
1644 printf SJM "#\tNC%0d: label: %-16s base: %15s size: %15s weight: %s\n",
1645 $i,$nc_label[$i],$nc_base[$i],$nc_size[$i],$nc_wt[$i];
1646 }
1647 print SJM "\# TXN weights: \n";
1648 while (($key,$value) = each(%wt_txn)) {
1649 printf SJM "#\t %6s : %0d \n",$key,$value;
1650 }
1651 print SJM "\# INT targets: @int_tgt \n";
1652 if ($opt_debug) {
1653 print_config(SJM);
1654 for ($i=0;$i<@mem_addr_lo;$i++) {
1655 printf SJM "# mem_addr[%02d] = 0x%03x_%08x\n",$i,$mem_addr_hi[$i],$mem_addr_lo[$i];
1656 }
1657 }
1658 print SJM "TIMEOUT $opt_timeout \n";
1659 print SJM "IOSYNC \n";
1660 print SJM "\n";
1661
1662 #ECCERROR commands for UE errors
1663 if ($opt_wt_mem_ue_err > 0) {
1664 print "Generating Memory ECCERRORs\n";
1665 for ($i=0;$i<@mem_addr_lo;$i++) {
1666 if ($opt_wt_mem_ue_err > int(rand(100))) {
1667 printf SJM "ECCERROR 0x%03x%08x uncorrect enable rand\n",$mem_addr_hi[$i],alignAddr($mem_addr_lo[$i],6);
1668 }
1669 }
1670 print SJM "\n";
1671 }
1672 if ($opt_wt_nc_ue_err > 0) {
1673 print "Generating NC ECCERRORs\n";
1674 for ($i=0;$i<@nc_addr_lo;$i++) {
1675 if ($opt_wt_nc_ue_err > int(rand(100))) {
1676 printf SJM "ECCERROR 0x%03x%08x uncorrect enable rand\n",$nc_addr_hi[$i],$nc_addr_lo[$i];
1677 }
1678 }
1679 print SJM "\n";
1680 }
1681
1682 #Init Mem/NC addrs
1683 if ($opt_init_mem) {
1684 print "Generating Memory Space Initialization\n";
1685 for ($i=0;$i<@mem_addr_lo;$i++) {
1686 printf SJM "WRITEBLK 0x%03x%08x +\n", $mem_addr_hi[$i],alignAddr($mem_addr_lo[$i],6);
1687 printf SJM " %s +\n",getRandData(16);
1688 printf SJM " %s +\n",getRandData(16);
1689 printf SJM " %s +\n",getRandData(16);
1690 printf SJM " %s \n",getRandData(16);
1691 }
1692 }
1693
1694 if ($opt_init_nc) {
1695 print "Generating NC Space Initialization\n";
1696 for ($i=0;$i<@nc_addr_lo;$i++) {
1697 printf SJM "WRITEBLKIO 0x%03x%08x +\n", $nc_addr_hi[$i],alignAddr($nc_addr_lo[$i],6);
1698 printf SJM " %s +\n",getRandData(16);
1699 printf SJM " %s +\n",getRandData(16);
1700 printf SJM " %s +\n",getRandData(16);
1701 printf SJM " %s \n",getRandData(16);
1702 }
1703 }
1704
1705 @init_dma_size = ();
1706 @init_dma_addr_hi = ();
1707 @init_dma_size = ();
1708 if ($opt_init_dma) {
1709 print "Generating DMA Block Initialization\n";
1710 for ($i=0;$i<@dma_addr_lo;$i++) {
1711 $addl = $dma_addr_lo[$i];
1712 $size = $dma_size[$i];
1713 while ($size > 0) {
1714 printf SJM "WRITEBLK 0x%03x%08x +\n", $dma_addr_hi[$i],$addl;
1715 printf SJM " %s +\n",getRandData(16);
1716 printf SJM " %s +\n",getRandData(16);
1717 printf SJM " %s +\n",getRandData(16);
1718 printf SJM " %s \n",getRandData(16);
1719 $size -= (64-($addl & 0x3f));
1720 $addl = alignAddr($addl,6) + 64;
1721 }
1722 push @init_dma_size, $dma_size[$i];
1723 push @init_dma_addr_hi, $dma_addr_hi[$i];
1724 push @init_dma_addr_lo, $dma_addr_lo[$i];
1725 }
1726 }
1727 # Generate JBUS TXN Commands
1728 print "Generating Transactions\n";
1729 $txn_cnt = 0;
1730 $cyc_cnt = 0;
1731 $rpt_cnt = 0;
1732 $burst_mode = 0;
1733 $burst_cnt = 0;
1734 while (($txn_cnt < $opt_max_num_txns) && ($cyc_cnt < $opt_max_num_cycles)) {
1735 # Repeat txn_type w/ -rpt_* switches
1736 if ($rpt_cnt == 0) {
1737 $txn_type = wt_random_hash(%wt_txn);
1738 if ($opt_rpt_wt > int(rand(100))) {
1739 $rpt_cnt = $opt_rpt_min + int(rand($opt_rpt_max-$opt_rpt_min));
1740 } else {
1741 $rpt_cnt = 0;
1742 }
1743 } else {
1744 $rpt_cnt--;
1745 }
1746 # Burst mode
1747 if ($opt_burst) {
1748 if ($burst_cnt == 0) {
1749 if ($burst_mode) {
1750 $burst_cnt = $opt_burst_min_interval + int(rand($opt_burst_max_interval-$opt_burst_min_interval));
1751 $burst_mode = 0;
1752 } else {
1753 $burst_cnt = $opt_burst_min_duration + int(rand($opt_burst_max_duration-$opt_burst_min_duration));
1754 $burst_mode = 1;
1755 }
1756 } else {
1757 $burst_cnt--;
1758 }
1759 } else {
1760 $burst_mode = 0;
1761 }
1762
1763 print SJM "# JBUS TXN: $txn_type \n";
1764
1765 $_ = $txn_type;
1766 $aid = $opt_config_id[$sjm_num];
1767 SWITCH: {
1768 /^RD$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdRD($aid); last SWITCH};
1769 /^RDD$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdRDD($aid); last SWITCH};
1770 /^RDS$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdRDS($aid); last SWITCH};
1771 /^RDSA$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdRDSA($aid); last SWITCH};
1772 /^RDO$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdRDO($aid); last SWITCH};
1773 /^OWN$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdOWN($aid); last SWITCH};
1774 /^INV$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdINV($aid); last SWITCH};
1775 /^NCWRC$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdNCWRC($aid); last SWITCH};
1776 /^WRM$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdWRM($aid); last SWITCH};
1777 /^WRB$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdWRB($aid); last SWITCH};
1778 /^WRBC$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdWRBC($aid); last SWITCH};
1779 /^WRI$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdWRI($aid); last SWITCH};
1780 /^WRIS$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdWRIS($aid); last SWITCH};
1781 /^NCRD$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdNCRD($aid); last SWITCH};
1782 /^NCBRD$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdNCBRD($aid); last SWITCH};
1783 /^NCWR$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdNCWR($aid); last SWITCH};
1784 /^NCBWR$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdNCBWR($aid); last SWITCH};
1785 /^INT$/ && do {
1786 if ($int_cnt[$sjm_num] < $opt_int_max[$sjm_num]) {
1787 ($inc_txn_cnt,$inc_cyc_cnt) = genCmdINT($aid);
1788 $int_cnt[$sjm_num]++;
1789 last SWITCH;
1790 } else {
1791 $inc_txn_cnt = 0; $inc_cyc_cnt = 0;
1792 }
1793 };
1794 /^INTACK$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdINTACK($aid); last SWITCH};
1795 /^INTNACK$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdINTNACK($aid); last SWITCH};
1796 /^XIR$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdXIR($aid); last SWITCH};
1797 /^CHANGE$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdCHANGE($aid); last SWITCH};
1798 /^RSVD$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdRSVD($aid); last SWITCH};
1799 /^IDLE$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdIDLE($aid); last SWITCH};
1800 /^DMA_WR$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdDMA_WR($aid); last SWITCH};
1801 /^DMA_RD$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdDMA_RD($aid); last SWITCH};
1802 /^NCDMA_WR$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdNCDMA_WR($aid);last SWITCH};
1803 /^NCDMA_RD$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdNCDMA_RD($aid);last SWITCH};
1804 /^NCWR_UE$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdNCWR_UE($aid); last SWITCH};
1805 /^NCBWR_UE$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdNCBWR_UE($aid); last SWITCH};
1806 /^WRI_UE$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdWRI_UE($aid); last SWITCH};
1807 /^WRIS_UE$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdWRIS_UE($aid); last SWITCH};
1808 /^WRM_UE$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdWRM_UE($aid); last SWITCH};
1809 /^UNEXP_DR16$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdUNEXP_DR16($aid); last SWITCH};
1810 /^UNEXP_DR64$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdUNEXP_DR64($aid); last SWITCH};
1811 /^NONEX_RD_MEMSIZE$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdNONEX_RD_MEMSIZE($aid); last SWITCH};
1812 /^NONEX_RD_NC_MEM$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdNONEX_RD_NC_MEM($aid); last SWITCH};
1813 /^NONEX_RD_MEM_NC$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdNONEX_RD_MEM_NC($aid); last SWITCH};
1814 /^NONEX_RD$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdNONEX_RD($aid); last SWITCH};
1815 /^NONEX_WR_MEMSIZE$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdNONEX_WR_MEMSIZE($aid); last SWITCH};
1816 /^NONEX_WR_NC_MEM$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdNONEX_WR_NC_MEM($aid); last SWITCH};
1817 /^NONEX_WR_MEM_NC$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdNONEX_WR_MEM_NC($aid); last SWITCH};
1818 /^NONEX_WR$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdNONEX_WR($aid); last SWITCH};
1819 /^FATAL$/ && do {($inc_txn_cnt,$inc_cyc_cnt) = genCmdFATAL($aid); last SWITCH};
1820 {$inc_txn_cnt = 0; $inc_cyc_cnt = 0;}
1821 }
1822 $txn_cnt += $inc_txn_cnt;
1823 $cyc_cnt += $inc_cyc_cnt;
1824
1825 if ($burst_mode) {
1826 $wait = $opt_burst_min_wait + int(rand($opt_burst_max_wait-$opt_burst_min_wait));
1827 } else {
1828 $wait = $opt_min_wait + int(rand($opt_max_wait-$opt_min_wait));
1829 }
1830 printf SJM "WAIT $wait \n\n";
1831 $cyc_cnt += $wait;
1832 }
1833
1834 # Sanity Check Weights
1835 if ($opt_debug) {
1836 #for ($i=0;$i<@mem_space_cnt;$i++) {
1837 # print SJM "# $opt_mem_label[$i] opt_mem_wt[$i]: $opt_mem_wt[$i] mem_space_cnt[$i]: $mem_space_cnt[$i] \n";
1838 #}
1839 #for ($i=0;$i<@nc_space_cnt;$i++) {
1840 # print SJM "# $opt_nc_label[$i] opt_nc_wt[$i]: $opt_nc_wt[$i] nc_space_cnt[$i]: $nc_space_cnt[$i] \n";
1841 #}
1842 #for ($i=0;$i<@mem_addr_lo;$i++) {
1843 # printf "# mem_addr[$i]: %03x%08x \n", $mem_addr_hi[$i],$mem_addr_lo[$i];
1844 #}
1845 #for ($i=0;$i<@nc_addr_lo;$i++) {
1846 # printf "nc_addr[$i]: %03x_%08x \n", $nc_addr_hi[$i],$nc_addr_lo[$i];
1847 #}
1848 }
1849
1850 close (SJM);
1851
1852 print "SJM Command File $sjm_fname - Done\n\n";
1853}
1854
1855#main program
1856
1857$PROG_NAME = $0;
1858
1859print "$PROG_NAME @ARGV \n";
1860
1861# include any -f=<file> options - append to ARGV
1862 for ($i = 0; $i < @ARGV; $i++) {
1863 if ($ARGV[$i] =~ /-f=.*/) {
1864 $fname = $ARGV[$i];
1865 $fname =~ s/-f=//;
1866 print "reading $fname: \n";
1867 open(INFILE,"$fname") || die "Unable to open file $fname";
1868 while (<INFILE>) {
1869 chomp;
1870 print "$_ \n";
1871 if ((/^[ \t]*\#/) || (/^[ \t]*$/)) {
1872 #ignore comment or blank lines
1873 } else {
1874 s/\.*$//;
1875 @NEWARGS=split(" ",$_);
1876 @ARGV=(@ARGV,@NEWARGS);
1877 }
1878 }
1879 close (INFILE);
1880 }
1881 }
1882
1883$rc = GetOptions (
1884 "sjm4!", \$opt_sjm4,
1885 "sjm5!", \$opt_sjm5,
1886 "tm4!", \$opt_tm4,
1887 "t|tm5!", \$opt_tm5,
1888 "seed=s", \$opt_seed,
1889 "debug", \$opt_debug,
1890 "n|max_num_txns=i", \$opt_max_num_txns,
1891 "max_num_cycles=i", \$opt_max_num_cycles,
1892 "min_wait=i", \$opt_min_wait,
1893 "max_wait=i", \$opt_max_wait,
1894 "rpt_wt=i", \$opt_rpt_wt,
1895 "rpt_min=i", \$opt_rpt_min,
1896 "rpt_max=i", \$opt_rpt_max,
1897 "burst!", \$opt_burst,
1898 "burst_min_wait=i", \$opt_burst_min_wait,
1899 "burst_max_wait=i", \$opt_burst_max_wait,
1900 "burst_min_duration=i", \$opt_burst_min_duration,
1901 "burst_max_duration=i", \$opt_burst_max_duration,
1902 "burst_min_interval=i", \$opt_burst_min_interval,
1903 "burst_max_interval=i", \$opt_burst_max_interval,
1904 "max_mem=i", \$opt_max_mem,
1905 "align_rd_64b!", \$opt_align_rd_64b,
1906 "align_wr_64b!", \$opt_align_wr_64b,
1907 "mem_default!", \$opt_mem_default,
1908 "nc_default!", \$opt_nc_default,
1909 "num_mem_addrs=i", \$opt_num_mem_addrs,
1910 "num_nc_addrs=i", \$opt_num_nc_addrs,
1911 "num_dma_blks=i", \$opt_num_dma_blks,
1912 "dma_min_size=i", \$opt_dma_min_size,
1913 "dma_max_size=i", \$opt_dma_max_size,
1914 "mem_label=s@",
1915 "mem_wt=s@",
1916 "mem_base=s@",
1917 "mem_size=s@",
1918 "nc_label=s@",
1919 "nc_wt=s@",
1920 "nc_base=s@",
1921 "nc_size=s@",
1922 "config_id4=s", \$opt_config_id[4],
1923 "config_id5=s", \$opt_config_id[5],
1924 "config_iosyncadr4=s", \$opt_config_iosyncadr[4],
1925 "config_iosyncadr5=s", \$opt_config_iosyncadr[5],
1926 "timeout=s", \$opt_timeout,
1927 "init_mem!", \$opt_init_mem,
1928 "init_nc!", \$opt_init_nc,
1929 "data_rand!", \$opt_data_rand,
1930 "data_pattern=s", \$opt_data_pattern,
1931 "txn_default!", \$opt_txn_default,
1932 "wt_txn_rd|wt_txn_RD=i", \$opt_wt_txn{RD},
1933 "wt_txn_rdd|wt_txn_RDD=i", \$opt_wt_txn{RDD},
1934 "wt_txn_rds|wt_txn_RDS=i", \$opt_wt_txn{RDS},
1935 "wt_txn_rdsa|wt_txn_RDSA=i", \$opt_wt_txn{RDSA},
1936 "wt_txn_rdo|wt_txn_RDO=i", \$opt_wt_txn{RDO},
1937 "wt_txn_own|wt_txn_OWN=i", \$opt_wt_txn{OWN},
1938 "wt_txn_inv|wt_txn_INV=i", \$opt_wt_txn{INV},
1939 "wt_txn_ncwrc|wt_txn_NCWRC=i", \$opt_wt_txn{NCWRC},
1940 "wt_txn_wrm|wt_txn_WRM=i", \$opt_wt_txn{WRM},
1941 "wt_txn_wrb|wt_txn_WRB=i", \$opt_wt_txn{WRB},
1942 "wt_txn_wrbc|wt_txn_WRBC=i", \$opt_wt_txn{WRBC},
1943 "wt_txn_wri|wt_txn_WRI=i", \$opt_wt_txn{WRI},
1944 "wt_txn_wris|wt_txn_WRIS=i", \$opt_wt_txn{WRIS},
1945 "wt_txn_ncrd|wt_txn_NCRD=i", \$opt_wt_txn{NCRD},
1946 "wt_txn_ncbrd|wt_txn_NCBRD=i", \$opt_wt_txn{NCBRD},
1947 "wt_txn_ncwr|wt_txn_NCWR=i", \$opt_wt_txn{NCWR},
1948 "wt_txn_ncbwr|wt_txn_NCBWR=i", \$opt_wt_txn{NCBWR},
1949 "wt_txn_int|wt_txn_INT=i", \$opt_wt_txn{INT},
1950 "wt_txn_intackk|wt_txn_INTACK=i", \$opt_wt_txn{INTACK},
1951 "wt_txn_intnack|wt_txn_INTNACK=i", \$opt_wt_txn{INTNACK},
1952 "wt_txn_xir|wt_txn_XIR=i", \$opt_wt_txn{XIR},
1953 "wt_txn_change|wt_txn_CHANGE=i", \$opt_wt_txn{CHANGE},
1954 "wt_txn_rsvd|wt_txn_RSVD=i", \$opt_wt_txn{RSVD},
1955 "wt_txn_idle|wt_txn_IDLE=i", \$opt_wt_txn{IDLE},
1956 "wt_txn_dma_wr|wt_txn_DMA_WR=i", \$opt_wt_txn{DMA_WR},
1957 "wt_txn_dma_rd|wt_txn_DMA_RD=i", \$opt_wt_txn{DMA_RD},
1958 "wt_txn_ncdma_wr|wt_txn_NCDMA_WR=i", \$opt_wt_txn{NCDMA_WR},
1959 "wt_txn_ncdma_rd|wt_txn_NCDMA_RD=i", \$opt_wt_txn{NCDMA_RD},
1960 "wt_txn_ncwr_ue|wt_txn_NCWR_UE=i", \$opt_wt_txn{NCWR_UE},
1961 "wt_txn_ncbwr_ue|wt_txn_NCBWR_UE=i", \$opt_wt_txn{NCBWR_UE},
1962 "wt_txn_wri_ue|wt_txn_WRI_UE=i", \$opt_wt_txn{WRI_UE},
1963 "wt_txn_wris_ue|wt_txn_WRIS_UE=i", \$opt_wt_txn{WRIS_UE},
1964 "wt_txn_wrm_ue|wt_txn_WRM_UE=i", \$opt_wt_txn{WRM_UE},
1965 "wt_txn_unexp_dr16|wt_txn_UNEXP_DR16=i", \$opt_wt_txn{UNEXP_DR16},
1966 "wt_txn_unexp_dr64|wt_txn_UNEXP_DR64=i", \$opt_wt_txn{UNEXP_DR64},
1967 "wt_txn_nonex_rd_memsize|wt_txn_NONEX_RD_MEMSIZE=i", \$opt_wt_txn{NONEX_RD_MEMSIZE},
1968 "wt_txn_nonex_rd_nc_mem|wt_txn_NONEX_RD_NC_MEM=i", \$opt_wt_txn{NONEX_RD_NC_MEM},
1969 "wt_txn_nonex_rd_mem_nc|wt_txn_NONEX_RD_MEM_NC=i", \$opt_wt_txn{NONEX_RD_MEM_NC},
1970 "wt_txn_nonex_rd|wt_txn_NONEX_RD=i", \$opt_wt_txn{NONEX_RD},
1971 "wt_txn_nonex_wr_memsize|wt_txn_NONEX_WR_MEMSIZE=i", \$opt_wt_txn{NONEX_WR_MEMSIZE},
1972 "wt_txn_nonex_wr_nc_mem|wt_txn_NONEX_WR_NC_MEM=i", \$opt_wt_txn{NONEX_WR_NC_MEM},
1973 "wt_txn_nonex_wr_mem_nc|wt_txn_NONEX_WR_MEM_NC=i", \$opt_wt_txn{NONEX_WR_MEM_NC},
1974 "wt_txn_nonex_wr|wt_txn_NONEX_WR=i", \$opt_wt_txn{NONEX_WR},
1975 "wt_txn_fatal|wt_txn_FATAL=i", \$opt_wt_txn{FATAL},
1976 "wt_nc_be_zero=i", \$opt_wt_nc_be{ZERO},
1977 "wt_nc_be_align=i", \$opt_wt_nc_be{ALIGN},
1978 "wt_nc_be_cont=i", \$opt_wt_nc_be{CONT},
1979 "wt_nc_be_rand=i", \$opt_wt_nc_be{RAND},
1980 "wt_nc_size1=i", \$opt_wt_nc_size{1},
1981 "wt_nc_size2=i", \$opt_wt_nc_size{2},
1982 "wt_nc_size4=i", \$opt_wt_nc_size{4},
1983 "wt_nc_size8=i", \$opt_wt_nc_size{8},
1984 "wt_nc_size16=i", \$opt_wt_nc_size{16},
1985 "wt_wrm_be_zero=i", \$opt_wt_wrm_be{ZERO},
1986 "wt_wrm_be_alt=i", \$opt_wt_wrm_be{ALT},
1987 "wt_wrm_be_cont=i", \$opt_wt_wrm_be{CONT},
1988 "wt_wrm_be_rand=i", \$opt_wt_wrm_be{RAND},
1989 "wt_l2_bank0=i", \$opt_wt_l2_bank[0],
1990 "wt_l2_bank1=i", \$opt_wt_l2_bank[1],
1991 "wt_l2_bank2=i", \$opt_wt_l2_bank[2],
1992 "wt_l2_bank3=i", \$opt_wt_l2_bank[3],
1993 "int_tgt=i@",
1994 "int_num_rand_tgt=i", \$opt_int_num_rand_tgt,
1995 "int_max4=i", \$opt_int_max[4],
1996 "int_max5=i", \$opt_int_max[5],
1997 "int_en=i", \$opt_int_en,
1998 "int_only!", \$opt_int_only,
1999 "wt_mem_ue_err=i", \$opt_wt_mem_ue_err,
2000 "wt_nc_ue_err=i", \$opt_wt_nc_ue_err,
2001 "h|u|help", \$opt_help,
2002 "f=s",
2003 );
2004
2005if (($opt_help) || ($rc == 0)) {
2006 usage();
2007}
2008
2009# Modify Options
2010# If I/O Bridge, no SJM
2011if ($opt_tm4) {
2012 $opt_sjm4 = 0;
2013}
2014if ($opt_tm5) {
2015 $opt_sjm5 = 0;
2016}
2017
2018# opt_max_mem -> max_mem
2019$max_mem = sprintf("0x%02x_%08x",$opt_max_mem >> 2,($opt_max_mem & 0x3)<<30);
2020
2021# Setup Memory Ranges
2022if (@opt_mem_base != @opt_mem_size) {
2023 die ("Mismatch in mem_base / mem_size \n");
2024} else {
2025 for ($i=0;$i<@opt_mem_base;$i++) {
2026 if (not defined $opt_mem_label[$i]) {$opt_mem_label[$i] = "MEM_space$i";}
2027 if (not defined $opt_mem_wt[$i]) {$opt_mem_wt[$i] = 100;}
2028 }
2029}
2030if ((@opt_mem_base == 0) || ($opt_mem_default)) {
2031 $mem_base[0] = 0;
2032 $mem_size[0] = $max_mem;
2033 $mem_label[0] = "DEFAULT";
2034 $mem_wt[0] = 100;
2035} else {
2036 @mem_base = @opt_mem_base;
2037 @mem_size = @opt_mem_size;
2038 @mem_label = @opt_mem_label;
2039 @mem_wt = @opt_mem_wt;
2040}
2041# Setup IO Ranges
2042if (@opt_nc_base != @opt_nc_size) {
2043 die ("Mismatch in nc_base / nc_size \n");
2044} else {
2045 for ($i=0;$i<@opt_nc_base;$i++) {
2046 if (not defined $opt_nc_label[$i]) {$opt_nc_label[$i] = "NC_space$i";}
2047 if (not defined $opt_nc_wt[$i]) {$opt_nc_wt[$i] = 100;}
2048 }
2049}
2050if ((@opt_nc_base == 0) || ($opt_nc_default)) {
2051 $i=0;
2052 $nc_base[$i] = "0x600_00000000";
2053 $nc_size[$i] = $max_mem;
2054 $nc_label[$i] = "FAKE_DMA";
2055 $nc_wt[$i++] = 200;
2056 if ($opt_sjm4) {
2057 $nc_base[$i] = sprintf "0x400_0%07X",$opt_config_id[4]<<23;
2058 $nc_size[$i] = "0x800000";
2059 $nc_label[$i] = sprintf "AID%X_NC_8MB",$opt_config_id[4];
2060 $nc_wt[$i++] = 20;
2061 $nc_base[$i] = sprintf "0x%03X_00000000",(0x60 + $opt_config_id[4])<<4;
2062 $nc_size[$i] = "0x10_00000000";
2063 $nc_label[$i] = sprintf "AID%X_NC_64GB",$opt_config_id[4];
2064 $nc_wt[$i++] = 80;
2065 }
2066 if ($opt_sjm5) {
2067 $nc_base[$i] = sprintf "0x400_0%07X",$opt_config_id[5]<<23;
2068 $nc_size[$i] = "0x800000";
2069 $nc_label[$i] = sprintf "AID%X_NC_8MB",$opt_config_id[5];
2070 $nc_wt[$i++] = 20;
2071 $nc_base[$i] = sprintf "0x%03X_00000000",(0x60 + $opt_config_id[5])<<4;
2072 $nc_size[$i] = "0x10_00000000";
2073 $nc_label[$i] = sprintf "AID%X_NC_64GB",$opt_config_id[5];
2074 $nc_wt[$i++] = 80;
2075 }
2076} else {
2077 @nc_base = @opt_nc_base;
2078 @nc_size = @opt_nc_size;
2079 @nc_label = @opt_nc_label;
2080 @nc_wt = @opt_nc_wt;
2081}
2082
2083# Setup wt_txn
2084if ($opt_txn_default) {
2085 while (($key,$value) = each(%default_wt_txn)) {
2086 $wt_txn{$key} = $value;
2087 }
2088}
2089while (($key,$value) = each(%opt_wt_txn)) {
2090 if (defined $value) {
2091 $wt_txn{$key} = $value;
2092 }
2093}
2094# Legacy int options
2095if ($opt_int_en == 0) {
2096 $wt_txn{INT} = 0;
2097}
2098if ($opt_int_only) {
2099 %wt_txn = ("INT" => 100);
2100 $opt_init_mem = 0;
2101 $opt_init_nc = 0;
2102}
2103
2104
2105# Print config options
2106if ($opt_debug) {
2107 print_config(STDOUT);
2108}
2109
2110# set random seed
2111if($opt_seed == 0){
2112 die ("sjm_tstgen.pl: No seed specified! Try -h option for usage.\n");
2113}else{
2114 if($opt_debug > 0) {
2115 print "Setting seed = $opt_seed\n";
2116 }
2117 srand($opt_seed);
2118}
2119
2120# Set up INT Targets
2121print "Generating Interrupt Targets\n";
2122if (@opt_int_tgt > 0) {
2123 @int_tgt = @opt_int_tgt;
2124} else {
2125 # generate random int tgt list
2126 for ($i=0;$i<32;$i++) {
2127 $int_list[$i] = $i;
2128 }
2129 for ($i=0;$i<$opt_int_num_rand_tgt;$i++) {
2130 $idx = int(rand(@int_list));
2131 $tgt = $int_list[$idx];
2132 $int_tgt[$i] = $tgt;
2133 splice @int_list,$idx,1;
2134 #print "idx: $idx tgt: $tgt int_tgt: @int_tgt int_list: @int_list\n";
2135 }
2136}
2137if ($opt_debug) {
2138 print "INT tgts: @int_tgt \n";
2139}
2140
2141# Generate SJM Command Files
2142if ($opt_sjm4) {
2143 genSjmFile(4);
2144}
2145
2146if ($opt_sjm5) {
2147 genSjmFile(5);
2148}
2149
2150print "Instruction Generation Complete\n";
2151
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