Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / tools / src / nas,5.n2.os.2 / home / common / common.simics
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1
2@SIM_set_prompt ("nas");
3
4// Machine configuration
5read-configuration "common.conf"
6
7#ifdef ELF
8load-kernel common.exe
9#else
10load-veri-file mem.image
11#endif // ifdef ELF
12
13#ifdef ONE_THREAD
14pdisable -all
15penable th00
16#elif defined(TWO_THREADS)
17pdisable -all
18penable th00
19penable th01
20#elif defined(FOUR_THREADS)
21pdisable -all
22penable th00
23penable th01
24penable th02
25penable th03
26#endif // ifdef ONE_THREAD
27
28// get symbol address
29@def get_addr(name):
30 cmd= "/usr/bin/perl -ne 'if(/%s\s+(\w+)/){ print$1;last}' symbol.tbl " % name
31 addr_str= os.popen(cmd, "r").readline();
32 if not addr_str:
33 addr = 0
34 else:
35 addr = string.atol(addr_str,16)
36 return addr
37
38// Script to single step simics
39//@def ss_n(thid, num) :
40// th_str= "l%d" % thid
41// while (num > 0) :
42// sstepi_cmd_RS(th_str)
43// num = num-1;
44
45// Script to step simics and print regs for N cycles
46//@def ss_and_pr(thid, num) :
47// th_str= "l%d" % thid
48// a_str = "-all"
49// while (num > 0) :
50// sstepi_cmd_RS(th_str)
51// pregs_cmd_RS(thid,a_str)
52// num = num-1;
53
54// riesling shortcut
55//@arch00 = rsys.getCpuPtr(0).getCorePtr(0).getStrandPtr(0).getArchStatePtr()
56//@mmu00 = rsys.getCpuPtr(0).getCorePtr(0).getStrandPtr(0).getMmuPtr()
57
58// if defined, step through instructions silently, also turn off all debugging
59// output.
60#ifdef STEP_QUIET
61@RS_set_quiet(1)
62@conf.socket0.setvar = "debug_level=0"
63@conf.socket0.setvar = "tlb_debug=0"
64@conf.swvmem0.setvar = "debug_level=0"
65#endif // ifdef STEP_QUIET
66
67#if defined(MOM)
68
69@conf.mom0.call= "init-anno-sas"
70@conf.mom0.setvar= "itlb0_size_v=0"
71@conf.mom0.setvar= "dtlb0_size_v=0"
72@conf.mom0.setvar= "SKIP_UNCACHED=0"
73@conf.mom0.setvar= "en_thrd_prio_v=0"
74
75#ifdef ONE_THREAD
76@conf.mom0.setvar= "thread_num_per_proc_v=1"
77@conf.mom0.setvar= "pipe_num_per_proc_v=1"
78#elif defined(TWO_THREADS)
79@conf.mom0.setvar= "thread_num_per_proc_v=2"
80#elif defined(FOUR_THREADS)
81@conf.mom0.setvar= "thread_num_per_proc_v=4"
82#else
83@conf.mom0.setvar= "thread_num_per_proc_v=8"
84#endif // ifdef ONE_THREAD
85
86#if defined(L15)
87@conf.mom0.setvar= "l15_cache_v=1"
88@conf.mom0.setvar= "l2_obuf_size_v=30"
89@conf.mom0.setvar= "l2_obuf_watermark_v=22"
90#endif // if defined(L15)
91
92#if defined(L15_RQ_FIRST_PACKET)
93@conf.mom0.setvar= "l15_rq_first_packet_v=1"
94#endif // if defined(L15_RQ_FIRST_PACKET)
95
96#if defined(L2_ALWAYS_HIT)
97@conf.mom0.setvar= "l2_always_hit_v=1"
98#endif // if defined(L2_ALWAYS_HIT)
99
100#if defined(SINGLE_IREFILL)
101@conf.mom0.setvar= "single_irefill_v=1"
102#endif // if defined(SINGLE_IREFILL)
103
104#if defined(FETCH_ACROSS_HALF_LINE)
105@conf.mom0.setvar= "fetch_across_half_line_v=1"
106#endif // if defined(FETCH_ACROSS_HALF_LINE)
107
108#if defined(MOM_RSLT)
109@conf.mom0.setvar= "PRINT_RSLT=1"
110#endif // if defined(MOM_RSLT)
111
112#if defined(MOM_SHOW_IB) || defined(MOM_DEBUG_PIPE)
113@conf.mom0.setvar= "DEBUG_PIPE=1"
114#endif // if defined(MOM_SHOW_IB) || defined(MOM_DEBUG_PIPE)
115
116#if defined(MOM_DEBUSSY)
117@conf.mom0.setvar= "DEBUG_DEBUSSY=1"
118#endif // if defined(MOM_DEBUSSY)
119
120#if defined(THREAD_STATUS_ADDR)
121@conf.mom0.thread_status= THREAD_STATUS_ADDR
122#endif // if defined(THREAD_STATUS_ADDR)
123
124#if defined(SP7)
125@conf.mom0.setvar= "proc_num_v=8"
126#elif defined(SP6)
127@conf.mom0.setvar= "proc_num_v=7"
128#elif defined(SP5)
129@conf.mom0.setvar= "proc_num_v=6"
130#elif defined(SP4)
131@conf.mom0.setvar= "proc_num_v=5"
132#elif defined(SP3)
133@conf.mom0.setvar= "proc_num_v=4"
134#elif defined(SP2)
135@conf.mom0.setvar= "proc_num_v=3"
136#elif defined(SP1)
137@conf.mom0.setvar= "proc_num_v=2"
138#elif defined(SP0)
139@conf.mom0.setvar= "proc_num_v=1"
140#endif // if defined(SP7)
141
142@conf.mom0.PASS= get_addr('\.TRAPS\.T0_GoodTrap_0x100')
143@conf.mom0.FAIL= get_addr('\.TRAPS\.T0_BadTrap_0x101')
144@conf.mom0.HPASS= get_addr('\.HTRAPS\.HT0_GoodTrap_0x100')
145@conf.mom0.HFAIL= get_addr('\.HTRAPS\.HT0_BadTrap_0x101')
146@conf.mom0.DC_ON= get_addr('mom_enable_l1d')
147@conf.mom0.DC_OFF= get_addr('mom_disable_l1d')
148@conf.mom0.IC_ON= get_addr('mom_enable_l1i')
149@conf.mom0.IC_OFF= get_addr('mom_disable_l1i')
150@conf.mom0.T1PASS= get_addr('\.RED\.good_trap')
151@conf.mom0.T1FAIL= get_addr('\.RED\.bad_trap')
152@conf.mom0.APASS= get_addr('\.RED\.good_trap')
153@conf.mom0.AFAIL= get_addr('\.RED\.bad_trap')
154
155#if defined(THREAD_MASK)
156penable -mask=THREAD_MASK
157@conf.mom0.setvar= thread_mask_v=THREAD_MASK
158#endif // if defined(THREAD_MASK)
159
160#if defined(MOM_STAT)
161@conf.mom0.setvar= "THREAD_BASED_STAT=1"
162@conf.mom0.setvar= "print_all_mom_stat=1"
163@conf.mom0.setvar= "START_SIM_IMM=1"
164@conf.mom0.start_cycle= 1
165run 200
166@conf.mom0.reset_all_stat= 1
167#else
168@conf.mom0.setvar= "START_SIM_IMM=1"
169@conf.mom0.start_cycle= 1
170#endif // if defined(MOM_STAT)
171
172
173#ifndef MOM_STEP
174#if defined(MAX_CYCLE)
175run MAX_CYCLE
176#else
177run 1000000
178#endif // if defined(MAX_CYCLE)
179quit
180#endif // ifndef MOM_STEP
181
182#else // if defined(MOM)
183
184#if defined(CPU)
185@conf.swvmem0.cpu = CPU
186#else
187@conf.swvmem0.cpu = 1
188#endif
189
190// intend to replace THREADS+SPx, THREAD_MASK=10xxxx01 is equivalent to
191// 'SP0 SP3 THREADS=10000001'
192#if defined(THREAD_MASK) || defined(THREAD_MASK1) || defined(THREAD_MASK2) || defined(THREAD_MASK3)
193
194#if defined(THREAD_MASK)
195@conf.swvmem0.thread_mask0 = THREAD_MASK
196#else
197@conf.swvmem0.thread_mask0 = 0
198#endif
199
200#if defined(THREAD_MASK1)
201@conf.swvmem0.thread_mask1 = THREAD_MASK1
202#else
203@conf.swvmem0.thread_mask1 = 0
204#endif
205
206#if defined(THREAD_MASK2)
207@conf.swvmem0.thread_mask2 = THREAD_MASK2
208#else
209@conf.swvmem0.thread_mask2 = 0
210#endif
211
212#if defined(THREAD_MASK3)
213@conf.swvmem0.thread_mask3 = THREAD_MASK3
214#else
215@conf.swvmem0.thread_mask3 = 0
216#endif
217
218#else
219
220// THREADS must work with SPx to set proper CMP registers
221#if defined(THREADS)
222@conf.swvmem0.threads = THREADS
223#endif
224
225#if defined(IGNORE_SP0) || !defined(SP0)
226@conf.swvmem0.ignore_sparc =+ 0
227#endif // if defined(IGNORE_SP0) || !defined(SP0)
228#if defined(IGNORE_SP1) || !defined(SP1)
229@conf.swvmem0.ignore_sparc =+ 1
230#endif // if defined(IGNORE_SP1) || !defined(SP1)
231#if defined(IGNORE_SP2) || !defined(SP2)
232@conf.swvmem0.ignore_sparc =+ 2
233#endif // if defined(IGNORE_SP2) || !defined(SP2)
234#if defined(IGNORE_SP3) || !defined(SP3)
235@conf.swvmem0.ignore_sparc =+ 3
236#endif // if defined(IGNORE_SP3) || !defined(SP3)
237#if defined(IGNORE_SP4) || !defined(SP4)
238@conf.swvmem0.ignore_sparc =+ 4
239#endif // if defined(IGNORE_SP4) || !defined(SP4)
240#if defined(IGNORE_SP5) || !defined(SP5)
241@conf.swvmem0.ignore_sparc =+ 5
242#endif // if defined(IGNORE_SP5) || !defined(SP5)
243#if defined(IGNORE_SP6) || !defined(SP6)
244@conf.swvmem0.ignore_sparc =+ 6
245#endif // if defined(IGNORE_SP6) || !defined(SP6)
246#if defined(IGNORE_SP7) || !defined(SP7)
247@conf.swvmem0.ignore_sparc =+ 7
248#endif // if defined(IGNORE_SP7) || !defined(SP7)
249
250#endif // if defined(THREAD_MASK)
251
252#if defined(THREAD_STATUS_ADDR)
253@conf.swvmem0.thread_status= THREAD_STATUS_ADDR
254#endif // if defined(THREAD_STATUS_ADDR)
255
256#if defined(SAS_RUN)
257
258//#if defined(THREAD_MASK)
259//penable -mask=THREAD_MASK
260//#else
261//pdisable -all
262//penable th00
263//#endif // if defined(THREAD_MASK)
264
265// we will rely on the good/bad_trap symbols in symbol.table to determine
266// proper good/bad trap setting
267//#if !defined(SAS_IACT) || !(defined(RTL) || defined(PLI_RUN))
268//// set the breakpoints only in interactive mode or batch mode
269////@conf.swvmem0.good_trap =+ get_addr('\.TRAPS\.T0_GoodTrap_0x100')
270////@conf.swvmem0.good_trap =+ get_addr('\.TRAPS\.T1_GoodTrap_0x100')
271////@conf.swvmem0.good_trap =+ get_addr('\.HTRAPS\.HT0_GoodTrap_0x100')
272////@conf.swvmem0.good_trap =+ get_addr('\.HTRAPS\.HT0_GoodTrap_0x1a0')
273////@conf.swvmem0.bad_trap =+ get_addr('\.TRAPS\.T0_BadTrap_0x101')
274////@conf.swvmem0.bad_trap =+ get_addr('\.TRAPS\.T1_BadTrap_0x101')
275////@conf.swvmem0.bad_trap =+ get_addr('\.HTRAPS\.HT0_BadTrap_0x101')
276////@conf.swvmem0.bad_trap =+ get_addr('\.HTRAPS\.HT0_BadTrap_0x1a1')
277//@conf.swvmem0.good_trap =+ get_addr('\.HTRAPS\.good_trap')
278//@conf.swvmem0.bad_trap =+ get_addr('\.HTRAPS\.bad_trap')
279//#endif
280
281#if defined(MAX_CYCLE)
282@conf.swvmem0.max_cycle = MAX_CYCLE
283#endif // if defined(MAX_CYCLE)
284
285// if not to go into interactive mode, then let it run until hit a breakpoint
286#if !defined(SAS_IACT)
287run
288quit
289#endif // if !defined(SAS_IACT)
290
291#elif defined(RTL) || defined(PLI_RUN)
292pli-run -1
293quit
294#endif // if-else defined(SAS_RUN)
295
296#endif // if-else defined(MOM)
297