projects / OpenSPARC-T2-DV / blame
? search:
summary | tags | clone url | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / arch / error / adv / n2_err_adv_DmuWrm_DP.s
CommitLineData
86530b38
AT		 1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: n2_err_adv_DmuWrm_DP.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
27* available with the language indicating that GPLv2 or any later version
28* may be used, or where a choice of which version of the GPL is applied is
29* otherwise unspecified.
30*
31* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38#define H_HT0_Hw_Corrected_Error_0x63 My_Corrected_ECC_error_trap
39#define H_HT0_Sw_Recoverable_Error_0x40 My_Recoverable_Sw_error_trap
40
41#define ENABLE_PCIE_LINK_TRAINING
42/* #define MAIN_PAGE_NUCLEUS_ALSO */ /* Access main in priviledge mode */
43#define MAIN_PAGE_HV_ALSO
44
45#define DRAM_ERR_STAT_REG 0x8400002280
46#define L2_ERR_STAT_REG 0xAB00000100
47
48#include "err_defines.h"
49#include "hboot.s"
50#include "peu_defines.h"
51
52#define DMA_DATA_ADDR 0x0000000123456700
53#define DMA_DATA_BYP_ADDR1 0xfffc000123456700
54#define DMA_DATA_BYP_ADDR2 0xfffc000123456780
55#define DMA_DATA_BYP_ADDR3 0xfffc000123456800
56
57
58
59#define ERR_BITS 0x20
60#define ERR_BITS_EXPECT 0x8000000000000020
61
62
63/************************************************************************
64 Test case code start
65 ************************************************************************/
66.text
67.global main
68.global My_Corrected_ECC_error_trap
69.global My_Recoverable_Sw_error_trap
70
71main:
72 ta T_CHANGE_HPRIV
73 nop
74
75 clr %i7
76 clr %o6
77 clr %o7
78
79
80L2_err_enable:
81 set 0x3, %l1
82 mov 0xaa, %g2
83 sllx %g2, 32, %g2
84 stx %l1, [%g2]
85 stx %l1, [%g2 + 0x40]
86 stx %l1, [%g2 + 0x80]
87 stx %l1, [%g2 + 0xc0]
88 stx %l1, [%g2 + 0x100]
89 stx %l1, [%g2 + 0x140]
90 stx %l1, [%g2 + 0x180]
91 stx %l1, [%g2 + 0x1c0]
92
93
94eie_reg_ones:
95 setx SOC_EIE_REG, %g3, %g2
96 set ERR_BITS, %g1
97 stx %g1, [%g2]
98 membar 0x40
99
100
101set_ejr:
102 set ERR_BITS, %g5
103
104 setx SOC_EJR_REG, %l7, %i3
105 stx %g5, [%i3]
106 membar 0x40
107
108
109dma_uev:
110 ! enable bypass in IOMMU
111 setx FIRE_DLC_MMU_CSR_A_CTL_ADDR, %g1, %g2
112 setx FIRE_DLC_MMU_CSR_A_CTL__BYPASS_EN, %g1, %g3
113 stx %g3, [%g2]
114 ldx [%g2], %g3
115
116XmtUsrEvnt1: nop;
117 ! $EV trig_pc_d(1, @VA(.MAIN.XmtUsrEvnt1)) -> EnablePCIeIgCmd ("DMAWR", DMA_DATA_BYP_ADDR1, DMA_DATA_BYP_ADDR1, "64'h20", 1 )
118 ldx [%g2], %g3
119 ldx [%g2], %g3
120 ldx [%g2], %g3
121 ldx [%g2], %g3
122
123 setx 0x20, %g7, %g6
124loop1:
125 dec %g6
126 cmp %g6, %g0
127 be %xcc, esr_check
128 nop
129
130 ba loop1
131 nop
132
133esr_check:
134 setx SOC_ESR_REG, %g7, %g2
135 ldx [%g2], %g3
136
137 cmp %g3, %g0
138 bne %xcc, test_failed
139 nop
140
141
142Core_read:
143 setx DMA_DATA_BYP_ADDR1, %g7, %g1
144 ldx [%g1], %i1
145 ldx [%g1+0x8], %i1
146 ldx [%g1+0x10], %i1
147 ldx [%g1+0x18], %i1
148 ldx [%g1+0x20], %i1
149 ldx [%g1+0x28], %i1
150 ldx [%g1+0x30], %i1
151 ldx [%g1+0x38], %i1
152 membar 0x40
153
154 set 0x20, %g6
155loop2:
156 dec %g6
157 cmp %g6, %g0
158 be %xcc, test_passed
159 nop
160
161 ba loop2
162 nop
163
164
165
166test_passed:
167 EXIT_GOOD
168
169test_failed:
170 EXIT_BAD
171
172
173/************************************************************************
174 RAS
175 Trap Handlers
176 ************************************************************************/
177My_Recoverable_Sw_error_trap:
178 ba test_failed
179 nop
180
181
182My_Corrected_ECC_error_trap:
183 ba test_failed
184 nop
185
186
187/************************************************************************
188 Test case data start
189************************************************************************/
190
191SECTION .DATA DATA_VA=DMA_DATA_ADDR
192attr_data {
193 Name = .DATA,
194 hypervisor,
195 compressimage
196}
197
198.data
199.global PCIAddr9
200 .xword 0x0001020304050607
201 .xword 0x08090a0b0c0d0e0f
202 .xword 0x1011121314151617
203 .xword 0x18191a1b1c1d1e1f
204 .xword 0x2021222324252627
205 .xword 0x28292a2b2c2d2e2f
206 .xword 0x3031323334353637
207 .xword 0x38393a3b3c3d3e3f
208
209 .xword 0x4041424344454647
210 .xword 0x48494a4b4c4d4e4f
211 .xword 0x5051525354555657
212 .xword 0x58595a5b5c5d5e5f
213 .xword 0x6061626364656667
214 .xword 0x68696a6b6c6d6e6f
215 .xword 0x7071727374757677
216 .xword 0x78797a7b7c7d7e7f
217
218 .xword 0x8081828384858687
219 .xword 0x88898a8b8c8d8e8f
220 .xword 0x9091929394959697
221 .xword 0x98999a9b9c9d9e9f
222 .xword 0xa0a1a2a3a4a5a6a7
223 .xword 0xa8a9aaabacadaeaf
224 .xword 0xb0b1b2b3b4b5b6b7
225 .xword 0xb8b9babbbcbdbebf
226
227 .xword 0xc0c1c2c3c4c5c6c7
228 .xword 0xc8c9cacbcccdcecf
229 .xword 0xd0d1d2d3d4d5d6d7
230 .xword 0xd8d9dadbdcdddedf
231 .xword 0xe0e1e2e3e4e5e6e7
232 .xword 0xe8e9eaebecedeeef
233 .xword 0xf0f1f2f3f4f5f6f7
234 .xword 0xf8f9fafbfcfdfeff
235
236 .xword 0x0001020304050607
237 .xword 0x08090a0b0c0d0e0f
238 .xword 0x1011121314151617
239 .xword 0x18191a1b1c1d1e1f
240 .xword 0x2021222324252627
241 .xword 0x28292a2b2c2d2e2f
242 .xword 0x3031323334353637
243 .xword 0x38393a3b3c3d3e3f
244
245 .xword 0x4041424344454647
246 .xword 0x48494a4b4c4d4e4f
247 .xword 0x5051525354555657
248 .xword 0x58595a5b5c5d5e5f
249 .xword 0x6061626364656667
250 .xword 0x68696a6b6c6d6e6f
251 .xword 0x7071727374757677
252 .xword 0x78797a7b7c7d7e7f
253
254 .xword 0x8081828384858687
255 .xword 0x88898a8b8c8d8e8f
256 .xword 0x9091929394959697
257 .xword 0x98999a9b9c9d9e9f
258 .xword 0xa0a1a2a3a4a5a6a7
259 .xword 0xa8a9aaabacadaeaf
260 .xword 0xb0b1b2b3b4b5b6b7
261 .xword 0xb8b9babbbcbdbebf
262
263 .xword 0xc0c1c2c3c4c5c6c7
264 .xword 0xc8c9cacbcccdcecf
265 .xword 0xd0d1d2d3d4d5d6d7
266 .xword 0xd8d9dadbdcdddedf
267 .xword 0xe0e1e2e3e4e5e6e7
268 .xword 0xe8e9eaebecedeeef
269 .xword 0xf0f1f2f3f4f5f6f7
270 .xword 0xf8f9fafbfcfdfeff
271
272/************************************************************************/
273
Full OpenSPARC design & verification tarball including full HDL.