Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / arch / error / dmu / n2_err_dmu_pio_wr.s
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1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: n2_err_dmu_pio_wr.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
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8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
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14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
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21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
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32* CA 95054 USA or visit www.sun.com if you need additional information or
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36* ========== Copyright Header End ============================================
37*/
38#define ENABLE_PCIE_LINK_TRAINING
39/* #define MAIN_PAGE_NUCLEUS_ALSO */ /* Access main in priviledge mode */
40#define MAIN_PAGE_HV_ALSO
41
42#include "err_defines.h"
43#include "hboot.s"
44#include "peu_defines.h"
45
46!#define IO_WR_ADDR mpeval(N2_PCIE_BASE_ADDR + IOCFG_OFFSET_BASE_REG_DATA)
47#define IO_WR_ADDR mpeval((N2_PCIE_BASE_ADDR + IOCFG_OFFSET_BASE_REG_DATA) | IO_ACCESS_PA)
48
49/************************************************************************
50 Test case code start
51 ************************************************************************/
52.text
53.global main
54
55main:
56 ta T_CHANGE_HPRIV
57 nop
58
59clear_esr_first:
60 setx SOC_ESR_REG, %l7, %i0
61 stx %g0, [%i0]
62
63set_ejr:
64 set 0x1, %i1
65 sllx %i1, ERR_FIELD, %i2
66 setx SOC_EJR_REG, %l7, %i3
67 stx %i2, [%i3]
68 membar 0x40
69
70 ! select a CFG address in PCI address range and transmit the command to NCU
71 setx IO_WR_ADDR, %g1, %g2
72 setx 0x7f7e7d7c, %g1, %l0
73 stw %l0, [%g2]
74
75 setx 0x100, %l1, %g4
76delay_loop:
77 nop
78 nop
79 nop
80 nop
81 dec %g4
82 brnz %g4, delay_loop
83 nop
84 nop
85
86check_esr:
87 setx SOC_ESR_REG, %l7, %i0
88 ldx [%i0], %i1
89 nop
90
91 setx 0x8000000000000000, %l7, %o3 !valid bit
92 set 0x1, %i2
93 sllx %i2, ERR_FIELD, %i3
94 or %i3, %o3, %i4
95 sub %i1, %i4, %i5
96 brnz %i5, test_failed
97 nop
98
99test_passed:
100 EXIT_GOOD
101
102test_failed:
103 EXIT_BAD
104
105
106/************************************************************************
107 Test case data start
108************************************************************************/
109
110SECTION .DATA DATA_VA=IO_WR_ADDR
111attr_data {
112 Name = .DATA,
113 hypervisor,
114 compressimage
115}
116
117.data
118.global PCIAddr9
119
120data0: .word 0xccccdddd
121data1: .word 0xeeeeffff
122/************************************************************************/