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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / arch / error / siu / n2_err_siu_niu_tx.s
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86530b38
AT		 1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: n2_err_siu_niu_tx.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
27* available with the language indicating that GPLv2 or any later version
28* may be used, or where a choice of which version of the GPL is applied is
29* otherwise unspecified.
30*
31* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38#define MAIN_PAGE_HV_ALSO
39
40#include "err_defines.h"
41#include "hboot.s"
42#include "niu_defines.h"
43
44/************************************************************************
45 Test case code start
46 ************************************************************************/
47.text
48.global main
49
50main:
51 ta T_CHANGE_HPRIV
52 nop
53
54! #include "niu_init.h"
55!
56! Thread 0 Start
57!
58!
59! thread_0:
60
61Init_flow:
62 nop ! $EV trig_pc_d(1, @VA(.MAIN.Init_flow)) -> pktGenConfig(MAC_ID, FRAME_TYPE, FRAME_CLASS,TX_PKT_LEN)
63
64P_TxDMAActivate:
65 setx MAC_ID, %g1, %o0 ! 1st Parameter
66 setx SetTxDMAActive_list, %g1, %o1 ! 2st parameter
67 call SetTxDMAActive
68 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_TxDMAActivate)) -> NIU_TxDMAActivate (MAC_ID, TxDmaActive_list)
69
70P_AddTxChannels :
71 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_AddTxChannels)) -> NIU_AddTxChannels(MAC_ID, NIU_TxDmaNoUE)
72
73 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 ! Just for delay
74 nop
75
76P_SetTxMaxBurst :
77 setx NIU_TxDmaNo, %g1, %o0 ! 1st parameter :
78 setx SetTxMaxBurst_Data, %g1, %o1 ! 2nd parameter
79 call SetTxMaxBurst
80 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_SetTxMaxBurst)) -> NIU_SetTxMaxBurst (MAC_ID, NIU_TxDmaNoUE, TxMaxBurst_Data)
81
82 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 ! Just for delay
83 nop
84
85P_InitTxDma:
86 setx NIU_TxDmaNo, %g1, %o0 ! 1st parameter :
87 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_InitTxDma)) -> NIU_InitTxDma (MAC_ID, NIU_TxDmaNoUE, NIU_Xlate_On)
88 call InitTxDma
89 nop
90
91 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 ! Just for delay
92 nop
93
94
95 /************************************
96 RAS
97 *************************************/
98clear_esr_first:
99 setx SOC_ESR_REG, %l7, %i0
100 stx %g0, [%i0]
101
102set_ejr:
103 set 0x1, %i1
104 sllx %i1, ERR_FIELD, %i2
105 setx SOC_EJR_REG, %l7, %i3
106 stx %i2, [%i3]
107 membar 0x40
108 /*************************************/
109 ! makes single port, single DMA
110Gen_Packet:
111 nop ! $EV trig_pc_d(1, @VA(.MAIN.Gen_Packet)) -> TxPktGen(MAC_ID, NIU_TxDmaNoUE,NIU_TX_PKT_CNT, 0, 0)
112 nop
113
114 setx 0x5, %g1, %g4
115delay_loop_tmp:
116 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
117 nop
118 nop
119 nop
120 nop
121 dec %g4
122 brnz %g4, delay_loop_tmp
123 nop
124
125
126SetTxRingKick:
127 ! peu sram access instead of main memory
128 setx NIU_PKTGEN_CSR_EV2A_TX_RNG_KICK, %g1, %g2 ! $EV trig_pc_d(1, @VA(.MAIN.SetTxRingKick)) -> NIU_SetTxRingKick(MAC_ID, NIU_TxDmaNoUE)
129 setx NIU_TxDmaNo, %g1, %o0
130 ldx [%g2], %g3
131 nop
132 mulx %o0, 0x200, %g5
133 setx TX_RING_KICK_Addr, %g1, %g2
134 add %g2, %g5, %g2
135 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
136 nop
137
138SetTxCs :
139 setx NIU_TxDmaNo, %g1, %o0
140 setx TX_CS_Data, %g1, %g3
141 mulx %o0, 0x200, %g5
142 setx TX_CS_Addr, %g1, %g2
143 add %g2, %g5, %g2
144 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
145 nop
146
147
148#ifdef JUMBO_FRAME_EN /* Extra Delay for Jumbo packets to go out */
149 setx loop_count, %g1, %g4
150delay_loop:
151 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
152 nop
153 nop
154 nop
155 nop
156 dec %g4
157 brnz %g4, delay_loop
158 nop
159#endif
160
161#ifdef CE
162NIUTx_Pkt_Cnt_Chk:
163 setx MAC_ID, %g1, %o0
164 setx NIU_TX_PKT_CNT, %g1, %o1
165 call NiuTx_check_pkt_cnt
166 nop
167
168 setx loop_count, %g1, %g4
169delay_loop_end:
170 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
171 nop
172 nop
173 nop
174 nop
175 dec %g4
176 brnz %g4, delay_loop_end
177 nop
178#endif
179
180 setx 0x20, %g1, %g4
181delay_ras:
182 setx 0x2000000, %g1, %g2
183 ldx [%g2], %g3
184 nop
185 nop
186 dec %g4
187 brnz %g4, delay_ras
188 nop
189
190 /************************************
191 RAS
192 *************************************/
193read_esr:
194 setx SOC_ESR_REG, %l7, %i0
195 ldx [%i0], %i1
196 nop
197
198 setx 0x8000000000000000, %l7, %o3 !valid bit
199 set 0x1, %i2
200 sllx %i2, ERR_FIELD, %i3
201 or %i3, %o3, %i4
202 sub %i1, %i4, %i5
203 brnz %i5, test_fail
204 nop
205 /*************************************/
206
207test_passed:
208#ifdef CE
209 nop ! $EV trig_pc_d(1, @VA(.MAIN.test_passed)) -> NIU_EXIT_chk(MAC_ID)
210#endif
211
212 EXIT_GOOD
213
214!.global test_failed
215!test_failed:
216! EXIT_BAD
217
218test_fail:
219 EXIT_BAD
220
221
222/************************************************************************
223 Test case data start
224 ************************************************************************/
225/* These initialization is temporary, as there looks some bug in mempli */
226
227SECTION SetRngConfig_init data_va=0x100000000
228attr_data {
229 Name = SetRngConfig_init,
230 hypervisor,
231 compressimage
232 }
233.data
234SetRngConfig_init:
235 .xword 0x0060452301000484
236/************************************************************************/
237
238SECTION SetTxRingKick_init data_va=0x100000100
239attr_data {
240 Name = SetTxRingKick_init,
241 hypervisor,
242 compressimage
243 }
244.data
245SetTxRingKick_init:
246 .xword 0x0060452301000484
247/************************************************************************/
248
249SECTION SetTxLPMask1_init data_va=0x100000200
250attr_data {
251 Name = SetTxLPMask1_init,
252 hypervisor,
253 compressimage
254 }
255.data
256SetTxLPMask1_init:
257 .xword 0x0060452301000484
258/************************************************************************/
259
260SECTION SetTxLPValue1_init data_va=0x100000300
261attr_data {
262 Name = SetTxLPValue1_init,
263 hypervisor,
264 compressimage
265 }
266.data
267SetTxLPValue1_init:
268 .xword 0x0060452301000484
269/************************************************************************/
270
271SECTION SetTxLPRELOC1_init data_va=0x100000400
272attr_data {
273 Name = SetTxLPRELOC1_init,
274 hypervisor,
275 compressimage
276 }
277.data
278SetTxLPRELOC1_init:
279 .xword 0x0060452301000484
280/************************************************************************/
281SECTION SetTxLPMask2_init data_va=0x100000500
282attr_data {
283 Name = SetTxLPMask2_init,
284 hypervisor,
285 compressimage
286 }
287.data
288SetTxLPMask2_init:
289 .xword 0x0060452301000484
290/************************************************************************/
291SECTION SetTxLPValue2_init data_va=0x100000600
292attr_data {
293 Name = SetTxLPValue2_init,
294 hypervisor,
295 compressimage
296 }
297.data
298SetTxLPValue2_init:
299 .xword 0x0060452301000484
300
301/************************************************************************/
302SECTION SetTxLPRELOC2_init data_va=0x100000700
303attr_data {
304 Name = SetTxLPRELOC2_init,
305 hypervisor,
306 compressimage
307 }
308.data
309SetTxLPRELOC2_init:
310 .xword 0x0060452301000484
311
312/************************************************************************/
313SECTION SetTxLPValid_init data_va=0x100000800
314attr_data {
315 Name = SetTxLPValid_init,
316 hypervisor,
317 compressimage
318 }
319.data
320SetTxLPValid_init:
321 .xword 0x0060452301000484
322
323/************************************************************************/
324
Full OpenSPARC design & verification tarball including full HDL.