Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / arch / prm / cmp / ncu_mix_regs.s
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1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: ncu_mix_regs.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
27* available with the language indicating that GPLv2 or any later version
28* may be used, or where a choice of which version of the GPL is applied is
29* otherwise unspecified.
30*
31* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38#define MAIN_PAGE_NUCLEUS_ALSO
39#define MAIN_PAGE_HV_ALSO
40
41#include "hboot.s"
42!#include "asi_s.h"
43
44.text
45.global main
46
47
48main:
49 ta T_CHANGE_HPRIV
50
51get_th_id:
52 ta T_RD_THID
53
54// cmp %o1,0x0
55// bne test_pass
56 nop
57
58!Write then read data of INT_VEC_REG
59 setx 0x0000008000000a00,%g7,%g1
60 setx int_vec_data,%g7,%g2
61 set 0x04,%g3
62
63loop1:
64 ldx [%g2],%g4
65 stx %g4,[%g1]
66
67 ldx [%g1], %g5
68
69 cmp %g4, %g5
70
71 bne %xcc, test_fail
72
73
74 add %g2,8,%g2
75 sub %g3,1,%g3
76 cmp %g3,%g0
77 bne loop1
78 nop
79
80
81
82!Write then read data of PCIE_A_FSH_REG
83 setx 0x0000008000002030,%g7,%g1
84 setx data_xword,%g7,%g2
85 set 0x04,%g3
86
87loop2:
88 ldx [%g2],%g4
89 stx %g4,[%g1]
90
91 ldx [%g1], %g5
92
93 cmp %g4, %g5
94
95 bne %xcc, test_fail
96
97
98 add %g2,8,%g2
99 sub %g3,1,%g3
100 cmp %g3,%g0
101 bne loop2
102 nop
103
104!Write then read data of RAS_ERR_STEERING
105 setx 0x0000009001041000,%g7,%g1
106 setx int_vec_data,%g7,%g2
107 set 0x04,%g3
108
109loop3:
110 ldx [%g2],%g4
111 stx %g4,[%g1]
112
113 ldx [%g1], %g5
114
115 cmp %g4, %g5
116
117 bne %xcc, test_fail
118
119
120 add %g2,8,%g2
121 sub %g3,1,%g3
122 cmp %g3,%g0
123 bne loop3
124 nop
125
126
127
128!Write data to the NCU_CREG_DBGTRIG_EN
129 setx 0x0000008000004000,%g7,%g1
130 setx bit_1_data,%g7,%g2
131 set 0x04,%g3
132
133loop5:
134 ldx [%g2],%g4
135 stx %g4,[%g1]
136
137 ldx [%g1], %g5
138
139 cmp %g4, %g5
140
141 bne %xcc, test_fail
142
143
144 add %g2,8,%g2
145 sub %g3,1,%g3
146 cmp %g3,%g0
147 bne loop5
148 nop
149
150!Write data to the MONDO_INT_ABUSY
151 setx 0x0000008000040a00,%g7,%g1
152 setx busy_data,%g7,%g2
153 set 0x04,%g3
154
155loop6:
156 ldx [%g2],%g4
157 stx %g4,[%g1]
158
159 ldx [%g1], %g5
160
161 cmp %g4, %g5
162
163 bne %xcc, test_fail
164
165
166 add %g2,8,%g2
167 sub %g3,1,%g3
168 cmp %g3,%g0
169 bne loop6
170 nop
171
172
173
174
175/******************************************************
176 * Exit code
177 *******************************************************/
178
179test_pass:
180EXIT_GOOD
181
182test_fail:
183EXIT_BAD
184
185
186.data
187.align 0x100
188int_vec_data:
189 .xword 0x000000000000002a
190 .xword 0x000000000000003f
191 .xword 0x0000000000000015
192 .xword 0x0000000000000001
193 .xword 0x0000000000000002
194 .xword 0x0000000000000004
195 .xword 0x0000000000000008
196 .xword 0x0000000000000010
197 .xword 0x0000000000000020
198.align 0x100
199
200bit_1_data:
201 .xword 0x0000000000000001
202 .xword 0x0000000000000000
203 .xword 0x0000000000000001
204 .xword 0x0000000000000000
205
206busy_data:
207 .xword 0x0000000000000040
208 .xword 0x0000000000000000
209 .xword 0x0000000000000040
210 .xword 0x0000000000000000
211
212.align 0x100
213data_xword:
214 .xword 0x000000faaa000000
215 .xword 0x000000fcad000000
216 .xword 0x000000f555000000
217 .xword 0x000000fabc000000
218
219.end
220