Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / arch / prm / interrupt / interrupt_dmu_cntrl_stall2.s
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1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: interrupt_dmu_cntrl_stall2.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
27* available with the language indicating that GPLv2 or any later version
28* may be used, or where a choice of which version of the GPL is applied is
29* otherwise unspecified.
30*
31* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38#define HBOOT_HV_ONLY
39#define ENABLE_PCIE_LINK_TRAINING
40
41#define ENABLE_INTR0x60 1
42
43#define INTR0x60_EVENT_QUEUE_BASE event_queue_base
44#define INTR0x60_MSI_START_ADDRESS 0x0
45
46#define INTR0x60_MONDO_IV 7
47
48#ifdef SELECT_EQ_GROUP_1
49
50#define INTR0x60_MSI_0_NUM 1
51#define INTR0x60_MSI_0_EQN 1
52#define INTR0x60_MONDO_25_V 1
53#define INTR0x60_MONDO_25_MODE 1
54#define INTR0x60_MONDO_25_THREAD 0
55#define INTR0x60_MONDO_25_CNTRL 0
56
57#define INTR0x60_MSI_1_NUM 2
58#define INTR0x60_MSI_1_EQN 2
59#define INTR0x60_MONDO_26_V 1
60#define INTR0x60_MONDO_26_MODE 1
61#define INTR0x60_MONDO_26_THREAD 0
62#define INTR0x60_MONDO_26_CNTRL 0
63
64#define INTR0x60_MSI_2_NUM 4
65#define INTR0x60_MSI_2_EQN 3
66#define INTR0x60_MONDO_27_V 1
67#define INTR0x60_MONDO_27_MODE 1
68#define INTR0x60_MONDO_27_THREAD 1
69#define INTR0x60_MONDO_27_CNTRL 1
70
71#define INTR0x60_MSI_3_NUM 8
72#define INTR0x60_MSI_3_EQN 4
73#define INTR0x60_MONDO_28_V 1
74#define INTR0x60_MONDO_28_MODE 1
75#define INTR0x60_MONDO_28_THREAD 2
76#define INTR0x60_MONDO_28_CNTRL 2
77
78#define INTR0x60_MSI_4_NUM 16
79#define INTR0x60_MSI_4_EQN 5
80#define INTR0x60_MONDO_29_V 1
81#define INTR0x60_MONDO_29_MODE 1
82#define INTR0x60_MONDO_29_THREAD 3
83#define INTR0x60_MONDO_29_CNTRL 3
84
85#else
86#ifdef SELECT_EQ_GROUP_2
87
88#define INTR0x60_MSI_0_NUM 1
89#define INTR0x60_MSI_0_EQN 6
90#define INTR0x60_MONDO_30_V 1
91#define INTR0x60_MONDO_30_MODE 1
92#define INTR0x60_MONDO_30_THREAD 0
93#define INTR0x60_MONDO_30_CNTRL 0
94
95#define INTR0x60_MSI_1_NUM 2
96#define INTR0x60_MSI_1_EQN 7
97#define INTR0x60_MONDO_31_V 1
98#define INTR0x60_MONDO_31_MODE 1
99#define INTR0x60_MONDO_31_THREAD 0
100#define INTR0x60_MONDO_31_CNTRL 0
101
102#define INTR0x60_MSI_2_NUM 4
103#define INTR0x60_MSI_2_EQN 8
104#define INTR0x60_MONDO_32_V 1
105#define INTR0x60_MONDO_32_MODE 1
106#define INTR0x60_MONDO_32_THREAD 1
107#define INTR0x60_MONDO_32_CNTRL 1
108
109#define INTR0x60_MSI_3_NUM 8
110#define INTR0x60_MSI_3_EQN 9
111#define INTR0x60_MONDO_33_V 1
112#define INTR0x60_MONDO_33_MODE 1
113#define INTR0x60_MONDO_33_THREAD 2
114#define INTR0x60_MONDO_33_CNTRL 2
115
116#define INTR0x60_MSI_4_NUM 16
117#define INTR0x60_MSI_4_EQN 10
118#define INTR0x60_MONDO_34_V 1
119#define INTR0x60_MONDO_34_MODE 1
120#define INTR0x60_MONDO_34_THREAD 3
121#define INTR0x60_MONDO_34_CNTRL 3
122
123#else
124#ifdef SELECT_EQ_GROUP_3
125
126#define INTR0x60_MSI_0_NUM 1
127#define INTR0x60_MSI_0_EQN 11
128#define INTR0x60_MONDO_35_V 1
129#define INTR0x60_MONDO_35_MODE 1
130#define INTR0x60_MONDO_35_THREAD 0
131#define INTR0x60_MONDO_35_CNTRL 0
132
133#define INTR0x60_MSI_1_NUM 2
134#define INTR0x60_MSI_1_EQN 12
135#define INTR0x60_MONDO_36_V 1
136#define INTR0x60_MONDO_36_MODE 1
137#define INTR0x60_MONDO_36_THREAD 0
138#define INTR0x60_MONDO_36_CNTRL 0
139
140#define INTR0x60_MSI_2_NUM 4
141#define INTR0x60_MSI_2_EQN 13
142#define INTR0x60_MONDO_37_V 1
143#define INTR0x60_MONDO_37_MODE 1
144#define INTR0x60_MONDO_37_THREAD 1
145#define INTR0x60_MONDO_37_CNTRL 1
146
147#define INTR0x60_MSI_3_NUM 8
148#define INTR0x60_MSI_3_EQN 14
149#define INTR0x60_MONDO_38_V 1
150#define INTR0x60_MONDO_38_MODE 1
151#define INTR0x60_MONDO_38_THREAD 2
152#define INTR0x60_MONDO_38_CNTRL 2
153
154#define INTR0x60_MSI_4_NUM 16
155#define INTR0x60_MSI_4_EQN 15
156#define INTR0x60_MONDO_39_V 1
157#define INTR0x60_MONDO_39_MODE 1
158#define INTR0x60_MONDO_39_THREAD 3
159#define INTR0x60_MONDO_39_CNTRL 3
160
161#else
162#ifdef SELECT_EQ_GROUP_4
163
164#define INTR0x60_MSI_0_NUM 1
165#define INTR0x60_MSI_0_EQN 16
166#define INTR0x60_MONDO_40_V 1
167#define INTR0x60_MONDO_40_MODE 1
168#define INTR0x60_MONDO_40_THREAD 0
169#define INTR0x60_MONDO_40_CNTRL 0
170
171#define INTR0x60_MSI_1_NUM 2
172#define INTR0x60_MSI_1_EQN 17
173#define INTR0x60_MONDO_41_V 1
174#define INTR0x60_MONDO_41_MODE 1
175#define INTR0x60_MONDO_41_THREAD 0
176#define INTR0x60_MONDO_41_CNTRL 0
177
178#define INTR0x60_MSI_2_NUM 4
179#define INTR0x60_MSI_2_EQN 18
180#define INTR0x60_MONDO_42_V 1
181#define INTR0x60_MONDO_42_MODE 1
182#define INTR0x60_MONDO_42_THREAD 1
183#define INTR0x60_MONDO_42_CNTRL 1
184
185#define INTR0x60_MSI_3_NUM 8
186#define INTR0x60_MSI_3_EQN 19
187#define INTR0x60_MONDO_43_V 1
188#define INTR0x60_MONDO_43_MODE 1
189#define INTR0x60_MONDO_43_THREAD 2
190#define INTR0x60_MONDO_43_CNTRL 2
191
192#define INTR0x60_MSI_4_NUM 16
193#define INTR0x60_MSI_4_EQN 20
194#define INTR0x60_MONDO_44_V 1
195#define INTR0x60_MONDO_44_MODE 1
196#define INTR0x60_MONDO_44_THREAD 3
197#define INTR0x60_MONDO_44_CNTRL 3
198
199#else
200#ifdef SELECT_EQ_GROUP_5
201
202#define INTR0x60_MSI_0_NUM 1
203#define INTR0x60_MSI_0_EQN 21
204#define INTR0x60_MONDO_45_V 1
205#define INTR0x60_MONDO_45_MODE 1
206#define INTR0x60_MONDO_45_THREAD 0
207#define INTR0x60_MONDO_45_CNTRL 0
208
209#define INTR0x60_MSI_1_NUM 2
210#define INTR0x60_MSI_1_EQN 22
211#define INTR0x60_MONDO_46_V 1
212#define INTR0x60_MONDO_46_MODE 1
213#define INTR0x60_MONDO_46_THREAD 0
214#define INTR0x60_MONDO_46_CNTRL 0
215
216#define INTR0x60_MSI_2_NUM 4
217#define INTR0x60_MSI_2_EQN 23
218#define INTR0x60_MONDO_47_V 1
219#define INTR0x60_MONDO_47_MODE 1
220#define INTR0x60_MONDO_47_THREAD 1
221#define INTR0x60_MONDO_47_CNTRL 1
222
223#define INTR0x60_MSI_3_NUM 8
224#define INTR0x60_MSI_3_EQN 24
225#define INTR0x60_MONDO_48_V 1
226#define INTR0x60_MONDO_48_MODE 1
227#define INTR0x60_MONDO_48_THREAD 2
228#define INTR0x60_MONDO_48_CNTRL 2
229
230#define INTR0x60_MSI_4_NUM 16
231#define INTR0x60_MSI_4_EQN 25
232#define INTR0x60_MONDO_49_V 1
233#define INTR0x60_MONDO_49_MODE 1
234#define INTR0x60_MONDO_49_THREAD 3
235#define INTR0x60_MONDO_49_CNTRL 3
236
237#else
238#ifdef SELECT_EQ_GROUP_6
239
240#define INTR0x60_MSI_0_NUM 1
241#define INTR0x60_MSI_0_EQN 26
242#define INTR0x60_MONDO_50_V 1
243#define INTR0x60_MONDO_50_MODE 1
244#define INTR0x60_MONDO_50_THREAD 0
245#define INTR0x60_MONDO_50_CNTRL 0
246
247#define INTR0x60_MSI_1_NUM 2
248#define INTR0x60_MSI_1_EQN 27
249#define INTR0x60_MONDO_51_V 1
250#define INTR0x60_MONDO_51_MODE 1
251#define INTR0x60_MONDO_51_THREAD 0
252#define INTR0x60_MONDO_51_CNTRL 0
253
254#define INTR0x60_MSI_2_NUM 4
255#define INTR0x60_MSI_2_EQN 28
256#define INTR0x60_MONDO_52_V 1
257#define INTR0x60_MONDO_52_MODE 1
258#define INTR0x60_MONDO_52_THREAD 1
259#define INTR0x60_MONDO_52_CNTRL 1
260
261#define INTR0x60_MSI_3_NUM 8
262#define INTR0x60_MSI_3_EQN 29
263#define INTR0x60_MONDO_53_V 1
264#define INTR0x60_MONDO_53_MODE 1
265#define INTR0x60_MONDO_53_THREAD 2
266#define INTR0x60_MONDO_53_CNTRL 2
267
268#define INTR0x60_MSI_4_NUM 16
269#define INTR0x60_MSI_4_EQN 30
270#define INTR0x60_MONDO_54_V 1
271#define INTR0x60_MONDO_54_MODE 1
272#define INTR0x60_MONDO_54_THREAD 3
273#define INTR0x60_MONDO_54_CNTRL 3
274
275#else
276#ifdef SELECT_EQ_GROUP_7
277
278#define INTR0x60_MSI_0_NUM 1
279#define INTR0x60_MSI_0_EQN 31
280#define INTR0x60_MONDO_55_V 1
281#define INTR0x60_MONDO_55_MODE 1
282#define INTR0x60_MONDO_55_THREAD 0
283#define INTR0x60_MONDO_55_CNTRL 0
284
285#define INTR0x60_MSI_1_NUM 2
286#define INTR0x60_MSI_1_EQN 32
287#define INTR0x60_MONDO_56_V 1
288#define INTR0x60_MONDO_56_MODE 1
289#define INTR0x60_MONDO_56_THREAD 0
290#define INTR0x60_MONDO_56_CNTRL 0
291
292#define INTR0x60_MSI_2_NUM 4
293#define INTR0x60_MSI_2_EQN 33
294#define INTR0x60_MONDO_57_V 1
295#define INTR0x60_MONDO_57_MODE 1
296#define INTR0x60_MONDO_57_THREAD 1
297#define INTR0x60_MONDO_57_CNTRL 1
298
299#define INTR0x60_MSI_3_NUM 8
300#define INTR0x60_MSI_3_EQN 34
301#define INTR0x60_MONDO_58_V 1
302#define INTR0x60_MONDO_58_MODE 1
303#define INTR0x60_MONDO_58_THREAD 2
304#define INTR0x60_MONDO_58_CNTRL 2
305
306#define INTR0x60_MSI_4_NUM 16
307#define INTR0x60_MSI_4_EQN 35
308#define INTR0x60_MONDO_59_V 1
309#define INTR0x60_MONDO_59_MODE 1
310#define INTR0x60_MONDO_59_THREAD 3
311#define INTR0x60_MONDO_59_CNTRL 3
312
313#else
314
315#error You need to set one of SELECT_EQ_GROUP_1 - SELECT_EQ_GROUP_7
316
317#endif
318#endif
319#endif
320#endif
321#endif
322#endif
323#endif
324
325/* Kick off the other MSIs and then stall */
326#define INTR0x60_MSI_0_EXTRA_HANDLER_WHILE_BUSY \
327 call t0_mondo40_handler; \
3281: nop
329
330/* Calculate the address for this INO (%g3) in mondo_seen.
331 * Has interrupt to this INO already occured?
332 * Record the interrupt as done. */
333#define INTR0x60_MSI_EXTRA_HANDLER \
334 setx mondo_seen, %g7, %g4; \
335 add %g3, %g4, %g4; \
336 ldub [%g4], %g5; \
337 brz %g5, 1f; \
338 set 1, %g6; \
339 EXIT_BAD; \
3401: stub %g6, [%g4]
341
342
343#include "interrupt0x60_defines.h"
344
345#define SYNC_THREADS 1
346
347#include "hboot.s"
348
349#include "interrupt0x60_handler.s"
350
351/************************************************************************
352 Test case code start
353 ************************************************************************/
354SECTION .MAIN
355.text
356.global main
357
358main:
359 rdpr %pstate, %g7
360 or %g7, 0x2, %g7 ! Set interrupt enable
361 wrpr %g7, %pstate
362
363 setx iteration_counter, %o1, %o0
364
365 ta T_RD_THID ! %o1 = thread ID
366 brnz %o1, t1_to_t3_main ! branch if not thread 0
367 nop
368
369
370!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
371!
372! Thread 0 Start Here
373!
374!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
375
376t0_main:
377 setx mondo_seen+INTR0x60_MSI_0_EQN+24, %l7, %i7
378 mov 4, %i6 ! Set the number of iterations
379
380t0_clear_mondo_seen:
381 stb %i6, [%o0] ! iteration counter
382 stb %g0, [%i7] ! Mondo 40
383 stb %g0, [%i7+1] ! Mondo 41
384 stb %g0, [%i7+2] ! Mondo 42
385 stb %g0, [%i7+3] ! Mondo 43
386 stb %g0, [%i7+4] ! Mondo 44
387
388 /* Kick off first interrupt, trap handler kicks off rest */
389t0_kick_msi_0:
390 ! user event to generate MSI msg.
391 nop ! $EV trig_pc_d(1, @VA(.MAIN.t0_kick_msi_0)) -> EnablePCIeIgCmd ("MSI64", eval(INTR0x60_MSI_0_NUM, 16), 0, 4, 1, *, 1 )
392
393 /* Wait for interrupt to occur. */
394t0_intr_wait:
395#ifdef DTM_ENABLED
396 setx 0x400, %l1, %l2 ! DTM timeout count
397#else
398 setx 0x100, %l1, %l2 ! timeout count
399#endif
400
401t0_intr_wait_loop_top:
402 ldub [%i7], %l0
403 cmp %l0, 1
404 be t0_saw_mondo
405 dec %l2
406 brnz %l2, t0_intr_wait_loop_top
407 nop
408t0_timeout:
409 ! $EV trig_pc_d(1, @VA(.MAIN.t0_timeout)) -> printf("ERROR: T0 timeout waiting for mondo 40",*,1)
410 ba local_test_failed
411 nop
412
413t0_saw_mondo:
414 ldub [%i7+2], %l0 ! Check for mondo 42
415 cmp %l0, 1
416 bne t0_missed_mondo_42
417 ldub [%i7+3], %l0 ! Check for mondo 43
418 cmp %l0, 1
419 bne t0_missed_mondo_43
420 ldub [%i7+4], %l0 ! Check for mondo 44
421 cmp %l0, 1
422 bne t0_missed_mondo_44
423
424 mov 100, %l2
425t0_wait_for_mondo_41:
426 brz %l2, t0_missed_mondo_41
427 dec %l2
428 ldub [%i7+1], %l0 ! Check for mondo 41
429 cmp %l0, 1
430 bne t0_wait_for_mondo_41
431 nop
432
433t0_iteration_passed:
434 dec %i6
435 brz %i6, t0_done
436
437t0_setup_next_iteration:
438 /* Rotate controllers and run it again */
439 best_set_reg(mpeval(PCI_E_INT_MAP_ADDR+PCI_E_INT_MAP_STEP*(40-20)),
440 %l1, %l2)
441 mov 5, %l7 /* Number of mondos that need fixing */
442 mov 0xf, %l6
443 sllx %l6, PCI_E_INT_MAP_INT_CNTRL_NUM_SHIFT, %l6
444t0_setup_next_iteration_top:
445 ldx [%l2], %l3
446 and %l3, %l6, %l4 /* Isolate the controller value */
447 sllx %l4, 1, %l4 /* Generate new controller value */
448 andcc %l4, %l6, %g0 /* Check for 0000 value */
449 bne %xcc, 1f
450 andn %l3, %l6, %l3 /* Clear previous controller value */
451 srlx %l4, 4, %l4 /* Correct for 0000 value */
4521: or %l4, %l3, %l3 /* Merge new value with old CSR value */
453 stx %l3, [%l2]
454
455 dec %l7
456 brnz %l7, t0_setup_next_iteration_top
457 add %l2, PCI_E_INT_MAP_STEP, %l2
458
459 ba t0_clear_mondo_seen
460 nop
461
462 !Done
463t0_done:
464 stx %g0, [%o0] ! Signal other threads that we are done
465 ba test_passed
466 nop
467
468.global t0_mondo40_handler
469t0_mondo40_handler: /* This is called from the trap handler */
470 ! $EV trig_pc_d(1, @VA(.MAIN.t0_mondo40_handler)) -> EnablePCIeIgCmd ("MSI64", eval(INTR0x60_MSI_1_NUM, 16), 0, 4, 1, *, 1 )
471 nop
472t0_mondo40_handler_kick_msi_2:
473 ! $EV trig_pc_d(1, @VA(.MAIN.t0_mondo40_handler_kick_msi_2)) -> EnablePCIeIgCmd ("MSI64", eval(INTR0x60_MSI_2_NUM, 16), 0, 4, 1, *, 1 )
474 nop
475t0_mondo40_handler_kick_msi_3:
476 ! $EV trig_pc_d(1, @VA(.MAIN.t0_mondo40_handler_kick_msi_3)) -> EnablePCIeIgCmd ("MSI64", eval(INTR0x60_MSI_3_NUM, 16), 0, 4, 1, *, 1 )
477 nop
478t0_mondo40_handler_kick_msi_4:
479 ! $EV trig_pc_d(1, @VA(.MAIN.t0_mondo40_handler_kick_msi_4)) -> EnablePCIeIgCmd ("MSI64", eval(INTR0x60_MSI_4_NUM, 16), 0, 4, 1, *, 1 )
480
481/* Wait for the new interrupts to arrive and be processed by other threads */
482#ifdef DTM_ENABLED
483 mov 800, %g7 ! Set the maximum time to wait, DTM
484#else
485 mov 200, %g7 ! Set the maximum time to wait
486#endif
487t0_mondo40_handler_loop_top:
488 brz %g7, t0_mondo40_handler_loop_timeout
489 dec %g7
490 setx mondo_seen+INTR0x60_MSI_0_EQN+24+2, %g5, %g6
491 ldub [%g6], %g5
492 brz %g5, t0_mondo40_handler_loop_top
493 ldub [%g6+1], %g5
494 brz %g5, t0_mondo40_handler_loop_top
495 ldub [%g6+2], %g5
496 brz %g5, t0_mondo40_handler_loop_top
497 nop
498/* If we fall to here, all 3 other interrupts have been processed */
499t0_mondo40_handler_retl:
500 retl
501 nop
502
503t0_mondo40_handler_loop_timeout:
504 ! $EV trig_pc_d(1, @VA(.MAIN.t0_mondo40_handler_loop_timeout)) -> printf("ERROR: T0 timeout waiting for mondos 42 thru 44 to be processed",*,1)
505 ba local_test_failed
506 nop
507
508t0_missed_mondo_41:
509 ! $EV trig_pc_d(1, @VA(.MAIN.t0_missed_mondo_41)) -> printf("ERROR: T0 missed mondo 41",*,1)
510 ba local_test_failed
511 nop
512
513t0_missed_mondo_42:
514 ! $EV trig_pc_d(1, @VA(.MAIN.t0_missed_mondo_42)) -> printf("ERROR: T0 missed mondo 42",*,1)
515 ba local_test_failed
516 nop
517
518t0_missed_mondo_43:
519 ! $EV trig_pc_d(1, @VA(.MAIN.t0_missed_mondo_43)) -> printf("ERROR: T0 missed mondo 43",*,1)
520 ba local_test_failed
521 nop
522
523t0_missed_mondo_44:
524 ! $EV trig_pc_d(1, @VA(.MAIN.t0_missed_mondo_44)) -> printf("ERROR: T0 missed mondo 44",*,1)
525 ba local_test_failed
526 nop
527
528!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
529!
530! All Threads Except 0 Start Here
531!
532!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
533
534
535t1_to_t3_main:
536 setx mondo_seen+INTR0x60_MSI_0_EQN+24+1, %l7, %i7
537 add %i7, %o1, %i7 ! add thread number to get mondo number
538
539 /* Wait for interrupt to occur. */
540t1_t3_intr_wait:
541#ifdef DTM_ENABLED
542 setx 0x400, %l1, %l2 ! DTM timeout count
543#else
544 setx 0x100, %l1, %l2 ! timeout count
545#endif
546
547t1_t3_intr_wait_loop_top:
548 ldub [%i7], %l0
549 cmp %l0, 1
550 be t1_t3_saw_mondo
551 dec %l2
552 brnz %l2, t1_t3_intr_wait_loop_top
553 nop
554
555t1_t3_timeout:
556 ! $EV trig_pc_d(1, @VA(.MAIN.t1_t3_timeout)) -> printf("ERROR: T1-T3 timeout waiting for mondo",*,1)
557 ba local_test_failed
558 nop
559
560t1_t3_saw_mondo:
561 /* Check if thread 0 has cleared the iteration count */
562 ldub [%o0], %o2
563 brz %o2, t1_t3_done
564 /* If thread 0 has cleared the "mondo seen" flag,
565 * loop again for next controller settings */
566 ldub [%i7], %l0
567 brz %l0, t1_t3_intr_wait
568 nop
569 /* Otherwise, keep looping */
570 ba t1_t3_saw_mondo
571 nop
572
573 !Done
574t1_t3_done:
575 ba test_passed
576 nop
577
578
579test_passed:
580 EXIT_GOOD
581
582local_test_failed:
583 EXIT_BAD
584
585
586
587
588/************************************************************************
589 Test case data start
590************************************************************************/
591
592.align 64
593.data
594user_data_start:
595iteration_counter: .byte 4 ! Number of controller configs left to do
596
597.align 256
598.global mondo_seen
599mondo_seen: ! One byte per mondo
600 .skip 60, 0 ! Start with virtual mondo 0 for easy math
601
602.align eval(512*1024)
603.global event_queue_base
604event_queue_base:
605 .skip 1024
606user_data_end:
607.end
608
609/************************************************************************/