Commit | Line | Data |
---|---|---|
86530b38 AT |
1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: interrupt_niutx.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define MAIN_PAGE_HV_ALSO | |
39 | ||
40 | #define ENABLE_NIU_BG_TX 1 | |
41 | #define ENABLE_NIU_BACKGROUND_PACKETS_IN_BOOT 1 | |
42 | #define NIU_BG_TX_MAC_ID 0 | |
43 | #define NIU_BG_TX_PKT_LEN 64 | |
44 | #define NIU_BG_TX_PKT_COUNT 0xa | |
45 | ||
46 | #define ENABLE_INTR0x60 1 | |
47 | ||
48 | #define INTR0x60_INITIALIZE_INT_MAN 1 | |
49 | ||
50 | #define INTR0x60_NIU_TX_IV_0 7 | |
51 | #define INTR0x60_NIU_TX_THREAD_0 1 | |
52 | #define INTR0x60_NIU_TX_DMA_0 3 | |
53 | ||
54 | #include "niu_defines.h" | |
55 | ||
56 | /* Increment the interrupt count for this thread. | |
57 | * If it is not equal to the expected count, call NIU_PktGen. | |
58 | * The call instruction will write to %o7, so preserve it in %g7 */ | |
59 | #define INTR0x60_NIU_TX_EXTRA_HANDLER \ | |
60 | setx intr_count, %g7, %g6; \ | |
61 | add %g6, %g1, %g6; \ | |
62 | ldub [%g6], %g5; \ | |
63 | inc %g5; \ | |
64 | stb %g5, [%g6]; \ | |
65 | setx intr_expect, %g7, %g6; \ | |
66 | add %g6, %g1, %g6; \ | |
67 | ldub [%g6], %g7; \ | |
68 | cmp %g7, %g5; \ | |
69 | be %xcc, 1f; \ | |
70 | mov %o7, %g7; \ | |
71 | call NIU_PktGenTx; nop; \ | |
72 | mov %g7, %o7; \ | |
73 | 1: | |
74 | ||
75 | #include "interrupt0x60_defines.h" | |
76 | ||
77 | ||
78 | #define SYNC_THREADS 1 | |
79 | ||
80 | #include "hboot.s" | |
81 | ||
82 | #include "interrupt0x60_handler.s" | |
83 | ||
84 | ||
85 | #include "niu_pktgen.s" | |
86 | ||
87 | /************************************************************************ | |
88 | Test case code start | |
89 | ************************************************************************/ | |
90 | SECTION .MAIN | |
91 | .text | |
92 | .global main | |
93 | ||
94 | main: | |
95 | ta T_CHANGE_HPRIV | |
96 | ||
97 | get_thread_id: | |
98 | ldxa [%g0] ASI_INTR_ID, %g1 ! Get the thread number | |
99 | brz %g1, t0_main | |
100 | nop | |
101 | ba intr_wait | |
102 | nop | |
103 | ||
104 | /**************************************************************/ | |
105 | /* Thread 0 */ | |
106 | t0_main: | |
107 | nop | |
108 | ||
109 | ||
110 | ||
111 | /* We are all done sending interrupts, so go to the wait loop */ | |
112 | ba intr_wait | |
113 | nop | |
114 | ||
115 | ||
116 | /**************************************************************/ | |
117 | /* Common wait loop for all threads */ | |
118 | intr_wait: | |
119 | setx intr_expect, %l1, %g4 | |
120 | add %g4, %g1, %g4 ! address of expected interrupt count for this thread | |
121 | ldub [%g4], %g4 | |
122 | ||
123 | setx intr_count, %l1, %g3 | |
124 | add %g3, %g1, %g3 ! address of interrupt count for this thread | |
125 | ||
126 | best_set_reg(100, %l1, %g2) ! timeout count | |
127 | ||
128 | intr_wait_loop_top: | |
129 | /* For debug, get the values of certain NIU registers */ | |
130 | best_set_reg(mpeval(TDMC_INTR_DBG+(NIU_TX_DMA_NUM*TDMC_STEP)), | |
131 | %l1, %l0) | |
132 | ldxa [%l0]ASI_PRIMARY_LITTLE, %l5 | |
133 | ||
134 | /* Check whether we have received the desired number of interrupts */ | |
135 | ldub [%g3], %g5 | |
136 | cmp %g5, %g4 | |
137 | be thread_passed | |
138 | dec %g2 | |
139 | ||
140 | cmp %g2, 0 | |
141 | bne intr_wait_loop_top | |
142 | nop | |
143 | ||
144 | intr_timeout: | |
145 | !$EV trig_pc_d(1, @VA(.MAIN.intr_timeout)) -> printf("ERROR: Timeout waiting for interrupt",*,1) | |
146 | EXIT_BAD | |
147 | ||
148 | thread_passed: | |
149 | EXIT_GOOD | |
150 | ||
151 | local_test_failed: | |
152 | EXIT_BAD | |
153 | ||
154 | ||
155 | ||
156 | /************************************************************************ | |
157 | Test case data start | |
158 | ************************************************************************/ | |
159 | ||
160 | .align 1024 | |
161 | .data | |
162 | user_data_start: | |
163 | user_data_end: | |
164 | ||
165 | ||
166 | SECTION .HTRAPS | |
167 | .data | |
168 | .global intr_count | |
169 | intr_count: | |
170 | .byte 0x0 ! interrupt count for thread 0 | |
171 | .byte 0x0 ! interrupt count for thread 1 | |
172 | .byte 0x0 ! interrupt count for thread 2 | |
173 | .byte 0x0 ! interrupt count for thread 3 | |
174 | .byte 0x0 ! interrupt count for thread 4 | |
175 | .byte 0x0 ! interrupt count for thread 5 | |
176 | .byte 0x0 ! interrupt count for thread 6 | |
177 | .byte 0x0 ! interrupt count for thread 7 | |
178 | ||
179 | .global intr_expect | |
180 | intr_expect: | |
181 | .byte 0x0 ! expected interrupt count for thread 0 | |
182 | .byte 0x3 ! expected interrupt count for thread 1 | |
183 | .byte 0x0 ! expected interrupt count for thread 2 | |
184 | .byte 0x0 ! expected interrupt count for thread 3 | |
185 | .byte 0x0 ! expected interrupt count for thread 4 | |
186 | .byte 0x0 ! expected interrupt count for thread 5 | |
187 | .byte 0x0 ! expected interrupt count for thread 6 | |
188 | .byte 0x0 ! expected interrupt count for thread 7 | |
189 | .end | |
190 | ||
191 | /************************************************************************/ |