[OpenSPARC-T2-DV] / verif / diag / assembly / arch / prm / tso / tso_directed / tso_n1_dekker1.s

/*
* ========== Copyright Header Begin ==========================================
* 
* OpenSPARC T2 Processor File: tso_n1_dekker1.s
* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
*
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
*
* For the avoidance of doubt, and except that if any non-GPL license 
* choice is available it will apply instead, Sun elects to use only 
* the General Public License version 2 (GPLv2) at this time for any 
* software where a choice of GPL license versions is made 
* available with the language indicating that GPLv2 or any later version 
* may be used, or where a choice of which version of the GPL is applied is 
* otherwise unspecified. 
*
* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 
* CA 95054 USA or visit www.sun.com if you need additional information or 
* have any questions. 
*
* 
* ========== Copyright Header End ============================================
*/
#define global_cnt_reg	  		%o0
#define data_base_reg	  		%o1
#define addrA_reg 			%o2
#define addrB_reg 			%o3
#define to_reg	  			%o4
#define my_id_reg	  		%o5
#define test_reg	  		%o6

#define backoff_cnt	  		%i4
#define backoff_hlp1  			%i5

#define TIMEOUT 	  		0x100
#define ITERATIONS 	  		0x10

#include "hboot.s"

.global main
main:

	setx    addrA, 	%l0, 	addrA_reg		! 
	setx    addrB, 	%l0, 	addrB_reg		! 
        set     TIMEOUT,	to_reg         		! set timeout count 
	inc 	to_reg
	mov	to_reg, backoff_hlp1
	dec 	to_reg
        set     ITERATIONS,	global_cnt_reg 		! 
        mov     %g0, 		my_id_reg


th_fork(th_main,%l0)

th_main_0:
        add     my_id_reg, 0x20, my_id_reg	! this is my ID address

getlock0:
        set     1, test_reg       		! load the swap data register
        st    	test_reg, [addrA_reg]		! try to acquire lock
	membar 0x40
        ld    	[addrB_reg], test_reg		! try to acquire lock
	tst	test_reg
	be	gotlock0
        nop

	st	%g0,  [addrA_reg]		! release
	membar 0x40

        deccc   to_reg         			! dec timeout count
        bne     getlock0               		! branch if no timeout
        nop
        ba,a    bad_end
        nop

gotlock0:						! do something
	setx    protected_area,	%l0, data_base_reg	! the data area

	set 	10, %l0
	add	my_id_reg, data_base_reg, %i1
loop01:
	st 	%i1, [data_base_reg]  			! store my ID in there
	add	data_base_reg, 4, data_base_reg 	! increment the address
	add	%i1, 1, %i1
	deccc	%l0
	bne 	loop01					! repeat
	nop

	set 	10, %l0
loop02:
	sub	data_base_reg, 4, data_base_reg 
	sub	%i1, 1, %i1
	ld 	[data_base_reg], %l1			! read the data area
	subcc 	%l1, %i1, %l1				! should be same is i1
	bne	bad_end
	nop
	deccc	%l0					! repeat
	bne 	loop02
	nop

clearlock0:
        st        %g0, [addrA_reg]            		! unlock
	membar 0x40

	mov  to_reg, backoff_cnt
backoff_loop01:
	nop;nop;nop;nop;				! backoff
	deccc backoff_cnt
	bne backoff_loop01
	nop

        set     TIMEOUT, to_reg         		! set timeout count again

check_done0:
	deccc	global_cnt_reg
        be	good_end
	nop
	ba	getlock0
	nop

th_main_1:
th_main_4:
        add     my_id_reg, 0x24, my_id_reg

getlock1:
        set     1, test_reg       	! load the swap data register
        st    	test_reg, [addrB_reg]	! try to acquire lock addr B
	membar 0x40
        ld    	[addrA_reg], test_reg	! try to acquire lock addr A
	tst	test_reg
	be	gotlock1
        nop

	st	%g0,  [addrB_reg]	! release
	membar 0x40

	sub backoff_hlp1, to_reg, backoff_cnt
backoff_loop10:
	nop;nop;nop;nop;		! wait - quasi exponential backoff
	deccc backoff_cnt		! well, actually kinda linear.
	bne backoff_loop10
	nop

        deccc   to_reg       		! dec timeout count
        bne     getlock1       		! branch if no timeout
        nop
        ba,a    bad_end
        nop

gotlock1:				! do something
	setx    protected_area,	%l0, data_base_reg	! the data area

	set 	10, %l0
	add	my_id_reg, data_base_reg, %i1
loop11:
	st 	%i1, [data_base_reg]  	! store my ID in there
	add	data_base_reg, 4, data_base_reg 	! increment the address
	add	%i1, 1, %i1
	deccc	%l0
	bne 	loop11			! repeat
	nop

	set 	10, %l0
loop12:
	sub	data_base_reg, 4, data_base_reg 
	sub	%i1, 1, %i1
	ld 	[data_base_reg], %l1	! read the data area
	subcc 	%l1, %i1, %l1		! should be same is i1
	bne	bad_end
	nop
	deccc	%l0			! repeat
	bne 	loop12
	nop


clearlock1:
        st        %g0, [addrB_reg]     	! unlock
	membar 0x40

        set     TIMEOUT, to_reg        	! set timeout count again

check_done1:
	deccc	global_cnt_reg
        be	good_end
	nop
	ba	getlock1
	nop

good_end:
        ta      T_GOOD_TRAP
bad_end:
        ta      T_BAD_TRAP

!==========================


SECTION .MY_DATA0  TEXT_VA=0xf0100000, DATA_VA=0xd0100000
attr_data {
        Name = .MY_DATA0,
        VA= 0x0d0100000
        RA= 0x1d0100000
        PA= ra2pa(0x1d0100000,0),
        part_0_ctx_nonzero_tsb_config_0,
        TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
        TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
        TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
        }

attr_text {
        Name = .MY_DATA0,
        VA= 0x0f0100000
        RA= 0x1f0100000
        PA= ra2pa(0x1f0100000,0),
        part_0_ctx_nonzero_tsb_config_0,
        TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
        TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
        TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
        }

	.data

.global addrA
.global addrB
.align 0x4
addrA:
	.word	0x0

.skip 0x1000
.align 0x4
addrB:
	.word	0x0

SECTION .MY_DATA1  TEXT_VA=0xf1110000, DATA_VA=0xd1110000
attr_data {
        Name = .MY_DATA1,
        VA= 0x0d1110000,
        RA= 0x1d1110000,
        PA= ra2pa(0x1d1110000,0),
        part_0_ctx_nonzero_tsb_config_0,
        TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
        TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
        TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
        }

attr_text {
        Name = .MY_DATA1,
        VA= 0x0f1110000,
        RA= 0x1f1110000,
        PA= ra2pa(0x1f1110000,0),
        part_0_ctx_nonzero_tsb_config_0,
        TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
        TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
        TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
        }

	.data
.global protected_area
protected_area:
	.word	0xbeef
	.skip 0x1000
	.word	0xbeef
	
.end
Commit	Line	Data
86530b38 AT	1	/*
	2	* ========== Copyright Header Begin ==========================================
	3	*
	4	* OpenSPARC T2 Processor File: tso_n1_dekker1.s
	5	* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
	6	* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
	7	*
	8	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; version 2 of the License.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	22	*
	23	* For the avoidance of doubt, and except that if any non-GPL license
	24	* choice is available it will apply instead, Sun elects to use only
	25	* the General Public License version 2 (GPLv2) at this time for any
	26	* software where a choice of GPL license versions is made
	27	* available with the language indicating that GPLv2 or any later version
	28	* may be used, or where a choice of which version of the GPL is applied is
	29	* otherwise unspecified.
	30	*
	31	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
	32	* CA 95054 USA or visit www.sun.com if you need additional information or
	33	* have any questions.
	34	*
	35	*
	36	* ========== Copyright Header End ============================================
	37	*/
	38	#define global_cnt_reg %o0
	39	#define data_base_reg %o1
	40	#define addrA_reg %o2
	41	#define addrB_reg %o3
	42	#define to_reg %o4
	43	#define my_id_reg %o5
	44	#define test_reg %o6
	45
	46	#define backoff_cnt %i4
	47	#define backoff_hlp1 %i5
	48
	49	#define TIMEOUT 0x100
	50	#define ITERATIONS 0x10
	51
	52	#include "hboot.s"
	53
	54	.global main
	55	main:
	56
	57	setx addrA, %l0, addrA_reg !
	58	setx addrB, %l0, addrB_reg !
	59	set TIMEOUT, to_reg ! set timeout count
	60	inc to_reg
	61	mov to_reg, backoff_hlp1
	62	dec to_reg
	63	set ITERATIONS, global_cnt_reg !
	64	mov %g0, my_id_reg
65
66
67	th_fork(th_main,%l0)
68
69	th_main_0:
70	add my_id_reg, 0x20, my_id_reg ! this is my ID address
71
72	getlock0:
73	set 1, test_reg ! load the swap data register
74	st test_reg, [addrA_reg] ! try to acquire lock
75	membar 0x40
76	ld [addrB_reg], test_reg ! try to acquire lock
77	tst test_reg
78	be gotlock0
79	nop
80
81	st %g0, [addrA_reg] ! release
82	membar 0x40
83
84	deccc to_reg ! dec timeout count
85	bne getlock0 ! branch if no timeout
86	nop
87	ba,a bad_end
88	nop
89
90	gotlock0: ! do something
91	setx protected_area, %l0, data_base_reg ! the data area
92
93	set 10, %l0
94	add my_id_reg, data_base_reg, %i1
95	loop01:
96	st %i1, [data_base_reg] ! store my ID in there
97	add data_base_reg, 4, data_base_reg ! increment the address
98	add %i1, 1, %i1
99	deccc %l0
100	bne loop01 ! repeat
101	nop
102
103	set 10, %l0
104	loop02:
105	sub data_base_reg, 4, data_base_reg
106	sub %i1, 1, %i1
107	ld [data_base_reg], %l1 ! read the data area
108	subcc %l1, %i1, %l1 ! should be same is i1
109	bne bad_end
110	nop
111	deccc %l0 ! repeat
112	bne loop02
113	nop
114
115	clearlock0:
116	st %g0, [addrA_reg] ! unlock
117	membar 0x40
118
119	mov to_reg, backoff_cnt
120	backoff_loop01:
121	nop;nop;nop;nop; ! backoff
122	deccc backoff_cnt
123	bne backoff_loop01
124	nop
125
126	set TIMEOUT, to_reg ! set timeout count again
127
128	check_done0:
129	deccc global_cnt_reg
130	be good_end
131	nop
132	ba getlock0
133	nop
134
135	th_main_1:
136	th_main_4:
137	add my_id_reg, 0x24, my_id_reg
138
139	getlock1:
140	set 1, test_reg ! load the swap data register
141	st test_reg, [addrB_reg] ! try to acquire lock addr B
142	membar 0x40
143	ld [addrA_reg], test_reg ! try to acquire lock addr A
144	tst test_reg
145	be gotlock1
146	nop
147
148	st %g0, [addrB_reg] ! release
149	membar 0x40
150
151	sub backoff_hlp1, to_reg, backoff_cnt
152	backoff_loop10:
153	nop;nop;nop;nop; ! wait - quasi exponential backoff
154	deccc backoff_cnt ! well, actually kinda linear.
155	bne backoff_loop10
156	nop
157
158	deccc to_reg ! dec timeout count
159	bne getlock1 ! branch if no timeout
160	nop
161	ba,a bad_end
162	nop
163
164	gotlock1: ! do something
165	setx protected_area, %l0, data_base_reg ! the data area
166
167	set 10, %l0
168	add my_id_reg, data_base_reg, %i1
169	loop11:
170	st %i1, [data_base_reg] ! store my ID in there
171	add data_base_reg, 4, data_base_reg ! increment the address
172	add %i1, 1, %i1
173	deccc %l0
174	bne loop11 ! repeat
175	nop
176
177	set 10, %l0
178	loop12:
179	sub data_base_reg, 4, data_base_reg
180	sub %i1, 1, %i1
181	ld [data_base_reg], %l1 ! read the data area
182	subcc %l1, %i1, %l1 ! should be same is i1
183	bne bad_end
184	nop
185	deccc %l0 ! repeat
186	bne loop12
187	nop
188
189
190	clearlock1:
191	st %g0, [addrB_reg] ! unlock
192	membar 0x40
193
194	set TIMEOUT, to_reg ! set timeout count again
195
196	check_done1:
197	deccc global_cnt_reg
198	be good_end
199	nop
200	ba getlock1
201	nop
202
203	good_end:
204	ta T_GOOD_TRAP
205	bad_end:
206	ta T_BAD_TRAP
207
208	!==========================
209
210
211	SECTION .MY_DATA0 TEXT_VA=0xf0100000, DATA_VA=0xd0100000
212	attr_data {
213	Name = .MY_DATA0,
214	VA= 0x0d0100000
215	RA= 0x1d0100000
216	PA= ra2pa(0x1d0100000,0),
217	part_0_ctx_nonzero_tsb_config_0,
218	TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
219	TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
220	TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
221	}
222
223	attr_text {
224	Name = .MY_DATA0,
225	VA= 0x0f0100000
226	RA= 0x1f0100000
227	PA= ra2pa(0x1f0100000,0),
228	part_0_ctx_nonzero_tsb_config_0,
229	TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
230	TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
231	TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
232	}
233
234	.data
235
236	.global addrA
237	.global addrB
238	.align 0x4
239	addrA:
240	.word 0x0
241
242	.skip 0x1000
243	.align 0x4
244	addrB:
245	.word 0x0
246
247	SECTION .MY_DATA1 TEXT_VA=0xf1110000, DATA_VA=0xd1110000
248	attr_data {
249	Name = .MY_DATA1,
250	VA= 0x0d1110000,
251	RA= 0x1d1110000,
252	PA= ra2pa(0x1d1110000,0),
253	part_0_ctx_nonzero_tsb_config_0,
254	TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
255	TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
256	TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
257	}
258
259	attr_text {
260	Name = .MY_DATA1,
261	VA= 0x0f1110000,
262	RA= 0x1f1110000,
263	PA= ra2pa(0x1f1110000,0),
264	part_0_ctx_nonzero_tsb_config_0,
265	TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
266	TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
267	TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
268	}
269
270	.data
271	.global protected_area
272	protected_area:
273	.word 0xbeef
274	.skip 0x1000
275	.word 0xbeef
276
277	.end