[OpenSPARC-T2-DV] / verif / diag / assembly / arch / prm / tso / tso_directed / tso_n1_dekker10.s

/*
* ========== Copyright Header Begin ==========================================
* 
* OpenSPARC T2 Processor File: tso_n1_dekker10.s
* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
*
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
*
* For the avoidance of doubt, and except that if any non-GPL license 
* choice is available it will apply instead, Sun elects to use only 
* the General Public License version 2 (GPLv2) at this time for any 
* software where a choice of GPL license versions is made 
* available with the language indicating that GPLv2 or any later version 
* may be used, or where a choice of which version of the GPL is applied is 
* otherwise unspecified. 
*
* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 
* CA 95054 USA or visit www.sun.com if you need additional information or 
* have any questions. 
*
* 
* ========== Copyright Header End ============================================
*/
#define global_cnt_reg	  		%o0
#define data_base_reg	  		%o1
#define addrA_reg 			%o2
#define addrB_reg 			%o3
#define to_reg	  			%o4
#define my_id_reg	  		%o5
#define test_reg	  		%o6

#define backoff_cnt	  		%i4
#define backoff_hlp1  			%i5

#define TIMEOUT 	  		0x100
#define ITERATIONS 	  		0x10

#include "hboot.s"

.global main
main:

	setx    addrA, 	%l0, 	addrA_reg		
	setx    addrB, 	%l0, 	addrB_reg		
        set     TIMEOUT,	to_reg         	! set timeout count 
	inc 	to_reg
	mov	to_reg, backoff_hlp1
	dec 	to_reg
        set     ITERATIONS,	global_cnt_reg 	
        mov     %g0, 		my_id_reg


th_fork(th_main,%l0)

th_main_0:
        add     my_id_reg, 0x20, my_id_reg	! this is my ID address

getlock0:
        set     1, test_reg       		! load the swap data register
        cas    	[addrA_reg], %g0, test_reg	! try to acquire lock A
        ld    	[addrB_reg], test_reg		! try to acquire lock B
	tst	test_reg
	be	gotlock0
        nop

	st	%g0,  [addrA_reg]		! release
	membar 0x40

        deccc   to_reg         			! dec timeout count
        bne     getlock0               		! branch if no timeout
        nop
        ba,a    bad_end
        nop

gotlock0:					! do something
	setx    protected_area,	%l0, data_base_reg

	set 	10, %l0
	add	my_id_reg, data_base_reg, %i1
loop01:
	st 	%i1, [data_base_reg]  		! store my ID in there
	add	data_base_reg, 4, data_base_reg	! increment the address
	add	%i1, 1, %i1
	deccc	%l0
	bne 	loop01				! repeat
	nop

	set 	10, %l0
loop02:
	sub	data_base_reg, 4, data_base_reg 
	sub	%i1, 1, %i1
	ld 	[data_base_reg], %l1		! read the data area
	subcc 	%l1, %i1, %l1			! should be same is i1
	bne	bad_end
	nop
	deccc	%l0				! repeat
	bne 	loop02
	nop

clearlock0:
        st        %g0, [addrA_reg]            	! unlock
	membar 0x40

	mov  to_reg, backoff_cnt
backoff_loop01:
	nop;nop;nop;nop;			! backoff
	deccc backoff_cnt
	bne backoff_loop01
	nop

        set     TIMEOUT, to_reg         	! set timeout count again

check_done0:					! check to iterate
	deccc	global_cnt_reg			! or to finish
        be	good_end
	nop
	ba	getlock0
	nop

th_main_1:
th_main_4:
        add     my_id_reg, 0x24, my_id_reg

getlock1:
        set     1, test_reg       		! load the swap data register
        cas    	[addrB_reg], %g0, test_reg	! try to acquire lock
        ld    	[addrA_reg], test_reg		! try to acquire lock
	tst	test_reg
	be	gotlock1
        nop

	st	%g0,  [addrB_reg]		! release
	membar 0x40

	sub backoff_hlp1, to_reg, backoff_cnt
backoff_loop10:
	nop;nop;nop;nop;			! quasi exponential backoff
	deccc backoff_cnt			! well, kinda linear.
	bne backoff_loop10
	nop

        deccc   to_reg         			! dec timeout count
        bne     getlock1               		! branch if no timeout
        nop
        ba,a    bad_end
        nop

gotlock1:					! do something
	setx    protected_area,	%l0, data_base_reg

	set 	10, %l0
	add	my_id_reg, data_base_reg, %i1
loop11:
	st 	%i1, [data_base_reg]  		! store my ID in there
	add	data_base_reg, 4, data_base_reg	! increment the address
	add	%i1, 1, %i1
	deccc	%l0
	bne 	loop11				! repeat
	nop

	set 	10, %l0
loop12:
	sub	data_base_reg, 4, data_base_reg 
	sub	%i1, 1, %i1
	ld 	[data_base_reg], %l1		! read the data area
	subcc 	%l1, %i1, %l1			! should be same as i1
	bne	bad_end
	nop
	deccc	%l0				! repeat
	bne 	loop12
	nop

clearlock1:
        st        %g0, [addrB_reg]     		! unlock
	membar 0x40

        set     TIMEOUT, to_reg         	! set timeout count again

check_done1:					! check whether to
	deccc	global_cnt_reg			! iterate or finish
        be	good_end
	nop
	ba	getlock1
	nop

good_end:
        ta      T_GOOD_TRAP
bad_end:
        ta      T_BAD_TRAP

!==========================


SECTION .MY_DATA0  TEXT_VA=0xf0100000, DATA_VA=0xd0100000
attr_data {
        Name = .MY_DATA0,
        VA= 0x0d0100000
        RA= 0x1d0100000
        PA= ra2pa(0x1d0100000,0),
        part_0_ctx_nonzero_tsb_config_0,
        TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
        TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
        TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
        }

attr_text {
        Name = .MY_DATA0,
        VA= 0x0f0100000
        RA= 0x1f0100000
        PA= ra2pa(0x1f0100000,0),
        part_0_ctx_nonzero_tsb_config_0,
        TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
        TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
        TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
        }

	.data

.global addrA
.global addrB
.align 0x4
addrA:
	.word	0x0

.skip 0x1000
.align 0x4
addrB:
	.word	0x0

SECTION .MY_DATA1  TEXT_VA=0xf1110000, DATA_VA=0xd1110000
attr_data {
        Name = .MY_DATA1,
        VA= 0x0d1110000,
        RA= 0x1d1110000,
        PA= ra2pa(0x1d1110000,0),
        part_0_ctx_nonzero_tsb_config_0,
        TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
        TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
        TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
        }

attr_text {
        Name = .MY_DATA1,
        VA= 0x0f1110000,
        RA= 0x1f1110000,
        PA= ra2pa(0x1f1110000,0),
        part_0_ctx_nonzero_tsb_config_0,
        TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
        TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
        TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
        }

	.data
.global protected_area
protected_area:
	.word	0xbeef
	.skip 0x1000
	.word	0xbeef
	
.end
Commit	Line	Data
86530b38 AT	1	/*
	2	* ========== Copyright Header Begin ==========================================
	3	*
	4	* OpenSPARC T2 Processor File: tso_n1_dekker10.s
	5	* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
	6	* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
	7	*
	8	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; version 2 of the License.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	22	*
	23	* For the avoidance of doubt, and except that if any non-GPL license
	24	* choice is available it will apply instead, Sun elects to use only
	25	* the General Public License version 2 (GPLv2) at this time for any
	26	* software where a choice of GPL license versions is made
	27	* available with the language indicating that GPLv2 or any later version
	28	* may be used, or where a choice of which version of the GPL is applied is
	29	* otherwise unspecified.
	30	*
	31	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
	32	* CA 95054 USA or visit www.sun.com if you need additional information or
	33	* have any questions.
	34	*
	35	*
	36	* ========== Copyright Header End ============================================
	37	*/
	38	#define global_cnt_reg %o0
	39	#define data_base_reg %o1
	40	#define addrA_reg %o2
	41	#define addrB_reg %o3
	42	#define to_reg %o4
	43	#define my_id_reg %o5
	44	#define test_reg %o6
	45
	46	#define backoff_cnt %i4
	47	#define backoff_hlp1 %i5
	48
	49	#define TIMEOUT 0x100
	50	#define ITERATIONS 0x10
	51
	52	#include "hboot.s"
	53
	54	.global main
	55	main:
	56
	57	setx addrA, %l0, addrA_reg
	58	setx addrB, %l0, addrB_reg
	59	set TIMEOUT, to_reg ! set timeout count
	60	inc to_reg
	61	mov to_reg, backoff_hlp1
	62	dec to_reg
	63	set ITERATIONS, global_cnt_reg
	64	mov %g0, my_id_reg
65
66
67	th_fork(th_main,%l0)
68
69	th_main_0:
70	add my_id_reg, 0x20, my_id_reg ! this is my ID address
71
72	getlock0:
73	set 1, test_reg ! load the swap data register
74	cas [addrA_reg], %g0, test_reg ! try to acquire lock A
75	ld [addrB_reg], test_reg ! try to acquire lock B
76	tst test_reg
77	be gotlock0
78	nop
79
80	st %g0, [addrA_reg] ! release
81	membar 0x40
82
83	deccc to_reg ! dec timeout count
84	bne getlock0 ! branch if no timeout
85	nop
86	ba,a bad_end
87	nop
88
89	gotlock0: ! do something
90	setx protected_area, %l0, data_base_reg
91
92	set 10, %l0
93	add my_id_reg, data_base_reg, %i1
94	loop01:
95	st %i1, [data_base_reg] ! store my ID in there
96	add data_base_reg, 4, data_base_reg ! increment the address
97	add %i1, 1, %i1
98	deccc %l0
99	bne loop01 ! repeat
100	nop
101
102	set 10, %l0
103	loop02:
104	sub data_base_reg, 4, data_base_reg
105	sub %i1, 1, %i1
106	ld [data_base_reg], %l1 ! read the data area
107	subcc %l1, %i1, %l1 ! should be same is i1
108	bne bad_end
109	nop
110	deccc %l0 ! repeat
111	bne loop02
112	nop
113
114	clearlock0:
115	st %g0, [addrA_reg] ! unlock
116	membar 0x40
117
118	mov to_reg, backoff_cnt
119	backoff_loop01:
120	nop;nop;nop;nop; ! backoff
121	deccc backoff_cnt
122	bne backoff_loop01
123	nop
124
125	set TIMEOUT, to_reg ! set timeout count again
126
127	check_done0: ! check to iterate
128	deccc global_cnt_reg ! or to finish
129	be good_end
130	nop
131	ba getlock0
132	nop
133
134	th_main_1:
135	th_main_4:
136	add my_id_reg, 0x24, my_id_reg
137
138	getlock1:
139	set 1, test_reg ! load the swap data register
140	cas [addrB_reg], %g0, test_reg ! try to acquire lock
141	ld [addrA_reg], test_reg ! try to acquire lock
142	tst test_reg
143	be gotlock1
144	nop
145
146	st %g0, [addrB_reg] ! release
147	membar 0x40
148
149	sub backoff_hlp1, to_reg, backoff_cnt
150	backoff_loop10:
151	nop;nop;nop;nop; ! quasi exponential backoff
152	deccc backoff_cnt ! well, kinda linear.
153	bne backoff_loop10
154	nop
155
156	deccc to_reg ! dec timeout count
157	bne getlock1 ! branch if no timeout
158	nop
159	ba,a bad_end
160	nop
161
162	gotlock1: ! do something
163	setx protected_area, %l0, data_base_reg
164
165	set 10, %l0
166	add my_id_reg, data_base_reg, %i1
167	loop11:
168	st %i1, [data_base_reg] ! store my ID in there
169	add data_base_reg, 4, data_base_reg ! increment the address
170	add %i1, 1, %i1
171	deccc %l0
172	bne loop11 ! repeat
173	nop
174
175	set 10, %l0
176	loop12:
177	sub data_base_reg, 4, data_base_reg
178	sub %i1, 1, %i1
179	ld [data_base_reg], %l1 ! read the data area
180	subcc %l1, %i1, %l1 ! should be same as i1
181	bne bad_end
182	nop
183	deccc %l0 ! repeat
184	bne loop12
185	nop
186
187	clearlock1:
188	st %g0, [addrB_reg] ! unlock
189	membar 0x40
190
191	set TIMEOUT, to_reg ! set timeout count again
192
193	check_done1: ! check whether to
194	deccc global_cnt_reg ! iterate or finish
195	be good_end
196	nop
197	ba getlock1
198	nop
199
200	good_end:
201	ta T_GOOD_TRAP
202	bad_end:
203	ta T_BAD_TRAP
204
205	!==========================
206
207
208	SECTION .MY_DATA0 TEXT_VA=0xf0100000, DATA_VA=0xd0100000
209	attr_data {
210	Name = .MY_DATA0,
211	VA= 0x0d0100000
212	RA= 0x1d0100000
213	PA= ra2pa(0x1d0100000,0),
214	part_0_ctx_nonzero_tsb_config_0,
215	TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
216	TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
217	TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
218	}
219
220	attr_text {
221	Name = .MY_DATA0,
222	VA= 0x0f0100000
223	RA= 0x1f0100000
224	PA= ra2pa(0x1f0100000,0),
225	part_0_ctx_nonzero_tsb_config_0,
226	TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
227	TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
228	TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
229	}
230
231	.data
232
233	.global addrA
234	.global addrB
235	.align 0x4
236	addrA:
237	.word 0x0
238
239	.skip 0x1000
240	.align 0x4
241	addrB:
242	.word 0x0
243
244	SECTION .MY_DATA1 TEXT_VA=0xf1110000, DATA_VA=0xd1110000
245	attr_data {
246	Name = .MY_DATA1,
247	VA= 0x0d1110000,
248	RA= 0x1d1110000,
249	PA= ra2pa(0x1d1110000,0),
250	part_0_ctx_nonzero_tsb_config_0,
251	TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
252	TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
253	TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
254	}
255
256	attr_text {
257	Name = .MY_DATA1,
258	VA= 0x0f1110000,
259	RA= 0x1f1110000,
260	PA= ra2pa(0x1f1110000,0),
261	part_0_ctx_nonzero_tsb_config_0,
262	TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
263	TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
264	TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
265	}
266
267	.data
268	.global protected_area
269	protected_area:
270	.word 0xbeef
271	.skip 0x1000
272	.word 0xbeef
273
274	.end