Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / arch / prm / tso / tso_directed / tso_n1_dekker9.pal
CommitLineData
86530b38
AT
1:
2:#define addrA_reg %l0
3:#define turn_reg %l1
4:#define alive_reg %l2
5:#define data_base_reg %l3
6:#define my_id_reg %l4
7:#define global_cnt_reg %l5
8:#define prot_area_reg %l6
9:
10:#define test_reg1 %i0
11:#define test_reg2 %i1
12:#define test_reg3 %i2
13:#define temp_reg1 %i3
14:
15:#define TIMEOUT 0x1000
16:#define ITERATIONS 0x10
17:
18:#include "hboot.s"
19:
20:.global main
21:main:
22:
23:th_fork(th_main,test_reg1)
24:
25$proc_num = 8;
26if(scalar(@ARGV)){
27 $proc_num = $ARGV[0];
28 if($proc_num >8){
29:#define ITERATIONS 0x2
30 }
31}
32
33for ( $c = 0; $c < $proc_num; $c++ ){
34$offs = 4 * $c; # thread's own offset
35
36:th_main_${c}:
37: setx addrA, test_reg1, addrA_reg
38: add addrA_reg, ${offs}, temp_reg1
39: setx alive, test_reg1, alive_reg
40: setx turn, test_reg1, turn_reg
41: setx prot_area, test_reg1, prot_area_reg
42: set ITERATIONS, global_cnt_reg
43: set ${c}, my_id_reg ! my ID
44:
45:getlock${c}:
46: set 1, test_reg1 ! store 1 in lock area
47: st test_reg1, [alive_reg + ${offs}] !
48: cas [temp_reg1], %g0, test_reg1
49:! NOTE: no need for membar after cas.
50:
51: mov %g0, test_reg2
52for ( $k = 0; $k < ${proc_num} * 4; $k = $k + 4) {
53: ld [addrA_reg + ${k}], test_reg1 ! accumulate flags
54: add test_reg1, test_reg2, test_reg2 ! in test_reg2
55}
56:
57: subcc test_reg2, 0x1, %g0 ! if 1 -> gotlock
58: be gotlock${c}
59: nop
60:
61: st %g0, [addrA_reg + ${offs}] ! else release.
62: ! note alive is still 1
63:
64:wait_turn${c}: ! while turn not mine
65: ld [turn_reg], test_reg3 ! read the turn reg.
66: subcc my_id_reg, test_reg3, %g0 ! and wait
67: bne wait_turn${c}
68: nop
69: ba getlock${c}
70: nop
71:
72:gotlock${c}: ! do something
73: set 1, test_reg1 ! store 1 into lock area
74: st test_reg1, [addrA_reg + ${offs}] !
75:
76: ld [prot_area_reg], test_reg1
77: inc test_reg1
78: st test_reg1, [prot_area_reg]
79:
80: ld [prot_area_reg + 0xc], test_reg1
81: inc test_reg1
82: st test_reg1, [prot_area_reg + 0xc]
83:
84: ld [prot_area_reg + 0x10], test_reg1
85: inc test_reg1
86: st test_reg1, [prot_area_reg + 0x10]
87:
88: ld [prot_area_reg + 0x1c], test_reg1
89: inc test_reg1
90: st test_reg1, [prot_area_reg + 0x1c]
91:
92: ld [prot_area_reg + 0x20], test_reg1
93: inc test_reg1
94: st test_reg1, [prot_area_reg + 0x20]
95:
96:clearlock${c}: ! takes some work
97for($next = ($c+1) % ${proc_num}; $next != $c; $next = ($next+1) % ${proc_num}){
98$tempoffs = 4 * $next;
99: mov ${next}, test_reg2 ! find next alive
100: ld [alive_reg + ${tempoffs}], test_reg1
101: brnz test_reg1, foundnext${c}
102: nop
103}
104:foundnext${c}: ! give it the turn
105: st test_reg2, [turn_reg]
106:
107:check_done${c}: ! check if done
108: deccc global_cnt_reg
109: be will_release${c}
110: nop
111: st %g0, [addrA_reg + ${offs}] ! release...
112: ba getlock${c} ! iterate
113: nop
114:will_release${c}:
115: st %g0, [alive_reg + ${offs}] ! I am out of the game
116: st %g0, [addrA_reg + ${offs}] ! release...
117: ba good_end
118: nop
119:
120}
121:!---------------------------------------------------------------------
122:
123:good_end:
124: ta T_GOOD_TRAP
125:bad_end:
126: ta T_BAD_TRAP
127:
128:!==========================
129:
130:
131:SECTION .MY_DATA0 TEXT_VA=0xf0100000, DATA_VA=0xd0100000
132:attr_data {
133: Name = .MY_DATA0,
134: VA= 0x0d0100000,
135: RA= 0x1d0100000,
136: PA= ra2pa(0x1d0100000,0),
137: part_0_ctx_nonzero_tsb_config_0,
138: TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
139: TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
140: TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
141: }
142:
143:attr_text {
144: Name = .MY_DATA0,
145: VA= 0x0f0100000,
146: RA= 0x1f0100000,
147: PA= ra2pa(0x1f0100000,0),
148: part_0_ctx_nonzero_tsb_config_0,
149: TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
150: TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
151: TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
152: }
153:
154: .data
155:
156:.global addrA
157:.global turn
158:.align 0x4
159:addrA:
160for ( $k = 0; $k < 32; $k++) {
161: .word 0x0
162: .word 0x0
163}
164:
165:.skip 0x1000
166:.align 0x4
167:turn:
168: .word 0x0
169: .word 0x0
170: .word 0x0
171:
172:SECTION .MY_DATA1 TEXT_VA=0xf1110000, DATA_VA=0xd1110000
173:attr_data {
174: Name = .MY_DATA1,
175: VA= 0x0d1110000,
176: RA= 0x1d1110000,
177: PA= ra2pa(0x1d1110000,0),
178: part_0_ctx_nonzero_tsb_config_0,
179: TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
180: TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
181: TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
182: }
183:
184:attr_text {
185: Name = .MY_DATA1,
186: VA= 0x0f1110000,
187: RA= 0x1f1110000,
188: PA= ra2pa(0x1f1110000,0),
189: part_0_ctx_nonzero_tsb_config_0,
190: TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
191: TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
192: TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
193: }
194:
195: .data
196:.global prot_area
197:prot_area:
198: .word 0xbeef
199: .skip 0x1000
200: .word 0xbeef
201:.global alive
202:alive:
203: .word 0x0
204: .word 0x0
205: .word 0x0
206: .word 0x0
207: .word 0x0
208: .word 0x0
209: .word 0x0
210:
211:.end