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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / arch / prm / tso / tso_directed / tso_n1_prod_cons1.s
CommitLineData
86530b38
AT		 1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: tso_n1_prod_cons1.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
27* available with the language indicating that GPLv2 or any later version
28* may be used, or where a choice of which version of the GPL is applied is
29* otherwise unspecified.
30*
31* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38#define spinlock_addr_reg %o0
39#define data_base_reg %o1
40#define my_id_reg %o3
41#define test_reg %o4
42#define global_cnt_reg %o5
43#define tmp1 %l1
44
45#define ITERATIONS 0x4
46
47#include "hboot.s"
48
49.global main
50
51main:
52
53 setx spinlock_address, %l0, spinlock_addr_reg
54 set ITERATIONS, global_cnt_reg
55
56th_fork(th_main,%l0)
57
58! Some of the threads are producers, some are consumers
59! A pair of producer and consumer has the same ID.
60!=====================================================
61th_main_0:
62 add %g0, 0x8, my_id_reg ! this is my ID address
63 ba producer
64 nop
65
66th_main_1:
67 add %g0, 0x24, my_id_reg
68 ba consumer
69 nop
70
71th_main_2:
72 add %g0, 0x38, my_id_reg
73 ba producer
74 nop
75
76th_main_3:
77 add %g0, 0x3c, my_id_reg
78 ba producer
79 nop
80
81th_main_4:
82 add %g0, 0x8, my_id_reg
83 ba consumer
84 nop
85
86th_main_5:
87 add %g0, 0x24, my_id_reg
88 ba producer
89 nop
90
91th_main_6:
92 add %g0, 0x38, my_id_reg
93 ba consumer
94 nop
95
96th_main_7:
97 add %g0, 0x3c, my_id_reg
98 ba consumer
99 nop
100
101!===============================================================
102producer:
103 ld [spinlock_addr_reg + my_id_reg], test_reg ! try to
104 tst test_reg ! acquire lock
105 be producer_gotlock
106 nop
107 ba producer
108 nop
109
110!===============================================================
111consumer:
112 ld [spinlock_addr_reg + my_id_reg], test_reg ! try to lock
113 sub test_reg, 0x55, %i1 ! acquire lock
114 tst %i1 ! check for
115 be good_end ! end the test
116 nop
117 sub test_reg, 0x1, %i1 ! check for data
118 tst %i1
119 be consumer_gotlock
120 nop
121 ba consumer
122 nop
123
124
125!===============================================================
126producer_gotlock:
127 set 0x80, %l0
128 setx protected_area, tmp1, data_base_reg
129producer_loop0:
130 st %g0, [data_base_reg + my_id_reg] ! clean up
131 add data_base_reg, 0x40, data_base_reg ! increment the address
132 deccc %l0
133 bne producer_loop0 ! repeat
134 nop
135
136 set 0x80, %l0
137 setx protected_area, tmp1, data_base_reg
138 mov my_id_reg, %i1
139producer_loop1:
140 st %i1, [data_base_reg + my_id_reg] ! store my ID in there
141 add data_base_reg, 0x40, data_base_reg ! increment the address
142 add %i1, 1, %i1
143 deccc %l0
144 bne producer_loop1 ! repeat
145 nop
146
147 deccc global_cnt_reg
148 be cleanup_and_finish
149 nop
150 add %g0, 1 , tmp1
151 st tmp1, [spinlock_addr_reg + my_id_reg] ! data ready
152 ba producer
153 nop
154
155cleanup_and_finish:
156 add %g0, 0x55 , tmp1
157 st tmp1, [spinlock_addr_reg + my_id_reg] ! finish the test
158 ba good_end
159 nop
160
161!===============================================================
162consumer_gotlock:
163 set 0x80, %l0
164 setx protected_area, tmp1, data_base_reg
165 mov my_id_reg, %i1
166consumer_loop1:
167 ld [data_base_reg + my_id_reg], %i2 ! load my ID in there
168 subcc %i2, %i1, %i2
169 bne bad_end
170 nop
171 st %g0, [data_base_reg + my_id_reg] ! clean
172 add data_base_reg, 0x40, data_base_reg ! increment the address
173 inc %i1
174 deccc %l0
175 bne consumer_loop1 ! repeat
176 nop
177
178 st %g0, [spinlock_addr_reg+ my_id_reg] ! consumer ready
179
180 ba consumer
181 nop
182
183good_end:
184 ta T_GOOD_TRAP
185bad_end:
186 ta T_BAD_TRAP
187
188!==========================
189
190SECTION .MY_DATA0 TEXT_VA=0xf0100000, DATA_VA=0xd0100000
191attr_data {
192 Name = .MY_DATA0,
193 VA= 0x0d0100000
194 RA= 0x1d0100000
195 PA= ra2pa(0x1d0100000,0),
196 part_0_ctx_nonzero_tsb_config_0,
197 TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
198 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
199 TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
200 }
201
202attr_text {
203 Name = .MY_DATA0,
204 VA= 0x0f0100000
205 RA= 0x1f0100000
206 PA= ra2pa(0x1f0100000,0),
207 part_0_ctx_nonzero_tsb_config_0,
208 TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
209 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
210 TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
211 }
212
213
214 .data
215
216.global spinlock_address
217spinlock_address:
218 .word 0x0
219 .word 0x0
220 .word 0x0
221 .word 0x0
222 .word 0x0
223 .word 0x0
224 .word 0x0
225 .word 0x0
226 .word 0x0
227 .word 0x0
228 .word 0x0
229 .word 0x0
230 .word 0x0
231 .word 0x0
232 .word 0x0
233 .word 0x0
234 .word 0x0
235 .word 0x0
236 .word 0x0
237 .word 0x0
238 .word 0x0
239 .word 0x0
240 .word 0x0
241 .word 0x0
242 .word 0x0
243 .word 0x0
244 .word 0x0
245 .word 0x0
246 .word 0x0
247 .word 0x0
248 .word 0x0
249 .word 0x0
250 .word 0x0
251 .word 0x0
252 .word 0x0
253 .word 0x0
254 .word 0x0
255 .word 0x0
256 .word 0x0
257 .word 0x0
258 .word 0x0
259 .word 0x0
260 .word 0x0
261 .word 0x0
262 .word 0x0
263 .word 0x0
264 .word 0x0
265 .word 0x0
266 .word 0x0
267 .word 0x0
268 .word 0x0
269 .word 0x0
270 .word 0x0
271 .word 0x0
272 .word 0x0
273 .word 0x0
274 .word 0x0
275 .word 0x0
276 .word 0x0
277 .word 0x0
278 .word 0x0
279 .word 0x0
280 .word 0x0
281 .word 0x0
282 .word 0x0
283 .word 0x0
284 .word 0x0
285 .word 0x0
286 .word 0x0
287 .word 0x0
288 .word 0x0
289 .word 0x0
290 .word 0x0
291 .word 0x0
292 .word 0x0
293 .word 0x0
294 .word 0x0
295 .word 0x0
296 .word 0x0
297 .word 0x0
298 .word 0x0
299 .word 0x0
300 .word 0x0
301
302
303SECTION .MY_DATA1 TEXT_VA=0xf1110000, DATA_VA=0xd1110000
304attr_data {
305 Name = .MY_DATA1,
306 VA= 0x0d1110000,
307 RA= 0x1d1110000,
308 PA= ra2pa(0x1d1110000,0),
309 part_0_ctx_nonzero_tsb_config_0,
310 TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
311 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
312 TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
313 }
314
315attr_text {
316 Name = .MY_DATA1,
317 VA= 0x0f1110000,
318 RA= 0x1f1110000,
319 PA= ra2pa(0x1f1110000,0),
320 part_0_ctx_nonzero_tsb_config_0,
321 TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0,
322 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
323 TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1
324 }
325
326
327 .data
328.global protected_area
329protected_area:
330 .word 0xbeef
331 .skip 0x1000
332 .word 0xbeef
333
334.end
Full OpenSPARC design & verification tarball including full HDL.