[OpenSPARC-T2-DV] / verif / diag / assembly / arch / prm / tso / tso_directed / tso_n2_ncrdwr2.s

/*
* ========== Copyright Header Begin ==========================================
* 
* OpenSPARC T2 Processor File: tso_n2_ncrdwr2.s
* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
*
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
*
* For the avoidance of doubt, and except that if any non-GPL license 
* choice is available it will apply instead, Sun elects to use only 
* the General Public License version 2 (GPLv2) at this time for any 
* software where a choice of GPL license versions is made 
* available with the language indicating that GPLv2 or any later version 
* may be used, or where a choice of which version of the GPL is applied is 
* otherwise unspecified. 
*
* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 
* CA 95054 USA or visit www.sun.com if you need additional information or 
* have any questions. 
*
* 
* ========== Copyright Header End ============================================
*/
#define MAIN_PAGE_HV_ALSO
#define PART0_NZ_RANOTPA_2 0
#define ENABLE_PCIE_LINK_TRAINING    

#define H_HT0_DAE_invalid_asi_0x14
#define SUN_H_HT0_DAE_invalid_asi_0x14 \
        inc     %l5;\
        done; nop

#define H_HT0_DAE_nc_page_0x16
#define SUN_H_HT0_DAE_nc_page_0x16 \
        inc     %l4;\
        done; nop
	
#define H_HT0_Data_Real_Tran_Miss_0x3f
#define SUN_H_HT0_Data_Real_Tran_Miss_0x3f \
        inc     %l3;\
        done; nop
	
#include "hboot.s"

.text
.global main
main:
  ta T_CHANGE_HPRIV
  nop
	
  wr      %g0, 0x4, %fprs         /* make sure fef is 1 */
  
/************************************
  set up pointers
*************************************/
setx 0xc100beef00, %g1, %g3          ! MEM32 address space

/************************************ 
   Start doing non cacheable access 
   RW's are done to the DMUPIO space 
   starting from 0xC1
*************************************/
   mov %g0, %g4
   set 0x1, %g2
   set 0x10, %g5

   stloop1:
      stx %g2, [%g3 + %g4]
      inc %g2
      add 0x8, %g4, %g4
      deccc %g5
   bne stloop1
   nop

   mov 0x78, %g4
   set 0x10, %g2
   set 0x10, %g5

   ldloop1:
      ldx [%g3 + %g4], %g1
      subcc   %g2, %g1, %g0
      bne     h_bad_end
      nop
      dec %g2
      sub %g4, 0x8, %g4
      deccc %g5
   bne ldloop1
   nop
!================================

   mov 0, %l3			!! initialize the interrupt counter
   mov 0, %l4			!! initialize the interrupt counter
   mov 0, %l5			!! initialize the interrupt counter

   setx user_data_start, %g1, %g2
   ldd	[%g2], %f0		!! set up f regs in case data gets stored
   ldd	[%g2+8], %f2
   ldd	[%g2+16], %f4
   ldd	[%g2+24], %f6
   ldd	[%g2+32], %f8 
   ldd	[%g2+40], %f10 
   ldd	[%g2+48], %f12 
   ldd	[%g2+56], %f14 
   ldd	[%g2+64], %f16 

!!! These are mentioned in PRM 9.1.2
!!! it says that block loads and stores
!!! should get a DAE_invalid_asi exception
	
   mov  %g3, %g4

!================================
   stda %f0, [%g3]ASI_BLK_P	!! asi 0xf0
   ldda [%g3]ASI_BLK_P, %f0	!! should take an exception
   ldx  [%g4 +  0], %o0		!! check that the stda stored data
   ldx  [%g4 +  8], %o1
   ldx  [%g4 + 16], %o2
   ldx  [%g4 + 24], %o3
   ldx  [%g4 + 32], %o4
   ldx  [%g4 + 40], %o5
   ldx  [%g4 + 48], %o6
   ldx  [%g4 + 56], %o7
!================================
   add  0x40, %g4, %g4
   stda %f16, [%g3]ASI_BLK_PL	!! asi 0xf8
   ldda [%g3]ASI_BLK_PL, %f16	!! should take an exception
   ldx  [%g4 +  0], %o0		!! check that the stda stored data
   ldx  [%g4 +  8], %o1
   ldx  [%g4 + 16], %o2
   ldx  [%g4 + 24], %o3
   ldx  [%g4 + 32], %o4
   ldx  [%g4 + 40], %o5
   ldx  [%g4 + 48], %o6
   ldx  [%g4 + 56], %o7
!================================
   add  0x40, %g4, %g4
   stda %f0, [%g3]ASI_BLK_S	!! asi 0xf1
   ldda [%g3]ASI_BLK_S, %f0	!! should take an exception
   ldx  [%g4 +  0], %o0		!! check that the stda stored data
   ldx  [%g4 +  8], %o1
   ldx  [%g4 + 16], %o2
   ldx  [%g4 + 24], %o3
   ldx  [%g4 + 32], %o4
   ldx  [%g4 + 40], %o5
   ldx  [%g4 + 48], %o6
   ldx  [%g4 + 56], %o7
!================================
   add  0x40, %g4, %g4
   stda %f16, [%g3]ASI_BLK_SL	!! asi 0xf9
   ldda [%g3]ASI_BLK_SL, %f16	!! should take an exception
   ldx  [%g4 +  0], %o0		!! check that the stda stored data
   ldx  [%g4 +  8], %o1
   ldx  [%g4 + 16], %o2
   ldx  [%g4 + 24], %o3
   ldx  [%g4 + 32], %o4
   ldx  [%g4 + 40], %o5
   ldx  [%g4 + 48], %o6
   ldx  [%g4 + 56], %o7
!================================

!!! These are mentioned in PRM (v1.1) 9.1.2 it says that 
!!! 16-byte loads generated by ldda ASI*QUAD_LDD* should get a DAE_nc_page,
!!! and stores should take a DAE_invalid_asi exception.
	
   add  0x40, %g4, %g4
   stda %f0, [%g4]ASI_BLK_INIT_ST_QUAD_LDD_P		!! asi 0xe2
   ldda [%g4]ASI_BLK_INIT_ST_QUAD_LDD_P, %l0		!! should take an exception
!================================
   add  0x40, %g4, %g4
   stda %f0, [%g4]ASI_BLK_INIT_ST_QUAD_LDD_P_LITTLE	!! asi 0xea
   ldda [%g4]ASI_BLK_INIT_ST_QUAD_LDD_P_LITTLE, %l0	!! should take an exception
!================================
   add  0x40, %g4, %g4
   stda %f0, [%g4]ASI_BLK_INIT_ST_QUAD_LDD_S		!! asi 0xe3
   ldda [%g4]ASI_BLK_INIT_ST_QUAD_LDD_S, %l0		!! should take an exception
!================================
   add  0x40, %g4, %g4
   stda %f0, [%g4]ASI_BLK_INIT_ST_QUAD_LDD_S_LITTLE	!! asi 0xeb
   ldda [%g4]ASI_BLK_INIT_ST_QUAD_LDD_S_LITTLE, %l0	!! should take an exception
!================================
! this gets a Data_Access_MMU_Miss_0x31
!   add  0x40, %g4, %g4
!   stda %f0, [%g4]ASI_AS_IF_USER_BLK_INIT_ST_QUAD_LDD_P	!! asi 0x22
!   ldda [%g4]ASI_AS_IF_USER_BLK_INIT_ST_QUAD_LDD_P, %l0
!================================
!   add  0x40, %g4, %g4
!   stda %f0, [%g4]ASI_AS_IF_USER_BLK_INIT_ST_QUAD_LDD_S	!! asi 0x23
!   ldda [%g4]ASI_AS_IF_USER_BLK_INIT_ST_QUAD_LDD_S, %l0
!================================
   add  0x40, %g4, %g4
   stda %f0, [%g4]ASI_NUCLEUS_QUAD_LDD				!! asi 0x24
   ldda [%g4]ASI_NUCLEUS_QUAD_LDD, %l0
!================================
   add  0x40, %g4, %g4
   stda %f0, [%g4]ASI_QUAD_LDD_REAL				!! asi 0x26
   ldda [%g4]ASI_QUAD_LDD_REAL, %l0
!================================
   add  0x40, %g4, %g4
   stda %f0, [%g4]ASI_NUCLEUS_BLK_INIT_ST_QUAD_LDD		!! asi 0x27
   ldda [%g4]ASI_NUCLEUS_BLK_INIT_ST_QUAD_LDD, %l0
!================================
!   add  0x40, %g4, %g4
!   stda %f0, [%g4]ASI_AS_IF_USER_BLK_INIT_ST_QUAD_LDD_P_LITTLE	!! asi 0x2a
!   ldda [%g4]ASI_AS_IF_USER_BLK_INIT_ST_QUAD_LDD_P_LITTLE, %l0
!================================
!   add  0x40, %g4, %g4
!   stda %f0, [%g4]ASI_AS_IF_USER_BLK_INIT_ST_QUAD_LDD_S_LITTLE	!! asi 0x2b
!   ldda [%g4]ASI_AS_IF_USER_BLK_INIT_ST_QUAD_LDD_S_LITTLE, %l0
!================================
   add  0x40, %g4, %g4
   stda %f0, [%g4]ASI_NUCLEUS_QUAD_LDD_LITTLE			!! asi 0x2c
   ldda [%g4]ASI_NUCLEUS_QUAD_LDD_LITTLE, %l0	
!================================
   add  0x40, %g4, %g4
   stda %f0, [%g4]ASI_QUAD_LDD_REAL_LITTLE			!! asi 0x2e
   ldda [%g4]ASI_QUAD_LDD_REAL_LITTLE, %l0
!================================
   add  0x40, %g4, %g4
   stda %f0, [%g4]ASI_NUCLEUS_BLK_INIT_ST_QUAD_LDD_LITTLE	!! asi 0x2f
   ldda [%g4]ASI_NUCLEUS_BLK_INIT_ST_QUAD_LDD_LITTLE, %l0
!================================

   sub     %l4, 12, %l4		!! There should have been 12 nc_page interrupts
   brnz    %l4, h_bad_end
   nop
	
   sub     %l5, 10, %l5		!! There should have been 10 invalid_asi interrupts
   brnz    %l5, h_bad_end
   nop
	
normal_end:
        ta      T_GOOD_TRAP
        nop

h_bad_end:
        ta      T_BAD_TRAP
        nop
/*
 * Data section
 */

.data
.align 0x40
user_data_start:
    .xword 0xD6B3479DDB28926C
    .xword 0x1122334455667788
    .xword 0x2233445566778811
    .xword 0x3344556677881122
    .xword 0x4455667788112233
    .xword 0x5566778811223344
    .xword 0x6677881122334455
    .xword 0x7881122334455667
    .xword 0x8811223344556677


SECTION .NCDATA  DATA_VA=0xc100be0000

attr_data {
        Name = .NCDATA,
        VA=0xc100be0000,
        RA=0xc100be0000,
        PA=0xc100be0000,
        part_0_ctx_nonzero_tsb_config_2,
        TTE_G=0, TTE_Context=PCONTEXT, TTE_V=1, TTE_Size=0, TTE_SIZE_PTR=0, TTE_NFO=0,
        TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
        TTE_L=0, TTE_CP=0, TTE_CV=0, TTE_E=1, TTE_P=0, TTE_W=1
        }

.data
.global ncdata_base
ncdata_base:
        .skip 1000
Commit	Line	Data
86530b38 AT	1	/*
	2	* ========== Copyright Header Begin ==========================================
	3	*
	4	* OpenSPARC T2 Processor File: tso_n2_ncrdwr2.s
	5	* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
	6	* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
	7	*
	8	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; version 2 of the License.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	22	*
	23	* For the avoidance of doubt, and except that if any non-GPL license
	24	* choice is available it will apply instead, Sun elects to use only
	25	* the General Public License version 2 (GPLv2) at this time for any
	26	* software where a choice of GPL license versions is made
	27	* available with the language indicating that GPLv2 or any later version
	28	* may be used, or where a choice of which version of the GPL is applied is
	29	* otherwise unspecified.
	30	*
	31	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
	32	* CA 95054 USA or visit www.sun.com if you need additional information or
	33	* have any questions.
	34	*
	35	*
	36	* ========== Copyright Header End ============================================
	37	*/
	38	#define MAIN_PAGE_HV_ALSO
	39	#define PART0_NZ_RANOTPA_2 0
	40	#define ENABLE_PCIE_LINK_TRAINING
	41
	42	#define H_HT0_DAE_invalid_asi_0x14
	43	#define SUN_H_HT0_DAE_invalid_asi_0x14 \
	44	inc %l5;\
	45	done; nop
	46
	47	#define H_HT0_DAE_nc_page_0x16
	48	#define SUN_H_HT0_DAE_nc_page_0x16 \
	49	inc %l4;\
	50	done; nop
	51
	52	#define H_HT0_Data_Real_Tran_Miss_0x3f
	53	#define SUN_H_HT0_Data_Real_Tran_Miss_0x3f \
	54	inc %l3;\
	55	done; nop
	56
	57	#include "hboot.s"
	58
	59	.text
	60	.global main
	61	main:
	62	ta T_CHANGE_HPRIV
	63	nop
	64
65	wr %g0, 0x4, %fprs /* make sure fef is 1 */
66
67	/************************************
68	set up pointers
69	*************************************/
70	setx 0xc100beef00, %g1, %g3 ! MEM32 address space
71
72	/************************************
73	Start doing non cacheable access
74	RW's are done to the DMUPIO space
75	starting from 0xC1
76	*************************************/
77	mov %g0, %g4
78	set 0x1, %g2
79	set 0x10, %g5
80
81	stloop1:
82	stx %g2, [%g3 + %g4]
83	inc %g2
84	add 0x8, %g4, %g4
85	deccc %g5
86	bne stloop1
87	nop
88
89	mov 0x78, %g4
90	set 0x10, %g2
91	set 0x10, %g5
92
93	ldloop1:
94	ldx [%g3 + %g4], %g1
95	subcc %g2, %g1, %g0
96	bne h_bad_end
97	nop
98	dec %g2
99	sub %g4, 0x8, %g4
100	deccc %g5
101	bne ldloop1
102	nop
103	!================================
104
105	mov 0, %l3 !! initialize the interrupt counter
106	mov 0, %l4 !! initialize the interrupt counter
107	mov 0, %l5 !! initialize the interrupt counter
108
109	setx user_data_start, %g1, %g2
110	ldd [%g2], %f0 !! set up f regs in case data gets stored
111	ldd [%g2+8], %f2
112	ldd [%g2+16], %f4
113	ldd [%g2+24], %f6
114	ldd [%g2+32], %f8
115	ldd [%g2+40], %f10
116	ldd [%g2+48], %f12
117	ldd [%g2+56], %f14
118	ldd [%g2+64], %f16
119
120	!!! These are mentioned in PRM 9.1.2
121	!!! it says that block loads and stores
122	!!! should get a DAE_invalid_asi exception
123
124	mov %g3, %g4
125
126	!================================
127	stda %f0, [%g3]ASI_BLK_P !! asi 0xf0
128	ldda [%g3]ASI_BLK_P, %f0 !! should take an exception
129	ldx [%g4 + 0], %o0 !! check that the stda stored data
130	ldx [%g4 + 8], %o1
131	ldx [%g4 + 16], %o2
132	ldx [%g4 + 24], %o3
133	ldx [%g4 + 32], %o4
134	ldx [%g4 + 40], %o5
135	ldx [%g4 + 48], %o6
136	ldx [%g4 + 56], %o7
137	!================================
138	add 0x40, %g4, %g4
139	stda %f16, [%g3]ASI_BLK_PL !! asi 0xf8
140	ldda [%g3]ASI_BLK_PL, %f16 !! should take an exception
141	ldx [%g4 + 0], %o0 !! check that the stda stored data
142	ldx [%g4 + 8], %o1
143	ldx [%g4 + 16], %o2
144	ldx [%g4 + 24], %o3
145	ldx [%g4 + 32], %o4
146	ldx [%g4 + 40], %o5
147	ldx [%g4 + 48], %o6
148	ldx [%g4 + 56], %o7
149	!================================
150	add 0x40, %g4, %g4
151	stda %f0, [%g3]ASI_BLK_S !! asi 0xf1
152	ldda [%g3]ASI_BLK_S, %f0 !! should take an exception
153	ldx [%g4 + 0], %o0 !! check that the stda stored data
154	ldx [%g4 + 8], %o1
155	ldx [%g4 + 16], %o2
156	ldx [%g4 + 24], %o3
157	ldx [%g4 + 32], %o4
158	ldx [%g4 + 40], %o5
159	ldx [%g4 + 48], %o6
160	ldx [%g4 + 56], %o7
161	!================================
162	add 0x40, %g4, %g4
163	stda %f16, [%g3]ASI_BLK_SL !! asi 0xf9
164	ldda [%g3]ASI_BLK_SL, %f16 !! should take an exception
165	ldx [%g4 + 0], %o0 !! check that the stda stored data
166	ldx [%g4 + 8], %o1
167	ldx [%g4 + 16], %o2
168	ldx [%g4 + 24], %o3
169	ldx [%g4 + 32], %o4
170	ldx [%g4 + 40], %o5
171	ldx [%g4 + 48], %o6
172	ldx [%g4 + 56], %o7
173	!================================
174
175	!!! These are mentioned in PRM (v1.1) 9.1.2 it says that
176	!!! 16-byte loads generated by ldda ASIQUAD_LDD should get a DAE_nc_page,
177	!!! and stores should take a DAE_invalid_asi exception.
178
179	add 0x40, %g4, %g4
180	stda %f0, [%g4]ASI_BLK_INIT_ST_QUAD_LDD_P !! asi 0xe2
181	ldda [%g4]ASI_BLK_INIT_ST_QUAD_LDD_P, %l0 !! should take an exception
182	!================================
183	add 0x40, %g4, %g4
184	stda %f0, [%g4]ASI_BLK_INIT_ST_QUAD_LDD_P_LITTLE !! asi 0xea
185	ldda [%g4]ASI_BLK_INIT_ST_QUAD_LDD_P_LITTLE, %l0 !! should take an exception
186	!================================
187	add 0x40, %g4, %g4
188	stda %f0, [%g4]ASI_BLK_INIT_ST_QUAD_LDD_S !! asi 0xe3
189	ldda [%g4]ASI_BLK_INIT_ST_QUAD_LDD_S, %l0 !! should take an exception
190	!================================
191	add 0x40, %g4, %g4
192	stda %f0, [%g4]ASI_BLK_INIT_ST_QUAD_LDD_S_LITTLE !! asi 0xeb
193	ldda [%g4]ASI_BLK_INIT_ST_QUAD_LDD_S_LITTLE, %l0 !! should take an exception
194	!================================
195	! this gets a Data_Access_MMU_Miss_0x31
196	! add 0x40, %g4, %g4
197	! stda %f0, [%g4]ASI_AS_IF_USER_BLK_INIT_ST_QUAD_LDD_P !! asi 0x22
198	! ldda [%g4]ASI_AS_IF_USER_BLK_INIT_ST_QUAD_LDD_P, %l0
199	!================================
200	! add 0x40, %g4, %g4
201	! stda %f0, [%g4]ASI_AS_IF_USER_BLK_INIT_ST_QUAD_LDD_S !! asi 0x23
202	! ldda [%g4]ASI_AS_IF_USER_BLK_INIT_ST_QUAD_LDD_S, %l0
203	!================================
204	add 0x40, %g4, %g4
205	stda %f0, [%g4]ASI_NUCLEUS_QUAD_LDD !! asi 0x24
206	ldda [%g4]ASI_NUCLEUS_QUAD_LDD, %l0
207	!================================
208	add 0x40, %g4, %g4
209	stda %f0, [%g4]ASI_QUAD_LDD_REAL !! asi 0x26
210	ldda [%g4]ASI_QUAD_LDD_REAL, %l0
211	!================================
212	add 0x40, %g4, %g4
213	stda %f0, [%g4]ASI_NUCLEUS_BLK_INIT_ST_QUAD_LDD !! asi 0x27
214	ldda [%g4]ASI_NUCLEUS_BLK_INIT_ST_QUAD_LDD, %l0
215	!================================
216	! add 0x40, %g4, %g4
217	! stda %f0, [%g4]ASI_AS_IF_USER_BLK_INIT_ST_QUAD_LDD_P_LITTLE !! asi 0x2a
218	! ldda [%g4]ASI_AS_IF_USER_BLK_INIT_ST_QUAD_LDD_P_LITTLE, %l0
219	!================================
220	! add 0x40, %g4, %g4
221	! stda %f0, [%g4]ASI_AS_IF_USER_BLK_INIT_ST_QUAD_LDD_S_LITTLE !! asi 0x2b
222	! ldda [%g4]ASI_AS_IF_USER_BLK_INIT_ST_QUAD_LDD_S_LITTLE, %l0
223	!================================
224	add 0x40, %g4, %g4
225	stda %f0, [%g4]ASI_NUCLEUS_QUAD_LDD_LITTLE !! asi 0x2c
226	ldda [%g4]ASI_NUCLEUS_QUAD_LDD_LITTLE, %l0
227	!================================
228	add 0x40, %g4, %g4
229	stda %f0, [%g4]ASI_QUAD_LDD_REAL_LITTLE !! asi 0x2e
230	ldda [%g4]ASI_QUAD_LDD_REAL_LITTLE, %l0
231	!================================
232	add 0x40, %g4, %g4
233	stda %f0, [%g4]ASI_NUCLEUS_BLK_INIT_ST_QUAD_LDD_LITTLE !! asi 0x2f
234	ldda [%g4]ASI_NUCLEUS_BLK_INIT_ST_QUAD_LDD_LITTLE, %l0
235	!================================
236
237	sub %l4, 12, %l4 !! There should have been 12 nc_page interrupts
238	brnz %l4, h_bad_end
239	nop
240
241	sub %l5, 10, %l5 !! There should have been 10 invalid_asi interrupts
242	brnz %l5, h_bad_end
243	nop
244
245	normal_end:
246	ta T_GOOD_TRAP
247	nop
248
249	h_bad_end:
250	ta T_BAD_TRAP
251	nop
252	/*
253	* Data section
254	*/
255
256	.data
257	.align 0x40
258	user_data_start:
259	.xword 0xD6B3479DDB28926C
260	.xword 0x1122334455667788
261	.xword 0x2233445566778811
262	.xword 0x3344556677881122
263	.xword 0x4455667788112233
264	.xword 0x5566778811223344
265	.xword 0x6677881122334455
266	.xword 0x7881122334455667
267	.xword 0x8811223344556677
268
269
270
271	SECTION .NCDATA DATA_VA=0xc100be0000
272
273	attr_data {
274	Name = .NCDATA,
275	VA=0xc100be0000,
276	RA=0xc100be0000,
277	PA=0xc100be0000,
278	part_0_ctx_nonzero_tsb_config_2,
279	TTE_G=0, TTE_Context=PCONTEXT, TTE_V=1, TTE_Size=0, TTE_SIZE_PTR=0, TTE_NFO=0,
280	TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
281	TTE_L=0, TTE_CP=0, TTE_CV=0, TTE_E=1, TTE_P=0, TTE_W=1
282	}
283
284	.data
285	.global ncdata_base
286	ncdata_base:
287	.skip 1000