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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / dbp / Debug_Quiscen_Mode.s
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86530b38
AT		 1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: Debug_Quiscen_Mode.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
27* available with the language indicating that GPLv2 or any later version
28* may be used, or where a choice of which version of the GPL is applied is
29* otherwise unspecified.
30*
31* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38#define MAIN_PAGE_HV_ALSO
39#define DBG_CONFIG_PA 0x8600000000
40#define DBG_REPEAT_VAL 0x8000000000000005
41
42#define DBG_IO_QUISCE 0x8600000008
43#define DBG_IOQ_VAL 0x2
44
45#include "err_defines.h"
46#include "hboot.s"
47#include "niu_defines.h"
48
49/************************************************************************
50 Test case code start
51 ************************************************************************/
52.text
53.global main
54
55main:
56 ta T_CHANGE_HPRIV
57 nop
58
59! #include "niu_init.h"
60!
61! Thread 0 Start
62!
63!
64! thread_0:
65 setx DBG_CONFIG_PA,%g1,%g2
66 setx DBG_REPEAT_VAL,%g3,%g4
67 stx %g4,[%g2]
68 nop
69 membar 0x40
70Init_flow:
71 nop ! $EV trig_pc_d(1, @VA(.MAIN.Init_flow)) -> pktGenConfig(MAC_ID, FRAME_TYPE, FRAME_CLASS,TX_PKT_LEN)
72
73P_TxDMAActivate:
74 setx MAC_ID, %g1, %o0 ! 1st Parameter
75 setx SetTxDMAActive_list, %g1, %o1 ! 2st parameter
76 call SetTxDMAActive
77 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_TxDMAActivate)) -> NIU_TxDMAActivate (MAC_ID, TxDmaActive_list)
78
79 nop
80 nop
81 setx DBG_IO_QUISCE,%l0,%l2
82 setx DBG_IOQ_VAL,%l3,%l4
83 stx %l4,[%l2]
84 nop
85 nop
86 setx 0x0,%l6,%l1
87 stx %l1,[%l2] !reset the niu stall bit.
88
89P_AddTxChannels :
90 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_AddTxChannels)) -> NIU_AddTxChannels(MAC_ID, NIU_TxDmaNoUE)
91
92 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 ! Just for delay
93 nop
94
95P_SetTxMaxBurst :
96 setx NIU_TxDmaNo, %g1, %o0 ! 1st parameter :
97 setx SetTxMaxBurst_Data, %g1, %o1 ! 2nd parameter
98 call SetTxMaxBurst
99 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_SetTxMaxBurst)) -> NIU_SetTxMaxBurst (MAC_ID, NIU_TxDmaNoUE, TxMaxBurst_Data)
100
101 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 ! Just for delay
102 nop
103
104P_InitTxDma:
105 setx NIU_TxDmaNo, %g1, %o0 ! 1st parameter :
106 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_InitTxDma)) -> NIU_InitTxDma (MAC_ID, NIU_TxDmaNoUE, NIU_Xlate_On)
107 call InitTxDma
108 nop
109
110 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 ! Just for delay
111 nop
112
113
114 /************************************
115 RAS
116 *************************************/
117inj_err:
118 nop !$EV trig_pc_d(0,@VA(.MAIN.inj_err)) ->IosRandErrInj(NIUSII_CCE, 3, 5)
119
120Gen_Packet:
121 nop ! $EV trig_pc_d(1, @VA(.MAIN.Gen_Packet)) -> TxPktGen(MAC_ID, NIU_TxDmaNoUE,NIU_TX_PKT_CNT, 0, 0)
122 nop
123
124 setx 0x5, %g1, %g4
125delay_loop_tmp:
126 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
127 nop
128 nop
129 nop
130 nop
131 dec %g4
132 brnz %g4, delay_loop_tmp
133 nop
134
135
136SetTxRingKick:
137 setx NIU_PKTGEN_CSR_EV2A_TX_RNG_KICK, %g1, %g2 ! $EV trig_pc_d(1, @VA(.MAIN.SetTxRingKick)) -> NIU_SetTxRingKick(MAC_ID, NIU_TxDmaNoUE)
138 setx NIU_TxDmaNo, %g1, %o0
139 ldx [%g2], %g3
140 nop
141 mulx %o0, 0x200, %g5
142 setx TX_RING_KICK_Addr, %g1, %g2
143 add %g2, %g5, %g2
144 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
145 nop
146
147SetTxCs :
148 setx NIU_TxDmaNo, %g1, %o0
149 setx TX_CS_Data, %g1, %g3
150 mulx %o0, 0x200, %g5
151 setx TX_CS_Addr, %g1, %g2
152 add %g2, %g5, %g2
153 stxa %g3, [%g2]ASI_PRIMARY_LITTLE
154 nop
155
156
157#ifdef JUMBO_FRAME_EN /* Extra Delay for Jumbo packets to go out */
158 setx loop_count, %g1, %g4
159delay_loop:
160 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
161 nop
162 nop
163 nop
164 nop
165 dec %g4
166 brnz %g4, delay_loop
167 nop
168#endif
169
170/*
171#ifdef CE
172NIUTx_Pkt_Cnt_Chk:
173 setx MAC_ID, %g1, %o0
174 setx NIU_TX_PKT_CNT, %g1, %o1
175 call NiuTx_check_pkt_cnt
176 nop
177
178 setx loop_count, %g1, %g4
179delay_loop_end:
180 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
181 nop
182 nop
183 nop
184 nop
185 dec %g4
186 brnz %g4, delay_loop_end
187 nop
188#endif
189*/
190
191 setx 0x80, %g1, %g4
192delay_ras:
193 setx 0x2000000, %g1, %g2
194 ldx [%g2], %g3
195 nop
196 nop
197 dec %g4
198 brnz %g4, delay_ras
199 nop
200
201 /************************************
202 RAS
203 *************************************/
204read_esr:
205 setx SOC_ESR_REG, %l7, %i0
206 ldx [%i0], %i1
207 nop
208
209 setx 0x8000000000000000, %l7, %o3 !valid bit
210 set 0x1, %i2
211 sllx %i2, ERR_FIELD, %i3
212 or %i3, %o3, %i4
213 sub %i1, %i4, %i5
214 brnz %i5, test_fail
215 nop
216 /*************************************/
217
218test_passed:
219/*
220#ifdef CE
221 nop ! $EV trig_pc_d(1, @VA(.MAIN.test_passed)) -> NIU_EXIT_chk(MAC_ID)
222#endif
223*/
224
225 EXIT_GOOD
226
227!.global test_failed
228!test_failed:
229! EXIT_BAD
230
231test_fail:
232 EXIT_BAD
233
234
235/************************************************************************
236 Test case data start
237 ************************************************************************/
238/* These initialization is temporary, as there looks some bug in mempli */
239
240SECTION SetRngConfig_init data_va=0x100000000
241attr_data {
242 Name = SetRngConfig_init,
243 hypervisor,
244 compressimage
245 }
246.data
247SetRngConfig_init:
248 .xword 0x0060452301000484
249/************************************************************************/
250
251SECTION SetTxRingKick_init data_va=0x100000100
252attr_data {
253 Name = SetTxRingKick_init,
254 hypervisor,
255 compressimage
256 }
257.data
258SetTxRingKick_init:
259 .xword 0x0060452301000484
260/************************************************************************/
261
262SECTION SetTxLPMask1_init data_va=0x100000200
263attr_data {
264 Name = SetTxLPMask1_init,
265 hypervisor,
266 compressimage
267 }
268.data
269SetTxLPMask1_init:
270 .xword 0x0060452301000484
271/************************************************************************/
272
273SECTION SetTxLPValue1_init data_va=0x100000300
274attr_data {
275 Name = SetTxLPValue1_init,
276 hypervisor,
277 compressimage
278 }
279.data
280SetTxLPValue1_init:
281 .xword 0x0060452301000484
282/************************************************************************/
283
284SECTION SetTxLPRELOC1_init data_va=0x100000400
285attr_data {
286 Name = SetTxLPRELOC1_init,
287 hypervisor,
288 compressimage
289 }
290.data
291SetTxLPRELOC1_init:
292 .xword 0x0060452301000484
293/************************************************************************/
294SECTION SetTxLPMask2_init data_va=0x100000500
295attr_data {
296 Name = SetTxLPMask2_init,
297 hypervisor,
298 compressimage
299 }
300.data
301SetTxLPMask2_init:
302 .xword 0x0060452301000484
303/************************************************************************/
304SECTION SetTxLPValue2_init data_va=0x100000600
305attr_data {
306 Name = SetTxLPValue2_init,
307 hypervisor,
308 compressimage
309 }
310.data
311SetTxLPValue2_init:
312 .xword 0x0060452301000484
313
314/************************************************************************/
315SECTION SetTxLPRELOC2_init data_va=0x100000700
316attr_data {
317 Name = SetTxLPRELOC2_init,
318 hypervisor,
319 compressimage
320 }
321.data
322SetTxLPRELOC2_init:
323 .xword 0x0060452301000484
324
325/************************************************************************/
326SECTION SetTxLPValid_init data_va=0x100000800
327attr_data {
328 Name = SetTxLPValid_init,
329 hypervisor,
330 compressimage
331 }
332.data
333SetTxLPValid_init:
334 .xword 0x0060452301000484
335
336/************************************************************************/
337
Full OpenSPARC design & verification tarball including full HDL.