[OpenSPARC-T2-DV] / verif / diag / assembly / exu / exu_move_n2.s

/*
* ========== Copyright Header Begin ==========================================
* 
* OpenSPARC T2 Processor File: exu_move_n2.s
* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
*
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
*
* For the avoidance of doubt, and except that if any non-GPL license 
* choice is available it will apply instead, Sun elects to use only 
* the General Public License version 2 (GPLv2) at this time for any 
* software where a choice of GPL license versions is made 
* available with the language indicating that GPLv2 or any later version 
* may be used, or where a choice of which version of the GPL is applied is 
* otherwise unspecified. 
*
* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 
* CA 95054 USA or visit www.sun.com if you need additional information or 
* have any questions. 
*
* 
* ========== Copyright Header End ============================================
*/
#define NUM_CCR_CASES   11
#define NUM_CCRi_CASES  5
#define NUM_FCN_CASES	4
#define NUM_MOVR_CASES	3    
#define NUM_IMMED_CASES 3

! make fcc condition code value more readable    
#define FSR_FCC3_EQ 0x00    ! upper word
#define FSR_FCC3_LT 0x10
#define FSR_FCC3_GT 0x20
#define FSR_FCC3_UN 0x30
#define FSR_FCC2_EQ 0x0
#define FSR_FCC2_LT 0x4
#define FSR_FCC2_GT 0x8
#define FSR_FCC2_UN 0xc
#define FSR_FCC1_EQ 0x0
#define FSR_FCC1_LT 0x1
#define FSR_FCC1_GT 0x2
#define FSR_FCC1_UN 0x3 
			    ! lower word
#define FSR_FCC0_EQ 0x0
#define FSR_FCC0_LT 0x400
#define FSR_FCC0_GT 0x800
#define FSR_FCC0_UN 0xc00          
    

/*******************************************************/    
#include "hboot.s"

.global main
main:
th_fork(th_main,%l0)		! start up to four threads.
	! All threads do the same thing. No need to run more than one core,
	! and no need to differentiate the threads because nobody stores
	! anything.
th_main_0:    
th_main_1:    
th_main_2:    
th_main_3:    
	!*************************************************
	! Operand2 as a register, integer condition codes 
	!*************************************************
	add	%g0,NUM_CCR_CASES,%g3		
	set	ccr_data,%g1

ccr_loop:
	ldub	[%g1],%g2
	wr	%g0,%g2,%ccr	    ! set ccr
	call	set_dest_regs	    ! set all in/local regs to foxes
	nop
	
	mova	%icc,%g0,%i0
	movn	%icc,%g0,%i1
	movne	%icc,%g0,%i2
	move	%icc,%g0,%i3
	movg	%icc,%g0,%i4
	movle	%icc,%g0,%i5
	movge	%icc,%g0,%i6
	movl	%icc,%g0,%i7
	movgu	%icc,%g0,%l0
	movleu	%icc,%g0,%l1
	movcc	%icc,%g0,%l2
	movcs	%icc,%g0,%l3
	movpos	%icc,%g0,%l4
	movneg	%icc,%g0,%l5
	movvc	%icc,%g0,%l6
	movvs	%icc,%g0,%l7

	call	set_dest_regs	    ! set all in/local regs to foxes
	nop
	
	mova	%xcc,%g0,%i0
	movn	%xcc,%g0,%i1
	movne	%xcc,%g0,%i2
	move	%xcc,%g0,%i3
	movg	%xcc,%g0,%i4
	movle	%xcc,%g0,%i5
	movge	%xcc,%g0,%i6
	movl	%xcc,%g0,%i7
	movgu	%xcc,%g0,%l0
	movleu	%xcc,%g0,%l1
	movcc	%xcc,%g0,%l2
	movcs	%xcc,%g0,%l3
	movpos	%xcc,%g0,%l4
	movneg	%xcc,%g0,%l5
	movvc	%xcc,%g0,%l6
	movvs	%xcc,%g0,%l7
    			    
	sub	%g3,1,%g3	    ! CCR value
	brnz,pt %g3,ccr_loop
	add	%g1,1,%g1	    ! move operand pointer

	!*******************************************************
	! Operand2 as a register, floating-point condition codes 
	!*******************************************************
	wr	%g0,4,%fprs	    ! enable floating point	
    	add	%g0,NUM_CCR_CASES,%g3		
	set	fsr_data,%g1

fccr_loop:
	ldx	[%g1],%fsr	    ! set fsr (includes all fccn)
	call	set_dest_regs	    ! set all in/local regs to foxes
	nop
	
	mova	%fcc0,%g0,%i0
	movn	%fcc0,%g0,%i1
	movu	%fcc0,%g0,%i2
	movg	%fcc0,%g0,%i3
	movug	%fcc0,%g0,%i4
	movl	%fcc0,%g0,%i5
	movul	%fcc0,%g0,%i6
	movlg	%fcc0,%g0,%i7
	movne	%fcc0,%g0,%l0
	move	%fcc0,%g0,%l1
	movue	%fcc0,%g0,%l2
	movge	%fcc0,%g0,%l3
	movuge	%fcc0,%g0,%l4
	movle	%fcc0,%g0,%l5
	movule	%fcc0,%g0,%l6
	movo	%fcc0,%g0,%l7

    	call	set_dest_regs	    ! set all in/local regs to foxes
	nop
	
	mova	%fcc1,%g0,%i0
	movn	%fcc1,%g0,%i1
	movu	%fcc1,%g0,%i2
	movg	%fcc1,%g0,%i3
	movug	%fcc1,%g0,%i4
	movl	%fcc1,%g0,%i5
	movul	%fcc1,%g0,%i6
	movlg	%fcc1,%g0,%i7
	movne	%fcc1,%g0,%l0
	move	%fcc1,%g0,%l1
	movue	%fcc1,%g0,%l2
	movge	%fcc1,%g0,%l3
	movuge	%fcc1,%g0,%l4
	movle	%fcc1,%g0,%l5
	movule	%fcc1,%g0,%l6
	movo	%fcc1,%g0,%l7

    	call	set_dest_regs	    ! set all in/local regs to foxes
	nop
	
	mova	%fcc2,%g0,%i0
	movn	%fcc2,%g0,%i1
	movu	%fcc2,%g0,%i2
	movg	%fcc2,%g0,%i3
	movug	%fcc2,%g0,%i4
	movl	%fcc2,%g0,%i5
	movul	%fcc2,%g0,%i6
	movlg	%fcc2,%g0,%i7
	movne	%fcc2,%g0,%l0
	move	%fcc2,%g0,%l1
	movue	%fcc2,%g0,%l2
	movge	%fcc2,%g0,%l3
	movuge	%fcc2,%g0,%l4
	movle	%fcc2,%g0,%l5
	movule	%fcc2,%g0,%l6
	movo	%fcc2,%g0,%l7

    	call	set_dest_regs	    ! set all in/local regs to foxes
	nop
	
	mova	%fcc3,%g0,%i0
	movn	%fcc3,%g0,%i1
	movu	%fcc3,%g0,%i2
	movg	%fcc3,%g0,%i3
	movug	%fcc3,%g0,%i4
	movl	%fcc3,%g0,%i5
	movul	%fcc3,%g0,%i6
	movlg	%fcc3,%g0,%i7
	movne	%fcc3,%g0,%l0
	move	%fcc3,%g0,%l1
	movue	%fcc3,%g0,%l2
	movge	%fcc3,%g0,%l3
	movuge	%fcc3,%g0,%l4
	movle	%fcc3,%g0,%l5
	movule	%fcc3,%g0,%l6
	movo	%fcc3,%g0,%l7
    
    	sub	%g3,1,%g3	    ! FCCn values
	brnz,pt %g3,fccr_loop
	add	%g1,8,%g1	    ! move operand pointer

	!*******************************************************
	! Operand2 as a register, register condition 
	!*******************************************************
   	add	%g0,NUM_MOVR_CASES,%g3		
	set	movr_data,%g1
	wr	%g0,0xff,%ccr	    ! set ccr. Should not matter

movr_loop:
	call	set_dest_regs	    ! set all in/local regs to foxes
	ldx	[%g1],%g2

	movrz	%g2,%g0,%i0
	movrlez	%g2,%g0,%l0
	movrlz	%g2,%g0,%i1
	movrnz	%g2,%g0,%l1
	movrgz	%g2,%g0,%i2
	movrgez	%g2,%g0,%l2

	sub	%g3,1,%g3
	brnz,pt	%g3,movr_loop
	add	%g1,8,%g1
    
	!**************************
	! Operand2 as immediate 
	!**************************    
	add	%g0,NUM_CCRi_CASES,%g3		
	set	ccri_data,%g1

ccri_loop:
	ldub	[%g1],%g2
	call	set_dest_regs	    ! set all in/local regs to foxes
	wr	%g0,%g2,%ccr	    ! set ccr
	
	mova	%icc,0x000,%i0
	movn	%icc,0x001,%i1
	movne	%icc,0x700,%i2
	move	%icc,0x401,%i3
	movg	%icc,0x333,%i4
	movle	%icc,0x000,%i5
	movge	%icc,0x002,%i6
	movl	%icc,0x004,%i7
	movgu	%icc,0x008,%l0
	movleu	%icc,0x010,%l1
	movcc	%icc,0x020,%l2
	movcs	%icc,0x040,%l3
	movpos	%icc,0x080,%l4
	movneg	%icc,0x100,%l5
	movvc	%icc,0x200,%l6
	movvs	%icc,0x400,%l7

	call	set_dest_regs	    ! set all in/local regs to foxes
	nop
	
	mova	%xcc,0x400,%i0
	movn	%xcc,0x401,%i1
	movne	%xcc,0x402,%i2
	move	%xcc,0x404,%i3
	movg	%xcc,0x408,%i4
	movle	%xcc,0x410,%i5
	movge	%xcc,0x420,%i6
	movl	%xcc,0x440,%i7
	movgu	%xcc,0x480,%l0
	movleu	%xcc,0x500,%l1
	movcc	%xcc,0x600,%l2
	movcs	%xcc,0x7ee,%l3
	movpos	%xcc,0x3ee,%l4
	movneg	%xcc,0x3ff,%l5
	movvc	%xcc,0x222,%l6
	movvs	%xcc,0x001,%l7
    			    
	sub	%g3,1,%g3	    ! CCR value
	brnz,pt %g3,ccri_loop
	add	%g1,1,%g1	    ! move operand pointer


	! these cases do the move
	set	fsr_immed,%g1
	ldx	[%g1],%fsr
    	call	set_dest_regs	    ! set all in/local regs to foxes
	nop
	mova	%fcc3,0x000,%i0
	movn	%fcc0,0x6ff,%i1	    ! except this one
	movu	%fcc3,0x001,%i2
	movg	%fcc1,0x515,%i3
	movug	%fcc1,0x404,%i4
	movl	%fcc2,0x303,%i5
	movul	%fcc2,0x101,%i6
	movlg	%fcc1,0x111,%i7
	movne	%fcc3,0x222,%l0
	move	%fcc0,0x333,%l1
	movue	%fcc3,0x444,%l2
	movge	%fcc1,0x555,%l3
	movuge	%fcc3,0x666,%l4
	movle	%fcc0,0x777,%l5
	movule	%fcc2,0x0ff,%l6
	movo	%fcc2,0x000,%l7

	! these cases do not move
	call	set_dest_regs	    ! set all in/local regs to foxes
	nop
	mova	%fcc2,0x000,%i0	    ! except this one
	movn	%fcc1,0x6ff,%i1	   
	movu	%fcc2,0x001,%i2
	movg	%fcc0,0x515,%i3
	movug	%fcc2,0x404,%i4
	movl	%fcc3,0x303,%i5
	movul	%fcc1,0x101,%i6
	movlg	%fcc0,0x111,%i7
	movne	%fcc0,0x222,%l0
	move	%fcc3,0x333,%l1
	movue	%fcc1,0x444,%l2
	movge	%fcc3,0x555,%l3
	movuge	%fcc2,0x666,%l4
	movle	%fcc1,0x777,%l5
	movule	%fcc1,0x0ff,%l6
	movo	%fcc3,0x000,%l7
    
   	add	%g0,NUM_MOVR_CASES,%g3		
	set	movr_data,%g1	    ! same data as movr_loop cases
	wr	%g0,0x00,%ccr	    ! clear ccr. Should not matter

movri_loop:
	call	set_dest_regs	    ! set all in/local regs to foxes
	ldx	[%g1],%g2

	movrz	%g2,0x000,%i0
	movrlez	%g2,0x3fe,%l0
	movrlz	%g2,0x1ff,%i1
	movrnz	%g2,0x2aa,%l1
	movrgz	%g2,0x155,%i2
	movrgez	%g2,0x231,%l2

	sub	%g3,1,%g3
	brnz,pt	%g3,movri_loop
	add	%g1,8,%g1
    
good_end:   
	ta	T_GOOD_TRAP
	nop
	nop    

	! set all in and local regs to -1
set_dest_regs:	
	sub	%g0,1,%i0    
	sub	%g0,1,%i1    
	sub	%g0,1,%i2    
	sub	%g0,1,%i3    
	sub	%g0,1,%i4    
	sub	%g0,1,%i5    
	sub	%g0,1,%i6    
	sub	%g0,1,%i7    
	sub	%g0,1,%l0    
	sub	%g0,1,%l1   
	sub	%g0,1,%l2    
	sub	%g0,1,%l3    
	sub	%g0,1,%l4    
	sub	%g0,1,%l5    
	sub	%g0,1,%l6    
	sub	%g0,1,%l7    
	retl			! return uses %o7
	nop
!==========================    
.data
.align 0x1fff+1

ccr_data:                   
        .byte	0x00
	.byte	0x01
	.byte	0x12
	.byte	0x24
	.byte	0x48
	.byte	0x8b
	.byte	0x3f
	.byte	0x5e
	.byte	0x7d
	.byte	0x9c
	.byte	0xa6

ccri_data:                   
        .byte	0x80
	.byte	0x01
	.byte	0x12
	.byte	0x24
	.byte	0x48        

.align 0x10
fsr_data:
	.word 0x00000000, 0x00000000
	.word FSR_FCC3_LT+FSR_FCC2_GT+FSR_FCC1_UN, FSR_FCC0_LT
	.word FSR_FCC3_GT+FSR_FCC2_UN+FSR_FCC1_LT, FSR_FCC0_UN
    	.word FSR_FCC3_UN+FSR_FCC2_LT+FSR_FCC1_GT, FSR_FCC0_GT

fsr_immed:  
	.word FSR_FCC3_UN+FSR_FCC2_LT+FSR_FCC1_GT, FSR_FCC0_EQ  

movr_data:  
	.word 0x00000000, 0x00000000	! =0
	.word 0x00000000, 0x80000000	! >0 
	.word 0x80000000, 0x00000000	! <0       
     

.end
Commit	Line	Data
86530b38 AT	1	/*
	2	* ========== Copyright Header Begin ==========================================
	3	*
	4	* OpenSPARC T2 Processor File: exu_move_n2.s
	5	* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
	6	* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
	7	*
	8	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; version 2 of the License.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	22	*
	23	* For the avoidance of doubt, and except that if any non-GPL license
	24	* choice is available it will apply instead, Sun elects to use only
	25	* the General Public License version 2 (GPLv2) at this time for any
	26	* software where a choice of GPL license versions is made
	27	* available with the language indicating that GPLv2 or any later version
	28	* may be used, or where a choice of which version of the GPL is applied is
	29	* otherwise unspecified.
	30	*
	31	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
	32	* CA 95054 USA or visit www.sun.com if you need additional information or
	33	* have any questions.
	34	*
	35	*
	36	* ========== Copyright Header End ============================================
	37	*/
	38	#define NUM_CCR_CASES 11
	39	#define NUM_CCRi_CASES 5
	40	#define NUM_FCN_CASES 4
	41	#define NUM_MOVR_CASES 3
	42	#define NUM_IMMED_CASES 3
	43
	44	! make fcc condition code value more readable
	45	#define FSR_FCC3_EQ 0x00 ! upper word
	46	#define FSR_FCC3_LT 0x10
	47	#define FSR_FCC3_GT 0x20
	48	#define FSR_FCC3_UN 0x30
	49	#define FSR_FCC2_EQ 0x0
	50	#define FSR_FCC2_LT 0x4
	51	#define FSR_FCC2_GT 0x8
	52	#define FSR_FCC2_UN 0xc
	53	#define FSR_FCC1_EQ 0x0
	54	#define FSR_FCC1_LT 0x1
	55	#define FSR_FCC1_GT 0x2
	56	#define FSR_FCC1_UN 0x3
	57	! lower word
	58	#define FSR_FCC0_EQ 0x0
	59	#define FSR_FCC0_LT 0x400
	60	#define FSR_FCC0_GT 0x800
	61	#define FSR_FCC0_UN 0xc00
	62
	63
	64	/*******************************************************/
65	#include "hboot.s"
66
67	.global main
68	main:
69	th_fork(th_main,%l0) ! start up to four threads.
70	! All threads do the same thing. No need to run more than one core,
71	! and no need to differentiate the threads because nobody stores
72	! anything.
73	th_main_0:
74	th_main_1:
75	th_main_2:
76	th_main_3:
77	!*************************************************
78	! Operand2 as a register, integer condition codes
79	!*************************************************
80	add %g0,NUM_CCR_CASES,%g3
81	set ccr_data,%g1
82
83	ccr_loop:
84	ldub [%g1],%g2
85	wr %g0,%g2,%ccr ! set ccr
86	call set_dest_regs ! set all in/local regs to foxes
87	nop
88
89	mova %icc,%g0,%i0
90	movn %icc,%g0,%i1
91	movne %icc,%g0,%i2
92	move %icc,%g0,%i3
93	movg %icc,%g0,%i4
94	movle %icc,%g0,%i5
95	movge %icc,%g0,%i6
96	movl %icc,%g0,%i7
97	movgu %icc,%g0,%l0
98	movleu %icc,%g0,%l1
99	movcc %icc,%g0,%l2
100	movcs %icc,%g0,%l3
101	movpos %icc,%g0,%l4
102	movneg %icc,%g0,%l5
103	movvc %icc,%g0,%l6
104	movvs %icc,%g0,%l7
105
106	call set_dest_regs ! set all in/local regs to foxes
107	nop
108
109	mova %xcc,%g0,%i0
110	movn %xcc,%g0,%i1
111	movne %xcc,%g0,%i2
112	move %xcc,%g0,%i3
113	movg %xcc,%g0,%i4
114	movle %xcc,%g0,%i5
115	movge %xcc,%g0,%i6
116	movl %xcc,%g0,%i7
117	movgu %xcc,%g0,%l0
118	movleu %xcc,%g0,%l1
119	movcc %xcc,%g0,%l2
120	movcs %xcc,%g0,%l3
121	movpos %xcc,%g0,%l4
122	movneg %xcc,%g0,%l5
123	movvc %xcc,%g0,%l6
124	movvs %xcc,%g0,%l7
125
126	sub %g3,1,%g3 ! CCR value
127	brnz,pt %g3,ccr_loop
128	add %g1,1,%g1 ! move operand pointer
129
130	!*******************************************************
131	! Operand2 as a register, floating-point condition codes
132	!*******************************************************
133	wr %g0,4,%fprs ! enable floating point
134	add %g0,NUM_CCR_CASES,%g3
135	set fsr_data,%g1
136
137	fccr_loop:
138	ldx [%g1],%fsr ! set fsr (includes all fccn)
139	call set_dest_regs ! set all in/local regs to foxes
140	nop
141
142	mova %fcc0,%g0,%i0
143	movn %fcc0,%g0,%i1
144	movu %fcc0,%g0,%i2
145	movg %fcc0,%g0,%i3
146	movug %fcc0,%g0,%i4
147	movl %fcc0,%g0,%i5
148	movul %fcc0,%g0,%i6
149	movlg %fcc0,%g0,%i7
150	movne %fcc0,%g0,%l0
151	move %fcc0,%g0,%l1
152	movue %fcc0,%g0,%l2
153	movge %fcc0,%g0,%l3
154	movuge %fcc0,%g0,%l4
155	movle %fcc0,%g0,%l5
156	movule %fcc0,%g0,%l6
157	movo %fcc0,%g0,%l7
158
159	call set_dest_regs ! set all in/local regs to foxes
160	nop
161
162	mova %fcc1,%g0,%i0
163	movn %fcc1,%g0,%i1
164	movu %fcc1,%g0,%i2
165	movg %fcc1,%g0,%i3
166	movug %fcc1,%g0,%i4
167	movl %fcc1,%g0,%i5
168	movul %fcc1,%g0,%i6
169	movlg %fcc1,%g0,%i7
170	movne %fcc1,%g0,%l0
171	move %fcc1,%g0,%l1
172	movue %fcc1,%g0,%l2
173	movge %fcc1,%g0,%l3
174	movuge %fcc1,%g0,%l4
175	movle %fcc1,%g0,%l5
176	movule %fcc1,%g0,%l6
177	movo %fcc1,%g0,%l7
178
179	call set_dest_regs ! set all in/local regs to foxes
180	nop
181
182	mova %fcc2,%g0,%i0
183	movn %fcc2,%g0,%i1
184	movu %fcc2,%g0,%i2
185	movg %fcc2,%g0,%i3
186	movug %fcc2,%g0,%i4
187	movl %fcc2,%g0,%i5
188	movul %fcc2,%g0,%i6
189	movlg %fcc2,%g0,%i7
190	movne %fcc2,%g0,%l0
191	move %fcc2,%g0,%l1
192	movue %fcc2,%g0,%l2
193	movge %fcc2,%g0,%l3
194	movuge %fcc2,%g0,%l4
195	movle %fcc2,%g0,%l5
196	movule %fcc2,%g0,%l6
197	movo %fcc2,%g0,%l7
198
199	call set_dest_regs ! set all in/local regs to foxes
200	nop
201
202	mova %fcc3,%g0,%i0
203	movn %fcc3,%g0,%i1
204	movu %fcc3,%g0,%i2
205	movg %fcc3,%g0,%i3
206	movug %fcc3,%g0,%i4
207	movl %fcc3,%g0,%i5
208	movul %fcc3,%g0,%i6
209	movlg %fcc3,%g0,%i7
210	movne %fcc3,%g0,%l0
211	move %fcc3,%g0,%l1
212	movue %fcc3,%g0,%l2
213	movge %fcc3,%g0,%l3
214	movuge %fcc3,%g0,%l4
215	movle %fcc3,%g0,%l5
216	movule %fcc3,%g0,%l6
217	movo %fcc3,%g0,%l7
218
219	sub %g3,1,%g3 ! FCCn values
220	brnz,pt %g3,fccr_loop
221	add %g1,8,%g1 ! move operand pointer
222
223	!*******************************************************
224	! Operand2 as a register, register condition
225	!*******************************************************
226	add %g0,NUM_MOVR_CASES,%g3
227	set movr_data,%g1
228	wr %g0,0xff,%ccr ! set ccr. Should not matter
229
230	movr_loop:
231	call set_dest_regs ! set all in/local regs to foxes
232	ldx [%g1],%g2
233
234	movrz %g2,%g0,%i0
235	movrlez %g2,%g0,%l0
236	movrlz %g2,%g0,%i1
237	movrnz %g2,%g0,%l1
238	movrgz %g2,%g0,%i2
239	movrgez %g2,%g0,%l2
240
241	sub %g3,1,%g3
242	brnz,pt %g3,movr_loop
243	add %g1,8,%g1
244
245	!**************************
246	! Operand2 as immediate
247	!**************************
248	add %g0,NUM_CCRi_CASES,%g3
249	set ccri_data,%g1
250
251	ccri_loop:
252	ldub [%g1],%g2
253	call set_dest_regs ! set all in/local regs to foxes
254	wr %g0,%g2,%ccr ! set ccr
255
256	mova %icc,0x000,%i0
257	movn %icc,0x001,%i1
258	movne %icc,0x700,%i2
259	move %icc,0x401,%i3
260	movg %icc,0x333,%i4
261	movle %icc,0x000,%i5
262	movge %icc,0x002,%i6
263	movl %icc,0x004,%i7
264	movgu %icc,0x008,%l0
265	movleu %icc,0x010,%l1
266	movcc %icc,0x020,%l2
267	movcs %icc,0x040,%l3
268	movpos %icc,0x080,%l4
269	movneg %icc,0x100,%l5
270	movvc %icc,0x200,%l6
271	movvs %icc,0x400,%l7
272
273	call set_dest_regs ! set all in/local regs to foxes
274	nop
275
276	mova %xcc,0x400,%i0
277	movn %xcc,0x401,%i1
278	movne %xcc,0x402,%i2
279	move %xcc,0x404,%i3
280	movg %xcc,0x408,%i4
281	movle %xcc,0x410,%i5
282	movge %xcc,0x420,%i6
283	movl %xcc,0x440,%i7
284	movgu %xcc,0x480,%l0
285	movleu %xcc,0x500,%l1
286	movcc %xcc,0x600,%l2
287	movcs %xcc,0x7ee,%l3
288	movpos %xcc,0x3ee,%l4
289	movneg %xcc,0x3ff,%l5
290	movvc %xcc,0x222,%l6
291	movvs %xcc,0x001,%l7
292
293	sub %g3,1,%g3 ! CCR value
294	brnz,pt %g3,ccri_loop
295	add %g1,1,%g1 ! move operand pointer
296
297
298	! these cases do the move
299	set fsr_immed,%g1
300	ldx [%g1],%fsr
301	call set_dest_regs ! set all in/local regs to foxes
302	nop
303	mova %fcc3,0x000,%i0
304	movn %fcc0,0x6ff,%i1 ! except this one
305	movu %fcc3,0x001,%i2
306	movg %fcc1,0x515,%i3
307	movug %fcc1,0x404,%i4
308	movl %fcc2,0x303,%i5
309	movul %fcc2,0x101,%i6
310	movlg %fcc1,0x111,%i7
311	movne %fcc3,0x222,%l0
312	move %fcc0,0x333,%l1
313	movue %fcc3,0x444,%l2
314	movge %fcc1,0x555,%l3
315	movuge %fcc3,0x666,%l4
316	movle %fcc0,0x777,%l5
317	movule %fcc2,0x0ff,%l6
318	movo %fcc2,0x000,%l7
319
320	! these cases do not move
321	call set_dest_regs ! set all in/local regs to foxes
322	nop
323	mova %fcc2,0x000,%i0 ! except this one
324	movn %fcc1,0x6ff,%i1
325	movu %fcc2,0x001,%i2
326	movg %fcc0,0x515,%i3
327	movug %fcc2,0x404,%i4
328	movl %fcc3,0x303,%i5
329	movul %fcc1,0x101,%i6
330	movlg %fcc0,0x111,%i7
331	movne %fcc0,0x222,%l0
332	move %fcc3,0x333,%l1
333	movue %fcc1,0x444,%l2
334	movge %fcc3,0x555,%l3
335	movuge %fcc2,0x666,%l4
336	movle %fcc1,0x777,%l5
337	movule %fcc1,0x0ff,%l6
338	movo %fcc3,0x000,%l7
339
340	add %g0,NUM_MOVR_CASES,%g3
341	set movr_data,%g1 ! same data as movr_loop cases
342	wr %g0,0x00,%ccr ! clear ccr. Should not matter
343
344	movri_loop:
345	call set_dest_regs ! set all in/local regs to foxes
346	ldx [%g1],%g2
347
348	movrz %g2,0x000,%i0
349	movrlez %g2,0x3fe,%l0
350	movrlz %g2,0x1ff,%i1
351	movrnz %g2,0x2aa,%l1
352	movrgz %g2,0x155,%i2
353	movrgez %g2,0x231,%l2
354
355	sub %g3,1,%g3
356	brnz,pt %g3,movri_loop
357	add %g1,8,%g1
358
359	good_end:
360	ta T_GOOD_TRAP
361	nop
362	nop
363
364	! set all in and local regs to -1
365	set_dest_regs:
366	sub %g0,1,%i0
367	sub %g0,1,%i1
368	sub %g0,1,%i2
369	sub %g0,1,%i3
370	sub %g0,1,%i4
371	sub %g0,1,%i5
372	sub %g0,1,%i6
373	sub %g0,1,%i7
374	sub %g0,1,%l0
375	sub %g0,1,%l1
376	sub %g0,1,%l2
377	sub %g0,1,%l3
378	sub %g0,1,%l4
379	sub %g0,1,%l5
380	sub %g0,1,%l6
381	sub %g0,1,%l7
382	retl ! return uses %o7
383	nop
384	!==========================
385	.data
386	.align 0x1fff+1
387
388	ccr_data:
389	.byte 0x00
390	.byte 0x01
391	.byte 0x12
392	.byte 0x24
393	.byte 0x48
394	.byte 0x8b
395	.byte 0x3f
396	.byte 0x5e
397	.byte 0x7d
398	.byte 0x9c
399	.byte 0xa6
400
401	ccri_data:
402	.byte 0x80
403	.byte 0x01
404	.byte 0x12
405	.byte 0x24
406	.byte 0x48
407
408	.align 0x10
409	fsr_data:
410	.word 0x00000000, 0x00000000
411	.word FSR_FCC3_LT+FSR_FCC2_GT+FSR_FCC1_UN, FSR_FCC0_LT
412	.word FSR_FCC3_GT+FSR_FCC2_UN+FSR_FCC1_LT, FSR_FCC0_UN
413	.word FSR_FCC3_UN+FSR_FCC2_LT+FSR_FCC1_GT, FSR_FCC0_GT
414
415	fsr_immed:
416	.word FSR_FCC3_UN+FSR_FCC2_LT+FSR_FCC1_GT, FSR_FCC0_EQ
417
418	movr_data:
419	.word 0x00000000, 0x00000000 ! =0
420	.word 0x00000000, 0x80000000 ! >0
421	.word 0x80000000, 0x00000000 ! <0
422
423
424	.end