projects / OpenSPARC-T2-DV / blame
| Commit | Line | Data |
|---|---|---|
| 86530b38 AT |
1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== | |
| 3 | * | |
| 4 | * OpenSPARC T2 Processor File: fp_movixcc0_n2.s | |
| 5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
| 6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
| 7 | * | |
| 8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
| 9 | * | |
| 10 | * This program is free software; you can redistribute it and/or modify | |
| 11 | * it under the terms of the GNU General Public License as published by | |
| 12 | * the Free Software Foundation; version 2 of the License. | |
| 13 | * | |
| 14 | * This program is distributed in the hope that it will be useful, | |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 17 | * GNU General Public License for more details. | |
| 18 | * | |
| 19 | * You should have received a copy of the GNU General Public License | |
| 20 | * along with this program; if not, write to the Free Software | |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 22 | * | |
| 23 | * For the avoidance of doubt, and except that if any non-GPL license | |
| 24 | * choice is available it will apply instead, Sun elects to use only | |
| 25 | * the General Public License version 2 (GPLv2) at this time for any | |
| 26 | * software where a choice of GPL license versions is made | |
| 27 | * available with the language indicating that GPLv2 or any later version | |
| 28 | * may be used, or where a choice of which version of the GPL is applied is | |
| 29 | * otherwise unspecified. | |
| 30 | * | |
| 31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
| 32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
| 33 | * have any questions. | |
| 34 | * | |
| 35 | * | |
| 36 | * ========== Copyright Header End ============================================ | |
| 37 | */ | |
| 38 | #define H_T0_Fp_exception_ieee_754_0x21 T0_Fp_exception_ieee_754 | |
| 39 | #define H_T0_Fp_exception_other_0x22 T0_Fp_exception_other | |
| 40 | ||
| 41 | #define H_HT0_Illegal_instruction_0x10 T0_Fp_unimplemented | |
| 42 | ||
| 43 | #define ENABLE_T0_Fp_disabled_0x20 | |
| 44 | ||
| 45 | #define MAIN_PAGE_HV_ALSO | |
| 46 | #define MAIN_PAGE_NUCLEUS_ALSO | |
| 47 | ||
| 48 | #include "hboot.s" | |
| 49 | ||
| 50 | .global sam_fast_immu_miss | |
| 51 | .global sam_fast_dmmu_miss | |
| 52 | ||
| 53 | .text | |
| 54 | .global main | |
| 55 | ||
| 56 | main: | |
| 57 | ||
| 58 | wr %g0, 0x4, %fprs /* make sure fef is 1 */ | |
| 59 | ||
| 60 | setx fsr_tem_en, %l0, %l3 ! fsr tem enable value | |
| 61 | ||
| 62 | /******************************************************* | |
| 63 | * Simple conversion | |
| 64 | *******************************************************/ | |
| 65 | ||
| 66 | ! By default, mask is disabled | |
| 67 | ||
| 68 | ld [%l3+0x0], %fsr ! Read it from memory - trap enabled | |
| 69 | ||
| 70 | ! write all 0s to ccr | |
| 71 | ||
| 72 | wr %g0, 0x0, %ccr | |
| 73 | ||
| 74 | ! Test quads | |
| 75 | ||
| 76 | ||
| 77 | setx ddata1, %l0, %l6 ! dp | |
| 78 | ||
| 79 | ldd [%l6+0x0], %f0 ! double precision | |
| 80 | ldd [%l6+0x8], %f4 ! double precision | |
| 81 | ||
| 82 | fmovqa %icc, %f0, %f4 ! | |
| 83 | fmovqn %icc, %f0, %f4 ! | |
| 84 | fmovqne %icc, %f0, %f4 ! | |
| 85 | fmovqe %icc, %f0, %f4 ! | |
| 86 | fmovqg %icc, %f0, %f4 ! | |
| 87 | fmovqle %icc, %f0, %f4 ! | |
| 88 | fmovqge %icc, %f0, %f4 ! | |
| 89 | fmovql %icc, %f0, %f4 ! | |
| 90 | fmovqgu %xcc, %f0, %f4 ! | |
| 91 | fmovqleu %xcc, %f0, %f4 ! | |
| 92 | fmovqcc %xcc, %f0, %f4 ! | |
| 93 | fmovqcs %xcc, %f0, %f4 ! | |
| 94 | fmovqpos %xcc, %f0, %f4 ! | |
| 95 | fmovqneg %xcc, %f0, %f4 ! | |
| 96 | fmovqvc %xcc, %f0, %f4 ! | |
| 97 | fmovqvs %xcc, %f0, %f4 ! | |
| 98 | ||
| 99 | ! Depending on CCR | |
| 100 | ||
| 101 | set 0x2, %g1 ! Max loop count | |
| 102 | set 0x0, %g2 | |
| 103 | ||
| 104 | ccr_loop: | |
| 105 | ||
| 106 | brz,a %g2, tgt1 | |
| 107 | wr %g0, 0x0, %ccr | |
| 108 | wr %g0, 0xff, %ccr | |
| 109 | ||
| 110 | tgt1: | |
| 111 | ||
| 112 | ! dp, icc | |
| 113 | ||
| 114 | setx ddata1, %l0, %l2 ! Non zero data with different data in f0 and f1 | |
| 115 | ldd [%l2+0x8], %f0 | |
| 116 | ||
| 117 | ldd [%l2+0x0], %f2 ! | |
| 118 | fmovda %icc, %f0, %f2 ! | |
| 119 | ldd [%l2+0x0], %f2 ! | |
| 120 | fmovdn %icc, %f0, %f2 ! | |
| 121 | ldd [%l2+0x0], %f2 ! | |
| 122 | fmovdne %icc, %f0, %f2 ! | |
| 123 | ldd [%l2+0x0], %f2 ! | |
| 124 | fmovde %icc, %f0, %f2 ! | |
| 125 | ldd [%l2+0x0], %f2 ! | |
| 126 | fmovdg %icc, %f0, %f2 ! | |
| 127 | ldd [%l2+0x0], %f2 ! | |
| 128 | fmovdle %icc, %f0, %f2 ! | |
| 129 | ldd [%l2+0x0], %f2 ! | |
| 130 | fmovdge %icc, %f0, %f2 ! | |
| 131 | ldd [%l2+0x0], %f2 ! | |
| 132 | fmovdl %icc, %f0, %f2 ! | |
| 133 | ldd [%l2+0x0], %f2 ! | |
| 134 | fmovdgu %icc, %f0, %f2 ! | |
| 135 | ldd [%l2+0x0], %f2 ! | |
| 136 | fmovdleu %icc, %f0, %f2 ! | |
| 137 | ldd [%l2+0x0], %f2 ! | |
| 138 | fmovdcc %icc, %f0, %f2 ! | |
| 139 | ldd [%l2+0x0], %f2 ! | |
| 140 | fmovdcs %icc, %f0, %f2 ! | |
| 141 | ldd [%l2+0x0], %f2 ! | |
| 142 | fmovdpos %icc, %f0, %f2 ! | |
| 143 | ldd [%l2+0x0], %f2 ! | |
| 144 | fmovdneg %icc, %f0, %f2 ! | |
| 145 | ldd [%l2+0x0], %f2 ! | |
| 146 | fmovdvc %icc, %f0, %f2 ! | |
| 147 | ldd [%l2+0x0], %f2 ! | |
| 148 | fmovdvs %icc, %f0, %f2 ! | |
| 149 | ldd [%l2+0x0], %f2 ! | |
| 150 | ||
| 151 | ! dp xcc | |
| 152 | ||
| 153 | ldd [%l2+0x8], %f0 | |
| 154 | ||
| 155 | ldd [%l2+0x0], %f2 ! | |
| 156 | fmovda %xcc, %f0, %f2 ! | |
| 157 | ldd [%l2+0x0], %f2 ! | |
| 158 | fmovdn %xcc, %f0, %f2 ! | |
| 159 | ldd [%l2+0x0], %f2 ! | |
| 160 | fmovdne %xcc, %f0, %f2 ! | |
| 161 | ldd [%l2+0x0], %f2 ! | |
| 162 | fmovde %xcc, %f0, %f2 ! | |
| 163 | ldd [%l2+0x0], %f2 ! | |
| 164 | fmovdg %xcc, %f0, %f2 ! | |
| 165 | ldd [%l2+0x0], %f2 ! | |
| 166 | fmovdle %xcc, %f0, %f2 ! | |
| 167 | ldd [%l2+0x0], %f2 ! | |
| 168 | fmovdge %xcc, %f0, %f2 ! | |
| 169 | ldd [%l2+0x0], %f2 ! | |
| 170 | fmovdl %xcc, %f0, %f2 ! | |
| 171 | ldd [%l2+0x0], %f2 ! | |
| 172 | fmovdgu %xcc, %f0, %f2 ! | |
| 173 | ldd [%l2+0x0], %f2 ! | |
| 174 | fmovdleu %xcc, %f0, %f2 ! | |
| 175 | ldd [%l2+0x0], %f2 ! | |
| 176 | fmovdcc %xcc, %f0, %f2 ! | |
| 177 | ldd [%l2+0x0], %f2 ! | |
| 178 | fmovdcs %xcc, %f0, %f2 ! | |
| 179 | ldd [%l2+0x0], %f2 ! | |
| 180 | fmovdpos %xcc, %f0, %f2 ! | |
| 181 | ldd [%l2+0x0], %f2 ! | |
| 182 | fmovdneg %xcc, %f0, %f2 ! | |
| 183 | ldd [%l2+0x0], %f2 ! | |
| 184 | fmovdvc %xcc, %f0, %f2 ! | |
| 185 | ldd [%l2+0x0], %f2 ! | |
| 186 | fmovdvs %xcc, %f0, %f2 ! | |
| 187 | ldd [%l2+0x0], %f2 ! | |
| 188 | ||
| 189 | ! sp, icc | |
| 190 | ||
| 191 | ldd [%l2+0x0], %f0 | |
| 192 | fmovsa %icc, %f0, %f1 ! | |
| 193 | ldd [%l2+0x0], %f0 ! | |
| 194 | fmovsn %icc, %f0, %f1 ! | |
| 195 | ldd [%l2+0x0], %f0 ! | |
| 196 | fmovsne %icc, %f0, %f1 ! | |
| 197 | ldd [%l2+0x0], %f0 ! | |
| 198 | fmovse %icc, %f0, %f1 ! | |
| 199 | ldd [%l2+0x0], %f0 ! | |
| 200 | fmovsg %icc, %f0, %f1 ! | |
| 201 | ldd [%l2+0x0], %f0 ! | |
| 202 | fmovsle %icc, %f0, %f1 ! | |
| 203 | ldd [%l2+0x0], %f0 ! | |
| 204 | fmovsge %icc, %f0, %f1 ! | |
| 205 | ldd [%l2+0x0], %f0 ! | |
| 206 | fmovsl %icc, %f0, %f1 ! | |
| 207 | ldd [%l2+0x0], %f0 ! | |
| 208 | fmovsgu %icc, %f0, %f1 ! | |
| 209 | ldd [%l2+0x0], %f0 ! | |
| 210 | fmovsleu %icc, %f0, %f1 ! | |
| 211 | ldd [%l2+0x0], %f0 ! | |
| 212 | fmovscc %icc, %f0, %f1 ! | |
| 213 | ldd [%l2+0x0], %f0 ! | |
| 214 | fmovscs %icc, %f0, %f1 ! | |
| 215 | ldd [%l2+0x0], %f0 ! | |
| 216 | fmovspos %icc, %f0, %f1 ! | |
| 217 | ldd [%l2+0x0], %f0 ! | |
| 218 | fmovsneg %icc, %f0, %f1 ! | |
| 219 | ldd [%l2+0x0], %f0 ! | |
| 220 | fmovsvc %icc, %f0, %f1 ! | |
| 221 | ||
| 222 | ! sp, icc | |
| 223 | ||
| 224 | ldd [%l2+0x0], %f0 | |
| 225 | fmovsa %xcc, %f0, %f1 ! | |
| 226 | ldd [%l2+0x0], %f0 ! | |
| 227 | fmovsn %xcc, %f0, %f1 ! | |
| 228 | ldd [%l2+0x0], %f0 ! | |
| 229 | fmovsne %xcc, %f0, %f1 ! | |
| 230 | ldd [%l2+0x0], %f0 ! | |
| 231 | fmovse %xcc, %f0, %f1 ! | |
| 232 | ldd [%l2+0x0], %f0 ! | |
| 233 | fmovsg %xcc, %f0, %f1 ! | |
| 234 | ldd [%l2+0x0], %f0 ! | |
| 235 | fmovsle %xcc, %f0, %f1 ! | |
| 236 | ldd [%l2+0x0], %f0 ! | |
| 237 | fmovsge %xcc, %f0, %f1 ! | |
| 238 | ldd [%l2+0x0], %f0 ! | |
| 239 | fmovsl %xcc, %f0, %f1 ! | |
| 240 | ldd [%l2+0x0], %f0 ! | |
| 241 | fmovsgu %xcc, %f0, %f1 ! | |
| 242 | ldd [%l2+0x0], %f0 ! | |
| 243 | fmovsleu %xcc, %f0, %f1 ! | |
| 244 | ldd [%l2+0x0], %f0 ! | |
| 245 | fmovscc %xcc, %f0, %f1 ! | |
| 246 | ldd [%l2+0x0], %f0 ! | |
| 247 | fmovscs %xcc, %f0, %f1 ! | |
| 248 | ldd [%l2+0x0], %f0 ! | |
| 249 | fmovspos %xcc, %f0, %f1 ! | |
| 250 | ldd [%l2+0x0], %f0 ! | |
| 251 | fmovsneg %xcc, %f0, %f1 ! | |
| 252 | ldd [%l2+0x0], %f0 ! | |
| 253 | fmovsvc %xcc, %f0, %f1 ! | |
| 254 | ||
| 255 | add %g2, 0x1, %g2 | |
| 256 | subcc %g2, %g1, %g0 | |
| 257 | ||
| 258 | bne,a ccr_loop ! If not 0, go to test more | |
| 259 | nop | |
| 260 | ||
| 261 | ! cc forwarding | |
| 262 | ||
| 263 | setx int_data_x, %l0, %l4 ! | |
| 264 | ||
| 265 | set 0x8, %g1 ! Max loop count | |
| 266 | set 0x0, %g2 ! inner loop iterator | |
| 267 | ||
| 268 | movixcc_loop: | |
| 269 | ||
| 270 | sll %g2, 0x2, %g3 ! Align address | |
| 271 | sll %g2, 0x3, %g4 ! Align address | |
| 272 | ||
| 273 | ldx [%l4+%g4], %l1 ! single precision | |
| 274 | ||
| 275 | ! sp, icc | |
| 276 | ||
| 277 | setx ddata1, %l0, %l2 ! Non zero data with different data in f0 and f1 | |
| 278 | ||
| 279 | subcc %l1, %g0, %l1 | |
| 280 | ||
| 281 | ldd [%l2+0x0], %f0 | |
| 282 | fmovsa %xcc, %f0, %f1 ! | |
| 283 | ldd [%l2+0x0], %f0 ! | |
| 284 | fmovsn %xcc, %f0, %f1 ! | |
| 285 | ldd [%l2+0x0], %f0 ! | |
| 286 | fmovsne %xcc, %f0, %f1 ! | |
| 287 | ldd [%l2+0x0], %f0 ! | |
| 288 | fmovse %xcc, %f0, %f1 ! | |
| 289 | ldd [%l2+0x0], %f0 ! | |
| 290 | fmovsg %xcc, %f0, %f1 ! | |
| 291 | ldd [%l2+0x0], %f0 ! | |
| 292 | fmovsle %xcc, %f0, %f1 ! | |
| 293 | ldd [%l2+0x0], %f0 ! | |
| 294 | fmovsge %xcc, %f0, %f1 ! | |
| 295 | ldd [%l2+0x0], %f0 ! | |
| 296 | fmovsl %icc, %f0, %f1 ! | |
| 297 | ldd [%l2+0x0], %f0 ! | |
| 298 | fmovsgu %icc, %f0, %f1 ! | |
| 299 | ldd [%l2+0x0], %f0 ! | |
| 300 | fmovsleu %icc, %f0, %f1 ! | |
| 301 | ldd [%l2+0x0], %f0 ! | |
| 302 | fmovscc %icc, %f0, %f1 ! | |
| 303 | ldd [%l2+0x0], %f0 ! | |
| 304 | fmovscs %icc, %f0, %f1 ! | |
| 305 | ldd [%l2+0x0], %f0 ! | |
| 306 | fmovspos %icc, %f0, %f1 ! | |
| 307 | ldd [%l2+0x0], %f0 ! | |
| 308 | fmovsneg %icc, %f0, %f1 ! | |
| 309 | ldd [%l2+0x0], %f0 ! | |
| 310 | fmovsvc %icc, %f0, %f1 ! | |
| 311 | ||
| 312 | add %g2, 0x1, %g2 | |
| 313 | subcc %g2, %g1, %g0 | |
| 314 | ||
| 315 | bne,a movixcc_loop ! If not 0, go to test more | |
| 316 | nop | |
| 317 | ||
| 318 | /******************************************************* | |
| 319 | * Exit code | |
| 320 | *******************************************************/ | |
| 321 | ||
| 322 | test_pass: | |
| 323 | ta T_GOOD_TRAP | |
| 324 | ||
| 325 | test_fail: | |
| 326 | ta T_BAD_TRAP | |
| 327 | ||
| 328 | /******************************************************* | |
| 329 | * Data section | |
| 330 | *******************************************************/ | |
| 331 | ||
| 332 | .data | |
| 333 | ||
| 334 | data1: | |
| 335 | .word 0x3f800000 | |
| 336 | .word 0x00000000 | |
| 337 | .word 0xbf800000 | |
| 338 | .word 0x80000000 | |
| 339 | ||
| 340 | .align 128 | |
| 341 | ||
| 342 | ddata1: | |
| 343 | .xword 0x800fffffffffffff | |
| 344 | .xword 0x800f000000000000 | |
| 345 | ||
| 346 | .align 128 | |
| 347 | ||
| 348 | int_data_x: | |
| 349 | .xword 0x0000000000000000 ! 0 | |
| 350 | .xword 0x0000000000000001 ! 1 | |
| 351 | .xword 0x7fffffffffffffff ! | |
| 352 | .xword 0xffffffffffffffff ! | |
| 353 | .xword 0xaaaaaaaaaaaaaaaa ! 0 | |
| 354 | .xword 0x5555555555555555 ! 1 | |
| 355 | .xword 0x4000000000000000 ! | |
| 356 | .xword 0x8000000000000000 ! | |
| 357 | ||
| 358 | int_data_i: | |
| 359 | .word 0x00000000 ! 0 | |
| 360 | .word 0x00000001 ! 1 | |
| 361 | .word 0x7fffffff ! | |
| 362 | .word 0xffffffff ! | |
| 363 | .word 0xaaaaaaaa ! | |
| 364 | .word 0x55555555 ! | |
| 365 | .word 0x40000000 ! | |
| 366 | .word 0x80000000 ! | |
| 367 | ||
| 368 | .align 256 | |
| 369 | ||
| 370 | fsr_tem_en: | |
| 371 | .word 0x0f800000 ! TEM - all enabled - rd 0 | |
| 372 | .word 0x4f800000 ! TEM - all enabled - rd 1 | |
| 373 | .word 0x8f800000 ! TEM - all enabled - rd 2 | |
| 374 | .word 0xcf800000 ! TEM - all enabled - rd 3 | |
| 375 | ||
| 376 | fsr_tem_dis: | |
| 377 | .word 0x00000000 ! TEM - all disabled | |
| 378 | ||
| 379 | ||
| 380 | .global T0_Fp_exception_ieee_754 | |
| 381 | .global T0_Fp_exception_other | |
| 382 | .global T0_Fp_unimplemented | |
| 383 | ||
| 384 | T0_Fp_exception_ieee_754: | |
| 385 | rdpr %tpc, %i0 | |
| 386 | rdpr %tnpc, %i1 | |
| 387 | rdpr %tstate, %i1 | |
| 388 | rdpr %tt, %i1 | |
| 389 | setx scratch, %l0, %l5 ! scratch | |
| 390 | stx %fsr, [%l5+0x0] | |
| 391 | ldx [%l5+0x0], %fsr ! Need to test the sync operation | |
| 392 | done | |
| 393 | nop | |
| 394 | ||
| 395 | T0_Fp_unimplemented: | |
| 396 | T0_Fp_exception_other: | |
| 397 | rdpr %tpc, %i0 | |
| 398 | rdpr %tnpc, %i1 | |
| 399 | rdpr %tstate, %i1 | |
| 400 | rdpr %tt, %i1 | |
| 401 | setx scratch, %l0, %l5 ! scratch | |
| 402 | stx %fsr, [%l5+0x0] | |
| 403 | ldx [%l5+0x0], %fsr ! Need to test the sync operation | |
| 404 | done | |
| 405 | nop | |
| 406 | ||
| 407 | .data | |
| 408 | .align 128 | |
| 409 | ||
| 410 | scratch: | |
| 411 | .word 0x00000000 | |
| 412 | .word 0x00000000 | |
| 413 | .word 0x00000000 | |
| 414 | .word 0x00000000 | |
| 415 | .word 0x00000000 | |
| 416 | .word 0x00000000 | |
| 417 | .word 0x00000000 | |
| 418 | .word 0x00000000 | |
| 419 |