Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / include / dmmu_miss_handler.s
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1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: dmmu_miss_handler.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
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8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
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36* ========== Copyright Header End ============================================
37*/
38#ifdef EX_TRAPCHECK
39 ! extended trapcheck returns traptype
40 mov 0x68, %o0
41#endif
42 mov ASI_DMMU_TAG_ACCESS_VAL, %g7
43 ldxa [%g7] ASI_DMMU_TAG_REG, %g6 ! get va/context from tag-access
44
45 ! N2 N2 N2 N2 ptr register not implemented.
46 !ldxa [%g0] 0x59, %g1 ! dmmu ps0 ptr
47
48 ! N2 N2 N2 N2 ptr register not implemented.
49 ! SW Implementation of PTR register calQlations
50
51dconfig_0:
52 ! Load TSB_CONFIG address in %g7
53 mov ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_0, %g7
54
55dmmu_tsbptr_calc:
56#include <mmu_ptr_calc.s>
57
58#ifdef MIMIC_SOLARIS
59 srlx %g0, %g0, %g0
60 brnz %g0, HT0_Fast_Data_Access_MMU_Miss_0x68
61 sll %g0, %g0, %g0
62 xor %g0, %g0, %g0
63#endif
64
65 ba dload_entry
66 nop
67 nop
68 nop
69 nop