Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / include / hboot_init.s
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1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: hboot_init.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
27* available with the language indicating that GPLv2 or any later version
28* may be used, or where a choice of which version of the GPL is applied is
29* otherwise unspecified.
30*
31* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38 mov %g0, %g1
39 mov %g0, %g2
40 mov %g0, %g3
41 mov %g0, %g4
42 mov %g0, %g5
43 mov %g0, %g6
44 mov %g0, %g7
45
46 wrpr %g0, 1, %gl
47 mov %g0, %g1
48 mov %g0, %g2
49 mov %g0, %g3
50 mov %g0, %g4
51 mov %g0, %g5
52 mov %g0, %g6
53 mov %g0, %g7
54
55 wrpr %g0, 2, %gl
56 mov %g0, %g1
57 mov %g0, %g2
58 mov %g0, %g3
59 mov %g0, %g4
60 mov %g0, %g5
61 mov %g0, %g6
62 mov %g0, %g7
63
64 wrpr %g0, 3, %gl
65 mov %g0, %g1
66 mov %g0, %g2
67 mov %g0, %g3
68 mov %g0, %g4
69 mov %g0, %g5
70 mov %g0, %g6
71 mov %g0, %g7
72
73 wrpr %g0, 0, %gl
74
75 mov %g0, %r24
76 mov %g0, %r25
77 mov %g0, %r26
78 mov %g0, %r27
79 mov %g0, %r28
80 mov %g0, %r29
81 mov %g0, %r30
82 mov %g0, %r31
83
84 ! get maxwin
85! rdhpr %ver, %g1
86 .word 0x83498000
87 sllx %g1, 59, %g1
88 srlx %g1, 59, %g1
89reg_init_loop:
90 wrpr %g1, %cwp
91 mov %g0, %r8
92 mov %g0, %r9
93 mov %g0, %r11
94 mov %g0, %r12
95 mov %g0, %r13
96 mov %g0, %r14
97 mov %g0, %r15
98 mov %g0, %r16
99 mov %g0, %r17
100 mov %g0, %r18
101 mov %g0, %r19
102 mov %g0, %r20
103 mov %g0, %r21
104 mov %g0, %r22
105 mov %g0, %r23
106 brnz %g1, reg_init_loop
107 sub %g1, 1, %g1
108
109 wrpr %g0, %cwp
110
111!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
112! Clear icache/dcache valid
113!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
114 mov 0x3, %g1
115 sllx %g1, 16, %g1
116 mov 0x1, %g3
117 sllx %g3, 16, %g3
118icache_init_loop1:
119 mov 0x7f, %g2
120 sllx %g2, 6, %g2
121icache_init_loop2:
122 stxa %g0, [%g1+%g2] 0x67 ! ASI_ICACHE_TAG
123 brnz %g2, icache_init_loop2
124 sub %g2, 0x40, %g2
125
126 brnz %g1, icache_init_loop1
127 sub %g1, %g3, %g1
128
129 mov 0x1ff, %g1
130 sllx %g1, 4, %g1
131dcache_init_loop:
132 stxa %g0, [%g0+%g1] 0x47 ! ASI_DCACHE_TAG
133 brnz %g1, dcache_init_loop
134 sub %g1, 0x10, %g1
135
136!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
137! Clear itlb/dtlb valid
138!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
139 stxa %g0, [%g0] 0x60 ! ASI_ITLB_INVALIDATE_ALL
140 mov 0x8, %g1
141 stxa %g0, [%g0 + %g1] 0x60 ! ASI_DTLB_INVALIDATE_ALL
142
143!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
144! Clear L2 vuad
145!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
146 setx 0xa600000000, %g1, %g2
147 setx 0xa600100000, %g1, %g3
148 mov 0x1ff, %g1
149 sllx %g1, 7, %g1
150 mov 0x1, %g4
151 sllx %g4, 7, %g4
152l2_init_loop:
153 stx %g0, [%g2 + %g1]
154 stx %g0, [%g3 + %g1]
155 brnz %g1, l2_init_loop
156 sub %g1, %g4, %g1
157
158!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
159! SPU?
160!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
161
162!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
163! DRAM init provided by Rakesh/Sumti
164!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
165 setx 0x9700000000, %l7, %l0
166 setx 0x0130, %l7, %l1
167 setx 0x1000, %l7, %l2
168 setx 0x1, %l7, %l3
169 stx %l3, [%l0+%l1]
170 add %l1, %l2, %l1
171 stx %l3, [%l0+%l1]
172 add %l1, %l2, %l1
173 stx %l3, [%l0+%l1]
174 add %l1, %l2, %l1
175 stx %l3, [%l0+%l1]
176 setx 0x0108, %l7, %l1
177 stx %l3, [%l0+%l1]
178 add %l1, %l2, %l1
179 stx %l3, [%l0+%l1]
180 add %l1, %l2, %l1
181 stx %l3, [%l0+%l1]
182 add %l1, %l2, %l1
183 stx %l3, [%l0+%l1]
184 setx 0x0218, %l7, %l1
185 setx 0xf, %l7, %l3
186 stx %l3, [%l0+%l1]
187 add %l1, %l2, %l1
188 stx %l3, [%l0+%l1]
189 add %l1, %l2, %l1
190 stx %l3, [%l0+%l1]
191 add %l1, %l2, %l1
192 stx %l3, [%l0+%l1]