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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: htraps.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #ifdef USE_MPGEN_TRAPS | |
39 | #define NORMAL_TRAP(n) add %l0, n, %l0; b TrapCheck; nop;nop;nop;nop;nop;nop | |
40 | #else | |
41 | #define NORMAL_TRAP(n) mov n, %g7; b TrapCheck; nop;nop;nop;nop;nop;nop | |
42 | #endif | |
43 | ||
44 | #ifdef SPILL_TRAP_RETRY | |
45 | #define SPILL_TRAP(n) saved; retry; nop;nop;nop;nop;nop;nop; | |
46 | #else | |
47 | #define SPILL_TRAP(n) saved; mov n, %g7; b TrapCheck; nop; | |
48 | #endif | |
49 | ||
50 | #ifdef FILL_TRAP_RETRY | |
51 | #define FILL_TRAP(n) restored; retry; nop;nop;nop;nop;nop;nop; | |
52 | #else | |
53 | #define FILL_TRAP(n) restored; mov n, %g7; b TrapCheck; nop; | |
54 | #endif | |
55 | ||
56 | #define CUSTOM_TRAP(n) setx n, %g1, %g2; jmp %g2; nop | |
57 | ||
58 | .text | |
59 | ||
60 | HT0_Reserved_0x00: | |
61 | #ifdef H_HT0_Reserved_0x00 | |
62 | #ifdef SUN_H_HT0_Reserved_0x00 | |
63 | SUN_H_HT0_Reserved_0x00 | |
64 | #else | |
65 | CUSTOM_TRAP(H_HT0_Reserved_0x00) | |
66 | #endif | |
67 | .align 32 | |
68 | #else | |
69 | NORMAL_TRAP(0x00); | |
70 | #endif | |
71 | ||
72 | HT0_Reserved_0x01: | |
73 | #ifdef H_HT0_Reserved_0x01 | |
74 | #ifdef SUN_H_HT0_Reserved_0x01 | |
75 | SUN_H_HT0_Reserved_0x01 | |
76 | #else | |
77 | CUSTOM_TRAP(H_HT0_Reserved_0x01) | |
78 | #endif | |
79 | .align 32 | |
80 | #else | |
81 | NORMAL_TRAP(0x01); | |
82 | #endif | |
83 | ||
84 | HT0_Watchdog_Reset_0x02: | |
85 | #ifdef H_HT0_Watchdog_Reset_0x02 | |
86 | #ifdef SUN_H_HT0_Watchdog_Reset_0x02 | |
87 | SUN_H_HT0_Watchdog_Reset_0x02 | |
88 | #else | |
89 | # ifdef My_HT0_Watchdog_Reset_0x02 | |
90 | My_HT0_Watchdog_Reset_0x02 | |
91 | # else | |
92 | CUSTOM_TRAP(H_HT0_Watchdog_Reset_0x02) | |
93 | # endif | |
94 | #endif | |
95 | .align 32 | |
96 | #else | |
97 | NORMAL_TRAP(0x02); | |
98 | #endif | |
99 | ||
100 | HT0_Externally_Initiated_Reset_0x03: | |
101 | #ifdef H_HT0_Externally_Initiated_Reset_0x03 | |
102 | #ifdef SUN_H_HT0_Externally_Initiated_Reset_0x03 | |
103 | SUN_H_HT0_Externally_Initiated_Reset_0x03 | |
104 | #else | |
105 | CUSTOM_TRAP(H_HT0_Externally_Initiated_Reset_0x03) | |
106 | #endif | |
107 | .align 32 | |
108 | #else | |
109 | NORMAL_TRAP(0x03); | |
110 | #endif | |
111 | ||
112 | HT0_Software_Initiated_Reset_0x04: | |
113 | #ifdef H_HT0_Software_Initiated_Reset_0x04 | |
114 | #ifdef SUN_H_HT0_Software_Initiated_Reset_0x04 | |
115 | SUN_H_HT0_Software_Initiated_Reset_0x04 | |
116 | #else | |
117 | CUSTOM_TRAP(H_HT0_Software_Initiated_Reset_0x04) | |
118 | #endif | |
119 | .align 32 | |
120 | #else | |
121 | NORMAL_TRAP(0x04); | |
122 | #endif | |
123 | ||
124 | HT0_Reserved_0x05: | |
125 | #ifdef H_HT0_Reserved_0x05 | |
126 | #ifdef SUN_H_HT0_Reserved_0x05 | |
127 | SUN_H_HT0_Reserved_0x05 | |
128 | #else | |
129 | CUSTOM_TRAP(H_HT0_Reserved_0x05) | |
130 | #endif | |
131 | .align 32 | |
132 | #else | |
133 | NORMAL_TRAP(0x05); | |
134 | #endif | |
135 | ||
136 | HT0_Reserved_0x06: | |
137 | #ifdef H_HT0_Reserved_0x06 | |
138 | #ifdef SUN_H_HT0_Reserved_0x06 | |
139 | SUN_H_HT0_Reserved_0x06 | |
140 | #else | |
141 | CUSTOM_TRAP(H_HT0_Reserved_0x06) | |
142 | #endif | |
143 | .align 32 | |
144 | #else | |
145 | NORMAL_TRAP(0x06); | |
146 | #endif | |
147 | ||
148 | HT0_Store_Error_0x07: | |
149 | #ifdef H_HT0_Store_Error_0x07 | |
150 | #ifdef SUN_H_HT0_Store_Error_0x07 | |
151 | SUN_H_HT0_Store_Error_0x07 | |
152 | #else | |
153 | CUSTOM_TRAP(H_HT0_Store_Error_0x07) | |
154 | #endif | |
155 | .align 32 | |
156 | #else | |
157 | NORMAL_TRAP(0x07); | |
158 | #endif | |
159 | ||
160 | HT0_IAE_privilege_violation_0x08: | |
161 | #ifdef H_HT0_IAE_privilege_violation_0x08 | |
162 | #ifdef SUN_H_HT0_IAE_privilege_violation_0x08 | |
163 | SUN_H_HT0_IAE_privilege_violation_0x08 | |
164 | #else | |
165 | # ifdef My_HT0_IAE_privilege_violation_0x08 | |
166 | My_HT0_IAE_privilege_violation_0x08 | |
167 | # else | |
168 | CUSTOM_TRAP(H_HT0_IAE_privilege_violation_0x08) | |
169 | # endif | |
170 | #endif | |
171 | .align 32 | |
172 | #else | |
173 | # ifdef CLEAR_ITTE_P_ON_INSTR_ACC_EXCE | |
174 | b iaccess_except_handler; nop;nop;nop;nop;nop;nop;nop; | |
175 | # else | |
176 | NORMAL_TRAP(0x08); | |
177 | # endif | |
178 | #endif | |
179 | ||
180 | HT0_Instruction_Access_MMU_Miss_0x09: | |
181 | #ifdef H_HT0_Instruction_Access_MMU_Miss_0x09 | |
182 | #ifdef SUN_H_HT0_Instruction_Access_MMU_Miss_0x09 | |
183 | SUN_H_HT0_Instruction_Access_MMU_Miss_0x09 | |
184 | #else | |
185 | # ifdef My_HT0_Instruction_Access_MMU_Miss_0x09 | |
186 | My_HT0_Instruction_Access_MMU_Miss_0x09 | |
187 | # else | |
188 | CUSTOM_TRAP(H_HT0_Instruction_Access_MMU_Miss_0x09) | |
189 | ba immu_miss_handler | |
190 | # endif | |
191 | #endif | |
192 | ||
193 | .align 32 | |
194 | #else | |
195 | !!NORMAL_TRAP(0x09); | |
196 | ba immu_miss_handler | |
197 | nop;nop;nop;nop;nop;nop;nop | |
198 | #endif | |
199 | ||
200 | HT0_Instruction_Access_Error_0x0a: | |
201 | #ifdef H_HT0_Instruction_access_error_0x0a | |
202 | #ifdef SUN_H_HT0_Instruction_access_error_0x0a | |
203 | SUN_H_HT0_Instruction_access_error_0x0a | |
204 | #else | |
205 | CUSTOM_TRAP(H_HT0_Instruction_access_error_0x0a) | |
206 | #endif | |
207 | .align 32 | |
208 | #else | |
209 | NORMAL_TRAP(0x0a); | |
210 | #endif | |
211 | ||
212 | HT0_IAE_unauth_access_0x0b: | |
213 | #ifdef H_HT0_IAE_unauth_access_0x0b | |
214 | #ifdef SUN_H_HT0_IAE_unauth_access_0x0b | |
215 | SUN_H_HT0_IAE_unauth_access_0x0b | |
216 | #else | |
217 | CUSTOM_TRAP(H_HT0_IAE_unauth_access_0x0b) | |
218 | #endif | |
219 | .align 32 | |
220 | #else | |
221 | NORMAL_TRAP(0x0b); | |
222 | #endif | |
223 | ||
224 | HT0_IAE_nfo_page_0x0c: | |
225 | #ifdef H_HT0_IAE_nfo_page_0x0c | |
226 | #ifdef SUN_H_HT0_IAE_nfo_page_0x0c | |
227 | SUN_H_HT0_IAE_nfo_page_0x0c | |
228 | #else | |
229 | CUSTOM_TRAP(H_HT0_IAE_nfo_page_0x0c) | |
230 | #endif | |
231 | .align 32 | |
232 | #else | |
233 | NORMAL_TRAP(0x0c); | |
234 | #endif | |
235 | ||
236 | HT0_Instruction_address_range_0x0d: | |
237 | #ifdef H_HT0_Instruction_address_range_0x0d | |
238 | #ifdef SUN_H_HT0_Instruction_address_range_0x0d | |
239 | SUN_H_HT0_Instruction_address_range_0x0d | |
240 | #else | |
241 | #ifdef My_HT0_Instruction_address_range_0x0d | |
242 | My_HT0_Instruction_address_range_0x0d | |
243 | #else | |
244 | CUSTOM_TRAP(H_HT0_Instruction_address_range_0x0d) | |
245 | #endif | |
246 | #endif | |
247 | .align 32 | |
248 | #else | |
249 | NORMAL_TRAP(0x0d); | |
250 | #endif | |
251 | ||
252 | HT0_Instruction_real_range_0x0e: | |
253 | #ifdef H_HT0_Instruction_real_range_0x0e | |
254 | #ifdef SUN_H_HT0_Instruction_real_range_0x0e | |
255 | SUN_H_HT0_Instruction_real_range_0x0e | |
256 | #else | |
257 | CUSTOM_TRAP(H_HT0_Instruction_real_range_0x0e) | |
258 | #endif | |
259 | .align 32 | |
260 | #else | |
261 | NORMAL_TRAP(0x0e); | |
262 | #endif | |
263 | ||
264 | HT0_Reserved_0x0f: | |
265 | #ifdef H_HT0_Reserved_0x0f | |
266 | #ifdef SUN_H_HT0_Reserved_0x0f | |
267 | SUN_H_HT0_Reserved_0x0f | |
268 | #else | |
269 | CUSTOM_TRAP(H_HT0_Reserved_0x0f) | |
270 | #endif | |
271 | .align 32 | |
272 | #else | |
273 | NORMAL_TRAP(0x0f); | |
274 | #endif | |
275 | ||
276 | HT0_Illegal_Instruction_0x10: | |
277 | #ifdef H_HT0_Illegal_instruction_0x10 | |
278 | #ifdef SUN_H_HT0_Illegal_instruction_0x10 | |
279 | SUN_H_HT0_Illegal_instruction_0x10 | |
280 | #else | |
281 | # ifdef My_HT0_Illegal_instruction_0x10 | |
282 | My_HT0_Illegal_instruction_0x10 | |
283 | # else | |
284 | CUSTOM_TRAP(H_HT0_Illegal_instruction_0x10) | |
285 | # endif | |
286 | #endif | |
287 | .align 32 | |
288 | #else | |
289 | NORMAL_TRAP(0x10) | |
290 | #endif | |
291 | ||
292 | HT0_Privileged_Opcode_0x11: | |
293 | #ifdef H_HT0_Privileged_opcode_0x11 | |
294 | #ifdef SUN_H_HT0_Privileged_opcode_0x11 | |
295 | SUN_H_HT0_Privileged_opcode_0x11 | |
296 | #else | |
297 | # ifdef My_HT0_Privileged_opcode_0x11 | |
298 | My_HT0_Privileged_opcode_0x11 | |
299 | # else | |
300 | CUSTOM_TRAP(H_HT0_Privileged_opcode_0x11) | |
301 | # endif | |
302 | #endif | |
303 | .align 32 | |
304 | #else | |
305 | NORMAL_TRAP(0x11) | |
306 | #endif | |
307 | ||
308 | HT0_Unimplemented_LDD_0x12: | |
309 | #ifdef H_HT0_Unimplemented_LDD_0x12 | |
310 | #ifdef SUN_H_HT0_Unimplemented_LDD_0x12 | |
311 | SUN_H_HT0_Unimplemented_LDD_0x12 | |
312 | #else | |
313 | CUSTOM_TRAP(H_HT0_Unimplemented_LDD_0x12) | |
314 | #endif | |
315 | .align 32 | |
316 | #else | |
317 | NORMAL_TRAP(0x12) | |
318 | #endif | |
319 | ||
320 | HT0_Unimplemented_STD_0x13: | |
321 | #ifdef H_HT0_Unimplemented_STD_0x13 | |
322 | #ifdef SUN_H_HT0_Unimplemented_STD_0x13 | |
323 | SUN_H_HT0_Unimplemented_STD_0x13 | |
324 | #else | |
325 | CUSTOM_TRAP(H_HT0_Unimplemented_STD_0x13) | |
326 | #endif | |
327 | .align 32 | |
328 | #else | |
329 | NORMAL_TRAP(0x13) | |
330 | #endif | |
331 | ||
332 | HT0_DAE_invalid_asi_0x14: | |
333 | #ifdef H_HT0_DAE_invalid_asi_0x14 | |
334 | #ifdef SUN_H_HT0_DAE_invalid_asi_0x14 | |
335 | SUN_H_HT0_DAE_invalid_asi_0x14 | |
336 | #else | |
337 | CUSTOM_TRAP(H_HT0_DAE_invalid_asi_0x14) | |
338 | #endif | |
339 | .align 32 | |
340 | #else | |
341 | NORMAL_TRAP(0x14); | |
342 | #endif | |
343 | ||
344 | HT0_DAE_privilege_violation_0x15: | |
345 | #ifdef H_HT0_DAE_privilege_violation_0x15 | |
346 | #ifdef SUN_H_HT0_DAE_privilege_violation_0x15 | |
347 | SUN_H_HT0_DAE_privilege_violation_0x15 | |
348 | #else | |
349 | CUSTOM_TRAP(H_HT0_DAE_privilege_violation_0x15) | |
350 | #endif | |
351 | .align 32 | |
352 | #else | |
353 | NORMAL_TRAP(0x15); | |
354 | #endif | |
355 | ||
356 | HT0_DAE_nc_page_0x16: | |
357 | #ifdef H_HT0_DAE_nc_page_0x16 | |
358 | #ifdef SUN_H_HT0_DAE_nc_page_0x16 | |
359 | SUN_H_HT0_DAE_nc_page_0x16 | |
360 | #else | |
361 | CUSTOM_TRAP(H_HT0_DAE_nc_page_0x16) | |
362 | #endif | |
363 | .align 32 | |
364 | #else | |
365 | NORMAL_TRAP(0x16); | |
366 | #endif | |
367 | ||
368 | HT0_DAE_nfo_page_0x17: | |
369 | #ifdef H_HT0_DAE_nfo_page_0x17 | |
370 | #ifdef SUN_H_HT0_DAE_nfo_page_0x17 | |
371 | SUN_H_HT0_DAE_nfo_page_0x17 | |
372 | #else | |
373 | CUSTOM_TRAP(H_HT0_DAE_nfo_page_0x17) | |
374 | #endif | |
375 | .align 32 | |
376 | #else | |
377 | NORMAL_TRAP(0x17); | |
378 | #endif | |
379 | ||
380 | HT0_Reserved_0x18: | |
381 | #ifdef H_HT0_Reserved_0x18 | |
382 | #ifdef SUN_H_HT0_Reserved_0x18 | |
383 | SUN_H_HT0_Reserved_0x18 | |
384 | #else | |
385 | CUSTOM_TRAP(H_HT0_Reserved_0x18) | |
386 | #endif | |
387 | .align 32 | |
388 | #else | |
389 | NORMAL_TRAP(0x18); | |
390 | #endif | |
391 | ||
392 | HT0_Reserved_0x19: | |
393 | #ifdef H_HT0_Reserved_0x19 | |
394 | #ifdef SUN_H_HT0_Reserved_0x19 | |
395 | SUN_H_HT0_Reserved_0x19 | |
396 | #else | |
397 | CUSTOM_TRAP(H_HT0_Reserved_0x19) | |
398 | #endif | |
399 | .align 32 | |
400 | #else | |
401 | NORMAL_TRAP(0x19); | |
402 | #endif | |
403 | ||
404 | HT0_Reserved_0x1a: | |
405 | #ifdef H_HT0_Reserved_0x1a | |
406 | #ifdef SUN_H_HT0_Reserved_0x1a | |
407 | SUN_H_HT0_Reserved_0x1a | |
408 | #else | |
409 | CUSTOM_TRAP(H_HT0_Reserved_0x1a) | |
410 | #endif | |
411 | .align 32 | |
412 | #else | |
413 | NORMAL_TRAP(0x1a); | |
414 | #endif | |
415 | ||
416 | HT0_Reserved_0x1b: | |
417 | #ifdef H_HT0_Reserved_0x1b | |
418 | #ifdef SUN_H_HT0_Reserved_0x1b | |
419 | SUN_H_HT0_Reserved_0x1b | |
420 | #else | |
421 | CUSTOM_TRAP(H_HT0_Reserved_0x1b) | |
422 | #endif | |
423 | .align 32 | |
424 | #else | |
425 | NORMAL_TRAP(0x1b); | |
426 | #endif | |
427 | ||
428 | HT0_Reserved_0x1c: | |
429 | #ifdef H_HT0_Reserved_0x1c | |
430 | #ifdef SUN_H_HT0_Reserved_0x1c | |
431 | SUN_H_HT0_Reserved_0x1c | |
432 | #else | |
433 | CUSTOM_TRAP(H_HT0_Reserved_0x1c) | |
434 | #endif | |
435 | .align 32 | |
436 | #else | |
437 | NORMAL_TRAP(0x1c); | |
438 | #endif | |
439 | ||
440 | HT0_Reserved_0x1d: | |
441 | #ifdef H_HT0_Reserved_0x1d | |
442 | #ifdef SUN_H_HT0_Reserved_0x1d | |
443 | SUN_H_HT0_Reserved_0x1d | |
444 | #else | |
445 | CUSTOM_TRAP(H_HT0_Reserved_0x1d) | |
446 | #endif | |
447 | .align 32 | |
448 | #else | |
449 | NORMAL_TRAP(0x1d); | |
450 | #endif | |
451 | ||
452 | HT0_Reserved_0x1e: | |
453 | #ifdef H_HT0_Reserved_0x1e | |
454 | #ifdef SUN_H_HT0_Reserved_0x1e | |
455 | SUN_H_HT0_Reserved_0x1e | |
456 | #else | |
457 | CUSTOM_TRAP(H_HT0_Reserved_0x1e) | |
458 | #endif | |
459 | .align 32 | |
460 | #else | |
461 | NORMAL_TRAP(0x1e); | |
462 | #endif | |
463 | ||
464 | HT0_Reserved_0x1f: | |
465 | #ifdef H_HT0_Reserved_0x1f | |
466 | #ifdef SUN_H_HT0_Reserved_0x1f | |
467 | SUN_H_HT0_Reserved_0x1f | |
468 | #else | |
469 | CUSTOM_TRAP(H_HT0_Reserved_0x1f) | |
470 | #endif | |
471 | .align 32 | |
472 | #else | |
473 | NORMAL_TRAP(0x1f); | |
474 | #endif | |
475 | ||
476 | HT0_Fp_Disabled_0x20: | |
477 | #ifdef H_HT0_Fp_disabled_0x20 | |
478 | #ifdef SUN_H_HT0_Fp_disabled_0x20 | |
479 | SUN_H_HT0_Fp_disabled_0x20 | |
480 | #else | |
481 | # ifdef My_HT0_Fp_disabled_0x20 | |
482 | My_HT0_Fp_disabled_0x20 | |
483 | # else | |
484 | CUSTOM_TRAP(H_HT0_Fp_disabled_0x20) | |
485 | # endif | |
486 | #endif | |
487 | .align 32 | |
488 | #else | |
489 | NORMAL_TRAP(0x20) | |
490 | #endif | |
491 | ||
492 | HT0_Fp_Exception_Ieee_754_0x21: | |
493 | #ifdef H_HT0_Fp_exception_ieee_754_0x21 | |
494 | #ifdef SUN_H_HT0_Fp_exception_ieee_754_0x21 | |
495 | SUN_H_HT0_Fp_exception_ieee_754_0x21 | |
496 | #else | |
497 | # ifdef My_HT0_Fp_exception_ieee_754_0x21 | |
498 | My_HT0_Fp_exception_ieee_754_0x21 | |
499 | # else | |
500 | CUSTOM_TRAP(H_HT0_Fp_exception_ieee_754_0x21) | |
501 | # endif | |
502 | #endif | |
503 | .align 32 | |
504 | #else | |
505 | NORMAL_TRAP(0x21); | |
506 | #endif | |
507 | ||
508 | HT0_Fp_Exception_Other_0x22: | |
509 | #ifdef H_HT0_Fp_exception_other_0x22 | |
510 | #ifdef SUN_H_HT0_Fp_exception_other_0x22 | |
511 | SUN_H_HT0_Fp_exception_other_0x22 | |
512 | #else | |
513 | # ifdef My_HT0_Fp_exception_other_0x22 | |
514 | My_HT0_Fp_exception_other_0x22 | |
515 | # else | |
516 | CUSTOM_TRAP(H_HT0_Fp_exception_other_0x22) | |
517 | # endif | |
518 | #endif | |
519 | .align 32 | |
520 | #else | |
521 | NORMAL_TRAP(0x22); | |
522 | #endif | |
523 | ||
524 | HT0_Tag_Overflow_0x23: | |
525 | #ifdef H_HT0_Tag_Overflow | |
526 | #ifdef SUN_H_HT0_Tag_Overflow | |
527 | SUN_H_HT0_Tag_Overflow | |
528 | #else | |
529 | # ifdef My_HT0_Tag_Overflow | |
530 | My_HT0_Tag_Overflow | |
531 | # else | |
532 | CUSTOM_TRAP(H_HT0_Tag_Overflow) | |
533 | # endif | |
534 | #endif | |
535 | #else | |
536 | NORMAL_TRAP(0x23); | |
537 | #endif | |
538 | .align 32 | |
539 | ||
540 | HT0_Clean_Window_0x24: | |
541 | #ifdef H_HT0_Clean_Window | |
542 | #ifdef SUN_H_HT0_Clean_Window | |
543 | SUN_H_HT0_Clean_Window | |
544 | #else | |
545 | # ifdef My_HT0_Clean_Window | |
546 | My_HT0_Clean_Window | |
547 | # else | |
548 | CUSTOM_TRAP(H_HT0_Clean_Window) | |
549 | # endif | |
550 | #endif | |
551 | #else | |
552 | #ifdef CLEAN_WIN_RETRY | |
553 | rdpr %cleanwin, %g1; add %g1,1,%g1; wrpr %g1, %g0, %cleanwin; retry; | |
554 | #else | |
555 | restore; mov 0x24, %g7; b TrapCheck; nop;nop;nop;nop;nop; | |
556 | #endif | |
557 | #endif | |
558 | .align 128 | |
559 | ||
560 | HT0_Division_By_Zero_0x28: | |
561 | #ifdef H_HT0_Division_By_Zero | |
562 | #ifdef SUN_H_HT0_Division_By_Zero | |
563 | SUN_H_HT0_Division_By_Zero | |
564 | #else | |
565 | # ifdef My_HT0_Division_By_Zero | |
566 | My_HT0_Division_By_Zero | |
567 | # else | |
568 | CUSTOM_TRAP(H_HT0_Division_By_Zero) | |
569 | # endif | |
570 | #endif | |
571 | #else | |
572 | NORMAL_TRAP(0x28); | |
573 | #endif | |
574 | .align 32 | |
575 | ||
576 | HT0_Internal_Processor_Error_0x29: | |
577 | #ifdef H_HT0_Internal_Processor_Error_0x29 | |
578 | #ifdef SUN_H_HT0_Internal_Processor_Error_0x29 | |
579 | SUN_H_HT0_Internal_Processor_Error_0x29 | |
580 | #else | |
581 | CUSTOM_TRAP(H_HT0_Internal_Processor_Error_0x29) | |
582 | #endif | |
583 | .align 32 | |
584 | #else | |
585 | NORMAL_TRAP(0x29); | |
586 | #endif | |
587 | ||
588 | HT0_Instruction_Invalid_TSB_Entry_0x2a: | |
589 | #ifdef H_HT0_Instruction_Invalid_TSB_Entry_0x2a | |
590 | #ifdef SUN_H_HT0_Instruction_Invalid_TSB_Entry_0x2a | |
591 | SUN_H_HT0_Instruction_Invalid_TSB_Entry_0x2a | |
592 | #else | |
593 | CUSTOM_TRAP(H_HT0_Instruction_Invalid_TSB_Entry_0x2a) | |
594 | #endif | |
595 | .align 32 | |
596 | #else | |
597 | NORMAL_TRAP(0x2a); | |
598 | #endif | |
599 | ||
600 | HT0_Data_Invalid_TSB_Entry_0x2b: | |
601 | #ifdef H_HT0_Data_Invalid_TSB_Entry_0x2b | |
602 | #ifdef SUN_H_HT0_Data_Invalid_TSB_Entry_0x2b | |
603 | SUN_H_HT0_Data_Invalid_TSB_Entry_0x2b | |
604 | #else | |
605 | CUSTOM_TRAP(H_HT0_Data_Invalid_TSB_Entry_0x2b) | |
606 | #endif | |
607 | .align 32 | |
608 | #else | |
609 | NORMAL_TRAP(0x2b); | |
610 | #endif | |
611 | ||
612 | HT0_Reserved_0x2c: | |
613 | #ifdef H_HT0_Reserved_0x2c | |
614 | #ifdef SUN_H_HT0_Reserved_0x2c | |
615 | SUN_H_HT0_Reserved_0x2c | |
616 | #else | |
617 | CUSTOM_TRAP(H_HT0_Reserved_0x2c) | |
618 | #endif | |
619 | .align 32 | |
620 | #else | |
621 | NORMAL_TRAP(0x2c); | |
622 | #endif | |
623 | ||
624 | HT0_mem_real_range_0x2d: | |
625 | #ifdef H_HT0_mem_real_range_0x2d | |
626 | #ifdef SUN_H_HT0_mem_real_range_0x2d | |
627 | SUN_H_HT0_mem_real_range_0x2d | |
628 | #else | |
629 | CUSTOM_TRAP(H_HT0_mem_real_range_0x2d) | |
630 | #endif | |
631 | .align 32 | |
632 | #else | |
633 | NORMAL_TRAP(0x2d); | |
634 | #endif | |
635 | ||
636 | HT0_mem_address_range_0x2e: | |
637 | #ifdef H_HT0_mem_address_range_0x2e | |
638 | #ifdef SUN_H_HT0_mem_address_range_0x2e | |
639 | SUN_H_HT0_mem_address_range_0x2e | |
640 | #else | |
641 | CUSTOM_TRAP(H_HT0_mem_address_range_0x2e) | |
642 | #endif | |
643 | .align 32 | |
644 | #else | |
645 | NORMAL_TRAP(0x2e); | |
646 | #endif | |
647 | ||
648 | HT0_Reserved_0x2f: | |
649 | #ifdef H_HT0_Reserved_0x2f | |
650 | #ifdef SUN_H_HT0_Reserved_0x2f | |
651 | SUN_H_HT0_Reserved_0x2f | |
652 | #else | |
653 | CUSTOM_TRAP(H_HT0_Reserved_0x2f) | |
654 | #endif | |
655 | .align 32 | |
656 | #else | |
657 | NORMAL_TRAP(0x2f); | |
658 | #endif | |
659 | ||
660 | HT0_DAE_so_page_0x30: | |
661 | #ifdef H_HT0_DAE_so_page_0x30 | |
662 | #ifdef SUN_H_HT0_DAE_so_page_0x30 | |
663 | SUN_H_HT0_DAE_so_page_0x30 | |
664 | #else | |
665 | ||
666 | # ifdef My_HT0_DAE_so_page_0x30 | |
667 | My_HT0_DAE_so_page_0x30 | |
668 | # else | |
669 | CUSTOM_TRAP(H_HT0_DAE_so_page_0x30) | |
670 | # endif | |
671 | #endif | |
672 | .align 32 | |
673 | #else | |
674 | # ifdef CLEAR_DTTE_P_ON_DATA_ACC_EXCE | |
675 | b daccess_except_handler; nop;nop;nop;nop;nop;nop;nop; | |
676 | # else | |
677 | NORMAL_TRAP(0x30); | |
678 | # endif | |
679 | #endif | |
680 | ||
681 | HT0_Data_Access_MMU_Miss_0x31: | |
682 | #ifdef H_HT0_Data_Access_MMU_Miss | |
683 | #ifdef SUN_H_HT0_Data_Access_MMU_Miss | |
684 | SUN_H_HT0_Data_Access_MMU_Miss | |
685 | #else | |
686 | # ifdef My_HT0_Data_Access_MMU_Miss_0x31 | |
687 | My_HT0_Data_Access_MMU_Miss_0x31 | |
688 | # else | |
689 | CUSTOM_TRAP(H_HT0_Reserved_0x31) | |
690 | # endif | |
691 | #endif | |
692 | .align 32 | |
693 | #else | |
694 | !!NORMAL_TRAP(0x31); | |
695 | ba dmmu_miss_handler | |
696 | nop;nop;nop;nop;nop;nop;nop | |
697 | #endif | |
698 | ||
699 | ||
700 | HT0_Data_Access_Error_0x32: | |
701 | #ifdef H_HT0_Data_access_error_0x32 | |
702 | #ifdef SUN_H_HT0_Data_access_error_0x32 | |
703 | SUN_H_HT0_Data_access_error_0x32 | |
704 | #else | |
705 | CUSTOM_TRAP(H_HT0_Data_access_error_0x32) | |
706 | #endif | |
707 | .align 32 | |
708 | #else | |
709 | NORMAL_TRAP(0x32); | |
710 | #endif | |
711 | ||
712 | HT0_Reserved_0x33: | |
713 | #ifdef H_HT0_Reserved_0x33 | |
714 | #ifdef SUN_H_HT0_Reserved_0x33 | |
715 | SUN_H_HT0_Reserved_0x33 | |
716 | #else | |
717 | # ifdef My_HT0_Data_Access_Protection_0x33 | |
718 | My_HT0_Data_Access_Protection_0x33 | |
719 | # else | |
720 | CUSTOM_TRAP(H_HT0_Reserved_0x33) | |
721 | # endif | |
722 | #endif | |
723 | .align 32 | |
724 | #else | |
725 | NORMAL_TRAP(0x33); | |
726 | #endif | |
727 | ||
728 | HT0_Mem_Address_Not_Aligned_0x34: | |
729 | #ifdef H_HT0_Mem_Address_Not_Aligned_0x34 | |
730 | #ifdef SUN_H_HT0_Mem_Address_Not_Aligned_0x34 | |
731 | SUN_H_HT0_Mem_Address_Not_Aligned_0x34 | |
732 | #else | |
733 | # ifdef My_HT0_Mem_Address_Not_Aligned_0x34 | |
734 | My_HT0_Mem_Address_Not_Aligned_0x34 | |
735 | # else | |
736 | CUSTOM_TRAP(H_HT0_Mem_Address_Not_Aligned_0x34) | |
737 | # endif | |
738 | #endif | |
739 | .align 32 | |
740 | #else | |
741 | # if defined CHECK_SFSR_SFAR || defined FIX_MEM_ASSRESS_NOT_ALIGNED | |
742 | b proc_mem_align; nop;nop;nop;nop;nop;nop;nop; | |
743 | # else | |
744 | NORMAL_TRAP(0x34); | |
745 | # endif | |
746 | #endif | |
747 | ||
748 | HT0_Lddf_Mem_Address_Not_Aligned_0x35: | |
749 | #ifdef H_HT0_Lddf_Mem_Address_Not_Aligned_0x35 | |
750 | #ifdef SUN_H_HT0_Lddf_Mem_Address_Not_Aligned_0x35 | |
751 | SUN_H_HT0_Lddf_Mem_Address_Not_Aligned_0x35 | |
752 | #else | |
753 | # ifdef My_HT0_Lddf_Mem_Address_Not_Aligned_0x35 | |
754 | My_HT0_Lddf_Mem_Address_Not_Aligned_0x35 | |
755 | # else | |
756 | CUSTOM_TRAP(H_HT0_Lddf_Mem_Address_Not_Aligned_0x35) | |
757 | # endif | |
758 | #endif | |
759 | .align 32 | |
760 | #else | |
761 | NORMAL_TRAP(0x35); | |
762 | #endif | |
763 | ||
764 | HT0_Stdf_Mem_Address_Not_Aligned_0x36: | |
765 | #ifdef H_HT0_Stdf_Mem_Address_Not_Aligned_0x36 | |
766 | #ifdef SUN_H_HT0_Stdf_Mem_Address_Not_Aligned_0x36 | |
767 | SUN_H_HT0_Stdf_Mem_Address_Not_Aligned_0x36 | |
768 | #else | |
769 | # ifdef My_HT0_Stdf_Mem_Address_Not_Aligned_0x36 | |
770 | My_HT0_Stdf_Mem_Address_Not_Aligned_0x36 | |
771 | # else | |
772 | CUSTOM_TRAP(H_HT0_Stdf_Mem_Address_Not_Aligned_0x36) | |
773 | # endif | |
774 | #endif | |
775 | .align 32 | |
776 | #else | |
777 | NORMAL_TRAP(0x36); | |
778 | #endif | |
779 | ||
780 | HT0_Privileged_Action_0x37: | |
781 | #ifdef H_HT0_Privileged_Action_0x37 | |
782 | #ifdef SUN_H_HT0_Privileged_Action_0x37 | |
783 | SUN_H_HT0_Privileged_Action_0x37 | |
784 | #else | |
785 | # ifdef My_HT0_Privileged_Action_0x37 | |
786 | My_HT0_Privileged_Action_0x37 | |
787 | # else | |
788 | CUSTOM_TRAP(H_HT0_Privileged_Action_0x37) | |
789 | # endif | |
790 | #endif | |
791 | .align 32 | |
792 | #else | |
793 | NORMAL_TRAP(0x37); | |
794 | #endif | |
795 | ||
796 | HT0_Reserved_0x38: | |
797 | #ifdef H_HT0_Reserved_0x38 | |
798 | #ifdef SUN_H_HT0_Reserved_0x38 | |
799 | SUN_H_HT0_Reserved_0x38 | |
800 | #else | |
801 | CUSTOM_TRAP(H_HT0_Reserved_0x38) | |
802 | #endif | |
803 | .align 32 | |
804 | #else | |
805 | NORMAL_TRAP(0x38); | |
806 | #endif | |
807 | ||
808 | HT0_Reserved_0x39: | |
809 | #ifdef H_HT0_Reserved_0x39 | |
810 | #ifdef SUN_H_HT0_Reserved_0x39 | |
811 | SUN_H_HT0_Reserved_0x39 | |
812 | #else | |
813 | CUSTOM_TRAP(H_HT0_Reserved_0x39) | |
814 | #endif | |
815 | .align 32 | |
816 | #else | |
817 | NORMAL_TRAP(0x39); | |
818 | #endif | |
819 | ||
820 | HT0_Reserved_0x3a: | |
821 | #ifdef H_HT0_Reserved_0x3a | |
822 | #ifdef SUN_H_HT0_Reserved_0x3a | |
823 | SUN_H_HT0_Reserved_0x3a | |
824 | #else | |
825 | CUSTOM_TRAP(H_HT0_Reserved_0x3a) | |
826 | #endif | |
827 | .align 32 | |
828 | #else | |
829 | NORMAL_TRAP(0x3a); | |
830 | #endif | |
831 | ||
832 | HT0_Reserved_0x3b: | |
833 | #ifdef H_HT0_Reserved_0x3b | |
834 | #ifdef SUN_H_HT0_Reserved_0x3b | |
835 | SUN_H_HT0_Reserved_0x3b | |
836 | #else | |
837 | CUSTOM_TRAP(H_HT0_Reserved_0x3b) | |
838 | #endif | |
839 | .align 32 | |
840 | #else | |
841 | NORMAL_TRAP(0x3b); | |
842 | #endif | |
843 | ||
844 | HT0_Control_Word_Queue_Interrupt_0x3c: | |
845 | #ifdef H_HT0_Control_Word_Queue_Interrupt_0x3c | |
846 | #ifdef SUN_H_HT0_Control_Word_Queue_Interrupt_0x3c | |
847 | SUN_H_HT0_Control_Word_Queue_Interrupt_0x3c | |
848 | #else | |
849 | # ifdef My_HT0_Control_Word_Queue_Interrupt_0x3c | |
850 | My_HT0_Control_Word_Queue_Interrupt_0x3c | |
851 | # else | |
852 | CUSTOM_TRAP(H_HT0_Control_Word_Queue_Interrupt_0x3c) | |
853 | # endif | |
854 | ||
855 | #endif | |
856 | .align 32 | |
857 | #else | |
858 | NORMAL_TRAP(0x3c); | |
859 | #endif | |
860 | ||
861 | HT0_Modular_Arithmetic_Interrupt_0x3d: | |
862 | #ifdef H_HT0_Modular_Arithmetic_Interrupt_0x3d | |
863 | #ifdef SUN_H_HT0_Modular_Arithmetic_Interrupt_0x3d | |
864 | SUN_H_HT0_Modular_Arithmetic_Interrupt_0x3d | |
865 | #else | |
866 | # ifdef My_H_HT0_Modular_Arithmetic_Interrupt_0x3d | |
867 | My_H_HT0_Modular_Arithmetic_Interrupt_0x3d | |
868 | # else | |
869 | CUSTOM_TRAP(HT0_Modular_Arithmetic_Interrupt_0x3d) | |
870 | # endif | |
871 | #endif | |
872 | .align 32 | |
873 | #else | |
874 | NORMAL_TRAP(0x3d); | |
875 | #endif | |
876 | ||
877 | HT0_Instr_Real_Tran_Miss_0x3e: | |
878 | #ifdef H_HT0_Instr_Real_Tran_Miss_0x3e | |
879 | #ifdef SUN_H_HT0_Instr_Real_Tran_Miss_0x3e | |
880 | SUN_H_HT0_Instr_Real_Tran_Miss_0x3e | |
881 | #else | |
882 | # ifdef My_HT0_Instr_Real_Tran_Miss_0x3e | |
883 | My_HT0_Instr_Real_Tran_Miss_0x3e | |
884 | # else | |
885 | CUSTOM_TRAP(H_HT0_Instr_Real_Tran_Miss_0x3e) | |
886 | # endif | |
887 | #endif | |
888 | .align 32 | |
889 | #else | |
890 | ! jump into an include file. immu_miss_handler_ext.s | |
891 | ba immu_real_miss_handler | |
892 | nop | |
893 | nop | |
894 | nop | |
895 | nop | |
896 | nop | |
897 | nop | |
898 | nop | |
899 | #endif | |
900 | ||
901 | HT0_Data_Real_Tran_Miss_0x3f: | |
902 | #ifdef H_HT0_Data_Real_Tran_Miss_0x3f | |
903 | #ifdef SUN_H_HT0_Data_Real_Tran_Miss_0x3f | |
904 | SUN_H_HT0_Data_Real_Tran_Miss_0x3f | |
905 | #else | |
906 | # ifdef My_HT0_Data_Real_Tran_Miss_0x3f | |
907 | My_HT0_Data_Real_Tran_Miss_0x3f | |
908 | # else | |
909 | CUSTOM_TRAP(H_HT0_Data_Real_Tran_Miss_0x3f) | |
910 | # endif | |
911 | #endif | |
912 | .align 32 | |
913 | #else | |
914 | ! jump into an include file. dmmu_miss_handler_ext.s | |
915 | ba dmmu_real_miss_handler | |
916 | nop | |
917 | nop | |
918 | nop | |
919 | nop | |
920 | nop | |
921 | nop | |
922 | nop | |
923 | #endif | |
924 | ||
925 | HT0_Sw_Recoverable_Error_0x40: | |
926 | #ifdef H_HT0_Sw_Recoverable_Error_0x40 | |
927 | #ifdef SUN_H_HT0_Sw_Recoverable_Error_0x40 | |
928 | SUN_H_HT0_Sw_Recoverable_Error_0x40 | |
929 | #else | |
930 | CUSTOM_TRAP(H_HT0_Sw_Recoverable_Error_0x40) | |
931 | #endif | |
932 | .align 32 | |
933 | #else | |
934 | NORMAL_TRAP(0x40); | |
935 | #endif | |
936 | ||
937 | HT0_Interrupt_Level_1_0x41: | |
938 | #ifdef H_HT0_Interrupt_Level_1_0x41 | |
939 | #ifdef SUN_H_HT0_Interrupt_Level_1_0x41 | |
940 | SUN_H_HT0_Interrupt_Level_1_0x41 | |
941 | #else | |
942 | # ifdef My_HT0_Interrupt_Level_1_0x41 | |
943 | My_HT0_Interrupt_Level_1_0x41 | |
944 | # else | |
945 | CUSTOM_TRAP(H_HT0_Interrupt_Level_1_0x41) | |
946 | # endif | |
947 | #endif | |
948 | .align 32 | |
949 | #else | |
950 | NORMAL_TRAP(0x41); | |
951 | #endif | |
952 | ||
953 | HT0_Interrupt_Level_2_0x42: | |
954 | #ifdef H_HT0_Interrupt_Level_2_0x42 | |
955 | #ifdef SUN_H_HT0_Interrupt_Level_2_0x42 | |
956 | SUN_H_HT0_Interrupt_Level_2_0x42 | |
957 | #else | |
958 | # ifdef My_HT0_Interrupt_Level_2_0x42 | |
959 | My_HT0_Interrupt_Level_2_0x42 | |
960 | # else | |
961 | CUSTOM_TRAP(H_HT0_Interrupt_Level_2_0x42) | |
962 | # endif | |
963 | #endif | |
964 | .align 32 | |
965 | #else | |
966 | NORMAL_TRAP(0x42); | |
967 | #endif | |
968 | ||
969 | HT0_Interrupt_Level_3_0x43: | |
970 | #ifdef H_HT0_Interrupt_Level_3_0x43 | |
971 | #ifdef SUN_H_HT0_Interrupt_Level_3_0x43 | |
972 | SUN_H_HT0_Interrupt_Level_3_0x43 | |
973 | #else | |
974 | # ifdef My_HT0_Interrupt_Level_3_0x43 | |
975 | My_HT0_Interrupt_Level_3_0x43 | |
976 | # else | |
977 | CUSTOM_TRAP(H_HT0_Interrupt_Level_3_0x43) | |
978 | # endif | |
979 | #endif | |
980 | .align 32 | |
981 | #else | |
982 | NORMAL_TRAP(0x43); | |
983 | #endif | |
984 | ||
985 | HT0_Interrupt_Level_4_0x44: | |
986 | #ifdef H_HT0_Interrupt_Level_4_0x44 | |
987 | #ifdef SUN_H_HT0_Interrupt_Level_4_0x44 | |
988 | SUN_H_HT0_Interrupt_Level_4_0x44 | |
989 | #else | |
990 | # ifdef My_HT0_Interrupt_Level_4_0x44 | |
991 | My_HT0_Interrupt_Level_4_0x44 | |
992 | # else | |
993 | CUSTOM_TRAP(H_HT0_Interrupt_Level_4_0x44) | |
994 | # endif | |
995 | #endif | |
996 | .align 32 | |
997 | #else | |
998 | NORMAL_TRAP(0x44); | |
999 | #endif | |
1000 | ||
1001 | HT0_Interrupt_Level_5_0x45: | |
1002 | #ifdef H_HT0_Interrupt_Level_5_0x45 | |
1003 | #ifdef SUN_H_HT0_Interrupt_Level_5_0x45 | |
1004 | SUN_H_HT0_Interrupt_Level_5_0x45 | |
1005 | #else | |
1006 | # ifdef My_HT0_Interrupt_Level_5_0x45 | |
1007 | My_HT0_Interrupt_Level_5_0x45 | |
1008 | # else | |
1009 | CUSTOM_TRAP(H_HT0_Interrupt_Level_5_0x45) | |
1010 | # endif | |
1011 | #endif | |
1012 | .align 32 | |
1013 | #else | |
1014 | NORMAL_TRAP(0x45); | |
1015 | #endif | |
1016 | ||
1017 | HT0_Interrupt_Level_6_0x46: | |
1018 | #ifdef H_HT0_Interrupt_Level_6_0x46 | |
1019 | #ifdef SUN_H_HT0_Interrupt_Level_6_0x46 | |
1020 | SUN_H_HT0_Interrupt_Level_6_0x46 | |
1021 | #else | |
1022 | # ifdef My_HT0_Interrupt_Level_6_0x46 | |
1023 | My_HT0_Interrupt_Level_6_0x46 | |
1024 | # else | |
1025 | CUSTOM_TRAP(H_HT0_Interrupt_Level_6_0x46) | |
1026 | # endif | |
1027 | #endif | |
1028 | .align 32 | |
1029 | #else | |
1030 | NORMAL_TRAP(0x46); | |
1031 | #endif | |
1032 | ||
1033 | HT0_Interrupt_Level_7_0x47: | |
1034 | #ifdef H_HT0_Interrupt_Level_7_0x47 | |
1035 | #ifdef SUN_H_HT0_Interrupt_Level_7_0x47 | |
1036 | SUN_H_HT0_Interrupt_Level_7_0x47 | |
1037 | #else | |
1038 | # ifdef My_HT0_Interrupt_Level_7_0x47 | |
1039 | My_HT0_Interrupt_Level_7_0x47 | |
1040 | # else | |
1041 | CUSTOM_TRAP(H_HT0_Interrupt_Level_7_0x47) | |
1042 | # endif | |
1043 | #endif | |
1044 | .align 32 | |
1045 | #else | |
1046 | NORMAL_TRAP(0x47); | |
1047 | #endif | |
1048 | ||
1049 | HT0_Interrupt_Level_8_0x48: | |
1050 | #ifdef H_HT0_Interrupt_Level_8_0x48 | |
1051 | #ifdef SUN_H_HT0_Interrupt_Level_8_0x48 | |
1052 | SUN_H_HT0_Interrupt_Level_8_0x48 | |
1053 | #else | |
1054 | # ifdef My_HT0_Interrupt_Level_8_0x48 | |
1055 | My_HT0_Interrupt_Level_8_0x48 | |
1056 | # else | |
1057 | CUSTOM_TRAP(H_HT0_Interrupt_Level_8_0x48) | |
1058 | # endif | |
1059 | #endif | |
1060 | .align 32 | |
1061 | #else | |
1062 | NORMAL_TRAP(0x48); | |
1063 | #endif | |
1064 | ||
1065 | HT0_Interrupt_Level_9_0x49: | |
1066 | #ifdef H_HT0_Interrupt_Level_9_0x49 | |
1067 | #ifdef SUN_H_HT0_Interrupt_Level_9_0x49 | |
1068 | SUN_H_HT0_Interrupt_Level_9_0x49 | |
1069 | #else | |
1070 | # ifdef My_HT0_Interrupt_Level_9_0x49 | |
1071 | My_HT0_Interrupt_Level_9_0x49 | |
1072 | # else | |
1073 | CUSTOM_TRAP(H_HT0_Interrupt_Level_9_0x49) | |
1074 | # endif | |
1075 | #endif | |
1076 | .align 32 | |
1077 | #else | |
1078 | NORMAL_TRAP(0x49); | |
1079 | #endif | |
1080 | ||
1081 | HT0_Interrupt_Level_10_0x4a: | |
1082 | #ifdef H_HT0_Interrupt_Level_10_0x4a | |
1083 | #ifdef SUN_H_HT0_Interrupt_Level_10_0x4a | |
1084 | SUN_H_HT0_Interrupt_Level_10_0x4a | |
1085 | #else | |
1086 | # ifdef My_HT0_Interrupt_Level_10_0x4a | |
1087 | My_HT0_Interrupt_Level_10_0x4a | |
1088 | # else | |
1089 | CUSTOM_TRAP(H_HT0_Interrupt_Level_10_0x4a) | |
1090 | # endif | |
1091 | #endif | |
1092 | .align 32 | |
1093 | #else | |
1094 | NORMAL_TRAP(0x4a); | |
1095 | #endif | |
1096 | ||
1097 | HT0_Interrupt_Level_11_0x4b: | |
1098 | #ifdef H_HT0_Interrupt_Level_11_0x4b | |
1099 | #ifdef SUN_H_HT0_Interrupt_Level_11_0x4b | |
1100 | SUN_H_HT0_Interrupt_Level_11_0x4b | |
1101 | #else | |
1102 | # ifdef My_HT0_Interrupt_Level_11_0x4b | |
1103 | My_HT0_Interrupt_Level_11_0x4b | |
1104 | # else | |
1105 | CUSTOM_TRAP(H_HT0_Interrupt_Level_11_0x4b) | |
1106 | # endif | |
1107 | #endif | |
1108 | .align 32 | |
1109 | #else | |
1110 | NORMAL_TRAP(0x4b); | |
1111 | #endif | |
1112 | ||
1113 | HT0_Interrupt_Level_12_0x4c: | |
1114 | #ifdef H_HT0_Interrupt_Level_12_0x4c | |
1115 | #ifdef SUN_H_HT0_Interrupt_Level_12_0x4c | |
1116 | SUN_H_HT0_Interrupt_Level_12_0x4c | |
1117 | #else | |
1118 | # ifdef My_HT0_Interrupt_Level_12_0x4c | |
1119 | My_HT0_Interrupt_Level_12_0x4c | |
1120 | # else | |
1121 | CUSTOM_TRAP(H_HT0_Interrupt_Level_12_0x4c) | |
1122 | # endif | |
1123 | #endif | |
1124 | .align 32 | |
1125 | #else | |
1126 | NORMAL_TRAP(0x4c); | |
1127 | #endif | |
1128 | ||
1129 | HT0_Interrupt_Level_13_0x4d: | |
1130 | #ifdef H_HT0_Interrupt_Level_13_0x4d | |
1131 | #ifdef SUN_H_HT0_Interrupt_Level_13_0x4d | |
1132 | SUN_H_HT0_Interrupt_Level_13_0x4d | |
1133 | #else | |
1134 | # ifdef My_HT0_Interrupt_Level_13_0x4d | |
1135 | My_HT0_Interrupt_Level_13_0x4d | |
1136 | # else | |
1137 | CUSTOM_TRAP(H_HT0_Interrupt_Level_13_0x4d) | |
1138 | # endif | |
1139 | #endif | |
1140 | .align 32 | |
1141 | #else | |
1142 | NORMAL_TRAP(0x4d); | |
1143 | #endif | |
1144 | ||
1145 | HT0_Interrupt_Level_14_0x4e: | |
1146 | #ifdef H_HT0_Interrupt_Level_14_0x4e | |
1147 | #ifdef SUN_H_HT0_Interrupt_Level_14_0x4e | |
1148 | SUN_H_HT0_Interrupt_Level_14_0x4e | |
1149 | #else | |
1150 | # ifdef My_HT0_Interrupt_Level_14_0x4e | |
1151 | My_HT0_Interrupt_Level_14_0x4e | |
1152 | # else | |
1153 | CUSTOM_TRAP(H_HT0_Interrupt_Level_14_0x4e) | |
1154 | # endif | |
1155 | #endif | |
1156 | .align 32 | |
1157 | #else | |
1158 | NORMAL_TRAP(0x4e); | |
1159 | #endif | |
1160 | ||
1161 | HT0_Interrupt_Level_15_0x4f: | |
1162 | #ifdef H_HT0_Interrupt_Level_15_0x4f | |
1163 | #ifdef SUN_H_HT0_Interrupt_Level_15_0x4f | |
1164 | SUN_H_HT0_Interrupt_Level_15_0x4f | |
1165 | #else | |
1166 | # ifdef My_HT0_Interrupt_Level_15_0x4f | |
1167 | My_HT0_Interrupt_Level_15_0x4f | |
1168 | # else | |
1169 | CUSTOM_TRAP(H_HT0_Interrupt_Level_15_0x4f) | |
1170 | # endif | |
1171 | #endif | |
1172 | .align 32 | |
1173 | #else | |
1174 | NORMAL_TRAP(0x4f); | |
1175 | #endif | |
1176 | ||
1177 | HT0_Reserved_0x50: | |
1178 | #ifdef H_HT0_Reserved_0x50 | |
1179 | #ifdef SUN_H_HT0_Reserved_0x50 | |
1180 | SUN_H_HT0_Reserved_0x50 | |
1181 | #else | |
1182 | CUSTOM_TRAP(H_HT0_Reserved_0x50) | |
1183 | #endif | |
1184 | .align 32 | |
1185 | #else | |
1186 | NORMAL_TRAP(0x50); | |
1187 | #endif | |
1188 | ||
1189 | HT0_Reserved_0x51: | |
1190 | #ifdef H_HT0_Reserved_0x51 | |
1191 | #ifdef SUN_H_HT0_Reserved_0x51 | |
1192 | SUN_H_HT0_Reserved_0x51 | |
1193 | #else | |
1194 | CUSTOM_TRAP(H_HT0_Reserved_0x51) | |
1195 | #endif | |
1196 | .align 32 | |
1197 | #else | |
1198 | NORMAL_TRAP(0x51); | |
1199 | #endif | |
1200 | ||
1201 | HT0_Reserved_0x52: | |
1202 | #ifdef H_HT0_Reserved_0x52 | |
1203 | #ifdef SUN_H_HT0_Reserved_0x52 | |
1204 | SUN_H_HT0_Reserved_0x52 | |
1205 | #else | |
1206 | CUSTOM_TRAP(H_HT0_Reserved_0x52) | |
1207 | #endif | |
1208 | .align 32 | |
1209 | #else | |
1210 | NORMAL_TRAP(0x52); | |
1211 | #endif | |
1212 | ||
1213 | HT0_Reserved_0x53: | |
1214 | #ifdef H_HT0_Reserved_0x53 | |
1215 | #ifdef SUN_H_HT0_Reserved_0x53 | |
1216 | SUN_H_HT0_Reserved_0x53 | |
1217 | #else | |
1218 | CUSTOM_TRAP(H_HT0_Reserved_0x53) | |
1219 | #endif | |
1220 | .align 32 | |
1221 | #else | |
1222 | NORMAL_TRAP(0x53); | |
1223 | #endif | |
1224 | ||
1225 | HT0_Reserved_0x54: | |
1226 | #ifdef H_HT0_Reserved_0x54 | |
1227 | #ifdef SUN_H_HT0_Reserved_0x54 | |
1228 | SUN_H_HT0_Reserved_0x54 | |
1229 | #else | |
1230 | CUSTOM_TRAP(H_HT0_Reserved_0x54) | |
1231 | #endif | |
1232 | .align 32 | |
1233 | #else | |
1234 | NORMAL_TRAP(0x54); | |
1235 | #endif | |
1236 | ||
1237 | HT0_Reserved_0x55: | |
1238 | #ifdef H_HT0_Reserved_0x55 | |
1239 | #ifdef SUN_H_HT0_Reserved_0x55 | |
1240 | SUN_H_HT0_Reserved_0x55 | |
1241 | #else | |
1242 | CUSTOM_TRAP(H_HT0_Reserved_0x55) | |
1243 | #endif | |
1244 | .align 32 | |
1245 | #else | |
1246 | NORMAL_TRAP(0x55); | |
1247 | #endif | |
1248 | ||
1249 | HT0_Reserved_0x56: | |
1250 | #ifdef H_HT0_Reserved_0x56 | |
1251 | #ifdef SUN_H_HT0_Reserved_0x56 | |
1252 | SUN_H_HT0_Reserved_0x56 | |
1253 | #else | |
1254 | CUSTOM_TRAP(H_HT0_Reserved_0x56) | |
1255 | #endif | |
1256 | .align 32 | |
1257 | #else | |
1258 | NORMAL_TRAP(0x56); | |
1259 | #endif | |
1260 | ||
1261 | HT0_Reserved_0x57: | |
1262 | #ifdef H_HT0_Reserved_0x57 | |
1263 | #ifdef SUN_H_HT0_Reserved_0x57 | |
1264 | SUN_H_HT0_Reserved_0x57 | |
1265 | #else | |
1266 | CUSTOM_TRAP(H_HT0_Reserved_0x57) | |
1267 | #endif | |
1268 | .align 32 | |
1269 | #else | |
1270 | NORMAL_TRAP(0x57); | |
1271 | #endif | |
1272 | ||
1273 | HT0_Reserved_0x58: | |
1274 | #ifdef H_HT0_Reserved_0x58 | |
1275 | #ifdef SUN_H_HT0_Reserved_0x58 | |
1276 | SUN_H_HT0_Reserved_0x58 | |
1277 | #else | |
1278 | CUSTOM_TRAP(H_HT0_Reserved_0x58) | |
1279 | #endif | |
1280 | .align 32 | |
1281 | #else | |
1282 | NORMAL_TRAP(0x58); | |
1283 | #endif | |
1284 | ||
1285 | HT0_Reserved_0x59: | |
1286 | #ifdef H_HT0_Reserved_0x59 | |
1287 | #ifdef SUN_H_HT0_Reserved_0x59 | |
1288 | SUN_H_HT0_Reserved_0x59 | |
1289 | #else | |
1290 | CUSTOM_TRAP(H_HT0_Reserved_0x59) | |
1291 | #endif | |
1292 | .align 32 | |
1293 | #else | |
1294 | NORMAL_TRAP(0x59); | |
1295 | #endif | |
1296 | ||
1297 | HT0_Reserved_0x5a: | |
1298 | #ifdef H_HT0_Reserved_0x5a | |
1299 | #ifdef SUN_H_HT0_Reserved_0x5a | |
1300 | SUN_H_HT0_Reserved_0x5a | |
1301 | #else | |
1302 | CUSTOM_TRAP(H_HT0_Reserved_0x5a) | |
1303 | #endif | |
1304 | .align 32 | |
1305 | #else | |
1306 | NORMAL_TRAP(0x5a); | |
1307 | #endif | |
1308 | ||
1309 | HT0_Reserved_0x5b: | |
1310 | #ifdef H_HT0_Reserved_0x5b | |
1311 | #ifdef SUN_H_HT0_Reserved_0x5b | |
1312 | SUN_H_HT0_Reserved_0x5b | |
1313 | #else | |
1314 | CUSTOM_TRAP(H_HT0_Reserved_0x5b) | |
1315 | #endif | |
1316 | .align 32 | |
1317 | #else | |
1318 | NORMAL_TRAP(0x5b); | |
1319 | #endif | |
1320 | ||
1321 | HT0_Reserved_0x5c: | |
1322 | #ifdef H_HT0_Reserved_0x5c | |
1323 | #ifdef SUN_H_HT0_Reserved_0x5c | |
1324 | SUN_H_HT0_Reserved_0x5c | |
1325 | #else | |
1326 | CUSTOM_TRAP(H_HT0_Reserved_0x5c) | |
1327 | #endif | |
1328 | .align 32 | |
1329 | #else | |
1330 | NORMAL_TRAP(0x5c); | |
1331 | #endif | |
1332 | ||
1333 | HT0_Reserved_0x5d: | |
1334 | #ifdef H_HT0_Reserved_0x5d | |
1335 | #ifdef SUN_H_HT0_Reserved_0x5d | |
1336 | SUN_H_HT0_Reserved_0x5d | |
1337 | #else | |
1338 | CUSTOM_TRAP(H_HT0_Reserved_0x5d) | |
1339 | #endif | |
1340 | .align 32 | |
1341 | #else | |
1342 | NORMAL_TRAP(0x5d); | |
1343 | #endif | |
1344 | ||
1345 | HT0_Hstick_Match_0x5e: | |
1346 | #ifdef H_HT0_Hstick_Match_0x5e | |
1347 | #ifdef SUN_H_HT0_Hstick_Match_0x5e | |
1348 | SUN_H_HT0_Hstick_Match_0x5e | |
1349 | #else | |
1350 | # ifdef My_HT0_Hstick_Match_0x5e | |
1351 | My_HT0_Hstick_Match_0x5e | |
1352 | # else | |
1353 | CUSTOM_TRAP(H_HT0_Hstick_Match_0x5e) | |
1354 | # endif | |
1355 | #endif | |
1356 | .align 32 | |
1357 | #else | |
1358 | ! disable HSTICK_COMPARE | |
1359 | wrhpr %g0, -1, %hsys_tick_cmpr | |
1360 | wrhpr %g0, 0, %hintp | |
1361 | mov 0x5e, %g7 | |
1362 | b TrapCheckWithRetry | |
1363 | nop | |
1364 | nop | |
1365 | nop | |
1366 | nop | |
1367 | #endif | |
1368 | ||
1369 | HT0_Trap_Level_Zero_0x5f: | |
1370 | #ifdef H_HT0_Trap_Level_Zero_0x5f | |
1371 | #ifdef SUN_H_HT0_Trap_Level_Zero_0x5f | |
1372 | SUN_H_HT0_Trap_Level_Zero_0x5f | |
1373 | #else | |
1374 | # ifdef My_HT0_Trap_Level_Zero_0x5f | |
1375 | My_HT0_Trap_Level_Zero_0x5f | |
1376 | # else | |
1377 | CUSTOM_TRAP(H_HT0_Trap_Level_Zero_0x5f) | |
1378 | # endif | |
1379 | #endif | |
1380 | .align 32 | |
1381 | #else | |
1382 | rdhpr %htstate, %g1 | |
1383 | mov 0x1, %g2 | |
1384 | wrhpr %g1, %g2, %htstate | |
1385 | mov 0x5f, %g7 | |
1386 | b TrapCheckWithRetry | |
1387 | nop | |
1388 | nop | |
1389 | nop | |
1390 | #endif | |
1391 | ||
1392 | HT0_Interrupt_0x60: | |
1393 | #ifdef H_HT0_Interrupt_0x60 | |
1394 | #ifdef SUN_H_HT0_Interrupt_0x60 | |
1395 | SUN_H_HT0_Interrupt_0x60 | |
1396 | #else | |
1397 | # ifdef My_HT0_Interrupt_0x60 | |
1398 | My_HT0_Interrupt_0x60 | |
1399 | # else | |
1400 | CUSTOM_TRAP(H_HT0_Interrupt_0x60) | |
1401 | # endif | |
1402 | #endif | |
1403 | .align 32 | |
1404 | #else | |
1405 | NORMAL_TRAP(0x60); | |
1406 | #endif | |
1407 | ||
1408 | HT0_PA_Watchpoint_0x61: | |
1409 | #ifdef H_HT0_PA_Watchpoint_0x61 | |
1410 | #ifdef SUN_H_HT0_PA_Watchpoint_0x61 | |
1411 | SUN_H_HT0_PA_Watchpoint_0x61 | |
1412 | #else | |
1413 | # ifdef My_H_HT0_PA_Watchpoint_0x61 | |
1414 | My_H_HT0_PA_Watchpoint_0x61 | |
1415 | # else | |
1416 | CUSTOM_TRAP(H_HT0_PA_Watchpoint_0x61) | |
1417 | # endif | |
1418 | #endif | |
1419 | .align 32 | |
1420 | #else | |
1421 | NORMAL_TRAP(0x61); | |
1422 | #endif | |
1423 | ||
1424 | HT0_VA_Watchpoint_0x62: | |
1425 | #ifdef H_HT0_VA_Watchpoint_0x62 | |
1426 | #ifdef SUN_H_HT0_VA_Watchpoint_0x62 | |
1427 | SUN_H_HT0_VA_Watchpoint_0x62 | |
1428 | #else | |
1429 | # ifdef My_H_HT0_VA_Watchpoint_0x62 | |
1430 | My_H_HT0_VA_Watchpoint_0x62 | |
1431 | # else | |
1432 | CUSTOM_TRAP(H_HT0_VA_Watchpoint_0x62) | |
1433 | # endif | |
1434 | #endif | |
1435 | .align 32 | |
1436 | #else | |
1437 | NORMAL_TRAP(0x62); | |
1438 | #endif | |
1439 | ||
1440 | HT0_Hw_Corrected_Error_0x63: | |
1441 | #ifdef H_HT0_Hw_Corrected_Error_0x63 | |
1442 | #ifdef SUN_H_HT0_Hw_Corrected_Error_0x63 | |
1443 | SUN_H_HT0_Hw_Corrected_Error_0x63 | |
1444 | #else | |
1445 | CUSTOM_TRAP(H_HT0_Hw_Corrected_Error_0x63) | |
1446 | #endif | |
1447 | .align 32 | |
1448 | #else | |
1449 | NORMAL_TRAP(0x63); | |
1450 | #endif | |
1451 | ||
1452 | HT0_Fast_Instr_Access_MMU_Miss_0x64: | |
1453 | #ifdef H_HT0_fast_instr_access_MMU_miss | |
1454 | #ifdef SUN_H_HT0_fast_instr_access_MMU_miss | |
1455 | SUN_H_HT0_fast_instr_access_MMU_miss | |
1456 | #else | |
1457 | CUSTOM_TRAP(H_HT0_fast_instr_access_MMU_miss) | |
1458 | #endif | |
1459 | #else | |
1460 | #ifdef S2MEM_IMMU_MISS_HANDLER | |
1461 | #include S2MEM_IMMU_MISS_HANDLER | |
1462 | #else | |
1463 | !!#include <immu_miss_handler.s> | |
1464 | ! jump into an include file. immu_miss_handler_ext.s | |
1465 | ba immu_miss_handler | |
1466 | nop | |
1467 | #endif | |
1468 | #endif | |
1469 | ||
1470 | .align 128 | |
1471 | HT0_Fast_Data_Access_MMU_Miss_0x68: | |
1472 | #ifdef H_HT0_fast_data_access_MMU_miss | |
1473 | #ifdef SUN_H_HT0_fast_data_access_MMU_miss | |
1474 | SUN_H_HT0_fast_data_access_MMU_miss | |
1475 | #else | |
1476 | CUSTOM_TRAP(H_HT0_fast_data_access_MMU_miss) | |
1477 | #endif | |
1478 | #else | |
1479 | #ifdef S2MEM_DMMU_MISS_HANDLER | |
1480 | #include S2MEM_DMMU_MISS_HANDLER | |
1481 | #else | |
1482 | !!#include <dmmu_miss_handler.s> | |
1483 | ! jump into an include file. dmmu_miss_handler_ext.s | |
1484 | ba dmmu_miss_handler | |
1485 | nop | |
1486 | #endif | |
1487 | #endif | |
1488 | ||
1489 | .align 128 | |
1490 | HT0_Fast_Data_Access_Protection_0x6c: | |
1491 | #ifdef H_HT0_data_access_protection_0x6c | |
1492 | #ifdef SUN_H_HT0_data_access_protection_0x6c | |
1493 | SUN_H_HT0_data_access_protection_0x6c | |
1494 | #else | |
1495 | # ifdef My_HT0_data_access_protection_0x6c | |
1496 | My_HT0_data_access_protection_0x6c | |
1497 | # else | |
1498 | CUSTOM_TRAP(H_HT0_data_access_protection_0x6c) | |
1499 | # endif | |
1500 | #endif | |
1501 | #else | |
1502 | #ifdef SET_DTTE_W_ON_DATA_ACC_PROT | |
1503 | ba daccess_prot_handler | |
1504 | nop | |
1505 | #else | |
1506 | NORMAL_TRAP(0x6c); | |
1507 | #endif | |
1508 | #endif | |
1509 | ||
1510 | .align 128 | |
1511 | HT0_Reserved_0x70: | |
1512 | #ifdef H_HT0_Reserved_0x70 | |
1513 | #ifdef SUN_H_HT0_Reserved_0x70 | |
1514 | SUN_H_HT0_Reserved_0x70 | |
1515 | #else | |
1516 | CUSTOM_TRAP(H_HT0_Reserved_0x70) | |
1517 | #endif | |
1518 | .align 32 | |
1519 | #else | |
1520 | NORMAL_TRAP(0x70); | |
1521 | #endif | |
1522 | ||
1523 | HT0_Instruction_Access_MMU_Error_0x71: | |
1524 | #ifdef H_HT0_Instruction_Access_MMU_Error_0x71 | |
1525 | #ifdef SUN_H_HT0_Instruction_Access_MMU_Error_0x71 | |
1526 | SUN_H_HT0_Instruction_Access_MMU_Error_0x71 | |
1527 | #else | |
1528 | CUSTOM_TRAP(H_HT0_Instruction_Access_MMU_Error_0x71) | |
1529 | #endif | |
1530 | .align 32 | |
1531 | #else | |
1532 | NORMAL_TRAP(0x71); | |
1533 | #endif | |
1534 | ||
1535 | HT0_Data_Access_MMU_Error_0x72: | |
1536 | #ifdef H_HT0_Data_Access_MMU_Error_0x72 | |
1537 | #ifdef SUN_H_HT0_Data_Access_MMU_Error_0x72 | |
1538 | SUN_H_HT0_Data_Access_MMU_Error_0x72 | |
1539 | #else | |
1540 | CUSTOM_TRAP(H_HT0_Data_Access_MMU_Error_0x72) | |
1541 | #endif | |
1542 | .align 32 | |
1543 | #else | |
1544 | NORMAL_TRAP(0x72); | |
1545 | #endif | |
1546 | ||
1547 | HT0_Reserved_0x73: | |
1548 | #ifdef H_HT0_Reserved_0x73 | |
1549 | #ifdef SUN_H_HT0_Reserved_0x73 | |
1550 | SUN_H_HT0_Reserved_0x73 | |
1551 | #else | |
1552 | CUSTOM_TRAP(H_HT0_Reserved_0x73) | |
1553 | #endif | |
1554 | .align 32 | |
1555 | #else | |
1556 | NORMAL_TRAP(0x73); | |
1557 | #endif | |
1558 | ||
1559 | HT0_Control_Transfer_Instr_0x74: | |
1560 | #ifdef H_HT0_Control_Transfer_Instr_0x74 | |
1561 | #ifdef SUN_H_HT0_Control_Transfer_Instr_0x74 | |
1562 | SUN_H_HT0_Control_Transfer_Instr_0x74 | |
1563 | #else | |
1564 | # ifdef My_H_HT0_Control_Transfer_Instr_0x74 | |
1565 | My_H_HT0_Control_Transfer_Instr_0x74 | |
1566 | # else | |
1567 | CUSTOM_TRAP(HT0_Control_Transfer_Instr_0x74) | |
1568 | # endif | |
1569 | #endif | |
1570 | .align 32 | |
1571 | #else | |
1572 | NORMAL_TRAP(0x74); | |
1573 | #endif | |
1574 | ||
1575 | HT0_Instruction_VA_Watchpoint_0x75: | |
1576 | #ifdef H_HT0_Instruction_VA_Watchpoint_0x75 | |
1577 | #ifdef SUN_H_HT0_Instruction_VA_Watchpoint_0x75 | |
1578 | SUN_H_HT0_Instruction_VA_Watchpoint_0x75 | |
1579 | #else | |
1580 | CUSTOM_TRAP(H_HT0_Instruction_VA_Watchpoint_0x75) | |
1581 | #endif | |
1582 | .align 32 | |
1583 | #else | |
1584 | NORMAL_TRAP(0x75); | |
1585 | #endif | |
1586 | ||
1587 | HT0_Instruction_Breakpoint_0x76: | |
1588 | #ifdef H_HT0_Instruction_Breakpoint_0x76 | |
1589 | #ifdef SUN_H_HT0_Instruction_Breakpoint_0x76 | |
1590 | SUN_H_HT0_Instruction_Breakpoint_0x76 | |
1591 | #else | |
1592 | CUSTOM_TRAP(H_HT0_Instruction_Breakpoint_0x76) | |
1593 | #endif | |
1594 | .align 32 | |
1595 | #else | |
1596 | NORMAL_TRAP(0x76); | |
1597 | #endif | |
1598 | ||
1599 | HT0_Reserved_0x77: | |
1600 | #ifdef H_HT0_Reserved_0x77 | |
1601 | #ifdef SUN_H_HT0_Reserved_0x77 | |
1602 | SUN_H_HT0_Reserved_0x77 | |
1603 | #else | |
1604 | CUSTOM_TRAP(H_HT0_Reserved_0x77) | |
1605 | #endif | |
1606 | .align 32 | |
1607 | #else | |
1608 | NORMAL_TRAP(0x77); | |
1609 | #endif | |
1610 | ||
1611 | HT0_Reserved_0x78: | |
1612 | #ifdef H_HT0_Reserved_0x78 | |
1613 | #ifdef SUN_H_HT0_Reserved_0x78 | |
1614 | SUN_H_HT0_Reserved_0x78 | |
1615 | #else | |
1616 | CUSTOM_TRAP(H_HT0_Reserved_0x78) | |
1617 | #endif | |
1618 | .align 32 | |
1619 | #else | |
1620 | NORMAL_TRAP(0x78); | |
1621 | #endif | |
1622 | ||
1623 | HT0_Reserved_0x79: | |
1624 | #ifdef H_HT0_Reserved_0x79 | |
1625 | #ifdef SUN_H_HT0_Reserved_0x79 | |
1626 | SUN_H_HT0_Reserved_0x79 | |
1627 | #else | |
1628 | CUSTOM_TRAP(H_HT0_Reserved_0x79) | |
1629 | #endif | |
1630 | .align 32 | |
1631 | #else | |
1632 | NORMAL_TRAP(0x79); | |
1633 | #endif | |
1634 | ||
1635 | HT0_Reserved_0x7a: | |
1636 | #ifdef H_HT0_Reserved_0x7a | |
1637 | #ifdef SUN_H_HT0_Reserved_0x7a | |
1638 | SUN_H_HT0_Reserved_0x7a | |
1639 | #else | |
1640 | CUSTOM_TRAP(H_HT0_Reserved_0x7a) | |
1641 | #endif | |
1642 | .align 32 | |
1643 | #else | |
1644 | NORMAL_TRAP(0x7a); | |
1645 | #endif | |
1646 | ||
1647 | HT0_Reserved_0x7b: | |
1648 | #ifdef H_HT0_Reserved_0x7b | |
1649 | #ifdef SUN_H_HT0_Reserved_0x7b | |
1650 | SUN_H_HT0_Reserved_0x7b | |
1651 | #else | |
1652 | CUSTOM_TRAP(H_HT0_Reserved_0x7b) | |
1653 | #endif | |
1654 | .align 32 | |
1655 | #else | |
1656 | NORMAL_TRAP(0x7b); | |
1657 | #endif | |
1658 | ||
1659 | HT0_Reserved_0x7c: | |
1660 | #ifdef H_HT0_Reserved_0x7c | |
1661 | #ifdef SUN_H_HT0_Reserved_0x7c | |
1662 | SUN_H_HT0_Reserved_0x7c | |
1663 | #else | |
1664 | CUSTOM_TRAP(H_HT0_Reserved_0x7c) | |
1665 | #endif | |
1666 | .align 32 | |
1667 | #else | |
1668 | NORMAL_TRAP(0x7c); | |
1669 | #endif | |
1670 | ||
1671 | HT0_Reserved_0x7d: | |
1672 | #ifdef H_HT0_Reserved_0x7d | |
1673 | #ifdef SUN_H_HT0_Reserved_0x7d | |
1674 | SUN_H_HT0_Reserved_0x7d | |
1675 | #else | |
1676 | CUSTOM_TRAP(H_HT0_Reserved_0x7d) | |
1677 | #endif | |
1678 | .align 32 | |
1679 | #else | |
1680 | NORMAL_TRAP(0x7d); | |
1681 | #endif | |
1682 | ||
1683 | HT0_Reserved_0x7e: | |
1684 | #ifdef H_HT0_Reserved_0x7e | |
1685 | #ifdef SUN_H_HT0_Reserved_0x7e | |
1686 | SUN_H_HT0_Reserved_0x7e | |
1687 | #else | |
1688 | CUSTOM_TRAP(H_HT0_Reserved_0x7e) | |
1689 | #endif | |
1690 | .align 32 | |
1691 | #else | |
1692 | NORMAL_TRAP(0x7e); | |
1693 | #endif | |
1694 | ||
1695 | HT0_Reserved_0x7f: | |
1696 | #ifdef H_HT0_Reserved_0x7f | |
1697 | #ifdef SUN_H_HT0_Reserved_0x7f | |
1698 | SUN_H_HT0_Reserved_0x7f | |
1699 | #else | |
1700 | CUSTOM_TRAP(H_HT0_Reserved_0x7f) | |
1701 | #endif | |
1702 | .align 32 | |
1703 | #else | |
1704 | NORMAL_TRAP(0x7f) | |
1705 | #endif | |
1706 | ||
1707 | HT0_Window_Spill_0_Normal_0x80: | |
1708 | #ifdef H_HT0_Window_Spill_0_Normal_Trap | |
1709 | #ifdef SUN_H_HT0_Window_Spill_0_Normal_Trap | |
1710 | SUN_H_HT0_Window_Spill_0_Normal_Trap | |
1711 | #else | |
1712 | # ifdef My_HT0_Window_Spill_0_Normal_Trap | |
1713 | My_HT0_Window_Spill_0_Normal_Trap | |
1714 | # else | |
1715 | CUSTOM_TRAP(H_HT0_Window_Spill_0_Normal_Trap) | |
1716 | # endif | |
1717 | #endif | |
1718 | #else | |
1719 | SPILL_TRAP(0x80) | |
1720 | #endif | |
1721 | ||
1722 | .align 128 | |
1723 | HT0_Window_Spill_1_Normal_0x84: | |
1724 | #ifdef H_HT0_Window_Spill_1_Normal_Trap | |
1725 | #ifdef SUN_H_HT0_Window_Spill_1_Normal_Trap | |
1726 | SUN_H_HT0_Window_Spill_1_Normal_Trap | |
1727 | #else | |
1728 | # ifdef My_HT0_Window_Spill_1_Normal_Trap | |
1729 | My_HT0_Window_Spill_1_Normal_Trap | |
1730 | # else | |
1731 | CUSTOM_TRAP(H_HT0_Window_Spill_1_Normal_Trap) | |
1732 | # endif | |
1733 | #endif | |
1734 | #else | |
1735 | SPILL_TRAP(0x84) | |
1736 | #endif | |
1737 | ||
1738 | .align 128 | |
1739 | HT0_Window_Spill_2_Normal_0x88: | |
1740 | #ifdef H_HT0_Window_Spill_2_Normal_Trap | |
1741 | #ifdef SUN_H_HT0_Window_Spill_2_Normal_Trap | |
1742 | SUN_H_HT0_Window_Spill_2_Normal_Trap | |
1743 | #else | |
1744 | # ifdef My_HT0_Window_Spill_2_Normal_Trap | |
1745 | My_HT0_Window_Spill_2_Normal_Trap | |
1746 | # else | |
1747 | CUSTOM_TRAP(H_HT0_Window_Spill_2_Normal_Trap) | |
1748 | # endif | |
1749 | #endif | |
1750 | #else | |
1751 | SPILL_TRAP(0x88) | |
1752 | #endif | |
1753 | ||
1754 | .align 128 | |
1755 | HT0_Window_Spill_3_Normal_0x8c: | |
1756 | #ifdef H_HT0_Window_Spill_3_Normal_Trap | |
1757 | #ifdef SUN_H_HT0_Window_Spill_3_Normal_Trap | |
1758 | SUN_H_HT0_Window_Spill_3_Normal_Trap | |
1759 | #else | |
1760 | # ifdef My_HT0_Window_Spill_3_Normal_Trap | |
1761 | My_HT0_Window_Spill_3_Normal_Trap | |
1762 | # else | |
1763 | CUSTOM_TRAP(H_HT0_Window_Spill_3_Normal_Trap) | |
1764 | # endif | |
1765 | #endif | |
1766 | #else | |
1767 | SPILL_TRAP(0x8c) | |
1768 | #endif | |
1769 | ||
1770 | .align 128 | |
1771 | HT0_Window_Spill_4_Normal_0x90: | |
1772 | #ifdef H_HT0_Window_Spill_4_Normal_Trap | |
1773 | #ifdef SUN_H_HT0_Window_Spill_4_Normal_Trap | |
1774 | SUN_H_HT0_Window_Spill_4_Normal_Trap | |
1775 | #else | |
1776 | # ifdef My_HT0_Window_Spill_4_Normal_Trap | |
1777 | My_HT0_Window_Spill_4_Normal_Trap | |
1778 | # else | |
1779 | CUSTOM_TRAP(H_HT0_Window_Spill_4_Normal_Trap) | |
1780 | # endif | |
1781 | #endif | |
1782 | #else | |
1783 | SPILL_TRAP(0x90) | |
1784 | #endif | |
1785 | ||
1786 | .align 128 | |
1787 | HT0_Window_Spill_5_Normal_0x94: | |
1788 | #ifdef H_HT0_Window_Spill_5_Normal_Trap | |
1789 | #ifdef SUN_H_HT0_Window_Spill_5_Normal_Trap | |
1790 | SUN_H_HT0_Window_Spill_5_Normal_Trap | |
1791 | #else | |
1792 | # ifdef My_HT0_Window_Spill_5_Normal_Trap | |
1793 | My_HT0_Window_Spill_5_Normal_Trap | |
1794 | # else | |
1795 | CUSTOM_TRAP(H_HT0_Window_Spill_5_Normal_Trap) | |
1796 | # endif | |
1797 | #endif | |
1798 | #else | |
1799 | SPILL_TRAP(0x94) | |
1800 | #endif | |
1801 | ||
1802 | .align 128 | |
1803 | HT0_Window_Spill_6_Normal_0x98: | |
1804 | #ifdef H_HT0_Window_Spill_6_Normal_Trap | |
1805 | #ifdef SUN_H_HT0_Window_Spill_6_Normal_Trap | |
1806 | SUN_H_HT0_Window_Spill_6_Normal_Trap | |
1807 | #else | |
1808 | # ifdef My_HT0_Window_Spill_6_Normal_Trap | |
1809 | My_HT0_Window_Spill_6_Normal_Trap | |
1810 | # else | |
1811 | CUSTOM_TRAP(H_HT0_Window_Spill_6_Normal_Trap) | |
1812 | # endif | |
1813 | #endif | |
1814 | #else | |
1815 | SPILL_TRAP(0x98) | |
1816 | #endif | |
1817 | ||
1818 | .align 128 | |
1819 | HT0_Window_Spill_7_Normal_0x9c: | |
1820 | #ifdef H_HT0_Window_Spill_7_Normal_Trap | |
1821 | #ifdef SUN_H_HT0_Window_Spill_7_Normal_Trap | |
1822 | SUN_H_HT0_Window_Spill_7_Normal_Trap | |
1823 | #else | |
1824 | # ifdef My_HT0_Window_Spill_7_Normal_Trap | |
1825 | My_HT0_Window_Spill_7_Normal_Trap | |
1826 | # else | |
1827 | CUSTOM_TRAP(H_HT0_Window_Spill_7_Normal_Trap) | |
1828 | # endif | |
1829 | #endif | |
1830 | #else | |
1831 | SPILL_TRAP(0x9c) | |
1832 | #endif | |
1833 | ||
1834 | .align 128 | |
1835 | HT0_Window_Spill_0_Other_0xa0: | |
1836 | #ifdef H_HT0_Window_Spill_0_Other_Trap | |
1837 | #ifdef SUN_H_HT0_Window_Spill_0_Other_Trap | |
1838 | SUN_H_HT0_Window_Spill_0_Other_Trap | |
1839 | #else | |
1840 | # ifdef My_HT0_Window_Spill_0_Other_Trap | |
1841 | My_HT0_Window_Spill_0_Other_Trap | |
1842 | # else | |
1843 | CUSTOM_TRAP(H_HT0_Window_Spill_0_Other_Trap) | |
1844 | # endif | |
1845 | #endif | |
1846 | #else | |
1847 | SPILL_TRAP(0xa0) | |
1848 | #endif | |
1849 | ||
1850 | .align 128 | |
1851 | HT0_Window_Spill_1_Other_0xa4: | |
1852 | #ifdef H_HT0_Window_Spill_1_Other_Trap | |
1853 | #ifdef SUN_H_HT0_Window_Spill_1_Other_Trap | |
1854 | SUN_H_HT0_Window_Spill_1_Other_Trap | |
1855 | #else | |
1856 | # ifdef My_HT0_Window_Spill_1_Other_Trap | |
1857 | My_HT0_Window_Spill_1_Other_Trap | |
1858 | # else | |
1859 | CUSTOM_TRAP(H_HT0_Window_Spill_1_Other_Trap) | |
1860 | # endif | |
1861 | #endif | |
1862 | #else | |
1863 | SPILL_TRAP(0xa4) | |
1864 | #endif | |
1865 | ||
1866 | .align 128 | |
1867 | HT0_Window_Spill_2_Other_0xa8: | |
1868 | #ifdef H_HT0_Window_Spill_2_Other_Trap | |
1869 | #ifdef SUN_H_HT0_Window_Spill_2_Other_Trap | |
1870 | SUN_H_HT0_Window_Spill_2_Other_Trap | |
1871 | #else | |
1872 | # ifdef My_HT0_Window_Spill_2_Other_Trap | |
1873 | My_HT0_Window_Spill_2_Other_Trap | |
1874 | # else | |
1875 | CUSTOM_TRAP(H_HT0_Window_Spill_2_Other_Trap) | |
1876 | # endif | |
1877 | #endif | |
1878 | #else | |
1879 | SPILL_TRAP(0xa8) | |
1880 | #endif | |
1881 | ||
1882 | .align 128 | |
1883 | HT0_Window_Spill_3_Other_0xac: | |
1884 | #ifdef H_HT0_Window_Spill_3_Other_Trap | |
1885 | #ifdef SUN_H_HT0_Window_Spill_3_Other_Trap | |
1886 | SUN_H_HT0_Window_Spill_3_Other_Trap | |
1887 | #else | |
1888 | # ifdef My_HT0_Window_Spill_3_Other_Trap | |
1889 | My_HT0_Window_Spill_3_Other_Trap | |
1890 | # else | |
1891 | CUSTOM_TRAP(H_HT0_Window_Spill_3_Other_Trap) | |
1892 | # endif | |
1893 | #endif | |
1894 | #else | |
1895 | SPILL_TRAP(0xac) | |
1896 | #endif | |
1897 | ||
1898 | .align 128 | |
1899 | HT0_Window_Spill_4_Other_0xb0: | |
1900 | #ifdef H_HT0_Window_Spill_4_Other_Trap | |
1901 | #ifdef SUN_H_HT0_Window_Spill_4_Other_Trap | |
1902 | SUN_H_HT0_Window_Spill_4_Other_Trap | |
1903 | #else | |
1904 | # ifdef My_HT0_Window_Spill_4_Other_Trap | |
1905 | My_HT0_Window_Spill_4_Other_Trap | |
1906 | # else | |
1907 | CUSTOM_TRAP(H_HT0_Window_Spill_4_Other_Trap) | |
1908 | # endif | |
1909 | #endif | |
1910 | #else | |
1911 | SPILL_TRAP(0xb0) | |
1912 | #endif | |
1913 | ||
1914 | .align 128 | |
1915 | HT0_Window_Spill_5_Other_0xb4: | |
1916 | #ifdef H_HT0_Window_Spill_5_Other_Trap | |
1917 | #ifdef SUN_H_HT0_Window_Spill_5_Other_Trap | |
1918 | SUN_H_HT0_Window_Spill_5_Other_Trap | |
1919 | #else | |
1920 | # ifdef My_HT0_Window_Spill_5_Other_Trap | |
1921 | My_HT0_Window_Spill_5_Other_Trap | |
1922 | # else | |
1923 | CUSTOM_TRAP(H_HT0_Window_Spill_5_Other_Trap) | |
1924 | # endif | |
1925 | #endif | |
1926 | #else | |
1927 | SPILL_TRAP(0xb4) | |
1928 | #endif | |
1929 | ||
1930 | .align 128 | |
1931 | HT0_Window_Spill_6_Other_0xb8: | |
1932 | #ifdef H_HT0_Window_Spill_6_Other_Trap | |
1933 | #ifdef SUN_H_HT0_Window_Spill_6_Other_Trap | |
1934 | SUN_H_HT0_Window_Spill_6_Other_Trap | |
1935 | #else | |
1936 | # ifdef My_HT0_Window_Spill_6_Other_Trap | |
1937 | My_HT0_Window_Spill_6_Other_Trap | |
1938 | # else | |
1939 | CUSTOM_TRAP(H_HT0_Window_Spill_6_Other_Trap) | |
1940 | # endif | |
1941 | #endif | |
1942 | #else | |
1943 | SPILL_TRAP(0xb8) | |
1944 | #endif | |
1945 | ||
1946 | .align 128 | |
1947 | HT0_Window_Spill_7_Other_0xbc: | |
1948 | #ifdef H_HT0_Window_Spill_7_Other_Trap | |
1949 | #ifdef SUN_H_HT0_Window_Spill_7_Other_Trap | |
1950 | SUN_H_HT0_Window_Spill_7_Other_Trap | |
1951 | #else | |
1952 | # ifdef My_HT0_Window_Spill_7_Other_Trap | |
1953 | My_HT0_Window_Spill_7_Other_Trap | |
1954 | # else | |
1955 | CUSTOM_TRAP(H_HT0_Window_Spill_7_Other_Trap) | |
1956 | # endif | |
1957 | #endif | |
1958 | #else | |
1959 | SPILL_TRAP(0xbc) | |
1960 | #endif | |
1961 | ||
1962 | .align 128 | |
1963 | HT0_Window_Fill_0_Normal_0xc0: | |
1964 | #ifdef H_HT0_Window_Fill_0_Normal_Trap | |
1965 | #ifdef SUN_H_HT0_Window_Fill_0_Normal_Trap | |
1966 | SUN_H_HT0_Window_Fill_0_Normal_Trap | |
1967 | #else | |
1968 | # ifdef My_HT0_Window_Fill_0_Normal_Trap | |
1969 | My_HT0_Window_Fill_0_Normal_Trap | |
1970 | # else | |
1971 | CUSTOM_TRAP(H_HT0_Window_Fill_0_Normal_Trap) | |
1972 | # endif | |
1973 | #endif | |
1974 | #else | |
1975 | #ifdef FILL_TRAP_RETRY | |
1976 | restored; retry; nop;nop;nop;nop;nop;nop; | |
1977 | #else | |
1978 | FILL_TRAP(0xc0) | |
1979 | #endif | |
1980 | #endif | |
1981 | ||
1982 | .align 128 | |
1983 | HT0_Window_Fill_1_Normal_0xc4: | |
1984 | #ifdef H_HT0_Window_Fill_1_Normal_Trap | |
1985 | #ifdef SUN_H_HT0_Window_Fill_1_Normal_Trap | |
1986 | SUN_H_HT0_Window_Fill_1_Normal_Trap | |
1987 | #else | |
1988 | # ifdef My_HT0_Window_Fill_1_Normal_Trap | |
1989 | My_HT0_Window_Fill_1_Normal_Trap | |
1990 | # else | |
1991 | CUSTOM_TRAP(H_HT0_Window_Fill_1_Normal_Trap) | |
1992 | # endif | |
1993 | #endif | |
1994 | #else | |
1995 | FILL_TRAP(0xc4) | |
1996 | #endif | |
1997 | ||
1998 | .align 128 | |
1999 | HT0_Window_Fill_2_Normal_0xc8: | |
2000 | #ifdef H_HT0_Window_Fill_2_Normal_Trap | |
2001 | #ifdef SUN_H_HT0_Window_Fill_2_Normal_Trap | |
2002 | SUN_H_HT0_Window_Fill_2_Normal_Trap | |
2003 | #else | |
2004 | # ifdef My_HT0_Window_Fill_2_Normal_Trap | |
2005 | My_HT0_Window_Fill_2_Normal_Trap | |
2006 | # else | |
2007 | CUSTOM_TRAP(H_HT0_Window_Fill_2_Normal_Trap) | |
2008 | # endif | |
2009 | #endif | |
2010 | #else | |
2011 | FILL_TRAP(0xc8) | |
2012 | #endif | |
2013 | ||
2014 | .align 128 | |
2015 | HT0_Window_Fill_3_Normal_0xcc: | |
2016 | #ifdef H_HT0_Window_Fill_3_Normal_Trap | |
2017 | #ifdef SUN_H_HT0_Window_Fill_3_Normal_Trap | |
2018 | SUN_H_HT0_Window_Fill_3_Normal_Trap | |
2019 | #else | |
2020 | # ifdef My_HT0_Window_Fill_3_Normal_Trap | |
2021 | My_HT0_Window_Fill_3_Normal_Trap | |
2022 | # else | |
2023 | CUSTOM_TRAP(H_HT0_Window_Fill_3_Normal_Trap) | |
2024 | # endif | |
2025 | #endif | |
2026 | #else | |
2027 | FILL_TRAP(0xcc) | |
2028 | #endif | |
2029 | ||
2030 | .align 128 | |
2031 | HT0_Window_Fill_4_Normal_0xd0: | |
2032 | #ifdef H_HT0_Window_Fill_4_Normal_Trap | |
2033 | #ifdef SUN_H_HT0_Window_Fill_4_Normal_Trap | |
2034 | SUN_H_HT0_Window_Fill_4_Normal_Trap | |
2035 | #else | |
2036 | # ifdef My_HT0_Window_Fill_4_Normal_Trap | |
2037 | My_HT0_Window_Fill_4_Normal_Trap | |
2038 | # else | |
2039 | CUSTOM_TRAP(H_HT0_Window_Fill_4_Normal_Trap) | |
2040 | # endif | |
2041 | #endif | |
2042 | #else | |
2043 | FILL_TRAP(0xd0) | |
2044 | #endif | |
2045 | ||
2046 | .align 128 | |
2047 | HT0_Window_Fill_5_Normal_0xd4: | |
2048 | #ifdef H_HT0_Window_Fill_5_Normal_Trap | |
2049 | #ifdef SUN_H_HT0_Window_Fill_5_Normal_Trap | |
2050 | SUN_H_HT0_Window_Fill_5_Normal_Trap | |
2051 | #else | |
2052 | # ifdef My_HT0_Window_Fill_5_Normal_Trap | |
2053 | My_HT0_Window_Fill_5_Normal_Trap | |
2054 | # else | |
2055 | CUSTOM_TRAP(H_HT0_Window_Fill_5_Normal_Trap) | |
2056 | # endif | |
2057 | #endif | |
2058 | #else | |
2059 | FILL_TRAP(0xd4) | |
2060 | #endif | |
2061 | ||
2062 | .align 128 | |
2063 | HT0_Window_Fill_6_Normal_0xd8: | |
2064 | #ifdef H_HT0_Window_Fill_6_Normal_Trap | |
2065 | #ifdef SUN_H_HT0_Window_Fill_6_Normal_Trap | |
2066 | SUN_H_HT0_Window_Fill_6_Normal_Trap | |
2067 | #else | |
2068 | # ifdef My_HT0_Window_Fill_6_Normal_Trap | |
2069 | My_HT0_Window_Fill_6_Normal_Trap | |
2070 | # else | |
2071 | CUSTOM_TRAP(H_HT0_Window_Fill_6_Normal_Trap) | |
2072 | # endif | |
2073 | #endif | |
2074 | #else | |
2075 | FILL_TRAP(0xd8) | |
2076 | #endif | |
2077 | ||
2078 | .align 128 | |
2079 | HT0_Window_Fill_7_Normal_0xdc: | |
2080 | #ifdef H_HT0_Window_Fill_7_Normal_Trap | |
2081 | #ifdef SUN_H_HT0_Window_Fill_7_Normal_Trap | |
2082 | SUN_H_HT0_Window_Fill_7_Normal_Trap | |
2083 | #else | |
2084 | # ifdef My_HT0_Window_Fill_7_Normal_Trap | |
2085 | My_HT0_Window_Fill_7_Normal_Trap | |
2086 | # else | |
2087 | CUSTOM_TRAP(H_HT0_Window_Fill_7_Normal_Trap) | |
2088 | # endif | |
2089 | #endif | |
2090 | #else | |
2091 | FILL_TRAP(0xdc) | |
2092 | #endif | |
2093 | ||
2094 | .align 128 | |
2095 | HT0_Window_Fill_0_Other_0xe0: | |
2096 | #ifdef H_HT0_Window_Fill_0_Other_Trap | |
2097 | #ifdef SUN_H_HT0_Window_Fill_0_Other_Trap | |
2098 | SUN_H_HT0_Window_Fill_0_Other_Trap | |
2099 | #else | |
2100 | # ifdef My_HT0_Window_Fill_0_Other_Trap | |
2101 | My_HT0_Window_Fill_0_Other_Trap | |
2102 | # else | |
2103 | CUSTOM_TRAP(H_HT0_Window_Fill_0_Other_Trap) | |
2104 | # endif | |
2105 | #endif | |
2106 | #else | |
2107 | FILL_TRAP(0xe0) | |
2108 | #endif | |
2109 | ||
2110 | .align 128 | |
2111 | HT0_Window_Fill_1_Other_0xe4: | |
2112 | #ifdef H_HT0_Window_Fill_1_Other_Trap | |
2113 | #ifdef SUN_H_HT0_Window_Fill_1_Other_Trap | |
2114 | SUN_H_HT0_Window_Fill_1_Other_Trap | |
2115 | #else | |
2116 | # ifdef My_HT0_Window_Fill_1_Other_Trap | |
2117 | My_HT0_Window_Fill_1_Other_Trap | |
2118 | # else | |
2119 | CUSTOM_TRAP(H_HT0_Window_Fill_1_Other_Trap) | |
2120 | # endif | |
2121 | #endif | |
2122 | #else | |
2123 | FILL_TRAP(0xe4) | |
2124 | #endif | |
2125 | ||
2126 | .align 128 | |
2127 | HT0_Window_Fill_2_Other_0xe8: | |
2128 | #ifdef H_HT0_Window_Fill_2_Other_Trap | |
2129 | #ifdef SUN_H_HT0_Window_Fill_2_Other_Trap | |
2130 | SUN_H_HT0_Window_Fill_2_Other_Trap | |
2131 | #else | |
2132 | # ifdef My_HT0_Window_Fill_2_Other_Trap | |
2133 | My_HT0_Window_Fill_2_Other_Trap | |
2134 | # else | |
2135 | CUSTOM_TRAP(H_HT0_Window_Fill_2_Other_Trap) | |
2136 | # endif | |
2137 | #endif | |
2138 | #else | |
2139 | FILL_TRAP(0xe8) | |
2140 | #endif | |
2141 | ||
2142 | .align 128 | |
2143 | HT0_Window_Fill_3_Other_0xec: | |
2144 | #ifdef H_HT0_Window_Fill_3_Other_Trap | |
2145 | #ifdef SUN_H_HT0_Window_Fill_3_Other_Trap | |
2146 | SUN_H_HT0_Window_Fill_3_Other_Trap | |
2147 | #else | |
2148 | # ifdef My_HT0_Window_Fill_3_Other_Trap | |
2149 | My_HT0_Window_Fill_3_Other_Trap | |
2150 | # else | |
2151 | CUSTOM_TRAP(H_HT0_Window_Fill_3_Other_Trap) | |
2152 | # endif | |
2153 | #endif | |
2154 | #else | |
2155 | FILL_TRAP(0xec) | |
2156 | #endif | |
2157 | ||
2158 | .align 128 | |
2159 | HT0_Window_Fill_4_Other_0xf0: | |
2160 | #ifdef H_HT0_Window_Fill_4_Other_Trap | |
2161 | #ifdef SUN_H_HT0_Window_Fill_4_Other_Trap | |
2162 | SUN_H_HT0_Window_Fill_4_Other_Trap | |
2163 | #else | |
2164 | # ifdef My_HT0_Window_Fill_4_Other_Trap | |
2165 | My_HT0_Window_Fill_4_Other_Trap | |
2166 | # else | |
2167 | CUSTOM_TRAP(H_HT0_Window_Fill_4_Other_Trap) | |
2168 | # endif | |
2169 | #endif | |
2170 | #else | |
2171 | FILL_TRAP(0xf0) | |
2172 | #endif | |
2173 | ||
2174 | .align 128 | |
2175 | HT0_Window_Fill_5_Other_0xf4: | |
2176 | #ifdef H_HT0_Window_Fill_5_Other_Trap | |
2177 | #ifdef SUN_H_HT0_Window_Fill_5_Other_Trap | |
2178 | SUN_H_HT0_Window_Fill_5_Other_Trap | |
2179 | #else | |
2180 | # ifdef My_HT0_Window_Fill_5_Other_Trap | |
2181 | My_HT0_Window_Fill_5_Other_Trap | |
2182 | # else | |
2183 | CUSTOM_TRAP(H_HT0_Window_Fill_5_Other_Trap) | |
2184 | # endif | |
2185 | #endif | |
2186 | #else | |
2187 | FILL_TRAP(0xf4) | |
2188 | #endif | |
2189 | ||
2190 | .align 128 | |
2191 | HT0_Window_Fill_6_Other_0xf8: | |
2192 | #ifdef H_HT0_Window_Fill_6_Other_Trap | |
2193 | #ifdef SUN_H_HT0_Window_Fill_6_Other_Trap | |
2194 | SUN_H_HT0_Window_Fill_6_Other_Trap | |
2195 | #else | |
2196 | # ifdef My_HT0_Window_Fill_6_Other_Trap | |
2197 | My_HT0_Window_Fill_6_Other_Trap | |
2198 | # else | |
2199 | CUSTOM_TRAP(H_HT0_Window_Fill_6_Other_Trap) | |
2200 | # endif | |
2201 | #endif | |
2202 | #else | |
2203 | FILL_TRAP(0xf8) | |
2204 | #endif | |
2205 | ||
2206 | .align 128 | |
2207 | HT0_Window_Fill_7_Other_0xfc: | |
2208 | #ifdef H_HT0_Window_Fill_7_Other_Trap | |
2209 | #ifdef SUN_H_HT0_Window_Fill_7_Other_Trap | |
2210 | SUN_H_HT0_Window_Fill_7_Other_Trap | |
2211 | #else | |
2212 | # ifdef My_HT0_Window_Fill_7_Other_Trap | |
2213 | My_HT0_Window_Fill_7_Other_Trap | |
2214 | # else | |
2215 | CUSTOM_TRAP(H_HT0_Window_Fill_7_Other_Trap) | |
2216 | # endif | |
2217 | #endif | |
2218 | #else | |
2219 | FILL_TRAP(0xfc) | |
2220 | #endif | |
2221 | ||
2222 | .align 128 | |
2223 | HT0_GoodTrap_0x100: | |
2224 | wrpr 0, %tl | |
2225 | ta T_HGOOD_TRAP;nop;nop;nop;nop;nop;nop ! N2 N2 N2 N2 | |
2226 | ||
2227 | ||
2228 | HT0_BadTrap_0x101: | |
2229 | wrpr 0, %tl | |
2230 | #ifdef EXPECT_BAD_TRAP | |
2231 | ta T_GOOD_TRAP; nop;nop;nop;nop;nop;nop | |
2232 | #else | |
2233 | ta T_HBAD_TRAP; nop;nop;nop;nop;nop;nop | |
2234 | #endif | |
2235 | ||
2236 | HT0_ChangePriv_0x102: | |
2237 | #ifdef H_HT0_ChangePriv_0x102 | |
2238 | #ifdef SUN_H_HT0_ChangePriv_0x102 | |
2239 | SUN_H_HT0_ChangePriv_0x102 | |
2240 | #else | |
2241 | CUSTOM_TRAP(H_HT0_ChangePriv_0x102) | |
2242 | #endif | |
2243 | #else | |
2244 | rdpr %tstate, %g1 | |
2245 | or %g1, 0x400, %g2 | |
2246 | wrpr %g0, %g2, %tstate | |
2247 | done | |
2248 | nop | |
2249 | nop | |
2250 | nop | |
2251 | nop | |
2252 | ||
2253 | #endif | |
2254 | ||
2255 | HT0_ChangeNonPriv_0x103: | |
2256 | #ifdef H_HT0_ChangeNonPriv_0x103 | |
2257 | #ifdef SUN_H_HT0_ChangeNonPriv_0x103 | |
2258 | SUN_H_HT0_ChangeNonPriv_0x103 | |
2259 | #else | |
2260 | CUSTOM_TRAP(H_HT0_ChangeNonPriv_0x103) | |
2261 | #endif | |
2262 | #else | |
2263 | rdpr %tstate, %g1 | |
2264 | andn %g1, 0x400, %g2 | |
2265 | wrpr %g0, %g2, %tstate | |
2266 | done | |
2267 | nop | |
2268 | nop | |
2269 | nop | |
2270 | nop | |
2271 | #endif | |
2272 | ||
2273 | HT0_ChangeToTL1_0x104: | |
2274 | wrpr %g0, 1, %gl | |
2275 | rdpr %tnpc, %g1 | |
2276 | wrpr %g0, 1, %tl | |
2277 | jmp %g1 | |
2278 | nop | |
2279 | nop | |
2280 | nop | |
2281 | nop | |
2282 | ||
2283 | HT0_ChangeToTL0_0x105: | |
2284 | #ifdef H_HT0_ChangeToTL0_0x105 | |
2285 | #ifdef SUN_H_HT0_ChangeToTL0_0x105 | |
2286 | SUN_H_HT0_ChangeToTL0_0x105 | |
2287 | #else | |
2288 | CUSTOM_TRAP(H_HT0_ChangeToTL0_0x105) | |
2289 | #endif | |
2290 | #else | |
2291 | rdpr %tstate, %g1 | |
2292 | rdpr %tpc, %g2 | |
2293 | rdpr %tnpc, %g3 | |
2294 | wrpr %g0, 1, %tl | |
2295 | wrpr %g1, 0, %tstate | |
2296 | wrpr %g2, 0, %tpc | |
2297 | wrpr %g3, 0, %tnpc | |
2298 | done | |
2299 | #endif | |
2300 | ||
2301 | HT0_ChangeToTL0_0x106: | |
2302 | #ifdef H_HT0_ChangeToTL0_0x106 | |
2303 | #ifdef SUN_H_HT0_ChangeToTL0_0x106 | |
2304 | SUN_H_HT0_ChangeToTL0_0x106 | |
2305 | #else | |
2306 | CUSTOM_TRAP(H_HT0_ChangeToTL0_0x106) | |
2307 | #endif | |
2308 | #else | |
2309 | rdpr %tstate, %g1 | |
2310 | rdpr %tpc, %g2 | |
2311 | rdpr %tnpc, %g3 | |
2312 | rdpr %tt, %g4 | |
2313 | done | |
2314 | #endif | |
2315 | ||
2316 | HT0_ChangeToTL0_0x107: | |
2317 | #ifdef H_HT0_ChangeToTL0_0x107 | |
2318 | #ifdef SUN_H_HT0_ChangeToTL0_0x107 | |
2319 | SUN_H_HT0_ChangeToTL0_0x107 | |
2320 | #else | |
2321 | CUSTOM_TRAP(H_HT0_ChangeToTL0_0x107) | |
2322 | #endif | |
2323 | #else | |
2324 | rdpr %tstate, %g1 | |
2325 | rdpr %tpc, %g2 | |
2326 | rdpr %tnpc, %g3 | |
2327 | rdpr %tt, %g4 | |
2328 | done | |
2329 | #endif | |
2330 | ||
2331 | .align 128 | |
2332 | HT0_TrapEn_0x108: | |
2333 | ! emulate priv trap | |
2334 | setx htrap_enable_data, %g2, %g1 | |
2335 | mov 0x800, %g2 | |
2336 | add %o0, %o0, %o0 | |
2337 | sth %g2, [%g1+%o0] | |
2338 | done | |
2339 | ||
2340 | .align 64 | |
2341 | HT0_TrapDis_0x10a: | |
2342 | ! emulate priv trap | |
2343 | setx htrap_enable_data, %g2, %g1 | |
2344 | mov 0, %g2 | |
2345 | add %o0, %o0, %o0 | |
2346 | sth %g2, [%g1+%o0] | |
2347 | done | |
2348 | ||
2349 | .align 64 | |
2350 | HT0_TrapEn_Ntimes_0x10c: | |
2351 | setx htrap_enable_data, %g2, %g1 | |
2352 | add %o0, %o0, %o0 | |
2353 | sth %o1, [%g1+%o0] | |
2354 | done | |
2355 | ||
2356 | .align 128 | |
2357 | HT0_PThreadMutexLock_0x110: | |
2358 | #ifdef H_HT0_PThreadMutexLock_0x110 | |
2359 | #ifdef SUN_H_HT0_PThreadMutexLock_0x110 | |
2360 | SUN_H_HT0_PThreadMutexLock_0x110 | |
2361 | #else | |
2362 | CUSTOM_TRAP(H_HT0_PThreadMutexLock_0x110) | |
2363 | #endif | |
2364 | #else | |
2365 | rdpr %tl, %g2 | |
2366 | cmp %g2, 2 | |
2367 | bne,a .+8 | |
2368 | or %i0, %g0, %g1 | |
2369 | setx hpthread_mutex_data, %g2, %g3 | |
2370 | pt_retry: | |
2371 | ldstub [%g3+%g1], %g2 | |
2372 | brz %g2, pt_done | |
2373 | nop | |
2374 | pt_loop: | |
2375 | ldub [%g3+%g1], %g2 | |
2376 | brnz %g2, pt_loop | |
2377 | nop | |
2378 | ba,a pt_retry | |
2379 | pt_done: | |
2380 | membar #LoadLoad | #LoadStore | |
2381 | done | |
2382 | #endif | |
2383 | ||
2384 | HT0_ChangeToTL0_0x111: | |
2385 | #ifdef H_HT0_ChangeToTL0_0x111 | |
2386 | #ifdef SUN_HT0_ChangeToTL0_0x111 | |
2387 | SUN_HT0_ChangeToTL0_0x111 | |
2388 | #else | |
2389 | CUSTOM_TRAP(H_HT0_ChangeToTL0_0x111) | |
2390 | #endif | |
2391 | #else | |
2392 | done | |
2393 | nop | |
2394 | #endif | |
2395 | ||
2396 | .align 128 | |
2397 | HT0_PThreadMutexUnLock_0x114: | |
2398 | setx hpthread_mutex_data, %g2, %g5 | |
2399 | stub %g0, [%g5+%g1] | |
2400 | done | |
2401 | ||
2402 | .align 64 | |
2403 | HT0_Trap_Sync_0x116: | |
2404 | ||
2405 | setx hpthread_counter_data, %g1, %g4 | |
2406 | rdpr %tpc, %g2 | |
2407 | rdpr %tnpc,%g3 | |
2408 | mov %g3, %g1 | |
2409 | add %g2, 60, %g2 | |
2410 | add %g3, 60, %g3 | |
2411 | wrpr %g2, 0, %tpc ! set %tcp/%tnpc | |
2412 | wrpr %g3, 0, %tnpc | |
2413 | jmp %g1 ! %g1 is original %tnpc | |
2414 | nop | |
2415 | ||
2416 | ||
2417 | .align 64 | |
2418 | HT0_Trap_Function_0x118: | |
2419 | ! call kernel dervice routine | |
2420 | mov 0x0, %o0 | |
2421 | done | |
2422 | .word 0x118 | |
2423 | nop | |
2424 | nop | |
2425 | nop | |
2426 | nop | |
2427 | nop | |
2428 | ||
2429 | .align 512 | |
2430 | HT0_Trap_Function_0x120: | |
2431 | ! call kernel dervice routine | |
2432 | ! switch to hpriv, from hpriv | |
2433 | done | |
2434 | .word 0x120 | |
2435 | nop | |
2436 | nop | |
2437 | nop | |
2438 | nop | |
2439 | nop | |
2440 | nop | |
2441 | ||
2442 | .align 64 | |
2443 | HT0_Trap_Function_0x122: | |
2444 | ! Switch to non-hpriv | |
2445 | rdhpr %htstate, %g1 | |
2446 | andn %g1, 0x4, %g2 | |
2447 | wrhpr %g0, %g2, %htstate | |
2448 | done | |
2449 | .word 0x122 | |
2450 | nop | |
2451 | nop | |
2452 | nop | |
2453 | ||
2454 | .align 64 | |
2455 | HT0_Trap_Function_0x124: | |
2456 | setx htrap_enable_data, %g2, %g1 | |
2457 | mov 0x800, %g2 | |
2458 | add %o0, %o0, %o0 | |
2459 | sth %g2, [%g1+%o0] | |
2460 | done | |
2461 | ||
2462 | .align 64 | |
2463 | HT0_Trap_Function_0x126: | |
2464 | setx htrap_enable_data, %g2, %g1 | |
2465 | mov 0, %g2 | |
2466 | add %o0, %o0, %o0 | |
2467 | sth %g2, [%g1+%o0] | |
2468 | done | |
2469 | ||
2470 | .align 64 | |
2471 | HT0_Trap_Function_0x128: | |
2472 | setx htrap_enable_data, %g2, %g1 | |
2473 | add %o0, %o0, %o0 | |
2474 | sth %o1, [%g1+%o0] | |
2475 | done | |
2476 | ||
2477 | .align 64 | |
2478 | ! Function to set PCONTEXT, SCONTEXT, | |
2479 | ! pstate.priv, hpstate.hpriv and | |
2480 | ! jump to target address. | |
2481 | ! Caller should pass argument as: | |
2482 | ! %o1 = PCONTEXT | |
2483 | ! %o2 = SCONTEXT | |
2484 | ! %o3[0] = desired pstate.priv value | |
2485 | ! %o4[0] = desired hpstate.hpriv value | |
2486 | ! %o5 = target VA | |
2487 | HT0_Trap_Function_0x12a: | |
2488 | mov 0x08, %g1 | |
2489 | stxa %o1, [%g1] 0x21 ! set PCONTEXT | |
2490 | mov 0x10, %g1 | |
2491 | stxa %o2, [%g1] 0x21 ! set SCONTEXT | |
2492 | xor %o3, 0x1, %o3 ! invert bit so that later can | |
2493 | xor %o4, 0x1, %o4 ! be xor'ed using wrpr | |
2494 | sllx %o3, 10, %o3 ! align priv bit | |
2495 | sllx %o4, 2, %o4 ! align hpriv bit | |
2496 | rdpr %tstate, %g1 | |
2497 | or %g1, 0x400, %g1 | |
2498 | wrpr %g1, %o3, %tstate | |
2499 | rdhpr %htstate, %g1 | |
2500 | or %g1, 0x4, %g1 | |
2501 | wrhpr %g1, %o4, %htstate | |
2502 | wrpr %o5, %g0, %tnpc | |
2503 | done | |
2504 | nop | |
2505 | nop | |
2506 | ||
2507 | .align 64 | |
2508 | ! Function to read thread ID from the | |
2509 | ! ASI_CMP_INTR_ID (same as ASI_CMP_CORE_ID in N2) | |
2510 | ! Value is returned in %o1. | |
2511 | HT0_RdThId_0x12e: | |
2512 | ldxa [%g0]ASI_INTR_ID, %o1 | |
2513 | #ifdef SIXGUNS | |
2514 | !! 6-core relative TID - values 0-47 only .. | |
2515 | ldxa [%g0]ASI_CMP_CORE, %o2 ! Core-Avail | |
2516 | not %g0, %g1 ! Starting mask | |
2517 | sllx %g1, %o1, %g1 ! Mask all higher threads than me | |
2518 | not %g1 | |
2519 | andn %g1,%o2,%o2 ! %o1 is 1s for missing tids | |
2520 | popc %o2, %g1 ! Number of missing tids which | |
2521 | ! are less than mytid | |
2522 | sub %o1, %g1, %o1 ! Reduce TID by missing count | |
2523 | #else | |
2524 | #ifdef PORTABLE_CORE | |
2525 | and %o1, 0x07, %o1 | |
2526 | #endif | |
2527 | #endif | |
2528 | done | |
2529 | nop | |
2530 | ||
2531 | .align 512 | |
2532 | HT0_Trap_Instruction_0x130: | |
2533 | #ifdef H_HT0_Trap_Instruction_0 | |
2534 | #ifdef SUN_H_HT0_Trap_Instruction_0 | |
2535 | SUN_H_HT0_Trap_Instruction_0 | |
2536 | #else | |
2537 | # ifdef My_HT0_Trap_Instruction_0 | |
2538 | My_HT0_Trap_Instruction_0 | |
2539 | # else | |
2540 | CUSTOM_TRAP(H_HT0_Trap_Instruction_0) | |
2541 | # endif | |
2542 | #endif | |
2543 | #else | |
2544 | NORMAL_TRAP(0x130); | |
2545 | #endif | |
2546 | ||
2547 | .align 32 | |
2548 | HT0_Trap_Instruction_0x131: | |
2549 | #ifdef H_HT0_Trap_Instruction_1 | |
2550 | #ifdef SUN_H_HT0_Trap_Instruction_1 | |
2551 | SUN_H_HT0_Trap_Instruction_1 | |
2552 | #else | |
2553 | # ifdef My_HT0_Trap_Instruction_1 | |
2554 | My_HT0_Trap_Instruction_1 | |
2555 | # else | |
2556 | CUSTOM_TRAP(H_HT0_Trap_Instruction_1) | |
2557 | # endif | |
2558 | #endif | |
2559 | #else | |
2560 | NORMAL_TRAP(0x131); | |
2561 | #endif | |
2562 | ||
2563 | .align 32 | |
2564 | HT0_Trap_Instruction_0x132: | |
2565 | #ifdef H_HT0_Trap_Instruction_2 | |
2566 | #ifdef SUN_H_HT0_Trap_Instruction_2 | |
2567 | SUN_H_HT0_Trap_Instruction_2 | |
2568 | #else | |
2569 | # ifdef My_HT0_Trap_Instruction_2 | |
2570 | My_HT0_Trap_Instruction_2 | |
2571 | # else | |
2572 | CUSTOM_TRAP(H_HT0_Trap_Instruction_2) | |
2573 | # endif | |
2574 | #endif | |
2575 | #else | |
2576 | NORMAL_TRAP(0x132); | |
2577 | #endif | |
2578 | ||
2579 | .align 32 | |
2580 | HT0_Trap_Instruction_0x133: | |
2581 | #ifdef H_HT0_Trap_Instruction_3 | |
2582 | #ifdef SUN_H_HT0_Trap_Instruction_3 | |
2583 | SUN_H_HT0_Trap_Instruction_3 | |
2584 | #else | |
2585 | # ifdef My_HT0_Trap_Instruction_3 | |
2586 | My_HT0_Trap_Instruction_3 | |
2587 | # else | |
2588 | CUSTOM_TRAP(H_HT0_Trap_Instruction_3) | |
2589 | # endif | |
2590 | #endif | |
2591 | #else | |
2592 | NORMAL_TRAP(0x133); | |
2593 | #endif | |
2594 | ||
2595 | .align 32 | |
2596 | HT0_Trap_Instruction_0x134: | |
2597 | #ifdef H_HT0_Trap_Instruction_4 | |
2598 | #ifdef SUN_H_HT0_Trap_Instruction_4 | |
2599 | SUN_H_HT0_Trap_Instruction_4 | |
2600 | #else | |
2601 | # ifdef My_HT0_Trap_Instruction_4 | |
2602 | My_HT0_Trap_Instruction_4 | |
2603 | # else | |
2604 | CUSTOM_TRAP(H_HT0_Trap_Instruction_4) | |
2605 | # endif | |
2606 | #endif | |
2607 | #else | |
2608 | NORMAL_TRAP(0x134); | |
2609 | #endif | |
2610 | ||
2611 | .align 32 | |
2612 | HT0_Trap_Instruction_0x135: | |
2613 | #ifdef H_HT0_Trap_Instruction_5 | |
2614 | #ifdef SUN_H_HT0_Trap_Instruction_5 | |
2615 | SUN_H_HT0_Trap_Instruction_5 | |
2616 | #else | |
2617 | # ifdef My_HT0_Trap_Instruction_5 | |
2618 | My_HT0_Trap_Instruction_5 | |
2619 | # else | |
2620 | CUSTOM_TRAP(H_HT0_Trap_Instruction_5) | |
2621 | # endif | |
2622 | #endif | |
2623 | #else | |
2624 | NORMAL_TRAP(0x135); | |
2625 | #endif | |
2626 | ||
2627 | ||
2628 | ||
2629 | .align 128 | |
2630 | ||
2631 | HT0_Trap_0x138: | |
2632 | NORMAL_TRAP(0x138); | |
2633 | .align 128 | |
2634 | ||
2635 | HT0_Trap_0x13c: | |
2636 | NORMAL_TRAP(0x13c); | |
2637 | .align 128 | |
2638 | ||
2639 | HT0_Trap_0x140: | |
2640 | NORMAL_TRAP(0x140); | |
2641 | .align 128 | |
2642 | ||
2643 | HT0_Trap_0x144: | |
2644 | NORMAL_TRAP(0x144); | |
2645 | .align 128 | |
2646 | ||
2647 | HT0_Trap_0x148: | |
2648 | NORMAL_TRAP(0x148); | |
2649 | .align 128 | |
2650 | ||
2651 | HT0_Trap_0x14c: | |
2652 | NORMAL_TRAP(0x14c); | |
2653 | .align 128 | |
2654 | ||
2655 | HT0_Trap_0x150: | |
2656 | NORMAL_TRAP(0x150); | |
2657 | .align 128 | |
2658 | ||
2659 | HT0_Trap_0x154: | |
2660 | NORMAL_TRAP(0x154); | |
2661 | .align 128 | |
2662 | ||
2663 | HT0_Trap_0x158: | |
2664 | NORMAL_TRAP(0x158); | |
2665 | .align 128 | |
2666 | ||
2667 | HT0_Trap_0x15c: | |
2668 | NORMAL_TRAP(0x15c); | |
2669 | .align 128 | |
2670 | ||
2671 | HT0_Trap_0x160: | |
2672 | NORMAL_TRAP(0x160); | |
2673 | .align 128 | |
2674 | ||
2675 | HT0_Trap_0x164: | |
2676 | NORMAL_TRAP(0x164); | |
2677 | .align 128 | |
2678 | ||
2679 | HT0_Trap_0x168: | |
2680 | NORMAL_TRAP(0x168); | |
2681 | .align 128 | |
2682 | ||
2683 | HT0_Trap_0x16c: | |
2684 | NORMAL_TRAP(0x16c); | |
2685 | .align 128 | |
2686 | ||
2687 | HT0_Trap_0x170: | |
2688 | NORMAL_TRAP(0x170); | |
2689 | .align 128 | |
2690 | ||
2691 | HT0_Trap_0x174: | |
2692 | NORMAL_TRAP(0x174); | |
2693 | .align 128 | |
2694 | ||
2695 | HT0_Trap_0x178: | |
2696 | NORMAL_TRAP(0x178); | |
2697 | .align 128 | |
2698 | ||
2699 | HT0_Trap_0x17c: | |
2700 | NORMAL_TRAP(0x17c); | |
2701 | .align 128 | |
2702 | HT0_ChangePriv_0x180: | |
2703 | rdpr %tl, %g1 | |
2704 | sub %g1, 1, %g1 | |
2705 | wrpr %g1, %tl | |
2706 | rdhpr %htstate, %g1 | |
2707 | or %g1, 0x4, %g2 | |
2708 | wrhpr %g0, %g2, %htstate | |
2709 | done | |
2710 | .word 0x180 | |
2711 | nop | |
2712 | ||
2713 | .align 64 | |
2714 | HT0_ChangeNonPriv_0x182: | |
2715 | rdpr %tl, %g1 | |
2716 | sub %g1, 1, %g1 | |
2717 | wrpr %g1, %tl | |
2718 | rdhpr %htstate, %g1 | |
2719 | andn %g1, 0x4, %g2 | |
2720 | wrhpr %g0, %g2, %htstate | |
2721 | done | |
2722 | .word 0x182 | |
2723 | nop | |
2724 | nop | |
2725 | ||
2726 | .align 64 | |
2727 | HT0_TrapEn_0x184: | |
2728 | setx htrap_enable_data, %g2, %g1 | |
2729 | mov 0x800, %g2 | |
2730 | add %o0, %o0, %o0 | |
2731 | sth %g2, [%g1+%o0] | |
2732 | done | |
2733 | .word 0x184 | |
2734 | ||
2735 | .align 64 | |
2736 | HT0_TrapDis_0x186: | |
2737 | #ifdef H_HT0_Trap_Instruction_56 | |
2738 | #ifdef SUN_H_HT0_Trap_Instruction_56 | |
2739 | SUN_H_HT0_Trap_Instruction_56 | |
2740 | #else | |
2741 | # ifdef My_HT0_Trap_Instruction_56 | |
2742 | My_HT0_Trap_Instruction_56 | |
2743 | # else | |
2744 | CUSTOM_TRAP(H_HT0_Trap_Instruction_56) | |
2745 | # endif | |
2746 | #endif | |
2747 | #else | |
2748 | setx htrap_enable_data, %g2, %g1 | |
2749 | mov 0, %g2 | |
2750 | add %o0, %o0, %o0 | |
2751 | sth %g2, [%g1+%o0] | |
2752 | done | |
2753 | .word 0x186 | |
2754 | #endif | |
2755 | ||
2756 | .align 64 | |
2757 | HT0_TrapEn_Ntimes_0x188: | |
2758 | setx htrap_enable_data, %g2, %g1 | |
2759 | add %o0, %o0, %o0 | |
2760 | sth %o1, [%g1+%o0] | |
2761 | done | |
2762 | .word 0x188 | |
2763 | ||
2764 | .align 64 | |
2765 | ! Function to set PCONTEXT, SCONTEXT, | |
2766 | ! pstate.priv, hpstate.hpriv and | |
2767 | ! jump to target address. | |
2768 | ! Caller should pass argument as: | |
2769 | ! %o1 = PCONTEXT | |
2770 | ! %o2 = SCONTEXT | |
2771 | ! %o3[0] = desired pstate.priv value | |
2772 | ! %o4[0] = desired hpstate.hpriv value | |
2773 | ! %o5 = target VA | |
2774 | HT0_ChangeCtx_0x18a: | |
2775 | rdpr %tl, %g1 | |
2776 | sub %g1, 1, %g1 | |
2777 | wrpr %g1, %tl | |
2778 | mov 0x08, %g1 | |
2779 | stxa %o1, [%g1] 0x21 ! set PCONTEXT | |
2780 | mov 0x10, %g1 | |
2781 | stxa %o2, [%g1] 0x21 ! set SCONTEXT | |
2782 | mov 0x108, %g1 | |
2783 | stxa %o6, [%g1] 0x21 ! set PCONTEXT1 | |
2784 | mov 0x110, %g1 | |
2785 | stxa %o7, [%g1] 0x21 ! set SCONTEXT1 | |
2786 | xor %o3, 0x1, %o3 ! invert bit so that later can | |
2787 | xor %o4, 0x1, %o4 ! be xor'ed using wrpr | |
2788 | sllx %o3, 10, %o3 ! align priv bit | |
2789 | sllx %o4, 2, %o4 ! align hpriv bit | |
2790 | rdpr %tstate, %g1 | |
2791 | or %g1, 0x400, %g1 | |
2792 | wrpr %g1, %o3, %tstate | |
2793 | rdhpr %htstate, %g1 | |
2794 | or %g1, 0x4, %g1 | |
2795 | wrhpr %g1, %o4, %htstate | |
2796 | wrpr %o5, %g0, %tnpc | |
2797 | #ifndef NO_EOB_MARKER | |
2798 | ! $EV trig_pc_d(1,@VA(.HTRAPS.end_of_ctxswitch)) -> marker(bootEnd, *, 1) | |
2799 | #ifdef SEND_BOOT_TRACE_TO_SSI | |
2800 | setx 0xfffff00000, %i0, %i1 | |
2801 | sub %g0, 1, %i3 | |
2802 | sth %i3, [%i1] | |
2803 | #endif | |
2804 | #endif | |
2805 | end_of_ctxswitch: | |
2806 | done | |
2807 | nop | |
2808 | ||
2809 | .align 64 | |
2810 | ! Function to read thread ID from the | |
2811 | ! ASI_CMP_INTR_ID (same as ASI_CMP_CORE_ID in N2) | |
2812 | ! Value is returned in %o1. | |
2813 | HT0_RdThId_0x18e: | |
2814 | ldxa [%g0]ASI_INTR_ID, %o1 | |
2815 | #ifdef SIXGUNS | |
2816 | !! 6-core relative TID - values 0-47 only .. | |
2817 | ldxa [%g0]ASI_CMP_CORE, %o2 ! Core-Avail | |
2818 | not %g0, %g1 ! Starting mask | |
2819 | sllx %g1, %o1, %g1 ! Mask all higher threads than me | |
2820 | not %g1 | |
2821 | andn %g1,%o2,%o2 ! %o1 is 1s for missing tids | |
2822 | popc %o2, %g1 ! Number of missing tids which | |
2823 | ! are less than mytid | |
2824 | sub %o1, %g1, %o1 ! Reduce TID by missing count | |
2825 | #else | |
2826 | #ifdef PORTABLE_CORE | |
2827 | and %o1, 0x07, %o1 | |
2828 | #endif | |
2829 | #endif | |
2830 | done | |
2831 | nop | |
2832 | ||
2833 | .align 64 | |
2834 | HT0_Trap_Instruction_0x190: | |
2835 | #ifdef H_HT0_HTrap_Instruction_0 | |
2836 | #ifdef SUN_H_HT0_HTrap_Instruction_0 | |
2837 | SUN_H_HT0_HTrap_Instruction_0 | |
2838 | #else | |
2839 | # ifdef My_HT0_HTrap_Instruction_0 | |
2840 | My_HT0_HTrap_Instruction_0 | |
2841 | # else | |
2842 | CUSTOM_TRAP(H_HT0_HTrap_Instruction_0) | |
2843 | # endif | |
2844 | #endif | |
2845 | #else | |
2846 | NORMAL_TRAP(0x190); | |
2847 | #endif | |
2848 | ||
2849 | .align 32 | |
2850 | HT0_Trap_Instruction_0x191: | |
2851 | #ifdef H_HT0_HTrap_Instruction_1 | |
2852 | #ifdef SUN_H_HT0_HTrap_Instruction_1 | |
2853 | SUN_H_HT0_HTrap_Instruction_1 | |
2854 | #else | |
2855 | # ifdef My_HT0_HTrap_Instruction_1 | |
2856 | My_HT0_HTrap_Instruction_1 | |
2857 | # else | |
2858 | CUSTOM_TRAP(H_HT0_HTrap_Instruction_1) | |
2859 | # endif | |
2860 | #endif | |
2861 | #else | |
2862 | NORMAL_TRAP(0x191); | |
2863 | #endif | |
2864 | ||
2865 | .align 32 | |
2866 | HT0_Trap_Instruction_0x192: | |
2867 | #ifdef H_HT0_HTrap_Instruction_2 | |
2868 | #ifdef SUN_H_HT0_HTrap_Instruction_2 | |
2869 | SUN_H_HT0_HTrap_Instruction_2 | |
2870 | #else | |
2871 | # ifdef My_HT0_HTrap_Instruction_2 | |
2872 | My_HT0_HTrap_Instruction_2 | |
2873 | # else | |
2874 | CUSTOM_TRAP(H_HT0_HTrap_Instruction_2) | |
2875 | # endif | |
2876 | #endif | |
2877 | #else | |
2878 | NORMAL_TRAP(0x192); | |
2879 | #endif | |
2880 | ||
2881 | .align 32 | |
2882 | HT0_Trap_Instruction_0x193: | |
2883 | #ifdef H_HT0_HTrap_Instruction_3 | |
2884 | #ifdef SUN_H_HT0_HTrap_Instruction_3 | |
2885 | SUN_H_HT0_HTrap_Instruction_3 | |
2886 | #else | |
2887 | # ifdef My_HT0_HTrap_Instruction_3 | |
2888 | My_HT0_HTrap_Instruction_3 | |
2889 | # else | |
2890 | CUSTOM_TRAP(H_HT0_HTrap_Instruction_3) | |
2891 | # endif | |
2892 | #endif | |
2893 | #else | |
2894 | NORMAL_TRAP(0x193); | |
2895 | #endif | |
2896 | ||
2897 | .align 32 | |
2898 | HT0_Trap_Instruction_0x194: | |
2899 | #ifdef H_HT0_HTrap_Instruction_4 | |
2900 | #ifdef SUN_H_HT0_HTrap_Instruction_4 | |
2901 | SUN_H_HT0_HTrap_Instruction_4 | |
2902 | #else | |
2903 | # ifdef My_HT0_HTrap_Instruction_4 | |
2904 | My_HT0_HTrap_Instruction_4 | |
2905 | # else | |
2906 | CUSTOM_TRAP(H_HT0_HTrap_Instruction_4) | |
2907 | # endif | |
2908 | #endif | |
2909 | #else | |
2910 | NORMAL_TRAP(0x194); | |
2911 | #endif | |
2912 | ||
2913 | .align 32 | |
2914 | HT0_Trap_Instruction_0x195: | |
2915 | #ifdef H_HT0_HTrap_Instruction_5 | |
2916 | #ifdef SUN_H_HT0_HTrap_Instruction_5 | |
2917 | SUN_H_HT0_HTrap_Instruction_5 | |
2918 | #else | |
2919 | # ifdef My_HT0_HTrap_Instruction_5 | |
2920 | My_HT0_HTrap_Instruction_5 | |
2921 | # else | |
2922 | CUSTOM_TRAP(H_HT0_HTrap_Instruction_5) | |
2923 | # endif | |
2924 | #endif | |
2925 | #else | |
2926 | NORMAL_TRAP(0x195); | |
2927 | #endif | |
2928 | ||
2929 | .align 32 | |
2930 | ! (0x196) | |
2931 | nop | |
2932 | ||
2933 | .align 32 | |
2934 | ! (0x197) | |
2935 | nop | |
2936 | ||
2937 | .align 32 | |
2938 | ! (0x198) | |
2939 | nop | |
2940 | ||
2941 | .align 32 | |
2942 | ! (0x199) | |
2943 | nop | |
2944 | ||
2945 | .align 32 | |
2946 | ! (0x19a) | |
2947 | nop | |
2948 | ||
2949 | .align 32 | |
2950 | ! (0x19b) | |
2951 | nop | |
2952 | ||
2953 | .align 32 | |
2954 | ! (0x19c) | |
2955 | nop | |
2956 | ||
2957 | .align 32 | |
2958 | ! (0x19d) | |
2959 | nop | |
2960 | ||
2961 | .align 32 | |
2962 | ! (0x19e) | |
2963 | nop | |
2964 | ||
2965 | .align 32 | |
2966 | ! (0x19f) | |
2967 | nop | |
2968 | ||
2969 | .align 32 | |
2970 | ! (0x1a0) | |
2971 | ||
2972 | HT0_GoodTrap_0x1a0: | |
2973 | #ifdef ASI_CHECK_GOODTRAP | |
2974 | call asi_check_start | |
2975 | nop | |
2976 | #endif | |
2977 | #ifdef EXIT_SYNC | |
2978 | call exit_sync_thread_start | |
2979 | nop | |
2980 | #endif | |
2981 | old_good_trap: | |
2982 | #ifdef SSI_STATUS | |
2983 | ! this externally signals good/bad per thread for tester | |
2984 | ![15:8] lower tic reg bits | |
2985 | ![7] good/bad 1/0 | |
2986 | ![6:0] tid | |
2987 | ||
2988 | ! get TID 0-63 | |
2989 | ldxa [%g0]ASI_INTR_ID, %o1 | |
2990 | #ifdef PORTABLE_CORE | |
2991 | ! TID is now 0-7 | |
2992 | and %o1, 0x07, %o1 | |
2993 | #else | |
2994 | nop | |
2995 | #endif | |
2996 | ||
2997 | rd %tick, %g3 | |
2998 | sllx %g3, 8, %g3 | |
2999 | or %o1, %g3, %o1 | |
3000 | !or %o1, 0x80, %o1 ! only if BAD | |
3001 | ||
3002 | ! show TID and good/bad on SSI | |
3003 | sth %o1, [%g0-0x100] | |
3004 | good_trap: | |
3005 | ba good_trap | |
3006 | nop | |
3007 | #else | |
3008 | ||
3009 | #ifdef PARK_ON_GOODTRAP | |
3010 | ldxa [%g0]ASI_INTR_ID, %g1 ! Get TID | |
3011 | mov 1, %g2 | |
3012 | sllx %g2, %g1, %g2 | |
3013 | mov 0x68, %g1 | |
3014 | stxa %g2, [%g1] ASI_CMP_CORE ! Park thread | |
3015 | nop | |
3016 | good_trap: | |
3017 | ba good_trap | |
3018 | nop | |
3019 | #else | |
3020 | good_trap: | |
3021 | ba good_trap ; nop;nop;nop;nop;nop;nop;nop | |
3022 | #endif | |
3023 | ||
3024 | #endif | |
3025 | ||
3026 | HT0_BadTrap_0x1a1: | |
3027 | #ifdef EXPECT_BAD_TRAP | |
3028 | ba good_trap ; nop;nop;nop;nop;nop;nop;nop | |
3029 | #else | |
3030 | ||
3031 | #ifdef SSI_STATUS | |
3032 | ! this externally signals good/bad per thread for tester | |
3033 | ![7] good/bad 1/0 | |
3034 | ![6:0] tid | |
3035 | ||
3036 | ! get TID 0-63 | |
3037 | ldxa [%g0]ASI_INTR_ID, %o1 | |
3038 | #ifdef PORTABLE_CORE | |
3039 | ! TID is now 0-7 | |
3040 | and %o1, 0x07, %o1 | |
3041 | #else | |
3042 | nop | |
3043 | #endif | |
3044 | or %o1, 0x80, %o1 ! only if BAD | |
3045 | ! show TID and good/bad | |
3046 | stb %o1, [%g0-0x100] | |
3047 | bad_trap: | |
3048 | ba bad_trap | |
3049 | nop;nop;nop | |
3050 | #else | |
3051 | bad_trap: | |
3052 | ba bad_trap; nop;nop;nop;nop;nop;nop;nop | |
3053 | #endif | |
3054 | ||
3055 | #endif | |
3056 | ||
3057 | .align 512 | |
3058 | HT0_Trap_Instruction_0x1b0: | |
3059 | #ifdef H_HT0_Trap_Instruction_0 | |
3060 | #ifdef SUN_H_HT0_Trap_Instruction_0 | |
3061 | SUN_H_HT0_Trap_Instruction_0 | |
3062 | #else | |
3063 | # ifdef My_HT0_Trap_Instruction_0 | |
3064 | My_HT0_Trap_Instruction_0 | |
3065 | # else | |
3066 | CUSTOM_TRAP(H_HT0_Trap_Instruction_0) | |
3067 | # endif | |
3068 | #endif | |
3069 | #else | |
3070 | NORMAL_TRAP(0x1b0); | |
3071 | #endif | |
3072 | ||
3073 | .align 32 | |
3074 | HT0_Trap_Instruction_0x1b1: | |
3075 | #ifdef H_HT0_Trap_Instruction_1 | |
3076 | #ifdef SUN_H_HT0_Trap_Instruction_1 | |
3077 | SUN_H_HT0_Trap_Instruction_1 | |
3078 | #else | |
3079 | # ifdef My_HT0_Trap_Instruction_1 | |
3080 | My_HT0_Trap_Instruction_1 | |
3081 | # else | |
3082 | CUSTOM_TRAP(H_HT0_Trap_Instruction_1) | |
3083 | # endif | |
3084 | #endif | |
3085 | #else | |
3086 | NORMAL_TRAP(0x1b1); | |
3087 | #endif | |
3088 | ||
3089 | .align 32 | |
3090 | HT0_Trap_Instruction_0x1b2: | |
3091 | #ifdef H_HT0_Trap_Instruction_2 | |
3092 | #ifdef SUN_H_HT0_Trap_Instruction_2 | |
3093 | SUN_H_HT0_Trap_Instruction_2 | |
3094 | #else | |
3095 | # ifdef My_HT0_Trap_Instruction_2 | |
3096 | My_HT0_Trap_Instruction_2 | |
3097 | # else | |
3098 | CUSTOM_TRAP(H_HT0_Trap_Instruction_2) | |
3099 | # endif | |
3100 | #endif | |
3101 | #else | |
3102 | NORMAL_TRAP(0x1b2); | |
3103 | #endif | |
3104 | ||
3105 | .align 32 | |
3106 | HT0_Trap_Instruction_0x1b3: | |
3107 | #ifdef H_HT0_Trap_Instruction_3 | |
3108 | #ifdef SUN_H_HT0_Trap_Instruction_3 | |
3109 | SUN_H_HT0_Trap_Instruction_3 | |
3110 | #else | |
3111 | # ifdef My_HT0_Trap_Instruction_3 | |
3112 | My_HT0_Trap_Instruction_3 | |
3113 | # else | |
3114 | CUSTOM_TRAP(H_HT0_Trap_Instruction_3) | |
3115 | # endif | |
3116 | #endif | |
3117 | #else | |
3118 | NORMAL_TRAP(0x1b3); | |
3119 | #endif | |
3120 | ||
3121 | .align 32 | |
3122 | HT0_Trap_Instruction_0x1b4: | |
3123 | #ifdef H_HT0_Trap_Instruction_4 | |
3124 | #ifdef SUN_H_HT0_Trap_Instruction_4 | |
3125 | SUN_H_HT0_Trap_Instruction_4 | |
3126 | #else | |
3127 | # ifdef My_HT0_Trap_Instruction_4 | |
3128 | My_HT0_Trap_Instruction_4 | |
3129 | # else | |
3130 | CUSTOM_TRAP(H_HT0_Trap_Instruction_4) | |
3131 | # endif | |
3132 | #endif | |
3133 | #else | |
3134 | NORMAL_TRAP(0x1b4); | |
3135 | #endif | |
3136 | ||
3137 | .align 32 | |
3138 | HT0_Trap_Instruction_0x1b5: | |
3139 | #ifdef H_HT0_Trap_Instruction_5 | |
3140 | #ifdef SUN_H_HT0_Trap_Instruction_5 | |
3141 | SUN_H_HT0_Trap_Instruction_5 | |
3142 | #else | |
3143 | # ifdef My_HT0_Trap_Instruction_5 | |
3144 | My_HT0_Trap_Instruction_5 | |
3145 | # else | |
3146 | CUSTOM_TRAP(H_HT0_Trap_Instruction_5) | |
3147 | # endif | |
3148 | #endif | |
3149 | #else | |
3150 | NORMAL_TRAP(0x1b5); | |
3151 | #endif | |
3152 | ||
3153 | .align 0x4000 | |
3154 | ||
3155 | ! If counter > 0, trap is enabled for n times, decrement counter | |
3156 | ! If counter = 0, trap is disabled, go to BadTrap | |
3157 | ! If counter = -1, trap has taken n times, go to GoodTrap directly | |
3158 | ! If counter <-1, trap is enabled for n times, increment counter | |
3159 | TrapCheck: | |
3160 | #ifdef SKIP_TRAPCHECK | |
3161 | done | |
3162 | nop | |
3163 | #else | |
3164 | set htrap_enable_data, %g1 | |
3165 | add %g7, %g7, %g4 | |
3166 | ldsh [%g1+%g4], %g2 | |
3167 | cmp %g2, 0 | |
3168 | bl %xcc, CheckGoodTrap | |
3169 | #ifdef NO_TRAPCHECK | |
3170 | nop | |
3171 | #else | |
3172 | mov 0, %o0 | |
3173 | #endif | |
3174 | be %xcc, HT0_BadTrap_0x101 | |
3175 | sub %g2, 1, %g2 | |
3176 | ba TrapCheck_end | |
3177 | CheckGoodTrap: | |
3178 | cmp %g2, -1 | |
3179 | be %xcc, HT0_GoodTrap_0x100 | |
3180 | add %g2, 1, %g2 | |
3181 | TrapCheck_end: | |
3182 | sth %g2, [%g1+%g4] | |
3183 | done | |
3184 | #endif | |
3185 | ||
3186 | TrapCheckWithRetry: | |
3187 | #ifdef SKIP_TRAPCHECK | |
3188 | retry | |
3189 | nop | |
3190 | #else | |
3191 | set htrap_enable_data, %g1 | |
3192 | add %g7, %g7, %g4 | |
3193 | ldsh [%g1+%g4], %g2 | |
3194 | cmp %g2, 0 | |
3195 | bl %xcc, CheckGoodTrap_1 | |
3196 | #ifdef NO_TRAPCHECK | |
3197 | nop | |
3198 | #else | |
3199 | mov 0, %o0 | |
3200 | #endif | |
3201 | be %xcc, HT0_BadTrap_0x101 | |
3202 | sub %g2, 1, %g2 | |
3203 | ba TrapCheck_end_1 | |
3204 | CheckGoodTrap_1: | |
3205 | cmp %g2, -1 | |
3206 | be %xcc, HT0_GoodTrap_0x100 | |
3207 | add %g2, 1, %g2 | |
3208 | TrapCheck_end_1: | |
3209 | sth %g2, [%g1+%g4] | |
3210 | retry | |
3211 | #endif | |
3212 | ||
3213 | ||
3214 | #include <immu_miss_handler_ext.s> | |
3215 | #include <dmmu_miss_handler_ext.s> | |
3216 | #include "iaccess_except_handler.s" | |
3217 | #include "daccess_except_handler.s" | |
3218 | #include "daccess_prot_handler.s" | |
3219 | #include "mem_not_align_handler.s" | |
3220 | .data | |
3221 | ||
3222 | htrap_enable_data: | |
3223 | hdt0_0: | |
3224 | .half HE0_0x00,HE0_0x01,HE0_0x02,HE0_0x03,HE0_0x04,HE0_0x05,HE0_0x06,HE0_0x07 | |
3225 | .half HE0_0x08,HE0_0x09,HE0_0x0a,HE0_0x0b,HE0_0x0c,HE0_0x0d,HE0_0x0e,HE0_0x0f | |
3226 | ||
3227 | .half HE0_0x10,HE0_0x11,HE0_0x12,HE0_0x13,HE0_0x14,HE0_0x15,HE0_0x16,HE0_0x17 | |
3228 | .half HE0_0x18,HE0_0x19,HE0_0x1a,HE0_0x1b,HE0_0x1c,HE0_0x1d,HE0_0x1e,HE0_0x1f | |
3229 | ||
3230 | .half HE0_0x20,HE0_0x21,HE0_0x22,HE0_0x23,HE0_0x24,HE0_0x25,HE0_0x26,HE0_0x27 | |
3231 | .half HE0_0x28,HE0_0x29,HE0_0x2a,HE0_0x2b,HE0_0x2c,HE0_0x2d,HE0_0x2e,HE0_0x2f | |
3232 | ||
3233 | .half HE0_0x30,HE0_0x31,HE0_0x32,HE0_0x33,HE0_0x34,HE0_0x35,HE0_0x36,HE0_0x37 | |
3234 | .half HE0_0x38,HE0_0x39,HE0_0x3a,HE0_0x3b,HE0_0x3c,HE0_0x3d,HE0_0x3e,HE0_0x3f | |
3235 | ||
3236 | hdt0_64: | |
3237 | .half HE0_0x40,HE0_0x41,HE0_0x42,HE0_0x43,HE0_0x44,HE0_0x45,HE0_0x46,HE0_0x47 | |
3238 | .half HE0_0x48,HE0_0x49,HE0_0x4a,HE0_0x4b,HE0_0x4c,HE0_0x4d,HE0_0x4e,HE0_0x4f | |
3239 | ||
3240 | .half HE0_0x50,HE0_0x51,HE0_0x52,HE0_0x53,HE0_0x54,HE0_0x55,HE0_0x56,HE0_0x57 | |
3241 | .half HE0_0x58,HE0_0x59,HE0_0x5a,HE0_0x5b,HE0_0x5c,HE0_0x5d,HE0_0x5e,HE0_0x5f | |
3242 | ||
3243 | .half HE0_0x60,HE0_0x61,HE0_0x62,HE0_0x63,HE0_0x64,HE0_0x65,HE0_0x66,HE0_0x67 | |
3244 | .half HE0_0x68,HE0_0x69,HE0_0x6a,HE0_0x6b,HE0_0x6c,HE0_0x6d,HE0_0x6e,HE0_0x6f | |
3245 | ||
3246 | .half HE0_0x70,HE0_0x71,HE0_0x72,HE0_0x73,HE0_0x74,HE0_0x75,HE0_0x76,HE0_0x77 | |
3247 | .half HE0_0x78,HE0_0x79,HE0_0x7a,HE0_0x7b,HE0_0x7c,HE0_0x7d,HE0_0x7e,HE0_0x7f | |
3248 | ||
3249 | hdt0_128: | |
3250 | .half HE0_0x80,HE0_0x81,HE0_0x82,HE0_0x83,HE0_0x84,HE0_0x85,HE0_0x86,HE0_0x87 | |
3251 | .half HE0_0x88,HE0_0x89,HE0_0x8a,HE0_0x8b,HE0_0x8c,HE0_0x8d,HE0_0x8e,HE0_0x8f | |
3252 | ||
3253 | .half HE0_0x90,HE0_0x91,HE0_0x92,HE0_0x93,HE0_0x94,HE0_0x95,HE0_0x96,HE0_0x97 | |
3254 | .half HE0_0x98,HE0_0x99,HE0_0x9a,HE0_0x9b,HE0_0x9c,HE0_0x9d,HE0_0x9e,HE0_0x9f | |
3255 | ||
3256 | .half HE0_0xa0,HE0_0xa1,HE0_0xa2,HE0_0xa3,HE0_0xa4,HE0_0xa5,HE0_0xa6,HE0_0xa7 | |
3257 | .half HE0_0xa8,HE0_0xa9,HE0_0xaa,HE0_0xab,HE0_0xac,HE0_0xad,HE0_0xae,HE0_0xaf | |
3258 | ||
3259 | .half HE0_0xb0,HE0_0xb1,HE0_0xb2,HE0_0xb3,HE0_0xb4,HE0_0xb5,HE0_0xb6,HE0_0xb7 | |
3260 | .half HE0_0xb8,HE0_0xb9,HE0_0xba,HE0_0xbb,HE0_0xbc,HE0_0xbd,HE0_0xbe,HE0_0xbf | |
3261 | ||
3262 | hdt0_192: | |
3263 | .half HE0_0xc0,HE0_0xc1,HE0_0xc2,HE0_0xc3,HE0_0xc4,HE0_0xc5,HE0_0xc6,HE0_0xc7 | |
3264 | .half HE0_0xc8,HE0_0xc9,HE0_0xca,HE0_0xcb,HE0_0xcc,HE0_0xcd,HE0_0xce,HE0_0xcf | |
3265 | ||
3266 | .half HE0_0xd0,HE0_0xd1,HE0_0xd2,HE0_0xd3,HE0_0xd4,HE0_0xd5,HE0_0xd6,HE0_0xd7 | |
3267 | .half HE0_0xd8,HE0_0xd9,HE0_0xda,HE0_0xdb,HE0_0xdc,HE0_0xdd,HE0_0xde,HE0_0xdf | |
3268 | ||
3269 | .half HE0_0xe0,HE0_0xe1,HE0_0xe2,HE0_0xe3,HE0_0xe4,HE0_0xe5,HE0_0xe6,HE0_0xe7 | |
3270 | .half HE0_0xe8,HE0_0xe9,HE0_0xea,HE0_0xeb,HE0_0xec,HE0_0xed,HE0_0xee,HE0_0xef | |
3271 | ||
3272 | .half HE0_0xf0,HE0_0xf1,HE0_0xf2,HE0_0xf3,HE0_0xf4,HE0_0xf5,HE0_0xf6,HE0_0xf7 | |
3273 | .half HE0_0xf8,HE0_0xf9,HE0_0xfa,HE0_0xfb,HE0_0xfc,HE0_0xfd,HE0_0xfe,HE0_0xff | |
3274 | ||
3275 | hdt1_0: | |
3276 | .half HE1_0x00,HE1_0x01,HE1_0x02,HE1_0x03,HE1_0x04,HE1_0x05,HE1_0x06,HE1_0x07 | |
3277 | .half HE1_0x08,HE1_0x09,HE1_0x0a,HE1_0x0b,HE1_0x0c,HE1_0x0d,HE1_0x0e,HE1_0x0f | |
3278 | ||
3279 | .half HE1_0x10,HE1_0x11,HE1_0x12,HE1_0x13,HE1_0x14,HE1_0x15,HE1_0x16,HE1_0x17 | |
3280 | .half HE1_0x18,HE1_0x19,HE1_0x1a,HE1_0x1b,HE1_0x1c,HE1_0x1d,HE1_0x1e,HE1_0x1f | |
3281 | ||
3282 | .half HE1_0x20,HE1_0x21,HE1_0x22,HE1_0x23,HE1_0x24,HE1_0x25,HE1_0x26,HE1_0x27 | |
3283 | .half HE1_0x28,HE1_0x29,HE1_0x2a,HE1_0x2b,HE1_0x2c,HE1_0x2d,HE1_0x2e,HE1_0x2f | |
3284 | ||
3285 | .half HE1_0x30,HE1_0x31,HE1_0x32,HE1_0x33,HE1_0x34,HE1_0x35,HE1_0x36,HE1_0x37 | |
3286 | .half HE1_0x38,HE1_0x39,HE1_0x3a,HE1_0x3b,HE1_0x3c,HE1_0x3d,HE1_0x3e,HE1_0x3f | |
3287 | ||
3288 | hdt1_64: | |
3289 | .half HE1_0x40,HE1_0x41,HE1_0x42,HE1_0x43,HE1_0x44,HE1_0x45,HE1_0x46,HE1_0x47 | |
3290 | .half HE1_0x48,HE1_0x49,HE1_0x4a,HE1_0x4b,HE1_0x4c,HE1_0x4d,HE1_0x4e,HE1_0x4f | |
3291 | ||
3292 | .half HE1_0x50,HE1_0x51,HE1_0x52,HE1_0x53,HE1_0x54,HE1_0x55,HE1_0x56,HE1_0x57 | |
3293 | .half HE1_0x58,HE1_0x59,HE1_0x5a,HE1_0x5b,HE1_0x5c,HE1_0x5d,HE1_0x5e,HE1_0x5f | |
3294 | ||
3295 | .half HE1_0x60,HE1_0x61,HE1_0x62,HE1_0x63,HE1_0x64,HE1_0x65,HE1_0x66,HE1_0x67 | |
3296 | .half HE1_0x68,HE1_0x69,HE1_0x6a,HE1_0x6b,HE1_0x6c,HE1_0x6d,HE1_0x6e,HE1_0x6f | |
3297 | ||
3298 | .half HE1_0x70,HE1_0x71,HE1_0x72,HE1_0x73,HE1_0x74,HE1_0x75,HE1_0x76,HE1_0x77 | |
3299 | .half HE1_0x78,HE1_0x79,HE1_0x7a,HE1_0x7b,HE1_0x7c,HE1_0x7d,HE1_0x7e,HE1_0x7f | |
3300 | ||
3301 | hdt1_128: | |
3302 | .half HE1_0x80,HE1_0x81,HE1_0x82,HE1_0x83,HE1_0x84,HE1_0x85,HE1_0x86,HE1_0x87 | |
3303 | .half HE1_0x88,HE1_0x89,HE1_0x8a,HE1_0x8b,HE1_0x8c,HE1_0x8d,HE1_0x8e,HE1_0x8f | |
3304 | ||
3305 | .half HE1_0x90,HE1_0x91,HE1_0x92,HE1_0x93,HE1_0x94,HE1_0x95,HE1_0x96,HE1_0x97 | |
3306 | .half HE1_0x98,HE1_0x99,HE1_0x9a,HE1_0x9b,HE1_0x9c,HE1_0x9d,HE1_0x9e,HE1_0x9f | |
3307 | ||
3308 | .half HE1_0xa0,HE1_0xa1,HE1_0xa2,HE1_0xa3,HE1_0xa4,HE1_0xa5,HE1_0xa6,HE1_0xa7 | |
3309 | .half HE1_0xa8,HE1_0xa9,HE1_0xaa,HE1_0xab,HE1_0xac,HE1_0xad,HE1_0xae,HE1_0xaf | |
3310 | ||
3311 | .half HE1_0xb0,HE1_0xb1,HE1_0xb2,HE1_0xb3,HE1_0xb4,HE1_0xb5,HE1_0xb6,HE1_0xb7 | |
3312 | .half HE1_0xb8,HE1_0xb9,HE1_0xba,HE1_0xbb,HE1_0xbc,HE1_0xbd,HE1_0xbe,HE1_0xbf | |
3313 | ||
3314 | hdt1_192: | |
3315 | .half HE1_0xc0,HE1_0xc1,HE1_0xc2,HE1_0xc3,HE1_0xc4,HE1_0xc5,HE1_0xc6,HE1_0xc7 | |
3316 | .half HE1_0xc8,HE1_0xc9,HE1_0xca,HE1_0xcb,HE1_0xcc,HE1_0xcd,HE1_0xce,HE1_0xcf | |
3317 | ||
3318 | .half HE1_0xd0,HE1_0xd1,HE1_0xd2,HE1_0xd3,HE1_0xd4,HE1_0xd5,HE1_0xd6,HE1_0xd7 | |
3319 | .half HE1_0xd8,HE1_0xd9,HE1_0xda,HE1_0xdb,HE1_0xdc,HE1_0xdd,HE1_0xde,HE1_0xdf | |
3320 | ||
3321 | .half HE1_0xe0,HE1_0xe1,HE1_0xe2,HE1_0xe3,HE1_0xe4,HE1_0xe5,HE1_0xe6,HE1_0xe7 | |
3322 | .half HE1_0xe8,HE1_0xe9,HE1_0xea,HE1_0xeb,HE1_0xec,HE1_0xed,HE1_0xee,HE1_0xef | |
3323 | ||
3324 | .half HE1_0xf0,HE1_0xf1,HE1_0xf2,HE1_0xf3,HE1_0xf4,HE1_0xf5,HE1_0xf6,HE1_0xf7 | |
3325 | .half HE1_0xf8,HE1_0xf9,HE1_0xfa,HE1_0xfb,HE1_0xfc,HE1_0xfd,HE1_0xfe,HE1_0xff | |
3326 | ||
3327 | hpthread_mutex_data: | |
3328 | ||
3329 | .byte 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3330 | .byte 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3331 | .byte 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3332 | .byte 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3333 | .byte 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3334 | .byte 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3335 | .byte 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3336 | .byte 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3337 | .byte 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3338 | .byte 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3339 | .byte 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3340 | .byte 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3341 | .byte 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3342 | .byte 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3343 | .byte 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3344 | .byte 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3345 | ||
3346 | hpthread_counter_data: | |
3347 | ||
3348 | .half 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3349 | .half 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3350 | .half 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3351 | .half 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3352 | .half 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3353 | .half 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3354 | .half 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3355 | .half 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3356 | .half 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3357 | .half 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3358 | .half 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3359 | .half 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3360 | .half 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3361 | .half 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3362 | .half 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3363 | .half 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0 | |
3364 | ||
3365 | !!!!!!!! ERROR HANDLING CODE that used to be in err_handlers.s !!!!! | |
3366 | ! For ITTM, ITTP, ITDP errors, err_type is < 4. Issue demap all to the VA in TPC[TL]. | |
3367 | ! (Demap pg requires context knowledge - too much work) | |
3368 | ! For ITMU (err_type = 4), rd sfar to chk MRA index. | |
3369 | ! For ITL2U and ITL2ND errors issue retry. | |
3370 | .text | |
3371 | inst_access_mmu_error_handler: | |
3372 | ht_read_isfsr: | |
3373 | add %g0, SFSR_VA, %g1 | |
3374 | ldxa [%g1]ASI_ISFSR, %g2 | |
3375 | cmp %g2, ISFSR_ITMU | |
3376 | be ht_chk_sfar !! sfar stores the MRA index | |
3377 | bg ht_clear_isfsr | |
3378 | ht_demap_all: | |
3379 | rdpr %tpc, %g3 | |
3380 | mov 0x80, %g3 | |
3381 | ba ht_clear_isfsr | |
3382 | stxa %g0, [%g3]ASI_IMMU_DEMAP | |
3383 | ht_chk_sfar: | |
3384 | add %g0, SFAR_VA, %g3 | |
3385 | ldxa [%g3]ASI_SFAR, %g4 | |
3386 | ht_clear_isfsr: | |
3387 | stxa %g0, [%g1]ASI_ISFSR | |
3388 | retry | |
3389 | ||
3390 | inst_access_error_handler: | |
3391 | add %g0, SFSR_VA, %g1 | |
3392 | ldxa [%g1]ASI_ISFSR, %g2 | |
3393 | rdpr %tpc, %g3 | |
3394 | stxa %g0, [%g1]ASI_ISFSR | |
3395 | retry | |
3396 | ||
3397 | int_proc_err_handler: | |
3398 | ht_read_ipe_dsfsr: | |
3399 | !# simplified the handler. Read the dsfsr and dsfsr and clear it for all ipe errors. | |
3400 | !# This will also speedup the diags. | |
3401 | !# I don't get much from injecting errors in the trap handlers. | |
3402 | !# First six lines is the new code added to simplify the handler. | |
3403 | !#8/18/05: EVEN with above simplification some of the diags die with max cycles reached. | |
3404 | !#This is because the global registers get messed up if we are at max gl. | |
3405 | !#Since the dsfsr and dsfar are being checked by the checkers, just do a retry. | |
3406 | retry | |
3407 | add %g0, SFSR_VA, %g7 | |
3408 | ldxa [%g7]ASI_DSFSR, %g6 | |
3409 | stxa %g0, [%g7]ASI_DSFSR | |
3410 | add %g0, SFAR_VA, %g7 | |
3411 | ldxa [%g7]ASI_SFAR, %g6 | |
3412 | retry | |
3413 | nop | |
3414 | rdpr %gl, %g7 !! read the current gl | |
3415 | cmp %g7, 0x3 | |
3416 | be ht_ipe_clear_dsfsr | |
3417 | add %g0, SFSR_VA, %g1 | |
3418 | ldxa [%g1]ASI_DSFSR, %g2 | |
3419 | ht_read_ipe_dsfar: | |
3420 | add %g0, SFAR_VA, %g1 | |
3421 | ldxa [%g1]ASI_SFAR, %g3 | |
3422 | ||
3423 | cmp %g2, DSFSR_FRFU | |
3424 | bl ht_irf_error | |
3425 | cmp %g2, DSFSR_SBDLC | |
3426 | bl ht_frf_error | |
3427 | cmp %g2, DSFSR_MRAU | |
3428 | bl ht_stb_error | |
3429 | be ht_mra_error | |
3430 | cmp %g2, DSFSR_SCAC | |
3431 | !!bl ht_tsa_error on tsa_errors just clear the dsfsr and exit | |
3432 | bl ht_ipe_clear_dsfsr | |
3433 | cmp %g2, DSFSR_TCCP | |
3434 | bl ht_sca_error | |
3435 | nop | |
3436 | ht_ipe_tcc_error: | |
3437 | and %g3, 0x3, %g3 !! get the tca index | |
3438 | sllx %g3, 3, %g3 | |
3439 | mov %g3, %g4 | |
3440 | ldxa [%g3]ASI_TICK_ACCESS, %g5 !! read ecc | |
3441 | or %g3, 0x20, %g3 !!set NP bit to read data | |
3442 | ldxa [%g3]ASI_TICK_ACCESS, %g5 !! read data | |
3443 | setx ht_ipe_clr_tcc_err, %g1, %g3 | |
3444 | jmp %g3+%g4 | |
3445 | nop | |
3446 | ht_ipe_clr_tcc_err: | |
3447 | wr %g0, %g5, %tick_cmpr | |
3448 | ba ht_ipe_clear_dsfsr | |
3449 | nop | |
3450 | ht_ipe_clr_stick_err: | |
3451 | wr %g0, %g5, %sys_tick_cmpr | |
3452 | ba ht_ipe_clear_dsfsr | |
3453 | nop | |
3454 | ht_ipe_clr_hstick_err: | |
3455 | wrhpr %g0, %g5, %hsys_tick_cmpr | |
3456 | ba ht_ipe_clear_dsfsr | |
3457 | nop | |
3458 | ht_stb_error: | |
3459 | and %g3, 0x7, %g3 !! get stb_index | |
3460 | sllx %g3, 3, %g3 | |
3461 | ht_ipe_rd_stb_entry_data: | |
3462 | ldxa [%g3]ASI_STB_ACCESS, %g2 | |
3463 | ht_ipe_rd_stb_entry_ecc: | |
3464 | or %g3, 0x40, %g3 | |
3465 | ldxa [%g3]ASI_STB_ACCESS, %g2 | |
3466 | ht_ipe_rd_stb_entry_addr: | |
3467 | or %g3, 0x80, %g3 | |
3468 | ldxa [%g3]ASI_STB_ACCESS, %g2 | |
3469 | ht_ipe_rd_stb_entry_par: | |
3470 | and %g3, 0xbf, %g3 | |
3471 | ldxa [%g3]ASI_STB_ACCESS, %g2 | |
3472 | ht_ipe_rd_stb_ptr: | |
3473 | add %g0, 0x100, %g1 !! read the stb ptr | |
3474 | ldxa [%g1]ASI_STB_ACCESS, %g2 | |
3475 | ba,a ht_ipe_clear_dsfsr | |
3476 | ||
3477 | ht_mra_error: | |
3478 | and %g3, 0x7, %g3 !! get mra_index | |
3479 | sllx %g3, 4, %g3 | |
3480 | setx ht_ipe_rd_mra, %g1, %g4 | |
3481 | jmp %g3+%g4 | |
3482 | nop | |
3483 | ht_ipe_rd_mra: | |
3484 | ht_ipe_rd_mra_0: | |
3485 | add %g0, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_0, %g1 | |
3486 | ldxa [%g1]ASI_MMU_ZERO_CONTEXT_TSB_CONFIG, %g2 | |
3487 | ba ht_ipe_clear_dsfsr | |
3488 | nop | |
3489 | ht_ipe_rd_mra_1: | |
3490 | add %g0, ASI_MMU_ZERO_CONTEXT_TSB_CONFIG_2, %g1 | |
3491 | ldxa [%g1]ASI_MMU_ZERO_CONTEXT_TSB_CONFIG, %g2 | |
3492 | ba ht_ipe_clear_dsfsr | |
3493 | nop | |
3494 | ht_ipe_rd_mra_2: | |
3495 | add %g0, ASI_MMU_NONZERO_CONTEXT_TSB_CONFIG_0, %g1 | |
3496 | ldxa [%g1]ASI_MMU_NONZERO_CONTEXT_TSB_CONFIG, %g2 | |
3497 | ba ht_ipe_clear_dsfsr | |
3498 | nop | |
3499 | ht_ipe_rd_mra_3: | |
3500 | add %g0, ASI_MMU_NONZERO_CONTEXT_TSB_CONFIG_2, %g1 | |
3501 | ldxa [%g1]ASI_MMU_NONZERO_CONTEXT_TSB_CONFIG, %g2 | |
3502 | ba ht_ipe_clear_dsfsr | |
3503 | nop | |
3504 | ht_ipe_rd_mra_4: | |
3505 | add %g0, ASI_MMU_PHYSICAL_OFFSET_0, %g1 | |
3506 | ldxa [%g1]ASI_MMU_PHYSICAL_OFFSET, %g2 | |
3507 | ba ht_ipe_clear_dsfsr | |
3508 | nop | |
3509 | ht_ipe_rd_mra_5: | |
3510 | add %g0, ASI_MMU_PHYSICAL_OFFSET_1, %g1 | |
3511 | ldxa [%g1]ASI_MMU_PHYSICAL_OFFSET, %g2 | |
3512 | ba ht_ipe_clear_dsfsr | |
3513 | nop | |
3514 | ht_ipe_rd_mra_6: | |
3515 | add %g0, ASI_MMU_PHYSICAL_OFFSET_2, %g1 | |
3516 | ldxa [%g1]ASI_MMU_PHYSICAL_OFFSET, %g2 | |
3517 | ba ht_ipe_clear_dsfsr | |
3518 | nop | |
3519 | ht_ipe_rd_mra_7: | |
3520 | add %g0, ASI_MMU_PHYSICAL_OFFSET_3, %g1 | |
3521 | ldxa [%g1]ASI_MMU_PHYSICAL_OFFSET, %g2 | |
3522 | ba ht_ipe_clear_dsfsr | |
3523 | nop | |
3524 | ||
3525 | ht_sca_error: | |
3526 | and %g3, 0x7, %g3 !! get sca_index | |
3527 | sllx %g3, 3, %g3 | |
3528 | mov %g3, %g4 | |
3529 | ldxa [%g3]ASI_SCRATCHPAD_ACCESS, %g5 !! read ecc | |
3530 | or %g3, 0x40, %g3 !!set NP bit to read data | |
3531 | ldxa [%g3]ASI_SCRATCHPAD_ACCESS, %g5 !! read data | |
3532 | ht_ipe_clr_sca_err: | |
3533 | stxa %g5, [%g4]ASI_HYP_SCRATCHPAD | |
3534 | ba ht_ipe_clear_dsfsr | |
3535 | nop | |
3536 | ||
3537 | ht_tsa_error: | |
3538 | and %g3, 0x7, %g3 !! get tsa_index | |
3539 | rdpr %tl, %g1 !! store the current tl | |
3540 | cmp %g3, 6 | |
3541 | bl ht_ipe_priv_reg_err | |
3542 | nop | |
3543 | be ht_ipe_mondo_reg_err | |
3544 | nop | |
3545 | tg T_BAD_TRAP | |
3546 | ||
3547 | ht_ipe_priv_reg_err: | |
3548 | inc %g3 | |
3549 | wrpr %g0, %g3, %tl | |
3550 | rdpr %tstate, %g2 | |
3551 | wrpr %g0, %g2, %tstate !! shd clear the error | |
3552 | wrpr %g0, %g1, %tl | |
3553 | ba ht_ipe_clear_dsfsr | |
3554 | nop | |
3555 | ||
3556 | ht_ipe_mondo_reg_err: | |
3557 | add %g0, ASI_CPU_MONDO_QUEUE_HEAD, %g1 | |
3558 | ldxa [%g1]ASI_QUEUE, %g2 | |
3559 | stxa %g2, [%g1]ASI_QUEUE | |
3560 | ba ht_ipe_clear_dsfsr | |
3561 | nop | |
3562 | ||
3563 | ht_irf_error: | |
3564 | ht_ipe_get_reg_no: | |
3565 | and %g3, 0x1f, %g1 | |
3566 | ht_ipe_rd_irf_ecc: | |
3567 | sllx %g1, 3, %g2 | |
3568 | ldxa [%g2]ASI_IRF_ECC_REG, %g4 | |
3569 | ht_ipe_get_syndrome: | |
3570 | srlx %g3, 7, %g2 | |
3571 | and %g2, 0xff, %g2 | |
3572 | ht_ipe_get_gl: | |
3573 | srlx %g3, 5, %g2 | |
3574 | and %g2, 0x3, %g2 | |
3575 | rdpr %gl, %g7 !! read the current gl | |
3576 | cmp %g1, 0x7 | |
3577 | bg ht_ipe_rd_array !! err not in global | |
3578 | cmp %g2, 0x3 !! err in global and at gl 3 | |
3579 | be,a ht_ipe_rd_array !! global registers are not corrected | |
3580 | wrpr %g0, %g2, %gl !! restore the gl to error gl | |
3581 | ||
3582 | ht_ipe_rd_array: | |
3583 | rdpr %tl, %g3 | |
3584 | sllx %g3, 3, %g3 | |
3585 | setx ht_ipe_rd_err_reg, %g4, %g5 | |
3586 | sllx %g1, 3, %g6 | |
3587 | jmp %g5+%g6 | |
3588 | nop | |
3589 | ht_ipe_rd_err_reg: | |
3590 | ht_ipe_rd_g0: | |
3591 | stxa %r0, [%g0 + %g3]ASI_SCRATCHPAD | |
3592 | ba,a ht_ipe_wr_err_rg | |
3593 | ht_ipe_rd_g1: | |
3594 | stxa %r1, [%g0 + %g3]ASI_SCRATCHPAD | |
3595 | ba,a ht_ipe_wr_err_rg | |
3596 | ht_ipe_rd_g2: | |
3597 | stxa %r2, [%g0 + %g3]ASI_SCRATCHPAD | |
3598 | ba,a ht_ipe_wr_err_rg | |
3599 | ht_ipe_rd_g3: | |
3600 | stxa %r3, [%g0 + %g3]ASI_SCRATCHPAD | |
3601 | ba,a ht_ipe_wr_err_rg | |
3602 | ht_ipe_rd_g4: | |
3603 | stxa %r4, [%g0 + %g3]ASI_SCRATCHPAD | |
3604 | ba,a ht_ipe_wr_err_rg | |
3605 | ht_ipe_rd_g5: | |
3606 | stxa %r5, [%g0 + %g3]ASI_SCRATCHPAD | |
3607 | ba,a ht_ipe_wr_err_rg | |
3608 | ht_ipe_rd_g6: | |
3609 | stxa %r6, [%g0 + %g3]ASI_SCRATCHPAD | |
3610 | ba,a ht_ipe_wr_err_rg | |
3611 | ht_ipe_rd_g7: | |
3612 | stxa %r7, [%g0 + %g3]ASI_SCRATCHPAD | |
3613 | ba,a ht_ipe_wr_err_rg | |
3614 | ht_ipe_rd_r8: | |
3615 | stxa %r8, [%g0 + %g3]ASI_SCRATCHPAD | |
3616 | ba,a ht_ipe_wr_err_rg | |
3617 | ht_ipe_rd_r9: | |
3618 | stxa %r9, [%g0 + %g3]ASI_SCRATCHPAD | |
3619 | ba,a ht_ipe_wr_err_rg | |
3620 | ht_ipe_rd_r10: | |
3621 | stxa %r10, [%g0 + %g3]ASI_SCRATCHPAD | |
3622 | ba,a ht_ipe_wr_err_rg | |
3623 | ht_ipe_rd_r11: | |
3624 | stxa %r11, [%g0 + %g3]ASI_SCRATCHPAD | |
3625 | ba,a ht_ipe_wr_err_rg | |
3626 | ht_ipe_rd_r12: | |
3627 | stxa %r12, [%g0 + %g3]ASI_SCRATCHPAD | |
3628 | ba,a ht_ipe_wr_err_rg | |
3629 | ht_ipe_rd_r13: | |
3630 | stxa %r13, [%g0 + %g3]ASI_SCRATCHPAD | |
3631 | ba,a ht_ipe_wr_err_rg | |
3632 | ht_ipe_rd_r14: | |
3633 | stxa %r14, [%g0 + %g3]ASI_SCRATCHPAD | |
3634 | ba,a ht_ipe_wr_err_rg | |
3635 | ht_ipe_rd_r15: | |
3636 | stxa %r15, [%g0 + %g3]ASI_SCRATCHPAD | |
3637 | ba,a ht_ipe_wr_err_rg | |
3638 | ht_ipe_rd_r16: | |
3639 | stxa %r16, [%g0 + %g3]ASI_SCRATCHPAD | |
3640 | ba,a ht_ipe_wr_err_rg | |
3641 | ht_ipe_rd_r17: | |
3642 | stxa %r17, [%g0 + %g3]ASI_SCRATCHPAD | |
3643 | ba,a ht_ipe_wr_err_rg | |
3644 | ht_ipe_rd_r18: | |
3645 | stxa %r18, [%g0 + %g3]ASI_SCRATCHPAD | |
3646 | ba,a ht_ipe_wr_err_rg | |
3647 | ht_ipe_rd_r19: | |
3648 | stxa %r19, [%g0 + %g3]ASI_SCRATCHPAD | |
3649 | ba,a ht_ipe_wr_err_rg | |
3650 | ht_ipe_rd_r20: | |
3651 | stxa %r20, [%g0 + %g3]ASI_SCRATCHPAD | |
3652 | ba,a ht_ipe_wr_err_rg | |
3653 | ht_ipe_rd_r21: | |
3654 | stxa %r21, [%g0 + %g3]ASI_SCRATCHPAD | |
3655 | ba,a ht_ipe_wr_err_rg | |
3656 | ht_ipe_rd_r22: | |
3657 | stxa %r22, [%g0 + %g3]ASI_SCRATCHPAD | |
3658 | ba,a ht_ipe_wr_err_rg | |
3659 | ht_ipe_rd_r23: | |
3660 | stxa %r23, [%g0 + %g3]ASI_SCRATCHPAD | |
3661 | ba,a ht_ipe_wr_err_rg | |
3662 | ht_ipe_rd_r24: | |
3663 | stxa %r24, [%g0 + %g3]ASI_SCRATCHPAD | |
3664 | ba,a ht_ipe_wr_err_rg | |
3665 | ht_ipe_rd_r25: | |
3666 | stxa %r25, [%g0 + %g3]ASI_SCRATCHPAD | |
3667 | ba,a ht_ipe_wr_err_rg | |
3668 | ht_ipe_rd_r26: | |
3669 | stxa %r26, [%g0 + %g3]ASI_SCRATCHPAD | |
3670 | ba,a ht_ipe_wr_err_rg | |
3671 | ht_ipe_rd_r27: | |
3672 | stxa %r27, [%g0 + %g3]ASI_SCRATCHPAD | |
3673 | ba,a ht_ipe_wr_err_rg | |
3674 | ht_ipe_rd_r28: | |
3675 | stxa %r28, [%g0 + %g3]ASI_SCRATCHPAD | |
3676 | ba,a ht_ipe_wr_err_rg | |
3677 | ht_ipe_rd_r29: | |
3678 | stxa %r29, [%g0 + %g3]ASI_SCRATCHPAD | |
3679 | ba,a ht_ipe_wr_err_rg | |
3680 | ht_ipe_rd_r30: | |
3681 | stxa %r30, [%g0 + %g3]ASI_SCRATCHPAD | |
3682 | ba,a ht_ipe_wr_err_rg | |
3683 | ht_ipe_rd_r31: | |
3684 | stxa %r31, [%g0 + %g3]ASI_SCRATCHPAD | |
3685 | ht_ipe_wr_err_rg: | |
3686 | setx ht_ipe_wr_g0, %g4, %g5 | |
3687 | jmp %g5+%g6 | |
3688 | nop | |
3689 | ||
3690 | ht_ipe_wr_g0: | |
3691 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r0 | |
3692 | ba,a ht_ipe_restore_gl | |
3693 | ht_ipe_wr_g1: | |
3694 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r1 | |
3695 | ba,a ht_ipe_restore_gl | |
3696 | ht_ipe_wr_g2: | |
3697 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r2 | |
3698 | ba,a ht_ipe_restore_gl | |
3699 | ht_ipe_wr_g3: | |
3700 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r3 | |
3701 | ba,a ht_ipe_restore_gl | |
3702 | ht_ipe_wr_g4: | |
3703 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r4 | |
3704 | ba,a ht_ipe_restore_gl | |
3705 | ht_ipe_wr_g5: | |
3706 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r5 | |
3707 | ba,a ht_ipe_restore_gl | |
3708 | ht_ipe_wr_g6: | |
3709 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r6 | |
3710 | ba,a ht_ipe_restore_gl | |
3711 | ht_ipe_wr_g7: | |
3712 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r7 | |
3713 | ba,a ht_ipe_restore_gl | |
3714 | ht_ipe_wr_r8: | |
3715 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r8 | |
3716 | ba,a ht_ipe_restore_gl | |
3717 | ht_ipe_wr_r9: | |
3718 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r9 | |
3719 | ba,a ht_ipe_restore_gl | |
3720 | ht_ipe_wr_r10: | |
3721 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r10 | |
3722 | ba,a ht_ipe_restore_gl | |
3723 | ht_ipe_wr_r11: | |
3724 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r11 | |
3725 | ba,a ht_ipe_restore_gl | |
3726 | ht_ipe_wr_r12: | |
3727 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r12 | |
3728 | ba,a ht_ipe_restore_gl | |
3729 | ht_ipe_wr_r13: | |
3730 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r13 | |
3731 | ba,a ht_ipe_restore_gl | |
3732 | ht_ipe_wr_r14: | |
3733 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r14 | |
3734 | ba,a ht_ipe_restore_gl | |
3735 | ht_ipe_wr_r15: | |
3736 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r15 | |
3737 | ba,a ht_ipe_restore_gl | |
3738 | ht_ipe_wr_r16: | |
3739 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r16 | |
3740 | ba,a ht_ipe_restore_gl | |
3741 | ht_ipe_wr_r17: | |
3742 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r17 | |
3743 | ba,a ht_ipe_restore_gl | |
3744 | ht_ipe_wr_r18: | |
3745 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r18 | |
3746 | ba,a ht_ipe_restore_gl | |
3747 | ht_ipe_wr_r19: | |
3748 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r19 | |
3749 | ba,a ht_ipe_restore_gl | |
3750 | ht_ipe_wr_r20: | |
3751 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r20 | |
3752 | ba,a ht_ipe_restore_gl | |
3753 | ht_ipe_wr_r21: | |
3754 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r21 | |
3755 | ba,a ht_ipe_restore_gl | |
3756 | ht_ipe_wr_r22: | |
3757 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r22 | |
3758 | ba,a ht_ipe_restore_gl | |
3759 | ht_ipe_wr_r23: | |
3760 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r23 | |
3761 | ba,a ht_ipe_restore_gl | |
3762 | ht_ipe_wr_r24: | |
3763 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r24 | |
3764 | ba,a ht_ipe_restore_gl | |
3765 | ht_ipe_wr_r25: | |
3766 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r25 | |
3767 | ba,a ht_ipe_restore_gl | |
3768 | ht_ipe_wr_r26: | |
3769 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r26 | |
3770 | ba,a ht_ipe_restore_gl | |
3771 | ht_ipe_wr_r27: | |
3772 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r27 | |
3773 | ba,a ht_ipe_restore_gl | |
3774 | ht_ipe_wr_r28: | |
3775 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r28 | |
3776 | ba,a ht_ipe_restore_gl | |
3777 | ht_ipe_wr_r29: | |
3778 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r29 | |
3779 | ba,a ht_ipe_restore_gl | |
3780 | ht_ipe_wr_r30: | |
3781 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r30 | |
3782 | ba,a ht_ipe_restore_gl | |
3783 | ht_ipe_wr_r31: | |
3784 | ldxa [%g0 + %g3]ASI_SCRATCHPAD, %r31 | |
3785 | ht_ipe_restore_gl: | |
3786 | wrpr %g0, %g7, %gl | |
3787 | ba ht_ipe_clear_dsfsr | |
3788 | nop | |
3789 | ||
3790 | ht_frf_error: | |
3791 | ht_ipe_get_frf_reg_no: | |
3792 | and %g3, 0x3f, %g1 | |
3793 | ht_ipe_get_frf_even_syndrome: | |
3794 | srlx %g3, 6, %g2 | |
3795 | and %g2, 0x7f, %g2 | |
3796 | ht_ipe_get_frf_odd_syndrome: | |
3797 | srlx %g3, 13, %g2 | |
3798 | and %g2, 0x7f, %g2 | |
3799 | ht_ipe_rd_frf_ecc: | |
3800 | sllx %g1, 3, %g1 | |
3801 | ldxa [%g1]ASI_FRF_ECC_REG, %g3 | |
3802 | ||
3803 | ht_ipe_clear_dsfsr: | |
3804 | add %g0, SFSR_VA, %g7 | |
3805 | stxa %g0, [%g7]ASI_DSFSR | |
3806 | retry | |
3807 | ||
3808 | data_access_mmu_error_handler: | |
3809 | ht_dme_read_dsfsr: | |
3810 | add %g0, SFSR_VA, %g1 | |
3811 | ldxa [%g1]ASI_DSFSR, %g2 | |
3812 | ht_dme_read_dsfar: | |
3813 | add %g0, SFAR_VA, %g4 | |
3814 | ldxa [%g4]ASI_SFAR, %g3 | |
3815 | cmp %g2, DSFSR_DTMU | |
3816 | bge ht_dme_clear_dsfsr | |
3817 | ht_dme_demap_all: | |
3818 | mov 0x80, %g3 | |
3819 | stxa %g0, [%g3]ASI_DMMU_DEMAP | |
3820 | ht_dme_clear_dsfsr: | |
3821 | stxa %g0, [%g1]ASI_DSFSR | |
3822 | retry | |
3823 | ||
3824 | data_access_error_handler: | |
3825 | !!SOC CODE | |
3826 | setx 0xc03ffff800000000, %g1, %g2 | |
3827 | setx 0xab00000000, %g1, %g3 | |
3828 | stx %g2, [%g3] | |
3829 | !!END SOC CODE | |
3830 | add %g0, SFAR_VA, %g1 | |
3831 | ldxa [%g1]ASI_SFAR, %g2 | |
3832 | add %g0, SFSR_VA, %g1 | |
3833 | ldxa [%g1]ASI_DSFSR, %g2 | |
3834 | stxa %g0, [%g1]ASI_DSFSR | |
3835 | #ifdef DAE_SKIP_IF_SOCU_ERROR | |
3836 | cmp %g2, 0x4 | |
3837 | bne dae_retry | |
3838 | nop | |
3839 | done | |
3840 | dae_retry: | |
3841 | #endif | |
3842 | retry | |
3843 | ||
3844 | hw_corrected_error_handler: | |
3845 | ht_hce_read_desr: | |
3846 | ldxa [%g0]ASI_DESR, %g1 !! PRM 25.8.5 Also clears desr | |
3847 | ||
3848 | ht_hce_chk_errt: | |
3849 | srlx %g1, 56, %g2 | |
3850 | #ifdef VERBOSE_MCU_CE_HANDLER | |
3851 | /* only allows MCU and L2 correctable errors */ | |
3852 | and %g2, 0x1F, %g2 | |
3853 | ||
3854 | cmp %g2, DESR_HCE_L2C | |
3855 | be hw_corrected_error_clear_l2esr | |
3856 | nop | |
3857 | ||
3858 | cmp %g2, DESR_SOCC | |
3859 | be hw_corrected_error_clear_dram_esr | |
3860 | nop | |
3861 | ||
3862 | ta T_BAD_TRAP ! only expected L2 or MCU Correctable | |
3863 | nop | |
3864 | #else | |
3865 | /* allows pretty much any error */ | |
3866 | and %g2, 0x1F, %g2 | |
3867 | cmp %g2, DESR_ICDP | |
3868 | ble ht_hce_ic_error | |
3869 | cmp %g2, DESR_DCDP | |
3870 | ble ht_hce_dc_error | |
3871 | cmp %g2, DESR_SBDPC | |
3872 | be ht_hce_sbdpc_error | |
3873 | #endif | |
3874 | !!SOC CODE | |
3875 | hw_corrected_error_clear_dram_esr: | |
3876 | /* Check & clear the DRAM ESR - PRM 25.12.1 | |
3877 | * DRAM Error Status reg bits are: | |
3878 | * 63 MEU Multiple uncorrectable errors | |
3879 | * 62 MEC Multiple correctable errors | |
3880 | * 61 DAC DRAM access correctable error | |
3881 | * 60 DAU DRAM access uncorrectable error | |
3882 | * 59 DSC DRAM scrub correctable error | |
3883 | * 58 DSU DRAM scrub uncorrectable error | |
3884 | * 57 DBU DRAM out-of-bound error | |
3885 | * 56 MEB Multiple out-of-bound errors | |
3886 | * 55 FBU FBDIMM channel unrecoverable error | |
3887 | * 54 FBR FBDIMM channel recoverable error | |
3888 | */ | |
3889 | best_set_reg(DRAM_ES_PA, %g7, %g3) | |
3890 | best_set_reg(DRAM_CSR_STEP, %g6, %g7) | |
3891 | #ifdef VERBOSE_MCU_CE_HANDLER | |
3892 | /* only allows MCU DAC and DSC errors */ | |
3893 | best_set_reg(0x2000000000000000, %g7, %g2) ! DAC bit | |
3894 | best_set_reg(0x0800000000000000, %g7, %g4) ! DSC bit | |
3895 | mov 0, %g1 | |
3896 | ||
3897 | ldx [%g3], %g5 /* DRAM0 ESR*/ | |
3898 | andcc %g5, %g2, %g6 | |
3899 | be %xcc, ht_hce_no_dram0_dac | |
3900 | nop | |
3901 | ||
3902 | ht_hce_dram0_dac: | |
3903 | nop ! $EV trig_pc_d(1, @VA(.HTRAPS.ht_hce_dram0_dac)) -> printf("INFO: DRAM0 ESR DAC bit was set",*,1) | |
3904 | ||
3905 | ht_hce_no_dram0_dac: | |
3906 | andcc %g5, %g4, %g6 | |
3907 | be %xcc, ht_hce_no_dram0_dsc | |
3908 | nop | |
3909 | ||
3910 | ht_hce_dram0_dsc: | |
3911 | nop ! $EV trig_pc_d(1, @VA(.HTRAPS.ht_hce_dram0_dsc)) -> printf("INFO: DRAM0 ESR DSC bit was set",*,1) | |
3912 | ||
3913 | ht_hce_no_dram0_dsc: | |
3914 | stx %g5, [%g3] /* clear DRAM0 ESR */ | |
3915 | or %g5, %g1, %g1 | |
3916 | ||
3917 | add %g3, %g7, %g3 | |
3918 | ldx [%g3], %g5 /* load DRAM1 ESR*/ | |
3919 | andcc %g5, %g2, %g6 | |
3920 | be %xcc, ht_hce_no_dram1_dac | |
3921 | nop | |
3922 | ||
3923 | ht_hce_dram1_dac: | |
3924 | nop ! $EV trig_pc_d(1, @VA(.HTRAPS.ht_hce_dram1_dac)) -> printf("INFO: DRAM1 ESR DAC bit was set",*,1) | |
3925 | ||
3926 | ht_hce_no_dram1_dac: | |
3927 | andcc %g5, %g4, %g6 | |
3928 | be %xcc, ht_hce_no_dram1_dsc | |
3929 | nop | |
3930 | ||
3931 | ht_hce_dram1_dsc: | |
3932 | nop ! $EV trig_pc_d(1, @VA(.HTRAPS.ht_hce_dram1_dsc)) -> printf("INFO: DRAM1 ESR DSC bit was set",*,1) | |
3933 | ||
3934 | ht_hce_no_dram1_dsc: | |
3935 | stx %g5, [%g3] /* clear DRAM1 ESR */ | |
3936 | or %g5, %g1, %g1 | |
3937 | ||
3938 | add %g3, %g7, %g3 | |
3939 | ldx [%g3], %g5 /* load DRAM2 ESR */ | |
3940 | andcc %g5, %g2, %g6 | |
3941 | be %xcc, ht_hce_no_dram2_dac | |
3942 | nop | |
3943 | ||
3944 | ht_hce_dram2_dac: | |
3945 | nop ! $EV trig_pc_d(1, @VA(.HTRAPS.ht_hce_dram2_dac)) -> printf("INFO: DRAM2 ESR DAC bit was set",*,1) | |
3946 | ||
3947 | ht_hce_no_dram2_dac: | |
3948 | andcc %g5, %g4, %g6 | |
3949 | be %xcc, ht_hce_no_dram2_dsc | |
3950 | nop | |
3951 | ||
3952 | ht_hce_dram2_dsc: | |
3953 | nop ! $EV trig_pc_d(1, @VA(.HTRAPS.ht_hce_dram2_dsc)) -> printf("INFO: DRAM2 ESR DSC bit was set",*,1) | |
3954 | ||
3955 | ht_hce_no_dram2_dsc: | |
3956 | stx %g5, [%g3] /* clear DRAM2 ESR */ | |
3957 | or %g5, %g1, %g1 | |
3958 | ||
3959 | add %g3, %g7, %g3 | |
3960 | ldx [%g3], %g5 /* load DRAM3 ESR */ | |
3961 | andcc %g5, %g2, %g6 | |
3962 | be %xcc, ht_hce_no_dram3_dac | |
3963 | nop | |
3964 | ||
3965 | ht_hce_dram3_dac: | |
3966 | nop ! $EV trig_pc_d(1, @VA(.HTRAPS.ht_hce_dram3_dac)) -> printf("INFO: DRAM3 ESR DAC bit was set",*,1) | |
3967 | ||
3968 | ht_hce_no_dram3_dac: | |
3969 | andcc %g5, %g4, %g6 | |
3970 | be %xcc, ht_hce_no_dram3_dsc | |
3971 | nop | |
3972 | ||
3973 | ht_hce_dram3_dsc: | |
3974 | nop ! $EV trig_pc_d(1, @VA(.HTRAPS.ht_hce_dram3_dsc)) -> printf("INFO: DRAM3 ESR DSC bit was set",*,1) | |
3975 | ||
3976 | ht_hce_no_dram3_dsc: | |
3977 | stx %g5, [%g3] /* DRAM3 */ | |
3978 | or %g5, %g1, %g1 | |
3979 | ||
3980 | or %g2, %g4, %g4 | |
3981 | andcc %g1, %g4, %g6 /* if no DAC/DSC on any DRAM, then error */ | |
3982 | bne %xcc, ht_hce_done | |
3983 | nop | |
3984 | ||
3985 | ta T_BAD_TRAP ! no DAC or DSC set in any MCU ESR | |
3986 | nop | |
3987 | ||
3988 | ht_hce_done: | |
3989 | retry | |
3990 | #else | |
3991 | best_set_reg(0x6840000000000000, %g7, %g2) | |
3992 | stx %g2, [%g3] /* DRAM0 */ | |
3993 | add %g3, %g7, %g3 | |
3994 | stx %g2, [%g3] /* DRAM1 */ | |
3995 | add %g3, %g7, %g3 | |
3996 | stx %g2, [%g3] /* DRAM2 */ | |
3997 | add %g3, %g7, %g3 | |
3998 | stx %g2, [%g3] /* DRAM3 */ | |
3999 | #endif | |
4000 | hw_corrected_error_clear_l2esr: | |
4001 | /* Clear the L2$ ESR */ | |
4002 | /* L2ESR correctable error bits: | |
4003 | * 62 MEC Multiple correctable errors | |
4004 | * 51 LDWC L2 cache data array writeback correctable error | |
4005 | * 47 LDSC L2 cache data array scrub correctable error | |
4006 | * 45 LTC L2 cache tag array correctable error | |
4007 | * 42 DAC DRAM access correctable error | |
4008 | * 40 DRC DRAM dma access correctable error | |
4009 | * 38 DSC DRAM scrub correctable error | |
4010 | * 34 LVC VUAD correctable error | |
4011 | */ | |
4012 | best_set_reg(0x4008a54400000000, %g1, %g2) | |
4013 | best_set_reg(L2ES_PA0, %g1, %g3) | |
4014 | stx %g2, [%g3] | |
4015 | stx %g2, [%g3 + 0x040] | |
4016 | stx %g2, [%g3 + 0x080] | |
4017 | stx %g2, [%g3 + 0x0c0] | |
4018 | stx %g2, [%g3 + 0x100] | |
4019 | stx %g2, [%g3 + 0x140] | |
4020 | stx %g2, [%g3 + 0x180] | |
4021 | stx %g2, [%g3 + 0x1c0] | |
4022 | !!END SOC CODE | |
4023 | retry !! Can't do much for l2c errors | |
4024 | ||
4025 | ht_hce_dc_error: | |
4026 | and %g1, 0x1ff, %g2 | |
4027 | sllx %g2, 4, %g2 !! index is in bits 10:4 of addr | |
4028 | add %g0, 0x800, %g1 | |
4029 | sllx %g1, 2, %g1 !! for reading data, bit 13 of index shd be 1 | |
4030 | ht_hce_dc_rd_tag: | |
4031 | ldxa [%g2]ASI_DC_TAG, %g3 | |
4032 | /* | |
4033 | ht_hce_dc_rd_data: | |
4034 | ldxa [%g2+%g1]ASI_DC_DATA, %g4 | |
4035 | or %g2, 0x8, %g2 !! read MSB 8 bytes from cache line | |
4036 | ldxa [%g2+%g1]ASI_DC_DATA, %g4 | |
4037 | */ | |
4038 | retry | |
4039 | ||
4040 | ht_hce_ic_error: | |
4041 | and %g1, 0x1ff, %g2 | |
4042 | sllx %g2, 5, %g2 !! index is in bits 10:5 of addr for tag read | |
4043 | sllx %g2, 1, %g1 !! index is in bits 11:6 of addr for data read | |
4044 | ht_hce_ic_rd_tag: | |
4045 | ldxa [%g0+%g2]ASI_IC_TAG, %g3 | |
4046 | mov %g0, %g2 | |
4047 | ht_hce_ic_rd_instr: | |
4048 | ldxa [%g1]ASI_IC_INSTR, %g4 | |
4049 | add %g1, 8, %g1 | |
4050 | cmp %g2, 7 | |
4051 | bl ht_hce_ic_rd_instr | |
4052 | inc %g2 | |
4053 | retry | |
4054 | ||
4055 | ht_hce_sbdpc_error: | |
4056 | and %g1, 0x7, %g3 !! get stb_index | |
4057 | sllx %g3, 3, %g3 | |
4058 | ht_hce_rd_stb_entry_data: | |
4059 | ldxa [%g3]ASI_STB_ACCESS, %g2 | |
4060 | ht_hce_rd_stb_entry_ecc: | |
4061 | or %g3, 0x40, %g3 | |
4062 | ldxa [%g3]ASI_STB_ACCESS, %g2 | |
4063 | ht_hce_rd_stb_entry_addr: | |
4064 | or %g3, 0x80, %g3 | |
4065 | ldxa [%g3]ASI_STB_ACCESS, %g2 | |
4066 | ht_hce_rd_stb_entry_par: | |
4067 | and %g3, 0xbf, %g3 | |
4068 | ldxa [%g3]ASI_STB_ACCESS, %g2 | |
4069 | retry | |
4070 | ||
4071 | !! The sw_recoverable_err trap is taken mostly for uncorrectable errors. | |
4072 | !! Most of these are due to errors on L2c returns. Can't chk much in the | |
4073 | !! trap handler for these. | |
4074 | ||
4075 | sw_recoverable_error_handler: | |
4076 | ht_swe_read_desr: | |
4077 | !! SOC code | |
4078 | setx 0xc03ffff800000000, %g1, %g2 | |
4079 | setx 0xab00000000, %g1, %g3 | |
4080 | stx %g2, [%g3] | |
4081 | !! END SOC code | |
4082 | ldxa [%g0]ASI_DESR, %g1 !! Also clears desr | |
4083 | retry | |
4084 | ||
4085 | store_error_handler: | |
4086 | ht_ste_read_dfesr: | |
4087 | add %g0, DFESR_VA, %g1 | |
4088 | ldxa [%g1]ASI_DFESR, %g2 !! read the DFESR and clear it | |
4089 | !!stxa %g0, [%g1]0x4c !! clear the dfesr | |
4090 | retry | |
4091 | ||
4092 | !! SOC Error Handlers !! | |
4093 | Soc_Recoverable_Sw_error_trap: | |
4094 | #define L2_ES_W1C_VALUE 0xc03ffff800000000 | |
4095 | read_trap_type_Sw: | |
4096 | setx EXECUTED, %l0, %o0 | |
4097 | ! save trap type value | |
4098 | rdpr %tt, %i6 | |
4099 | nop | |
4100 | #ifdef ERR_RANDOM_L2 | |
4101 | mov 0x40, %i7 | |
4102 | cmp %i7, %i6 | |
4103 | #else | |
4104 | mov 0x40, %o1 | |
4105 | cmp %o1, %i6 | |
4106 | #endif | |
4107 | tne %xcc, T_BAD_TRAP | |
4108 | ||
4109 | check_clear_desr_Sw: | |
4110 | ldxa [%g0]ASI_DESR, %i5 !! Also clears desr | |
4111 | setx 0x3f00000000000000, %i6, %i7 | |
4112 | and %i5, %i7, %i5 | |
4113 | #ifdef L2_LDAC_err | |
4114 | setx 0x2400000000000000, %i6, %i7 | |
4115 | #endif | |
4116 | #ifdef L2_LDRC_err | |
4117 | setx 0x3400000000000000, %i6, %i7 | |
4118 | #endif | |
4119 | #ifdef L2_NDDM_err | |
4120 | setx 0x3100000000000000, %i6, %i7 | |
4121 | #endif | |
4122 | #ifdef L2_DWS_err | |
4123 | setx 0x3000000000000000, %i6, %i7 | |
4124 | #endif | |
4125 | cmp %i5, %i7 | |
4126 | tne %xcc, T_BAD_TRAP | |
4127 | nop | |
4128 | #ifdef ERR_RANDOM_L2 | |
4129 | clear_l2esr_Sw: | |
4130 | setx L2_ES_W1C_VALUE, %i5, %i6 | |
4131 | setx L2ES_PA0, %i5, %i7 | |
4132 | stx %i6, [%i7] | |
4133 | membar #Sync | |
4134 | #endif | |
4135 | #ifdef INC_MCU_ERR_REG | |
4136 | #ifdef ERR_RANDOM_L2 | |
4137 | verify_l2_ESR: | |
4138 | setx L2ES_PA0, %5, %i6 | |
4139 | ldx [%i6],%i7 | |
4140 | setx 0x3ffffc00000000,%i5,%i4 | |
4141 | setx 0x20001000000000,%i5,%i6 | |
4142 | and %i7,%i4,%i7 | |
4143 | cmp %i7,%i6 | |
4144 | tne %xcc, T_BAD_TRAP | |
4145 | nop | |
4146 | ||
4147 | clear_mcu_esr_Sw: | |
4148 | setx 0xfe00000000000000, %i5, %i6 | |
4149 | setx 0x8400000280, %i5, %i7 | |
4150 | stx %i6, [%i7] | |
4151 | membar #Sync | |
4152 | #endif | |
4153 | clear_mcu_errinj_reg_Sw: | |
4154 | setx 0x8400000290, %i5, %i6 | |
4155 | stx %g0, [%i6] | |
4156 | #endif | |
4157 | retry | |
4158 | nop | |
4159 | ||
4160 | ||
4161 | Soc_Corrected_Hw_error_trap: | |
4162 | #define L2_ES_W1C_VALUE 0xc03ffff800000000 | |
4163 | read_trap_type_Hw: | |
4164 | setx EXECUTED, %l0, %o0 | |
4165 | ! save trap type value | |
4166 | rdpr %tt, %i5 | |
4167 | nop | |
4168 | #ifdef ERR_RANDOM_L2 | |
4169 | mov 0x63, %i6 | |
4170 | cmp %i5, %i6 | |
4171 | #else | |
4172 | mov 0x63, %o1 | |
4173 | cmp %i5, %o1 | |
4174 | #endif | |
4175 | ||
4176 | tne %xcc, T_BAD_TRAP | |
4177 | ||
4178 | check_clear_desr_Hw: | |
4179 | ldxa [%g0]ASI_DESR, %i6 !! Also clears desr | |
4180 | setx 0x3f00000000000000, %i7, %i5 | |
4181 | and %i6, %i5, %i6 | |
4182 | !#ifdef L2_LDAC_err | |
4183 | ! setx 0x0400000000000000, %i7, %i4 | |
4184 | !#else | |
4185 | setx 0x0900000000000000, %i7, %i4 | |
4186 | !#endif | |
4187 | cmp %i4, %i6 | |
4188 | tne %xcc, T_BAD_TRAP | |
4189 | nop | |
4190 | #ifdef ERR_RANDOM_L2 | |
4191 | verify_L2_esr: | |
4192 | setx L2ES_PA0, %i5, %g1 | |
4193 | ldx [%g1],%i6 | |
4194 | setx 0x3ffffc00000000,%i5,%i4 | |
4195 | and %i6,%i4,%i6 | |
4196 | #ifdef L2_LDAC_err | |
4197 | setx 0x20001000000000,%i5,%i7 | |
4198 | cmp %i6,%i7 | |
4199 | tne %xcc, T_BAD_TRAP | |
4200 | nop | |
4201 | #endif | |
4202 | #ifdef L2_LVC_er | |
4203 | setx 0x1400000000,%i5,%i4 | |
4204 | cmp %i6,%i4 | |
4205 | tne %xcc, T_BAD_TRAP | |
4206 | nop | |
4207 | #endif | |
4208 | #ifdef L2_LTC_er | |
4209 | setx 0x201000000000,%i5,%i4 | |
4210 | cmp %i6,%i4 | |
4211 | tne %xcc, T_BAD_TRAP | |
4212 | nop | |
4213 | #endif | |
4214 | clear_l2esr_Hw: | |
4215 | setx L2_ES_W1C_VALUE, %i5, %i6 | |
4216 | stx %i6, [%g1] | |
4217 | membar #Sync | |
4218 | #endif | |
4219 | ||
4220 | #ifdef INC_MCU_ERR_REG | |
4221 | #ifdef ERR_RANDOM_L2 | |
4222 | ||
4223 | clear_mcu_esr_Hw: | |
4224 | setx 0xfe00000000000000, %i5, %i6 | |
4225 | setx 0x8400000280, %i5, %i7 | |
4226 | stx %i6, [%i7] | |
4227 | membar #Sync | |
4228 | #endif | |
4229 | ||
4230 | clear_mcu_errinj_reg_Hw: | |
4231 | setx 0x8400000290, %i5, %i6 | |
4232 | stx %g0, [%i6] | |
4233 | #endif | |
4234 | retry | |
4235 | nop | |
4236 | ||
4237 | Soc_Precise_data_access_error_trap: | |
4238 | #define L2_ES_W1C_VALUE 0xc03ffff800000000 | |
4239 | read_trap_type_Da: | |
4240 | setx EXECUTED, %l0, %o0 | |
4241 | ! save trap type value | |
4242 | rdpr %tt, %i6 | |
4243 | nop | |
4244 | ||
4245 | mov 0x32, %o1 | |
4246 | cmp %i6, %o1 | |
4247 | tne %xcc, T_BAD_TRAP | |
4248 | ||
4249 | set 0xf, %i5 | |
4250 | mov 0x1,%l7 | |
4251 | check_clear_dsfsr_Da: | |
4252 | add %g0, SFSR_VA, %i7 | |
4253 | ldxa [%i7]ASI_DSFSR, %i6 | |
4254 | #ifdef L2_NDSP_err | |
4255 | set 0x2, %i5 | |
4256 | #else | |
4257 | set 0x1, %i5 | |
4258 | ||
4259 | #endif | |
4260 | cmp %i6,%i5 | |
4261 | tne %xcc, T_BAD_TRAP | |
4262 | stxa %g0, [%i7]ASI_DSFSR | |
4263 | nop | |
4264 | !clear_l2esr_Da: | |
4265 | ! setx L2_ES_W1C_VALUE, %l0, %l1 | |
4266 | ! setx L2ES_PA0, %l6, %g1 | |
4267 | ! stx %l1, [%g1] | |
4268 | ! membar #Sync | |
4269 | #ifdef INC_MCU_ERR_REG | |
4270 | !clear_mcu_esr_Da: | |
4271 | !setx 0xfe00000000000000, %l0, %g4 | |
4272 | ! setx 0x8400000280, %l3, %g5 | |
4273 | ! stx %g4, [%g5] | |
4274 | ! membar #Sync | |
4275 | clear_mcu_errinj_reg_Da: | |
4276 | setx 0x8400000290, %i5, %i6 | |
4277 | stx %g0, [%i6] | |
4278 | #endif | |
4279 | ! retry | |
4280 | done | |
4281 | nop | |
4282 | ||
4283 | !! END Of SOC Error Handlers !! | |
4284 | ||
4285 | ||
4286 | ||
4287 | ||
4288 | .align 128 | |
4289 | exit_sync_thread_start: | |
4290 | rdpr %pstate, %g1 | |
4291 | or %g1, PSTATE_IE_MASK, %g1 | |
4292 | wrpr %g1, %pstate ! Enable interrupts | |
4293 | membar #Sync | |
4294 | exit_sync_thread: | |
4295 | exit_sync_threads | |
4296 | ||
4297 | jmpl %o7+8, %g0 | |
4298 | nop | |
4299 | ||
4300 | ||
4301 | .align 128 | |
4302 | asi_check_start: | |
4303 | #include "spc_por_rdchk.s" | |
4304 | ||
4305 | jmpl %o7+8, %g0 | |
4306 | nop | |
4307 | ||
4308 | .align 128 | |
4309 |