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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / include / trap0x33_hboot.s
CommitLineData
86530b38
AT		 1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: trap0x33_hboot.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
27* available with the language indicating that GPLv2 or any later version
28* may be used, or where a choice of which version of the GPL is applied is
29* otherwise unspecified.
30*
31* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38#ifndef __HBOOT_S__
39#define __HBOOT_S__
40
41#ifdef CONFIG_M4
42#include S2MEM_DEFINES
43#else
44#include "config.m4"
45#endif
46
47#include "constants.h"
48#include "xlate.h"
49
50#ifdef S2MEM_DEFINES
51#include S2MEM_DEFINES
52#else
53#include "defines.h"
54#endif
55
56#ifdef S2MEM_MACROS
57#include S2MEM_MACROS
58#else
59#include "macros.m4"
60#include "macros.h" /* macro from SUN legacy diags */
61#endif
62
63
64.global Power_On_Reset
65
66SECTION .RED_SEC TEXT_VA = 0xfffffffff0000000, DATA_VA = 0xfffffffff0010000
67
68#ifndef ALL_PAGE_CUSTOM_MAP
69attr_text {
70 Name=.RED_SEC,
71 hypervisor
72}
73#endif
74
75#ifndef ALL_PAGE_CUSTOM_MAP
76attr_data {
77 Name=.RED_SEC,
78 hypervisor
79}
80#endif
81
82.text
83
84RESERVED_0: !Should not come here
85 nop
86 nop
87 nop
88 nop
89 nop
90 nop
91 nop
92 nop
93
94Power_On_Reset:
95#ifdef My_Power_On_Reset
96 My_Power_On_Reset
97#else
98 setx HRedmode_Reset_Handler, %g1, %g2
99 jmp %g2
100 nop
101#endif
102
103.align 32
104
105Watchdog_Reset:
106#ifdef My_Watchdog_Reset
107 My_Watchdog_Reset
108#else
109 setx Watchdog_Reset_Handler, %g1, %g2
110 jmp %g2
111 nop
112#endif
113
114
115.align 32
116
117External_Reset:
118#ifdef My_External_Reset
119 My_External_Reset
120#else
121 setx External_Reset_Handler, %g1, %g2
122 jmp %g2
123 nop
124#endif
125
126.align 32
127
128Software_Initiated_Reset:
129#ifdef My_Software_Initiated_Reset
130 My_Software_Initiated_Reset
131#else
132 setx Software_Reset_Handler, %g1, %g2
133 jmp %g2
134 nop
135#endif
136
137.align 32
138
139RED_Mode_Other_Reset:
140#ifdef My_RED_Mode_Other_Reset
141 My_RED_Mode_Other_Reset
142#else
143 nop
144 nop
145 nop
146#endif
147
148
149SECTION .RED_EXT_SEC TEXT_VA = HV_RED_TEXT_PA, DATA_VA = HV_RED_DATA_PA
150
151#ifndef ALL_PAGE_CUSTOM_MAP
152attr_text {
153 Name=.RED_EXT_SEC,
154 hypervisor
155}
156#endif
157
158#ifndef ALL_PAGE_CUSTOM_MAP
159attr_data {
160 Name=.RED_EXT_SEC,
161 hypervisor
162}
163#endif
164
165.text
166
167.global HRedmode_Reset_Handler
168! align HRedmode_Reset_Handler to 0x40020 so that
169! we can have an option to boot straight from DRAM
170! instead of 0xfff0000020
171 nop
172 nop
173 nop
174 nop
175 nop
176 nop
177 nop
178 nop
179HRedmode_Reset_Handler:
180
181#ifdef S2MEM_RED_RESET_HANDLER
182#include S2MEM_RED_RESET_HANDLER
183#else
184#include "trap0x33_hred_reset_handler.s"
185#endif
186
187.global Watchdog_Reset_Handler
188Watchdog_Reset_Handler:
189
190#ifdef S2MEM_WATCHDOG_RESET_HANDLER
191#include S2MEM_WATCHDOG_RESET_HANDLER
192#else
193#include "watchdog_reset_handler.s"
194#endif
195
196.global External_Reset_Handler
197External_Reset_Handler:
198
199#ifdef S2MEM_EXTERNAL_RESET_HANDLER
200#include S2MEM_EXTERNAL_RESET_HANDLER
201#else
202#include "external_reset_handler.s"
203#endif
204
205.global Software_Reset_Handler
206Software_Reset_Handler:
207
208#ifdef S2MEM_SOFTWARE_RESET_HANDLER
209#include S2MEM_SOFTWARE_RESET_HANDLER
210#else
211#include "software_reset_handler.s"
212#endif
213
214.data
215part_id_list:
216 .xword THR_0_PARTID, THR_1_PARTID, THR_2_PARTID, THR_3_PARTID
217 .xword THR_4_PARTID, THR_5_PARTID, THR_6_PARTID, THR_7_PARTID
218 .xword THR_8_PARTID, THR_9_PARTID, THR_10_PARTID, THR_11_PARTID
219 .xword THR_12_PARTID, THR_13_PARTID, THR_14_PARTID, THR_15_PARTID
220 .xword THR_16_PARTID, THR_17_PARTID, THR_18_PARTID, THR_19_PARTID
221 .xword THR_20_PARTID, THR_21_PARTID, THR_22_PARTID, THR_23_PARTID
222 .xword THR_24_PARTID, THR_25_PARTID, THR_26_PARTID, THR_27_PARTID
223 .xword THR_28_PARTID, THR_29_PARTID, THR_30_PARTID, THR_31_PARTID
224 .xword THR_32_PARTID, THR_33_PARTID, THR_34_PARTID, THR_35_PARTID
225 .xword THR_36_PARTID, THR_37_PARTID, THR_38_PARTID, THR_39_PARTID
226 .xword THR_40_PARTID, THR_41_PARTID, THR_42_PARTID, THR_43_PARTID
227 .xword THR_44_PARTID, THR_45_PARTID, THR_46_PARTID, THR_47_PARTID
228 .xword THR_48_PARTID, THR_49_PARTID, THR_50_PARTID, THR_51_PARTID
229 .xword THR_52_PARTID, THR_53_PARTID, THR_54_PARTID, THR_55_PARTID
230 .xword THR_56_PARTID, THR_57_PARTID, THR_58_PARTID, THR_59_PARTID
231 .xword THR_60_PARTID, THR_61_PARTID, THR_62_PARTID, THR_63_PARTID
232
233.global partition_base_list
234partition_base_list:
235 .xword PART_0_BASE, PART_1_BASE, PART_2_BASE, PART_3_BASE
236 .xword PART_4_BASE, PART_5_BASE, PART_6_BASE, PART_7_BASE
237
238tsb_config_base_list:
239 .xword part_0_z_tsb_config_0, part_0_nz_tsb_config_0
240 .xword part_0_z_tsb_config_1, part_0_nz_tsb_config_1
241 .xword part_0_z_tsb_config_2, part_0_nz_tsb_config_2
242 .xword part_0_z_tsb_config_3, part_0_nz_tsb_config_3
243 .xword 0x0, 0x0
244 .xword part_1_z_tsb_config_0, part_1_nz_tsb_config_0
245 .xword part_1_z_tsb_config_1, part_1_nz_tsb_config_1
246 .xword part_1_z_tsb_config_2, part_1_nz_tsb_config_2
247 .xword part_1_z_tsb_config_3, part_1_nz_tsb_config_3
248 .xword 0x0, 0x0
249 .xword part_2_z_tsb_config_0, part_2_nz_tsb_config_0
250 .xword part_2_z_tsb_config_1, part_2_nz_tsb_config_1
251 .xword part_2_z_tsb_config_2, part_2_nz_tsb_config_2
252 .xword part_2_z_tsb_config_3, part_2_nz_tsb_config_3
253 .xword 0x0, 0x0
254 .xword part_3_z_tsb_config_0, part_3_nz_tsb_config_0
255 .xword part_3_z_tsb_config_1, part_3_nz_tsb_config_1
256 .xword part_3_z_tsb_config_2, part_3_nz_tsb_config_2
257 .xword part_3_z_tsb_config_3, part_3_nz_tsb_config_3
258 .xword 0x0, 0x0
259 .xword part_4_z_tsb_config_0, part_4_nz_tsb_config_0
260 .xword part_4_z_tsb_config_1, part_4_nz_tsb_config_1
261 .xword part_4_z_tsb_config_2, part_4_nz_tsb_config_2
262 .xword part_4_z_tsb_config_3, part_4_nz_tsb_config_3
263 .xword 0x0, 0x0
264 .xword part_5_z_tsb_config_0, part_5_nz_tsb_config_0
265 .xword part_5_z_tsb_config_1, part_5_nz_tsb_config_1
266 .xword part_5_z_tsb_config_2, part_5_nz_tsb_config_2
267 .xword part_5_z_tsb_config_3, part_5_nz_tsb_config_3
268 .xword 0x0, 0x0
269 .xword part_6_z_tsb_config_0, part_6_nz_tsb_config_0
270 .xword part_6_z_tsb_config_1, part_6_nz_tsb_config_1
271 .xword part_6_z_tsb_config_2, part_6_nz_tsb_config_2
272 .xword part_6_z_tsb_config_3, part_6_nz_tsb_config_3
273 .xword 0x0, 0x0
274 .xword part_7_z_tsb_config_0, part_7_nz_tsb_config_0
275 .xword part_7_z_tsb_config_1, part_7_nz_tsb_config_1
276 .xword part_7_z_tsb_config_2, part_7_nz_tsb_config_2
277 .xword part_7_z_tsb_config_3, part_7_nz_tsb_config_3
278 .xword 0x0, 0x0
279
280sync_thr_counter:
281 .xword 0x0
282
283SECTION .HPRIV_RESET TEXT_VA=PRIV_RESET_VA
284#ifndef ALL_PAGE_CUSTOM_MAP
285changequote([, ])dnl
286forloop([i], 0, 7, [
287ifdef([part_]i[_used],[
288attr_text {
289 Name = .HPRIV_RESET,
290 RA = PRIV_RESET_RA,
291 PA = ra2pa2(PRIV_RESET_RA,i),
292 [part_]i[_ctx_nonzero_tsb_config_0],
293 [part_]i[_ctx_zero_tsb_config_0],
294 TTE_G=1, TTE_Context=0, TTE_V=1, TTE_Size=0, TTE_NFO=0, TTE_IE=0,
295 TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, TTE_L=0, TTE_CP=1, TTE_CV=0,
296 TTE_E=0, TTE_P=1, TTE_W=1
297 }
298])dnl
299])dnl
300changequote(`,')dnl'
301#endif
302
303.global HPriv_Reset_Handler
304
305HPriv_Reset_Handler:
306
307#ifdef S2MEM_PRIV_RESET_HANDLER
308#include S2MEM_PRIV_RESET_HANDLER
309#else
310#include "hpriv_reset_handler.s"
311#endif
312
313SECTION .HTRAPS TEXT_VA=HV_TRAP_BASE_PA, DATA_VA=HV_TRAP_DATA_PA
314#ifndef ALL_PAGE_CUSTOM_MAP
315attr_text {
316 Name = .HTRAPS,
317 hypervisor,
318 }
319attr_data {
320 Name = .HTRAPS,
321 hypervisor,
322 }
323#endif
324
325#include "htraps.s"
326
327#ifndef NO_DECLARE_TSB
328#ifndef GOLDFINGER
329
330#ifdef PART_0_USED
331SECTION .PART_0_CTX_ZERO_TSB_0 DATA_VA=PART0_Z_ADDR_0
332#ifndef ALL_PAGE_CUSTOM_MAP
333attr_data {
334 Name = .PART_0_CTX_ZERO_TSB_0,
335 hypervisor
336 }
337#endif
338SECTION .PART_0_CTX_NONZERO_TSB__0 DATA_VA=PART0_NZ_ADDR_0
339#ifndef ALL_PAGE_CUSTOM_MAP
340attr_data {
341 Name = .PART_0_CTX_NONZERO_TSB_0,
342 hypervisor
343 }
344#endif
345SECTION .PART_0_CTX_ZERO_TSB_0 DATA_VA=PART0_Z_ADDR_0
346#ifndef ALL_PAGE_CUSTOM_MAP
347attr_data {
348 Name = .PART_0_CTX_ZERO_TSB_0,
349 hypervisor
350 }
351#endif
352SECTION .PART_0_CTX_NONZERO_TSB_0 DATA_VA=PART0_NZ_ADDR_0
353#ifndef ALL_PAGE_CUSTOM_MAP
354attr_data {
355 Name = .PART_0_CTX_NONZERO_TSB_0,
356 hypervisor
357 }
358#endif
359
360SECTION .PART_0_CTX_ZERO_TSB_1 DATA_VA=PART0_Z_ADDR_1
361#ifndef ALL_PAGE_CUSTOM_MAP
362attr_data {
363 Name = .PART_0_CTX_ZERO_TSB_1,
364 hypervisor
365 }
366#endif
367SECTION .PART_0_CTX_NONZERO_TSB_1 DATA_VA=PART0_NZ_ADDR_1
368#ifndef ALL_PAGE_CUSTOM_MAP
369attr_data {
370 Name = .PART_0_CTX_NONZERO_TSB_1,
371 hypervisor
372 }
373#endif
374SECTION .PART_0_CTX_ZERO_TSB_1 DATA_VA=PART0_Z_ADDR_1
375#ifndef ALL_PAGE_CUSTOM_MAP
376attr_data {
377 Name = .PART_0_CTX_ZERO_TSB_1,
378 hypervisor
379 }
380#endif
381SECTION .PART_0_CTX_NONZERO_TSB_1 DATA_VA=PART0_NZ_ADDR_1
382#ifndef ALL_PAGE_CUSTOM_MAP
383attr_data {
384 Name = .PART_0_CTX_NONZERO_TSB_1,
385 hypervisor
386 }
387#endif
388SECTION .PART_0_TSB_LINK DATA_VA=PART_0_LINK_AREA_BASE_ADDR
389#ifndef ALL_PAGE_CUSTOM_MAP
390attr_data {
391 Name = .PART_0_TSB_LINK,
392 hypervisor
393 }
394#endif
395#endif
396
397#ifdef PART_1_USED
398SECTION .PART_1_CTX_ZERO_TSB_0 DATA_VA=PART1_Z_ADDR_0
399#ifndef ALL_PAGE_CUSTOM_MAP
400attr_data {
401 Name = .PART_1_CTX_ZERO_TSB_0,
402 hypervisor
403 }
404#endif
405SECTION .PART_1_CTX_NONZERO_TSB_0 DATA_VA=PART1_NZ_ADDR_0
406#ifndef ALL_PAGE_CUSTOM_MAP
407attr_data {
408 Name = .PART_1_CTX_NONZERO_TSB_0,
409 hypervisor
410 }
411#endif
412SECTION .PART_1_CTX_ZERO_TSB_0 DATA_VA=PART1_Z_ADDR_0
413#ifndef ALL_PAGE_CUSTOM_MAP
414attr_data {
415 Name = .PART_1_CTX_ZERO_TSB_0,
416 hypervisor
417 }
418#endif
419SECTION .PART_1_CTX_NONZERO_TSB_0 DATA_VA=PART1_NZ_ADDR_0
420#ifndef ALL_PAGE_CUSTOM_MAP
421attr_data {
422 Name = .PART_1_CTX_NONZERO_TSB_0,
423 hypervisor
424 }
425#endif
426SECTION .PART_1_TSB_LINK DATA_VA=PART_1_LINK_AREA_BASE_ADDR
427#ifndef ALL_PAGE_CUSTOM_MAP
428attr_data {
429 Name = .PART_1_TSB_LINK,
430 hypervisor
431 }
432#endif
433#endif
434
435#ifdef PART_2_USED
436SECTION .PART_2_CTX_ZERO_TSB_0 DATA_VA=PART2_Z_ADDR_0
437#ifndef ALL_PAGE_CUSTOM_MAP
438attr_data {
439 Name = .PART_2_CTX_ZERO_TSB_0,
440 hypervisor
441 }
442#endif
443SECTION .PART_2_CTX_NONZERO_TSB_0 DATA_VA=PART2_NZ_ADDR_0
444#ifndef ALL_PAGE_CUSTOM_MAP
445attr_data {
446 Name = .PART_2_CTX_NONZERO_TSB_0,
447 hypervisor
448 }
449#endif
450SECTION .PART_2_CTX_ZERO_TSB_0 DATA_VA=PART2_Z_ADDR_0
451#ifndef ALL_PAGE_CUSTOM_MAP
452attr_data {
453 Name = .PART_2_CTX_ZERO_TSB_0,
454 hypervisor
455 }
456#endif
457SECTION .PART_2_CTX_NONZERO_TSB_0 DATA_VA=PART2_NZ_ADDR_0
458#ifndef ALL_PAGE_CUSTOM_MAP
459attr_data {
460 Name = .PART_2_CTX_NONZERO_TSB_0,
461 hypervisor
462 }
463#endif
464SECTION .PART_2_TSB_LINK DATA_VA=PART_2_LINK_AREA_BASE_ADDR
465#ifndef ALL_PAGE_CUSTOM_MAP
466attr_data {
467 Name = .PART_2_TSB_LINK,
468 hypervisor
469 }
470#endif
471#endif
472
473#ifdef PART_3_USED
474SECTION .PART_3_CTX_ZERO_TSB_0 DATA_VA=PART3_Z_ADDR_0
475#ifndef ALL_PAGE_CUSTOM_MAP
476attr_data {
477 Name = .PART_3_CTX_ZERO_TSB_0,
478 hypervisor
479 }
480#endif
481SECTION .PART_3_CTX_NONZERO_TSB_0 DATA_VA=PART3_NZ_ADDR_0
482#ifndef ALL_PAGE_CUSTOM_MAP
483attr_data {
484 Name = .PART_3_CTX_NONZERO_TSB_0,
485 hypervisor
486 }
487#endif
488SECTION .PART_3_CTX_ZERO_TSB_0 DATA_VA=PART3_Z_ADDR_0
489#ifndef ALL_PAGE_CUSTOM_MAP
490attr_data {
491 Name = .PART_3_CTX_ZERO_TSB_0,
492 hypervisor
493 }
494#endif
495SECTION .PART_3_CTX_NONZERO_TSB_0 DATA_VA=PART3_NZ_ADDR_0
496#ifndef ALL_PAGE_CUSTOM_MAP
497attr_data {
498 Name = .PART_3_CTX_NONZERO_TSB_0,
499 hypervisor
500 }
501#endif
502SECTION .PART_3_TSB_LINK DATA_VA=PART_3_LINK_AREA_BASE_ADDR
503#ifndef ALL_PAGE_CUSTOM_MAP
504attr_data {
505 Name = .PART_3_TSB_LINK,
506 hypervisor
507 }
508#endif
509#endif
510
511#ifdef PART_4_USED
512SECTION .PART_4_CTX_ZERO_TSB_0 DATA_VA=PART4_Z_ADDR_0
513#ifndef ALL_PAGE_CUSTOM_MAP
514attr_data {
515 Name = .PART_4_CTX_ZERO_TSB_0,
516 hypervisor
517 }
518#endif
519SECTION .PART_4_CTX_NONZERO_TSB_0 DATA_VA=PART4_NZ_ADDR_0
520#ifndef ALL_PAGE_CUSTOM_MAP
521attr_data {
522 Name = .PART_4_CTX_NONZERO_TSB_0,
523 hypervisor
524 }
525#endif
526SECTION .PART_4_CTX_ZERO_TSB_0 DATA_VA=PART4_Z_ADDR_0
527#ifndef ALL_PAGE_CUSTOM_MAP
528attr_data {
529 Name = .PART_4_CTX_ZERO_TSB_0,
530 hypervisor
531 }
532#endif
533SECTION .PART_4_CTX_NONZERO_TSB_0 DATA_VA=PART4_NZ_ADDR_0
534#ifndef ALL_PAGE_CUSTOM_MAP
535attr_data {
536 Name = .PART_4_CTX_NONZERO_TSB_0,
537 hypervisor
538 }
539#endif
540SECTION .PART_4_TSB_LINK DATA_VA=PART_4_LINK_AREA_BASE_ADDR
541#ifndef ALL_PAGE_CUSTOM_MAP
542attr_data {
543 Name = .PART_4_TSB_LINK,
544 hypervisor
545 }
546#endif
547#endif
548
549#ifdef PART_5_USED
550SECTION .PART_5_CTX_ZERO_TSB_0 DATA_VA=PART5_Z_ADDR_0
551#ifndef ALL_PAGE_CUSTOM_MAP
552attr_data {
553 Name = .PART_5_CTX_ZERO_TSB_0,
554 hypervisor
555 }
556#endif
557SECTION .PART_5_CTX_NONZERO_TSB_0 DATA_VA=PART5_NZ_ADDR_0
558#ifndef ALL_PAGE_CUSTOM_MAP
559attr_data {
560 Name = .PART_5_CTX_NONZERO_TSB_0,
561 hypervisor
562 }
563#endif
564SECTION .PART_5_CTX_ZERO_TSB_0 DATA_VA=PART5_Z_ADDR_0
565#ifndef ALL_PAGE_CUSTOM_MAP
566attr_data {
567 Name = .PART_5_CTX_ZERO_TSB_0,
568 hypervisor
569 }
570#endif
571SECTION .PART_5_CTX_NONZERO_TSB_0 DATA_VA=PART5_NZ_ADDR_0
572#ifndef ALL_PAGE_CUSTOM_MAP
573attr_data {
574 Name = .PART_5_CTX_NONZERO_TSB_0,
575 hypervisor
576 }
577#endif
578SECTION .PART_5_TSB_LINK DATA_VA=PART_5_LINK_AREA_BASE_ADDR
579#ifndef ALL_PAGE_CUSTOM_MAP
580attr_data {
581 Name = .PART_5_TSB_LINK,
582 hypervisor
583 }
584#endif
585#endif
586
587#ifdef PART_6_USED
588SECTION .PART_6_CTX_ZERO_TSB_0 DATA_VA=PART6_Z_ADDR_0
589#ifndef ALL_PAGE_CUSTOM_MAP
590attr_data {
591 Name = .PART_6_CTX_ZERO_TSB_0,
592 hypervisor
593 }
594#endif
595SECTION .PART_6_CTX_NONZERO_TSB_0 DATA_VA=PART6_NZ_ADDR_0
596#ifndef ALL_PAGE_CUSTOM_MAP
597attr_data {
598 Name = .PART_6_CTX_NONZERO_TSB_0,
599 hypervisor
600 }
601#endif
602SECTION .PART_6_CTX_ZERO_TSB_0 DATA_VA=PART6_Z_ADDR_0
603#ifndef ALL_PAGE_CUSTOM_MAP
604attr_data {
605 Name = .PART_6_CTX_ZERO_TSB_0,
606 hypervisor
607 }
608#endif
609SECTION .PART_6_CTX_NONZERO_TSB_0 DATA_VA=PART6_NZ_ADDR_0
610#ifndef ALL_PAGE_CUSTOM_MAP
611attr_data {
612 Name = .PART_6_CTX_NONZERO_TSB_0,
613 hypervisor
614 }
615#endif
616SECTION .PART_6_TSB_LINK DATA_VA=PART_6_LINK_AREA_BASE_ADDR
617#ifndef ALL_PAGE_CUSTOM_MAP
618attr_data {
619 Name = .PART_6_TSB_LINK,
620 hypervisor
621 }
622#endif
623#endif
624
625#ifdef PART_7_USED
626SECTION .PART_7_CTX_ZERO_TSB_0 DATA_VA=PART7_Z_ADDR_0
627#ifndef ALL_PAGE_CUSTOM_MAP
628attr_data {
629 Name = .PART_7_CTX_ZERO_TSB_0,
630 hypervisor
631 }
632#endif
633SECTION .PART_7_CTX_NONZERO_TSB_0 DATA_VA=PART7_NZ_ADDR_0
634#ifndef ALL_PAGE_CUSTOM_MAP
635attr_data {
636 Name = .PART_7_CTX_NONZERO_TSB_0,
637 hypervisor
638 }
639#endif
640SECTION .PART_7_CTX_ZERO_TSB_0 DATA_VA=PART7_Z_ADDR_0
641#ifndef ALL_PAGE_CUSTOM_MAP
642attr_data {
643 Name = .PART_7_CTX_ZERO_TSB_0,
644 hypervisor
645 }
646#endif
647SECTION .PART_7_CTX_NONZERO_TSB_0 DATA_VA=PART7_NZ_ADDR_0
648#ifndef ALL_PAGE_CUSTOM_MAP
649attr_data {
650 Name = .PART_7_CTX_NONZERO_TSB_0,
651 hypervisor
652 }
653#endif
654SECTION .PART_7_TSB_LINK DATA_VA=PART_7_LINK_AREA_BASE_ADDR
655#ifndef ALL_PAGE_CUSTOM_MAP
656attr_data {
657 Name = .PART_7_TSB_LINK,
658 hypervisor
659 }
660#endif
661#endif
662#endif
663#endif
664
665
666SECTION .TRAPS TEXT_VA=TRAP_BASE_VA, DATA_VA=TRAP_DATA_VA
667#ifndef ALL_PAGE_CUSTOM_MAP
668changequote([, ])dnl
669forloop([i], 0, 7, [
670ifdef([part_]i[_used],[
671attr_text {
672 Name = .TRAPS,
673 RA = TRAP_BASE_RA,
674 PA = ra2pa2(TRAP_BASE_RA,i),
675 [part_]i[_ctx_zero_tsb_config_0],
676 TTE_G=1, TTE_Context=0, TTE_V=1, TTE_Size=0, TTE_NFO=0, TTE_IE=0,
677 TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, TTE_L=0, TTE_CP=1, TTE_CV=0,
678 TTE_E=0, TTE_P=1, TTE_W=1
679 }
680attr_data {
681 Name = .TRAPS,
682 RA = TRAP_DATA_RA,
683 PA = ra2pa2(TRAP_DATA_RA,i),
684 [part_]i[_ctx_zero_tsb_config_0],
685 TTE_G=1, TTE_Context=0, TTE_V=1, TTE_Size=0, TTE_NFO=0, TTE_IE=0,
686 TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, TTE_L=0, TTE_CP=1, TTE_CV=0,
687 TTE_E=0, TTE_P=1, TTE_W=1
688 }
689])dnl
690])dnl
691changequote(`,')dnl'
692#endif
693
694#include "traps.s"
695
696
697
698SECTION .KERNEL TEXT_VA = KERNEL_BASE_TEXT_VA, DATA_VA=KERNEL_BASE_DATA_VA
699#ifndef ALL_PAGE_CUSTOM_MAP
700changequote([, ])dnl
701forloop([i], 0, 7, [
702ifdef([part_]i[_used],[
703attr_text {
704 Name = .KERNEL,
705 RA = KERNEL_BASE_TEXT_RA,
706 PA = ra2pa2(KERNEL_BASE_TEXT_RA,i),
707 [part_]i[_ctx_nonzero_tsb_config_0],
708 [part_]i[_ctx_zero_tsb_config_0],
709 TTE_G=1, TTE_Context=0, TTE_V=1, TTE_Size=0, TTE_NFO=0, TTE_IE=0,
710 TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, TTE_L=0, TTE_CP=1, TTE_CV=0,
711 TTE_E=0, TTE_P=1, TTE_W=1
712 }
713
714attr_data {
715 Name = .KERNEL,
716 RA=KERNEL_BASE_DATA_RA,
717 PA=ra2pa2(KERNEL_BASE_DATA_RA,i),
718 [part_]i[_ctx_nonzero_tsb_config_0],
719 [part_]i[_ctx_zero_tsb_config_0],
720 TTE_G=1, TTE_Context=0, TTE_V=1, TTE_Size=0, TTE_NFO=0,
721 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
722 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=1, TTE_W=1
723 }
724])dnl
725])dnl
726changequote(`,')dnl'
727#endif
728
729.text
730
731kernel:
732 ! set trap base addr
733 setx TRAP_BASE_VA, %l0, %l7
734 wrpr %l7, %g0, %tba
735
736 ! setup %g7 to point to per thread user data scratchpad
737 rdth_id_p ! get thread ID in %o1
738 mov %o1, %o5 ! save in %o5 to be used later
739 sllx %o1, 7, %o1
740 setx user_globals, %g1, %g7
741 add %g7, %o1, %g7
742
743 ! setup user heap pointer
744 setx heapptr, %g1, %g2
745 setx user_heap_start, %g1, %g3
746 stx %g3, [%g2]
747
748 ! init context regs
749 setx PCONTEXT, %l0, %o1
750 setx SCONTEXT, %l0, %o2
751#if !defined(USER_PAGE_CUSTOM_MAP) && defined(USER_TEXT_MT_MAP)
752 add %o1, %o5, %o1 ! add thread id to contexts
753 add %o2, %o5, %o2
754#endif
755#ifndef USER_PAGE_CUSTOM_MAP
756 mov 0x0, %o3 ! go to non-priv code
757#else
758 mov 0x1, %o3 ! go to priv code
759#endif
760 mov 0x0, %o4 ! set hpriv to zero
761 setx start_label_list, %g1, %g2
762 sllx %o5, 3, %o5 ! offset - start_label_list
763 ldx [%g2 + %o5], %o5 ! %o5 contains start_label
764 ta T_CHANGE_CTX
765 nop
766
767#include "kernel_handler.s"
768
769!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
770
771#ifndef USER_PAGE_CUSTOM_MAP
772#ifndef ALL_PAGE_CUSTOM_MAP
773changequote([, ])dnl
774forloop([i], 0, M4_user_text_idx, [
775#ifndef USER_TEXT_MT_MAP
776SECTION .MAIN TEXT_VA=MAIN_BASE_TEXT_VA, DATA_VA=MAIN_BASE_DATA_VA, BSS_VA=MAIN_BASE_BSS_VA
777#else
778SECTION [.MAIN]i TEXT_VA=[0x]mpeval(MAIN_BASE_TEXT_VA + i * USER_PAGE_INCR, 16), DATA_VA=[0x]mpeval(MAIN_BASE_DATA_VA + i * USER_PAGE_INCR, 16), BSS_VA=[0x]mpeval(MAIN_BASE_BSS_VA + i * USER_PAGE_INCR, 16)
779#endif
780attr_text {
781#ifndef USER_TEXT_MT_MAP
782 Name = .MAIN,
783#else
784 Name = [.MAIN]i,
785#endif
786 VA= [0x]mpeval(MAIN_BASE_TEXT_VA + i * USER_PAGE_INCR, 16),
787 RA= [0x]mpeval(MAIN_BASE_TEXT_RA + i * USER_PAGE_INCR, 16),
788 PA= ra2pa2([0x]mpeval(MAIN_BASE_TEXT_RA + i * USER_PAGE_INCR, 16),tid2pid(i)),
789 [part_]tid2pid(i)[_ctx_nonzero_tsb_config_0],
790#ifdef MAIN_PAGE_NUCLEUS_ALSO
791 [part_]tid2pid(i)[_ctx_zero_tsb_config_0],
792#endif
793#ifdef MAIN_TEXT_DATA_ALSO
794 [part_]tid2pid(i)[_ctx_nonzero_tsb_config_0],
795#endif
796#ifdef MAIN_TEXT_PAGE_NUCLEUS_DATA_ALSO
797 [part_]tid2pid(i)[_ctx_zero_tsb_config_0],
798#endif
799 TTE_G=1, TTE_Context=[0x]eval(PCONTEXT + i, 16), TTE_V=1, TTE_Size=0, TTE_NFO=0,
800 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
801 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1
802 }
803])dnl
804#ifdef MAIN_PAGE_HV_ALSO
805forloop([i], 0, M4_user_text_idx, [
806attr_text {
807#ifndef USER_TEXT_MT_MAP
808 Name = .MAIN,
809#else
810 Name = [.MAIN]i,
811#endif
812 VA= [0x]mpeval(MAIN_BASE_TEXT_VA + i * USER_PAGE_INCR, 16),
813 hypervisor
814 }
815])dnl
816#endif
817forloop([i], 0, M4_user_data_idx, [
818attr_data {
819#ifndef USER_TEXT_MT_MAP
820 Name = .MAIN,
821#else
822 Name = [.MAIN]i,
823#endif
824 VA= [0x]mpeval(MAIN_BASE_DATA_VA + i * USER_PAGE_INCR, 16),
825 RA= [0x]mpeval(MAIN_BASE_DATA_RA + i * USER_PAGE_INCR, 16),
826 PA= ra2pa2([0x]mpeval(MAIN_BASE_DATA_RA + i * USER_PAGE_INCR, 16),tid2pid(i)),
827 [part_]tid2pid(i)[_ctx_nonzero_tsb_config_0],
828#ifdef MAIN_PAGE_NUCLEUS_ALSO
829 [part_]tid2pid(i)[_ctx_zero_tsb_config_0],
830#endif
831#ifdef MAIN_DATA_TEXT_ALSO
832 [part_]tid2pid(i)[_ctx_nonzero_tsb_config_0],
833#endif
834 TTE_G=1, TTE_Context=[0x]eval(PCONTEXT + i, 16), TTE_V=1, TTE_Size=0, TTE_NFO=0,
835 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
836 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1
837 }
838])dnl
839#ifdef MAIN_PAGE_HV_ALSO
840forloop([i], 0, M4_user_data_idx, [
841attr_data {
842#ifndef USER_TEXT_MT_MAP
843 Name = .MAIN,
844#else
845 Name = [.MAIN]i,
846#endif
847 VA= [0x]mpeval(MAIN_BASE_DATA_VA + i * USER_PAGE_INCR, 16),
848 hypervisor
849 }
850])dnl
851#endif
852forloop([i], 0, M4_user_data_idx, [
853attr_bss {
854#ifndef USER_TEXT_MT_MAP
855 Name = .MAIN,
856#else
857 Name = [.MAIN]i,
858#endif
859 VA= [0x]mpeval(MAIN_BASE_BSS_VA + i * USER_PAGE_INCR, 16),
860 RA= [0x]mpeval(MAIN_BASE_BSS_RA + i * USER_PAGE_INCR, 16),
861 PA= ra2pa2([0x]mpeval(MAIN_BASE_BSS_RA + i * USER_PAGE_INCR, 16),tid2pid(i)),
862 [part_]tid2pid(i)[_ctx_nonzero_tsb_config_0],
863 TTE_G=0, TTE_Context=[0x]eval(PCONTEXT + i, 16), TTE_V=1, TTE_Size=0, TTE_NFO=0,
864 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
865 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1
866 }
867])dnl
868
869changequote(`,')dnl'
870#endif
871#endif
872
873#ifdef USE_STACK
874changequote([, ])dnl
875forloop([i], 0, eval(THREAD_COUNT-1), [
876SECTION [.STACK]eval(i*THREAD_STRIDE) BSS_VA= [0x]mpeval(STACK_BASE_VA + i * THREAD_STRIDE * USER_PAGE_INCR, 16)
877
878attr_bss {
879 NAME=[.STACK]eval(i*THREAD_STRIDE),
880 VA=[0x]mpeval(STACK_BASE_VA + i * THREAD_STRIDE * USER_PAGE_INCR, 16),
881 RA=[0x]mpeval(STACK_BASE_RA + i * THREAD_STRIDE * USER_PAGE_INCR, 16),
882 PA=ra2pa2([0x]mpeval(STACK_BASE_RA + i * THREAD_STRIDE * USER_PAGE_INCR, 16), tid2pid(eval(i*THREAD_STRIDE))),
883 [part_]tid2pid(eval(i*THREAD_STRIDE))[_ctx_nonzero_tsb_config_0],
884 TTE_G=1, TTE_Context=PCONTEXT,
885 TTE_V=1, TTE_Size=0, TTE_NFO=0,
886 TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0,
887 TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1
888 }
889.section .bss
890.global [stack]eval(i*THREAD_STRIDE)
891[stack]eval(i*THREAD_STRIDE):
892 .skip STACKSIZE
893
894])dnl
895changequote(`,')dnl'
896#endif ! ifdef USE_STACK
897#endif /* __HBOOT_S__ */
Full OpenSPARC design & verification tarball including full HDL.