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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: isa3_1215ivtrap.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define PORTABLE_CORE | |
39 | ||
40 | #define MAIN_PAGE_HV_ALSO | |
41 | #define MAIN_PAGE_NUCLEUS_ALSO | |
42 | ||
43 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
44 | !Override trap handler definitions | |
45 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
46 | ||
47 | #include "asi_s.h" | |
48 | ||
49 | ! Interrupt trap handler | |
50 | ! Compare ASI_SWVR_INTR_R with %l1 (TID) | |
51 | ||
52 | #define H_HT0_Interrupt_0x60 | |
53 | #define My_HT0_Interrupt_0x60 \ | |
54 | ba trap_0x60_ext;\ | |
55 | nop;nop;nop;nop;nop;nop;nop | |
56 | ||
57 | ||
58 | #define THREAD_COUNT 8 | |
59 | #define THREAD_STRIDE 1 | |
60 | #include "hboot.s" | |
61 | ||
62 | /************************************************************************ | |
63 | Test case code start | |
64 | ************************************************************************/ | |
65 | ||
66 | .text | |
67 | .global main | |
68 | ||
69 | main: /* test begin */ | |
70 | ||
71 | th_fork(main_t); | |
72 | ||
73 | EXIT_BAD | |
74 | ||
75 | main_t_0: | |
76 | ||
77 | ! signal that thread has gotten here (started). | |
78 | mov 0xff, %g2 | |
79 | setx user_data_start, %g1, %l7 | |
80 | stb %g2, [%l7 + %o1] | |
81 | ||
82 | ! master waits for other threads to be ready | |
83 | setx user_data_start, %g1, %l7 | |
84 | master_waiting: | |
85 | ldx [%l7], %g2 | |
86 | cmp %g2, 0xffffffffffffffff | |
87 | bne master_waiting | |
88 | nop | |
89 | ||
90 | ||
91 | ta T_CHANGE_HPRIV | |
92 | ||
93 | ! Save %l2 = TID+1 | |
94 | ! Save %l4 as expected receive vector | |
95 | ! | |
96 | add %o1,1, %l2 | |
97 | mov 1, %g1 | |
98 | sllx %g1, %l2, %l4 | |
99 | ||
100 | clear_intr_recv: | |
101 | stxa %g0, [%g0] ASI_SWVR_INTR_RECEIVE | |
102 | mov 7, %l1 ! TID | |
103 | ||
104 | gen_next_intr: | |
105 | sllx %l1, 8, %l3 ! Send TID+1 as vector | |
106 | or %l3, %l1, %l3 | |
107 | inc %l3 | |
108 | ||
109 | send_int: | |
110 | stxa %l3, [%g0] ASI_SWVR_INTR_W | |
111 | brnz %l1, gen_next_intr | |
112 | dec %l1 | |
113 | ||
114 | mov 1000, %g1 | |
115 | loop_wait_for_awhile: | |
116 | bnz loop_wait_for_awhile | |
117 | dec %g1 | |
118 | ||
119 | EXIT_BAD | |
120 | ||
121 | main_t_1: | |
122 | main_t_2: | |
123 | main_t_3: | |
124 | main_t_4: | |
125 | main_t_5: | |
126 | main_t_6: | |
127 | main_t_7: | |
128 | ||
129 | ! Save %l2 = TID+1 | |
130 | ! Save %l4 as expected receive vector | |
131 | add %o1,1, %l2 | |
132 | mov 1, %g1 | |
133 | sllx %g1, %l2, %l4 | |
134 | ||
135 | ! signal that thread has gotten here (started). | |
136 | mov 0xff, %g2 | |
137 | setx user_data_start, %g1, %l7 | |
138 | stb %g2, [%l7 + %o1] | |
139 | ||
140 | loop_wait_for_int: | |
141 | mov 0, %g1 | |
142 | b loop_wait_for_int | |
143 | add %g1, 1, %g1 | |
144 | ||
145 | ||
146 | /************************************************************************ | |
147 | Test case data start | |
148 | ************************************************************************/ | |
149 | .data | |
150 | user_data_start: | |
151 | .word 0xB52E8698 | |
152 | .end | |
153 | ||
154 | ||
155 | SECTION .HTRAPS | |
156 | .text | |
157 | ||
158 | trap_0x60_ext: | |
159 | ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g1 ;\ | |
160 | cmp %g1, %l4 ;\ | |
161 | tne T_BAD_TRAP ;\ | |
162 | ldxa [%g0] ASI_SWVR_INTR_R, %g2 ;\ | |
163 | cmp %g2, %l2 ;\ | |
164 | tne T_BAD_TRAP ;\ | |
165 | ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g1 ;\ | |
166 | cmp %g1, %l4 ;\ | |
167 | te T_BAD_TRAP ;\ | |
168 | ta T_GOOD_TRAP; \ | |
169 | nop; | |
170 |