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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / niu / NIU_Rx / rx_p0p1_MULTI_6DMA_rand_77.s
CommitLineData
86530b38
AT		 1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: rx_p0p1_MULTI_6DMA_rand_77.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
27* available with the language indicating that GPLv2 or any later version
28* may be used, or where a choice of which version of the GPL is applied is
29* otherwise unspecified.
30*
31* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38#define MAIN_PAGE_HV_ALSO
39
40#include "hboot.s"
41#include "niu_defines.h"
42#define FAIR_PKT_COUNT ((RXMAC_PKTCNT) - (RXMAC_PKTCNT%8))
43
44.text
45.global main
46
47main:
48 ta T_CHANGE_HPRIV
49 nop
50# 94 "diag.j.pp"
51!
52! Thread 0 Start
53!
54!
55!@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
56! Init DMA Channel 0 @@@@@@@@@@@@@@@@@@@@@@@@@@@@
57!@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
58
59P_NIU_RxInitDma_0:
60 setx TX_CS, %g1, %g2
61 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_NIU_RxInitDma_0)) -> NIU_InitRxDma(0, RX_DESC_RING_LENGTH, RX_COMPL_RING_LEN, RBR_CONFIG_B_DATA, RX_INITIAL_KICK, 0x0, NIU_RX_MULTI_DMA)
62 setx 0x5, %g1, %g4
63delay_loop_Rx_0:
64 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
65 nop
66 nop
67 nop
68 nop
69 dec %g4
70 brnz %g4, delay_loop_Rx_0
71 nop
72
73 nop
74 setx 0x0, %g1, %o0
75 setx 0x0, %g1, %o1
76 setx RX_DESC_RING_LENGTH, %g1, %o2
77 setx RX_COMPL_RING_LEN, %g1, %o3
78 setx RBR_CONFIG_B_DATA, %g1, %o4
79 setx RX_INITIAL_KICK, %g1, %o5
80 setx 0x0, %g1, %o6
81 call NiuInitRxDma
82 nop
83!@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
84! Init DMA Channel 1 @@@@@@@@@@@@@@@@@@@@@@@@@@@@
85!@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
86
87P_NIU_RxInitDma_1:
88 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_NIU_RxInitDma_1)) -> NIU_InitRxDma(1, RX_DESC_RING_LENGTH, RX_COMPL_RING_LEN, RBR_CONFIG_B_DATA, RX_INITIAL_KICK, 0x0, NIU_RX_MULTI_DMA)
89 setx 0x5, %g1, %g4
90delay_loop_Rx_1:
91 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
92 nop
93 nop
94 nop
95 nop
96 dec %g4
97 brnz %g4, delay_loop_Rx_1
98 nop
99
100 nop
101 setx 0x1, %g1, %o0
102 setx 0x1, %g1, %l2
103 setx RX_DESC_RING_LENGTH, %g1, %o2
104 setx RX_COMPL_RING_LEN, %g1, %o3
105 setx RBR_CONFIG_B_DATA, %g1, %o4
106 setx RX_INITIAL_KICK, %g1, %o5
107 setx 0x0, %g1, %o6
108 call NiuInitRxDma
109 nop
110!@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
111! Init DMA Channel 2 @@@@@@@@@@@@@@@@@@@@@@@@@@@@
112!@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
113
114P_NIU_RxInitDma_2:
115 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_NIU_RxInitDma_2)) -> NIU_InitRxDma(2, RX_DESC_RING_LENGTH, RX_COMPL_RING_LEN, RBR_CONFIG_B_DATA, RX_INITIAL_KICK, 0x0, NIU_RX_MULTI_DMA)
116 setx 0x5, %g1, %g4
117delay_loop_Rx_2:
118 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
119 nop
120 nop
121 nop
122 nop
123 dec %g4
124 brnz %g4, delay_loop_Rx_2
125 nop
126
127 nop
128 setx 0x2, %g1, %o0
129 setx 0x2, %g1, %l3
130 setx RX_DESC_RING_LENGTH, %g1, %o2
131 setx RX_COMPL_RING_LEN, %g1, %o3
132 setx RBR_CONFIG_B_DATA, %g1, %o4
133 setx RX_INITIAL_KICK, %g1, %o5
134 setx 0x0, %g1, %o6
135 call NiuInitRxDma
136 nop
137!@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
138! Init DMA Channel 3 @@@@@@@@@@@@@@@@@@@@@@@@@@@@
139!@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
140
141P_NIU_RxInitDma_3:
142 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_NIU_RxInitDma_3)) -> NIU_InitRxDma(3, RX_DESC_RING_LENGTH, RX_COMPL_RING_LEN, RBR_CONFIG_B_DATA, RX_INITIAL_KICK, 0x0, NIU_RX_MULTI_DMA)
143 setx 0x5, %g1, %g4
144delay_loop_Rx_3:
145 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
146 nop
147 nop
148 nop
149 nop
150 dec %g4
151 brnz %g4, delay_loop_Rx_3
152 nop
153
154 nop
155 setx 0x3, %g1, %o0
156 setx 0x3, %g1, %l4
157 setx RX_DESC_RING_LENGTH, %g1, %o2
158 setx RX_COMPL_RING_LEN, %g1, %o3
159 setx RBR_CONFIG_B_DATA, %g1, %o4
160 setx RX_INITIAL_KICK, %g1, %o5
161 setx 0x0, %g1, %o6
162 call NiuInitRxDma
163 nop
164!@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
165! Init DMA Channel 4 @@@@@@@@@@@@@@@@@@@@@@@@@@@@
166!@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
167
168P_NIU_RxInitDma_4:
169 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_NIU_RxInitDma_4)) -> NIU_InitRxDma(4, RX_DESC_RING_LENGTH, RX_COMPL_RING_LEN, RBR_CONFIG_B_DATA, RX_INITIAL_KICK, 0x0, NIU_RX_MULTI_DMA)
170 setx 0x5, %g1, %g4
171delay_loop_Rx_4:
172 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
173 nop
174 nop
175 nop
176 nop
177 dec %g4
178 brnz %g4, delay_loop_Rx_4
179 nop
180
181 nop
182 setx 0x4, %g1, %o0
183 setx 0x4, %g1, %l5
184 setx RX_DESC_RING_LENGTH, %g1, %o2
185 setx RX_COMPL_RING_LEN, %g1, %o3
186 setx RBR_CONFIG_B_DATA, %g1, %o4
187 setx RX_INITIAL_KICK, %g1, %o5
188 setx 0x0, %g1, %o6
189 call NiuInitRxDma
190 nop
191!@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
192! Init DMA Channel 5 @@@@@@@@@@@@@@@@@@@@@@@@@@@@
193!@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
194
195P_NIU_RxInitDma_5:
196 nop ! $EV trig_pc_d(1, @VA(.MAIN.P_NIU_RxInitDma_5)) -> NIU_InitRxDma(5, RX_DESC_RING_LENGTH, RX_COMPL_RING_LEN, RBR_CONFIG_B_DATA, RX_INITIAL_KICK, 0x0, NIU_RX_MULTI_DMA)
197 setx 0x5, %g1, %g4
198delay_loop_Rx_5:
199 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
200 nop
201 nop
202 nop
203 nop
204 dec %g4
205 brnz %g4, delay_loop_Rx_5
206 nop
207
208 nop
209 setx 0x5, %g1, %o0
210 setx 0x5, %g1, %l6
211 setx RX_DESC_RING_LENGTH, %g1, %o2
212 setx RX_COMPL_RING_LEN, %g1, %o3
213 setx RBR_CONFIG_B_DATA, %g1, %o4
214 setx RX_INITIAL_KICK, %g1, %o5
215 setx NIU_RX_MULTI_DMA, %g1, %o6
216 call NiuInitRxDma
217 nop
218P0_NIU_RxPkt_Conf:
219 nop ! $EV trig_pc_d(1, @VA(.MAIN.P0_NIU_RxPkt_Conf)) -> NIU_RxPktConf(RXMAC_PKTCNT,0)
220 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
221 nop
222P1_NIU_RxPkt_Conf:
223 nop ! $EV trig_pc_d(1, @VA(.MAIN.P1_NIU_RxPkt_Conf)) -> NIU_RxPktConf(RXMAC_PKTCNT,1)
224 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
225 nop
226P_NIU_Rx_GenPkt:
227 setx RXMAC_PKTCNT, %g1, %g6
228 nop
229Rx_pktcnt_loop:
230 nop ! $EV trig_pc_d(1, @VA(.MAIN.Rx_pktcnt_loop)) -> NIU_RxGenPkt(MAC_ID, 0, RXMAC_PKTCNT, NIU_RX_PKT_LEN,0x1, NIU_RX_MULTI_DMA, 1)
231 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
232 nop
233 nop
234 nop
235 nop
236
237delay_loop0:
238 mulx %o1, 0x200, %g4
239 setx RCR_STAT_A, %g7, %g2
240 add %g2, %g4, %g2
241 ldxa [%g2]ASI_PRIMARY_LITTLE, %g4
242
243 mulx %l2, 0x200, %g5
244 setx RCR_STAT_A, %g7, %g2
245 add %g2, %g5, %g2
246 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
247
248 add %g5, %g4, %g3
249
250 mulx %l3, 0x200, %g5
251 setx RCR_STAT_A, %g7, %g2
252 add %g2, %g5, %g2
253 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
254
255 add %g5, %g3, %g3
256
257 mulx %l4, 0x200, %g5
258 setx RCR_STAT_A, %g7, %g2
259 add %g2, %g5, %g2
260 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
261
262 add %g5, %g3, %g3
263
264 mulx %l5, 0x200, %g5
265 setx RCR_STAT_A, %g7, %g2
266 add %g2, %g5, %g2
267 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
268
269 add %g5, %g3, %g3
270
271 mulx %l6, 0x200, %g5
272 setx RCR_STAT_A, %g7, %g2
273 add %g2, %g5, %g2
274 ldxa [%g2]ASI_PRIMARY_LITTLE, %g5
275
276 add %g5, %g3, %g5
277 cmp %g5, FAIR_PKT_COUNT
278 bne delay_loop0
279 nop
280
281
282test_passed:
283 nop
284 EXIT_GOOD
285# 218 "diag.j.pp"
286
287/************************************************************************
288 Test case data start
289************************************************************************/
290!SECTION SetRngConfig_init data_va=0x100000000
291!attr_data {
292! Name = SetRngConfig_init,
293! hypervisor,
294! compressimage
295! }
296!.data
297!SetRngConfig_init:
298! .xword 0x0060452301000484
299
300SECTION SetRxLogMask1_init data_va=0x200000100
301attr_data {
302 Name = SetRxLogMask1_init,
303 hypervisor,
304 compressimage
305 }
306.data
307SetRxLogMask1_init:
308 .xword 0x0060452301000484
309
310SECTION SetRxLogVal1_init data_va=0x200000200
311attr_data {
312 Name = SetRxLogVal1_init,
313 hypervisor,
314 compressimage
315 }
316.data
317SetRxLogVal1_init:
318 .xword 0x0060452301000484
319
320SECTION SetRxLogRelo1_init data_va=0x200000300
321attr_data {
322 Name = SetRxLogRelo1_init,
323 hypervisor,
324 compressimage
325 }
326.data
327SetRxLogRelo1_init:
328 .xword 0x0060452301000484
329
330SECTION SetRxLogPgVld_init data_va=0x200000400
331attr_data {
332 Name = SetRxLogPgVld_init,
333 hypervisor,
334 compressimage
335 }
336.data
337SetRxLogPgVld_init:
338 .xword 0x0060452301000484
339SECTION SetRbrConfig_A_init data_va=0x200000500
340attr_data {
341 Name = SetRbrConfig_A_init,
342 hypervisor,
343 compressimage
344 }
345.data
346SetRbrConfig_A_init:
347 .xword 0x0060452301000484
348SECTION SetRbrConfig_B_init data_va=0x200000600
349attr_data {
350 Name = SetRbrConfig_B_init,
351 hypervisor,
352 compressimage
353 }
354.data
355SetRbrConfig_B_init:
356 .xword 0x0060452301000484
357SECTION SetRcrConfig_A_init data_va=0x200000700
358attr_data {
359 Name = SetRcrConfig_A_init,
360 hypervisor,
361 compressimage
362 }
363.data
364SetRcrConfig_A_init:
365 .xword 0x0060452301000484
366SECTION SetRxDmaCfig_1_0_init data_va=0x200000800
367attr_data {
368 Name = SetRxDmaCfig_1_0_init,
369 hypervisor,
370 compressimage
371 }
372.data
373SetRxDmaCfig_1_0_init:
374 .xword 0x0060452301000484
375SECTION SetRxdmaCfig2Start_init data_va=0x200000900
376attr_data {
377 Name = SetRxdmaCfig2Start_init,
378 hypervisor,
379 compressimage
380 }
381.data
382SetRxdmaCfig2Start_init:
383 .xword 0x0060452301000484
384SECTION SetRxDmaCfig_1_1_init data_va=0x200000a00
385attr_data {
386 Name = SetRxDmaCfig_1_1_init,
387 hypervisor,
388 compressimage
389 }
390.data
391SetRxDmaCfig_1_1_init:
392 .xword 0x0060452301000484
393# 331 "diag.j.pp"
394SECTION SetRxRingKick_init data_va=0x200000b00
395attr_data {
396 Name = SetRxRingKick_init,
397 hypervisor,
398 compressimage
399 }
400.data
401SetRxRingKick_init:
402 .xword 0x0060452301000484
403
404SECTION SetRxLogMask2_init data_va=0x200000c00
405attr_data {
406 Name = SetRxLogMask2_init,
407 hypervisor,
408 compressimage
409 }
410.data
411SetRxLogMask2_init:
412 .xword 0x0060452301000484
413
414SECTION SetRxLogVal2_init data_va=0x200000d00
415attr_data {
416 Name = SetRxLogVal2_init,
417 hypervisor,
418 compressimage
419 }
420.data
421SetRxLogVal2_init:
422 .xword 0x0060452301000484
423
424SECTION SetRxLogRelo2_init data_va=0x200000e00
425attr_data {
426 Name = SetRxLogRelo2_init,
427 hypervisor,
428 compressimage
429 }
430.data
431SetRxLogRelo2_init:
432 .xword 0x0060452301000484
433# 374 "diag.j.pp"
434
435#if 0
436#endif
Full OpenSPARC design & verification tarball including full HDL.