[OpenSPARC-T2-DV] / verif / diag / assembly / peu / PCIeDMAWrAdr32.s

/*
* ========== Copyright Header Begin ==========================================
* 
* OpenSPARC T2 Processor File: PCIeDMAWrAdr32.s
* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
*
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
*
* For the avoidance of doubt, and except that if any non-GPL license 
* choice is available it will apply instead, Sun elects to use only 
* the General Public License version 2 (GPLv2) at this time for any 
* software where a choice of GPL license versions is made 
* available with the language indicating that GPLv2 or any later version 
* may be used, or where a choice of which version of the GPL is applied is 
* otherwise unspecified. 
*
* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, 
* CA 95054 USA or visit www.sun.com if you need additional information or 
* have any questions. 
*
* 
* ========== Copyright Header End ============================================
*/
#define ENABLE_PCIE_LINK_TRAINING
#define ENABLE_PCIE_MPS_512
#define MAIN_PAGE_HV_ALSO

#include "hboot.s"
#include "peu_defines.h"

#define MEM32_RD_ADDR 		   mpeval(N2_PCIE_BASE_ADDR + MEM32_OFFSET_BASE_REG_DATA)

#define DMA_DATA_ADDR		   0x007f0000

#define DMA_ADDR_1		   mpeval(DMA_DATA_ADDR + 0*64, 16, 16)
#define DMA_ADDR_2		   mpeval(DMA_DATA_ADDR + 1*64, 16, 16)
#define DMA_ADDR_3		   mpeval(DMA_DATA_ADDR + 2*64, 16, 16)
#define DMA_ADDR_4		   mpeval(DMA_DATA_ADDR + 3*64, 16, 16)
#define DMA_ADDR_5		   mpeval(DMA_DATA_ADDR + 4*64, 16, 16)
#define DMA_ADDR_6		   mpeval(DMA_DATA_ADDR + 5*64, 16, 16)
#define DMA_ADDR_7		   mpeval(DMA_DATA_ADDR + 6*64, 16, 16)
#define DMA_ADDR_8		   mpeval(DMA_DATA_ADDR + 7*64, 16, 16)
#define DMA_ADDR_9		   mpeval(DMA_DATA_ADDR + 8*64, 16, 16)
#define DMA_ADDR_10		   mpeval(DMA_DATA_ADDR + 10*64, 16, 16)
#define DMA_ADDR_11		   mpeval(DMA_DATA_ADDR + 8*256, 16, 16)
#define DMA_ADDR_12		   mpeval(DMA_DATA_ADDR + 9*256, 16, 16)
#define DMA_ADDR_13		   mpeval(DMA_DATA_ADDR + 10*256, 16, 16)
#define DMA_ADDR_14		   mpeval(DMA_DATA_ADDR + 12*256, 16, 16)
#define DMA_ADDR_15		   mpeval(DMA_DATA_ADDR + 16*256, 16, 16)
#define DMA_ADDR_16		   mpeval(DMA_DATA_ADDR + 24*256, 16, 16)

#define IOMMU_TTE_ADDR		   0x40000000

! Bit 8 = Page Size: 0=8KB, 1=64KB;  Bits 3:0 = TSB Table size:	6=64k entries 
#define MMU_TSB_CNTRL_REG_DATA	   mpeval(IOMMU_TTE_ADDR | 0x100 | 6)


/************************************************************************
   Test case code start
 ************************************************************************/
.text
.global main

main:
        ta T_CHANGE_HPRIV
        nop

! enable SUN4U translation in the IOMMU
	
	setx	FIRE_DLC_MMU_CSR_A_CTL_ADDR, %g1, %g2
	setx	0x00301, %g1, %g3	! 9:8 11 = Cache enabled, 0: 1 = translation enabled
	stx	%g3, [%g2]
	ldx	[%g2], %g3

! load address of the TSB table, and the page size (64KB)
	
	setx	FIRE_DLC_MMU_CSR_A_TSB_ADDR, %g1, %g2
	setx	MMU_TSB_CNTRL_REG_DATA, %g1, %g3
	stx	%g3, [%g2]
	ldx	[%g2], %g3
	
! Trigger some DMA Writes of various lengths
	
Xmt1:	nop         ! $EV trig_pc_d(1, @VA(.MAIN.Xmt1)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_1, DMA_ADDR_2, "64'h1", 1 )
	nop
	nop
Xmt2:	nop         ! $EV trig_pc_d(1, @VA(.MAIN.Xmt2)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_2, DMA_ADDR_3, "64'h2", 1 )
	nop
	nop
Xmt3:	nop         ! $EV trig_pc_d(1, @VA(.MAIN.Xmt3)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_3, DMA_ADDR_4, "64'h3", 1 )
	nop
	nop
Xmt4:	nop         ! $EV trig_pc_d(1, @VA(.MAIN.Xmt4)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_4, DMA_ADDR_5, "64'h4", 1 )
	nop
	nop
Xmt5:	nop         ! $EV trig_pc_d(1, @VA(.MAIN.Xmt5)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_5, DMA_ADDR_6, "64'h3f", 1 )
	nop
	nop
Xmt6:	nop         ! $EV trig_pc_d(1, @VA(.MAIN.Xmt6)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_6, DMA_ADDR_7, "64'h40", 1 )
	nop
	nop
Xmt7:	nop         ! $EV trig_pc_d(1, @VA(.MAIN.Xmt7)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_7, DMA_ADDR_8, "64'h41", 1 )
	nop
	nop
Xmt8:	nop         ! $EV trig_pc_d(1, @VA(.MAIN.Xmt8)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_8, DMA_ADDR_9, "64'h7f", 1 )
	nop
	nop
Xmt9:	nop         ! $EV trig_pc_d(1, @VA(.MAIN.Xmt9)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_9, DMA_ADDR_10, "64'h80", 1 )
	nop
	nop
Xmt10:	nop         ! $EV trig_pc_d(1, @VA(.MAIN.Xmt10)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_10, DMA_ADDR_11, "64'h81", 1 )
	nop
	nop
Xmt11:	nop         ! $EV trig_pc_d(1, @VA(.MAIN.Xmt11)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_11, DMA_ADDR_12, "64'hff", 1 )
	nop
	nop
Xmt12:	nop         ! $EV trig_pc_d(1, @VA(.MAIN.Xmt12)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_12, DMA_ADDR_13, "64'h100", 1 )
	nop
	nop
Xmt13:	nop         ! $EV trig_pc_d(1, @VA(.MAIN.Xmt13)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_13, DMA_ADDR_14, "64'h101", 1 )
	nop
	nop
Xmt14:	nop         ! $EV trig_pc_d(1, @VA(.MAIN.Xmt14)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_14, DMA_ADDR_15, "64'h1ff", 1 )
	nop
	nop
Xmt15:	nop         ! $EV trig_pc_d(1, @VA(.MAIN.Xmt15)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_15, DMA_ADDR_16, "64'h200", 1 )
	nop
	nop
	nop

	! select a MEM32 address in PCI address range and transmit the command to NCU
	
	setx    MEM32_RD_ADDR, %g1, %g2
	setx	0x020, %g1, %g4		! loop 32 times

delay_loop:
	stx	%g2, [%g2]		! MEM32 PIO Write
	ldx	[%g2], %l0		! MEM32 PIO READ
	add	%g2, 8, %g2		! increment PIO  address
	
	dec	%g4			! decrement counter
	brnz	%g4, delay_loop		! loop if not zero
	nop

	
test_passed:
	EXIT_GOOD

test_failed:
	EXIT_BAD


/************************************************************************
   Test case data start
************************************************************************/

SECTION       .DATA DATA_VA=DMA_DATA_ADDR
attr_data {     
      Name = .DATA,
      hypervisor,
      compressimage
}

.data
.global PCIAddr9
	
	.xword 0x1011121314151617
	.xword 0x18191a1b1c1d1e1f
	.xword 0x2021222324252627
	.xword 0x28292a2b2c2d2e2f
	.xword 0x3031323334353637
	.xword 0x38393a3b3c3d3e3f
	.xword 0x4041424344454647
	.xword 0x48494a4b4c4d4e4f
	.xword 0xffffffffffffffff
	.xword 0xffffffffffffffff
	.xword 0x1011121314151617
	.xword 0x18191a1b1c1d1e1f
	.xword 0x2021222324252627
	.xword 0x28292a2b2c2d2e2f
	.xword 0x3031323334353637
	.xword 0x38393a3b3c3d3e3f
	.xword 0x4041424344454647
	.xword 0x48494a4b4c4d4e4f
	.xword 0xffffffffffffffff
	.xword 0xffffffffffffffff
	.xword 0x1011121314151617
	.xword 0x18191a1b1c1d1e1f
	.xword 0x2021222324252627
	.xword 0x28292a2b2c2d2e2f
	.xword 0x3031323334353637
	.xword 0x38393a3b3c3d3e3f
	.xword 0x4041424344454647
	.xword 0x48494a4b4c4d4e4f
	.xword 0xffffffffffffffff
	.xword 0xffffffffffffffff
	.xword 0x1011121314151617
	.xword 0x18191a1b1c1d1e1f
	.xword 0x2021222324252627
	.xword 0x28292a2b2c2d2e2f
	.xword 0x3031323334353637
	.xword 0x38393a3b3c3d3e3f
	.xword 0x4041424344454647
	.xword 0x48494a4b4c4d4e4f
	.xword 0xffffffffffffffff
	.xword 0xffffffffffffffff
	.xword 0x1011121314151617
	.xword 0x18191a1b1c1d1e1f
	.xword 0x2021222324252627
	.xword 0x28292a2b2c2d2e2f
	.xword 0x3031323334353637
	.xword 0x38393a3b3c3d3e3f
	.xword 0x4041424344454647
	.xword 0x48494a4b4c4d4e4f
	.xword 0xffffffffffffffff
	.xword 0xffffffffffffffff
	.xword 0x1011121314151617
	.xword 0x18191a1b1c1d1e1f
	.xword 0x2021222324252627
	.xword 0x28292a2b2c2d2e2f
	.xword 0x3031323334353637
	.xword 0x38393a3b3c3d3e3f
	.xword 0x4041424344454647
	.xword 0x48494a4b4c4d4e4f
	.xword 0xffffffffffffffff
	.xword 0xffffffffffffffff
	.xword 0x1011121314151617
	.xword 0x18191a1b1c1d1e1f
	.xword 0x2021222324252627
	.xword 0x28292a2b2c2d2e2f
	.xword 0x3031323334353637
	.xword 0x38393a3b3c3d3e3f
	.xword 0x4041424344454647
	.xword 0x48494a4b4c4d4e4f
	.xword 0xffffffffffffffff
	.xword 0xffffffffffffffff
	.xword 0x1011121314151617
	.xword 0x18191a1b1c1d1e1f
	.xword 0x2021222324252627
	.xword 0x28292a2b2c2d2e2f
	.xword 0x3031323334353637
	.xword 0x38393a3b3c3d3e3f
	.xword 0x4041424344454647
	.xword 0x48494a4b4c4d4e4f
	.xword 0xffffffffffffffff
	.xword 0xffffffffffffffff
	.xword 0x1011121314151617
	.xword 0x18191a1b1c1d1e1f
	.xword 0x2021222324252627
	.xword 0x28292a2b2c2d2e2f
	.xword 0x3031323334353637
	.xword 0x38393a3b3c3d3e3f
	.xword 0x4041424344454647
	.xword 0x48494a4b4c4d4e4f
	.xword 0xffffffffffffffff
	.xword 0xffffffffffffffff


/************************************************************************
   IOMMU TTE start
	TTE Format:
63:	48 DEV KEY	- set to 0
47:	39 reserved	- set to 0
38:	13 DATA PA	- set to VA for VA=RA
12:	7  DATA_SOFT	- set to 0
6:	5  reserved	- set to 0
5:	3  FNM MASK	- set to 0
2:	2  KEY VALID	- set to 0
1:	1  DATA_W	- set to 1
0:	0  DATA_V	- set to 1
************************************************************************/

SECTION       .DATA2 DATA_VA=IOMMU_TTE_ADDR
attr_data {     
      Name = .DATA2,
      hypervisor,
      compressimage
}

.data
	.xword 0x0000000000000003
	.xword 0x0000000000010003
	.xword 0x0000000000020003
	.xword 0x0000000000030003
	.xword 0x0000000000040003
	.xword 0x0000000000050003
	.xword 0x0000000000060003
	.xword 0x0000000000070003
	.xword 0x0000000000080003
	.xword 0x0000000000090003
	.xword 0x00000000000a0003
	.xword 0x00000000000b0003
	.xword 0x00000000000c0003
	.xword 0x00000000000d0003
	.xword 0x00000000000e0003
	.xword 0x00000000000f0003
	
	.xword 0x0000000000100003
	.xword 0x0000000000110003
	.xword 0x0000000000120003
	.xword 0x0000000000130003
	.xword 0x0000000000140003
	.xword 0x0000000000150003
	.xword 0x0000000000160003
	.xword 0x0000000000170003
	.xword 0x0000000000180003
	.xword 0x0000000000190003
	.xword 0x00000000001a0003
	.xword 0x00000000001b0003
	.xword 0x00000000001c0003
	.xword 0x00000000001d0003
	.xword 0x00000000001e0003
	.xword 0x00000000001f0003
	
	.xword 0x0000000000200003
	.xword 0x0000000000210003
	.xword 0x0000000000220003
	.xword 0x0000000000230003
	.xword 0x0000000000240003
	.xword 0x0000000000250003
	.xword 0x0000000000260003
	.xword 0x0000000000270003
	.xword 0x0000000000280003
	.xword 0x0000000000290003
	.xword 0x00000000002a0003
	.xword 0x00000000002b0003
	.xword 0x00000000002c0003
	.xword 0x00000000002d0003
	.xword 0x00000000002e0003
	.xword 0x00000000002f0003
	
	.xword 0x0000000000300003
	.xword 0x0000000000310003
	.xword 0x0000000000320003
	.xword 0x0000000000330003
	.xword 0x0000000000340003
	.xword 0x0000000000350003
	.xword 0x0000000000360003
	.xword 0x0000000000370003
	.xword 0x0000000000380003
	.xword 0x0000000000390003
	.xword 0x00000000003a0003
	.xword 0x00000000003b0003
	.xword 0x00000000003c0003
	.xword 0x00000000003d0003
	.xword 0x00000000003e0003
	.xword 0x00000000003f0003
	
	.xword 0x0000000000400003
	.xword 0x0000000000410003
	.xword 0x0000000000420003
	.xword 0x0000000000430003
	.xword 0x0000000000440003
	.xword 0x0000000000450003
	.xword 0x0000000000460003
	.xword 0x0000000000470003
	.xword 0x0000000000480003
	.xword 0x0000000000490003
	.xword 0x00000000004a0003
	.xword 0x00000000004b0003
	.xword 0x00000000004c0003
	.xword 0x00000000004d0003
	.xword 0x00000000004e0003
	.xword 0x00000000004f0003
	
	.xword 0x0000000000500003
	.xword 0x0000000000510003
	.xword 0x0000000000520003
	.xword 0x0000000000530003
	.xword 0x0000000000540003
	.xword 0x0000000000550003
	.xword 0x0000000000560003
	.xword 0x0000000000570003
	.xword 0x0000000000580003
	.xword 0x0000000000590003
	.xword 0x00000000005a0003
	.xword 0x00000000005b0003
	.xword 0x00000000005c0003
	.xword 0x00000000005d0003
	.xword 0x00000000005e0003
	.xword 0x00000000005f0003
	
	.xword 0x0000000000600003
	.xword 0x0000000000610003
	.xword 0x0000000000620003
	.xword 0x0000000000630003
	.xword 0x0000000000640003
	.xword 0x0000000000650003
	.xword 0x0000000000660003
	.xword 0x0000000000670003
	.xword 0x0000000000680003
	.xword 0x0000000000690003
	.xword 0x00000000006a0003
	.xword 0x00000000006b0003
	.xword 0x00000000006c0003
	.xword 0x00000000006d0003
	.xword 0x00000000006e0003
	.xword 0x00000000006f0003
	
	.xword 0x0000000000700003
	.xword 0x0000000000710003
	.xword 0x0000000000720003
	.xword 0x0000000000730003
	.xword 0x0000000000740003
	.xword 0x0000000000750003
	.xword 0x0000000000760003
	.xword 0x0000000000770003
	.xword 0x0000000000780003
	.xword 0x0000000000790003
	.xword 0x00000000007a0003
	.xword 0x00000000007b0003
	.xword 0x00000000007c0003
	.xword 0x00000000007d0003
	.xword 0x00000000007e0003
	.xword 0x00000000007f0003
	
	.xword 0x0000000000800003
	.xword 0x0000000000810003
	.xword 0x0000000000820003
	.xword 0x0000000000830003
	.xword 0x0000000000840003
	.xword 0x0000000000850003
	.xword 0x0000000000860003
	.xword 0x0000000000870003
	.xword 0x0000000000880003
	.xword 0x0000000000890003
	.xword 0x00000000008a0003
	.xword 0x00000000008b0003
	.xword 0x00000000008c0003
	.xword 0x00000000008d0003
	.xword 0x00000000008e0003
	.xword 0x00000000008f0003
	
	
/************************************************************************/
Commit	Line	Data
86530b38 AT	1	/*
	2	* ========== Copyright Header Begin ==========================================
	3	*
	4	* OpenSPARC T2 Processor File: PCIeDMAWrAdr32.s
	5	* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
	6	* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
	7	*
	8	* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License as published by
	12	* the Free Software Foundation; version 2 of the License.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	22	*
	23	* For the avoidance of doubt, and except that if any non-GPL license
	24	* choice is available it will apply instead, Sun elects to use only
	25	* the General Public License version 2 (GPLv2) at this time for any
	26	* software where a choice of GPL license versions is made
	27	* available with the language indicating that GPLv2 or any later version
	28	* may be used, or where a choice of which version of the GPL is applied is
	29	* otherwise unspecified.
	30	*
	31	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
	32	* CA 95054 USA or visit www.sun.com if you need additional information or
	33	* have any questions.
	34	*
	35	*
	36	* ========== Copyright Header End ============================================
	37	*/
	38	#define ENABLE_PCIE_LINK_TRAINING
	39	#define ENABLE_PCIE_MPS_512
	40	#define MAIN_PAGE_HV_ALSO
	41
	42	#include "hboot.s"
	43	#include "peu_defines.h"
	44
	45	#define MEM32_RD_ADDR mpeval(N2_PCIE_BASE_ADDR + MEM32_OFFSET_BASE_REG_DATA)
	46
	47	#define DMA_DATA_ADDR 0x007f0000
	48
	49	#define DMA_ADDR_1 mpeval(DMA_DATA_ADDR + 0*64, 16, 16)
	50	#define DMA_ADDR_2 mpeval(DMA_DATA_ADDR + 1*64, 16, 16)
	51	#define DMA_ADDR_3 mpeval(DMA_DATA_ADDR + 2*64, 16, 16)
	52	#define DMA_ADDR_4 mpeval(DMA_DATA_ADDR + 3*64, 16, 16)
	53	#define DMA_ADDR_5 mpeval(DMA_DATA_ADDR + 4*64, 16, 16)
	54	#define DMA_ADDR_6 mpeval(DMA_DATA_ADDR + 5*64, 16, 16)
	55	#define DMA_ADDR_7 mpeval(DMA_DATA_ADDR + 6*64, 16, 16)
	56	#define DMA_ADDR_8 mpeval(DMA_DATA_ADDR + 7*64, 16, 16)
	57	#define DMA_ADDR_9 mpeval(DMA_DATA_ADDR + 8*64, 16, 16)
	58	#define DMA_ADDR_10 mpeval(DMA_DATA_ADDR + 10*64, 16, 16)
	59	#define DMA_ADDR_11 mpeval(DMA_DATA_ADDR + 8*256, 16, 16)
	60	#define DMA_ADDR_12 mpeval(DMA_DATA_ADDR + 9*256, 16, 16)
	61	#define DMA_ADDR_13 mpeval(DMA_DATA_ADDR + 10*256, 16, 16)
	62	#define DMA_ADDR_14 mpeval(DMA_DATA_ADDR + 12*256, 16, 16)
	63	#define DMA_ADDR_15 mpeval(DMA_DATA_ADDR + 16*256, 16, 16)
	64	#define DMA_ADDR_16 mpeval(DMA_DATA_ADDR + 24*256, 16, 16)
65
66	#define IOMMU_TTE_ADDR 0x40000000
67
68	! Bit 8 = Page Size: 0=8KB, 1=64KB; Bits 3:0 = TSB Table size: 6=64k entries
69	#define MMU_TSB_CNTRL_REG_DATA mpeval(IOMMU_TTE_ADDR \| 0x100 \| 6)
70
71
72	/************************************************************************
73	Test case code start
74	************************************************************************/
75	.text
76	.global main
77
78	main:
79	ta T_CHANGE_HPRIV
80	nop
81
82	! enable SUN4U translation in the IOMMU
83
84	setx FIRE_DLC_MMU_CSR_A_CTL_ADDR, %g1, %g2
85	setx 0x00301, %g1, %g3 ! 9:8 11 = Cache enabled, 0: 1 = translation enabled
86	stx %g3, [%g2]
87	ldx [%g2], %g3
88
89	! load address of the TSB table, and the page size (64KB)
90
91	setx FIRE_DLC_MMU_CSR_A_TSB_ADDR, %g1, %g2
92	setx MMU_TSB_CNTRL_REG_DATA, %g1, %g3
93	stx %g3, [%g2]
94	ldx [%g2], %g3
95
96	! Trigger some DMA Writes of various lengths
97
98	Xmt1: nop ! $EV trig_pc_d(1, @VA(.MAIN.Xmt1)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_1, DMA_ADDR_2, "64'h1", 1 )
99	nop
100	nop
101	Xmt2: nop ! $EV trig_pc_d(1, @VA(.MAIN.Xmt2)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_2, DMA_ADDR_3, "64'h2", 1 )
102	nop
103	nop
104	Xmt3: nop ! $EV trig_pc_d(1, @VA(.MAIN.Xmt3)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_3, DMA_ADDR_4, "64'h3", 1 )
105	nop
106	nop
107	Xmt4: nop ! $EV trig_pc_d(1, @VA(.MAIN.Xmt4)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_4, DMA_ADDR_5, "64'h4", 1 )
108	nop
109	nop
110	Xmt5: nop ! $EV trig_pc_d(1, @VA(.MAIN.Xmt5)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_5, DMA_ADDR_6, "64'h3f", 1 )
111	nop
112	nop
113	Xmt6: nop ! $EV trig_pc_d(1, @VA(.MAIN.Xmt6)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_6, DMA_ADDR_7, "64'h40", 1 )
114	nop
115	nop
116	Xmt7: nop ! $EV trig_pc_d(1, @VA(.MAIN.Xmt7)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_7, DMA_ADDR_8, "64'h41", 1 )
117	nop
118	nop
119	Xmt8: nop ! $EV trig_pc_d(1, @VA(.MAIN.Xmt8)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_8, DMA_ADDR_9, "64'h7f", 1 )
120	nop
121	nop
122	Xmt9: nop ! $EV trig_pc_d(1, @VA(.MAIN.Xmt9)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_9, DMA_ADDR_10, "64'h80", 1 )
123	nop
124	nop
125	Xmt10: nop ! $EV trig_pc_d(1, @VA(.MAIN.Xmt10)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_10, DMA_ADDR_11, "64'h81", 1 )
126	nop
127	nop
128	Xmt11: nop ! $EV trig_pc_d(1, @VA(.MAIN.Xmt11)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_11, DMA_ADDR_12, "64'hff", 1 )
129	nop
130	nop
131	Xmt12: nop ! $EV trig_pc_d(1, @VA(.MAIN.Xmt12)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_12, DMA_ADDR_13, "64'h100", 1 )
132	nop
133	nop
134	Xmt13: nop ! $EV trig_pc_d(1, @VA(.MAIN.Xmt13)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_13, DMA_ADDR_14, "64'h101", 1 )
135	nop
136	nop
137	Xmt14: nop ! $EV trig_pc_d(1, @VA(.MAIN.Xmt14)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_14, DMA_ADDR_15, "64'h1ff", 1 )
138	nop
139	nop
140	Xmt15: nop ! $EV trig_pc_d(1, @VA(.MAIN.Xmt15)) -> EnablePCIeIgCmd ("DMAWR", DMA_ADDR_15, DMA_ADDR_16, "64'h200", 1 )
141	nop
142	nop
143	nop
144
145	! select a MEM32 address in PCI address range and transmit the command to NCU
146
147	setx MEM32_RD_ADDR, %g1, %g2
148	setx 0x020, %g1, %g4 ! loop 32 times
149
150	delay_loop:
151	stx %g2, [%g2] ! MEM32 PIO Write
152	ldx [%g2], %l0 ! MEM32 PIO READ
153	add %g2, 8, %g2 ! increment PIO address
154
155	dec %g4 ! decrement counter
156	brnz %g4, delay_loop ! loop if not zero
157	nop
158
159
160	test_passed:
161	EXIT_GOOD
162
163	test_failed:
164	EXIT_BAD
165
166
167	/************************************************************************
168	Test case data start
169	************************************************************************/
170
171	SECTION .DATA DATA_VA=DMA_DATA_ADDR
172	attr_data {
173	Name = .DATA,
174	hypervisor,
175	compressimage
176	}
177
178	.data
179	.global PCIAddr9
180
181	.xword 0x1011121314151617
182	.xword 0x18191a1b1c1d1e1f
183	.xword 0x2021222324252627
184	.xword 0x28292a2b2c2d2e2f
185	.xword 0x3031323334353637
186	.xword 0x38393a3b3c3d3e3f
187	.xword 0x4041424344454647
188	.xword 0x48494a4b4c4d4e4f
189	.xword 0xffffffffffffffff
190	.xword 0xffffffffffffffff
191	.xword 0x1011121314151617
192	.xword 0x18191a1b1c1d1e1f
193	.xword 0x2021222324252627
194	.xword 0x28292a2b2c2d2e2f
195	.xword 0x3031323334353637
196	.xword 0x38393a3b3c3d3e3f
197	.xword 0x4041424344454647
198	.xword 0x48494a4b4c4d4e4f
199	.xword 0xffffffffffffffff
200	.xword 0xffffffffffffffff
201	.xword 0x1011121314151617
202	.xword 0x18191a1b1c1d1e1f
203	.xword 0x2021222324252627
204	.xword 0x28292a2b2c2d2e2f
205	.xword 0x3031323334353637
206	.xword 0x38393a3b3c3d3e3f
207	.xword 0x4041424344454647
208	.xword 0x48494a4b4c4d4e4f
209	.xword 0xffffffffffffffff
210	.xword 0xffffffffffffffff
211	.xword 0x1011121314151617
212	.xword 0x18191a1b1c1d1e1f
213	.xword 0x2021222324252627
214	.xword 0x28292a2b2c2d2e2f
215	.xword 0x3031323334353637
216	.xword 0x38393a3b3c3d3e3f
217	.xword 0x4041424344454647
218	.xword 0x48494a4b4c4d4e4f
219	.xword 0xffffffffffffffff
220	.xword 0xffffffffffffffff
221	.xword 0x1011121314151617
222	.xword 0x18191a1b1c1d1e1f
223	.xword 0x2021222324252627
224	.xword 0x28292a2b2c2d2e2f
225	.xword 0x3031323334353637
226	.xword 0x38393a3b3c3d3e3f
227	.xword 0x4041424344454647
228	.xword 0x48494a4b4c4d4e4f
229	.xword 0xffffffffffffffff
230	.xword 0xffffffffffffffff
231	.xword 0x1011121314151617
232	.xword 0x18191a1b1c1d1e1f
233	.xword 0x2021222324252627
234	.xword 0x28292a2b2c2d2e2f
235	.xword 0x3031323334353637
236	.xword 0x38393a3b3c3d3e3f
237	.xword 0x4041424344454647
238	.xword 0x48494a4b4c4d4e4f
239	.xword 0xffffffffffffffff
240	.xword 0xffffffffffffffff
241	.xword 0x1011121314151617
242	.xword 0x18191a1b1c1d1e1f
243	.xword 0x2021222324252627
244	.xword 0x28292a2b2c2d2e2f
245	.xword 0x3031323334353637
246	.xword 0x38393a3b3c3d3e3f
247	.xword 0x4041424344454647
248	.xword 0x48494a4b4c4d4e4f
249	.xword 0xffffffffffffffff
250	.xword 0xffffffffffffffff
251	.xword 0x1011121314151617
252	.xword 0x18191a1b1c1d1e1f
253	.xword 0x2021222324252627
254	.xword 0x28292a2b2c2d2e2f
255	.xword 0x3031323334353637
256	.xword 0x38393a3b3c3d3e3f
257	.xword 0x4041424344454647
258	.xword 0x48494a4b4c4d4e4f
259	.xword 0xffffffffffffffff
260	.xword 0xffffffffffffffff
261	.xword 0x1011121314151617
262	.xword 0x18191a1b1c1d1e1f
263	.xword 0x2021222324252627
264	.xword 0x28292a2b2c2d2e2f
265	.xword 0x3031323334353637
266	.xword 0x38393a3b3c3d3e3f
267	.xword 0x4041424344454647
268	.xword 0x48494a4b4c4d4e4f
269	.xword 0xffffffffffffffff
270	.xword 0xffffffffffffffff
271
272
273	/************************************************************************
274	IOMMU TTE start
275	TTE Format:
276	63: 48 DEV KEY - set to 0
277	47: 39 reserved - set to 0
278	38: 13 DATA PA - set to VA for VA=RA
279	12: 7 DATA_SOFT - set to 0
280	6: 5 reserved - set to 0
281	5: 3 FNM MASK - set to 0
282	2: 2 KEY VALID - set to 0
283	1: 1 DATA_W - set to 1
284	0: 0 DATA_V - set to 1
285	************************************************************************/
286
287	SECTION .DATA2 DATA_VA=IOMMU_TTE_ADDR
288	attr_data {
289	Name = .DATA2,
290	hypervisor,
291	compressimage
292	}
293
294	.data
295	.xword 0x0000000000000003
296	.xword 0x0000000000010003
297	.xword 0x0000000000020003
298	.xword 0x0000000000030003
299	.xword 0x0000000000040003
300	.xword 0x0000000000050003
301	.xword 0x0000000000060003
302	.xword 0x0000000000070003
303	.xword 0x0000000000080003
304	.xword 0x0000000000090003
305	.xword 0x00000000000a0003
306	.xword 0x00000000000b0003
307	.xword 0x00000000000c0003
308	.xword 0x00000000000d0003
309	.xword 0x00000000000e0003
310	.xword 0x00000000000f0003
311
312	.xword 0x0000000000100003
313	.xword 0x0000000000110003
314	.xword 0x0000000000120003
315	.xword 0x0000000000130003
316	.xword 0x0000000000140003
317	.xword 0x0000000000150003
318	.xword 0x0000000000160003
319	.xword 0x0000000000170003
320	.xword 0x0000000000180003
321	.xword 0x0000000000190003
322	.xword 0x00000000001a0003
323	.xword 0x00000000001b0003
324	.xword 0x00000000001c0003
325	.xword 0x00000000001d0003
326	.xword 0x00000000001e0003
327	.xword 0x00000000001f0003
328
329	.xword 0x0000000000200003
330	.xword 0x0000000000210003
331	.xword 0x0000000000220003
332	.xword 0x0000000000230003
333	.xword 0x0000000000240003
334	.xword 0x0000000000250003
335	.xword 0x0000000000260003
336	.xword 0x0000000000270003
337	.xword 0x0000000000280003
338	.xword 0x0000000000290003
339	.xword 0x00000000002a0003
340	.xword 0x00000000002b0003
341	.xword 0x00000000002c0003
342	.xword 0x00000000002d0003
343	.xword 0x00000000002e0003
344	.xword 0x00000000002f0003
345
346	.xword 0x0000000000300003
347	.xword 0x0000000000310003
348	.xword 0x0000000000320003
349	.xword 0x0000000000330003
350	.xword 0x0000000000340003
351	.xword 0x0000000000350003
352	.xword 0x0000000000360003
353	.xword 0x0000000000370003
354	.xword 0x0000000000380003
355	.xword 0x0000000000390003
356	.xword 0x00000000003a0003
357	.xword 0x00000000003b0003
358	.xword 0x00000000003c0003
359	.xword 0x00000000003d0003
360	.xword 0x00000000003e0003
361	.xword 0x00000000003f0003
362
363	.xword 0x0000000000400003
364	.xword 0x0000000000410003
365	.xword 0x0000000000420003
366	.xword 0x0000000000430003
367	.xword 0x0000000000440003
368	.xword 0x0000000000450003
369	.xword 0x0000000000460003
370	.xword 0x0000000000470003
371	.xword 0x0000000000480003
372	.xword 0x0000000000490003
373	.xword 0x00000000004a0003
374	.xword 0x00000000004b0003
375	.xword 0x00000000004c0003
376	.xword 0x00000000004d0003
377	.xword 0x00000000004e0003
378	.xword 0x00000000004f0003
379
380	.xword 0x0000000000500003
381	.xword 0x0000000000510003
382	.xword 0x0000000000520003
383	.xword 0x0000000000530003
384	.xword 0x0000000000540003
385	.xword 0x0000000000550003
386	.xword 0x0000000000560003
387	.xword 0x0000000000570003
388	.xword 0x0000000000580003
389	.xword 0x0000000000590003
390	.xword 0x00000000005a0003
391	.xword 0x00000000005b0003
392	.xword 0x00000000005c0003
393	.xword 0x00000000005d0003
394	.xword 0x00000000005e0003
395	.xword 0x00000000005f0003
396
397	.xword 0x0000000000600003
398	.xword 0x0000000000610003
399	.xword 0x0000000000620003
400	.xword 0x0000000000630003
401	.xword 0x0000000000640003
402	.xword 0x0000000000650003
403	.xword 0x0000000000660003
404	.xword 0x0000000000670003
405	.xword 0x0000000000680003
406	.xword 0x0000000000690003
407	.xword 0x00000000006a0003
408	.xword 0x00000000006b0003
409	.xword 0x00000000006c0003
410	.xword 0x00000000006d0003
411	.xword 0x00000000006e0003
412	.xword 0x00000000006f0003
413
414	.xword 0x0000000000700003
415	.xword 0x0000000000710003
416	.xword 0x0000000000720003
417	.xword 0x0000000000730003
418	.xword 0x0000000000740003
419	.xword 0x0000000000750003
420	.xword 0x0000000000760003
421	.xword 0x0000000000770003
422	.xword 0x0000000000780003
423	.xword 0x0000000000790003
424	.xword 0x00000000007a0003
425	.xword 0x00000000007b0003
426	.xword 0x00000000007c0003
427	.xword 0x00000000007d0003
428	.xword 0x00000000007e0003
429	.xword 0x00000000007f0003
430
431	.xword 0x0000000000800003
432	.xword 0x0000000000810003
433	.xword 0x0000000000820003
434	.xword 0x0000000000830003
435	.xword 0x0000000000840003
436	.xword 0x0000000000850003
437	.xword 0x0000000000860003
438	.xword 0x0000000000870003
439	.xword 0x0000000000880003
440	.xword 0x0000000000890003
441	.xword 0x00000000008a0003
442	.xword 0x00000000008b0003
443	.xword 0x00000000008c0003
444	.xword 0x00000000008d0003
445	.xword 0x00000000008e0003
446	.xword 0x00000000008f0003
447
448
449	/************************************************************************/