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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / peu / piu_reg_test.s
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86530b38
AT		 1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: piu_reg_test.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
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31* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38#define MAIN_PAGE_HV_ALSO
39
40!!!#define PORTABLE_CORE 1
41
42#include "hboot.s"
43#include "peu_defines.h"
44#include "dmu_peu_regs.h"
45
46.text
47.global main
48
49main:
50 ta T_CHANGE_HPRIV
51
52 mov 0, %l1
53 dec %l1
54
55 th_fork(thread, %l0)
56
57 ba test_failed
58 nop
59
60thread_0:
61
62 ! tell the vera code not to generate an expect when this reg is written to
63VERA_CMD: nop ! $EV trig_pc_d(1,@VA(.MAIN.VERA_CMD)) -> EnablePCIeIgCmd("IGNORE_PME_TURN_OFF", 0, 0, "0",1)
64
65REG_TEST_0:
66 ! First check that the POR value is correct
67 setx FIRE_DLC_CRU_CSR_A_DMC_DBG_SEL_A_REG_ADDR, %g1, %g2
68 best_set_reg(FIRE_DLC_CRU_CSR_A_DMC_DBG_SEL_A_REG_POR_VALUE, %g1, %g3)
69 ldx [%g2], %g4
70 xorcc %g3, %g4, %g5
71 bne test_failed
72 nop
73
74 ! Next check that all the writable bits can be written
75 xor %g3, %l1, %l2
76 stx %l2, [%g2] ! store inverted POR value
77
78#define REG_0_EXP_VALUE mpeval( (~FIRE_DLC_CRU_CSR_A_DMC_DBG_SEL_A_REG_POR_VALUE & FIRE_DLC_CRU_CSR_A_DMC_DBG_SEL_A_REG_WRITE_MASK) | (FIRE_DLC_CRU_CSR_A_DMC_DBG_SEL_A_REG_POR_VALUE & ~FIRE_DLC_CRU_CSR_A_DMC_DBG_SEL_A_REG_WRITE_MASK) )
79
80 best_set_reg(REG_0_EXP_VALUE, %g1, %g7) ! get expected value
81 ldx [%g2], %g4
82 xorcc %g7, %g4, %g5
83 bne test_failed
84 nop
85
86
87REG_TEST_1:
88 ! First check that the POR value is correct
89 setx FIRE_DLC_CRU_CSR_A_DMC_DBG_SEL_B_REG_ADDR, %g1, %g2
90 best_set_reg(FIRE_DLC_CRU_CSR_A_DMC_DBG_SEL_B_REG_POR_VALUE, %g1, %g3)
91 ldx [%g2], %g4
92 xorcc %g3, %g4, %g5
93 bne test_failed
94 nop
95
96 ! Next check that all the writable bits can be written
97 xor %g3, %l1, %l2
98 stx %l2, [%g2] ! store inverted POR value
99
100#define REG_1_EXP_VALUE mpeval( (~FIRE_DLC_CRU_CSR_A_DMC_DBG_SEL_B_REG_POR_VALUE & FIRE_DLC_CRU_CSR_A_DMC_DBG_SEL_B_REG_WRITE_MASK) | (FIRE_DLC_CRU_CSR_A_DMC_DBG_SEL_B_REG_POR_VALUE & ~FIRE_DLC_CRU_CSR_A_DMC_DBG_SEL_B_REG_WRITE_MASK) )
101
102 best_set_reg(REG_1_EXP_VALUE, %g1, %g7) ! get expected value
103 ldx [%g2], %g4
104 xorcc %g7, %g4, %g5
105 bne test_failed
106 nop
107
108
109REG_TEST_2:
110 ! First check that the POR value is correct
111 setx FIRE_DLC_CRU_CSR_A_DMC_PCIE_CFG_ADDR, %g1, %g2
112 best_set_reg(FIRE_DLC_CRU_CSR_A_DMC_PCIE_CFG_POR_VALUE, %g1, %g3)
113 ldx [%g2], %g4
114 xorcc %g3, %g4, %g5
115 bne test_failed
116 nop
117
118 ! Next check that all the writable bits can be written
119 xor %g3, %l1, %l2
120 stx %l2, [%g2] ! store inverted POR value
121
122#define REG_2_EXP_VALUE mpeval( (~FIRE_DLC_CRU_CSR_A_DMC_PCIE_CFG_POR_VALUE & FIRE_DLC_CRU_CSR_A_DMC_PCIE_CFG_WRITE_MASK) | (FIRE_DLC_CRU_CSR_A_DMC_PCIE_CFG_POR_VALUE & ~FIRE_DLC_CRU_CSR_A_DMC_PCIE_CFG_WRITE_MASK) )
123
124 best_set_reg(REG_2_EXP_VALUE, %g1, %g7) ! get expected value
125 ldx [%g2], %g4
126 xorcc %g7, %g4, %g5
127 bne test_failed
128 nop
129
130
131REG_TEST_3:
132 ! First check that the POR value is correct
133 setx FIRE_DLC_MMU_CSR_A_CTL_ADDR, %g1, %g2
134#ifdef DTM_ENABLED
135 setx FIRE_DLC_MMU_CSR_A_CTL_POR_VALUE+2, %g1, %g3 ! Bypass enable is set
136#else
137 best_set_reg(FIRE_DLC_MMU_CSR_A_CTL_POR_VALUE, %g1, %g3)
138#endif
139 ldx [%g2], %g4
140 xorcc %g3, %g4, %g5
141 bne test_failed
142 nop
143
144 ! Next check that all the writable bits can be written
145 xor %g3, %l1, %l2
146 stx %l2, [%g2] ! store inverted POR value
147
148#ifdef DTM_ENABLED
149#define REG_3_EXP_VALUE mpeval( (~(FIRE_DLC_MMU_CSR_A_CTL_POR_VALUE+2) & FIRE_DLC_MMU_CSR_A_CTL_WRITE_MASK) | ((FIRE_DLC_MMU_CSR_A_CTL_POR_VALUE+2) & ~FIRE_DLC_MMU_CSR_A_CTL_WRITE_MASK) )
150#else
151#define REG_3_EXP_VALUE mpeval( (~FIRE_DLC_MMU_CSR_A_CTL_POR_VALUE & FIRE_DLC_MMU_CSR_A_CTL_WRITE_MASK) | (FIRE_DLC_MMU_CSR_A_CTL_POR_VALUE & ~FIRE_DLC_MMU_CSR_A_CTL_WRITE_MASK) )
152#endif
153
154 best_set_reg(REG_3_EXP_VALUE, %g1, %g7) ! get expected value
155 ldx [%g2], %g4
156 xorcc %g7, %g4, %g5
157 bne test_failed
158 nop
159
160 stx %g0, [%g2] ! CM must be 0 for certain IOMMU writes
161
162
163REG_TEST_4:
164 ! First check that the POR value is correct
165 setx FIRE_DLC_MMU_CSR_A_TSB_ADDR, %g1, %g2
166 best_set_reg(FIRE_DLC_MMU_CSR_A_TSB_POR_VALUE, %g1, %g3)
167 ldx [%g2], %g4
168 xorcc %g3, %g4, %g5
169 bne test_failed
170 nop
171
172 ! Next check that all the writable bits can be written
173 xor %g3, %l1, %l2
174 stx %l2, [%g2] ! store inverted POR value
175
176#define REG_4_EXP_VALUE mpeval( (~FIRE_DLC_MMU_CSR_A_TSB_POR_VALUE & FIRE_DLC_MMU_CSR_A_TSB_WRITE_MASK) | (FIRE_DLC_MMU_CSR_A_TSB_POR_VALUE & ~FIRE_DLC_MMU_CSR_A_TSB_WRITE_MASK) )
177
178 best_set_reg(REG_4_EXP_VALUE, %g1, %g7) ! get expected value
179 ldx [%g2], %g4
180 xorcc %g7, %g4, %g5
181 bne test_failed
182 nop
183
184
185REG_TEST_5:
186 ! First check that the POR value is correct
187 setx FIRE_DLC_MMU_CSR_A_FSH_ADDR, %g1, %g2
188 best_set_reg(FIRE_DLC_MMU_CSR_A_FSH_POR_VALUE, %g1, %g3)
189 ldx [%g2], %g4
190 xorcc %g3, %g4, %g5
191 bne test_failed
192 nop
193
194 ! Next check that all the writable bits can be written
195 xor %g3, %l1, %l2
196 stx %l2, [%g2] ! store inverted POR value
197
198#define REG_5_EXP_VALUE mpeval( (~FIRE_DLC_MMU_CSR_A_FSH_POR_VALUE & FIRE_DLC_MMU_CSR_A_FSH_WRITE_MASK) | (FIRE_DLC_MMU_CSR_A_FSH_POR_VALUE & ~FIRE_DLC_MMU_CSR_A_FSH_WRITE_MASK) )
199
200 best_set_reg(REG_5_EXP_VALUE, %g1, %g7) ! get expected value
201 ldx [%g2], %g4
202 xorcc %g7, %g4, %g5
203 bne test_failed
204 nop
205
206
207REG_TEST_6:
208 ! First check that the POR value is correct
209 setx FIRE_DLC_MMU_CSR_A_INV_ADDR, %g1, %g2
210 best_set_reg(FIRE_DLC_MMU_CSR_A_INV_POR_VALUE, %g1, %g3)
211 ldx [%g2], %g4
212 xorcc %g3, %g4, %g5
213 bne test_failed
214 nop
215
216 ! Next check that all the writable bits can be written
217! xor %g3, %l1, %l2
218! stx %l2, [%g2] ! store inverted POR value
219
220#define REG_6_EXP_VALUE mpeval( (~FIRE_DLC_MMU_CSR_A_INV_POR_VALUE & FIRE_DLC_MMU_CSR_A_INV_WRITE_MASK) | (FIRE_DLC_MMU_CSR_A_INV_POR_VALUE & ~FIRE_DLC_MMU_CSR_A_INV_WRITE_MASK) )
221
222! best_set_reg(REG_6_EXP_VALUE, %g1, %g7) ! get expected value
223! ldx [%g2], %g4
224! !xorcc %g7, %g4, %g5
225! xorcc %g0, %g4, %g5 ! this reg is write only!, so expect 0s back
226! bne test_failed
227! nop
228
229
230REG_TEST_7:
231 ! First check that the POR value is correct
232 setx FIRE_DLC_MMU_CSR_A_LOG_ADDR, %g1, %g2
233 best_set_reg(FIRE_DLC_MMU_CSR_A_LOG_POR_VALUE, %g1, %g3)
234 ldx [%g2], %g4
235 xorcc %g3, %g4, %g5
236 bne test_failed
237 nop
238
239 ! Next check that all the writable bits can be written
240 xor %g3, %l1, %l2
241 stx %l2, [%g2] ! store inverted POR value
242
243#define REG_7_EXP_VALUE mpeval( (~FIRE_DLC_MMU_CSR_A_LOG_POR_VALUE & FIRE_DLC_MMU_CSR_A_LOG_WRITE_MASK) | (FIRE_DLC_MMU_CSR_A_LOG_POR_VALUE & ~FIRE_DLC_MMU_CSR_A_LOG_WRITE_MASK) )
244
245 best_set_reg(REG_7_EXP_VALUE, %g1, %g7) ! get expected value
246 ldx [%g2], %g4
247 xorcc %g7, %g4, %g5
248 bne test_failed
249 nop
250
251
252REG_TEST_8:
253 ! First check that the POR value is correct
254 setx FIRE_DLC_MMU_CSR_A_INT_EN_ADDR, %g1, %g2
255 best_set_reg(FIRE_DLC_MMU_CSR_A_INT_EN_POR_VALUE, %g1, %g3)
256 ldx [%g2], %g4
257 xorcc %g3, %g4, %g5
258 bne test_failed
259 nop
260
261 ! Next check that all the writable bits can be written
262 xor %g3, %l1, %l2
263 stx %l2, [%g2] ! store inverted POR value
264
265#define REG_8_EXP_VALUE mpeval( (~FIRE_DLC_MMU_CSR_A_INT_EN_POR_VALUE & FIRE_DLC_MMU_CSR_A_INT_EN_WRITE_MASK) | (FIRE_DLC_MMU_CSR_A_INT_EN_POR_VALUE & ~FIRE_DLC_MMU_CSR_A_INT_EN_WRITE_MASK) )
266
267 best_set_reg(REG_8_EXP_VALUE, %g1, %g7) ! get expected value
268 ldx [%g2], %g4
269 xorcc %g7, %g4, %g5
270 bne test_failed
271 nop
272
273
274REG_TEST_9:
275 ! First check that the POR value is correct
276 setx FIRE_DLC_MMU_CSR_A_EN_ERR_ADDR, %g1, %g2
277 best_set_reg(FIRE_DLC_MMU_CSR_A_EN_ERR_POR_VALUE, %g1, %g3)
278 ldx [%g2], %g4
279 xorcc %g3, %g4, %g5
280 bne test_failed
281 nop
282
283 ! Next check that all the writable bits can be written
284 xor %g3, %l1, %l2
285 stx %l2, [%g2] ! store inverted POR value
286
287#define REG_9_EXP_VALUE mpeval( (~FIRE_DLC_MMU_CSR_A_EN_ERR_POR_VALUE & FIRE_DLC_MMU_CSR_A_EN_ERR_WRITE_MASK) | (FIRE_DLC_MMU_CSR_A_EN_ERR_POR_VALUE & ~FIRE_DLC_MMU_CSR_A_EN_ERR_WRITE_MASK) )
288
289 best_set_reg(REG_9_EXP_VALUE, %g1, %g7) ! get expected value
290 ldx [%g2], %g4
291 xorcc %g7, %g4, %g5
292 bne test_failed
293 nop
294
295
296REG_TEST_10:
297 ! First check that the POR value is correct
298 setx FIRE_DLC_MMU_CSR_A_ERR_RW1C_ALIAS_ADDR, %g1, %g2
299 best_set_reg(FIRE_DLC_MMU_CSR_A_ERR_RW1C_ALIAS_POR_VALUE, %g1, %g3)
300 ldx [%g2], %g4
301 xorcc %g3, %g4, %g5
302 bne test_failed
303 nop
304
305 ! Next check that all the writable bits can be written
306 xor %g3, %l1, %l2
307 stx %l2, [%g2] ! store inverted POR value
308
309#define REG_10_EXP_VALUE mpeval( (~FIRE_DLC_MMU_CSR_A_ERR_RW1C_ALIAS_POR_VALUE & 0) | (FIRE_DLC_MMU_CSR_A_ERR_RW1C_ALIAS_POR_VALUE & ~0) )
310
311 best_set_reg(REG_10_EXP_VALUE, %g1, %g7) ! get expected value
312 ldx [%g2], %g4
313 xorcc %g7, %g4, %g5
314 bne test_failed
315 nop
316
317
318REG_TEST_11:
319 ! First check that the POR value is correct
320 setx FIRE_DLC_MMU_CSR_A_ERR_RW1S_ALIAS_ADDR, %g1, %g2
321 best_set_reg(FIRE_DLC_MMU_CSR_A_ERR_RW1S_ALIAS_POR_VALUE, %g1, %g3)
322 ldx [%g2], %g4
323 xorcc %g3, %g4, %g5
324 bne test_failed
325 nop
326
327 ! Next check that all the writable bits can be written
328 xor %g3, %l1, %l2
329 stx %l2, [%g2] ! store inverted POR value
330
331#define REG_11_EXP_VALUE mpeval( (~FIRE_DLC_MMU_CSR_A_ERR_RW1S_ALIAS_POR_VALUE & FIRE_DLC_MMU_CSR_A_ERR_RW1S_ALIAS_WRITE_MASK) | (FIRE_DLC_MMU_CSR_A_ERR_RW1S_ALIAS_POR_VALUE & ~FIRE_DLC_MMU_CSR_A_ERR_RW1S_ALIAS_WRITE_MASK) )
332
333 best_set_reg(REG_11_EXP_VALUE, %g1, %g7) ! get expected value
334 ldx [%g2], %g4
335 xorcc %g7, %g4, %g5
336 bne test_failed
337 nop
338
339
340REG_TEST_12:
341 ! First check that the POR value is correct
342 setx FIRE_DLC_MMU_CSR_A_FLTA_ADDR, %g1, %g2
343 best_set_reg(FIRE_DLC_MMU_CSR_A_FLTA_POR_VALUE, %g1, %g3)
344 ldx [%g2], %g4
345 xorcc %g3, %g4, %g5
346 bne test_failed
347 nop
348
349 ! Next check that all the writable bits can be written
350 xor %g3, %l1, %l2
351 stx %l2, [%g2] ! store inverted POR value
352
353#define REG_12_EXP_VALUE mpeval( (~FIRE_DLC_MMU_CSR_A_FLTA_POR_VALUE & FIRE_DLC_MMU_CSR_A_FLTA_WRITE_MASK) | (FIRE_DLC_MMU_CSR_A_FLTA_POR_VALUE & ~FIRE_DLC_MMU_CSR_A_FLTA_WRITE_MASK) )
354
355 best_set_reg(REG_12_EXP_VALUE, %g1, %g7) ! get expected value
356 ldx [%g2], %g4
357 xorcc %g7, %g4, %g5
358 bne test_failed
359 nop
360
361
362REG_TEST_13:
363 ! First check that the POR value is correct
364 setx FIRE_DLC_MMU_CSR_A_FLTS_ADDR, %g1, %g2
365 best_set_reg(FIRE_DLC_MMU_CSR_A_FLTS_POR_VALUE, %g1, %g3)
366 ldx [%g2], %g4
367 xorcc %g3, %g4, %g5
368 bne test_failed
369 nop
370
371 ! Next check that all the writable bits can be written
372 xor %g3, %l1, %l2
373 stx %l2, [%g2] ! store inverted POR value
374
375#define REG_13_EXP_VALUE mpeval( (~FIRE_DLC_MMU_CSR_A_FLTS_POR_VALUE & FIRE_DLC_MMU_CSR_A_FLTS_WRITE_MASK) | (FIRE_DLC_MMU_CSR_A_FLTS_POR_VALUE & ~FIRE_DLC_MMU_CSR_A_FLTS_WRITE_MASK) )
376
377 best_set_reg(REG_13_EXP_VALUE, %g1, %g7) ! get expected value
378 ldx [%g2], %g4
379 xorcc %g7, %g4, %g5
380 bne test_failed
381 nop
382
383
384REG_TEST_14:
385 ! First check that the POR value is correct
386 setx FIRE_DLC_MMU_CSR_A_PRFC_ADDR, %g1, %g2
387 best_set_reg(FIRE_DLC_MMU_CSR_A_PRFC_POR_VALUE, %g1, %g3)
388 ldx [%g2], %g4
389 xorcc %g3, %g4, %g5
390 bne test_failed
391 nop
392
393 ! Next check that all the writable bits can be written
394 xor %g3, %l1, %l2
395 stx %l2, [%g2] ! store inverted POR value
396
397#define REG_14_EXP_VALUE mpeval( (~FIRE_DLC_MMU_CSR_A_PRFC_POR_VALUE & FIRE_DLC_MMU_CSR_A_PRFC_WRITE_MASK) | (FIRE_DLC_MMU_CSR_A_PRFC_POR_VALUE & ~FIRE_DLC_MMU_CSR_A_PRFC_WRITE_MASK) )
398
399 best_set_reg(REG_14_EXP_VALUE, %g1, %g7) ! get expected value
400 ldx [%g2], %g4
401 xorcc %g7, %g4, %g5
402 bne test_failed
403 nop
404
405
406REG_TEST_15:
407 ! First check that the POR value is correct
408 setx FIRE_DLC_MMU_CSR_A_PRF0_ADDR, %g1, %g2
409 best_set_reg(FIRE_DLC_MMU_CSR_A_PRF0_POR_VALUE, %g1, %g3)
410 ldx [%g2], %g4
411 xorcc %g3, %g4, %g5
412 bne test_failed
413 nop
414
415 ! Next check that all the writable bits can be written
416 xor %g3, %l1, %l2
417 stx %l2, [%g2] ! store inverted POR value
418
419#define REG_15_EXP_VALUE mpeval( (~FIRE_DLC_MMU_CSR_A_PRF0_POR_VALUE & FIRE_DLC_MMU_CSR_A_PRF0_WRITE_MASK) | (FIRE_DLC_MMU_CSR_A_PRF0_POR_VALUE & ~FIRE_DLC_MMU_CSR_A_PRF0_WRITE_MASK) )
420
421 best_set_reg(REG_15_EXP_VALUE, %g1, %g7) ! get expected value
422 ldx [%g2], %g4
423 xorcc %g7, %g4, %g5
424 bne test_failed
425 nop
426
427
428REG_TEST_16:
429 ! First check that the POR value is correct
430 setx FIRE_DLC_MMU_CSR_A_PRF1_ADDR, %g1, %g2
431 best_set_reg(FIRE_DLC_MMU_CSR_A_PRF1_POR_VALUE, %g1, %g3)
432 ldx [%g2], %g4
433 xorcc %g3, %g4, %g5
434 bne test_failed
435 nop
436
437 ! Next check that all the writable bits can be written
438 xor %g3, %l1, %l2
439 stx %l2, [%g2] ! store inverted POR value
440
441#define REG_16_EXP_VALUE mpeval( (~FIRE_DLC_MMU_CSR_A_PRF1_POR_VALUE & FIRE_DLC_MMU_CSR_A_PRF1_WRITE_MASK) | (FIRE_DLC_MMU_CSR_A_PRF1_POR_VALUE & ~FIRE_DLC_MMU_CSR_A_PRF1_WRITE_MASK) )
442
443 best_set_reg(REG_16_EXP_VALUE, %g1, %g7) ! get expected value
444 ldx [%g2], %g4
445 xorcc %g7, %g4, %g5
446 bne test_failed
447 nop
448
449
450REG_TEST_17:
451 ! First check that the POR value is correct
452 setx FIRE_DLC_MMU_CSR_A_VTB_ADDR, %g1, %g2
453 best_set_reg(FIRE_DLC_MMU_CSR_A_VTB_POR_VALUE, %g1, %g3)
454 ldx [%g2], %g4
455 xorcc %g3, %g4, %g5
456 bne test_failed
457 nop
458
459 ! Next check that all the writable bits can be written
460 xor %g3, %l1, %l2
461 stx %l2, [%g2] ! store inverted POR value
462
463/* #define REG_17_EXP_VALUE mpeval( (~FIRE_DLC_MMU_CSR_A_VTB_POR_VALUE & FIRE_DLC_MMU_CSR_A_VTB_WRITE_MASK) | (FIRE_DLC_MMU_CSR_A_VTB_POR_VALUE & ~FIRE_DLC_MMU_CSR_A_VTB_WRITE_MASK) ) */
464
465!!! bits 15:11 are 0 in sun4u mode
466#define REG_17_EXP_VALUE 0x01ffffffffff0001
467
468 best_set_reg(REG_17_EXP_VALUE, %g1, %g7) ! get expected value
469 ldx [%g2], %g4
470 xorcc %g7, %g4, %g5
471 bne test_failed
472 nop
473
474
475REG_TEST_18:
476 ! First check that the POR value is correct
477 setx FIRE_DLC_MMU_CSR_A_PTB_ADDR, %g1, %g2
478 best_set_reg(FIRE_DLC_MMU_CSR_A_PTB_POR_VALUE, %g1, %g3)
479 ldx [%g2], %g4
480 xorcc %g3, %g4, %g5
481 bne test_failed
482 nop
483
484 ! Next check that all the writable bits can be written
485 xor %g3, %l1, %l2
486 stx %l2, [%g2] ! store inverted POR value
487
488#define REG_18_EXP_VALUE mpeval( (~FIRE_DLC_MMU_CSR_A_PTB_POR_VALUE & FIRE_DLC_MMU_CSR_A_PTB_WRITE_MASK) | (FIRE_DLC_MMU_CSR_A_PTB_POR_VALUE & ~FIRE_DLC_MMU_CSR_A_PTB_WRITE_MASK) )
489
490 best_set_reg(REG_18_EXP_VALUE, %g1, %g7) ! get expected value
491 ldx [%g2], %g4
492 xorcc %g7, %g4, %g5
493 bne test_failed
494 nop
495
496
497REG_TEST_19:
498 ! Next check that all the writable bits can be written
499 setx FIRE_DLC_MMU_CSR_A_TDB_ADDR, %g1, %g2
500 stx %l1, [%g2] ! store all 1s
501
502#define REG_19_EXP_VALUE mpeval(0xffffffffffffffff & FIRE_DLC_MMU_CSR_A_TDB_WRITE_MASK)
503
504 best_set_reg(REG_19_EXP_VALUE, %g1, %g7) ! get expected value
505 ldx [%g2], %g4
506 and %g4, %g7, %g4 ! mask off bits 47:44, parity bits set by hw
507 xorcc %g7, %g4, %g5
508 bne test_failed
509 nop
510
511
512REG_TEST_20:
513 ! First check that the POR value is correct
514 setx FIRE_DLC_MMU_CSR_A_DEV2IOTSB_ADDR, %g1, %g2
515 best_set_reg(FIRE_DLC_MMU_CSR_A_DEV2IOTSB_POR_VALUE, %g1, %g3)
516 ldx [%g2], %g4
517 xorcc %g3, %g4, %g5
518 bne test_failed
519 nop
520
521 ! Next check that all the writable bits can be written
522 xor %g3, %l1, %l2
523 stx %l2, [%g2] ! store inverted POR value
524
525#define REG_20_EXP_VALUE mpeval( (~FIRE_DLC_MMU_CSR_A_DEV2IOTSB_POR_VALUE & FIRE_DLC_MMU_CSR_A_DEV2IOTSB_WRITE_MASK) | (FIRE_DLC_MMU_CSR_A_DEV2IOTSB_POR_VALUE & ~FIRE_DLC_MMU_CSR_A_DEV2IOTSB_WRITE_MASK) )
526
527 best_set_reg(REG_20_EXP_VALUE, %g1, %g7) ! get expected value
528 ldx [%g2], %g4
529 xorcc %g7, %g4, %g5
530 bne test_failed
531 nop
532
533
534REG_TEST_21:
535 ! First check that the POR value is correct
536 setx FIRE_DLC_MMU_CSR_A_IOTSBDESC_ADDR, %g1, %g2
537 best_set_reg(FIRE_DLC_MMU_CSR_A_IOTSBDESC_POR_VALUE, %g1, %g3)
538 ldx [%g2], %g4
539 xorcc %g3, %g4, %g5
540 bne test_failed
541 nop
542
543 ! Next check that all the writable bits can be written
544 xor %g3, %l1, %l2
545 stx %l2, [%g2] ! store inverted POR value
546
547#define REG_21_EXP_VALUE mpeval( (~FIRE_DLC_MMU_CSR_A_IOTSBDESC_POR_VALUE & FIRE_DLC_MMU_CSR_A_IOTSBDESC_WRITE_MASK) | (FIRE_DLC_MMU_CSR_A_IOTSBDESC_POR_VALUE & ~FIRE_DLC_MMU_CSR_A_IOTSBDESC_WRITE_MASK) )
548
549 best_set_reg(REG_21_EXP_VALUE, %g1, %g7) ! get expected value
550 ldx [%g2], %g4
551 and %g4, %g7, %g4 ! mask off bits 62:61, parity bits set by hw
552 xorcc %g7, %g4, %g5
553 bne test_failed
554 nop
555
556
557REG_TEST_22:
558 ! First check that the POR value is correct
559 setx FIRE_DLC_IMU_EQS_CSR_A_EQ_BASE_ADDRESS_ADDR, %g1, %g2
560 best_set_reg(FIRE_DLC_IMU_EQS_CSR_A_EQ_BASE_ADDRESS_POR_VALUE, %g1, %g3)
561 ldx [%g2], %g4
562 xorcc %g3, %g4, %g5
563 bne test_failed
564 nop
565
566 ! Next check that all the writable bits can be written
567 xor %g3, %l1, %l2
568 stx %l2, [%g2] ! store inverted POR value
569
570#define REG_22_EXP_VALUE mpeval( (~FIRE_DLC_IMU_EQS_CSR_A_EQ_BASE_ADDRESS_POR_VALUE & FIRE_DLC_IMU_EQS_CSR_A_EQ_BASE_ADDRESS_WRITE_MASK) | (FIRE_DLC_IMU_EQS_CSR_A_EQ_BASE_ADDRESS_POR_VALUE & ~FIRE_DLC_IMU_EQS_CSR_A_EQ_BASE_ADDRESS_WRITE_MASK) )
571
572 best_set_reg(REG_22_EXP_VALUE, %g1, %g7) ! get expected value
573 ldx [%g2], %g4
574 xorcc %g7, %g4, %g5
575 bne test_failed
576 nop
577
578
579REG_TEST_23:
580 ! First check that the POR value is correct
581 setx FIRE_DLC_IMU_EQS_CSR_A_EQ_CTRL_SET_ADDR, %g1, %g2
582 best_set_reg(FIRE_DLC_IMU_EQS_CSR_A_EQ_CTRL_SET_POR_VALUE, %g1, %g3)
583 ldx [%g2], %g4
584 xorcc %g3, %g4, %g5
585 bne test_failed
586 nop
587
588 ! Next check that all the writable bits can be written
589 xor %g3, %l1, %l2
590 stx %l2, [%g2] ! store inverted POR value
591
592#define REG_23_EXP_VALUE mpeval( (~FIRE_DLC_IMU_EQS_CSR_A_EQ_CTRL_SET_POR_VALUE & FIRE_DLC_IMU_EQS_CSR_A_EQ_CTRL_SET_WRITE_MASK) | (FIRE_DLC_IMU_EQS_CSR_A_EQ_CTRL_SET_POR_VALUE & ~FIRE_DLC_IMU_EQS_CSR_A_EQ_CTRL_SET_WRITE_MASK) )
593
594 best_set_reg(REG_23_EXP_VALUE, %g1, %g7) ! get expected value
595 ldx [%g2], %g4
596 xorcc %g7, %g4, %g5
597 bne test_failed
598 nop
599
600
601 ! First check that the POR value is correct
602 add %g2, 8, %g2
603 ldx [%g2], %g4
604 xorcc %g3, %g4, %g5
605 bne test_failed
606 nop
607
608 ! Next check that all the writable bits can be written
609 stx %l2, [%g2] ! store inverted POR value
610 ldx [%g2], %g4
611 xorcc %g7, %g4, %g5
612 bne test_failed
613 nop
614
615
616 ! First check that the POR value is correct
617 add %g2, 8, %g2
618 ldx [%g2], %g4
619 xorcc %g3, %g4, %g5
620 bne test_failed
621 nop
622
623 ! Next check that all the writable bits can be written
624 stx %l2, [%g2] ! store inverted POR value
625 ldx [%g2], %g4
626 xorcc %g7, %g4, %g5
627 bne test_failed
628 nop
629
630
631 ! First check that the POR value is correct
632 add %g2, 8, %g2
633 ldx [%g2], %g4
634 xorcc %g3, %g4, %g5
635 bne test_failed
636 nop
637
638 ! Next check that all the writable bits can be written
639 stx %l2, [%g2] ! store inverted POR value
640 ldx [%g2], %g4
641 xorcc %g7, %g4, %g5
642 bne test_failed
643 nop
644
645
646 ! First check that the POR value is correct
647 add %g2, 8, %g2
648 ldx [%g2], %g4
649 xorcc %g3, %g4, %g5
650 bne test_failed
651 nop
652
653 ! Next check that all the writable bits can be written
654 stx %l2, [%g2] ! store inverted POR value
655 ldx [%g2], %g4
656 xorcc %g7, %g4, %g5
657 bne test_failed
658 nop
659
660
661 ! First check that the POR value is correct
662 add %g2, 8, %g2
663 ldx [%g2], %g4
664 xorcc %g3, %g4, %g5
665 bne test_failed
666 nop
667
668 ! Next check that all the writable bits can be written
669 stx %l2, [%g2] ! store inverted POR value
670 ldx [%g2], %g4
671 xorcc %g7, %g4, %g5
672 bne test_failed
673 nop
674
675
676 ! First check that the POR value is correct
677 add %g2, 8, %g2
678 ldx [%g2], %g4
679 xorcc %g3, %g4, %g5
680 bne test_failed
681 nop
682
683 ! Next check that all the writable bits can be written
684 stx %l2, [%g2] ! store inverted POR value
685 ldx [%g2], %g4
686 xorcc %g7, %g4, %g5
687 bne test_failed
688 nop
689
690
691 ! First check that the POR value is correct
692 add %g2, 8, %g2
693 ldx [%g2], %g4
694 xorcc %g3, %g4, %g5
695 bne test_failed
696 nop
697
698 ! Next check that all the writable bits can be written
699 stx %l2, [%g2] ! store inverted POR value
700 ldx [%g2], %g4
701 xorcc %g7, %g4, %g5
702 bne test_failed
703 nop
704
705
706 ! First check that the POR value is correct
707 add %g2, 8, %g2
708 ldx [%g2], %g4
709 xorcc %g3, %g4, %g5
710 bne test_failed
711 nop
712
713 ! Next check that all the writable bits can be written
714 stx %l2, [%g2] ! store inverted POR value
715 ldx [%g2], %g4
716 xorcc %g7, %g4, %g5
717 bne test_failed
718 nop
719
720
721 ! First check that the POR value is correct
722 add %g2, 8, %g2
723 ldx [%g2], %g4
724 xorcc %g3, %g4, %g5
725 bne test_failed
726 nop
727
728 ! Next check that all the writable bits can be written
729 stx %l2, [%g2] ! store inverted POR value
730 ldx [%g2], %g4
731 xorcc %g7, %g4, %g5
732 bne test_failed
733 nop
734
735
736 ! First check that the POR value is correct
737 add %g2, 8, %g2
738 ldx [%g2], %g4
739 xorcc %g3, %g4, %g5
740 bne test_failed
741 nop
742
743 ! Next check that all the writable bits can be written
744 stx %l2, [%g2] ! store inverted POR value
745 ldx [%g2], %g4
746 xorcc %g7, %g4, %g5
747 bne test_failed
748 nop
749
750
751 ! First check that the POR value is correct
752 add %g2, 8, %g2
753 ldx [%g2], %g4
754 xorcc %g3, %g4, %g5
755 bne test_failed
756 nop
757
758 ! Next check that all the writable bits can be written
759 stx %l2, [%g2] ! store inverted POR value
760 ldx [%g2], %g4
761 xorcc %g7, %g4, %g5
762 bne test_failed
763 nop
764
765
766 ! First check that the POR value is correct
767 add %g2, 8, %g2
768 ldx [%g2], %g4
769 xorcc %g3, %g4, %g5
770 bne test_failed
771 nop
772
773 ! Next check that all the writable bits can be written
774 stx %l2, [%g2] ! store inverted POR value
775 ldx [%g2], %g4
776 xorcc %g7, %g4, %g5
777 bne test_failed
778 nop
779
780
781 ! First check that the POR value is correct
782 add %g2, 8, %g2
783 ldx [%g2], %g4
784 xorcc %g3, %g4, %g5
785 bne test_failed
786 nop
787
788 ! Next check that all the writable bits can be written
789 stx %l2, [%g2] ! store inverted POR value
790 ldx [%g2], %g4
791 xorcc %g7, %g4, %g5
792 bne test_failed
793 nop
794
795
796 ! First check that the POR value is correct
797 add %g2, 8, %g2
798 ldx [%g2], %g4
799 xorcc %g3, %g4, %g5
800 bne test_failed
801 nop
802
803 ! Next check that all the writable bits can be written
804 stx %l2, [%g2] ! store inverted POR value
805 ldx [%g2], %g4
806 xorcc %g7, %g4, %g5
807 bne test_failed
808 nop
809
810
811 ! First check that the POR value is correct
812 add %g2, 8, %g2
813 ldx [%g2], %g4
814 xorcc %g3, %g4, %g5
815 bne test_failed
816 nop
817
818 ! Next check that all the writable bits can be written
819 stx %l2, [%g2] ! store inverted POR value
820 ldx [%g2], %g4
821 xorcc %g7, %g4, %g5
822 bne test_failed
823 nop
824
825
826 ! First check that the POR value is correct
827 add %g2, 8, %g2
828 ldx [%g2], %g4
829 xorcc %g3, %g4, %g5
830 bne test_failed
831 nop
832
833 ! Next check that all the writable bits can be written
834 stx %l2, [%g2] ! store inverted POR value
835 ldx [%g2], %g4
836 xorcc %g7, %g4, %g5
837 bne test_failed
838 nop
839
840
841 ! First check that the POR value is correct
842 add %g2, 8, %g2
843 ldx [%g2], %g4
844 xorcc %g3, %g4, %g5
845 bne test_failed
846 nop
847
848 ! Next check that all the writable bits can be written
849 stx %l2, [%g2] ! store inverted POR value
850 ldx [%g2], %g4
851 xorcc %g7, %g4, %g5
852 bne test_failed
853 nop
854
855
856 ! First check that the POR value is correct
857 add %g2, 8, %g2
858 ldx [%g2], %g4
859 xorcc %g3, %g4, %g5
860 bne test_failed
861 nop
862
863 ! Next check that all the writable bits can be written
864 stx %l2, [%g2] ! store inverted POR value
865 ldx [%g2], %g4
866 xorcc %g7, %g4, %g5
867 bne test_failed
868 nop
869
870
871 ! First check that the POR value is correct
872 add %g2, 8, %g2
873 ldx [%g2], %g4
874 xorcc %g3, %g4, %g5
875 bne test_failed
876 nop
877
878 ! Next check that all the writable bits can be written
879 stx %l2, [%g2] ! store inverted POR value
880 ldx [%g2], %g4
881 xorcc %g7, %g4, %g5
882 bne test_failed
883 nop
884
885
886 ! First check that the POR value is correct
887 add %g2, 8, %g2
888 ldx [%g2], %g4
889 xorcc %g3, %g4, %g5
890 bne test_failed
891 nop
892
893 ! Next check that all the writable bits can be written
894 stx %l2, [%g2] ! store inverted POR value
895 ldx [%g2], %g4
896 xorcc %g7, %g4, %g5
897 bne test_failed
898 nop
899
900
901 ! First check that the POR value is correct
902 add %g2, 8, %g2
903 ldx [%g2], %g4
904 xorcc %g3, %g4, %g5
905 bne test_failed
906 nop
907
908 ! Next check that all the writable bits can be written
909 stx %l2, [%g2] ! store inverted POR value
910 ldx [%g2], %g4
911 xorcc %g7, %g4, %g5
912 bne test_failed
913 nop
914
915
916 ! First check that the POR value is correct
917 add %g2, 8, %g2
918 ldx [%g2], %g4
919 xorcc %g3, %g4, %g5
920 bne test_failed
921 nop
922
923 ! Next check that all the writable bits can be written
924 stx %l2, [%g2] ! store inverted POR value
925 ldx [%g2], %g4
926 xorcc %g7, %g4, %g5
927 bne test_failed
928 nop
929
930
931 ! First check that the POR value is correct
932 add %g2, 8, %g2
933 ldx [%g2], %g4
934 xorcc %g3, %g4, %g5
935 bne test_failed
936 nop
937
938 ! Next check that all the writable bits can be written
939 stx %l2, [%g2] ! store inverted POR value
940 ldx [%g2], %g4
941 xorcc %g7, %g4, %g5
942 bne test_failed
943 nop
944
945
946 ! First check that the POR value is correct
947 add %g2, 8, %g2
948 ldx [%g2], %g4
949 xorcc %g3, %g4, %g5
950 bne test_failed
951 nop
952
953 ! Next check that all the writable bits can be written
954 stx %l2, [%g2] ! store inverted POR value
955 ldx [%g2], %g4
956 xorcc %g7, %g4, %g5
957 bne test_failed
958 nop
959
960
961 ! First check that the POR value is correct
962 add %g2, 8, %g2
963 ldx [%g2], %g4
964 xorcc %g3, %g4, %g5
965 bne test_failed
966 nop
967
968 ! Next check that all the writable bits can be written
969 stx %l2, [%g2] ! store inverted POR value
970 ldx [%g2], %g4
971 xorcc %g7, %g4, %g5
972 bne test_failed
973 nop
974
975
976 ! First check that the POR value is correct
977 add %g2, 8, %g2
978 ldx [%g2], %g4
979 xorcc %g3, %g4, %g5
980 bne test_failed
981 nop
982
983 ! Next check that all the writable bits can be written
984 stx %l2, [%g2] ! store inverted POR value
985 ldx [%g2], %g4
986 xorcc %g7, %g4, %g5
987 bne test_failed
988 nop
989
990
991 ! First check that the POR value is correct
992 add %g2, 8, %g2
993 ldx [%g2], %g4
994 xorcc %g3, %g4, %g5
995 bne test_failed
996 nop
997
998 ! Next check that all the writable bits can be written
999 stx %l2, [%g2] ! store inverted POR value
1000 ldx [%g2], %g4
1001 xorcc %g7, %g4, %g5
1002 bne test_failed
1003 nop
1004
1005
1006 ! First check that the POR value is correct
1007 add %g2, 8, %g2
1008 ldx [%g2], %g4
1009 xorcc %g3, %g4, %g5
1010 bne test_failed
1011 nop
1012
1013 ! Next check that all the writable bits can be written
1014 stx %l2, [%g2] ! store inverted POR value
1015 ldx [%g2], %g4
1016 xorcc %g7, %g4, %g5
1017 bne test_failed
1018 nop
1019
1020
1021 ! First check that the POR value is correct
1022 add %g2, 8, %g2
1023 ldx [%g2], %g4
1024 xorcc %g3, %g4, %g5
1025 bne test_failed
1026 nop
1027
1028 ! Next check that all the writable bits can be written
1029 stx %l2, [%g2] ! store inverted POR value
1030 ldx [%g2], %g4
1031 xorcc %g7, %g4, %g5
1032 bne test_failed
1033 nop
1034
1035
1036 ! First check that the POR value is correct
1037 add %g2, 8, %g2
1038 ldx [%g2], %g4
1039 xorcc %g3, %g4, %g5
1040 bne test_failed
1041 nop
1042
1043 ! Next check that all the writable bits can be written
1044 stx %l2, [%g2] ! store inverted POR value
1045 ldx [%g2], %g4
1046 xorcc %g7, %g4, %g5
1047 bne test_failed
1048 nop
1049
1050
1051 ! First check that the POR value is correct
1052 add %g2, 8, %g2
1053 ldx [%g2], %g4
1054 xorcc %g3, %g4, %g5
1055 bne test_failed
1056 nop
1057
1058 ! Next check that all the writable bits can be written
1059 stx %l2, [%g2] ! store inverted POR value
1060 ldx [%g2], %g4
1061 xorcc %g7, %g4, %g5
1062 bne test_failed
1063 nop
1064
1065
1066 ! First check that the POR value is correct
1067 add %g2, 8, %g2
1068 ldx [%g2], %g4
1069 xorcc %g3, %g4, %g5
1070 bne test_failed
1071 nop
1072
1073 ! Next check that all the writable bits can be written
1074 stx %l2, [%g2] ! store inverted POR value
1075 ldx [%g2], %g4
1076 xorcc %g7, %g4, %g5
1077 bne test_failed
1078 nop
1079
1080
1081 ! First check that the POR value is correct
1082 add %g2, 8, %g2
1083 ldx [%g2], %g4
1084 xorcc %g3, %g4, %g5
1085 bne test_failed
1086 nop
1087
1088 ! Next check that all the writable bits can be written
1089 stx %l2, [%g2] ! store inverted POR value
1090 ldx [%g2], %g4
1091 xorcc %g7, %g4, %g5
1092 bne test_failed
1093 nop
1094
1095
1096 ! First check that the POR value is correct
1097 add %g2, 8, %g2
1098 ldx [%g2], %g4
1099 xorcc %g3, %g4, %g5
1100 bne test_failed
1101 nop
1102
1103 ! Next check that all the writable bits can be written
1104 stx %l2, [%g2] ! store inverted POR value
1105 ldx [%g2], %g4
1106 xorcc %g7, %g4, %g5
1107 bne test_failed
1108 nop
1109
1110
1111 ! First check that the POR value is correct
1112 add %g2, 8, %g2
1113 ldx [%g2], %g4
1114 xorcc %g3, %g4, %g5
1115 bne test_failed
1116 nop
1117
1118 ! Next check that all the writable bits can be written
1119 stx %l2, [%g2] ! store inverted POR value
1120 ldx [%g2], %g4
1121 xorcc %g7, %g4, %g5
1122 bne test_failed
1123 nop
1124
1125
1126REG_TEST_24:
1127 ! First check that the POR value is correct
1128 setx FIRE_DLC_IMU_EQS_CSR_A_EQ_CTRL_CLR_ADDR, %g1, %g2
1129 best_set_reg(FIRE_DLC_IMU_EQS_CSR_A_EQ_CTRL_CLR_POR_VALUE, %g1, %g3)
1130 ldx [%g2], %g4
1131 xorcc %g3, %g4, %g5
1132 bne test_failed
1133 nop
1134
1135 ! Next check that all the writable bits can be written
1136 xor %g3, %l1, %l2
1137 stx %l2, [%g2] ! store inverted POR value
1138
1139#define REG_24_EXP_VALUE mpeval( (~FIRE_DLC_IMU_EQS_CSR_A_EQ_CTRL_CLR_POR_VALUE & FIRE_DLC_IMU_EQS_CSR_A_EQ_CTRL_CLR_WRITE_MASK) | (FIRE_DLC_IMU_EQS_CSR_A_EQ_CTRL_CLR_POR_VALUE & ~FIRE_DLC_IMU_EQS_CSR_A_EQ_CTRL_CLR_WRITE_MASK) )
1140
1141 best_set_reg(REG_24_EXP_VALUE, %g1, %g7) ! get expected value
1142 ldx [%g2], %g4
1143 xorcc %g7, %g4, %g5
1144 bne test_failed
1145 nop
1146
1147
1148 ! First check that the POR value is correct
1149 add %g2, 8, %g2
1150 ldx [%g2], %g4
1151 xorcc %g3, %g4, %g5
1152 bne test_failed
1153 nop
1154
1155 ! Next check that all the writable bits can be written
1156 stx %l2, [%g2] ! store inverted POR value
1157 ldx [%g2], %g4
1158 xorcc %g7, %g4, %g5
1159 bne test_failed
1160 nop
1161
1162
1163 ! First check that the POR value is correct
1164 add %g2, 8, %g2
1165 ldx [%g2], %g4
1166 xorcc %g3, %g4, %g5
1167 bne test_failed
1168 nop
1169
1170 ! Next check that all the writable bits can be written
1171 stx %l2, [%g2] ! store inverted POR value
1172 ldx [%g2], %g4
1173 xorcc %g7, %g4, %g5
1174 bne test_failed
1175 nop
1176
1177
1178 ! First check that the POR value is correct
1179 add %g2, 8, %g2
1180 ldx [%g2], %g4
1181 xorcc %g3, %g4, %g5
1182 bne test_failed
1183 nop
1184
1185 ! Next check that all the writable bits can be written
1186 stx %l2, [%g2] ! store inverted POR value
1187 ldx [%g2], %g4
1188 xorcc %g7, %g4, %g5
1189 bne test_failed
1190 nop
1191
1192
1193 ! First check that the POR value is correct
1194 add %g2, 8, %g2
1195 ldx [%g2], %g4
1196 xorcc %g3, %g4, %g5
1197 bne test_failed
1198 nop
1199
1200 ! Next check that all the writable bits can be written
1201 stx %l2, [%g2] ! store inverted POR value
1202 ldx [%g2], %g4
1203 xorcc %g7, %g4, %g5
1204 bne test_failed
1205 nop
1206
1207
1208 ! First check that the POR value is correct
1209 add %g2, 8, %g2
1210 ldx [%g2], %g4
1211 xorcc %g3, %g4, %g5
1212 bne test_failed
1213 nop
1214
1215 ! Next check that all the writable bits can be written
1216 stx %l2, [%g2] ! store inverted POR value
1217 ldx [%g2], %g4
1218 xorcc %g7, %g4, %g5
1219 bne test_failed
1220 nop
1221
1222
1223 ! First check that the POR value is correct
1224 add %g2, 8, %g2
1225 ldx [%g2], %g4
1226 xorcc %g3, %g4, %g5
1227 bne test_failed
1228 nop
1229
1230 ! Next check that all the writable bits can be written
1231 stx %l2, [%g2] ! store inverted POR value
1232 ldx [%g2], %g4
1233 xorcc %g7, %g4, %g5
1234 bne test_failed
1235 nop
1236
1237
1238 ! First check that the POR value is correct
1239 add %g2, 8, %g2
1240 ldx [%g2], %g4
1241 xorcc %g3, %g4, %g5
1242 bne test_failed
1243 nop
1244
1245 ! Next check that all the writable bits can be written
1246 stx %l2, [%g2] ! store inverted POR value
1247 ldx [%g2], %g4
1248 xorcc %g7, %g4, %g5
1249 bne test_failed
1250 nop
1251
1252
1253 ! First check that the POR value is correct
1254 add %g2, 8, %g2
1255 ldx [%g2], %g4
1256 xorcc %g3, %g4, %g5
1257 bne test_failed
1258 nop
1259
1260 ! Next check that all the writable bits can be written
1261 stx %l2, [%g2] ! store inverted POR value
1262 ldx [%g2], %g4
1263 xorcc %g7, %g4, %g5
1264 bne test_failed
1265 nop
1266
1267
1268 ! First check that the POR value is correct
1269 add %g2, 8, %g2
1270 ldx [%g2], %g4
1271 xorcc %g3, %g4, %g5
1272 bne test_failed
1273 nop
1274
1275 ! Next check that all the writable bits can be written
1276 stx %l2, [%g2] ! store inverted POR value
1277 ldx [%g2], %g4
1278 xorcc %g7, %g4, %g5
1279 bne test_failed
1280 nop
1281
1282
1283 ! First check that the POR value is correct
1284 add %g2, 8, %g2
1285 ldx [%g2], %g4
1286 xorcc %g3, %g4, %g5
1287 bne test_failed
1288 nop
1289
1290 ! Next check that all the writable bits can be written
1291 stx %l2, [%g2] ! store inverted POR value
1292 ldx [%g2], %g4
1293 xorcc %g7, %g4, %g5
1294 bne test_failed
1295 nop
1296
1297
1298 ! First check that the POR value is correct
1299 add %g2, 8, %g2
1300 ldx [%g2], %g4
1301 xorcc %g3, %g4, %g5
1302 bne test_failed
1303 nop
1304
1305 ! Next check that all the writable bits can be written
1306 stx %l2, [%g2] ! store inverted POR value
1307 ldx [%g2], %g4
1308 xorcc %g7, %g4, %g5
1309 bne test_failed
1310 nop
1311
1312
1313 ! First check that the POR value is correct
1314 add %g2, 8, %g2
1315 ldx [%g2], %g4
1316 xorcc %g3, %g4, %g5
1317 bne test_failed
1318 nop
1319
1320 ! Next check that all the writable bits can be written
1321 stx %l2, [%g2] ! store inverted POR value
1322 ldx [%g2], %g4
1323 xorcc %g7, %g4, %g5
1324 bne test_failed
1325 nop
1326
1327
1328 ! First check that the POR value is correct
1329 add %g2, 8, %g2
1330 ldx [%g2], %g4
1331 xorcc %g3, %g4, %g5
1332 bne test_failed
1333 nop
1334
1335 ! Next check that all the writable bits can be written
1336 stx %l2, [%g2] ! store inverted POR value
1337 ldx [%g2], %g4
1338 xorcc %g7, %g4, %g5
1339 bne test_failed
1340 nop
1341
1342
1343 ! First check that the POR value is correct
1344 add %g2, 8, %g2
1345 ldx [%g2], %g4
1346 xorcc %g3, %g4, %g5
1347 bne test_failed
1348 nop
1349
1350 ! Next check that all the writable bits can be written
1351 stx %l2, [%g2] ! store inverted POR value
1352 ldx [%g2], %g4
1353 xorcc %g7, %g4, %g5
1354 bne test_failed
1355 nop
1356
1357
1358 ! First check that the POR value is correct
1359 add %g2, 8, %g2
1360 ldx [%g2], %g4
1361 xorcc %g3, %g4, %g5
1362 bne test_failed
1363 nop
1364
1365 ! Next check that all the writable bits can be written
1366 stx %l2, [%g2] ! store inverted POR value
1367 ldx [%g2], %g4
1368 xorcc %g7, %g4, %g5
1369 bne test_failed
1370 nop
1371
1372
1373 ! First check that the POR value is correct
1374 add %g2, 8, %g2
1375 ldx [%g2], %g4
1376 xorcc %g3, %g4, %g5
1377 bne test_failed
1378 nop
1379
1380 ! Next check that all the writable bits can be written
1381 stx %l2, [%g2] ! store inverted POR value
1382 ldx [%g2], %g4
1383 xorcc %g7, %g4, %g5
1384 bne test_failed
1385 nop
1386
1387
1388 ! First check that the POR value is correct
1389 add %g2, 8, %g2
1390 ldx [%g2], %g4
1391 xorcc %g3, %g4, %g5
1392 bne test_failed
1393 nop
1394
1395 ! Next check that all the writable bits can be written
1396 stx %l2, [%g2] ! store inverted POR value
1397 ldx [%g2], %g4
1398 xorcc %g7, %g4, %g5
1399 bne test_failed
1400 nop
1401
1402
1403 ! First check that the POR value is correct
1404 add %g2, 8, %g2
1405 ldx [%g2], %g4
1406 xorcc %g3, %g4, %g5
1407 bne test_failed
1408 nop
1409
1410 ! Next check that all the writable bits can be written
1411 stx %l2, [%g2] ! store inverted POR value
1412 ldx [%g2], %g4
1413 xorcc %g7, %g4, %g5
1414 bne test_failed
1415 nop
1416
1417
1418 ! First check that the POR value is correct
1419 add %g2, 8, %g2
1420 ldx [%g2], %g4
1421 xorcc %g3, %g4, %g5
1422 bne test_failed
1423 nop
1424
1425 ! Next check that all the writable bits can be written
1426 stx %l2, [%g2] ! store inverted POR value
1427 ldx [%g2], %g4
1428 xorcc %g7, %g4, %g5
1429 bne test_failed
1430 nop
1431
1432
1433 ! First check that the POR value is correct
1434 add %g2, 8, %g2
1435 ldx [%g2], %g4
1436 xorcc %g3, %g4, %g5
1437 bne test_failed
1438 nop
1439
1440 ! Next check that all the writable bits can be written
1441 stx %l2, [%g2] ! store inverted POR value
1442 ldx [%g2], %g4
1443 xorcc %g7, %g4, %g5
1444 bne test_failed
1445 nop
1446
1447
1448 ! First check that the POR value is correct
1449 add %g2, 8, %g2
1450 ldx [%g2], %g4
1451 xorcc %g3, %g4, %g5
1452 bne test_failed
1453 nop
1454
1455 ! Next check that all the writable bits can be written
1456 stx %l2, [%g2] ! store inverted POR value
1457 ldx [%g2], %g4
1458 xorcc %g7, %g4, %g5
1459 bne test_failed
1460 nop
1461
1462
1463 ! First check that the POR value is correct
1464 add %g2, 8, %g2
1465 ldx [%g2], %g4
1466 xorcc %g3, %g4, %g5
1467 bne test_failed
1468 nop
1469
1470 ! Next check that all the writable bits can be written
1471 stx %l2, [%g2] ! store inverted POR value
1472 ldx [%g2], %g4
1473 xorcc %g7, %g4, %g5
1474 bne test_failed
1475 nop
1476
1477
1478 ! First check that the POR value is correct
1479 add %g2, 8, %g2
1480 ldx [%g2], %g4
1481 xorcc %g3, %g4, %g5
1482 bne test_failed
1483 nop
1484
1485 ! Next check that all the writable bits can be written
1486 stx %l2, [%g2] ! store inverted POR value
1487 ldx [%g2], %g4
1488 xorcc %g7, %g4, %g5
1489 bne test_failed
1490 nop
1491
1492
1493 ! First check that the POR value is correct
1494 add %g2, 8, %g2
1495 ldx [%g2], %g4
1496 xorcc %g3, %g4, %g5
1497 bne test_failed
1498 nop
1499
1500 ! Next check that all the writable bits can be written
1501 stx %l2, [%g2] ! store inverted POR value
1502 ldx [%g2], %g4
1503 xorcc %g7, %g4, %g5
1504 bne test_failed
1505 nop
1506
1507
1508 ! First check that the POR value is correct
1509 add %g2, 8, %g2
1510 ldx [%g2], %g4
1511 xorcc %g3, %g4, %g5
1512 bne test_failed
1513 nop
1514
1515 ! Next check that all the writable bits can be written
1516 stx %l2, [%g2] ! store inverted POR value
1517 ldx [%g2], %g4
1518 xorcc %g7, %g4, %g5
1519 bne test_failed
1520 nop
1521
1522
1523 ! First check that the POR value is correct
1524 add %g2, 8, %g2
1525 ldx [%g2], %g4
1526 xorcc %g3, %g4, %g5
1527 bne test_failed
1528 nop
1529
1530 ! Next check that all the writable bits can be written
1531 stx %l2, [%g2] ! store inverted POR value
1532 ldx [%g2], %g4
1533 xorcc %g7, %g4, %g5
1534 bne test_failed
1535 nop
1536
1537
1538 ! First check that the POR value is correct
1539 add %g2, 8, %g2
1540 ldx [%g2], %g4
1541 xorcc %g3, %g4, %g5
1542 bne test_failed
1543 nop
1544
1545 ! Next check that all the writable bits can be written
1546 stx %l2, [%g2] ! store inverted POR value
1547 ldx [%g2], %g4
1548 xorcc %g7, %g4, %g5
1549 bne test_failed
1550 nop
1551
1552
1553 ! First check that the POR value is correct
1554 add %g2, 8, %g2
1555 ldx [%g2], %g4
1556 xorcc %g3, %g4, %g5
1557 bne test_failed
1558 nop
1559
1560 ! Next check that all the writable bits can be written
1561 stx %l2, [%g2] ! store inverted POR value
1562 ldx [%g2], %g4
1563 xorcc %g7, %g4, %g5
1564 bne test_failed
1565 nop
1566
1567
1568 ! First check that the POR value is correct
1569 add %g2, 8, %g2
1570 ldx [%g2], %g4
1571 xorcc %g3, %g4, %g5
1572 bne test_failed
1573 nop
1574
1575 ! Next check that all the writable bits can be written
1576 stx %l2, [%g2] ! store inverted POR value
1577 ldx [%g2], %g4
1578 xorcc %g7, %g4, %g5
1579 bne test_failed
1580 nop
1581
1582
1583 ! First check that the POR value is correct
1584 add %g2, 8, %g2
1585 ldx [%g2], %g4
1586 xorcc %g3, %g4, %g5
1587 bne test_failed
1588 nop
1589
1590 ! Next check that all the writable bits can be written
1591 stx %l2, [%g2] ! store inverted POR value
1592 ldx [%g2], %g4
1593 xorcc %g7, %g4, %g5
1594 bne test_failed
1595 nop
1596
1597
1598 ! First check that the POR value is correct
1599 add %g2, 8, %g2
1600 ldx [%g2], %g4
1601 xorcc %g3, %g4, %g5
1602 bne test_failed
1603 nop
1604
1605 ! Next check that all the writable bits can be written
1606 stx %l2, [%g2] ! store inverted POR value
1607 ldx [%g2], %g4
1608 xorcc %g7, %g4, %g5
1609 bne test_failed
1610 nop
1611
1612
1613 ! First check that the POR value is correct
1614 add %g2, 8, %g2
1615 ldx [%g2], %g4
1616 xorcc %g3, %g4, %g5
1617 bne test_failed
1618 nop
1619
1620 ! Next check that all the writable bits can be written
1621 stx %l2, [%g2] ! store inverted POR value
1622 ldx [%g2], %g4
1623 xorcc %g7, %g4, %g5
1624 bne test_failed
1625 nop
1626
1627
1628 ! First check that the POR value is correct
1629 add %g2, 8, %g2
1630 ldx [%g2], %g4
1631 xorcc %g3, %g4, %g5
1632 bne test_failed
1633 nop
1634
1635 ! Next check that all the writable bits can be written
1636 stx %l2, [%g2] ! store inverted POR value
1637 ldx [%g2], %g4
1638 xorcc %g7, %g4, %g5
1639 bne test_failed
1640 nop
1641
1642
1643 ! First check that the POR value is correct
1644 add %g2, 8, %g2
1645 ldx [%g2], %g4
1646 xorcc %g3, %g4, %g5
1647 bne test_failed
1648 nop
1649
1650 ! Next check that all the writable bits can be written
1651 stx %l2, [%g2] ! store inverted POR value
1652 ldx [%g2], %g4
1653 xorcc %g7, %g4, %g5
1654 bne test_failed
1655 nop
1656
1657
1658 ! First check that the POR value is correct
1659 add %g2, 8, %g2
1660 ldx [%g2], %g4
1661 xorcc %g3, %g4, %g5
1662 bne test_failed
1663 nop
1664
1665 ! Next check that all the writable bits can be written
1666 stx %l2, [%g2] ! store inverted POR value
1667 ldx [%g2], %g4
1668 xorcc %g7, %g4, %g5
1669 bne test_failed
1670 nop
1671
1672
1673REG_TEST_25:
1674 ! First check that the POR value is correct
1675 setx FIRE_DLC_IMU_EQS_CSR_A_EQ_STATE_ADDR, %g1, %g2
1676 best_set_reg(FIRE_DLC_IMU_EQS_CSR_A_EQ_STATE_POR_VALUE, %g1, %g3)
1677 ldx [%g2], %g4
1678 xorcc %g3, %g4, %g5
1679 bne test_failed
1680 nop
1681
1682 ! Next check that all the writable bits can be written
1683 xor %g3, %l1, %l2
1684 stx %l2, [%g2] ! store inverted POR value
1685
1686#define REG_25_EXP_VALUE mpeval( (~FIRE_DLC_IMU_EQS_CSR_A_EQ_STATE_POR_VALUE & FIRE_DLC_IMU_EQS_CSR_A_EQ_STATE_WRITE_MASK) | (FIRE_DLC_IMU_EQS_CSR_A_EQ_STATE_POR_VALUE & ~FIRE_DLC_IMU_EQS_CSR_A_EQ_STATE_WRITE_MASK) )
1687
1688 best_set_reg(REG_25_EXP_VALUE, %g1, %g7) ! get expected value
1689 ldx [%g2], %g4
1690 xorcc %g7, %g4, %g5
1691 bne test_failed
1692 nop
1693
1694
1695 ! First check that the POR value is correct
1696 add %g2, 8, %g2
1697 ldx [%g2], %g4
1698 xorcc %g3, %g4, %g5
1699 bne test_failed
1700 nop
1701
1702 ! Next check that all the writable bits can be written
1703 stx %l2, [%g2] ! store inverted POR value
1704 ldx [%g2], %g4
1705 xorcc %g7, %g4, %g5
1706 bne test_failed
1707 nop
1708
1709
1710 ! First check that the POR value is correct
1711 add %g2, 8, %g2
1712 ldx [%g2], %g4
1713 xorcc %g3, %g4, %g5
1714 bne test_failed
1715 nop
1716
1717 ! Next check that all the writable bits can be written
1718 stx %l2, [%g2] ! store inverted POR value
1719 ldx [%g2], %g4
1720 xorcc %g7, %g4, %g5
1721 bne test_failed
1722 nop
1723
1724
1725 ! First check that the POR value is correct
1726 add %g2, 8, %g2
1727 ldx [%g2], %g4
1728 xorcc %g3, %g4, %g5
1729 bne test_failed
1730 nop
1731
1732 ! Next check that all the writable bits can be written
1733 stx %l2, [%g2] ! store inverted POR value
1734 ldx [%g2], %g4
1735 xorcc %g7, %g4, %g5
1736 bne test_failed
1737 nop
1738
1739
1740 ! First check that the POR value is correct
1741 add %g2, 8, %g2
1742 ldx [%g2], %g4
1743 xorcc %g3, %g4, %g5
1744 bne test_failed
1745 nop
1746
1747 ! Next check that all the writable bits can be written
1748 stx %l2, [%g2] ! store inverted POR value
1749 ldx [%g2], %g4
1750 xorcc %g7, %g4, %g5
1751 bne test_failed
1752 nop
1753
1754
1755 ! First check that the POR value is correct
1756 add %g2, 8, %g2
1757 ldx [%g2], %g4
1758 xorcc %g3, %g4, %g5
1759 bne test_failed
1760 nop
1761
1762 ! Next check that all the writable bits can be written
1763 stx %l2, [%g2] ! store inverted POR value
1764 ldx [%g2], %g4
1765 xorcc %g7, %g4, %g5
1766 bne test_failed
1767 nop
1768
1769
1770 ! First check that the POR value is correct
1771 add %g2, 8, %g2
1772 ldx [%g2], %g4
1773 xorcc %g3, %g4, %g5
1774 bne test_failed
1775 nop
1776
1777 ! Next check that all the writable bits can be written
1778 stx %l2, [%g2] ! store inverted POR value
1779 ldx [%g2], %g4
1780 xorcc %g7, %g4, %g5
1781 bne test_failed
1782 nop
1783
1784
1785 ! First check that the POR value is correct
1786 add %g2, 8, %g2
1787 ldx [%g2], %g4
1788 xorcc %g3, %g4, %g5
1789 bne test_failed
1790 nop
1791
1792 ! Next check that all the writable bits can be written
1793 stx %l2, [%g2] ! store inverted POR value
1794 ldx [%g2], %g4
1795 xorcc %g7, %g4, %g5
1796 bne test_failed
1797 nop
1798
1799
1800 ! First check that the POR value is correct
1801 add %g2, 8, %g2
1802 ldx [%g2], %g4
1803 xorcc %g3, %g4, %g5
1804 bne test_failed
1805 nop
1806
1807 ! Next check that all the writable bits can be written
1808 stx %l2, [%g2] ! store inverted POR value
1809 ldx [%g2], %g4
1810 xorcc %g7, %g4, %g5
1811 bne test_failed
1812 nop
1813
1814
1815 ! First check that the POR value is correct
1816 add %g2, 8, %g2
1817 ldx [%g2], %g4
1818 xorcc %g3, %g4, %g5
1819 bne test_failed
1820 nop
1821
1822 ! Next check that all the writable bits can be written
1823 stx %l2, [%g2] ! store inverted POR value
1824 ldx [%g2], %g4
1825 xorcc %g7, %g4, %g5
1826 bne test_failed
1827 nop
1828
1829
1830 ! First check that the POR value is correct
1831 add %g2, 8, %g2
1832 ldx [%g2], %g4
1833 xorcc %g3, %g4, %g5
1834 bne test_failed
1835 nop
1836
1837 ! Next check that all the writable bits can be written
1838 stx %l2, [%g2] ! store inverted POR value
1839 ldx [%g2], %g4
1840 xorcc %g7, %g4, %g5
1841 bne test_failed
1842 nop
1843
1844
1845 ! First check that the POR value is correct
1846 add %g2, 8, %g2
1847 ldx [%g2], %g4
1848 xorcc %g3, %g4, %g5
1849 bne test_failed
1850 nop
1851
1852 ! Next check that all the writable bits can be written
1853 stx %l2, [%g2] ! store inverted POR value
1854 ldx [%g2], %g4
1855 xorcc %g7, %g4, %g5
1856 bne test_failed
1857 nop
1858
1859
1860 ! First check that the POR value is correct
1861 add %g2, 8, %g2
1862 ldx [%g2], %g4
1863 xorcc %g3, %g4, %g5
1864 bne test_failed
1865 nop
1866
1867 ! Next check that all the writable bits can be written
1868 stx %l2, [%g2] ! store inverted POR value
1869 ldx [%g2], %g4
1870 xorcc %g7, %g4, %g5
1871 bne test_failed
1872 nop
1873
1874
1875 ! First check that the POR value is correct
1876 add %g2, 8, %g2
1877 ldx [%g2], %g4
1878 xorcc %g3, %g4, %g5
1879 bne test_failed
1880 nop
1881
1882 ! Next check that all the writable bits can be written
1883 stx %l2, [%g2] ! store inverted POR value
1884 ldx [%g2], %g4
1885 xorcc %g7, %g4, %g5
1886 bne test_failed
1887 nop
1888
1889
1890 ! First check that the POR value is correct
1891 add %g2, 8, %g2
1892 ldx [%g2], %g4
1893 xorcc %g3, %g4, %g5
1894 bne test_failed
1895 nop
1896
1897 ! Next check that all the writable bits can be written
1898 stx %l2, [%g2] ! store inverted POR value
1899 ldx [%g2], %g4
1900 xorcc %g7, %g4, %g5
1901 bne test_failed
1902 nop
1903
1904
1905 ! First check that the POR value is correct
1906 add %g2, 8, %g2
1907 ldx [%g2], %g4
1908 xorcc %g3, %g4, %g5
1909 bne test_failed
1910 nop
1911
1912 ! Next check that all the writable bits can be written
1913 stx %l2, [%g2] ! store inverted POR value
1914 ldx [%g2], %g4
1915 xorcc %g7, %g4, %g5
1916 bne test_failed
1917 nop
1918
1919
1920 ! First check that the POR value is correct
1921 add %g2, 8, %g2
1922 ldx [%g2], %g4
1923 xorcc %g3, %g4, %g5
1924 bne test_failed
1925 nop
1926
1927 ! Next check that all the writable bits can be written
1928 stx %l2, [%g2] ! store inverted POR value
1929 ldx [%g2], %g4
1930 xorcc %g7, %g4, %g5
1931 bne test_failed
1932 nop
1933
1934
1935 ! First check that the POR value is correct
1936 add %g2, 8, %g2
1937 ldx [%g2], %g4
1938 xorcc %g3, %g4, %g5
1939 bne test_failed
1940 nop
1941
1942 ! Next check that all the writable bits can be written
1943 stx %l2, [%g2] ! store inverted POR value
1944 ldx [%g2], %g4
1945 xorcc %g7, %g4, %g5
1946 bne test_failed
1947 nop
1948
1949
1950 ! First check that the POR value is correct
1951 add %g2, 8, %g2
1952 ldx [%g2], %g4
1953 xorcc %g3, %g4, %g5
1954 bne test_failed
1955 nop
1956
1957 ! Next check that all the writable bits can be written
1958 stx %l2, [%g2] ! store inverted POR value
1959 ldx [%g2], %g4
1960 xorcc %g7, %g4, %g5
1961 bne test_failed
1962 nop
1963
1964
1965 ! First check that the POR value is correct
1966 add %g2, 8, %g2
1967 ldx [%g2], %g4
1968 xorcc %g3, %g4, %g5
1969 bne test_failed
1970 nop
1971
1972 ! Next check that all the writable bits can be written
1973 stx %l2, [%g2] ! store inverted POR value
1974 ldx [%g2], %g4
1975 xorcc %g7, %g4, %g5
1976 bne test_failed
1977 nop
1978
1979
1980 ! First check that the POR value is correct
1981 add %g2, 8, %g2
1982 ldx [%g2], %g4
1983 xorcc %g3, %g4, %g5
1984 bne test_failed
1985 nop
1986
1987 ! Next check that all the writable bits can be written
1988 stx %l2, [%g2] ! store inverted POR value
1989 ldx [%g2], %g4
1990 xorcc %g7, %g4, %g5
1991 bne test_failed
1992 nop
1993
1994
1995 ! First check that the POR value is correct
1996 add %g2, 8, %g2
1997 ldx [%g2], %g4
1998 xorcc %g3, %g4, %g5
1999 bne test_failed
2000 nop
2001
2002 ! Next check that all the writable bits can be written
2003 stx %l2, [%g2] ! store inverted POR value
2004 ldx [%g2], %g4
2005 xorcc %g7, %g4, %g5
2006 bne test_failed
2007 nop
2008
2009
2010 ! First check that the POR value is correct
2011 add %g2, 8, %g2
2012 ldx [%g2], %g4
2013 xorcc %g3, %g4, %g5
2014 bne test_failed
2015 nop
2016
2017 ! Next check that all the writable bits can be written
2018 stx %l2, [%g2] ! store inverted POR value
2019 ldx [%g2], %g4
2020 xorcc %g7, %g4, %g5
2021 bne test_failed
2022 nop
2023
2024
2025 ! First check that the POR value is correct
2026 add %g2, 8, %g2
2027 ldx [%g2], %g4
2028 xorcc %g3, %g4, %g5
2029 bne test_failed
2030 nop
2031
2032 ! Next check that all the writable bits can be written
2033 stx %l2, [%g2] ! store inverted POR value
2034 ldx [%g2], %g4
2035 xorcc %g7, %g4, %g5
2036 bne test_failed
2037 nop
2038
2039
2040 ! First check that the POR value is correct
2041 add %g2, 8, %g2
2042 ldx [%g2], %g4
2043 xorcc %g3, %g4, %g5
2044 bne test_failed
2045 nop
2046
2047 ! Next check that all the writable bits can be written
2048 stx %l2, [%g2] ! store inverted POR value
2049 ldx [%g2], %g4
2050 xorcc %g7, %g4, %g5
2051 bne test_failed
2052 nop
2053
2054
2055 ! First check that the POR value is correct
2056 add %g2, 8, %g2
2057 ldx [%g2], %g4
2058 xorcc %g3, %g4, %g5
2059 bne test_failed
2060 nop
2061
2062 ! Next check that all the writable bits can be written
2063 stx %l2, [%g2] ! store inverted POR value
2064 ldx [%g2], %g4
2065 xorcc %g7, %g4, %g5
2066 bne test_failed
2067 nop
2068
2069
2070 ! First check that the POR value is correct
2071 add %g2, 8, %g2
2072 ldx [%g2], %g4
2073 xorcc %g3, %g4, %g5
2074 bne test_failed
2075 nop
2076
2077 ! Next check that all the writable bits can be written
2078 stx %l2, [%g2] ! store inverted POR value
2079 ldx [%g2], %g4
2080 xorcc %g7, %g4, %g5
2081 bne test_failed
2082 nop
2083
2084
2085 ! First check that the POR value is correct
2086 add %g2, 8, %g2
2087 ldx [%g2], %g4
2088 xorcc %g3, %g4, %g5
2089 bne test_failed
2090 nop
2091
2092 ! Next check that all the writable bits can be written
2093 stx %l2, [%g2] ! store inverted POR value
2094 ldx [%g2], %g4
2095 xorcc %g7, %g4, %g5
2096 bne test_failed
2097 nop
2098
2099
2100 ! First check that the POR value is correct
2101 add %g2, 8, %g2
2102 ldx [%g2], %g4
2103 xorcc %g3, %g4, %g5
2104 bne test_failed
2105 nop
2106
2107 ! Next check that all the writable bits can be written
2108 stx %l2, [%g2] ! store inverted POR value
2109 ldx [%g2], %g4
2110 xorcc %g7, %g4, %g5
2111 bne test_failed
2112 nop
2113
2114
2115 ! First check that the POR value is correct
2116 add %g2, 8, %g2
2117 ldx [%g2], %g4
2118 xorcc %g3, %g4, %g5
2119 bne test_failed
2120 nop
2121
2122 ! Next check that all the writable bits can be written
2123 stx %l2, [%g2] ! store inverted POR value
2124 ldx [%g2], %g4
2125 xorcc %g7, %g4, %g5
2126 bne test_failed
2127 nop
2128
2129
2130 ! First check that the POR value is correct
2131 add %g2, 8, %g2
2132 ldx [%g2], %g4
2133 xorcc %g3, %g4, %g5
2134 bne test_failed
2135 nop
2136
2137 ! Next check that all the writable bits can be written
2138 stx %l2, [%g2] ! store inverted POR value
2139 ldx [%g2], %g4
2140 xorcc %g7, %g4, %g5
2141 bne test_failed
2142 nop
2143
2144
2145 ! First check that the POR value is correct
2146 add %g2, 8, %g2
2147 ldx [%g2], %g4
2148 xorcc %g3, %g4, %g5
2149 bne test_failed
2150 nop
2151
2152 ! Next check that all the writable bits can be written
2153 stx %l2, [%g2] ! store inverted POR value
2154 ldx [%g2], %g4
2155 xorcc %g7, %g4, %g5
2156 bne test_failed
2157 nop
2158
2159
2160 ! First check that the POR value is correct
2161 add %g2, 8, %g2
2162 ldx [%g2], %g4
2163 xorcc %g3, %g4, %g5
2164 bne test_failed
2165 nop
2166
2167 ! Next check that all the writable bits can be written
2168 stx %l2, [%g2] ! store inverted POR value
2169 ldx [%g2], %g4
2170 xorcc %g7, %g4, %g5
2171 bne test_failed
2172 nop
2173
2174
2175 ! First check that the POR value is correct
2176 add %g2, 8, %g2
2177 ldx [%g2], %g4
2178 xorcc %g3, %g4, %g5
2179 bne test_failed
2180 nop
2181
2182 ! Next check that all the writable bits can be written
2183 stx %l2, [%g2] ! store inverted POR value
2184 ldx [%g2], %g4
2185 xorcc %g7, %g4, %g5
2186 bne test_failed
2187 nop
2188
2189
2190 ! First check that the POR value is correct
2191 add %g2, 8, %g2
2192 ldx [%g2], %g4
2193 xorcc %g3, %g4, %g5
2194 bne test_failed
2195 nop
2196
2197 ! Next check that all the writable bits can be written
2198 stx %l2, [%g2] ! store inverted POR value
2199 ldx [%g2], %g4
2200 xorcc %g7, %g4, %g5
2201 bne test_failed
2202 nop
2203
2204
2205 ! First check that the POR value is correct
2206 add %g2, 8, %g2
2207 ldx [%g2], %g4
2208 xorcc %g3, %g4, %g5
2209 bne test_failed
2210 nop
2211
2212 ! Next check that all the writable bits can be written
2213 stx %l2, [%g2] ! store inverted POR value
2214 ldx [%g2], %g4
2215 xorcc %g7, %g4, %g5
2216 bne test_failed
2217 nop
2218
2219
2220 ba test_passed
2221 nop
2222
2223thread_1:
2224
2225REG_TEST_26:
2226 ! First check that the POR value is correct
2227 setx FIRE_DLC_IMU_EQS_CSR_A_EQ_TAIL_ADDR, %g1, %g2
2228 best_set_reg(FIRE_DLC_IMU_EQS_CSR_A_EQ_TAIL_POR_VALUE, %g1, %g3)
2229 ldx [%g2], %g4
2230 xorcc %g3, %g4, %g5
2231 bne test_failed
2232 nop
2233
2234 ! Next check that all the writable bits can be written
2235 xor %g3, %l1, %l2
2236 stx %l2, [%g2] ! store inverted POR value
2237
2238#define REG_26_EXP_VALUE mpeval( (~FIRE_DLC_IMU_EQS_CSR_A_EQ_TAIL_POR_VALUE & FIRE_DLC_IMU_EQS_CSR_A_EQ_TAIL_WRITE_MASK) | (FIRE_DLC_IMU_EQS_CSR_A_EQ_TAIL_POR_VALUE & ~FIRE_DLC_IMU_EQS_CSR_A_EQ_TAIL_WRITE_MASK) )
2239
2240 best_set_reg(REG_26_EXP_VALUE, %g1, %g7) ! get expected value
2241 ldx [%g2], %g4
2242 xorcc %g7, %g4, %g5
2243 bne test_failed
2244 nop
2245
2246
2247 ! First check that the POR value is correct
2248 add %g2, 8, %g2
2249 ldx [%g2], %g4
2250 xorcc %g3, %g4, %g5
2251 bne test_failed
2252 nop
2253
2254 ! Next check that all the writable bits can be written
2255 stx %l2, [%g2] ! store inverted POR value
2256 ldx [%g2], %g4
2257 xorcc %g7, %g4, %g5
2258 bne test_failed
2259 nop
2260
2261
2262 ! First check that the POR value is correct
2263 add %g2, 8, %g2
2264 ldx [%g2], %g4
2265 xorcc %g3, %g4, %g5
2266 bne test_failed
2267 nop
2268
2269 ! Next check that all the writable bits can be written
2270 stx %l2, [%g2] ! store inverted POR value
2271 ldx [%g2], %g4
2272 xorcc %g7, %g4, %g5
2273 bne test_failed
2274 nop
2275
2276
2277 ! First check that the POR value is correct
2278 add %g2, 8, %g2
2279 ldx [%g2], %g4
2280 xorcc %g3, %g4, %g5
2281 bne test_failed
2282 nop
2283
2284 ! Next check that all the writable bits can be written
2285 stx %l2, [%g2] ! store inverted POR value
2286 ldx [%g2], %g4
2287 xorcc %g7, %g4, %g5
2288 bne test_failed
2289 nop
2290
2291
2292 ! First check that the POR value is correct
2293 add %g2, 8, %g2
2294 ldx [%g2], %g4
2295 xorcc %g3, %g4, %g5
2296 bne test_failed
2297 nop
2298
2299 ! Next check that all the writable bits can be written
2300 stx %l2, [%g2] ! store inverted POR value
2301 ldx [%g2], %g4
2302 xorcc %g7, %g4, %g5
2303 bne test_failed
2304 nop
2305
2306
2307 ! First check that the POR value is correct
2308 add %g2, 8, %g2
2309 ldx [%g2], %g4
2310 xorcc %g3, %g4, %g5
2311 bne test_failed
2312 nop
2313
2314 ! Next check that all the writable bits can be written
2315 stx %l2, [%g2] ! store inverted POR value
2316 ldx [%g2], %g4
2317 xorcc %g7, %g4, %g5
2318 bne test_failed
2319 nop
2320
2321
2322 ! First check that the POR value is correct
2323 add %g2, 8, %g2
2324 ldx [%g2], %g4
2325 xorcc %g3, %g4, %g5
2326 bne test_failed
2327 nop
2328
2329 ! Next check that all the writable bits can be written
2330 stx %l2, [%g2] ! store inverted POR value
2331 ldx [%g2], %g4
2332 xorcc %g7, %g4, %g5
2333 bne test_failed
2334 nop
2335
2336
2337 ! First check that the POR value is correct
2338 add %g2, 8, %g2
2339 ldx [%g2], %g4
2340 xorcc %g3, %g4, %g5
2341 bne test_failed
2342 nop
2343
2344 ! Next check that all the writable bits can be written
2345 stx %l2, [%g2] ! store inverted POR value
2346 ldx [%g2], %g4
2347 xorcc %g7, %g4, %g5
2348 bne test_failed
2349 nop
2350
2351
2352 ! First check that the POR value is correct
2353 add %g2, 8, %g2
2354 ldx [%g2], %g4
2355 xorcc %g3, %g4, %g5
2356 bne test_failed
2357 nop
2358
2359 ! Next check that all the writable bits can be written
2360 stx %l2, [%g2] ! store inverted POR value
2361 ldx [%g2], %g4
2362 xorcc %g7, %g4, %g5
2363 bne test_failed
2364 nop
2365
2366
2367 ! First check that the POR value is correct
2368 add %g2, 8, %g2
2369 ldx [%g2], %g4
2370 xorcc %g3, %g4, %g5
2371 bne test_failed
2372 nop
2373
2374 ! Next check that all the writable bits can be written
2375 stx %l2, [%g2] ! store inverted POR value
2376 ldx [%g2], %g4
2377 xorcc %g7, %g4, %g5
2378 bne test_failed
2379 nop
2380
2381
2382 ! First check that the POR value is correct
2383 add %g2, 8, %g2
2384 ldx [%g2], %g4
2385 xorcc %g3, %g4, %g5
2386 bne test_failed
2387 nop
2388
2389 ! Next check that all the writable bits can be written
2390 stx %l2, [%g2] ! store inverted POR value
2391 ldx [%g2], %g4
2392 xorcc %g7, %g4, %g5
2393 bne test_failed
2394 nop
2395
2396
2397 ! First check that the POR value is correct
2398 add %g2, 8, %g2
2399 ldx [%g2], %g4
2400 xorcc %g3, %g4, %g5
2401 bne test_failed
2402 nop
2403
2404 ! Next check that all the writable bits can be written
2405 stx %l2, [%g2] ! store inverted POR value
2406 ldx [%g2], %g4
2407 xorcc %g7, %g4, %g5
2408 bne test_failed
2409 nop
2410
2411
2412 ! First check that the POR value is correct
2413 add %g2, 8, %g2
2414 ldx [%g2], %g4
2415 xorcc %g3, %g4, %g5
2416 bne test_failed
2417 nop
2418
2419 ! Next check that all the writable bits can be written
2420 stx %l2, [%g2] ! store inverted POR value
2421 ldx [%g2], %g4
2422 xorcc %g7, %g4, %g5
2423 bne test_failed
2424 nop
2425
2426
2427 ! First check that the POR value is correct
2428 add %g2, 8, %g2
2429 ldx [%g2], %g4
2430 xorcc %g3, %g4, %g5
2431 bne test_failed
2432 nop
2433
2434 ! Next check that all the writable bits can be written
2435 stx %l2, [%g2] ! store inverted POR value
2436 ldx [%g2], %g4
2437 xorcc %g7, %g4, %g5
2438 bne test_failed
2439 nop
2440
2441
2442 ! First check that the POR value is correct
2443 add %g2, 8, %g2
2444 ldx [%g2], %g4
2445 xorcc %g3, %g4, %g5
2446 bne test_failed
2447 nop
2448
2449 ! Next check that all the writable bits can be written
2450 stx %l2, [%g2] ! store inverted POR value
2451 ldx [%g2], %g4
2452 xorcc %g7, %g4, %g5
2453 bne test_failed
2454 nop
2455
2456
2457 ! First check that the POR value is correct
2458 add %g2, 8, %g2
2459 ldx [%g2], %g4
2460 xorcc %g3, %g4, %g5
2461 bne test_failed
2462 nop
2463
2464 ! Next check that all the writable bits can be written
2465 stx %l2, [%g2] ! store inverted POR value
2466 ldx [%g2], %g4
2467 xorcc %g7, %g4, %g5
2468 bne test_failed
2469 nop
2470
2471
2472 ! First check that the POR value is correct
2473 add %g2, 8, %g2
2474 ldx [%g2], %g4
2475 xorcc %g3, %g4, %g5
2476 bne test_failed
2477 nop
2478
2479 ! Next check that all the writable bits can be written
2480 stx %l2, [%g2] ! store inverted POR value
2481 ldx [%g2], %g4
2482 xorcc %g7, %g4, %g5
2483 bne test_failed
2484 nop
2485
2486
2487 ! First check that the POR value is correct
2488 add %g2, 8, %g2
2489 ldx [%g2], %g4
2490 xorcc %g3, %g4, %g5
2491 bne test_failed
2492 nop
2493
2494 ! Next check that all the writable bits can be written
2495 stx %l2, [%g2] ! store inverted POR value
2496 ldx [%g2], %g4
2497 xorcc %g7, %g4, %g5
2498 bne test_failed
2499 nop
2500
2501
2502 ! First check that the POR value is correct
2503 add %g2, 8, %g2
2504 ldx [%g2], %g4
2505 xorcc %g3, %g4, %g5
2506 bne test_failed
2507 nop
2508
2509 ! Next check that all the writable bits can be written
2510 stx %l2, [%g2] ! store inverted POR value
2511 ldx [%g2], %g4
2512 xorcc %g7, %g4, %g5
2513 bne test_failed
2514 nop
2515
2516
2517 ! First check that the POR value is correct
2518 add %g2, 8, %g2
2519 ldx [%g2], %g4
2520 xorcc %g3, %g4, %g5
2521 bne test_failed
2522 nop
2523
2524 ! Next check that all the writable bits can be written
2525 stx %l2, [%g2] ! store inverted POR value
2526 ldx [%g2], %g4
2527 xorcc %g7, %g4, %g5
2528 bne test_failed
2529 nop
2530
2531
2532 ! First check that the POR value is correct
2533 add %g2, 8, %g2
2534 ldx [%g2], %g4
2535 xorcc %g3, %g4, %g5
2536 bne test_failed
2537 nop
2538
2539 ! Next check that all the writable bits can be written
2540 stx %l2, [%g2] ! store inverted POR value
2541 ldx [%g2], %g4
2542 xorcc %g7, %g4, %g5
2543 bne test_failed
2544 nop
2545
2546
2547 ! First check that the POR value is correct
2548 add %g2, 8, %g2
2549 ldx [%g2], %g4
2550 xorcc %g3, %g4, %g5
2551 bne test_failed
2552 nop
2553
2554 ! Next check that all the writable bits can be written
2555 stx %l2, [%g2] ! store inverted POR value
2556 ldx [%g2], %g4
2557 xorcc %g7, %g4, %g5
2558 bne test_failed
2559 nop
2560
2561
2562 ! First check that the POR value is correct
2563 add %g2, 8, %g2
2564 ldx [%g2], %g4
2565 xorcc %g3, %g4, %g5
2566 bne test_failed
2567 nop
2568
2569 ! Next check that all the writable bits can be written
2570 stx %l2, [%g2] ! store inverted POR value
2571 ldx [%g2], %g4
2572 xorcc %g7, %g4, %g5
2573 bne test_failed
2574 nop
2575
2576
2577 ! First check that the POR value is correct
2578 add %g2, 8, %g2
2579 ldx [%g2], %g4
2580 xorcc %g3, %g4, %g5
2581 bne test_failed
2582 nop
2583
2584 ! Next check that all the writable bits can be written
2585 stx %l2, [%g2] ! store inverted POR value
2586 ldx [%g2], %g4
2587 xorcc %g7, %g4, %g5
2588 bne test_failed
2589 nop
2590
2591
2592 ! First check that the POR value is correct
2593 add %g2, 8, %g2
2594 ldx [%g2], %g4
2595 xorcc %g3, %g4, %g5
2596 bne test_failed
2597 nop
2598
2599 ! Next check that all the writable bits can be written
2600 stx %l2, [%g2] ! store inverted POR value
2601 ldx [%g2], %g4
2602 xorcc %g7, %g4, %g5
2603 bne test_failed
2604 nop
2605
2606
2607 ! First check that the POR value is correct
2608 add %g2, 8, %g2
2609 ldx [%g2], %g4
2610 xorcc %g3, %g4, %g5
2611 bne test_failed
2612 nop
2613
2614 ! Next check that all the writable bits can be written
2615 stx %l2, [%g2] ! store inverted POR value
2616 ldx [%g2], %g4
2617 xorcc %g7, %g4, %g5
2618 bne test_failed
2619 nop
2620
2621
2622 ! First check that the POR value is correct
2623 add %g2, 8, %g2
2624 ldx [%g2], %g4
2625 xorcc %g3, %g4, %g5
2626 bne test_failed
2627 nop
2628
2629 ! Next check that all the writable bits can be written
2630 stx %l2, [%g2] ! store inverted POR value
2631 ldx [%g2], %g4
2632 xorcc %g7, %g4, %g5
2633 bne test_failed
2634 nop
2635
2636
2637 ! First check that the POR value is correct
2638 add %g2, 8, %g2
2639 ldx [%g2], %g4
2640 xorcc %g3, %g4, %g5
2641 bne test_failed
2642 nop
2643
2644 ! Next check that all the writable bits can be written
2645 stx %l2, [%g2] ! store inverted POR value
2646 ldx [%g2], %g4
2647 xorcc %g7, %g4, %g5
2648 bne test_failed
2649 nop
2650
2651
2652 ! First check that the POR value is correct
2653 add %g2, 8, %g2
2654 ldx [%g2], %g4
2655 xorcc %g3, %g4, %g5
2656 bne test_failed
2657 nop
2658
2659 ! Next check that all the writable bits can be written
2660 stx %l2, [%g2] ! store inverted POR value
2661 ldx [%g2], %g4
2662 xorcc %g7, %g4, %g5
2663 bne test_failed
2664 nop
2665
2666
2667 ! First check that the POR value is correct
2668 add %g2, 8, %g2
2669 ldx [%g2], %g4
2670 xorcc %g3, %g4, %g5
2671 bne test_failed
2672 nop
2673
2674 ! Next check that all the writable bits can be written
2675 stx %l2, [%g2] ! store inverted POR value
2676 ldx [%g2], %g4
2677 xorcc %g7, %g4, %g5
2678 bne test_failed
2679 nop
2680
2681
2682 ! First check that the POR value is correct
2683 add %g2, 8, %g2
2684 ldx [%g2], %g4
2685 xorcc %g3, %g4, %g5
2686 bne test_failed
2687 nop
2688
2689 ! Next check that all the writable bits can be written
2690 stx %l2, [%g2] ! store inverted POR value
2691 ldx [%g2], %g4
2692 xorcc %g7, %g4, %g5
2693 bne test_failed
2694 nop
2695
2696
2697 ! First check that the POR value is correct
2698 add %g2, 8, %g2
2699 ldx [%g2], %g4
2700 xorcc %g3, %g4, %g5
2701 bne test_failed
2702 nop
2703
2704 ! Next check that all the writable bits can be written
2705 stx %l2, [%g2] ! store inverted POR value
2706 ldx [%g2], %g4
2707 xorcc %g7, %g4, %g5
2708 bne test_failed
2709 nop
2710
2711
2712 ! First check that the POR value is correct
2713 add %g2, 8, %g2
2714 ldx [%g2], %g4
2715 xorcc %g3, %g4, %g5
2716 bne test_failed
2717 nop
2718
2719 ! Next check that all the writable bits can be written
2720 stx %l2, [%g2] ! store inverted POR value
2721 ldx [%g2], %g4
2722 xorcc %g7, %g4, %g5
2723 bne test_failed
2724 nop
2725
2726
2727 ! First check that the POR value is correct
2728 add %g2, 8, %g2
2729 ldx [%g2], %g4
2730 xorcc %g3, %g4, %g5
2731 bne test_failed
2732 nop
2733
2734 ! Next check that all the writable bits can be written
2735 stx %l2, [%g2] ! store inverted POR value
2736 ldx [%g2], %g4
2737 xorcc %g7, %g4, %g5
2738 bne test_failed
2739 nop
2740
2741
2742 ! First check that the POR value is correct
2743 add %g2, 8, %g2
2744 ldx [%g2], %g4
2745 xorcc %g3, %g4, %g5
2746 bne test_failed
2747 nop
2748
2749 ! Next check that all the writable bits can be written
2750 stx %l2, [%g2] ! store inverted POR value
2751 ldx [%g2], %g4
2752 xorcc %g7, %g4, %g5
2753 bne test_failed
2754 nop
2755
2756
2757 ! First check that the POR value is correct
2758 add %g2, 8, %g2
2759 ldx [%g2], %g4
2760 xorcc %g3, %g4, %g5
2761 bne test_failed
2762 nop
2763
2764 ! Next check that all the writable bits can be written
2765 stx %l2, [%g2] ! store inverted POR value
2766 ldx [%g2], %g4
2767 xorcc %g7, %g4, %g5
2768 bne test_failed
2769 nop
2770
2771
2772REG_TEST_27:
2773 ! First check that the POR value is correct
2774 setx FIRE_DLC_IMU_EQS_CSR_A_EQ_HEAD_ADDR, %g1, %g2
2775 best_set_reg(FIRE_DLC_IMU_EQS_CSR_A_EQ_HEAD_POR_VALUE, %g1, %g3)
2776 ldx [%g2], %g4
2777 xorcc %g3, %g4, %g5
2778 bne test_failed
2779 nop
2780
2781 ! Next check that all the writable bits can be written
2782 xor %g3, %l1, %l2
2783 stx %l2, [%g2] ! store inverted POR value
2784
2785#define REG_27_EXP_VALUE mpeval( (~FIRE_DLC_IMU_EQS_CSR_A_EQ_HEAD_POR_VALUE & FIRE_DLC_IMU_EQS_CSR_A_EQ_HEAD_WRITE_MASK) | (FIRE_DLC_IMU_EQS_CSR_A_EQ_HEAD_POR_VALUE & ~FIRE_DLC_IMU_EQS_CSR_A_EQ_HEAD_WRITE_MASK) )
2786
2787 best_set_reg(REG_27_EXP_VALUE, %g1, %g7) ! get expected value
2788 ldx [%g2], %g4
2789 xorcc %g7, %g4, %g5
2790 bne test_failed
2791 nop
2792
2793
2794 ! First check that the POR value is correct
2795 add %g2, 8, %g2
2796 ldx [%g2], %g4
2797 xorcc %g3, %g4, %g5
2798 bne test_failed
2799 nop
2800
2801 ! Next check that all the writable bits can be written
2802 stx %l2, [%g2] ! store inverted POR value
2803 ldx [%g2], %g4
2804 xorcc %g7, %g4, %g5
2805 bne test_failed
2806 nop
2807
2808
2809 ! First check that the POR value is correct
2810 add %g2, 8, %g2
2811 ldx [%g2], %g4
2812 xorcc %g3, %g4, %g5
2813 bne test_failed
2814 nop
2815
2816 ! Next check that all the writable bits can be written
2817 stx %l2, [%g2] ! store inverted POR value
2818 ldx [%g2], %g4
2819 xorcc %g7, %g4, %g5
2820 bne test_failed
2821 nop
2822
2823
2824 ! First check that the POR value is correct
2825 add %g2, 8, %g2
2826 ldx [%g2], %g4
2827 xorcc %g3, %g4, %g5
2828 bne test_failed
2829 nop
2830
2831 ! Next check that all the writable bits can be written
2832 stx %l2, [%g2] ! store inverted POR value
2833 ldx [%g2], %g4
2834 xorcc %g7, %g4, %g5
2835 bne test_failed
2836 nop
2837
2838
2839 ! First check that the POR value is correct
2840 add %g2, 8, %g2
2841 ldx [%g2], %g4
2842 xorcc %g3, %g4, %g5
2843 bne test_failed
2844 nop
2845
2846 ! Next check that all the writable bits can be written
2847 stx %l2, [%g2] ! store inverted POR value
2848 ldx [%g2], %g4
2849 xorcc %g7, %g4, %g5
2850 bne test_failed
2851 nop
2852
2853
2854 ! First check that the POR value is correct
2855 add %g2, 8, %g2
2856 ldx [%g2], %g4
2857 xorcc %g3, %g4, %g5
2858 bne test_failed
2859 nop
2860
2861 ! Next check that all the writable bits can be written
2862 stx %l2, [%g2] ! store inverted POR value
2863 ldx [%g2], %g4
2864 xorcc %g7, %g4, %g5
2865 bne test_failed
2866 nop
2867
2868
2869 ! First check that the POR value is correct
2870 add %g2, 8, %g2
2871 ldx [%g2], %g4
2872 xorcc %g3, %g4, %g5
2873 bne test_failed
2874 nop
2875
2876 ! Next check that all the writable bits can be written
2877 stx %l2, [%g2] ! store inverted POR value
2878 ldx [%g2], %g4
2879 xorcc %g7, %g4, %g5
2880 bne test_failed
2881 nop
2882
2883
2884 ! First check that the POR value is correct
2885 add %g2, 8, %g2
2886 ldx [%g2], %g4
2887 xorcc %g3, %g4, %g5
2888 bne test_failed
2889 nop
2890
2891 ! Next check that all the writable bits can be written
2892 stx %l2, [%g2] ! store inverted POR value
2893 ldx [%g2], %g4
2894 xorcc %g7, %g4, %g5
2895 bne test_failed
2896 nop
2897
2898
2899 ! First check that the POR value is correct
2900 add %g2, 8, %g2
2901 ldx [%g2], %g4
2902 xorcc %g3, %g4, %g5
2903 bne test_failed
2904 nop
2905
2906 ! Next check that all the writable bits can be written
2907 stx %l2, [%g2] ! store inverted POR value
2908 ldx [%g2], %g4
2909 xorcc %g7, %g4, %g5
2910 bne test_failed
2911 nop
2912
2913
2914 ! First check that the POR value is correct
2915 add %g2, 8, %g2
2916 ldx [%g2], %g4
2917 xorcc %g3, %g4, %g5
2918 bne test_failed
2919 nop
2920
2921 ! Next check that all the writable bits can be written
2922 stx %l2, [%g2] ! store inverted POR value
2923 ldx [%g2], %g4
2924 xorcc %g7, %g4, %g5
2925 bne test_failed
2926 nop
2927
2928
2929 ! First check that the POR value is correct
2930 add %g2, 8, %g2
2931 ldx [%g2], %g4
2932 xorcc %g3, %g4, %g5
2933 bne test_failed
2934 nop
2935
2936 ! Next check that all the writable bits can be written
2937 stx %l2, [%g2] ! store inverted POR value
2938 ldx [%g2], %g4
2939 xorcc %g7, %g4, %g5
2940 bne test_failed
2941 nop
2942
2943
2944 ! First check that the POR value is correct
2945 add %g2, 8, %g2
2946 ldx [%g2], %g4
2947 xorcc %g3, %g4, %g5
2948 bne test_failed
2949 nop
2950
2951 ! Next check that all the writable bits can be written
2952 stx %l2, [%g2] ! store inverted POR value
2953 ldx [%g2], %g4
2954 xorcc %g7, %g4, %g5
2955 bne test_failed
2956 nop
2957
2958
2959 ! First check that the POR value is correct
2960 add %g2, 8, %g2
2961 ldx [%g2], %g4
2962 xorcc %g3, %g4, %g5
2963 bne test_failed
2964 nop
2965
2966 ! Next check that all the writable bits can be written
2967 stx %l2, [%g2] ! store inverted POR value
2968 ldx [%g2], %g4
2969 xorcc %g7, %g4, %g5
2970 bne test_failed
2971 nop
2972
2973
2974 ! First check that the POR value is correct
2975 add %g2, 8, %g2
2976 ldx [%g2], %g4
2977 xorcc %g3, %g4, %g5
2978 bne test_failed
2979 nop
2980
2981 ! Next check that all the writable bits can be written
2982 stx %l2, [%g2] ! store inverted POR value
2983 ldx [%g2], %g4
2984 xorcc %g7, %g4, %g5
2985 bne test_failed
2986 nop
2987
2988
2989 ! First check that the POR value is correct
2990 add %g2, 8, %g2
2991 ldx [%g2], %g4
2992 xorcc %g3, %g4, %g5
2993 bne test_failed
2994 nop
2995
2996 ! Next check that all the writable bits can be written
2997 stx %l2, [%g2] ! store inverted POR value
2998 ldx [%g2], %g4
2999 xorcc %g7, %g4, %g5
3000 bne test_failed
3001 nop
3002
3003
3004 ! First check that the POR value is correct
3005 add %g2, 8, %g2
3006 ldx [%g2], %g4
3007 xorcc %g3, %g4, %g5
3008 bne test_failed
3009 nop
3010
3011 ! Next check that all the writable bits can be written
3012 stx %l2, [%g2] ! store inverted POR value
3013 ldx [%g2], %g4
3014 xorcc %g7, %g4, %g5
3015 bne test_failed
3016 nop
3017
3018
3019 ! First check that the POR value is correct
3020 add %g2, 8, %g2
3021 ldx [%g2], %g4
3022 xorcc %g3, %g4, %g5
3023 bne test_failed
3024 nop
3025
3026 ! Next check that all the writable bits can be written
3027 stx %l2, [%g2] ! store inverted POR value
3028 ldx [%g2], %g4
3029 xorcc %g7, %g4, %g5
3030 bne test_failed
3031 nop
3032
3033
3034 ! First check that the POR value is correct
3035 add %g2, 8, %g2
3036 ldx [%g2], %g4
3037 xorcc %g3, %g4, %g5
3038 bne test_failed
3039 nop
3040
3041 ! Next check that all the writable bits can be written
3042 stx %l2, [%g2] ! store inverted POR value
3043 ldx [%g2], %g4
3044 xorcc %g7, %g4, %g5
3045 bne test_failed
3046 nop
3047
3048
3049 ! First check that the POR value is correct
3050 add %g2, 8, %g2
3051 ldx [%g2], %g4
3052 xorcc %g3, %g4, %g5
3053 bne test_failed
3054 nop
3055
3056 ! Next check that all the writable bits can be written
3057 stx %l2, [%g2] ! store inverted POR value
3058 ldx [%g2], %g4
3059 xorcc %g7, %g4, %g5
3060 bne test_failed
3061 nop
3062
3063
3064 ! First check that the POR value is correct
3065 add %g2, 8, %g2
3066 ldx [%g2], %g4
3067 xorcc %g3, %g4, %g5
3068 bne test_failed
3069 nop
3070
3071 ! Next check that all the writable bits can be written
3072 stx %l2, [%g2] ! store inverted POR value
3073 ldx [%g2], %g4
3074 xorcc %g7, %g4, %g5
3075 bne test_failed
3076 nop
3077
3078
3079 ! First check that the POR value is correct
3080 add %g2, 8, %g2
3081 ldx [%g2], %g4
3082 xorcc %g3, %g4, %g5
3083 bne test_failed
3084 nop
3085
3086 ! Next check that all the writable bits can be written
3087 stx %l2, [%g2] ! store inverted POR value
3088 ldx [%g2], %g4
3089 xorcc %g7, %g4, %g5
3090 bne test_failed
3091 nop
3092
3093
3094 ! First check that the POR value is correct
3095 add %g2, 8, %g2
3096 ldx [%g2], %g4
3097 xorcc %g3, %g4, %g5
3098 bne test_failed
3099 nop
3100
3101 ! Next check that all the writable bits can be written
3102 stx %l2, [%g2] ! store inverted POR value
3103 ldx [%g2], %g4
3104 xorcc %g7, %g4, %g5
3105 bne test_failed
3106 nop
3107
3108
3109 ! First check that the POR value is correct
3110 add %g2, 8, %g2
3111 ldx [%g2], %g4
3112 xorcc %g3, %g4, %g5
3113 bne test_failed
3114 nop
3115
3116 ! Next check that all the writable bits can be written
3117 stx %l2, [%g2] ! store inverted POR value
3118 ldx [%g2], %g4
3119 xorcc %g7, %g4, %g5
3120 bne test_failed
3121 nop
3122
3123
3124 ! First check that the POR value is correct
3125 add %g2, 8, %g2
3126 ldx [%g2], %g4
3127 xorcc %g3, %g4, %g5
3128 bne test_failed
3129 nop
3130
3131 ! Next check that all the writable bits can be written
3132 stx %l2, [%g2] ! store inverted POR value
3133 ldx [%g2], %g4
3134 xorcc %g7, %g4, %g5
3135 bne test_failed
3136 nop
3137
3138
3139 ! First check that the POR value is correct
3140 add %g2, 8, %g2
3141 ldx [%g2], %g4
3142 xorcc %g3, %g4, %g5
3143 bne test_failed
3144 nop
3145
3146 ! Next check that all the writable bits can be written
3147 stx %l2, [%g2] ! store inverted POR value
3148 ldx [%g2], %g4
3149 xorcc %g7, %g4, %g5
3150 bne test_failed
3151 nop
3152
3153
3154 ! First check that the POR value is correct
3155 add %g2, 8, %g2
3156 ldx [%g2], %g4
3157 xorcc %g3, %g4, %g5
3158 bne test_failed
3159 nop
3160
3161 ! Next check that all the writable bits can be written
3162 stx %l2, [%g2] ! store inverted POR value
3163 ldx [%g2], %g4
3164 xorcc %g7, %g4, %g5
3165 bne test_failed
3166 nop
3167
3168
3169 ! First check that the POR value is correct
3170 add %g2, 8, %g2
3171 ldx [%g2], %g4
3172 xorcc %g3, %g4, %g5
3173 bne test_failed
3174 nop
3175
3176 ! Next check that all the writable bits can be written
3177 stx %l2, [%g2] ! store inverted POR value
3178 ldx [%g2], %g4
3179 xorcc %g7, %g4, %g5
3180 bne test_failed
3181 nop
3182
3183
3184 ! First check that the POR value is correct
3185 add %g2, 8, %g2
3186 ldx [%g2], %g4
3187 xorcc %g3, %g4, %g5
3188 bne test_failed
3189 nop
3190
3191 ! Next check that all the writable bits can be written
3192 stx %l2, [%g2] ! store inverted POR value
3193 ldx [%g2], %g4
3194 xorcc %g7, %g4, %g5
3195 bne test_failed
3196 nop
3197
3198
3199 ! First check that the POR value is correct
3200 add %g2, 8, %g2
3201 ldx [%g2], %g4
3202 xorcc %g3, %g4, %g5
3203 bne test_failed
3204 nop
3205
3206 ! Next check that all the writable bits can be written
3207 stx %l2, [%g2] ! store inverted POR value
3208 ldx [%g2], %g4
3209 xorcc %g7, %g4, %g5
3210 bne test_failed
3211 nop
3212
3213
3214 ! First check that the POR value is correct
3215 add %g2, 8, %g2
3216 ldx [%g2], %g4
3217 xorcc %g3, %g4, %g5
3218 bne test_failed
3219 nop
3220
3221 ! Next check that all the writable bits can be written
3222 stx %l2, [%g2] ! store inverted POR value
3223 ldx [%g2], %g4
3224 xorcc %g7, %g4, %g5
3225 bne test_failed
3226 nop
3227
3228
3229 ! First check that the POR value is correct
3230 add %g2, 8, %g2
3231 ldx [%g2], %g4
3232 xorcc %g3, %g4, %g5
3233 bne test_failed
3234 nop
3235
3236 ! Next check that all the writable bits can be written
3237 stx %l2, [%g2] ! store inverted POR value
3238 ldx [%g2], %g4
3239 xorcc %g7, %g4, %g5
3240 bne test_failed
3241 nop
3242
3243
3244 ! First check that the POR value is correct
3245 add %g2, 8, %g2
3246 ldx [%g2], %g4
3247 xorcc %g3, %g4, %g5
3248 bne test_failed
3249 nop
3250
3251 ! Next check that all the writable bits can be written
3252 stx %l2, [%g2] ! store inverted POR value
3253 ldx [%g2], %g4
3254 xorcc %g7, %g4, %g5
3255 bne test_failed
3256 nop
3257
3258
3259 ! First check that the POR value is correct
3260 add %g2, 8, %g2
3261 ldx [%g2], %g4
3262 xorcc %g3, %g4, %g5
3263 bne test_failed
3264 nop
3265
3266 ! Next check that all the writable bits can be written
3267 stx %l2, [%g2] ! store inverted POR value
3268 ldx [%g2], %g4
3269 xorcc %g7, %g4, %g5
3270 bne test_failed
3271 nop
3272
3273
3274 ! First check that the POR value is correct
3275 add %g2, 8, %g2
3276 ldx [%g2], %g4
3277 xorcc %g3, %g4, %g5
3278 bne test_failed
3279 nop
3280
3281 ! Next check that all the writable bits can be written
3282 stx %l2, [%g2] ! store inverted POR value
3283 ldx [%g2], %g4
3284 xorcc %g7, %g4, %g5
3285 bne test_failed
3286 nop
3287
3288
3289 ! First check that the POR value is correct
3290 add %g2, 8, %g2
3291 ldx [%g2], %g4
3292 xorcc %g3, %g4, %g5
3293 bne test_failed
3294 nop
3295
3296 ! Next check that all the writable bits can be written
3297 stx %l2, [%g2] ! store inverted POR value
3298 ldx [%g2], %g4
3299 xorcc %g7, %g4, %g5
3300 bne test_failed
3301 nop
3302
3303
3304 ! First check that the POR value is correct
3305 add %g2, 8, %g2
3306 ldx [%g2], %g4
3307 xorcc %g3, %g4, %g5
3308 bne test_failed
3309 nop
3310
3311 ! Next check that all the writable bits can be written
3312 stx %l2, [%g2] ! store inverted POR value
3313 ldx [%g2], %g4
3314 xorcc %g7, %g4, %g5
3315 bne test_failed
3316 nop
3317
3318
3319REG_TEST_28:
3320 ! First check that the POR value is correct
3321 setx FIRE_DLC_IMU_ICS_CSR_A_IMU_ERROR_LOG_EN_REG_ADDR, %g1, %g2
3322 best_set_reg(FIRE_DLC_IMU_ICS_CSR_A_IMU_ERROR_LOG_EN_REG_POR_VALUE, %g1, %g3)
3323 ldx [%g2], %g4
3324 xorcc %g3, %g4, %g5
3325 bne test_failed
3326 nop
3327
3328 ! Next check that all the writable bits can be written
3329 xor %g3, %l1, %l2
3330 stx %l2, [%g2] ! store inverted POR value
3331
3332#define REG_28_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ICS_CSR_A_IMU_ERROR_LOG_EN_REG_POR_VALUE & FIRE_DLC_IMU_ICS_CSR_A_IMU_ERROR_LOG_EN_REG_WRITE_MASK) | (FIRE_DLC_IMU_ICS_CSR_A_IMU_ERROR_LOG_EN_REG_POR_VALUE & ~FIRE_DLC_IMU_ICS_CSR_A_IMU_ERROR_LOG_EN_REG_WRITE_MASK) )
3333
3334 best_set_reg(REG_28_EXP_VALUE, %g1, %g7) ! get expected value
3335 ldx [%g2], %g4
3336 xorcc %g7, %g4, %g5
3337 bne test_failed
3338 nop
3339
3340
3341REG_TEST_29:
3342 ! First check that the POR value is correct
3343 setx FIRE_DLC_IMU_ICS_CSR_A_IMU_INT_EN_REG_ADDR, %g1, %g2
3344 best_set_reg(FIRE_DLC_IMU_ICS_CSR_A_IMU_INT_EN_REG_POR_VALUE, %g1, %g3)
3345 ldx [%g2], %g4
3346 xorcc %g3, %g4, %g5
3347 bne test_failed
3348 nop
3349
3350 ! Next check that all the writable bits can be written
3351 xor %g3, %l1, %l2
3352 stx %l2, [%g2] ! store inverted POR value
3353
3354#define REG_29_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ICS_CSR_A_IMU_INT_EN_REG_POR_VALUE & FIRE_DLC_IMU_ICS_CSR_A_IMU_INT_EN_REG_WRITE_MASK) | (FIRE_DLC_IMU_ICS_CSR_A_IMU_INT_EN_REG_POR_VALUE & ~FIRE_DLC_IMU_ICS_CSR_A_IMU_INT_EN_REG_WRITE_MASK) )
3355
3356 best_set_reg(REG_29_EXP_VALUE, %g1, %g7) ! get expected value
3357 ldx [%g2], %g4
3358 xorcc %g7, %g4, %g5
3359 bne test_failed
3360 nop
3361
3362
3363REG_TEST_30:
3364 ! First check that the POR value is correct
3365 setx FIRE_DLC_IMU_ICS_CSR_A_IMU_ENABLED_ERROR_STATUS_REG_ADDR, %g1, %g2
3366 best_set_reg(FIRE_DLC_IMU_ICS_CSR_A_IMU_ENABLED_ERROR_STATUS_REG_POR_VALUE, %g1, %g3)
3367 ldx [%g2], %g4
3368 xorcc %g3, %g4, %g5
3369 bne test_failed
3370 nop
3371
3372 ! Next check that all the writable bits can be written
3373 xor %g3, %l1, %l2
3374 stx %l2, [%g2] ! store inverted POR value
3375
3376#define REG_30_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ICS_CSR_A_IMU_ENABLED_ERROR_STATUS_REG_POR_VALUE & FIRE_DLC_IMU_ICS_CSR_A_IMU_ENABLED_ERROR_STATUS_REG_WRITE_MASK) | (FIRE_DLC_IMU_ICS_CSR_A_IMU_ENABLED_ERROR_STATUS_REG_POR_VALUE & ~FIRE_DLC_IMU_ICS_CSR_A_IMU_ENABLED_ERROR_STATUS_REG_WRITE_MASK) )
3377
3378 best_set_reg(REG_30_EXP_VALUE, %g1, %g7) ! get expected value
3379 ldx [%g2], %g4
3380 xorcc %g7, %g4, %g5
3381 bne test_failed
3382 nop
3383
3384
3385REG_TEST_31:
3386 ! First check that the POR value is correct
3387 setx FIRE_DLC_IMU_ICS_CSR_A_IMU_LOGGED_ERROR_STATUS_REG_RW1C_ALIAS_ADDR, %g1, %g2
3388 best_set_reg(FIRE_DLC_IMU_ICS_CSR_A_IMU_LOGGED_ERROR_STATUS_REG_RW1C_ALIAS_POR_VALUE, %g1, %g3)
3389 ldx [%g2], %g4
3390 xorcc %g3, %g4, %g5
3391 bne test_failed
3392 nop
3393
3394 ! Next check that all the writable bits can be written
3395 xor %g3, %l1, %l2
3396 stx %l2, [%g2] ! store inverted POR value
3397
3398#define REG_31_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ICS_CSR_A_IMU_LOGGED_ERROR_STATUS_REG_RW1C_ALIAS_POR_VALUE & 0) | (FIRE_DLC_IMU_ICS_CSR_A_IMU_LOGGED_ERROR_STATUS_REG_RW1C_ALIAS_POR_VALUE & ~0) )
3399
3400 best_set_reg(REG_31_EXP_VALUE, %g1, %g7) ! get expected value
3401 ldx [%g2], %g4
3402 xorcc %g7, %g4, %g5
3403 bne test_failed
3404 nop
3405
3406
3407REG_TEST_32:
3408 ! First check that the POR value is correct
3409 setx FIRE_DLC_IMU_ICS_CSR_A_IMU_LOGGED_ERROR_STATUS_REG_RW1S_ALIAS_ADDR, %g1, %g2
3410 best_set_reg(FIRE_DLC_IMU_ICS_CSR_A_IMU_LOGGED_ERROR_STATUS_REG_RW1S_ALIAS_POR_VALUE, %g1, %g3)
3411 ldx [%g2], %g4
3412 xorcc %g3, %g4, %g5
3413 bne test_failed
3414 nop
3415
3416 ! Next check that all the writable bits can be written
3417 xor %g3, %l1, %l2
3418 stx %l2, [%g2] ! store inverted POR value
3419
3420#define REG_32_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ICS_CSR_A_IMU_LOGGED_ERROR_STATUS_REG_RW1S_ALIAS_POR_VALUE & FIRE_DLC_IMU_ICS_CSR_A_IMU_LOGGED_ERROR_STATUS_REG_RW1S_ALIAS_WRITE_MASK) | (FIRE_DLC_IMU_ICS_CSR_A_IMU_LOGGED_ERROR_STATUS_REG_RW1S_ALIAS_POR_VALUE & ~FIRE_DLC_IMU_ICS_CSR_A_IMU_LOGGED_ERROR_STATUS_REG_RW1S_ALIAS_WRITE_MASK) )
3421
3422 best_set_reg(REG_32_EXP_VALUE, %g1, %g7) ! get expected value
3423 ldx [%g2], %g4
3424 xorcc %g7, %g4, %g5
3425 bne test_failed
3426 nop
3427
3428
3429REG_TEST_33:
3430 ! First check that the POR value is correct
3431 setx FIRE_DLC_IMU_ICS_CSR_A_IMU_RDS_ERROR_LOG_REG_ADDR, %g1, %g2
3432 best_set_reg(FIRE_DLC_IMU_ICS_CSR_A_IMU_RDS_ERROR_LOG_REG_POR_VALUE, %g1, %g3)
3433 ldx [%g2], %g4
3434 xorcc %g3, %g4, %g5
3435 bne test_failed
3436 nop
3437
3438 ! Next check that all the writable bits can be written
3439 xor %g3, %l1, %l2
3440 stx %l2, [%g2] ! store inverted POR value
3441
3442#define REG_33_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ICS_CSR_A_IMU_RDS_ERROR_LOG_REG_POR_VALUE & FIRE_DLC_IMU_ICS_CSR_A_IMU_RDS_ERROR_LOG_REG_WRITE_MASK) | (FIRE_DLC_IMU_ICS_CSR_A_IMU_RDS_ERROR_LOG_REG_POR_VALUE & ~FIRE_DLC_IMU_ICS_CSR_A_IMU_RDS_ERROR_LOG_REG_WRITE_MASK) )
3443
3444 best_set_reg(REG_33_EXP_VALUE, %g1, %g7) ! get expected value
3445 ldx [%g2], %g4
3446 xorcc %g7, %g4, %g5
3447 bne test_failed
3448 nop
3449
3450
3451REG_TEST_34:
3452 ! First check that the POR value is correct
3453 setx FIRE_DLC_IMU_ICS_CSR_A_IMU_SCS_ERROR_LOG_REG_ADDR, %g1, %g2
3454 best_set_reg(FIRE_DLC_IMU_ICS_CSR_A_IMU_SCS_ERROR_LOG_REG_POR_VALUE, %g1, %g3)
3455 ldx [%g2], %g4
3456 xorcc %g3, %g4, %g5
3457 bne test_failed
3458 nop
3459
3460 ! Next check that all the writable bits can be written
3461 xor %g3, %l1, %l2
3462 stx %l2, [%g2] ! store inverted POR value
3463
3464#define REG_34_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ICS_CSR_A_IMU_SCS_ERROR_LOG_REG_POR_VALUE & FIRE_DLC_IMU_ICS_CSR_A_IMU_SCS_ERROR_LOG_REG_WRITE_MASK) | (FIRE_DLC_IMU_ICS_CSR_A_IMU_SCS_ERROR_LOG_REG_POR_VALUE & ~FIRE_DLC_IMU_ICS_CSR_A_IMU_SCS_ERROR_LOG_REG_WRITE_MASK) )
3465
3466 best_set_reg(REG_34_EXP_VALUE, %g1, %g7) ! get expected value
3467 ldx [%g2], %g4
3468 xorcc %g7, %g4, %g5
3469 bne test_failed
3470 nop
3471
3472
3473REG_TEST_35:
3474 ! First check that the POR value is correct
3475 setx FIRE_DLC_IMU_ICS_CSR_A_IMU_EQS_ERROR_LOG_REG_ADDR, %g1, %g2
3476 best_set_reg(FIRE_DLC_IMU_ICS_CSR_A_IMU_EQS_ERROR_LOG_REG_POR_VALUE, %g1, %g3)
3477 ldx [%g2], %g4
3478 xorcc %g3, %g4, %g5
3479 bne test_failed
3480 nop
3481
3482 ! Next check that all the writable bits can be written
3483 xor %g3, %l1, %l2
3484 stx %l2, [%g2] ! store inverted POR value
3485
3486#define REG_35_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ICS_CSR_A_IMU_EQS_ERROR_LOG_REG_POR_VALUE & FIRE_DLC_IMU_ICS_CSR_A_IMU_EQS_ERROR_LOG_REG_WRITE_MASK) | (FIRE_DLC_IMU_ICS_CSR_A_IMU_EQS_ERROR_LOG_REG_POR_VALUE & ~FIRE_DLC_IMU_ICS_CSR_A_IMU_EQS_ERROR_LOG_REG_WRITE_MASK) )
3487
3488 best_set_reg(REG_35_EXP_VALUE, %g1, %g7) ! get expected value
3489 ldx [%g2], %g4
3490 xorcc %g7, %g4, %g5
3491 bne test_failed
3492 nop
3493
3494
3495REG_TEST_36:
3496 ! First check that the POR value is correct
3497 setx FIRE_DLC_IMU_ICS_CSR_A_DMC_INTERRUPT_MASK_REG_ADDR, %g1, %g2
3498 best_set_reg(FIRE_DLC_IMU_ICS_CSR_A_DMC_INTERRUPT_MASK_REG_POR_VALUE, %g1, %g3)
3499 ldx [%g2], %g4
3500 xorcc %g3, %g4, %g5
3501 bne test_failed
3502 nop
3503
3504 ! Next check that all the writable bits can be written
3505 xor %g3, %l1, %l2
3506 stx %l2, [%g2] ! store inverted POR value
3507
3508#define REG_36_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ICS_CSR_A_DMC_INTERRUPT_MASK_REG_POR_VALUE & FIRE_DLC_IMU_ICS_CSR_A_DMC_INTERRUPT_MASK_REG_WRITE_MASK) | (FIRE_DLC_IMU_ICS_CSR_A_DMC_INTERRUPT_MASK_REG_POR_VALUE & ~FIRE_DLC_IMU_ICS_CSR_A_DMC_INTERRUPT_MASK_REG_WRITE_MASK) )
3509
3510 best_set_reg(REG_36_EXP_VALUE, %g1, %g7) ! get expected value
3511 ldx [%g2], %g4
3512 xorcc %g7, %g4, %g5
3513 bne test_failed
3514 nop
3515
3516
3517REG_TEST_37:
3518 ! First check that the POR value is correct
3519 setx FIRE_DLC_IMU_ICS_CSR_A_DMC_INTERRUPT_STATUS_REG_ADDR, %g1, %g2
3520 best_set_reg(FIRE_DLC_IMU_ICS_CSR_A_DMC_INTERRUPT_STATUS_REG_POR_VALUE, %g1, %g3)
3521 ldx [%g2], %g4
3522 xorcc %g3, %g4, %g5
3523 !bne test_failed ! writing to other regs set bits here
3524 nop
3525
3526 ! Next check that all the writable bits can be written
3527 xor %g3, %l1, %l2
3528 stx %l2, [%g2] ! store inverted POR value
3529
3530#define REG_37_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ICS_CSR_A_DMC_INTERRUPT_STATUS_REG_POR_VALUE & FIRE_DLC_IMU_ICS_CSR_A_DMC_INTERRUPT_STATUS_REG_WRITE_MASK) | (FIRE_DLC_IMU_ICS_CSR_A_DMC_INTERRUPT_STATUS_REG_POR_VALUE & ~FIRE_DLC_IMU_ICS_CSR_A_DMC_INTERRUPT_STATUS_REG_WRITE_MASK) )
3531
3532 best_set_reg(REG_37_EXP_VALUE, %g1, %g7) ! get expected value
3533 ldx [%g2], %g4
3534 xorcc %g7, %g4, %g5
3535 !bne test_failed ! writing to other regs set bits here
3536 nop
3537
3538
3539REG_TEST_38:
3540 ! First check that the POR value is correct
3541 setx FIRE_DLC_IMU_ICS_CSR_A_IMU_PERF_CNTRL_ADDR, %g1, %g2
3542 best_set_reg(FIRE_DLC_IMU_ICS_CSR_A_IMU_PERF_CNTRL_POR_VALUE, %g1, %g3)
3543 ldx [%g2], %g4
3544 xorcc %g3, %g4, %g5
3545 bne test_failed
3546 nop
3547
3548 ! Next check that all the writable bits can be written
3549 xor %g3, %l1, %l2
3550 stx %l2, [%g2] ! store inverted POR value
3551
3552#define REG_38_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ICS_CSR_A_IMU_PERF_CNTRL_POR_VALUE & FIRE_DLC_IMU_ICS_CSR_A_IMU_PERF_CNTRL_WRITE_MASK) | (FIRE_DLC_IMU_ICS_CSR_A_IMU_PERF_CNTRL_POR_VALUE & ~FIRE_DLC_IMU_ICS_CSR_A_IMU_PERF_CNTRL_WRITE_MASK) )
3553
3554 best_set_reg(REG_38_EXP_VALUE, %g1, %g7) ! get expected value
3555 ldx [%g2], %g4
3556 xorcc %g7, %g4, %g5
3557 bne test_failed
3558 nop
3559
3560
3561REG_TEST_39:
3562 ! First check that the POR value is correct
3563 setx FIRE_DLC_IMU_ICS_CSR_A_IMU_PERF_CNT0_ADDR, %g1, %g2
3564 best_set_reg(FIRE_DLC_IMU_ICS_CSR_A_IMU_PERF_CNT0_POR_VALUE, %g1, %g3)
3565 ldx [%g2], %g4
3566 xorcc %g3, %g4, %g5
3567 bne test_failed
3568 nop
3569
3570 ! Next check that all the writable bits can be written
3571 xor %g3, %l1, %l2
3572 stx %l2, [%g2] ! store inverted POR value
3573
3574#define REG_39_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ICS_CSR_A_IMU_PERF_CNT0_POR_VALUE & FIRE_DLC_IMU_ICS_CSR_A_IMU_PERF_CNT0_WRITE_MASK) | (FIRE_DLC_IMU_ICS_CSR_A_IMU_PERF_CNT0_POR_VALUE & ~FIRE_DLC_IMU_ICS_CSR_A_IMU_PERF_CNT0_WRITE_MASK) )
3575
3576 best_set_reg(REG_39_EXP_VALUE, %g1, %g7) ! get expected value
3577 ldx [%g2], %g4
3578 xorcc %g7, %g4, %g5
3579 bne test_failed
3580 nop
3581
3582
3583REG_TEST_40:
3584 ! First check that the POR value is correct
3585 setx FIRE_DLC_IMU_ICS_CSR_A_IMU_PERF_CNT1_ADDR, %g1, %g2
3586 best_set_reg(FIRE_DLC_IMU_ICS_CSR_A_IMU_PERF_CNT1_POR_VALUE, %g1, %g3)
3587 ldx [%g2], %g4
3588 xorcc %g3, %g4, %g5
3589 bne test_failed
3590 nop
3591
3592 ! Next check that all the writable bits can be written
3593 xor %g3, %l1, %l2
3594 stx %l2, [%g2] ! store inverted POR value
3595
3596#define REG_40_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ICS_CSR_A_IMU_PERF_CNT1_POR_VALUE & FIRE_DLC_IMU_ICS_CSR_A_IMU_PERF_CNT1_WRITE_MASK) | (FIRE_DLC_IMU_ICS_CSR_A_IMU_PERF_CNT1_POR_VALUE & ~FIRE_DLC_IMU_ICS_CSR_A_IMU_PERF_CNT1_WRITE_MASK) )
3597
3598 best_set_reg(REG_40_EXP_VALUE, %g1, %g7) ! get expected value
3599 ldx [%g2], %g4
3600 xorcc %g7, %g4, %g5
3601 bne test_failed
3602 nop
3603
3604
3605REG_TEST_41:
3606 ! First check that the POR value is correct
3607 setx FIRE_DLC_IMU_ICS_CSR_A_MSI_32_ADDR_REG_ADDR, %g1, %g2
3608 best_set_reg(FIRE_DLC_IMU_ICS_CSR_A_MSI_32_ADDR_REG_POR_VALUE, %g1, %g3)
3609 ldx [%g2], %g4
3610 xorcc %g3, %g4, %g5
3611 bne test_failed
3612 nop
3613
3614 ! Next check that all the writable bits can be written
3615 xor %g3, %l1, %l2
3616 stx %l2, [%g2] ! store inverted POR value
3617
3618#define REG_41_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ICS_CSR_A_MSI_32_ADDR_REG_POR_VALUE & FIRE_DLC_IMU_ICS_CSR_A_MSI_32_ADDR_REG_WRITE_MASK) | (FIRE_DLC_IMU_ICS_CSR_A_MSI_32_ADDR_REG_POR_VALUE & ~FIRE_DLC_IMU_ICS_CSR_A_MSI_32_ADDR_REG_WRITE_MASK) )
3619
3620 best_set_reg(REG_41_EXP_VALUE, %g1, %g7) ! get expected value
3621 ldx [%g2], %g4
3622 xorcc %g7, %g4, %g5
3623 bne test_failed
3624 nop
3625
3626
3627REG_TEST_42:
3628 ! First check that the POR value is correct
3629 setx FIRE_DLC_IMU_ICS_CSR_A_MSI_64_ADDR_REG_ADDR, %g1, %g2
3630 best_set_reg(FIRE_DLC_IMU_ICS_CSR_A_MSI_64_ADDR_REG_POR_VALUE, %g1, %g3)
3631 ldx [%g2], %g4
3632 xorcc %g3, %g4, %g5
3633 bne test_failed
3634 nop
3635
3636 ! Next check that all the writable bits can be written
3637 xor %g3, %l1, %l2
3638 stx %l2, [%g2] ! store inverted POR value
3639
3640#define REG_42_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ICS_CSR_A_MSI_64_ADDR_REG_POR_VALUE & FIRE_DLC_IMU_ICS_CSR_A_MSI_64_ADDR_REG_WRITE_MASK) | (FIRE_DLC_IMU_ICS_CSR_A_MSI_64_ADDR_REG_POR_VALUE & ~FIRE_DLC_IMU_ICS_CSR_A_MSI_64_ADDR_REG_WRITE_MASK) )
3641
3642 best_set_reg(REG_42_EXP_VALUE, %g1, %g7) ! get expected value
3643 ldx [%g2], %g4
3644 xorcc %g7, %g4, %g5
3645 bne test_failed
3646 nop
3647
3648
3649REG_TEST_43:
3650 ! First check that the POR value is correct
3651 setx FIRE_DLC_IMU_ICS_CSR_A_MEM_64_PCIE_OFFSET_REG_ADDR, %g1, %g2
3652 best_set_reg(FIRE_DLC_IMU_ICS_CSR_A_MEM_64_PCIE_OFFSET_REG_POR_VALUE, %g1, %g3)
3653 ldx [%g2], %g4
3654 xorcc %g3, %g4, %g5
3655 bne test_failed
3656 nop
3657
3658 ! Next check that all the writable bits can be written
3659 xor %g3, %l1, %l2
3660 stx %l2, [%g2] ! store inverted POR value
3661
3662#define REG_43_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ICS_CSR_A_MEM_64_PCIE_OFFSET_REG_POR_VALUE & FIRE_DLC_IMU_ICS_CSR_A_MEM_64_PCIE_OFFSET_REG_WRITE_MASK) | (FIRE_DLC_IMU_ICS_CSR_A_MEM_64_PCIE_OFFSET_REG_POR_VALUE & ~FIRE_DLC_IMU_ICS_CSR_A_MEM_64_PCIE_OFFSET_REG_WRITE_MASK) )
3663
3664 best_set_reg(REG_43_EXP_VALUE, %g1, %g7) ! get expected value
3665 ldx [%g2], %g4
3666 xorcc %g7, %g4, %g5
3667 bne test_failed
3668 nop
3669
3670
3671REG_TEST_44:
3672 ! First check that the POR value is correct
3673 setx FIRE_DLC_IMU_RDS_INTX_CSR_A_INTX_STATUS_REG_ADDR, %g1, %g2
3674 best_set_reg(FIRE_DLC_IMU_RDS_INTX_CSR_A_INTX_STATUS_REG_POR_VALUE, %g1, %g3)
3675 ldx [%g2], %g4
3676 xorcc %g3, %g4, %g5
3677 bne test_failed
3678 nop
3679
3680 ! Next check that all the writable bits can be written
3681 xor %g3, %l1, %l2
3682 stx %l2, [%g2] ! store inverted POR value
3683
3684#define REG_44_EXP_VALUE mpeval( (~FIRE_DLC_IMU_RDS_INTX_CSR_A_INTX_STATUS_REG_POR_VALUE & FIRE_DLC_IMU_RDS_INTX_CSR_A_INTX_STATUS_REG_WRITE_MASK) | (FIRE_DLC_IMU_RDS_INTX_CSR_A_INTX_STATUS_REG_POR_VALUE & ~FIRE_DLC_IMU_RDS_INTX_CSR_A_INTX_STATUS_REG_WRITE_MASK) )
3685
3686 best_set_reg(REG_44_EXP_VALUE, %g1, %g7) ! get expected value
3687 ldx [%g2], %g4
3688 xorcc %g7, %g4, %g5
3689 bne test_failed
3690 nop
3691
3692
3693REG_TEST_45:
3694 ! First check that the POR value is correct
3695 setx FIRE_DLC_IMU_RDS_INTX_CSR_A_INT_A_INT_CLR_REG_ADDR, %g1, %g2
3696 best_set_reg(FIRE_DLC_IMU_RDS_INTX_CSR_A_INT_A_INT_CLR_REG_POR_VALUE, %g1, %g3)
3697 ldx [%g2], %g4
3698 xorcc %g3, %g4, %g5
3699 bne test_failed
3700 nop
3701
3702 ! Next check that all the writable bits can be written
3703 xor %g3, %l1, %l2
3704 stx %l2, [%g2] ! store inverted POR value
3705
3706#define REG_45_EXP_VALUE mpeval( (~FIRE_DLC_IMU_RDS_INTX_CSR_A_INT_A_INT_CLR_REG_POR_VALUE & FIRE_DLC_IMU_RDS_INTX_CSR_A_INT_A_INT_CLR_REG_WRITE_MASK) | (FIRE_DLC_IMU_RDS_INTX_CSR_A_INT_A_INT_CLR_REG_POR_VALUE & ~FIRE_DLC_IMU_RDS_INTX_CSR_A_INT_A_INT_CLR_REG_WRITE_MASK) )
3707
3708 best_set_reg(REG_45_EXP_VALUE, %g1, %g7) ! get expected value
3709 ldx [%g2], %g4
3710 xorcc %g7, %g4, %g5
3711 bne test_failed
3712 nop
3713
3714
3715REG_TEST_46:
3716 ! First check that the POR value is correct
3717 setx FIRE_DLC_IMU_RDS_INTX_CSR_A_INT_B_INT_CLR_REG_ADDR, %g1, %g2
3718 best_set_reg(FIRE_DLC_IMU_RDS_INTX_CSR_A_INT_B_INT_CLR_REG_POR_VALUE, %g1, %g3)
3719 ldx [%g2], %g4
3720 xorcc %g3, %g4, %g5
3721 bne test_failed
3722 nop
3723
3724 ! Next check that all the writable bits can be written
3725 xor %g3, %l1, %l2
3726 stx %l2, [%g2] ! store inverted POR value
3727
3728#define REG_46_EXP_VALUE mpeval( (~FIRE_DLC_IMU_RDS_INTX_CSR_A_INT_B_INT_CLR_REG_POR_VALUE & FIRE_DLC_IMU_RDS_INTX_CSR_A_INT_B_INT_CLR_REG_WRITE_MASK) | (FIRE_DLC_IMU_RDS_INTX_CSR_A_INT_B_INT_CLR_REG_POR_VALUE & ~FIRE_DLC_IMU_RDS_INTX_CSR_A_INT_B_INT_CLR_REG_WRITE_MASK) )
3729
3730 best_set_reg(REG_46_EXP_VALUE, %g1, %g7) ! get expected value
3731 ldx [%g2], %g4
3732 xorcc %g7, %g4, %g5
3733 bne test_failed
3734 nop
3735
3736
3737REG_TEST_47:
3738 ! First check that the POR value is correct
3739 setx FIRE_DLC_IMU_RDS_INTX_CSR_A_INT_C_INT_CLR_REG_ADDR, %g1, %g2
3740 best_set_reg(FIRE_DLC_IMU_RDS_INTX_CSR_A_INT_C_INT_CLR_REG_POR_VALUE, %g1, %g3)
3741 ldx [%g2], %g4
3742 xorcc %g3, %g4, %g5
3743 bne test_failed
3744 nop
3745
3746 ! Next check that all the writable bits can be written
3747 xor %g3, %l1, %l2
3748 stx %l2, [%g2] ! store inverted POR value
3749
3750#define REG_47_EXP_VALUE mpeval( (~FIRE_DLC_IMU_RDS_INTX_CSR_A_INT_C_INT_CLR_REG_POR_VALUE & FIRE_DLC_IMU_RDS_INTX_CSR_A_INT_C_INT_CLR_REG_WRITE_MASK) | (FIRE_DLC_IMU_RDS_INTX_CSR_A_INT_C_INT_CLR_REG_POR_VALUE & ~FIRE_DLC_IMU_RDS_INTX_CSR_A_INT_C_INT_CLR_REG_WRITE_MASK) )
3751
3752 best_set_reg(REG_47_EXP_VALUE, %g1, %g7) ! get expected value
3753 ldx [%g2], %g4
3754 xorcc %g7, %g4, %g5
3755 bne test_failed
3756 nop
3757
3758
3759REG_TEST_48:
3760 ! First check that the POR value is correct
3761 setx FIRE_DLC_IMU_RDS_INTX_CSR_A_INT_D_INT_CLR_REG_ADDR, %g1, %g2
3762 best_set_reg(FIRE_DLC_IMU_RDS_INTX_CSR_A_INT_D_INT_CLR_REG_POR_VALUE, %g1, %g3)
3763 ldx [%g2], %g4
3764 xorcc %g3, %g4, %g5
3765 bne test_failed
3766 nop
3767
3768 ! Next check that all the writable bits can be written
3769 xor %g3, %l1, %l2
3770 stx %l2, [%g2] ! store inverted POR value
3771
3772#define REG_48_EXP_VALUE mpeval( (~FIRE_DLC_IMU_RDS_INTX_CSR_A_INT_D_INT_CLR_REG_POR_VALUE & FIRE_DLC_IMU_RDS_INTX_CSR_A_INT_D_INT_CLR_REG_WRITE_MASK) | (FIRE_DLC_IMU_RDS_INTX_CSR_A_INT_D_INT_CLR_REG_POR_VALUE & ~FIRE_DLC_IMU_RDS_INTX_CSR_A_INT_D_INT_CLR_REG_WRITE_MASK) )
3773
3774 best_set_reg(REG_48_EXP_VALUE, %g1, %g7) ! get expected value
3775 ldx [%g2], %g4
3776 xorcc %g7, %g4, %g5
3777 bne test_failed
3778 nop
3779
3780
3781REG_TEST_49:
3782 ! First check that the POR value is correct
3783 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_20_ADDR, %g1, %g2
3784 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_20_POR_VALUE, %g1, %g3)
3785 ldx [%g2], %g4
3786 xorcc %g3, %g4, %g5
3787 bne test_failed
3788 nop
3789
3790 ! Next check that all the writable bits can be written
3791 xor %g3, %l1, %l2
3792 stx %l2, [%g2] ! store inverted POR value
3793
3794#define REG_49_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_20_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_20_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_20_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_20_WRITE_MASK) )
3795
3796 best_set_reg(REG_49_EXP_VALUE, %g1, %g7) ! get expected value
3797 ldx [%g2], %g4
3798 xorcc %g7, %g4, %g5
3799 bne test_failed
3800 nop
3801
3802
3803REG_TEST_50:
3804 ! First check that the POR value is correct
3805 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_21_ADDR, %g1, %g2
3806 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_21_POR_VALUE, %g1, %g3)
3807 ldx [%g2], %g4
3808 xorcc %g3, %g4, %g5
3809 bne test_failed
3810 nop
3811
3812 ! Next check that all the writable bits can be written
3813 xor %g3, %l1, %l2
3814 stx %l2, [%g2] ! store inverted POR value
3815
3816#define REG_50_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_21_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_21_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_21_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_21_WRITE_MASK) )
3817
3818 best_set_reg(REG_50_EXP_VALUE, %g1, %g7) ! get expected value
3819 ldx [%g2], %g4
3820 xorcc %g7, %g4, %g5
3821 bne test_failed
3822 nop
3823
3824
3825REG_TEST_51:
3826 ! First check that the POR value is correct
3827 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_22_ADDR, %g1, %g2
3828 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_22_POR_VALUE, %g1, %g3)
3829 ldx [%g2], %g4
3830 xorcc %g3, %g4, %g5
3831 bne test_failed
3832 nop
3833
3834 ! Next check that all the writable bits can be written
3835 xor %g3, %l1, %l2
3836 stx %l2, [%g2] ! store inverted POR value
3837
3838#define REG_51_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_22_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_22_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_22_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_22_WRITE_MASK) )
3839
3840 best_set_reg(REG_51_EXP_VALUE, %g1, %g7) ! get expected value
3841 ldx [%g2], %g4
3842 xorcc %g7, %g4, %g5
3843 bne test_failed
3844 nop
3845
3846
3847REG_TEST_52:
3848 ! First check that the POR value is correct
3849 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_23_ADDR, %g1, %g2
3850 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_23_POR_VALUE, %g1, %g3)
3851 ldx [%g2], %g4
3852 xorcc %g3, %g4, %g5
3853 bne test_failed
3854 nop
3855
3856 ! Next check that all the writable bits can be written
3857 xor %g3, %l1, %l2
3858 stx %l2, [%g2] ! store inverted POR value
3859
3860#define REG_52_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_23_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_23_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_23_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_23_WRITE_MASK) )
3861
3862 best_set_reg(REG_52_EXP_VALUE, %g1, %g7) ! get expected value
3863 ldx [%g2], %g4
3864 xorcc %g7, %g4, %g5
3865 bne test_failed
3866 nop
3867
3868
3869REG_TEST_53:
3870 ! First check that the POR value is correct
3871 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_24_ADDR, %g1, %g2
3872 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_24_POR_VALUE, %g1, %g3)
3873 ldx [%g2], %g4
3874 xorcc %g3, %g4, %g5
3875 bne test_failed
3876 nop
3877
3878 ! Next check that all the writable bits can be written
3879 xor %g3, %l1, %l2
3880 stx %l2, [%g2] ! store inverted POR value
3881
3882#define REG_53_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_24_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_24_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_24_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_24_WRITE_MASK) )
3883
3884 best_set_reg(REG_53_EXP_VALUE, %g1, %g7) ! get expected value
3885 ldx [%g2], %g4
3886 xorcc %g7, %g4, %g5
3887 bne test_failed
3888 nop
3889
3890
3891REG_TEST_54:
3892 ! First check that the POR value is correct
3893 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_25_ADDR, %g1, %g2
3894 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_25_POR_VALUE, %g1, %g3)
3895 ldx [%g2], %g4
3896 xorcc %g3, %g4, %g5
3897 bne test_failed
3898 nop
3899
3900 ! Next check that all the writable bits can be written
3901 xor %g3, %l1, %l2
3902 stx %l2, [%g2] ! store inverted POR value
3903
3904#define REG_54_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_25_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_25_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_25_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_25_WRITE_MASK) )
3905
3906 best_set_reg(REG_54_EXP_VALUE, %g1, %g7) ! get expected value
3907 ldx [%g2], %g4
3908 xorcc %g7, %g4, %g5
3909 bne test_failed
3910 nop
3911
3912
3913REG_TEST_55:
3914 ! First check that the POR value is correct
3915 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_26_ADDR, %g1, %g2
3916 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_26_POR_VALUE, %g1, %g3)
3917 ldx [%g2], %g4
3918 xorcc %g3, %g4, %g5
3919 bne test_failed
3920 nop
3921
3922 ! Next check that all the writable bits can be written
3923 xor %g3, %l1, %l2
3924 stx %l2, [%g2] ! store inverted POR value
3925
3926#define REG_55_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_26_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_26_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_26_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_26_WRITE_MASK) )
3927
3928 best_set_reg(REG_55_EXP_VALUE, %g1, %g7) ! get expected value
3929 ldx [%g2], %g4
3930 xorcc %g7, %g4, %g5
3931 bne test_failed
3932 nop
3933
3934
3935REG_TEST_56:
3936 ! First check that the POR value is correct
3937 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_27_ADDR, %g1, %g2
3938 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_27_POR_VALUE, %g1, %g3)
3939 ldx [%g2], %g4
3940 xorcc %g3, %g4, %g5
3941 bne test_failed
3942 nop
3943
3944 ! Next check that all the writable bits can be written
3945 xor %g3, %l1, %l2
3946 stx %l2, [%g2] ! store inverted POR value
3947
3948#define REG_56_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_27_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_27_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_27_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_27_WRITE_MASK) )
3949
3950 best_set_reg(REG_56_EXP_VALUE, %g1, %g7) ! get expected value
3951 ldx [%g2], %g4
3952 xorcc %g7, %g4, %g5
3953 bne test_failed
3954 nop
3955
3956 ba test_passed
3957 nop
3958
3959thread_2:
3960
3961REG_TEST_57:
3962 ! First check that the POR value is correct
3963 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_28_ADDR, %g1, %g2
3964 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_28_POR_VALUE, %g1, %g3)
3965 ldx [%g2], %g4
3966 xorcc %g3, %g4, %g5
3967 bne test_failed
3968 nop
3969
3970 ! Next check that all the writable bits can be written
3971 xor %g3, %l1, %l2
3972 stx %l2, [%g2] ! store inverted POR value
3973
3974#define REG_57_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_28_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_28_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_28_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_28_WRITE_MASK) )
3975
3976 best_set_reg(REG_57_EXP_VALUE, %g1, %g7) ! get expected value
3977 ldx [%g2], %g4
3978 xorcc %g7, %g4, %g5
3979 bne test_failed
3980 nop
3981
3982
3983REG_TEST_58:
3984 ! First check that the POR value is correct
3985 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_29_ADDR, %g1, %g2
3986 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_29_POR_VALUE, %g1, %g3)
3987 ldx [%g2], %g4
3988 xorcc %g3, %g4, %g5
3989 bne test_failed
3990 nop
3991
3992 ! Next check that all the writable bits can be written
3993 xor %g3, %l1, %l2
3994 stx %l2, [%g2] ! store inverted POR value
3995
3996#define REG_58_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_29_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_29_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_29_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_29_WRITE_MASK) )
3997
3998 best_set_reg(REG_58_EXP_VALUE, %g1, %g7) ! get expected value
3999 ldx [%g2], %g4
4000 xorcc %g7, %g4, %g5
4001 bne test_failed
4002 nop
4003
4004
4005REG_TEST_59:
4006 ! First check that the POR value is correct
4007 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_30_ADDR, %g1, %g2
4008 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_30_POR_VALUE, %g1, %g3)
4009 ldx [%g2], %g4
4010 xorcc %g3, %g4, %g5
4011 bne test_failed
4012 nop
4013
4014 ! Next check that all the writable bits can be written
4015 xor %g3, %l1, %l2
4016 stx %l2, [%g2] ! store inverted POR value
4017
4018#define REG_59_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_30_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_30_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_30_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_30_WRITE_MASK) )
4019
4020 best_set_reg(REG_59_EXP_VALUE, %g1, %g7) ! get expected value
4021 ldx [%g2], %g4
4022 xorcc %g7, %g4, %g5
4023 bne test_failed
4024 nop
4025
4026
4027REG_TEST_60:
4028 ! First check that the POR value is correct
4029 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_31_ADDR, %g1, %g2
4030 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_31_POR_VALUE, %g1, %g3)
4031 ldx [%g2], %g4
4032 xorcc %g3, %g4, %g5
4033 bne test_failed
4034 nop
4035
4036 ! Next check that all the writable bits can be written
4037 xor %g3, %l1, %l2
4038 stx %l2, [%g2] ! store inverted POR value
4039
4040#define REG_60_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_31_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_31_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_31_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_31_WRITE_MASK) )
4041
4042 best_set_reg(REG_60_EXP_VALUE, %g1, %g7) ! get expected value
4043 ldx [%g2], %g4
4044 xorcc %g7, %g4, %g5
4045 bne test_failed
4046 nop
4047
4048
4049REG_TEST_61:
4050 ! First check that the POR value is correct
4051 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_32_ADDR, %g1, %g2
4052 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_32_POR_VALUE, %g1, %g3)
4053 ldx [%g2], %g4
4054 xorcc %g3, %g4, %g5
4055 bne test_failed
4056 nop
4057
4058 ! Next check that all the writable bits can be written
4059 xor %g3, %l1, %l2
4060 stx %l2, [%g2] ! store inverted POR value
4061
4062#define REG_61_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_32_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_32_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_32_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_32_WRITE_MASK) )
4063
4064 best_set_reg(REG_61_EXP_VALUE, %g1, %g7) ! get expected value
4065 ldx [%g2], %g4
4066 xorcc %g7, %g4, %g5
4067 bne test_failed
4068 nop
4069
4070
4071REG_TEST_62:
4072 ! First check that the POR value is correct
4073 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_33_ADDR, %g1, %g2
4074 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_33_POR_VALUE, %g1, %g3)
4075 ldx [%g2], %g4
4076 xorcc %g3, %g4, %g5
4077 bne test_failed
4078 nop
4079
4080 ! Next check that all the writable bits can be written
4081 xor %g3, %l1, %l2
4082 stx %l2, [%g2] ! store inverted POR value
4083
4084#define REG_62_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_33_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_33_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_33_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_33_WRITE_MASK) )
4085
4086 best_set_reg(REG_62_EXP_VALUE, %g1, %g7) ! get expected value
4087 ldx [%g2], %g4
4088 xorcc %g7, %g4, %g5
4089 bne test_failed
4090 nop
4091
4092
4093REG_TEST_63:
4094 ! First check that the POR value is correct
4095 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_34_ADDR, %g1, %g2
4096 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_34_POR_VALUE, %g1, %g3)
4097 ldx [%g2], %g4
4098 xorcc %g3, %g4, %g5
4099 bne test_failed
4100 nop
4101
4102 ! Next check that all the writable bits can be written
4103 xor %g3, %l1, %l2
4104 stx %l2, [%g2] ! store inverted POR value
4105
4106#define REG_63_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_34_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_34_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_34_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_34_WRITE_MASK) )
4107
4108 best_set_reg(REG_63_EXP_VALUE, %g1, %g7) ! get expected value
4109 ldx [%g2], %g4
4110 xorcc %g7, %g4, %g5
4111 bne test_failed
4112 nop
4113
4114
4115REG_TEST_64:
4116 ! First check that the POR value is correct
4117 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_35_ADDR, %g1, %g2
4118 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_35_POR_VALUE, %g1, %g3)
4119 ldx [%g2], %g4
4120 xorcc %g3, %g4, %g5
4121 bne test_failed
4122 nop
4123
4124 ! Next check that all the writable bits can be written
4125 xor %g3, %l1, %l2
4126 stx %l2, [%g2] ! store inverted POR value
4127
4128#define REG_64_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_35_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_35_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_35_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_35_WRITE_MASK) )
4129
4130 best_set_reg(REG_64_EXP_VALUE, %g1, %g7) ! get expected value
4131 ldx [%g2], %g4
4132 xorcc %g7, %g4, %g5
4133 bne test_failed
4134 nop
4135
4136
4137REG_TEST_65:
4138 ! First check that the POR value is correct
4139 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_36_ADDR, %g1, %g2
4140 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_36_POR_VALUE, %g1, %g3)
4141 ldx [%g2], %g4
4142 xorcc %g3, %g4, %g5
4143 bne test_failed
4144 nop
4145
4146 ! Next check that all the writable bits can be written
4147 xor %g3, %l1, %l2
4148 stx %l2, [%g2] ! store inverted POR value
4149
4150#define REG_65_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_36_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_36_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_36_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_36_WRITE_MASK) )
4151
4152 best_set_reg(REG_65_EXP_VALUE, %g1, %g7) ! get expected value
4153 ldx [%g2], %g4
4154 xorcc %g7, %g4, %g5
4155 bne test_failed
4156 nop
4157
4158
4159REG_TEST_66:
4160 ! First check that the POR value is correct
4161 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_37_ADDR, %g1, %g2
4162 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_37_POR_VALUE, %g1, %g3)
4163 ldx [%g2], %g4
4164 xorcc %g3, %g4, %g5
4165 bne test_failed
4166 nop
4167
4168 ! Next check that all the writable bits can be written
4169 xor %g3, %l1, %l2
4170 stx %l2, [%g2] ! store inverted POR value
4171
4172#define REG_66_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_37_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_37_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_37_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_37_WRITE_MASK) )
4173
4174 best_set_reg(REG_66_EXP_VALUE, %g1, %g7) ! get expected value
4175 ldx [%g2], %g4
4176 xorcc %g7, %g4, %g5
4177 bne test_failed
4178 nop
4179
4180
4181REG_TEST_67:
4182 ! First check that the POR value is correct
4183 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_38_ADDR, %g1, %g2
4184 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_38_POR_VALUE, %g1, %g3)
4185 ldx [%g2], %g4
4186 xorcc %g3, %g4, %g5
4187 bne test_failed
4188 nop
4189
4190 ! Next check that all the writable bits can be written
4191 xor %g3, %l1, %l2
4192 stx %l2, [%g2] ! store inverted POR value
4193
4194#define REG_67_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_38_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_38_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_38_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_38_WRITE_MASK) )
4195
4196 best_set_reg(REG_67_EXP_VALUE, %g1, %g7) ! get expected value
4197 ldx [%g2], %g4
4198 xorcc %g7, %g4, %g5
4199 bne test_failed
4200 nop
4201
4202
4203REG_TEST_68:
4204 ! First check that the POR value is correct
4205 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_39_ADDR, %g1, %g2
4206 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_39_POR_VALUE, %g1, %g3)
4207 ldx [%g2], %g4
4208 xorcc %g3, %g4, %g5
4209 bne test_failed
4210 nop
4211
4212 ! Next check that all the writable bits can be written
4213 xor %g3, %l1, %l2
4214 stx %l2, [%g2] ! store inverted POR value
4215
4216#define REG_68_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_39_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_39_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_39_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_39_WRITE_MASK) )
4217
4218 best_set_reg(REG_68_EXP_VALUE, %g1, %g7) ! get expected value
4219 ldx [%g2], %g4
4220 xorcc %g7, %g4, %g5
4221 bne test_failed
4222 nop
4223
4224
4225REG_TEST_69:
4226 ! First check that the POR value is correct
4227 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_40_ADDR, %g1, %g2
4228 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_40_POR_VALUE, %g1, %g3)
4229 ldx [%g2], %g4
4230 xorcc %g3, %g4, %g5
4231 bne test_failed
4232 nop
4233
4234 ! Next check that all the writable bits can be written
4235 xor %g3, %l1, %l2
4236 stx %l2, [%g2] ! store inverted POR value
4237
4238#define REG_69_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_40_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_40_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_40_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_40_WRITE_MASK) )
4239
4240 best_set_reg(REG_69_EXP_VALUE, %g1, %g7) ! get expected value
4241 ldx [%g2], %g4
4242 xorcc %g7, %g4, %g5
4243 bne test_failed
4244 nop
4245
4246
4247REG_TEST_70:
4248 ! First check that the POR value is correct
4249 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_41_ADDR, %g1, %g2
4250 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_41_POR_VALUE, %g1, %g3)
4251 ldx [%g2], %g4
4252 xorcc %g3, %g4, %g5
4253 bne test_failed
4254 nop
4255
4256 ! Next check that all the writable bits can be written
4257 xor %g3, %l1, %l2
4258 stx %l2, [%g2] ! store inverted POR value
4259
4260#define REG_70_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_41_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_41_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_41_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_41_WRITE_MASK) )
4261
4262 best_set_reg(REG_70_EXP_VALUE, %g1, %g7) ! get expected value
4263 ldx [%g2], %g4
4264 xorcc %g7, %g4, %g5
4265 bne test_failed
4266 nop
4267
4268
4269REG_TEST_71:
4270 ! First check that the POR value is correct
4271 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_42_ADDR, %g1, %g2
4272 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_42_POR_VALUE, %g1, %g3)
4273 ldx [%g2], %g4
4274 xorcc %g3, %g4, %g5
4275 bne test_failed
4276 nop
4277
4278 ! Next check that all the writable bits can be written
4279 xor %g3, %l1, %l2
4280 stx %l2, [%g2] ! store inverted POR value
4281
4282#define REG_71_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_42_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_42_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_42_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_42_WRITE_MASK) )
4283
4284 best_set_reg(REG_71_EXP_VALUE, %g1, %g7) ! get expected value
4285 ldx [%g2], %g4
4286 xorcc %g7, %g4, %g5
4287 bne test_failed
4288 nop
4289
4290
4291REG_TEST_72:
4292 ! First check that the POR value is correct
4293 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_43_ADDR, %g1, %g2
4294 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_43_POR_VALUE, %g1, %g3)
4295 ldx [%g2], %g4
4296 xorcc %g3, %g4, %g5
4297 bne test_failed
4298 nop
4299
4300 ! Next check that all the writable bits can be written
4301 xor %g3, %l1, %l2
4302 stx %l2, [%g2] ! store inverted POR value
4303
4304#define REG_72_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_43_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_43_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_43_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_43_WRITE_MASK) )
4305
4306 best_set_reg(REG_72_EXP_VALUE, %g1, %g7) ! get expected value
4307 ldx [%g2], %g4
4308 xorcc %g7, %g4, %g5
4309 bne test_failed
4310 nop
4311
4312
4313REG_TEST_73:
4314 ! First check that the POR value is correct
4315 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_44_ADDR, %g1, %g2
4316 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_44_POR_VALUE, %g1, %g3)
4317 ldx [%g2], %g4
4318 xorcc %g3, %g4, %g5
4319 bne test_failed
4320 nop
4321
4322 ! Next check that all the writable bits can be written
4323 xor %g3, %l1, %l2
4324 stx %l2, [%g2] ! store inverted POR value
4325
4326#define REG_73_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_44_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_44_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_44_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_44_WRITE_MASK) )
4327
4328 best_set_reg(REG_73_EXP_VALUE, %g1, %g7) ! get expected value
4329 ldx [%g2], %g4
4330 xorcc %g7, %g4, %g5
4331 bne test_failed
4332 nop
4333
4334
4335REG_TEST_74:
4336 ! First check that the POR value is correct
4337 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_45_ADDR, %g1, %g2
4338 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_45_POR_VALUE, %g1, %g3)
4339 ldx [%g2], %g4
4340 xorcc %g3, %g4, %g5
4341 bne test_failed
4342 nop
4343
4344 ! Next check that all the writable bits can be written
4345 xor %g3, %l1, %l2
4346 stx %l2, [%g2] ! store inverted POR value
4347
4348#define REG_74_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_45_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_45_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_45_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_45_WRITE_MASK) )
4349
4350 best_set_reg(REG_74_EXP_VALUE, %g1, %g7) ! get expected value
4351 ldx [%g2], %g4
4352 xorcc %g7, %g4, %g5
4353 bne test_failed
4354 nop
4355
4356
4357REG_TEST_75:
4358 ! First check that the POR value is correct
4359 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_46_ADDR, %g1, %g2
4360 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_46_POR_VALUE, %g1, %g3)
4361 ldx [%g2], %g4
4362 xorcc %g3, %g4, %g5
4363 bne test_failed
4364 nop
4365
4366 ! Next check that all the writable bits can be written
4367 xor %g3, %l1, %l2
4368 stx %l2, [%g2] ! store inverted POR value
4369
4370#define REG_75_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_46_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_46_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_46_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_46_WRITE_MASK) )
4371
4372 best_set_reg(REG_75_EXP_VALUE, %g1, %g7) ! get expected value
4373 ldx [%g2], %g4
4374 xorcc %g7, %g4, %g5
4375 bne test_failed
4376 nop
4377
4378
4379REG_TEST_76:
4380 ! First check that the POR value is correct
4381 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_47_ADDR, %g1, %g2
4382 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_47_POR_VALUE, %g1, %g3)
4383 ldx [%g2], %g4
4384 xorcc %g3, %g4, %g5
4385 bne test_failed
4386 nop
4387
4388 ! Next check that all the writable bits can be written
4389 xor %g3, %l1, %l2
4390 stx %l2, [%g2] ! store inverted POR value
4391
4392#define REG_76_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_47_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_47_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_47_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_47_WRITE_MASK) )
4393
4394 best_set_reg(REG_76_EXP_VALUE, %g1, %g7) ! get expected value
4395 ldx [%g2], %g4
4396 xorcc %g7, %g4, %g5
4397 bne test_failed
4398 nop
4399
4400
4401REG_TEST_77:
4402 ! First check that the POR value is correct
4403 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_48_ADDR, %g1, %g2
4404 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_48_POR_VALUE, %g1, %g3)
4405 ldx [%g2], %g4
4406 xorcc %g3, %g4, %g5
4407 bne test_failed
4408 nop
4409
4410 ! Next check that all the writable bits can be written
4411 xor %g3, %l1, %l2
4412 stx %l2, [%g2] ! store inverted POR value
4413
4414#define REG_77_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_48_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_48_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_48_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_48_WRITE_MASK) )
4415
4416 best_set_reg(REG_77_EXP_VALUE, %g1, %g7) ! get expected value
4417 ldx [%g2], %g4
4418 xorcc %g7, %g4, %g5
4419 bne test_failed
4420 nop
4421
4422
4423REG_TEST_78:
4424 ! First check that the POR value is correct
4425 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_49_ADDR, %g1, %g2
4426 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_49_POR_VALUE, %g1, %g3)
4427 ldx [%g2], %g4
4428 xorcc %g3, %g4, %g5
4429 bne test_failed
4430 nop
4431
4432 ! Next check that all the writable bits can be written
4433 xor %g3, %l1, %l2
4434 stx %l2, [%g2] ! store inverted POR value
4435
4436#define REG_78_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_49_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_49_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_49_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_49_WRITE_MASK) )
4437
4438 best_set_reg(REG_78_EXP_VALUE, %g1, %g7) ! get expected value
4439 ldx [%g2], %g4
4440 xorcc %g7, %g4, %g5
4441 bne test_failed
4442 nop
4443
4444
4445REG_TEST_79:
4446 ! First check that the POR value is correct
4447 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_50_ADDR, %g1, %g2
4448 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_50_POR_VALUE, %g1, %g3)
4449 ldx [%g2], %g4
4450 xorcc %g3, %g4, %g5
4451 bne test_failed
4452 nop
4453
4454 ! Next check that all the writable bits can be written
4455 xor %g3, %l1, %l2
4456 stx %l2, [%g2] ! store inverted POR value
4457
4458#define REG_79_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_50_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_50_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_50_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_50_WRITE_MASK) )
4459
4460 best_set_reg(REG_79_EXP_VALUE, %g1, %g7) ! get expected value
4461 ldx [%g2], %g4
4462 xorcc %g7, %g4, %g5
4463 bne test_failed
4464 nop
4465
4466
4467REG_TEST_80:
4468 ! First check that the POR value is correct
4469 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_51_ADDR, %g1, %g2
4470 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_51_POR_VALUE, %g1, %g3)
4471 ldx [%g2], %g4
4472 xorcc %g3, %g4, %g5
4473 bne test_failed
4474 nop
4475
4476 ! Next check that all the writable bits can be written
4477 xor %g3, %l1, %l2
4478 stx %l2, [%g2] ! store inverted POR value
4479
4480#define REG_80_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_51_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_51_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_51_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_51_WRITE_MASK) )
4481
4482 best_set_reg(REG_80_EXP_VALUE, %g1, %g7) ! get expected value
4483 ldx [%g2], %g4
4484 xorcc %g7, %g4, %g5
4485 bne test_failed
4486 nop
4487
4488
4489REG_TEST_81:
4490 ! First check that the POR value is correct
4491 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_52_ADDR, %g1, %g2
4492 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_52_POR_VALUE, %g1, %g3)
4493 ldx [%g2], %g4
4494 xorcc %g3, %g4, %g5
4495 bne test_failed
4496 nop
4497
4498 ! Next check that all the writable bits can be written
4499 xor %g3, %l1, %l2
4500 stx %l2, [%g2] ! store inverted POR value
4501
4502#define REG_81_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_52_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_52_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_52_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_52_WRITE_MASK) )
4503
4504 best_set_reg(REG_81_EXP_VALUE, %g1, %g7) ! get expected value
4505 ldx [%g2], %g4
4506 xorcc %g7, %g4, %g5
4507 bne test_failed
4508 nop
4509
4510
4511REG_TEST_82:
4512 ! First check that the POR value is correct
4513 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_53_ADDR, %g1, %g2
4514 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_53_POR_VALUE, %g1, %g3)
4515 ldx [%g2], %g4
4516 xorcc %g3, %g4, %g5
4517 bne test_failed
4518 nop
4519
4520 ! Next check that all the writable bits can be written
4521 xor %g3, %l1, %l2
4522 stx %l2, [%g2] ! store inverted POR value
4523
4524#define REG_82_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_53_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_53_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_53_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_53_WRITE_MASK) )
4525
4526 best_set_reg(REG_82_EXP_VALUE, %g1, %g7) ! get expected value
4527 ldx [%g2], %g4
4528 xorcc %g7, %g4, %g5
4529 bne test_failed
4530 nop
4531
4532
4533REG_TEST_83:
4534 ! First check that the POR value is correct
4535 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_54_ADDR, %g1, %g2
4536 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_54_POR_VALUE, %g1, %g3)
4537 ldx [%g2], %g4
4538 xorcc %g3, %g4, %g5
4539 bne test_failed
4540 nop
4541
4542 ! Next check that all the writable bits can be written
4543 xor %g3, %l1, %l2
4544 stx %l2, [%g2] ! store inverted POR value
4545
4546#define REG_83_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_54_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_54_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_54_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_54_WRITE_MASK) )
4547
4548 best_set_reg(REG_83_EXP_VALUE, %g1, %g7) ! get expected value
4549 ldx [%g2], %g4
4550 xorcc %g7, %g4, %g5
4551 bne test_failed
4552 nop
4553
4554
4555REG_TEST_84:
4556 ! First check that the POR value is correct
4557 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_55_ADDR, %g1, %g2
4558 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_55_POR_VALUE, %g1, %g3)
4559 ldx [%g2], %g4
4560 xorcc %g3, %g4, %g5
4561 bne test_failed
4562 nop
4563
4564 ! Next check that all the writable bits can be written
4565 xor %g3, %l1, %l2
4566 stx %l2, [%g2] ! store inverted POR value
4567
4568#define REG_84_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_55_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_55_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_55_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_55_WRITE_MASK) )
4569
4570 best_set_reg(REG_84_EXP_VALUE, %g1, %g7) ! get expected value
4571 ldx [%g2], %g4
4572 xorcc %g7, %g4, %g5
4573 bne test_failed
4574 nop
4575
4576
4577REG_TEST_85:
4578 ! First check that the POR value is correct
4579 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_56_ADDR, %g1, %g2
4580 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_56_POR_VALUE, %g1, %g3)
4581 ldx [%g2], %g4
4582 xorcc %g3, %g4, %g5
4583 bne test_failed
4584 nop
4585
4586 ! Next check that all the writable bits can be written
4587 xor %g3, %l1, %l2
4588 stx %l2, [%g2] ! store inverted POR value
4589
4590#define REG_85_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_56_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_56_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_56_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_56_WRITE_MASK) )
4591
4592 best_set_reg(REG_85_EXP_VALUE, %g1, %g7) ! get expected value
4593 ldx [%g2], %g4
4594 xorcc %g7, %g4, %g5
4595 bne test_failed
4596 nop
4597
4598
4599REG_TEST_86:
4600 ! First check that the POR value is correct
4601 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_57_ADDR, %g1, %g2
4602 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_57_POR_VALUE, %g1, %g3)
4603 ldx [%g2], %g4
4604 xorcc %g3, %g4, %g5
4605 bne test_failed
4606 nop
4607
4608 ! Next check that all the writable bits can be written
4609 xor %g3, %l1, %l2
4610 stx %l2, [%g2] ! store inverted POR value
4611
4612#define REG_86_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_57_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_57_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_57_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_57_WRITE_MASK) )
4613
4614 best_set_reg(REG_86_EXP_VALUE, %g1, %g7) ! get expected value
4615 ldx [%g2], %g4
4616 xorcc %g7, %g4, %g5
4617 bne test_failed
4618 nop
4619
4620
4621REG_TEST_87:
4622 ! First check that the POR value is correct
4623 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_58_ADDR, %g1, %g2
4624 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_58_POR_VALUE, %g1, %g3)
4625 ldx [%g2], %g4
4626 xorcc %g3, %g4, %g5
4627 bne test_failed
4628 nop
4629
4630 ! Next check that all the writable bits can be written
4631 xor %g3, %l1, %l2
4632 stx %l2, [%g2] ! store inverted POR value
4633
4634#define REG_87_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_58_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_58_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_58_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_58_WRITE_MASK) )
4635
4636 best_set_reg(REG_87_EXP_VALUE, %g1, %g7) ! get expected value
4637 ldx [%g2], %g4
4638 xorcc %g7, %g4, %g5
4639 bne test_failed
4640 nop
4641
4642
4643REG_TEST_88:
4644 ! First check that the POR value is correct
4645 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_59_ADDR, %g1, %g2
4646 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_59_POR_VALUE, %g1, %g3)
4647 ldx [%g2], %g4
4648 xorcc %g3, %g4, %g5
4649 bne test_failed
4650 nop
4651
4652 ! Next check that all the writable bits can be written
4653 xor %g3, %l1, %l2
4654 stx %l2, [%g2] ! store inverted POR value
4655
4656#define REG_88_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_59_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_59_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_59_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_59_WRITE_MASK) )
4657
4658 best_set_reg(REG_88_EXP_VALUE, %g1, %g7) ! get expected value
4659 ldx [%g2], %g4
4660 xorcc %g7, %g4, %g5
4661 bne test_failed
4662 nop
4663
4664
4665REG_TEST_89:
4666 ! First check that the POR value is correct
4667 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_62_ADDR, %g1, %g2
4668 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_62_POR_VALUE, %g1, %g3)
4669 ldx [%g2], %g4
4670 xorcc %g3, %g4, %g5
4671 bne test_failed
4672 nop
4673
4674 ! Next check that all the writable bits can be written
4675 xor %g3, %l1, %l2
4676 stx %l2, [%g2] ! store inverted POR value
4677
4678#define REG_89_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_62_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_62_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_62_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_62_WRITE_MASK) )
4679
4680 best_set_reg(REG_89_EXP_VALUE, %g1, %g7) ! get expected value
4681 ldx [%g2], %g4
4682 xorcc %g7, %g4, %g5
4683 bne test_failed
4684 nop
4685
4686
4687REG_TEST_90:
4688 ! First check that the POR value is correct
4689 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_63_ADDR, %g1, %g2
4690 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_63_POR_VALUE, %g1, %g3)
4691 ldx [%g2], %g4
4692 xorcc %g3, %g4, %g5
4693 bne test_failed
4694 nop
4695
4696 ! Next check that all the writable bits can be written
4697 xor %g3, %l1, %l2
4698 stx %l2, [%g2] ! store inverted POR value
4699
4700#define REG_90_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_63_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_63_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_63_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_MAPPING_63_WRITE_MASK) )
4701
4702 best_set_reg(REG_90_EXP_VALUE, %g1, %g7) ! get expected value
4703 ldx [%g2], %g4
4704 xorcc %g7, %g4, %g5
4705 bne test_failed
4706 nop
4707
4708
4709REG_TEST_91:
4710 ! First check that the POR value is correct
4711 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_20_ADDR, %g1, %g2
4712 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_20_POR_VALUE, %g1, %g3)
4713 ldx [%g2], %g4
4714 xorcc %g3, %g4, %g5
4715 bne test_failed
4716 nop
4717
4718 ! Next check that all the writable bits can be written
4719 xor %g3, %l1, %l2
4720 stx %l2, [%g2] ! store inverted POR value
4721
4722#define REG_91_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_20_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_20_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_20_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_20_WRITE_MASK) )
4723
4724 best_set_reg(REG_91_EXP_VALUE, %g1, %g7) ! get expected value
4725 ldx [%g2], %g4
4726 xorcc %g7, %g4, %g5
4727 bne test_failed
4728 nop
4729
4730
4731REG_TEST_92:
4732 ! First check that the POR value is correct
4733 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_21_ADDR, %g1, %g2
4734 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_21_POR_VALUE, %g1, %g3)
4735 ldx [%g2], %g4
4736 xorcc %g3, %g4, %g5
4737 bne test_failed
4738 nop
4739
4740 ! Next check that all the writable bits can be written
4741 xor %g3, %l1, %l2
4742 stx %l2, [%g2] ! store inverted POR value
4743
4744#define REG_92_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_21_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_21_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_21_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_21_WRITE_MASK) )
4745
4746 best_set_reg(REG_92_EXP_VALUE, %g1, %g7) ! get expected value
4747 ldx [%g2], %g4
4748 xorcc %g7, %g4, %g5
4749 bne test_failed
4750 nop
4751
4752
4753REG_TEST_93:
4754 ! First check that the POR value is correct
4755 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_22_ADDR, %g1, %g2
4756 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_22_POR_VALUE, %g1, %g3)
4757 ldx [%g2], %g4
4758 xorcc %g3, %g4, %g5
4759 bne test_failed
4760 nop
4761
4762 ! Next check that all the writable bits can be written
4763 xor %g3, %l1, %l2
4764 stx %l2, [%g2] ! store inverted POR value
4765
4766#define REG_93_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_22_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_22_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_22_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_22_WRITE_MASK) )
4767
4768 best_set_reg(REG_93_EXP_VALUE, %g1, %g7) ! get expected value
4769 ldx [%g2], %g4
4770 xorcc %g7, %g4, %g5
4771 bne test_failed
4772 nop
4773
4774
4775REG_TEST_94:
4776 ! First check that the POR value is correct
4777 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_23_ADDR, %g1, %g2
4778 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_23_POR_VALUE, %g1, %g3)
4779 ldx [%g2], %g4
4780 xorcc %g3, %g4, %g5
4781 bne test_failed
4782 nop
4783
4784 ! Next check that all the writable bits can be written
4785 xor %g3, %l1, %l2
4786 stx %l2, [%g2] ! store inverted POR value
4787
4788#define REG_94_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_23_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_23_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_23_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_23_WRITE_MASK) )
4789
4790 best_set_reg(REG_94_EXP_VALUE, %g1, %g7) ! get expected value
4791 ldx [%g2], %g4
4792 xorcc %g7, %g4, %g5
4793 bne test_failed
4794 nop
4795
4796
4797REG_TEST_95:
4798 ! First check that the POR value is correct
4799 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_24_ADDR, %g1, %g2
4800 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_24_POR_VALUE, %g1, %g3)
4801 ldx [%g2], %g4
4802! xorcc %g3, %g4, %g5
4803! bne test_failed
4804! nop
4805
4806 ! Next check that all the writable bits can be written
4807 xor %g3, %l1, %l2
4808 stx %l2, [%g2] ! store inverted POR value
4809
4810#define REG_95_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_24_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_24_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_24_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_24_WRITE_MASK) )
4811
4812 best_set_reg(REG_95_EXP_VALUE, %g1, %g7) ! get expected value
4813 ldx [%g2], %g4
4814 xorcc %g7, %g4, %g5
4815 bne test_failed
4816 nop
4817
4818
4819REG_TEST_96:
4820 ! First check that the POR value is correct
4821 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_25_ADDR, %g1, %g2
4822 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_25_POR_VALUE, %g1, %g3)
4823 ldx [%g2], %g4
4824! xorcc %g3, %g4, %g5
4825! bne test_failed
4826! nop
4827
4828 ! Next check that all the writable bits can be written
4829 xor %g3, %l1, %l2
4830 stx %l2, [%g2] ! store inverted POR value
4831
4832#define REG_96_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_25_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_25_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_25_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_25_WRITE_MASK) )
4833
4834 best_set_reg(REG_96_EXP_VALUE, %g1, %g7) ! get expected value
4835 ldx [%g2], %g4
4836 xorcc %g7, %g4, %g5
4837 bne test_failed
4838 nop
4839
4840
4841REG_TEST_97:
4842 ! First check that the POR value is correct
4843 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_26_ADDR, %g1, %g2
4844 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_26_POR_VALUE, %g1, %g3)
4845 ldx [%g2], %g4
4846! xorcc %g3, %g4, %g5
4847! bne test_failed
4848! nop
4849
4850 ! Next check that all the writable bits can be written
4851 xor %g3, %l1, %l2
4852 stx %l2, [%g2] ! store inverted POR value
4853
4854#define REG_97_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_26_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_26_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_26_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_26_WRITE_MASK) )
4855
4856 best_set_reg(REG_97_EXP_VALUE, %g1, %g7) ! get expected value
4857 ldx [%g2], %g4
4858 xorcc %g7, %g4, %g5
4859 bne test_failed
4860 nop
4861
4862
4863REG_TEST_98:
4864 ! First check that the POR value is correct
4865 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_27_ADDR, %g1, %g2
4866 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_27_POR_VALUE, %g1, %g3)
4867 ldx [%g2], %g4
4868! xorcc %g3, %g4, %g5
4869! bne test_failed
4870! nop
4871
4872 ! Next check that all the writable bits can be written
4873 xor %g3, %l1, %l2
4874 stx %l2, [%g2] ! store inverted POR value
4875
4876#define REG_98_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_27_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_27_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_27_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_27_WRITE_MASK) )
4877
4878 best_set_reg(REG_98_EXP_VALUE, %g1, %g7) ! get expected value
4879 ldx [%g2], %g4
4880 xorcc %g7, %g4, %g5
4881 bne test_failed
4882 nop
4883
4884
4885REG_TEST_99:
4886 ! First check that the POR value is correct
4887 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_28_ADDR, %g1, %g2
4888 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_28_POR_VALUE, %g1, %g3)
4889 ldx [%g2], %g4
4890! xorcc %g3, %g4, %g5
4891! bne test_failed
4892! nop
4893
4894 ! Next check that all the writable bits can be written
4895 xor %g3, %l1, %l2
4896 stx %l2, [%g2] ! store inverted POR value
4897
4898#define REG_99_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_28_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_28_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_28_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_28_WRITE_MASK) )
4899
4900 best_set_reg(REG_99_EXP_VALUE, %g1, %g7) ! get expected value
4901 ldx [%g2], %g4
4902 xorcc %g7, %g4, %g5
4903 bne test_failed
4904 nop
4905
4906
4907REG_TEST_100:
4908 ! First check that the POR value is correct
4909 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_29_ADDR, %g1, %g2
4910 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_29_POR_VALUE, %g1, %g3)
4911 ldx [%g2], %g4
4912! xorcc %g3, %g4, %g5
4913! bne test_failed
4914! nop
4915
4916 ! Next check that all the writable bits can be written
4917 xor %g3, %l1, %l2
4918 stx %l2, [%g2] ! store inverted POR value
4919
4920#define REG_100_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_29_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_29_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_29_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_29_WRITE_MASK) )
4921
4922 best_set_reg(REG_100_EXP_VALUE, %g1, %g7) ! get expected value
4923 ldx [%g2], %g4
4924 xorcc %g7, %g4, %g5
4925 bne test_failed
4926 nop
4927
4928
4929REG_TEST_101:
4930 ! First check that the POR value is correct
4931 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_30_ADDR, %g1, %g2
4932 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_30_POR_VALUE, %g1, %g3)
4933 ldx [%g2], %g4
4934! xorcc %g3, %g4, %g5
4935! bne test_failed
4936! nop
4937
4938 ! Next check that all the writable bits can be written
4939 xor %g3, %l1, %l2
4940 stx %l2, [%g2] ! store inverted POR value
4941
4942#define REG_101_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_30_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_30_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_30_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_30_WRITE_MASK) )
4943
4944 best_set_reg(REG_101_EXP_VALUE, %g1, %g7) ! get expected value
4945 ldx [%g2], %g4
4946 xorcc %g7, %g4, %g5
4947 bne test_failed
4948 nop
4949
4950
4951REG_TEST_102:
4952 ! First check that the POR value is correct
4953 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_31_ADDR, %g1, %g2
4954 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_31_POR_VALUE, %g1, %g3)
4955 ldx [%g2], %g4
4956! xorcc %g3, %g4, %g5
4957! bne test_failed
4958! nop
4959
4960 ! Next check that all the writable bits can be written
4961 xor %g3, %l1, %l2
4962 stx %l2, [%g2] ! store inverted POR value
4963
4964#define REG_102_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_31_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_31_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_31_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_31_WRITE_MASK) )
4965
4966 best_set_reg(REG_102_EXP_VALUE, %g1, %g7) ! get expected value
4967 ldx [%g2], %g4
4968 xorcc %g7, %g4, %g5
4969 bne test_failed
4970 nop
4971
4972
4973REG_TEST_103:
4974 ! First check that the POR value is correct
4975 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_32_ADDR, %g1, %g2
4976 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_32_POR_VALUE, %g1, %g3)
4977 ldx [%g2], %g4
4978! xorcc %g3, %g4, %g5
4979! bne test_failed
4980 nop
4981
4982 ! Next check that all the writable bits can be written
4983 xor %g3, %l1, %l2
4984 stx %l2, [%g2] ! store inverted POR value
4985
4986#define REG_103_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_32_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_32_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_32_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_32_WRITE_MASK) )
4987
4988 best_set_reg(REG_103_EXP_VALUE, %g1, %g7) ! get expected value
4989 ldx [%g2], %g4
4990 xorcc %g7, %g4, %g5
4991 bne test_failed
4992 nop
4993
4994
4995REG_TEST_104:
4996 ! First check that the POR value is correct
4997 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_33_ADDR, %g1, %g2
4998 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_33_POR_VALUE, %g1, %g3)
4999 ldx [%g2], %g4
5000 xorcc %g3, %g4, %g5
5001! bne test_failed
5002 nop
5003
5004 ! Next check that all the writable bits can be written
5005 xor %g3, %l1, %l2
5006 stx %l2, [%g2] ! store inverted POR value
5007
5008#define REG_104_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_33_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_33_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_33_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_33_WRITE_MASK) )
5009
5010 best_set_reg(REG_104_EXP_VALUE, %g1, %g7) ! get expected value
5011 ldx [%g2], %g4
5012 xorcc %g7, %g4, %g5
5013 bne test_failed
5014 nop
5015
5016
5017REG_TEST_105:
5018 ! First check that the POR value is correct
5019 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_34_ADDR, %g1, %g2
5020 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_34_POR_VALUE, %g1, %g3)
5021 ldx [%g2], %g4
5022 xorcc %g3, %g4, %g5
5023! bne test_failed
5024 nop
5025
5026 ! Next check that all the writable bits can be written
5027 xor %g3, %l1, %l2
5028 stx %l2, [%g2] ! store inverted POR value
5029
5030#define REG_105_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_34_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_34_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_34_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_34_WRITE_MASK) )
5031
5032 best_set_reg(REG_105_EXP_VALUE, %g1, %g7) ! get expected value
5033 ldx [%g2], %g4
5034 xorcc %g7, %g4, %g5
5035 bne test_failed
5036 nop
5037
5038
5039REG_TEST_106:
5040 ! First check that the POR value is correct
5041 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_35_ADDR, %g1, %g2
5042 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_35_POR_VALUE, %g1, %g3)
5043 ldx [%g2], %g4
5044 xorcc %g3, %g4, %g5
5045! bne test_failed
5046 nop
5047
5048 ! Next check that all the writable bits can be written
5049 xor %g3, %l1, %l2
5050 stx %l2, [%g2] ! store inverted POR value
5051
5052#define REG_106_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_35_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_35_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_35_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_35_WRITE_MASK) )
5053
5054 best_set_reg(REG_106_EXP_VALUE, %g1, %g7) ! get expected value
5055 ldx [%g2], %g4
5056 xorcc %g7, %g4, %g5
5057 bne test_failed
5058 nop
5059
5060
5061REG_TEST_107:
5062 ! First check that the POR value is correct
5063 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_36_ADDR, %g1, %g2
5064 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_36_POR_VALUE, %g1, %g3)
5065 ldx [%g2], %g4
5066 xorcc %g3, %g4, %g5
5067! bne test_failed
5068 nop
5069
5070 ! Next check that all the writable bits can be written
5071 xor %g3, %l1, %l2
5072 stx %l2, [%g2] ! store inverted POR value
5073
5074#define REG_107_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_36_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_36_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_36_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_36_WRITE_MASK) )
5075
5076 best_set_reg(REG_107_EXP_VALUE, %g1, %g7) ! get expected value
5077 ldx [%g2], %g4
5078 xorcc %g7, %g4, %g5
5079 bne test_failed
5080 nop
5081
5082
5083REG_TEST_108:
5084 ! First check that the POR value is correct
5085 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_37_ADDR, %g1, %g2
5086 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_37_POR_VALUE, %g1, %g3)
5087 ldx [%g2], %g4
5088 xorcc %g3, %g4, %g5
5089! bne test_failed
5090 nop
5091
5092 ! Next check that all the writable bits can be written
5093 xor %g3, %l1, %l2
5094 stx %l2, [%g2] ! store inverted POR value
5095
5096#define REG_108_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_37_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_37_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_37_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_37_WRITE_MASK) )
5097
5098 best_set_reg(REG_108_EXP_VALUE, %g1, %g7) ! get expected value
5099 ldx [%g2], %g4
5100 xorcc %g7, %g4, %g5
5101 bne test_failed
5102 nop
5103
5104
5105REG_TEST_109:
5106 ! First check that the POR value is correct
5107 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_38_ADDR, %g1, %g2
5108 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_38_POR_VALUE, %g1, %g3)
5109 ldx [%g2], %g4
5110 xorcc %g3, %g4, %g5
5111! bne test_failed
5112 nop
5113
5114 ! Next check that all the writable bits can be written
5115 xor %g3, %l1, %l2
5116 stx %l2, [%g2] ! store inverted POR value
5117
5118#define REG_109_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_38_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_38_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_38_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_38_WRITE_MASK) )
5119
5120 best_set_reg(REG_109_EXP_VALUE, %g1, %g7) ! get expected value
5121 ldx [%g2], %g4
5122 xorcc %g7, %g4, %g5
5123 bne test_failed
5124 nop
5125
5126
5127REG_TEST_110:
5128 ! First check that the POR value is correct
5129 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_39_ADDR, %g1, %g2
5130 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_39_POR_VALUE, %g1, %g3)
5131 ldx [%g2], %g4
5132 xorcc %g3, %g4, %g5
5133! bne test_failed
5134 nop
5135
5136 ! Next check that all the writable bits can be written
5137 xor %g3, %l1, %l2
5138 stx %l2, [%g2] ! store inverted POR value
5139
5140#define REG_110_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_39_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_39_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_39_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_39_WRITE_MASK) )
5141
5142 best_set_reg(REG_110_EXP_VALUE, %g1, %g7) ! get expected value
5143 ldx [%g2], %g4
5144 xorcc %g7, %g4, %g5
5145 bne test_failed
5146 nop
5147
5148
5149REG_TEST_111:
5150 ! First check that the POR value is correct
5151 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_40_ADDR, %g1, %g2
5152 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_40_POR_VALUE, %g1, %g3)
5153 ldx [%g2], %g4
5154 xorcc %g3, %g4, %g5
5155! bne test_failed
5156 nop
5157
5158 ! Next check that all the writable bits can be written
5159 xor %g3, %l1, %l2
5160 stx %l2, [%g2] ! store inverted POR value
5161
5162#define REG_111_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_40_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_40_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_40_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_40_WRITE_MASK) )
5163
5164 best_set_reg(REG_111_EXP_VALUE, %g1, %g7) ! get expected value
5165 ldx [%g2], %g4
5166 xorcc %g7, %g4, %g5
5167 bne test_failed
5168 nop
5169
5170
5171REG_TEST_112:
5172 ! First check that the POR value is correct
5173 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_41_ADDR, %g1, %g2
5174 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_41_POR_VALUE, %g1, %g3)
5175 ldx [%g2], %g4
5176 xorcc %g3, %g4, %g5
5177! bne test_failed
5178 nop
5179
5180 ! Next check that all the writable bits can be written
5181 xor %g3, %l1, %l2
5182 stx %l2, [%g2] ! store inverted POR value
5183
5184#define REG_112_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_41_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_41_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_41_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_41_WRITE_MASK) )
5185
5186 best_set_reg(REG_112_EXP_VALUE, %g1, %g7) ! get expected value
5187 ldx [%g2], %g4
5188 xorcc %g7, %g4, %g5
5189 bne test_failed
5190 nop
5191
5192
5193REG_TEST_113:
5194 ! First check that the POR value is correct
5195 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_42_ADDR, %g1, %g2
5196 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_42_POR_VALUE, %g1, %g3)
5197 ldx [%g2], %g4
5198 xorcc %g3, %g4, %g5
5199! bne test_failed
5200 nop
5201
5202 ! Next check that all the writable bits can be written
5203 xor %g3, %l1, %l2
5204 stx %l2, [%g2] ! store inverted POR value
5205
5206#define REG_113_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_42_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_42_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_42_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_42_WRITE_MASK) )
5207
5208 best_set_reg(REG_113_EXP_VALUE, %g1, %g7) ! get expected value
5209 ldx [%g2], %g4
5210 xorcc %g7, %g4, %g5
5211 bne test_failed
5212 nop
5213
5214
5215REG_TEST_114:
5216 ! First check that the POR value is correct
5217 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_43_ADDR, %g1, %g2
5218 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_43_POR_VALUE, %g1, %g3)
5219 ldx [%g2], %g4
5220 xorcc %g3, %g4, %g5
5221! bne test_failed
5222 nop
5223
5224 ! Next check that all the writable bits can be written
5225 xor %g3, %l1, %l2
5226 stx %l2, [%g2] ! store inverted POR value
5227
5228#define REG_114_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_43_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_43_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_43_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_43_WRITE_MASK) )
5229
5230 best_set_reg(REG_114_EXP_VALUE, %g1, %g7) ! get expected value
5231 ldx [%g2], %g4
5232 xorcc %g7, %g4, %g5
5233 bne test_failed
5234 nop
5235
5236
5237REG_TEST_115:
5238 ! First check that the POR value is correct
5239 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_44_ADDR, %g1, %g2
5240 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_44_POR_VALUE, %g1, %g3)
5241 ldx [%g2], %g4
5242 xorcc %g3, %g4, %g5
5243! bne test_failed
5244 nop
5245
5246 ! Next check that all the writable bits can be written
5247 xor %g3, %l1, %l2
5248 stx %l2, [%g2] ! store inverted POR value
5249
5250#define REG_115_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_44_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_44_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_44_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_44_WRITE_MASK) )
5251
5252 best_set_reg(REG_115_EXP_VALUE, %g1, %g7) ! get expected value
5253 ldx [%g2], %g4
5254 xorcc %g7, %g4, %g5
5255 bne test_failed
5256 nop
5257
5258
5259REG_TEST_116:
5260 ! First check that the POR value is correct
5261 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_45_ADDR, %g1, %g2
5262 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_45_POR_VALUE, %g1, %g3)
5263 ldx [%g2], %g4
5264 xorcc %g3, %g4, %g5
5265! bne test_failed
5266 nop
5267
5268 ! Next check that all the writable bits can be written
5269 xor %g3, %l1, %l2
5270 stx %l2, [%g2] ! store inverted POR value
5271
5272#define REG_116_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_45_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_45_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_45_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_45_WRITE_MASK) )
5273
5274 best_set_reg(REG_116_EXP_VALUE, %g1, %g7) ! get expected value
5275 ldx [%g2], %g4
5276 xorcc %g7, %g4, %g5
5277 bne test_failed
5278 nop
5279
5280
5281REG_TEST_117:
5282 ! First check that the POR value is correct
5283 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_46_ADDR, %g1, %g2
5284 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_46_POR_VALUE, %g1, %g3)
5285 ldx [%g2], %g4
5286 xorcc %g3, %g4, %g5
5287! bne test_failed
5288 nop
5289
5290 ! Next check that all the writable bits can be written
5291 xor %g3, %l1, %l2
5292 stx %l2, [%g2] ! store inverted POR value
5293
5294#define REG_117_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_46_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_46_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_46_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_46_WRITE_MASK) )
5295
5296 best_set_reg(REG_117_EXP_VALUE, %g1, %g7) ! get expected value
5297 ldx [%g2], %g4
5298 xorcc %g7, %g4, %g5
5299 bne test_failed
5300 nop
5301
5302
5303REG_TEST_118:
5304 ! First check that the POR value is correct
5305 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_47_ADDR, %g1, %g2
5306 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_47_POR_VALUE, %g1, %g3)
5307 ldx [%g2], %g4
5308 xorcc %g3, %g4, %g5
5309! bne test_failed
5310 nop
5311
5312 ! Next check that all the writable bits can be written
5313 xor %g3, %l1, %l2
5314 stx %l2, [%g2] ! store inverted POR value
5315
5316#define REG_118_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_47_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_47_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_47_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_47_WRITE_MASK) )
5317
5318 best_set_reg(REG_118_EXP_VALUE, %g1, %g7) ! get expected value
5319 ldx [%g2], %g4
5320 xorcc %g7, %g4, %g5
5321 bne test_failed
5322 nop
5323
5324
5325REG_TEST_119:
5326 ! First check that the POR value is correct
5327 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_48_ADDR, %g1, %g2
5328 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_48_POR_VALUE, %g1, %g3)
5329 ldx [%g2], %g4
5330 xorcc %g3, %g4, %g5
5331! bne test_failed
5332 nop
5333
5334 ! Next check that all the writable bits can be written
5335 xor %g3, %l1, %l2
5336 stx %l2, [%g2] ! store inverted POR value
5337
5338#define REG_119_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_48_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_48_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_48_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_48_WRITE_MASK) )
5339
5340 best_set_reg(REG_119_EXP_VALUE, %g1, %g7) ! get expected value
5341 ldx [%g2], %g4
5342 xorcc %g7, %g4, %g5
5343 bne test_failed
5344 nop
5345
5346
5347REG_TEST_120:
5348 ! First check that the POR value is correct
5349 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_49_ADDR, %g1, %g2
5350 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_49_POR_VALUE, %g1, %g3)
5351 ldx [%g2], %g4
5352 xorcc %g3, %g4, %g5
5353! bne test_failed
5354 nop
5355
5356 ! Next check that all the writable bits can be written
5357 xor %g3, %l1, %l2
5358 stx %l2, [%g2] ! store inverted POR value
5359
5360#define REG_120_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_49_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_49_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_49_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_49_WRITE_MASK) )
5361
5362 best_set_reg(REG_120_EXP_VALUE, %g1, %g7) ! get expected value
5363 ldx [%g2], %g4
5364 xorcc %g7, %g4, %g5
5365 bne test_failed
5366 nop
5367
5368
5369REG_TEST_121:
5370 ! First check that the POR value is correct
5371 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_50_ADDR, %g1, %g2
5372 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_50_POR_VALUE, %g1, %g3)
5373 ldx [%g2], %g4
5374 xorcc %g3, %g4, %g5
5375! bne test_failed
5376 nop
5377
5378 ! Next check that all the writable bits can be written
5379 xor %g3, %l1, %l2
5380 stx %l2, [%g2] ! store inverted POR value
5381
5382#define REG_121_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_50_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_50_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_50_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_50_WRITE_MASK) )
5383
5384 best_set_reg(REG_121_EXP_VALUE, %g1, %g7) ! get expected value
5385 ldx [%g2], %g4
5386 xorcc %g7, %g4, %g5
5387 bne test_failed
5388 nop
5389
5390
5391REG_TEST_122:
5392 ! First check that the POR value is correct
5393 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_51_ADDR, %g1, %g2
5394 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_51_POR_VALUE, %g1, %g3)
5395 ldx [%g2], %g4
5396 xorcc %g3, %g4, %g5
5397! bne test_failed
5398 nop
5399
5400 ! Next check that all the writable bits can be written
5401 xor %g3, %l1, %l2
5402 stx %l2, [%g2] ! store inverted POR value
5403
5404#define REG_122_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_51_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_51_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_51_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_51_WRITE_MASK) )
5405
5406 best_set_reg(REG_122_EXP_VALUE, %g1, %g7) ! get expected value
5407 ldx [%g2], %g4
5408 xorcc %g7, %g4, %g5
5409 bne test_failed
5410 nop
5411
5412
5413REG_TEST_123:
5414 ! First check that the POR value is correct
5415 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_52_ADDR, %g1, %g2
5416 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_52_POR_VALUE, %g1, %g3)
5417 ldx [%g2], %g4
5418 xorcc %g3, %g4, %g5
5419! bne test_failed
5420 nop
5421
5422 ! Next check that all the writable bits can be written
5423 xor %g3, %l1, %l2
5424 stx %l2, [%g2] ! store inverted POR value
5425
5426#define REG_123_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_52_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_52_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_52_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_52_WRITE_MASK) )
5427
5428 best_set_reg(REG_123_EXP_VALUE, %g1, %g7) ! get expected value
5429 ldx [%g2], %g4
5430 xorcc %g7, %g4, %g5
5431 bne test_failed
5432 nop
5433
5434
5435REG_TEST_124:
5436 ! First check that the POR value is correct
5437 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_53_ADDR, %g1, %g2
5438 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_53_POR_VALUE, %g1, %g3)
5439 ldx [%g2], %g4
5440 xorcc %g3, %g4, %g5
5441! bne test_failed
5442 nop
5443
5444 ! Next check that all the writable bits can be written
5445 xor %g3, %l1, %l2
5446 stx %l2, [%g2] ! store inverted POR value
5447
5448#define REG_124_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_53_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_53_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_53_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_53_WRITE_MASK) )
5449
5450 best_set_reg(REG_124_EXP_VALUE, %g1, %g7) ! get expected value
5451 ldx [%g2], %g4
5452 xorcc %g7, %g4, %g5
5453 bne test_failed
5454 nop
5455
5456
5457REG_TEST_125:
5458 ! First check that the POR value is correct
5459 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_54_ADDR, %g1, %g2
5460 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_54_POR_VALUE, %g1, %g3)
5461 ldx [%g2], %g4
5462 xorcc %g3, %g4, %g5
5463! bne test_failed
5464 nop
5465
5466 ! Next check that all the writable bits can be written
5467 xor %g3, %l1, %l2
5468 stx %l2, [%g2] ! store inverted POR value
5469
5470#define REG_125_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_54_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_54_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_54_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_54_WRITE_MASK) )
5471
5472 best_set_reg(REG_125_EXP_VALUE, %g1, %g7) ! get expected value
5473 ldx [%g2], %g4
5474 xorcc %g7, %g4, %g5
5475 bne test_failed
5476 nop
5477
5478
5479REG_TEST_126:
5480 ! First check that the POR value is correct
5481 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_55_ADDR, %g1, %g2
5482 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_55_POR_VALUE, %g1, %g3)
5483 ldx [%g2], %g4
5484 xorcc %g3, %g4, %g5
5485! bne test_failed
5486 nop
5487
5488 ! Next check that all the writable bits can be written
5489 xor %g3, %l1, %l2
5490 stx %l2, [%g2] ! store inverted POR value
5491
5492#define REG_126_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_55_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_55_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_55_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_55_WRITE_MASK) )
5493
5494 best_set_reg(REG_126_EXP_VALUE, %g1, %g7) ! get expected value
5495 ldx [%g2], %g4
5496 xorcc %g7, %g4, %g5
5497 bne test_failed
5498 nop
5499
5500
5501REG_TEST_127:
5502 ! First check that the POR value is correct
5503 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_56_ADDR, %g1, %g2
5504 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_56_POR_VALUE, %g1, %g3)
5505 ldx [%g2], %g4
5506 xorcc %g3, %g4, %g5
5507! bne test_failed
5508 nop
5509
5510 ! Next check that all the writable bits can be written
5511 xor %g3, %l1, %l2
5512 stx %l2, [%g2] ! store inverted POR value
5513
5514#define REG_127_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_56_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_56_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_56_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_56_WRITE_MASK) )
5515
5516 best_set_reg(REG_127_EXP_VALUE, %g1, %g7) ! get expected value
5517 ldx [%g2], %g4
5518 xorcc %g7, %g4, %g5
5519 bne test_failed
5520 nop
5521
5522
5523REG_TEST_128:
5524 ! First check that the POR value is correct
5525 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_57_ADDR, %g1, %g2
5526 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_57_POR_VALUE, %g1, %g3)
5527 ldx [%g2], %g4
5528 xorcc %g3, %g4, %g5
5529! bne test_failed
5530 nop
5531
5532 ! Next check that all the writable bits can be written
5533 xor %g3, %l1, %l2
5534 stx %l2, [%g2] ! store inverted POR value
5535
5536#define REG_128_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_57_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_57_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_57_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_57_WRITE_MASK) )
5537
5538 best_set_reg(REG_128_EXP_VALUE, %g1, %g7) ! get expected value
5539 ldx [%g2], %g4
5540 xorcc %g7, %g4, %g5
5541 bne test_failed
5542 nop
5543
5544
5545REG_TEST_129:
5546 ! First check that the POR value is correct
5547 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_58_ADDR, %g1, %g2
5548 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_58_POR_VALUE, %g1, %g3)
5549 ldx [%g2], %g4
5550 xorcc %g3, %g4, %g5
5551! bne test_failed
5552 nop
5553
5554 ! Next check that all the writable bits can be written
5555 xor %g3, %l1, %l2
5556 stx %l2, [%g2] ! store inverted POR value
5557
5558#define REG_129_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_58_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_58_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_58_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_58_WRITE_MASK) )
5559
5560 best_set_reg(REG_129_EXP_VALUE, %g1, %g7) ! get expected value
5561 ldx [%g2], %g4
5562 xorcc %g7, %g4, %g5
5563 bne test_failed
5564 nop
5565
5566
5567REG_TEST_130:
5568 ! First check that the POR value is correct
5569 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_59_ADDR, %g1, %g2
5570 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_59_POR_VALUE, %g1, %g3)
5571 ldx [%g2], %g4
5572 xorcc %g3, %g4, %g5
5573! bne test_failed
5574 nop
5575
5576 ! Next check that all the writable bits can be written
5577 xor %g3, %l1, %l2
5578 stx %l2, [%g2] ! store inverted POR value
5579
5580#define REG_130_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_59_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_59_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_59_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_59_WRITE_MASK) )
5581
5582 best_set_reg(REG_130_EXP_VALUE, %g1, %g7) ! get expected value
5583 ldx [%g2], %g4
5584 xorcc %g7, %g4, %g5
5585 bne test_failed
5586 nop
5587
5588
5589REG_TEST_131:
5590 ! First check that the POR value is correct
5591 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_62_ADDR, %g1, %g2
5592 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_62_POR_VALUE, %g1, %g3)
5593 ldx [%g2], %g4
5594 xorcc %g3, %g4, %g5
5595! bne test_failed
5596 nop
5597
5598 ! Next check that all the writable bits can be written
5599 xor %g3, %l1, %l2
5600 stx %l2, [%g2] ! store inverted POR value
5601
5602#define REG_131_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_62_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_62_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_62_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_62_WRITE_MASK) )
5603
5604 best_set_reg(REG_131_EXP_VALUE, %g1, %g7) ! get expected value
5605 ldx [%g2], %g4
5606 xorcc %g7, %g4, %g5
5607 bne test_failed
5608 nop
5609
5610
5611REG_TEST_132:
5612 ! First check that the POR value is correct
5613 setx FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_63_ADDR, %g1, %g2
5614 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_63_POR_VALUE, %g1, %g3)
5615 ldx [%g2], %g4
5616 xorcc %g3, %g4, %g5
5617! bne test_failed
5618 nop
5619
5620 ! Next check that all the writable bits can be written
5621 xor %g3, %l1, %l2
5622 stx %l2, [%g2] ! store inverted POR value
5623
5624#define REG_132_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_63_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_63_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_63_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_CLR_INT_REG_63_WRITE_MASK) )
5625
5626 best_set_reg(REG_132_EXP_VALUE, %g1, %g7) ! get expected value
5627 ldx [%g2], %g4
5628 xorcc %g7, %g4, %g5
5629 bne test_failed
5630 nop
5631
5632
5633REG_TEST_133:
5634 ! First check that the POR value is correct
5635 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_RETRY_TIMER_ADDR, %g1, %g2
5636 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_RETRY_TIMER_POR_VALUE, %g1, %g3)
5637 ldx [%g2], %g4
5638 xorcc %g3, %g4, %g5
5639 bne test_failed
5640 nop
5641
5642 ! Next check that all the writable bits can be written
5643 xor %g3, %l1, %l2
5644 stx %l2, [%g2] ! store inverted POR value
5645
5646#define REG_133_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_RETRY_TIMER_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_RETRY_TIMER_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_RETRY_TIMER_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_RETRY_TIMER_WRITE_MASK) )
5647
5648 best_set_reg(REG_133_EXP_VALUE, %g1, %g7) ! get expected value
5649 ldx [%g2], %g4
5650 xorcc %g7, %g4, %g5
5651 bne test_failed
5652 nop
5653
5654
5655REG_TEST_134:
5656 ! First check that the POR value is correct
5657 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_STATE_STATUS_1_ADDR, %g1, %g2
5658 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_STATE_STATUS_1_POR_VALUE, %g1, %g3)
5659 ldx [%g2], %g4
5660 xorcc %g3, %g4, %g5
5661 !bne test_failed
5662 nop
5663
5664 ! Next check that all the writable bits can be written
5665 xor %g3, %l1, %l2
5666 stx %l2, [%g2] ! store inverted POR value
5667
5668#define REG_134_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_STATE_STATUS_1_POR_VALUE & FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_STATE_STATUS_1_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_STATE_STATUS_1_POR_VALUE & ~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_STATE_STATUS_1_WRITE_MASK) )
5669
5670 best_set_reg(REG_134_EXP_VALUE, %g1, %g7) ! get expected value
5671 ldx [%g2], %g4
5672 xorcc %g7, %g4, %g5
5673 bne test_failed
5674 nop
5675
5676
5677REG_TEST_135:
5678 ! First check that the POR value is correct
5679 setx FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_STATE_STATUS_2_ADDR, %g1, %g2
5680 best_set_reg(FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_STATE_STATUS_2_POR_VALUE, %g1, %g3)
5681 ldx [%g2], %g4
5682 xorcc %g3, %g4, %g5
5683 !bne test_failed
5684 nop
5685
5686 ! Next check that all the writable bits can be written
5687 xor %g3, %l1, %l2
5688 stx %l2, [%g2] ! store inverted POR value
5689
5690#define myFIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_STATE_STATUS_2_WRITE_MASK 0xf0ffffffffffffff
5691#define REG_135_EXP_VALUE mpeval( (~FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_STATE_STATUS_2_POR_VALUE & myFIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_STATE_STATUS_2_WRITE_MASK) | (FIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_STATE_STATUS_2_POR_VALUE & ~myFIRE_DLC_IMU_ISS_CSR_A_INTERRUPT_STATE_STATUS_2_WRITE_MASK) )
5692
5693 best_set_reg(REG_135_EXP_VALUE, %g1, %g7) ! get expected value
5694 ldx [%g2], %g4
5695 xorcc %g7, %g4, %g5
5696 bne test_failed
5697 nop
5698
5699
5700REG_TEST_136:
5701 ! First check that the POR value is correct
5702 setx FIRE_DLC_IMU_RDS_MESS_CSR_A_ERR_COR_MAPPING_ADDR, %g1, %g2
5703 best_set_reg(FIRE_DLC_IMU_RDS_MESS_CSR_A_ERR_COR_MAPPING_POR_VALUE, %g1, %g3)
5704 ldx [%g2], %g4
5705 xorcc %g3, %g4, %g5
5706 bne test_failed
5707 nop
5708
5709 ! Next check that all the writable bits can be written
5710 xor %g3, %l1, %l2
5711 stx %l2, [%g2] ! store inverted POR value
5712
5713#define REG_136_EXP_VALUE mpeval( (~FIRE_DLC_IMU_RDS_MESS_CSR_A_ERR_COR_MAPPING_POR_VALUE & FIRE_DLC_IMU_RDS_MESS_CSR_A_ERR_COR_MAPPING_WRITE_MASK) | (FIRE_DLC_IMU_RDS_MESS_CSR_A_ERR_COR_MAPPING_POR_VALUE & ~FIRE_DLC_IMU_RDS_MESS_CSR_A_ERR_COR_MAPPING_WRITE_MASK) )
5714
5715 best_set_reg(REG_136_EXP_VALUE, %g1, %g7) ! get expected value
5716 ldx [%g2], %g4
5717 xorcc %g7, %g4, %g5
5718 bne test_failed
5719 nop
5720
5721
5722REG_TEST_137:
5723 ! First check that the POR value is correct
5724 setx FIRE_DLC_IMU_RDS_MESS_CSR_A_ERR_NONFATAL_MAPPING_ADDR, %g1, %g2
5725 best_set_reg(FIRE_DLC_IMU_RDS_MESS_CSR_A_ERR_NONFATAL_MAPPING_POR_VALUE, %g1, %g3)
5726 ldx [%g2], %g4
5727 xorcc %g3, %g4, %g5
5728 bne test_failed
5729 nop
5730
5731 ! Next check that all the writable bits can be written
5732 xor %g3, %l1, %l2
5733 stx %l2, [%g2] ! store inverted POR value
5734
5735#define REG_137_EXP_VALUE mpeval( (~FIRE_DLC_IMU_RDS_MESS_CSR_A_ERR_NONFATAL_MAPPING_POR_VALUE & FIRE_DLC_IMU_RDS_MESS_CSR_A_ERR_NONFATAL_MAPPING_WRITE_MASK) | (FIRE_DLC_IMU_RDS_MESS_CSR_A_ERR_NONFATAL_MAPPING_POR_VALUE & ~FIRE_DLC_IMU_RDS_MESS_CSR_A_ERR_NONFATAL_MAPPING_WRITE_MASK) )
5736
5737 best_set_reg(REG_137_EXP_VALUE, %g1, %g7) ! get expected value
5738 ldx [%g2], %g4
5739 xorcc %g7, %g4, %g5
5740 bne test_failed
5741 nop
5742
5743
5744REG_TEST_138:
5745 ! First check that the POR value is correct
5746 setx FIRE_DLC_IMU_RDS_MESS_CSR_A_ERR_FATAL_MAPPING_ADDR, %g1, %g2
5747 best_set_reg(FIRE_DLC_IMU_RDS_MESS_CSR_A_ERR_FATAL_MAPPING_POR_VALUE, %g1, %g3)
5748 ldx [%g2], %g4
5749 xorcc %g3, %g4, %g5
5750 bne test_failed
5751 nop
5752
5753 ! Next check that all the writable bits can be written
5754 xor %g3, %l1, %l2
5755 stx %l2, [%g2] ! store inverted POR value
5756
5757#define REG_138_EXP_VALUE mpeval( (~FIRE_DLC_IMU_RDS_MESS_CSR_A_ERR_FATAL_MAPPING_POR_VALUE & FIRE_DLC_IMU_RDS_MESS_CSR_A_ERR_FATAL_MAPPING_WRITE_MASK) | (FIRE_DLC_IMU_RDS_MESS_CSR_A_ERR_FATAL_MAPPING_POR_VALUE & ~FIRE_DLC_IMU_RDS_MESS_CSR_A_ERR_FATAL_MAPPING_WRITE_MASK) )
5758
5759 best_set_reg(REG_138_EXP_VALUE, %g1, %g7) ! get expected value
5760 ldx [%g2], %g4
5761 xorcc %g7, %g4, %g5
5762 bne test_failed
5763 nop
5764
5765
5766REG_TEST_139:
5767 ! First check that the POR value is correct
5768 setx FIRE_DLC_IMU_RDS_MESS_CSR_A_PM_PME_MAPPING_ADDR, %g1, %g2
5769 best_set_reg(FIRE_DLC_IMU_RDS_MESS_CSR_A_PM_PME_MAPPING_POR_VALUE, %g1, %g3)
5770 ldx [%g2], %g4
5771 xorcc %g3, %g4, %g5
5772 bne test_failed
5773 nop
5774
5775 ! Next check that all the writable bits can be written
5776 xor %g3, %l1, %l2
5777 stx %l2, [%g2] ! store inverted POR value
5778
5779#define REG_139_EXP_VALUE mpeval( (~FIRE_DLC_IMU_RDS_MESS_CSR_A_PM_PME_MAPPING_POR_VALUE & FIRE_DLC_IMU_RDS_MESS_CSR_A_PM_PME_MAPPING_WRITE_MASK) | (FIRE_DLC_IMU_RDS_MESS_CSR_A_PM_PME_MAPPING_POR_VALUE & ~FIRE_DLC_IMU_RDS_MESS_CSR_A_PM_PME_MAPPING_WRITE_MASK) )
5780
5781 best_set_reg(REG_139_EXP_VALUE, %g1, %g7) ! get expected value
5782 ldx [%g2], %g4
5783 xorcc %g7, %g4, %g5
5784 bne test_failed
5785 nop
5786
5787
5788REG_TEST_140:
5789 ! First check that the POR value is correct
5790 setx FIRE_DLC_IMU_RDS_MESS_CSR_A_PME_TO_ACK_MAPPING_ADDR, %g1, %g2
5791 best_set_reg(FIRE_DLC_IMU_RDS_MESS_CSR_A_PME_TO_ACK_MAPPING_POR_VALUE, %g1, %g3)
5792 ldx [%g2], %g4
5793 xorcc %g3, %g4, %g5
5794 bne test_failed
5795 nop
5796
5797 ! Next check that all the writable bits can be written
5798 xor %g3, %l1, %l2
5799 stx %l2, [%g2] ! store inverted POR value
5800
5801#define REG_140_EXP_VALUE mpeval( (~FIRE_DLC_IMU_RDS_MESS_CSR_A_PME_TO_ACK_MAPPING_POR_VALUE & FIRE_DLC_IMU_RDS_MESS_CSR_A_PME_TO_ACK_MAPPING_WRITE_MASK) | (FIRE_DLC_IMU_RDS_MESS_CSR_A_PME_TO_ACK_MAPPING_POR_VALUE & ~FIRE_DLC_IMU_RDS_MESS_CSR_A_PME_TO_ACK_MAPPING_WRITE_MASK) )
5802
5803 best_set_reg(REG_140_EXP_VALUE, %g1, %g7) ! get expected value
5804 ldx [%g2], %g4
5805 xorcc %g7, %g4, %g5
5806 bne test_failed
5807 nop
5808
5809
5810 ba test_passed
5811 nop
5812
5813thread_3:
5814
5815REG_TEST_141:
5816 ! First check that the POR value is correct
5817 setx FIRE_DLC_IMU_RDS_MSI_CSR_A_MSI_MAPPING_ADDR, %g1, %g2
5818 best_set_reg(FIRE_DLC_IMU_RDS_MSI_CSR_A_MSI_MAPPING_POR_VALUE, %g1, %g3)
5819 ldx [%g2], %g4
5820 xorcc %g3, %g4, %g5
5821 bne test_failed
5822 nop
5823
5824 ! Next check that all the writable bits can be written
5825 xor %g3, %l1, %l2
5826 stx %l2, [%g2] ! store inverted POR value
5827
5828#define REG_141_EXP_VALUE mpeval( (~FIRE_DLC_IMU_RDS_MSI_CSR_A_MSI_MAPPING_POR_VALUE & FIRE_DLC_IMU_RDS_MSI_CSR_A_MSI_MAPPING_WRITE_MASK) | (FIRE_DLC_IMU_RDS_MSI_CSR_A_MSI_MAPPING_POR_VALUE & ~FIRE_DLC_IMU_RDS_MSI_CSR_A_MSI_MAPPING_WRITE_MASK) )
5829
5830 best_set_reg(REG_141_EXP_VALUE, %g1, %g7) ! get expected value
5831 ldx [%g2], %g4
5832 xorcc %g7, %g4, %g5
5833 bne test_failed
5834 nop
5835
5836
5837 ! First check that the POR value is correct
5838 add %g2, 8, %g2
5839 ldx [%g2], %g4
5840 xorcc %g3, %g4, %g5
5841 bne test_failed
5842 nop
5843
5844 ! Next check that all the writable bits can be written
5845 stx %l2, [%g2] ! store inverted POR value
5846 ldx [%g2], %g4
5847 xorcc %g7, %g4, %g5
5848 bne test_failed
5849 nop
5850
5851
5852 ! First check that the POR value is correct
5853 add %g2, 8, %g2
5854 ldx [%g2], %g4
5855 xorcc %g3, %g4, %g5
5856 bne test_failed
5857 nop
5858
5859 ! Next check that all the writable bits can be written
5860 stx %l2, [%g2] ! store inverted POR value
5861 ldx [%g2], %g4
5862 xorcc %g7, %g4, %g5
5863 bne test_failed
5864 nop
5865
5866
5867 ! First check that the POR value is correct
5868 add %g2, 8, %g2
5869 ldx [%g2], %g4
5870 xorcc %g3, %g4, %g5
5871 bne test_failed
5872 nop
5873
5874 ! Next check that all the writable bits can be written
5875 stx %l2, [%g2] ! store inverted POR value
5876 ldx [%g2], %g4
5877 xorcc %g7, %g4, %g5
5878 bne test_failed
5879 nop
5880
5881
5882 ! First check that the POR value is correct
5883 add %g2, 8, %g2
5884 ldx [%g2], %g4
5885 xorcc %g3, %g4, %g5
5886 bne test_failed
5887 nop
5888
5889 ! Next check that all the writable bits can be written
5890 stx %l2, [%g2] ! store inverted POR value
5891 ldx [%g2], %g4
5892 xorcc %g7, %g4, %g5
5893 bne test_failed
5894 nop
5895
5896
5897 ! First check that the POR value is correct
5898 add %g2, 8, %g2
5899 ldx [%g2], %g4
5900 xorcc %g3, %g4, %g5
5901 bne test_failed
5902 nop
5903
5904 ! Next check that all the writable bits can be written
5905 stx %l2, [%g2] ! store inverted POR value
5906 ldx [%g2], %g4
5907 xorcc %g7, %g4, %g5
5908 bne test_failed
5909 nop
5910
5911
5912 ! First check that the POR value is correct
5913 add %g2, 8, %g2
5914 ldx [%g2], %g4
5915 xorcc %g3, %g4, %g5
5916 bne test_failed
5917 nop
5918
5919 ! Next check that all the writable bits can be written
5920 stx %l2, [%g2] ! store inverted POR value
5921 ldx [%g2], %g4
5922 xorcc %g7, %g4, %g5
5923 bne test_failed
5924 nop
5925
5926
5927 ! First check that the POR value is correct
5928 add %g2, 8, %g2
5929 ldx [%g2], %g4
5930 xorcc %g3, %g4, %g5
5931 bne test_failed
5932 nop
5933
5934 ! Next check that all the writable bits can be written
5935 stx %l2, [%g2] ! store inverted POR value
5936 ldx [%g2], %g4
5937 xorcc %g7, %g4, %g5
5938 bne test_failed
5939 nop
5940
5941
5942 ! First check that the POR value is correct
5943 add %g2, 8, %g2
5944 ldx [%g2], %g4
5945 xorcc %g3, %g4, %g5
5946 bne test_failed
5947 nop
5948
5949 ! Next check that all the writable bits can be written
5950 stx %l2, [%g2] ! store inverted POR value
5951 ldx [%g2], %g4
5952 xorcc %g7, %g4, %g5
5953 bne test_failed
5954 nop
5955
5956
5957 ! First check that the POR value is correct
5958 add %g2, 8, %g2
5959 ldx [%g2], %g4
5960 xorcc %g3, %g4, %g5
5961 bne test_failed
5962 nop
5963
5964 ! Next check that all the writable bits can be written
5965 stx %l2, [%g2] ! store inverted POR value
5966 ldx [%g2], %g4
5967 xorcc %g7, %g4, %g5
5968 bne test_failed
5969 nop
5970
5971
5972 ! First check that the POR value is correct
5973 add %g2, 8, %g2
5974 ldx [%g2], %g4
5975 xorcc %g3, %g4, %g5
5976 bne test_failed
5977 nop
5978
5979 ! Next check that all the writable bits can be written
5980 stx %l2, [%g2] ! store inverted POR value
5981 ldx [%g2], %g4
5982 xorcc %g7, %g4, %g5
5983 bne test_failed
5984 nop
5985
5986
5987 ! First check that the POR value is correct
5988 add %g2, 8, %g2
5989 ldx [%g2], %g4
5990 xorcc %g3, %g4, %g5
5991 bne test_failed
5992 nop
5993
5994 ! Next check that all the writable bits can be written
5995 stx %l2, [%g2] ! store inverted POR value
5996 ldx [%g2], %g4
5997 xorcc %g7, %g4, %g5
5998 bne test_failed
5999 nop
6000
6001
6002 ! First check that the POR value is correct
6003 add %g2, 8, %g2
6004 ldx [%g2], %g4
6005 xorcc %g3, %g4, %g5
6006 bne test_failed
6007 nop
6008
6009 ! Next check that all the writable bits can be written
6010 stx %l2, [%g2] ! store inverted POR value
6011 ldx [%g2], %g4
6012 xorcc %g7, %g4, %g5
6013 bne test_failed
6014 nop
6015
6016
6017 ! First check that the POR value is correct
6018 add %g2, 8, %g2
6019 ldx [%g2], %g4
6020 xorcc %g3, %g4, %g5
6021 bne test_failed
6022 nop
6023
6024 ! Next check that all the writable bits can be written
6025 stx %l2, [%g2] ! store inverted POR value
6026 ldx [%g2], %g4
6027 xorcc %g7, %g4, %g5
6028 bne test_failed
6029 nop
6030
6031
6032 ! First check that the POR value is correct
6033 add %g2, 8, %g2
6034 ldx [%g2], %g4
6035 xorcc %g3, %g4, %g5
6036 bne test_failed
6037 nop
6038
6039 ! Next check that all the writable bits can be written
6040 stx %l2, [%g2] ! store inverted POR value
6041 ldx [%g2], %g4
6042 xorcc %g7, %g4, %g5
6043 bne test_failed
6044 nop
6045
6046
6047 ! First check that the POR value is correct
6048 add %g2, 8, %g2
6049 ldx [%g2], %g4
6050 xorcc %g3, %g4, %g5
6051 bne test_failed
6052 nop
6053
6054 ! Next check that all the writable bits can be written
6055 stx %l2, [%g2] ! store inverted POR value
6056 ldx [%g2], %g4
6057 xorcc %g7, %g4, %g5
6058 bne test_failed
6059 nop
6060
6061
6062 ! First check that the POR value is correct
6063 add %g2, 8, %g2
6064 ldx [%g2], %g4
6065 xorcc %g3, %g4, %g5
6066 bne test_failed
6067 nop
6068
6069 ! Next check that all the writable bits can be written
6070 stx %l2, [%g2] ! store inverted POR value
6071 ldx [%g2], %g4
6072 xorcc %g7, %g4, %g5
6073 bne test_failed
6074 nop
6075
6076
6077 ! First check that the POR value is correct
6078 add %g2, 8, %g2
6079 ldx [%g2], %g4
6080 xorcc %g3, %g4, %g5
6081 bne test_failed
6082 nop
6083
6084 ! Next check that all the writable bits can be written
6085 stx %l2, [%g2] ! store inverted POR value
6086 ldx [%g2], %g4
6087 xorcc %g7, %g4, %g5
6088 bne test_failed
6089 nop
6090
6091
6092 ! First check that the POR value is correct
6093 add %g2, 8, %g2
6094 ldx [%g2], %g4
6095 xorcc %g3, %g4, %g5
6096 bne test_failed
6097 nop
6098
6099 ! Next check that all the writable bits can be written
6100 stx %l2, [%g2] ! store inverted POR value
6101 ldx [%g2], %g4
6102 xorcc %g7, %g4, %g5
6103 bne test_failed
6104 nop
6105
6106
6107 ! First check that the POR value is correct
6108 add %g2, 8, %g2
6109 ldx [%g2], %g4
6110 xorcc %g3, %g4, %g5
6111 bne test_failed
6112 nop
6113
6114 ! Next check that all the writable bits can be written
6115 stx %l2, [%g2] ! store inverted POR value
6116 ldx [%g2], %g4
6117 xorcc %g7, %g4, %g5
6118 bne test_failed
6119 nop
6120
6121
6122 ! First check that the POR value is correct
6123 add %g2, 8, %g2
6124 ldx [%g2], %g4
6125 xorcc %g3, %g4, %g5
6126 bne test_failed
6127 nop
6128
6129 ! Next check that all the writable bits can be written
6130 stx %l2, [%g2] ! store inverted POR value
6131 ldx [%g2], %g4
6132 xorcc %g7, %g4, %g5
6133 bne test_failed
6134 nop
6135
6136
6137 ! First check that the POR value is correct
6138 add %g2, 8, %g2
6139 ldx [%g2], %g4
6140 xorcc %g3, %g4, %g5
6141 bne test_failed
6142 nop
6143
6144 ! Next check that all the writable bits can be written
6145 stx %l2, [%g2] ! store inverted POR value
6146 ldx [%g2], %g4
6147 xorcc %g7, %g4, %g5
6148 bne test_failed
6149 nop
6150
6151
6152 ! First check that the POR value is correct
6153 add %g2, 8, %g2
6154 ldx [%g2], %g4
6155 xorcc %g3, %g4, %g5
6156 bne test_failed
6157 nop
6158
6159 ! Next check that all the writable bits can be written
6160 stx %l2, [%g2] ! store inverted POR value
6161 ldx [%g2], %g4
6162 xorcc %g7, %g4, %g5
6163 bne test_failed
6164 nop
6165
6166
6167 ! First check that the POR value is correct
6168 add %g2, 8, %g2
6169 ldx [%g2], %g4
6170 xorcc %g3, %g4, %g5
6171 bne test_failed
6172 nop
6173
6174 ! Next check that all the writable bits can be written
6175 stx %l2, [%g2] ! store inverted POR value
6176 ldx [%g2], %g4
6177 xorcc %g7, %g4, %g5
6178 bne test_failed
6179 nop
6180
6181
6182 ! First check that the POR value is correct
6183 add %g2, 8, %g2
6184 ldx [%g2], %g4
6185 xorcc %g3, %g4, %g5
6186 bne test_failed
6187 nop
6188
6189 ! Next check that all the writable bits can be written
6190 stx %l2, [%g2] ! store inverted POR value
6191 ldx [%g2], %g4
6192 xorcc %g7, %g4, %g5
6193 bne test_failed
6194 nop
6195
6196
6197 ! First check that the POR value is correct
6198 add %g2, 8, %g2
6199 ldx [%g2], %g4
6200 xorcc %g3, %g4, %g5
6201 bne test_failed
6202 nop
6203
6204 ! Next check that all the writable bits can be written
6205 stx %l2, [%g2] ! store inverted POR value
6206 ldx [%g2], %g4
6207 xorcc %g7, %g4, %g5
6208 bne test_failed
6209 nop
6210
6211
6212 ! First check that the POR value is correct
6213 add %g2, 8, %g2
6214 ldx [%g2], %g4
6215 xorcc %g3, %g4, %g5
6216 bne test_failed
6217 nop
6218
6219 ! Next check that all the writable bits can be written
6220 stx %l2, [%g2] ! store inverted POR value
6221 ldx [%g2], %g4
6222 xorcc %g7, %g4, %g5
6223 bne test_failed
6224 nop
6225
6226
6227 ! First check that the POR value is correct
6228 add %g2, 8, %g2
6229 ldx [%g2], %g4
6230 xorcc %g3, %g4, %g5
6231 bne test_failed
6232 nop
6233
6234 ! Next check that all the writable bits can be written
6235 stx %l2, [%g2] ! store inverted POR value
6236 ldx [%g2], %g4
6237 xorcc %g7, %g4, %g5
6238 bne test_failed
6239 nop
6240
6241
6242 ! First check that the POR value is correct
6243 add %g2, 8, %g2
6244 ldx [%g2], %g4
6245 xorcc %g3, %g4, %g5
6246 bne test_failed
6247 nop
6248
6249 ! Next check that all the writable bits can be written
6250 stx %l2, [%g2] ! store inverted POR value
6251 ldx [%g2], %g4
6252 xorcc %g7, %g4, %g5
6253 bne test_failed
6254 nop
6255
6256
6257 ! First check that the POR value is correct
6258 add %g2, 8, %g2
6259 ldx [%g2], %g4
6260 xorcc %g3, %g4, %g5
6261 bne test_failed
6262 nop
6263
6264 ! Next check that all the writable bits can be written
6265 stx %l2, [%g2] ! store inverted POR value
6266 ldx [%g2], %g4
6267 xorcc %g7, %g4, %g5
6268 bne test_failed
6269 nop
6270
6271
6272 ! First check that the POR value is correct
6273 add %g2, 8, %g2
6274 ldx [%g2], %g4
6275 xorcc %g3, %g4, %g5
6276 bne test_failed
6277 nop
6278
6279 ! Next check that all the writable bits can be written
6280 stx %l2, [%g2] ! store inverted POR value
6281 ldx [%g2], %g4
6282 xorcc %g7, %g4, %g5
6283 bne test_failed
6284 nop
6285
6286
6287 ! First check that the POR value is correct
6288 add %g2, 8, %g2
6289 ldx [%g2], %g4
6290 xorcc %g3, %g4, %g5
6291 bne test_failed
6292 nop
6293
6294 ! Next check that all the writable bits can be written
6295 stx %l2, [%g2] ! store inverted POR value
6296 ldx [%g2], %g4
6297 xorcc %g7, %g4, %g5
6298 bne test_failed
6299 nop
6300
6301
6302 ! First check that the POR value is correct
6303 add %g2, 8, %g2
6304 ldx [%g2], %g4
6305 xorcc %g3, %g4, %g5
6306 bne test_failed
6307 nop
6308
6309 ! Next check that all the writable bits can be written
6310 stx %l2, [%g2] ! store inverted POR value
6311 ldx [%g2], %g4
6312 xorcc %g7, %g4, %g5
6313 bne test_failed
6314 nop
6315
6316
6317 ! First check that the POR value is correct
6318 add %g2, 8, %g2
6319 ldx [%g2], %g4
6320 xorcc %g3, %g4, %g5
6321 bne test_failed
6322 nop
6323
6324 ! Next check that all the writable bits can be written
6325 stx %l2, [%g2] ! store inverted POR value
6326 ldx [%g2], %g4
6327 xorcc %g7, %g4, %g5
6328 bne test_failed
6329 nop
6330
6331
6332 ! First check that the POR value is correct
6333 add %g2, 8, %g2
6334 ldx [%g2], %g4
6335 xorcc %g3, %g4, %g5
6336 bne test_failed
6337 nop
6338
6339 ! Next check that all the writable bits can be written
6340 stx %l2, [%g2] ! store inverted POR value
6341 ldx [%g2], %g4
6342 xorcc %g7, %g4, %g5
6343 bne test_failed
6344 nop
6345
6346
6347 ! First check that the POR value is correct
6348 add %g2, 8, %g2
6349 ldx [%g2], %g4
6350 xorcc %g3, %g4, %g5
6351 bne test_failed
6352 nop
6353
6354 ! Next check that all the writable bits can be written
6355 stx %l2, [%g2] ! store inverted POR value
6356 ldx [%g2], %g4
6357 xorcc %g7, %g4, %g5
6358 bne test_failed
6359 nop
6360
6361
6362 ! First check that the POR value is correct
6363 add %g2, 8, %g2
6364 ldx [%g2], %g4
6365 xorcc %g3, %g4, %g5
6366 bne test_failed
6367 nop
6368
6369 ! Next check that all the writable bits can be written
6370 stx %l2, [%g2] ! store inverted POR value
6371 ldx [%g2], %g4
6372 xorcc %g7, %g4, %g5
6373 bne test_failed
6374 nop
6375
6376
6377 ! First check that the POR value is correct
6378 add %g2, 8, %g2
6379 ldx [%g2], %g4
6380 xorcc %g3, %g4, %g5
6381 bne test_failed
6382 nop
6383
6384 ! Next check that all the writable bits can be written
6385 stx %l2, [%g2] ! store inverted POR value
6386 ldx [%g2], %g4
6387 xorcc %g7, %g4, %g5
6388 bne test_failed
6389 nop
6390
6391
6392 ! First check that the POR value is correct
6393 add %g2, 8, %g2
6394 ldx [%g2], %g4
6395 xorcc %g3, %g4, %g5
6396 bne test_failed
6397 nop
6398
6399 ! Next check that all the writable bits can be written
6400 stx %l2, [%g2] ! store inverted POR value
6401 ldx [%g2], %g4
6402 xorcc %g7, %g4, %g5
6403 bne test_failed
6404 nop
6405
6406
6407 ! First check that the POR value is correct
6408 add %g2, 8, %g2
6409 ldx [%g2], %g4
6410 xorcc %g3, %g4, %g5
6411 bne test_failed
6412 nop
6413
6414 ! Next check that all the writable bits can be written
6415 stx %l2, [%g2] ! store inverted POR value
6416 ldx [%g2], %g4
6417 xorcc %g7, %g4, %g5
6418 bne test_failed
6419 nop
6420
6421
6422 ! First check that the POR value is correct
6423 add %g2, 8, %g2
6424 ldx [%g2], %g4
6425 xorcc %g3, %g4, %g5
6426 bne test_failed
6427 nop
6428
6429 ! Next check that all the writable bits can be written
6430 stx %l2, [%g2] ! store inverted POR value
6431 ldx [%g2], %g4
6432 xorcc %g7, %g4, %g5
6433 bne test_failed
6434 nop
6435
6436
6437 ! First check that the POR value is correct
6438 add %g2, 8, %g2
6439 ldx [%g2], %g4
6440 xorcc %g3, %g4, %g5
6441 bne test_failed
6442 nop
6443
6444 ! Next check that all the writable bits can be written
6445 stx %l2, [%g2] ! store inverted POR value
6446 ldx [%g2], %g4
6447 xorcc %g7, %g4, %g5
6448 bne test_failed
6449 nop
6450
6451
6452 ! First check that the POR value is correct
6453 add %g2, 8, %g2
6454 ldx [%g2], %g4
6455 xorcc %g3, %g4, %g5
6456 bne test_failed
6457 nop
6458
6459 ! Next check that all the writable bits can be written
6460 stx %l2, [%g2] ! store inverted POR value
6461 ldx [%g2], %g4
6462 xorcc %g7, %g4, %g5
6463 bne test_failed
6464 nop
6465
6466
6467 ! First check that the POR value is correct
6468 add %g2, 8, %g2
6469 ldx [%g2], %g4
6470 xorcc %g3, %g4, %g5
6471 bne test_failed
6472 nop
6473
6474 ! Next check that all the writable bits can be written
6475 stx %l2, [%g2] ! store inverted POR value
6476 ldx [%g2], %g4
6477 xorcc %g7, %g4, %g5
6478 bne test_failed
6479 nop
6480
6481
6482 ! First check that the POR value is correct
6483 add %g2, 8, %g2
6484 ldx [%g2], %g4
6485 xorcc %g3, %g4, %g5
6486 bne test_failed
6487 nop
6488
6489 ! Next check that all the writable bits can be written
6490 stx %l2, [%g2] ! store inverted POR value
6491 ldx [%g2], %g4
6492 xorcc %g7, %g4, %g5
6493 bne test_failed
6494 nop
6495
6496
6497 ! First check that the POR value is correct
6498 add %g2, 8, %g2
6499 ldx [%g2], %g4
6500 xorcc %g3, %g4, %g5
6501 bne test_failed
6502 nop
6503
6504 ! Next check that all the writable bits can be written
6505 stx %l2, [%g2] ! store inverted POR value
6506 ldx [%g2], %g4
6507 xorcc %g7, %g4, %g5
6508 bne test_failed
6509 nop
6510
6511
6512 ! First check that the POR value is correct
6513 add %g2, 8, %g2
6514 ldx [%g2], %g4
6515 xorcc %g3, %g4, %g5
6516 bne test_failed
6517 nop
6518
6519 ! Next check that all the writable bits can be written
6520 stx %l2, [%g2] ! store inverted POR value
6521 ldx [%g2], %g4
6522 xorcc %g7, %g4, %g5
6523 bne test_failed
6524 nop
6525
6526
6527 ! First check that the POR value is correct
6528 add %g2, 8, %g2
6529 ldx [%g2], %g4
6530 xorcc %g3, %g4, %g5
6531 bne test_failed
6532 nop
6533
6534 ! Next check that all the writable bits can be written
6535 stx %l2, [%g2] ! store inverted POR value
6536 ldx [%g2], %g4
6537 xorcc %g7, %g4, %g5
6538 bne test_failed
6539 nop
6540
6541
6542 ! First check that the POR value is correct
6543 add %g2, 8, %g2
6544 ldx [%g2], %g4
6545 xorcc %g3, %g4, %g5
6546 bne test_failed
6547 nop
6548
6549 ! Next check that all the writable bits can be written
6550 stx %l2, [%g2] ! store inverted POR value
6551 ldx [%g2], %g4
6552 xorcc %g7, %g4, %g5
6553 bne test_failed
6554 nop
6555
6556
6557 ! First check that the POR value is correct
6558 add %g2, 8, %g2
6559 ldx [%g2], %g4
6560 xorcc %g3, %g4, %g5
6561 bne test_failed
6562 nop
6563
6564 ! Next check that all the writable bits can be written
6565 stx %l2, [%g2] ! store inverted POR value
6566 ldx [%g2], %g4
6567 xorcc %g7, %g4, %g5
6568 bne test_failed
6569 nop
6570
6571
6572 ! First check that the POR value is correct
6573 add %g2, 8, %g2
6574 ldx [%g2], %g4
6575 xorcc %g3, %g4, %g5
6576 bne test_failed
6577 nop
6578
6579 ! Next check that all the writable bits can be written
6580 stx %l2, [%g2] ! store inverted POR value
6581 ldx [%g2], %g4
6582 xorcc %g7, %g4, %g5
6583 bne test_failed
6584 nop
6585
6586
6587 ! First check that the POR value is correct
6588 add %g2, 8, %g2
6589 ldx [%g2], %g4
6590 xorcc %g3, %g4, %g5
6591 bne test_failed
6592 nop
6593
6594 ! Next check that all the writable bits can be written
6595 stx %l2, [%g2] ! store inverted POR value
6596 ldx [%g2], %g4
6597 xorcc %g7, %g4, %g5
6598 bne test_failed
6599 nop
6600
6601
6602 ! First check that the POR value is correct
6603 add %g2, 8, %g2
6604 ldx [%g2], %g4
6605 xorcc %g3, %g4, %g5
6606 bne test_failed
6607 nop
6608
6609 ! Next check that all the writable bits can be written
6610 stx %l2, [%g2] ! store inverted POR value
6611 ldx [%g2], %g4
6612 xorcc %g7, %g4, %g5
6613 bne test_failed
6614 nop
6615
6616
6617 ! First check that the POR value is correct
6618 add %g2, 8, %g2
6619 ldx [%g2], %g4
6620 xorcc %g3, %g4, %g5
6621 bne test_failed
6622 nop
6623
6624 ! Next check that all the writable bits can be written
6625 stx %l2, [%g2] ! store inverted POR value
6626 ldx [%g2], %g4
6627 xorcc %g7, %g4, %g5
6628 bne test_failed
6629 nop
6630
6631
6632 ! First check that the POR value is correct
6633 add %g2, 8, %g2
6634 ldx [%g2], %g4
6635 xorcc %g3, %g4, %g5
6636 bne test_failed
6637 nop
6638
6639 ! Next check that all the writable bits can be written
6640 stx %l2, [%g2] ! store inverted POR value
6641 ldx [%g2], %g4
6642 xorcc %g7, %g4, %g5
6643 bne test_failed
6644 nop
6645
6646
6647 ! First check that the POR value is correct
6648 add %g2, 8, %g2
6649 ldx [%g2], %g4
6650 xorcc %g3, %g4, %g5
6651 bne test_failed
6652 nop
6653
6654 ! Next check that all the writable bits can be written
6655 stx %l2, [%g2] ! store inverted POR value
6656 ldx [%g2], %g4
6657 xorcc %g7, %g4, %g5
6658 bne test_failed
6659 nop
6660
6661
6662 ! First check that the POR value is correct
6663 add %g2, 8, %g2
6664 ldx [%g2], %g4
6665 xorcc %g3, %g4, %g5
6666 bne test_failed
6667 nop
6668
6669 ! Next check that all the writable bits can be written
6670 stx %l2, [%g2] ! store inverted POR value
6671 ldx [%g2], %g4
6672 xorcc %g7, %g4, %g5
6673 bne test_failed
6674 nop
6675
6676
6677 ! First check that the POR value is correct
6678 add %g2, 8, %g2
6679 ldx [%g2], %g4
6680 xorcc %g3, %g4, %g5
6681 bne test_failed
6682 nop
6683
6684 ! Next check that all the writable bits can be written
6685 stx %l2, [%g2] ! store inverted POR value
6686 ldx [%g2], %g4
6687 xorcc %g7, %g4, %g5
6688 bne test_failed
6689 nop
6690
6691
6692 ! First check that the POR value is correct
6693 add %g2, 8, %g2
6694 ldx [%g2], %g4
6695 xorcc %g3, %g4, %g5
6696 bne test_failed
6697 nop
6698
6699 ! Next check that all the writable bits can be written
6700 stx %l2, [%g2] ! store inverted POR value
6701 ldx [%g2], %g4
6702 xorcc %g7, %g4, %g5
6703 bne test_failed
6704 nop
6705
6706
6707 ! First check that the POR value is correct
6708 add %g2, 8, %g2
6709 ldx [%g2], %g4
6710 xorcc %g3, %g4, %g5
6711 bne test_failed
6712 nop
6713
6714 ! Next check that all the writable bits can be written
6715 stx %l2, [%g2] ! store inverted POR value
6716 ldx [%g2], %g4
6717 xorcc %g7, %g4, %g5
6718 bne test_failed
6719 nop
6720
6721
6722 ! First check that the POR value is correct
6723 add %g2, 8, %g2
6724 ldx [%g2], %g4
6725 xorcc %g3, %g4, %g5
6726 bne test_failed
6727 nop
6728
6729 ! Next check that all the writable bits can be written
6730 stx %l2, [%g2] ! store inverted POR value
6731 ldx [%g2], %g4
6732 xorcc %g7, %g4, %g5
6733 bne test_failed
6734 nop
6735
6736
6737 ! First check that the POR value is correct
6738 add %g2, 8, %g2
6739 ldx [%g2], %g4
6740 xorcc %g3, %g4, %g5
6741 bne test_failed
6742 nop
6743
6744 ! Next check that all the writable bits can be written
6745 stx %l2, [%g2] ! store inverted POR value
6746 ldx [%g2], %g4
6747 xorcc %g7, %g4, %g5
6748 bne test_failed
6749 nop
6750
6751
6752 ! First check that the POR value is correct
6753 add %g2, 8, %g2
6754 ldx [%g2], %g4
6755 xorcc %g3, %g4, %g5
6756 bne test_failed
6757 nop
6758
6759 ! Next check that all the writable bits can be written
6760 stx %l2, [%g2] ! store inverted POR value
6761 ldx [%g2], %g4
6762 xorcc %g7, %g4, %g5
6763 bne test_failed
6764 nop
6765
6766
6767 ! First check that the POR value is correct
6768 add %g2, 8, %g2
6769 ldx [%g2], %g4
6770 xorcc %g3, %g4, %g5
6771 bne test_failed
6772 nop
6773
6774 ! Next check that all the writable bits can be written
6775 stx %l2, [%g2] ! store inverted POR value
6776 ldx [%g2], %g4
6777 xorcc %g7, %g4, %g5
6778 bne test_failed
6779 nop
6780
6781
6782 ! First check that the POR value is correct
6783 add %g2, 8, %g2
6784 ldx [%g2], %g4
6785 xorcc %g3, %g4, %g5
6786 bne test_failed
6787 nop
6788
6789 ! Next check that all the writable bits can be written
6790 stx %l2, [%g2] ! store inverted POR value
6791 ldx [%g2], %g4
6792 xorcc %g7, %g4, %g5
6793 bne test_failed
6794 nop
6795
6796
6797 ! First check that the POR value is correct
6798 add %g2, 8, %g2
6799 ldx [%g2], %g4
6800 xorcc %g3, %g4, %g5
6801 bne test_failed
6802 nop
6803
6804 ! Next check that all the writable bits can be written
6805 stx %l2, [%g2] ! store inverted POR value
6806 ldx [%g2], %g4
6807 xorcc %g7, %g4, %g5
6808 bne test_failed
6809 nop
6810
6811
6812 ! First check that the POR value is correct
6813 add %g2, 8, %g2
6814 ldx [%g2], %g4
6815 xorcc %g3, %g4, %g5
6816 bne test_failed
6817 nop
6818
6819 ! Next check that all the writable bits can be written
6820 stx %l2, [%g2] ! store inverted POR value
6821 ldx [%g2], %g4
6822 xorcc %g7, %g4, %g5
6823 bne test_failed
6824 nop
6825
6826
6827 ! First check that the POR value is correct
6828 add %g2, 8, %g2
6829 ldx [%g2], %g4
6830 xorcc %g3, %g4, %g5
6831 bne test_failed
6832 nop
6833
6834 ! Next check that all the writable bits can be written
6835 stx %l2, [%g2] ! store inverted POR value
6836 ldx [%g2], %g4
6837 xorcc %g7, %g4, %g5
6838 bne test_failed
6839 nop
6840
6841
6842 ! First check that the POR value is correct
6843 add %g2, 8, %g2
6844 ldx [%g2], %g4
6845 xorcc %g3, %g4, %g5
6846 bne test_failed
6847 nop
6848
6849 ! Next check that all the writable bits can be written
6850 stx %l2, [%g2] ! store inverted POR value
6851 ldx [%g2], %g4
6852 xorcc %g7, %g4, %g5
6853 bne test_failed
6854 nop
6855
6856
6857 ! First check that the POR value is correct
6858 add %g2, 8, %g2
6859 ldx [%g2], %g4
6860 xorcc %g3, %g4, %g5
6861 bne test_failed
6862 nop
6863
6864 ! Next check that all the writable bits can be written
6865 stx %l2, [%g2] ! store inverted POR value
6866 ldx [%g2], %g4
6867 xorcc %g7, %g4, %g5
6868 bne test_failed
6869 nop
6870
6871
6872 ! First check that the POR value is correct
6873 add %g2, 8, %g2
6874 ldx [%g2], %g4
6875 xorcc %g3, %g4, %g5
6876 bne test_failed
6877 nop
6878
6879 ! Next check that all the writable bits can be written
6880 stx %l2, [%g2] ! store inverted POR value
6881 ldx [%g2], %g4
6882 xorcc %g7, %g4, %g5
6883 bne test_failed
6884 nop
6885
6886
6887 ! First check that the POR value is correct
6888 add %g2, 8, %g2
6889 ldx [%g2], %g4
6890 xorcc %g3, %g4, %g5
6891 bne test_failed
6892 nop
6893
6894 ! Next check that all the writable bits can be written
6895 stx %l2, [%g2] ! store inverted POR value
6896 ldx [%g2], %g4
6897 xorcc %g7, %g4, %g5
6898 bne test_failed
6899 nop
6900
6901
6902 ! First check that the POR value is correct
6903 add %g2, 8, %g2
6904 ldx [%g2], %g4
6905 xorcc %g3, %g4, %g5
6906 bne test_failed
6907 nop
6908
6909 ! Next check that all the writable bits can be written
6910 stx %l2, [%g2] ! store inverted POR value
6911 ldx [%g2], %g4
6912 xorcc %g7, %g4, %g5
6913 bne test_failed
6914 nop
6915
6916
6917 ! First check that the POR value is correct
6918 add %g2, 8, %g2
6919 ldx [%g2], %g4
6920 xorcc %g3, %g4, %g5
6921 bne test_failed
6922 nop
6923
6924 ! Next check that all the writable bits can be written
6925 stx %l2, [%g2] ! store inverted POR value
6926 ldx [%g2], %g4
6927 xorcc %g7, %g4, %g5
6928 bne test_failed
6929 nop
6930
6931
6932 ! First check that the POR value is correct
6933 add %g2, 8, %g2
6934 ldx [%g2], %g4
6935 xorcc %g3, %g4, %g5
6936 bne test_failed
6937 nop
6938
6939 ! Next check that all the writable bits can be written
6940 stx %l2, [%g2] ! store inverted POR value
6941 ldx [%g2], %g4
6942 xorcc %g7, %g4, %g5
6943 bne test_failed
6944 nop
6945
6946
6947 ! First check that the POR value is correct
6948 add %g2, 8, %g2
6949 ldx [%g2], %g4
6950 xorcc %g3, %g4, %g5
6951 bne test_failed
6952 nop
6953
6954 ! Next check that all the writable bits can be written
6955 stx %l2, [%g2] ! store inverted POR value
6956 ldx [%g2], %g4
6957 xorcc %g7, %g4, %g5
6958 bne test_failed
6959 nop
6960
6961
6962 ! First check that the POR value is correct
6963 add %g2, 8, %g2
6964 ldx [%g2], %g4
6965 xorcc %g3, %g4, %g5
6966 bne test_failed
6967 nop
6968
6969 ! Next check that all the writable bits can be written
6970 stx %l2, [%g2] ! store inverted POR value
6971 ldx [%g2], %g4
6972 xorcc %g7, %g4, %g5
6973 bne test_failed
6974 nop
6975
6976
6977 ! First check that the POR value is correct
6978 add %g2, 8, %g2
6979 ldx [%g2], %g4
6980 xorcc %g3, %g4, %g5
6981 bne test_failed
6982 nop
6983
6984 ! Next check that all the writable bits can be written
6985 stx %l2, [%g2] ! store inverted POR value
6986 ldx [%g2], %g4
6987 xorcc %g7, %g4, %g5
6988 bne test_failed
6989 nop
6990
6991
6992 ! First check that the POR value is correct
6993 add %g2, 8, %g2
6994 ldx [%g2], %g4
6995 xorcc %g3, %g4, %g5
6996 bne test_failed
6997 nop
6998
6999 ! Next check that all the writable bits can be written
7000 stx %l2, [%g2] ! store inverted POR value
7001 ldx [%g2], %g4
7002 xorcc %g7, %g4, %g5
7003 bne test_failed
7004 nop
7005
7006
7007 ! First check that the POR value is correct
7008 add %g2, 8, %g2
7009 ldx [%g2], %g4
7010 xorcc %g3, %g4, %g5
7011 bne test_failed
7012 nop
7013
7014 ! Next check that all the writable bits can be written
7015 stx %l2, [%g2] ! store inverted POR value
7016 ldx [%g2], %g4
7017 xorcc %g7, %g4, %g5
7018 bne test_failed
7019 nop
7020
7021
7022 ! First check that the POR value is correct
7023 add %g2, 8, %g2
7024 ldx [%g2], %g4
7025 xorcc %g3, %g4, %g5
7026 bne test_failed
7027 nop
7028
7029 ! Next check that all the writable bits can be written
7030 stx %l2, [%g2] ! store inverted POR value
7031 ldx [%g2], %g4
7032 xorcc %g7, %g4, %g5
7033 bne test_failed
7034 nop
7035
7036
7037 ! First check that the POR value is correct
7038 add %g2, 8, %g2
7039 ldx [%g2], %g4
7040 xorcc %g3, %g4, %g5
7041 bne test_failed
7042 nop
7043
7044 ! Next check that all the writable bits can be written
7045 stx %l2, [%g2] ! store inverted POR value
7046 ldx [%g2], %g4
7047 xorcc %g7, %g4, %g5
7048 bne test_failed
7049 nop
7050
7051
7052 ! First check that the POR value is correct
7053 add %g2, 8, %g2
7054 ldx [%g2], %g4
7055 xorcc %g3, %g4, %g5
7056 bne test_failed
7057 nop
7058
7059 ! Next check that all the writable bits can be written
7060 stx %l2, [%g2] ! store inverted POR value
7061 ldx [%g2], %g4
7062 xorcc %g7, %g4, %g5
7063 bne test_failed
7064 nop
7065
7066
7067 ! First check that the POR value is correct
7068 add %g2, 8, %g2
7069 ldx [%g2], %g4
7070 xorcc %g3, %g4, %g5
7071 bne test_failed
7072 nop
7073
7074 ! Next check that all the writable bits can be written
7075 stx %l2, [%g2] ! store inverted POR value
7076 ldx [%g2], %g4
7077 xorcc %g7, %g4, %g5
7078 bne test_failed
7079 nop
7080
7081
7082 ! First check that the POR value is correct
7083 add %g2, 8, %g2
7084 ldx [%g2], %g4
7085 xorcc %g3, %g4, %g5
7086 bne test_failed
7087 nop
7088
7089 ! Next check that all the writable bits can be written
7090 stx %l2, [%g2] ! store inverted POR value
7091 ldx [%g2], %g4
7092 xorcc %g7, %g4, %g5
7093 bne test_failed
7094 nop
7095
7096
7097 ! First check that the POR value is correct
7098 add %g2, 8, %g2
7099 ldx [%g2], %g4
7100 xorcc %g3, %g4, %g5
7101 bne test_failed
7102 nop
7103
7104 ! Next check that all the writable bits can be written
7105 stx %l2, [%g2] ! store inverted POR value
7106 ldx [%g2], %g4
7107 xorcc %g7, %g4, %g5
7108 bne test_failed
7109 nop
7110
7111
7112 ! First check that the POR value is correct
7113 add %g2, 8, %g2
7114 ldx [%g2], %g4
7115 xorcc %g3, %g4, %g5
7116 bne test_failed
7117 nop
7118
7119 ! Next check that all the writable bits can be written
7120 stx %l2, [%g2] ! store inverted POR value
7121 ldx [%g2], %g4
7122 xorcc %g7, %g4, %g5
7123 bne test_failed
7124 nop
7125
7126
7127 ! First check that the POR value is correct
7128 add %g2, 8, %g2
7129 ldx [%g2], %g4
7130 xorcc %g3, %g4, %g5
7131 bne test_failed
7132 nop
7133
7134 ! Next check that all the writable bits can be written
7135 stx %l2, [%g2] ! store inverted POR value
7136 ldx [%g2], %g4
7137 xorcc %g7, %g4, %g5
7138 bne test_failed
7139 nop
7140
7141
7142 ! First check that the POR value is correct
7143 add %g2, 8, %g2
7144 ldx [%g2], %g4
7145 xorcc %g3, %g4, %g5
7146 bne test_failed
7147 nop
7148
7149 ! Next check that all the writable bits can be written
7150 stx %l2, [%g2] ! store inverted POR value
7151 ldx [%g2], %g4
7152 xorcc %g7, %g4, %g5
7153 bne test_failed
7154 nop
7155
7156
7157 ! First check that the POR value is correct
7158 add %g2, 8, %g2
7159 ldx [%g2], %g4
7160 xorcc %g3, %g4, %g5
7161 bne test_failed
7162 nop
7163
7164 ! Next check that all the writable bits can be written
7165 stx %l2, [%g2] ! store inverted POR value
7166 ldx [%g2], %g4
7167 xorcc %g7, %g4, %g5
7168 bne test_failed
7169 nop
7170
7171
7172 ! First check that the POR value is correct
7173 add %g2, 8, %g2
7174 ldx [%g2], %g4
7175 xorcc %g3, %g4, %g5
7176 bne test_failed
7177 nop
7178
7179 ! Next check that all the writable bits can be written
7180 stx %l2, [%g2] ! store inverted POR value
7181 ldx [%g2], %g4
7182 xorcc %g7, %g4, %g5
7183 bne test_failed
7184 nop
7185
7186
7187 ! First check that the POR value is correct
7188 add %g2, 8, %g2
7189 ldx [%g2], %g4
7190 xorcc %g3, %g4, %g5
7191 bne test_failed
7192 nop
7193
7194 ! Next check that all the writable bits can be written
7195 stx %l2, [%g2] ! store inverted POR value
7196 ldx [%g2], %g4
7197 xorcc %g7, %g4, %g5
7198 bne test_failed
7199 nop
7200
7201
7202 ! First check that the POR value is correct
7203 add %g2, 8, %g2
7204 ldx [%g2], %g4
7205 xorcc %g3, %g4, %g5
7206 bne test_failed
7207 nop
7208
7209 ! Next check that all the writable bits can be written
7210 stx %l2, [%g2] ! store inverted POR value
7211 ldx [%g2], %g4
7212 xorcc %g7, %g4, %g5
7213 bne test_failed
7214 nop
7215
7216
7217 ! First check that the POR value is correct
7218 add %g2, 8, %g2
7219 ldx [%g2], %g4
7220 xorcc %g3, %g4, %g5
7221 bne test_failed
7222 nop
7223
7224 ! Next check that all the writable bits can be written
7225 stx %l2, [%g2] ! store inverted POR value
7226 ldx [%g2], %g4
7227 xorcc %g7, %g4, %g5
7228 bne test_failed
7229 nop
7230
7231
7232 ! First check that the POR value is correct
7233 add %g2, 8, %g2
7234 ldx [%g2], %g4
7235 xorcc %g3, %g4, %g5
7236 bne test_failed
7237 nop
7238
7239 ! Next check that all the writable bits can be written
7240 stx %l2, [%g2] ! store inverted POR value
7241 ldx [%g2], %g4
7242 xorcc %g7, %g4, %g5
7243 bne test_failed
7244 nop
7245
7246
7247 ! First check that the POR value is correct
7248 add %g2, 8, %g2
7249 ldx [%g2], %g4
7250 xorcc %g3, %g4, %g5
7251 bne test_failed
7252 nop
7253
7254 ! Next check that all the writable bits can be written
7255 stx %l2, [%g2] ! store inverted POR value
7256 ldx [%g2], %g4
7257 xorcc %g7, %g4, %g5
7258 bne test_failed
7259 nop
7260
7261
7262 ! First check that the POR value is correct
7263 add %g2, 8, %g2
7264 ldx [%g2], %g4
7265 xorcc %g3, %g4, %g5
7266 bne test_failed
7267 nop
7268
7269 ! Next check that all the writable bits can be written
7270 stx %l2, [%g2] ! store inverted POR value
7271 ldx [%g2], %g4
7272 xorcc %g7, %g4, %g5
7273 bne test_failed
7274 nop
7275
7276
7277 ! First check that the POR value is correct
7278 add %g2, 8, %g2
7279 ldx [%g2], %g4
7280 xorcc %g3, %g4, %g5
7281 bne test_failed
7282 nop
7283
7284 ! Next check that all the writable bits can be written
7285 stx %l2, [%g2] ! store inverted POR value
7286 ldx [%g2], %g4
7287 xorcc %g7, %g4, %g5
7288 bne test_failed
7289 nop
7290
7291
7292 ! First check that the POR value is correct
7293 add %g2, 8, %g2
7294 ldx [%g2], %g4
7295 xorcc %g3, %g4, %g5
7296 bne test_failed
7297 nop
7298
7299 ! Next check that all the writable bits can be written
7300 stx %l2, [%g2] ! store inverted POR value
7301 ldx [%g2], %g4
7302 xorcc %g7, %g4, %g5
7303 bne test_failed
7304 nop
7305
7306
7307 ! First check that the POR value is correct
7308 add %g2, 8, %g2
7309 ldx [%g2], %g4
7310 xorcc %g3, %g4, %g5
7311 bne test_failed
7312 nop
7313
7314 ! Next check that all the writable bits can be written
7315 stx %l2, [%g2] ! store inverted POR value
7316 ldx [%g2], %g4
7317 xorcc %g7, %g4, %g5
7318 bne test_failed
7319 nop
7320
7321
7322 ! First check that the POR value is correct
7323 add %g2, 8, %g2
7324 ldx [%g2], %g4
7325 xorcc %g3, %g4, %g5
7326 bne test_failed
7327 nop
7328
7329 ! Next check that all the writable bits can be written
7330 stx %l2, [%g2] ! store inverted POR value
7331 ldx [%g2], %g4
7332 xorcc %g7, %g4, %g5
7333 bne test_failed
7334 nop
7335
7336
7337 ! First check that the POR value is correct
7338 add %g2, 8, %g2
7339 ldx [%g2], %g4
7340 xorcc %g3, %g4, %g5
7341 bne test_failed
7342 nop
7343
7344 ! Next check that all the writable bits can be written
7345 stx %l2, [%g2] ! store inverted POR value
7346 ldx [%g2], %g4
7347 xorcc %g7, %g4, %g5
7348 bne test_failed
7349 nop
7350
7351
7352 ! First check that the POR value is correct
7353 add %g2, 8, %g2
7354 ldx [%g2], %g4
7355 xorcc %g3, %g4, %g5
7356 bne test_failed
7357 nop
7358
7359 ! Next check that all the writable bits can be written
7360 stx %l2, [%g2] ! store inverted POR value
7361 ldx [%g2], %g4
7362 xorcc %g7, %g4, %g5
7363 bne test_failed
7364 nop
7365
7366
7367 ! First check that the POR value is correct
7368 add %g2, 8, %g2
7369 ldx [%g2], %g4
7370 xorcc %g3, %g4, %g5
7371 bne test_failed
7372 nop
7373
7374 ! Next check that all the writable bits can be written
7375 stx %l2, [%g2] ! store inverted POR value
7376 ldx [%g2], %g4
7377 xorcc %g7, %g4, %g5
7378 bne test_failed
7379 nop
7380
7381
7382 ! First check that the POR value is correct
7383 add %g2, 8, %g2
7384 ldx [%g2], %g4
7385 xorcc %g3, %g4, %g5
7386 bne test_failed
7387 nop
7388
7389 ! Next check that all the writable bits can be written
7390 stx %l2, [%g2] ! store inverted POR value
7391 ldx [%g2], %g4
7392 xorcc %g7, %g4, %g5
7393 bne test_failed
7394 nop
7395
7396
7397 ! First check that the POR value is correct
7398 add %g2, 8, %g2
7399 ldx [%g2], %g4
7400 xorcc %g3, %g4, %g5
7401 bne test_failed
7402 nop
7403
7404 ! Next check that all the writable bits can be written
7405 stx %l2, [%g2] ! store inverted POR value
7406 ldx [%g2], %g4
7407 xorcc %g7, %g4, %g5
7408 bne test_failed
7409 nop
7410
7411
7412 ! First check that the POR value is correct
7413 add %g2, 8, %g2
7414 ldx [%g2], %g4
7415 xorcc %g3, %g4, %g5
7416 bne test_failed
7417 nop
7418
7419 ! Next check that all the writable bits can be written
7420 stx %l2, [%g2] ! store inverted POR value
7421 ldx [%g2], %g4
7422 xorcc %g7, %g4, %g5
7423 bne test_failed
7424 nop
7425
7426
7427 ! First check that the POR value is correct
7428 add %g2, 8, %g2
7429 ldx [%g2], %g4
7430 xorcc %g3, %g4, %g5
7431 bne test_failed
7432 nop
7433
7434 ! Next check that all the writable bits can be written
7435 stx %l2, [%g2] ! store inverted POR value
7436 ldx [%g2], %g4
7437 xorcc %g7, %g4, %g5
7438 bne test_failed
7439 nop
7440
7441
7442 ! First check that the POR value is correct
7443 add %g2, 8, %g2
7444 ldx [%g2], %g4
7445 xorcc %g3, %g4, %g5
7446 bne test_failed
7447 nop
7448
7449 ! Next check that all the writable bits can be written
7450 stx %l2, [%g2] ! store inverted POR value
7451 ldx [%g2], %g4
7452 xorcc %g7, %g4, %g5
7453 bne test_failed
7454 nop
7455
7456
7457 ! First check that the POR value is correct
7458 add %g2, 8, %g2
7459 ldx [%g2], %g4
7460 xorcc %g3, %g4, %g5
7461 bne test_failed
7462 nop
7463
7464 ! Next check that all the writable bits can be written
7465 stx %l2, [%g2] ! store inverted POR value
7466 ldx [%g2], %g4
7467 xorcc %g7, %g4, %g5
7468 bne test_failed
7469 nop
7470
7471
7472 ! First check that the POR value is correct
7473 add %g2, 8, %g2
7474 ldx [%g2], %g4
7475 xorcc %g3, %g4, %g5
7476 bne test_failed
7477 nop
7478
7479 ! Next check that all the writable bits can be written
7480 stx %l2, [%g2] ! store inverted POR value
7481 ldx [%g2], %g4
7482 xorcc %g7, %g4, %g5
7483 bne test_failed
7484 nop
7485
7486
7487 ! First check that the POR value is correct
7488 add %g2, 8, %g2
7489 ldx [%g2], %g4
7490 xorcc %g3, %g4, %g5
7491 bne test_failed
7492 nop
7493
7494 ! Next check that all the writable bits can be written
7495 stx %l2, [%g2] ! store inverted POR value
7496 ldx [%g2], %g4
7497 xorcc %g7, %g4, %g5
7498 bne test_failed
7499 nop
7500
7501
7502 ! First check that the POR value is correct
7503 add %g2, 8, %g2
7504 ldx [%g2], %g4
7505 xorcc %g3, %g4, %g5
7506 bne test_failed
7507 nop
7508
7509 ! Next check that all the writable bits can be written
7510 stx %l2, [%g2] ! store inverted POR value
7511 ldx [%g2], %g4
7512 xorcc %g7, %g4, %g5
7513 bne test_failed
7514 nop
7515
7516
7517 ! First check that the POR value is correct
7518 add %g2, 8, %g2
7519 ldx [%g2], %g4
7520 xorcc %g3, %g4, %g5
7521 bne test_failed
7522 nop
7523
7524 ! Next check that all the writable bits can be written
7525 stx %l2, [%g2] ! store inverted POR value
7526 ldx [%g2], %g4
7527 xorcc %g7, %g4, %g5
7528 bne test_failed
7529 nop
7530
7531
7532 ! First check that the POR value is correct
7533 add %g2, 8, %g2
7534 ldx [%g2], %g4
7535 xorcc %g3, %g4, %g5
7536 bne test_failed
7537 nop
7538
7539 ! Next check that all the writable bits can be written
7540 stx %l2, [%g2] ! store inverted POR value
7541 ldx [%g2], %g4
7542 xorcc %g7, %g4, %g5
7543 bne test_failed
7544 nop
7545
7546
7547 ! First check that the POR value is correct
7548 add %g2, 8, %g2
7549 ldx [%g2], %g4
7550 xorcc %g3, %g4, %g5
7551 bne test_failed
7552 nop
7553
7554 ! Next check that all the writable bits can be written
7555 stx %l2, [%g2] ! store inverted POR value
7556 ldx [%g2], %g4
7557 xorcc %g7, %g4, %g5
7558 bne test_failed
7559 nop
7560
7561
7562 ! First check that the POR value is correct
7563 add %g2, 8, %g2
7564 ldx [%g2], %g4
7565 xorcc %g3, %g4, %g5
7566 bne test_failed
7567 nop
7568
7569 ! Next check that all the writable bits can be written
7570 stx %l2, [%g2] ! store inverted POR value
7571 ldx [%g2], %g4
7572 xorcc %g7, %g4, %g5
7573 bne test_failed
7574 nop
7575
7576
7577 ! First check that the POR value is correct
7578 add %g2, 8, %g2
7579 ldx [%g2], %g4
7580 xorcc %g3, %g4, %g5
7581 bne test_failed
7582 nop
7583
7584 ! Next check that all the writable bits can be written
7585 stx %l2, [%g2] ! store inverted POR value
7586 ldx [%g2], %g4
7587 xorcc %g7, %g4, %g5
7588 bne test_failed
7589 nop
7590
7591
7592 ! First check that the POR value is correct
7593 add %g2, 8, %g2
7594 ldx [%g2], %g4
7595 xorcc %g3, %g4, %g5
7596 bne test_failed
7597 nop
7598
7599 ! Next check that all the writable bits can be written
7600 stx %l2, [%g2] ! store inverted POR value
7601 ldx [%g2], %g4
7602 xorcc %g7, %g4, %g5
7603 bne test_failed
7604 nop
7605
7606
7607 ! First check that the POR value is correct
7608 add %g2, 8, %g2
7609 ldx [%g2], %g4
7610 xorcc %g3, %g4, %g5
7611 bne test_failed
7612 nop
7613
7614 ! Next check that all the writable bits can be written
7615 stx %l2, [%g2] ! store inverted POR value
7616 ldx [%g2], %g4
7617 xorcc %g7, %g4, %g5
7618 bne test_failed
7619 nop
7620
7621
7622 ! First check that the POR value is correct
7623 add %g2, 8, %g2
7624 ldx [%g2], %g4
7625 xorcc %g3, %g4, %g5
7626 bne test_failed
7627 nop
7628
7629 ! Next check that all the writable bits can be written
7630 stx %l2, [%g2] ! store inverted POR value
7631 ldx [%g2], %g4
7632 xorcc %g7, %g4, %g5
7633 bne test_failed
7634 nop
7635
7636
7637 ! First check that the POR value is correct
7638 add %g2, 8, %g2
7639 ldx [%g2], %g4
7640 xorcc %g3, %g4, %g5
7641 bne test_failed
7642 nop
7643
7644 ! Next check that all the writable bits can be written
7645 stx %l2, [%g2] ! store inverted POR value
7646 ldx [%g2], %g4
7647 xorcc %g7, %g4, %g5
7648 bne test_failed
7649 nop
7650
7651
7652 ! First check that the POR value is correct
7653 add %g2, 8, %g2
7654 ldx [%g2], %g4
7655 xorcc %g3, %g4, %g5
7656 bne test_failed
7657 nop
7658
7659 ! Next check that all the writable bits can be written
7660 stx %l2, [%g2] ! store inverted POR value
7661 ldx [%g2], %g4
7662 xorcc %g7, %g4, %g5
7663 bne test_failed
7664 nop
7665
7666
7667 ! First check that the POR value is correct
7668 add %g2, 8, %g2
7669 ldx [%g2], %g4
7670 xorcc %g3, %g4, %g5
7671 bne test_failed
7672 nop
7673
7674 ! Next check that all the writable bits can be written
7675 stx %l2, [%g2] ! store inverted POR value
7676 ldx [%g2], %g4
7677 xorcc %g7, %g4, %g5
7678 bne test_failed
7679 nop
7680
7681
7682 ! First check that the POR value is correct
7683 add %g2, 8, %g2
7684 ldx [%g2], %g4
7685 xorcc %g3, %g4, %g5
7686 bne test_failed
7687 nop
7688
7689 ! Next check that all the writable bits can be written
7690 stx %l2, [%g2] ! store inverted POR value
7691 ldx [%g2], %g4
7692 xorcc %g7, %g4, %g5
7693 bne test_failed
7694 nop
7695
7696
7697 ! First check that the POR value is correct
7698 add %g2, 8, %g2
7699 ldx [%g2], %g4
7700 xorcc %g3, %g4, %g5
7701 bne test_failed
7702 nop
7703
7704 ! Next check that all the writable bits can be written
7705 stx %l2, [%g2] ! store inverted POR value
7706 ldx [%g2], %g4
7707 xorcc %g7, %g4, %g5
7708 bne test_failed
7709 nop
7710
7711
7712 ! First check that the POR value is correct
7713 add %g2, 8, %g2
7714 ldx [%g2], %g4
7715 xorcc %g3, %g4, %g5
7716 bne test_failed
7717 nop
7718
7719 ! Next check that all the writable bits can be written
7720 stx %l2, [%g2] ! store inverted POR value
7721 ldx [%g2], %g4
7722 xorcc %g7, %g4, %g5
7723 bne test_failed
7724 nop
7725
7726
7727 ! First check that the POR value is correct
7728 add %g2, 8, %g2
7729 ldx [%g2], %g4
7730 xorcc %g3, %g4, %g5
7731 bne test_failed
7732 nop
7733
7734 ! Next check that all the writable bits can be written
7735 stx %l2, [%g2] ! store inverted POR value
7736 ldx [%g2], %g4
7737 xorcc %g7, %g4, %g5
7738 bne test_failed
7739 nop
7740
7741
7742 ! First check that the POR value is correct
7743 add %g2, 8, %g2
7744 ldx [%g2], %g4
7745 xorcc %g3, %g4, %g5
7746 bne test_failed
7747 nop
7748
7749 ! Next check that all the writable bits can be written
7750 stx %l2, [%g2] ! store inverted POR value
7751 ldx [%g2], %g4
7752 xorcc %g7, %g4, %g5
7753 bne test_failed
7754 nop
7755
7756
7757 ! First check that the POR value is correct
7758 add %g2, 8, %g2
7759 ldx [%g2], %g4
7760 xorcc %g3, %g4, %g5
7761 bne test_failed
7762 nop
7763
7764 ! Next check that all the writable bits can be written
7765 stx %l2, [%g2] ! store inverted POR value
7766 ldx [%g2], %g4
7767 xorcc %g7, %g4, %g5
7768 bne test_failed
7769 nop
7770
7771
7772 ! First check that the POR value is correct
7773 add %g2, 8, %g2
7774 ldx [%g2], %g4
7775 xorcc %g3, %g4, %g5
7776 bne test_failed
7777 nop
7778
7779 ! Next check that all the writable bits can be written
7780 stx %l2, [%g2] ! store inverted POR value
7781 ldx [%g2], %g4
7782 xorcc %g7, %g4, %g5
7783 bne test_failed
7784 nop
7785
7786
7787 ! First check that the POR value is correct
7788 add %g2, 8, %g2
7789 ldx [%g2], %g4
7790 xorcc %g3, %g4, %g5
7791 bne test_failed
7792 nop
7793
7794 ! Next check that all the writable bits can be written
7795 stx %l2, [%g2] ! store inverted POR value
7796 ldx [%g2], %g4
7797 xorcc %g7, %g4, %g5
7798 bne test_failed
7799 nop
7800
7801
7802 ! First check that the POR value is correct
7803 add %g2, 8, %g2
7804 ldx [%g2], %g4
7805 xorcc %g3, %g4, %g5
7806 bne test_failed
7807 nop
7808
7809 ! Next check that all the writable bits can be written
7810 stx %l2, [%g2] ! store inverted POR value
7811 ldx [%g2], %g4
7812 xorcc %g7, %g4, %g5
7813 bne test_failed
7814 nop
7815
7816
7817 ! First check that the POR value is correct
7818 add %g2, 8, %g2
7819 ldx [%g2], %g4
7820 xorcc %g3, %g4, %g5
7821 bne test_failed
7822 nop
7823
7824 ! Next check that all the writable bits can be written
7825 stx %l2, [%g2] ! store inverted POR value
7826 ldx [%g2], %g4
7827 xorcc %g7, %g4, %g5
7828 bne test_failed
7829 nop
7830
7831
7832 ! First check that the POR value is correct
7833 add %g2, 8, %g2
7834 ldx [%g2], %g4
7835 xorcc %g3, %g4, %g5
7836 bne test_failed
7837 nop
7838
7839 ! Next check that all the writable bits can be written
7840 stx %l2, [%g2] ! store inverted POR value
7841 ldx [%g2], %g4
7842 xorcc %g7, %g4, %g5
7843 bne test_failed
7844 nop
7845
7846
7847 ! First check that the POR value is correct
7848 add %g2, 8, %g2
7849 ldx [%g2], %g4
7850 xorcc %g3, %g4, %g5
7851 bne test_failed
7852 nop
7853
7854 ! Next check that all the writable bits can be written
7855 stx %l2, [%g2] ! store inverted POR value
7856 ldx [%g2], %g4
7857 xorcc %g7, %g4, %g5
7858 bne test_failed
7859 nop
7860
7861
7862 ! First check that the POR value is correct
7863 add %g2, 8, %g2
7864 ldx [%g2], %g4
7865 xorcc %g3, %g4, %g5
7866 bne test_failed
7867 nop
7868
7869 ! Next check that all the writable bits can be written
7870 stx %l2, [%g2] ! store inverted POR value
7871 ldx [%g2], %g4
7872 xorcc %g7, %g4, %g5
7873 bne test_failed
7874 nop
7875
7876
7877 ! First check that the POR value is correct
7878 add %g2, 8, %g2
7879 ldx [%g2], %g4
7880 xorcc %g3, %g4, %g5
7881 bne test_failed
7882 nop
7883
7884 ! Next check that all the writable bits can be written
7885 stx %l2, [%g2] ! store inverted POR value
7886 ldx [%g2], %g4
7887 xorcc %g7, %g4, %g5
7888 bne test_failed
7889 nop
7890
7891
7892 ! First check that the POR value is correct
7893 add %g2, 8, %g2
7894 ldx [%g2], %g4
7895 xorcc %g3, %g4, %g5
7896 bne test_failed
7897 nop
7898
7899 ! Next check that all the writable bits can be written
7900 stx %l2, [%g2] ! store inverted POR value
7901 ldx [%g2], %g4
7902 xorcc %g7, %g4, %g5
7903 bne test_failed
7904 nop
7905
7906
7907 ! First check that the POR value is correct
7908 add %g2, 8, %g2
7909 ldx [%g2], %g4
7910 xorcc %g3, %g4, %g5
7911 bne test_failed
7912 nop
7913
7914 ! Next check that all the writable bits can be written
7915 stx %l2, [%g2] ! store inverted POR value
7916 ldx [%g2], %g4
7917 xorcc %g7, %g4, %g5
7918 bne test_failed
7919 nop
7920
7921
7922 ! First check that the POR value is correct
7923 add %g2, 8, %g2
7924 ldx [%g2], %g4
7925 xorcc %g3, %g4, %g5
7926 bne test_failed
7927 nop
7928
7929 ! Next check that all the writable bits can be written
7930 stx %l2, [%g2] ! store inverted POR value
7931 ldx [%g2], %g4
7932 xorcc %g7, %g4, %g5
7933 bne test_failed
7934 nop
7935
7936
7937 ! First check that the POR value is correct
7938 add %g2, 8, %g2
7939 ldx [%g2], %g4
7940 xorcc %g3, %g4, %g5
7941 bne test_failed
7942 nop
7943
7944 ! Next check that all the writable bits can be written
7945 stx %l2, [%g2] ! store inverted POR value
7946 ldx [%g2], %g4
7947 xorcc %g7, %g4, %g5
7948 bne test_failed
7949 nop
7950
7951
7952 ! First check that the POR value is correct
7953 add %g2, 8, %g2
7954 ldx [%g2], %g4
7955 xorcc %g3, %g4, %g5
7956 bne test_failed
7957 nop
7958
7959 ! Next check that all the writable bits can be written
7960 stx %l2, [%g2] ! store inverted POR value
7961 ldx [%g2], %g4
7962 xorcc %g7, %g4, %g5
7963 bne test_failed
7964 nop
7965
7966
7967 ! First check that the POR value is correct
7968 add %g2, 8, %g2
7969 ldx [%g2], %g4
7970 xorcc %g3, %g4, %g5
7971 bne test_failed
7972 nop
7973
7974 ! Next check that all the writable bits can be written
7975 stx %l2, [%g2] ! store inverted POR value
7976 ldx [%g2], %g4
7977 xorcc %g7, %g4, %g5
7978 bne test_failed
7979 nop
7980
7981
7982 ! First check that the POR value is correct
7983 add %g2, 8, %g2
7984 ldx [%g2], %g4
7985 xorcc %g3, %g4, %g5
7986 bne test_failed
7987 nop
7988
7989 ! Next check that all the writable bits can be written
7990 stx %l2, [%g2] ! store inverted POR value
7991 ldx [%g2], %g4
7992 xorcc %g7, %g4, %g5
7993 bne test_failed
7994 nop
7995
7996
7997 ! First check that the POR value is correct
7998 add %g2, 8, %g2
7999 ldx [%g2], %g4
8000 xorcc %g3, %g4, %g5
8001 bne test_failed
8002 nop
8003
8004 ! Next check that all the writable bits can be written
8005 stx %l2, [%g2] ! store inverted POR value
8006 ldx [%g2], %g4
8007 xorcc %g7, %g4, %g5
8008 bne test_failed
8009 nop
8010
8011
8012 ! First check that the POR value is correct
8013 add %g2, 8, %g2
8014 ldx [%g2], %g4
8015 xorcc %g3, %g4, %g5
8016 bne test_failed
8017 nop
8018
8019 ! Next check that all the writable bits can be written
8020 stx %l2, [%g2] ! store inverted POR value
8021 ldx [%g2], %g4
8022 xorcc %g7, %g4, %g5
8023 bne test_failed
8024 nop
8025
8026
8027 ! First check that the POR value is correct
8028 add %g2, 8, %g2
8029 ldx [%g2], %g4
8030 xorcc %g3, %g4, %g5
8031 bne test_failed
8032 nop
8033
8034 ! Next check that all the writable bits can be written
8035 stx %l2, [%g2] ! store inverted POR value
8036 ldx [%g2], %g4
8037 xorcc %g7, %g4, %g5
8038 bne test_failed
8039 nop
8040
8041
8042 ! First check that the POR value is correct
8043 add %g2, 8, %g2
8044 ldx [%g2], %g4
8045 xorcc %g3, %g4, %g5
8046 bne test_failed
8047 nop
8048
8049 ! Next check that all the writable bits can be written
8050 stx %l2, [%g2] ! store inverted POR value
8051 ldx [%g2], %g4
8052 xorcc %g7, %g4, %g5
8053 bne test_failed
8054 nop
8055
8056
8057 ! First check that the POR value is correct
8058 add %g2, 8, %g2
8059 ldx [%g2], %g4
8060 xorcc %g3, %g4, %g5
8061 bne test_failed
8062 nop
8063
8064 ! Next check that all the writable bits can be written
8065 stx %l2, [%g2] ! store inverted POR value
8066 ldx [%g2], %g4
8067 xorcc %g7, %g4, %g5
8068 bne test_failed
8069 nop
8070
8071
8072 ! First check that the POR value is correct
8073 add %g2, 8, %g2
8074 ldx [%g2], %g4
8075 xorcc %g3, %g4, %g5
8076 bne test_failed
8077 nop
8078
8079 ! Next check that all the writable bits can be written
8080 stx %l2, [%g2] ! store inverted POR value
8081 ldx [%g2], %g4
8082 xorcc %g7, %g4, %g5
8083 bne test_failed
8084 nop
8085
8086
8087 ! First check that the POR value is correct
8088 add %g2, 8, %g2
8089 ldx [%g2], %g4
8090 xorcc %g3, %g4, %g5
8091 bne test_failed
8092 nop
8093
8094 ! Next check that all the writable bits can be written
8095 stx %l2, [%g2] ! store inverted POR value
8096 ldx [%g2], %g4
8097 xorcc %g7, %g4, %g5
8098 bne test_failed
8099 nop
8100
8101
8102 ! First check that the POR value is correct
8103 add %g2, 8, %g2
8104 ldx [%g2], %g4
8105 xorcc %g3, %g4, %g5
8106 bne test_failed
8107 nop
8108
8109 ! Next check that all the writable bits can be written
8110 stx %l2, [%g2] ! store inverted POR value
8111 ldx [%g2], %g4
8112 xorcc %g7, %g4, %g5
8113 bne test_failed
8114 nop
8115
8116
8117 ! First check that the POR value is correct
8118 add %g2, 8, %g2
8119 ldx [%g2], %g4
8120 xorcc %g3, %g4, %g5
8121 bne test_failed
8122 nop
8123
8124 ! Next check that all the writable bits can be written
8125 stx %l2, [%g2] ! store inverted POR value
8126 ldx [%g2], %g4
8127 xorcc %g7, %g4, %g5
8128 bne test_failed
8129 nop
8130
8131
8132 ! First check that the POR value is correct
8133 add %g2, 8, %g2
8134 ldx [%g2], %g4
8135 xorcc %g3, %g4, %g5
8136 bne test_failed
8137 nop
8138
8139 ! Next check that all the writable bits can be written
8140 stx %l2, [%g2] ! store inverted POR value
8141 ldx [%g2], %g4
8142 xorcc %g7, %g4, %g5
8143 bne test_failed
8144 nop
8145
8146
8147 ! First check that the POR value is correct
8148 add %g2, 8, %g2
8149 ldx [%g2], %g4
8150 xorcc %g3, %g4, %g5
8151 bne test_failed
8152 nop
8153
8154 ! Next check that all the writable bits can be written
8155 stx %l2, [%g2] ! store inverted POR value
8156 ldx [%g2], %g4
8157 xorcc %g7, %g4, %g5
8158 bne test_failed
8159 nop
8160
8161
8162 ! First check that the POR value is correct
8163 add %g2, 8, %g2
8164 ldx [%g2], %g4
8165 xorcc %g3, %g4, %g5
8166 bne test_failed
8167 nop
8168
8169 ! Next check that all the writable bits can be written
8170 stx %l2, [%g2] ! store inverted POR value
8171 ldx [%g2], %g4
8172 xorcc %g7, %g4, %g5
8173 bne test_failed
8174 nop
8175
8176
8177 ! First check that the POR value is correct
8178 add %g2, 8, %g2
8179 ldx [%g2], %g4
8180 xorcc %g3, %g4, %g5
8181 bne test_failed
8182 nop
8183
8184 ! Next check that all the writable bits can be written
8185 stx %l2, [%g2] ! store inverted POR value
8186 ldx [%g2], %g4
8187 xorcc %g7, %g4, %g5
8188 bne test_failed
8189 nop
8190
8191
8192 ! First check that the POR value is correct
8193 add %g2, 8, %g2
8194 ldx [%g2], %g4
8195 xorcc %g3, %g4, %g5
8196 bne test_failed
8197 nop
8198
8199 ! Next check that all the writable bits can be written
8200 stx %l2, [%g2] ! store inverted POR value
8201 ldx [%g2], %g4
8202 xorcc %g7, %g4, %g5
8203 bne test_failed
8204 nop
8205
8206
8207 ! First check that the POR value is correct
8208 add %g2, 8, %g2
8209 ldx [%g2], %g4
8210 xorcc %g3, %g4, %g5
8211 bne test_failed
8212 nop
8213
8214 ! Next check that all the writable bits can be written
8215 stx %l2, [%g2] ! store inverted POR value
8216 ldx [%g2], %g4
8217 xorcc %g7, %g4, %g5
8218 bne test_failed
8219 nop
8220
8221
8222 ! First check that the POR value is correct
8223 add %g2, 8, %g2
8224 ldx [%g2], %g4
8225 xorcc %g3, %g4, %g5
8226 bne test_failed
8227 nop
8228
8229 ! Next check that all the writable bits can be written
8230 stx %l2, [%g2] ! store inverted POR value
8231 ldx [%g2], %g4
8232 xorcc %g7, %g4, %g5
8233 bne test_failed
8234 nop
8235
8236
8237 ! First check that the POR value is correct
8238 add %g2, 8, %g2
8239 ldx [%g2], %g4
8240 xorcc %g3, %g4, %g5
8241 bne test_failed
8242 nop
8243
8244 ! Next check that all the writable bits can be written
8245 stx %l2, [%g2] ! store inverted POR value
8246 ldx [%g2], %g4
8247 xorcc %g7, %g4, %g5
8248 bne test_failed
8249 nop
8250
8251
8252 ! First check that the POR value is correct
8253 add %g2, 8, %g2
8254 ldx [%g2], %g4
8255 xorcc %g3, %g4, %g5
8256 bne test_failed
8257 nop
8258
8259 ! Next check that all the writable bits can be written
8260 stx %l2, [%g2] ! store inverted POR value
8261 ldx [%g2], %g4
8262 xorcc %g7, %g4, %g5
8263 bne test_failed
8264 nop
8265
8266
8267 ! First check that the POR value is correct
8268 add %g2, 8, %g2
8269 ldx [%g2], %g4
8270 xorcc %g3, %g4, %g5
8271 bne test_failed
8272 nop
8273
8274 ! Next check that all the writable bits can be written
8275 stx %l2, [%g2] ! store inverted POR value
8276 ldx [%g2], %g4
8277 xorcc %g7, %g4, %g5
8278 bne test_failed
8279 nop
8280
8281
8282 ! First check that the POR value is correct
8283 add %g2, 8, %g2
8284 ldx [%g2], %g4
8285 xorcc %g3, %g4, %g5
8286 bne test_failed
8287 nop
8288
8289 ! Next check that all the writable bits can be written
8290 stx %l2, [%g2] ! store inverted POR value
8291 ldx [%g2], %g4
8292 xorcc %g7, %g4, %g5
8293 bne test_failed
8294 nop
8295
8296
8297 ! First check that the POR value is correct
8298 add %g2, 8, %g2
8299 ldx [%g2], %g4
8300 xorcc %g3, %g4, %g5
8301 bne test_failed
8302 nop
8303
8304 ! Next check that all the writable bits can be written
8305 stx %l2, [%g2] ! store inverted POR value
8306 ldx [%g2], %g4
8307 xorcc %g7, %g4, %g5
8308 bne test_failed
8309 nop
8310
8311
8312 ! First check that the POR value is correct
8313 add %g2, 8, %g2
8314 ldx [%g2], %g4
8315 xorcc %g3, %g4, %g5
8316 bne test_failed
8317 nop
8318
8319 ! Next check that all the writable bits can be written
8320 stx %l2, [%g2] ! store inverted POR value
8321 ldx [%g2], %g4
8322 xorcc %g7, %g4, %g5
8323 bne test_failed
8324 nop
8325
8326
8327 ! First check that the POR value is correct
8328 add %g2, 8, %g2
8329 ldx [%g2], %g4
8330 xorcc %g3, %g4, %g5
8331 bne test_failed
8332 nop
8333
8334 ! Next check that all the writable bits can be written
8335 stx %l2, [%g2] ! store inverted POR value
8336 ldx [%g2], %g4
8337 xorcc %g7, %g4, %g5
8338 bne test_failed
8339 nop
8340
8341
8342 ! First check that the POR value is correct
8343 add %g2, 8, %g2
8344 ldx [%g2], %g4
8345 xorcc %g3, %g4, %g5
8346 bne test_failed
8347 nop
8348
8349 ! Next check that all the writable bits can be written
8350 stx %l2, [%g2] ! store inverted POR value
8351 ldx [%g2], %g4
8352 xorcc %g7, %g4, %g5
8353 bne test_failed
8354 nop
8355
8356
8357 ! First check that the POR value is correct
8358 add %g2, 8, %g2
8359 ldx [%g2], %g4
8360 xorcc %g3, %g4, %g5
8361 bne test_failed
8362 nop
8363
8364 ! Next check that all the writable bits can be written
8365 stx %l2, [%g2] ! store inverted POR value
8366 ldx [%g2], %g4
8367 xorcc %g7, %g4, %g5
8368 bne test_failed
8369 nop
8370
8371
8372 ! First check that the POR value is correct
8373 add %g2, 8, %g2
8374 ldx [%g2], %g4
8375 xorcc %g3, %g4, %g5
8376 bne test_failed
8377 nop
8378
8379 ! Next check that all the writable bits can be written
8380 stx %l2, [%g2] ! store inverted POR value
8381 ldx [%g2], %g4
8382 xorcc %g7, %g4, %g5
8383 bne test_failed
8384 nop
8385
8386
8387 ! First check that the POR value is correct
8388 add %g2, 8, %g2
8389 ldx [%g2], %g4
8390 xorcc %g3, %g4, %g5
8391 bne test_failed
8392 nop
8393
8394 ! Next check that all the writable bits can be written
8395 stx %l2, [%g2] ! store inverted POR value
8396 ldx [%g2], %g4
8397 xorcc %g7, %g4, %g5
8398 bne test_failed
8399 nop
8400
8401
8402 ! First check that the POR value is correct
8403 add %g2, 8, %g2
8404 ldx [%g2], %g4
8405 xorcc %g3, %g4, %g5
8406 bne test_failed
8407 nop
8408
8409 ! Next check that all the writable bits can be written
8410 stx %l2, [%g2] ! store inverted POR value
8411 ldx [%g2], %g4
8412 xorcc %g7, %g4, %g5
8413 bne test_failed
8414 nop
8415
8416
8417 ! First check that the POR value is correct
8418 add %g2, 8, %g2
8419 ldx [%g2], %g4
8420 xorcc %g3, %g4, %g5
8421 bne test_failed
8422 nop
8423
8424 ! Next check that all the writable bits can be written
8425 stx %l2, [%g2] ! store inverted POR value
8426 ldx [%g2], %g4
8427 xorcc %g7, %g4, %g5
8428 bne test_failed
8429 nop
8430
8431
8432 ! First check that the POR value is correct
8433 add %g2, 8, %g2
8434 ldx [%g2], %g4
8435 xorcc %g3, %g4, %g5
8436 bne test_failed
8437 nop
8438
8439 ! Next check that all the writable bits can be written
8440 stx %l2, [%g2] ! store inverted POR value
8441 ldx [%g2], %g4
8442 xorcc %g7, %g4, %g5
8443 bne test_failed
8444 nop
8445
8446
8447 ! First check that the POR value is correct
8448 add %g2, 8, %g2
8449 ldx [%g2], %g4
8450 xorcc %g3, %g4, %g5
8451 bne test_failed
8452 nop
8453
8454 ! Next check that all the writable bits can be written
8455 stx %l2, [%g2] ! store inverted POR value
8456 ldx [%g2], %g4
8457 xorcc %g7, %g4, %g5
8458 bne test_failed
8459 nop
8460
8461
8462 ! First check that the POR value is correct
8463 add %g2, 8, %g2
8464 ldx [%g2], %g4
8465 xorcc %g3, %g4, %g5
8466 bne test_failed
8467 nop
8468
8469 ! Next check that all the writable bits can be written
8470 stx %l2, [%g2] ! store inverted POR value
8471 ldx [%g2], %g4
8472 xorcc %g7, %g4, %g5
8473 bne test_failed
8474 nop
8475
8476
8477 ! First check that the POR value is correct
8478 add %g2, 8, %g2
8479 ldx [%g2], %g4
8480 xorcc %g3, %g4, %g5
8481 bne test_failed
8482 nop
8483
8484 ! Next check that all the writable bits can be written
8485 stx %l2, [%g2] ! store inverted POR value
8486 ldx [%g2], %g4
8487 xorcc %g7, %g4, %g5
8488 bne test_failed
8489 nop
8490
8491
8492 ! First check that the POR value is correct
8493 add %g2, 8, %g2
8494 ldx [%g2], %g4
8495 xorcc %g3, %g4, %g5
8496 bne test_failed
8497 nop
8498
8499 ! Next check that all the writable bits can be written
8500 stx %l2, [%g2] ! store inverted POR value
8501 ldx [%g2], %g4
8502 xorcc %g7, %g4, %g5
8503 bne test_failed
8504 nop
8505
8506
8507 ! First check that the POR value is correct
8508 add %g2, 8, %g2
8509 ldx [%g2], %g4
8510 xorcc %g3, %g4, %g5
8511 bne test_failed
8512 nop
8513
8514 ! Next check that all the writable bits can be written
8515 stx %l2, [%g2] ! store inverted POR value
8516 ldx [%g2], %g4
8517 xorcc %g7, %g4, %g5
8518 bne test_failed
8519 nop
8520
8521
8522 ! First check that the POR value is correct
8523 add %g2, 8, %g2
8524 ldx [%g2], %g4
8525 xorcc %g3, %g4, %g5
8526 bne test_failed
8527 nop
8528
8529 ! Next check that all the writable bits can be written
8530 stx %l2, [%g2] ! store inverted POR value
8531 ldx [%g2], %g4
8532 xorcc %g7, %g4, %g5
8533 bne test_failed
8534 nop
8535
8536
8537 ! First check that the POR value is correct
8538 add %g2, 8, %g2
8539 ldx [%g2], %g4
8540 xorcc %g3, %g4, %g5
8541 bne test_failed
8542 nop
8543
8544 ! Next check that all the writable bits can be written
8545 stx %l2, [%g2] ! store inverted POR value
8546 ldx [%g2], %g4
8547 xorcc %g7, %g4, %g5
8548 bne test_failed
8549 nop
8550
8551
8552 ! First check that the POR value is correct
8553 add %g2, 8, %g2
8554 ldx [%g2], %g4
8555 xorcc %g3, %g4, %g5
8556 bne test_failed
8557 nop
8558
8559 ! Next check that all the writable bits can be written
8560 stx %l2, [%g2] ! store inverted POR value
8561 ldx [%g2], %g4
8562 xorcc %g7, %g4, %g5
8563 bne test_failed
8564 nop
8565
8566
8567 ! First check that the POR value is correct
8568 add %g2, 8, %g2
8569 ldx [%g2], %g4
8570 xorcc %g3, %g4, %g5
8571 bne test_failed
8572 nop
8573
8574 ! Next check that all the writable bits can be written
8575 stx %l2, [%g2] ! store inverted POR value
8576 ldx [%g2], %g4
8577 xorcc %g7, %g4, %g5
8578 bne test_failed
8579 nop
8580
8581
8582 ! First check that the POR value is correct
8583 add %g2, 8, %g2
8584 ldx [%g2], %g4
8585 xorcc %g3, %g4, %g5
8586 bne test_failed
8587 nop
8588
8589 ! Next check that all the writable bits can be written
8590 stx %l2, [%g2] ! store inverted POR value
8591 ldx [%g2], %g4
8592 xorcc %g7, %g4, %g5
8593 bne test_failed
8594 nop
8595
8596
8597 ! First check that the POR value is correct
8598 add %g2, 8, %g2
8599 ldx [%g2], %g4
8600 xorcc %g3, %g4, %g5
8601 bne test_failed
8602 nop
8603
8604 ! Next check that all the writable bits can be written
8605 stx %l2, [%g2] ! store inverted POR value
8606 ldx [%g2], %g4
8607 xorcc %g7, %g4, %g5
8608 bne test_failed
8609 nop
8610
8611
8612 ! First check that the POR value is correct
8613 add %g2, 8, %g2
8614 ldx [%g2], %g4
8615 xorcc %g3, %g4, %g5
8616 bne test_failed
8617 nop
8618
8619 ! Next check that all the writable bits can be written
8620 stx %l2, [%g2] ! store inverted POR value
8621 ldx [%g2], %g4
8622 xorcc %g7, %g4, %g5
8623 bne test_failed
8624 nop
8625
8626
8627 ! First check that the POR value is correct
8628 add %g2, 8, %g2
8629 ldx [%g2], %g4
8630 xorcc %g3, %g4, %g5
8631 bne test_failed
8632 nop
8633
8634 ! Next check that all the writable bits can be written
8635 stx %l2, [%g2] ! store inverted POR value
8636 ldx [%g2], %g4
8637 xorcc %g7, %g4, %g5
8638 bne test_failed
8639 nop
8640
8641
8642 ! First check that the POR value is correct
8643 add %g2, 8, %g2
8644 ldx [%g2], %g4
8645 xorcc %g3, %g4, %g5
8646 bne test_failed
8647 nop
8648
8649 ! Next check that all the writable bits can be written
8650 stx %l2, [%g2] ! store inverted POR value
8651 ldx [%g2], %g4
8652 xorcc %g7, %g4, %g5
8653 bne test_failed
8654 nop
8655
8656
8657 ! First check that the POR value is correct
8658 add %g2, 8, %g2
8659 ldx [%g2], %g4
8660 xorcc %g3, %g4, %g5
8661 bne test_failed
8662 nop
8663
8664 ! Next check that all the writable bits can be written
8665 stx %l2, [%g2] ! store inverted POR value
8666 ldx [%g2], %g4
8667 xorcc %g7, %g4, %g5
8668 bne test_failed
8669 nop
8670
8671
8672 ! First check that the POR value is correct
8673 add %g2, 8, %g2
8674 ldx [%g2], %g4
8675 xorcc %g3, %g4, %g5
8676 bne test_failed
8677 nop
8678
8679 ! Next check that all the writable bits can be written
8680 stx %l2, [%g2] ! store inverted POR value
8681 ldx [%g2], %g4
8682 xorcc %g7, %g4, %g5
8683 bne test_failed
8684 nop
8685
8686
8687 ! First check that the POR value is correct
8688 add %g2, 8, %g2
8689 ldx [%g2], %g4
8690 xorcc %g3, %g4, %g5
8691 bne test_failed
8692 nop
8693
8694 ! Next check that all the writable bits can be written
8695 stx %l2, [%g2] ! store inverted POR value
8696 ldx [%g2], %g4
8697 xorcc %g7, %g4, %g5
8698 bne test_failed
8699 nop
8700
8701
8702 ! First check that the POR value is correct
8703 add %g2, 8, %g2
8704 ldx [%g2], %g4
8705 xorcc %g3, %g4, %g5
8706 bne test_failed
8707 nop
8708
8709 ! Next check that all the writable bits can be written
8710 stx %l2, [%g2] ! store inverted POR value
8711 ldx [%g2], %g4
8712 xorcc %g7, %g4, %g5
8713 bne test_failed
8714 nop
8715
8716
8717 ! First check that the POR value is correct
8718 add %g2, 8, %g2
8719 ldx [%g2], %g4
8720 xorcc %g3, %g4, %g5
8721 bne test_failed
8722 nop
8723
8724 ! Next check that all the writable bits can be written
8725 stx %l2, [%g2] ! store inverted POR value
8726 ldx [%g2], %g4
8727 xorcc %g7, %g4, %g5
8728 bne test_failed
8729 nop
8730
8731
8732 ! First check that the POR value is correct
8733 add %g2, 8, %g2
8734 ldx [%g2], %g4
8735 xorcc %g3, %g4, %g5
8736 bne test_failed
8737 nop
8738
8739 ! Next check that all the writable bits can be written
8740 stx %l2, [%g2] ! store inverted POR value
8741 ldx [%g2], %g4
8742 xorcc %g7, %g4, %g5
8743 bne test_failed
8744 nop
8745
8746
8747 ! First check that the POR value is correct
8748 add %g2, 8, %g2
8749 ldx [%g2], %g4
8750 xorcc %g3, %g4, %g5
8751 bne test_failed
8752 nop
8753
8754 ! Next check that all the writable bits can be written
8755 stx %l2, [%g2] ! store inverted POR value
8756 ldx [%g2], %g4
8757 xorcc %g7, %g4, %g5
8758 bne test_failed
8759 nop
8760
8761
8762 ! First check that the POR value is correct
8763 add %g2, 8, %g2
8764 ldx [%g2], %g4
8765 xorcc %g3, %g4, %g5
8766 bne test_failed
8767 nop
8768
8769 ! Next check that all the writable bits can be written
8770 stx %l2, [%g2] ! store inverted POR value
8771 ldx [%g2], %g4
8772 xorcc %g7, %g4, %g5
8773 bne test_failed
8774 nop
8775
8776
8777 ! First check that the POR value is correct
8778 add %g2, 8, %g2
8779 ldx [%g2], %g4
8780 xorcc %g3, %g4, %g5
8781 bne test_failed
8782 nop
8783
8784 ! Next check that all the writable bits can be written
8785 stx %l2, [%g2] ! store inverted POR value
8786 ldx [%g2], %g4
8787 xorcc %g7, %g4, %g5
8788 bne test_failed
8789 nop
8790
8791
8792 ! First check that the POR value is correct
8793 add %g2, 8, %g2
8794 ldx [%g2], %g4
8795 xorcc %g3, %g4, %g5
8796 bne test_failed
8797 nop
8798
8799 ! Next check that all the writable bits can be written
8800 stx %l2, [%g2] ! store inverted POR value
8801 ldx [%g2], %g4
8802 xorcc %g7, %g4, %g5
8803 bne test_failed
8804 nop
8805
8806
8807 ! First check that the POR value is correct
8808 add %g2, 8, %g2
8809 ldx [%g2], %g4
8810 xorcc %g3, %g4, %g5
8811 bne test_failed
8812 nop
8813
8814 ! Next check that all the writable bits can be written
8815 stx %l2, [%g2] ! store inverted POR value
8816 ldx [%g2], %g4
8817 xorcc %g7, %g4, %g5
8818 bne test_failed
8819 nop
8820
8821
8822 ! First check that the POR value is correct
8823 add %g2, 8, %g2
8824 ldx [%g2], %g4
8825 xorcc %g3, %g4, %g5
8826 bne test_failed
8827 nop
8828
8829 ! Next check that all the writable bits can be written
8830 stx %l2, [%g2] ! store inverted POR value
8831 ldx [%g2], %g4
8832 xorcc %g7, %g4, %g5
8833 bne test_failed
8834 nop
8835
8836
8837 ! First check that the POR value is correct
8838 add %g2, 8, %g2
8839 ldx [%g2], %g4
8840 xorcc %g3, %g4, %g5
8841 bne test_failed
8842 nop
8843
8844 ! Next check that all the writable bits can be written
8845 stx %l2, [%g2] ! store inverted POR value
8846 ldx [%g2], %g4
8847 xorcc %g7, %g4, %g5
8848 bne test_failed
8849 nop
8850
8851
8852 ! First check that the POR value is correct
8853 add %g2, 8, %g2
8854 ldx [%g2], %g4
8855 xorcc %g3, %g4, %g5
8856 bne test_failed
8857 nop
8858
8859 ! Next check that all the writable bits can be written
8860 stx %l2, [%g2] ! store inverted POR value
8861 ldx [%g2], %g4
8862 xorcc %g7, %g4, %g5
8863 bne test_failed
8864 nop
8865
8866
8867 ! First check that the POR value is correct
8868 add %g2, 8, %g2
8869 ldx [%g2], %g4
8870 xorcc %g3, %g4, %g5
8871 bne test_failed
8872 nop
8873
8874 ! Next check that all the writable bits can be written
8875 stx %l2, [%g2] ! store inverted POR value
8876 ldx [%g2], %g4
8877 xorcc %g7, %g4, %g5
8878 bne test_failed
8879 nop
8880
8881
8882 ! First check that the POR value is correct
8883 add %g2, 8, %g2
8884 ldx [%g2], %g4
8885 xorcc %g3, %g4, %g5
8886 bne test_failed
8887 nop
8888
8889 ! Next check that all the writable bits can be written
8890 stx %l2, [%g2] ! store inverted POR value
8891 ldx [%g2], %g4
8892 xorcc %g7, %g4, %g5
8893 bne test_failed
8894 nop
8895
8896
8897 ! First check that the POR value is correct
8898 add %g2, 8, %g2
8899 ldx [%g2], %g4
8900 xorcc %g3, %g4, %g5
8901 bne test_failed
8902 nop
8903
8904 ! Next check that all the writable bits can be written
8905 stx %l2, [%g2] ! store inverted POR value
8906 ldx [%g2], %g4
8907 xorcc %g7, %g4, %g5
8908 bne test_failed
8909 nop
8910
8911
8912 ! First check that the POR value is correct
8913 add %g2, 8, %g2
8914 ldx [%g2], %g4
8915 xorcc %g3, %g4, %g5
8916 bne test_failed
8917 nop
8918
8919 ! Next check that all the writable bits can be written
8920 stx %l2, [%g2] ! store inverted POR value
8921 ldx [%g2], %g4
8922 xorcc %g7, %g4, %g5
8923 bne test_failed
8924 nop
8925
8926
8927 ! First check that the POR value is correct
8928 add %g2, 8, %g2
8929 ldx [%g2], %g4
8930 xorcc %g3, %g4, %g5
8931 bne test_failed
8932 nop
8933
8934 ! Next check that all the writable bits can be written
8935 stx %l2, [%g2] ! store inverted POR value
8936 ldx [%g2], %g4
8937 xorcc %g7, %g4, %g5
8938 bne test_failed
8939 nop
8940
8941
8942 ! First check that the POR value is correct
8943 add %g2, 8, %g2
8944 ldx [%g2], %g4
8945 xorcc %g3, %g4, %g5
8946 bne test_failed
8947 nop
8948
8949 ! Next check that all the writable bits can be written
8950 stx %l2, [%g2] ! store inverted POR value
8951 ldx [%g2], %g4
8952 xorcc %g7, %g4, %g5
8953 bne test_failed
8954 nop
8955
8956
8957 ! First check that the POR value is correct
8958 add %g2, 8, %g2
8959 ldx [%g2], %g4
8960 xorcc %g3, %g4, %g5
8961 bne test_failed
8962 nop
8963
8964 ! Next check that all the writable bits can be written
8965 stx %l2, [%g2] ! store inverted POR value
8966 ldx [%g2], %g4
8967 xorcc %g7, %g4, %g5
8968 bne test_failed
8969 nop
8970
8971
8972 ! First check that the POR value is correct
8973 add %g2, 8, %g2
8974 ldx [%g2], %g4
8975 xorcc %g3, %g4, %g5
8976 bne test_failed
8977 nop
8978
8979 ! Next check that all the writable bits can be written
8980 stx %l2, [%g2] ! store inverted POR value
8981 ldx [%g2], %g4
8982 xorcc %g7, %g4, %g5
8983 bne test_failed
8984 nop
8985
8986
8987 ! First check that the POR value is correct
8988 add %g2, 8, %g2
8989 ldx [%g2], %g4
8990 xorcc %g3, %g4, %g5
8991 bne test_failed
8992 nop
8993
8994 ! Next check that all the writable bits can be written
8995 stx %l2, [%g2] ! store inverted POR value
8996 ldx [%g2], %g4
8997 xorcc %g7, %g4, %g5
8998 bne test_failed
8999 nop
9000
9001
9002 ! First check that the POR value is correct
9003 add %g2, 8, %g2
9004 ldx [%g2], %g4
9005 xorcc %g3, %g4, %g5
9006 bne test_failed
9007 nop
9008
9009 ! Next check that all the writable bits can be written
9010 stx %l2, [%g2] ! store inverted POR value
9011 ldx [%g2], %g4
9012 xorcc %g7, %g4, %g5
9013 bne test_failed
9014 nop
9015
9016
9017 ! First check that the POR value is correct
9018 add %g2, 8, %g2
9019 ldx [%g2], %g4
9020 xorcc %g3, %g4, %g5
9021 bne test_failed
9022 nop
9023
9024 ! Next check that all the writable bits can be written
9025 stx %l2, [%g2] ! store inverted POR value
9026 ldx [%g2], %g4
9027 xorcc %g7, %g4, %g5
9028 bne test_failed
9029 nop
9030
9031
9032 ! First check that the POR value is correct
9033 add %g2, 8, %g2
9034 ldx [%g2], %g4
9035 xorcc %g3, %g4, %g5
9036 bne test_failed
9037 nop
9038
9039 ! Next check that all the writable bits can be written
9040 stx %l2, [%g2] ! store inverted POR value
9041 ldx [%g2], %g4
9042 xorcc %g7, %g4, %g5
9043 bne test_failed
9044 nop
9045
9046
9047 ! First check that the POR value is correct
9048 add %g2, 8, %g2
9049 ldx [%g2], %g4
9050 xorcc %g3, %g4, %g5
9051 bne test_failed
9052 nop
9053
9054 ! Next check that all the writable bits can be written
9055 stx %l2, [%g2] ! store inverted POR value
9056 ldx [%g2], %g4
9057 xorcc %g7, %g4, %g5
9058 bne test_failed
9059 nop
9060
9061
9062 ! First check that the POR value is correct
9063 add %g2, 8, %g2
9064 ldx [%g2], %g4
9065 xorcc %g3, %g4, %g5
9066 bne test_failed
9067 nop
9068
9069 ! Next check that all the writable bits can be written
9070 stx %l2, [%g2] ! store inverted POR value
9071 ldx [%g2], %g4
9072 xorcc %g7, %g4, %g5
9073 bne test_failed
9074 nop
9075
9076
9077 ! First check that the POR value is correct
9078 add %g2, 8, %g2
9079 ldx [%g2], %g4
9080 xorcc %g3, %g4, %g5
9081 bne test_failed
9082 nop
9083
9084 ! Next check that all the writable bits can be written
9085 stx %l2, [%g2] ! store inverted POR value
9086 ldx [%g2], %g4
9087 xorcc %g7, %g4, %g5
9088 bne test_failed
9089 nop
9090
9091
9092 ! First check that the POR value is correct
9093 add %g2, 8, %g2
9094 ldx [%g2], %g4
9095 xorcc %g3, %g4, %g5
9096 bne test_failed
9097 nop
9098
9099 ! Next check that all the writable bits can be written
9100 stx %l2, [%g2] ! store inverted POR value
9101 ldx [%g2], %g4
9102 xorcc %g7, %g4, %g5
9103 bne test_failed
9104 nop
9105
9106
9107 ! First check that the POR value is correct
9108 add %g2, 8, %g2
9109 ldx [%g2], %g4
9110 xorcc %g3, %g4, %g5
9111 bne test_failed
9112 nop
9113
9114 ! Next check that all the writable bits can be written
9115 stx %l2, [%g2] ! store inverted POR value
9116 ldx [%g2], %g4
9117 xorcc %g7, %g4, %g5
9118 bne test_failed
9119 nop
9120
9121
9122 ! First check that the POR value is correct
9123 add %g2, 8, %g2
9124 ldx [%g2], %g4
9125 xorcc %g3, %g4, %g5
9126 bne test_failed
9127 nop
9128
9129 ! Next check that all the writable bits can be written
9130 stx %l2, [%g2] ! store inverted POR value
9131 ldx [%g2], %g4
9132 xorcc %g7, %g4, %g5
9133 bne test_failed
9134 nop
9135
9136
9137 ! First check that the POR value is correct
9138 add %g2, 8, %g2
9139 ldx [%g2], %g4
9140 xorcc %g3, %g4, %g5
9141 bne test_failed
9142 nop
9143
9144 ! Next check that all the writable bits can be written
9145 stx %l2, [%g2] ! store inverted POR value
9146 ldx [%g2], %g4
9147 xorcc %g7, %g4, %g5
9148 bne test_failed
9149 nop
9150
9151
9152 ! First check that the POR value is correct
9153 add %g2, 8, %g2
9154 ldx [%g2], %g4
9155 xorcc %g3, %g4, %g5
9156 bne test_failed
9157 nop
9158
9159 ! Next check that all the writable bits can be written
9160 stx %l2, [%g2] ! store inverted POR value
9161 ldx [%g2], %g4
9162 xorcc %g7, %g4, %g5
9163 bne test_failed
9164 nop
9165
9166
9167 ! First check that the POR value is correct
9168 add %g2, 8, %g2
9169 ldx [%g2], %g4
9170 xorcc %g3, %g4, %g5
9171 bne test_failed
9172 nop
9173
9174 ! Next check that all the writable bits can be written
9175 stx %l2, [%g2] ! store inverted POR value
9176 ldx [%g2], %g4
9177 xorcc %g7, %g4, %g5
9178 bne test_failed
9179 nop
9180
9181
9182 ! First check that the POR value is correct
9183 add %g2, 8, %g2
9184 ldx [%g2], %g4
9185 xorcc %g3, %g4, %g5
9186 bne test_failed
9187 nop
9188
9189 ! Next check that all the writable bits can be written
9190 stx %l2, [%g2] ! store inverted POR value
9191 ldx [%g2], %g4
9192 xorcc %g7, %g4, %g5
9193 bne test_failed
9194 nop
9195
9196
9197 ! First check that the POR value is correct
9198 add %g2, 8, %g2
9199 ldx [%g2], %g4
9200 xorcc %g3, %g4, %g5
9201 bne test_failed
9202 nop
9203
9204 ! Next check that all the writable bits can be written
9205 stx %l2, [%g2] ! store inverted POR value
9206 ldx [%g2], %g4
9207 xorcc %g7, %g4, %g5
9208 bne test_failed
9209 nop
9210
9211
9212 ! First check that the POR value is correct
9213 add %g2, 8, %g2
9214 ldx [%g2], %g4
9215 xorcc %g3, %g4, %g5
9216 bne test_failed
9217 nop
9218
9219 ! Next check that all the writable bits can be written
9220 stx %l2, [%g2] ! store inverted POR value
9221 ldx [%g2], %g4
9222 xorcc %g7, %g4, %g5
9223 bne test_failed
9224 nop
9225
9226
9227 ! First check that the POR value is correct
9228 add %g2, 8, %g2
9229 ldx [%g2], %g4
9230 xorcc %g3, %g4, %g5
9231 bne test_failed
9232 nop
9233
9234 ! Next check that all the writable bits can be written
9235 stx %l2, [%g2] ! store inverted POR value
9236 ldx [%g2], %g4
9237 xorcc %g7, %g4, %g5
9238 bne test_failed
9239 nop
9240
9241
9242 ! First check that the POR value is correct
9243 add %g2, 8, %g2
9244 ldx [%g2], %g4
9245 xorcc %g3, %g4, %g5
9246 bne test_failed
9247 nop
9248
9249 ! Next check that all the writable bits can be written
9250 stx %l2, [%g2] ! store inverted POR value
9251 ldx [%g2], %g4
9252 xorcc %g7, %g4, %g5
9253 bne test_failed
9254 nop
9255
9256
9257 ! First check that the POR value is correct
9258 add %g2, 8, %g2
9259 ldx [%g2], %g4
9260 xorcc %g3, %g4, %g5
9261 bne test_failed
9262 nop
9263
9264 ! Next check that all the writable bits can be written
9265 stx %l2, [%g2] ! store inverted POR value
9266 ldx [%g2], %g4
9267 xorcc %g7, %g4, %g5
9268 bne test_failed
9269 nop
9270
9271
9272 ! First check that the POR value is correct
9273 add %g2, 8, %g2
9274 ldx [%g2], %g4
9275 xorcc %g3, %g4, %g5
9276 bne test_failed
9277 nop
9278
9279 ! Next check that all the writable bits can be written
9280 stx %l2, [%g2] ! store inverted POR value
9281 ldx [%g2], %g4
9282 xorcc %g7, %g4, %g5
9283 bne test_failed
9284 nop
9285
9286
9287 ! First check that the POR value is correct
9288 add %g2, 8, %g2
9289 ldx [%g2], %g4
9290 xorcc %g3, %g4, %g5
9291 bne test_failed
9292 nop
9293
9294 ! Next check that all the writable bits can be written
9295 stx %l2, [%g2] ! store inverted POR value
9296 ldx [%g2], %g4
9297 xorcc %g7, %g4, %g5
9298 bne test_failed
9299 nop
9300
9301
9302 ! First check that the POR value is correct
9303 add %g2, 8, %g2
9304 ldx [%g2], %g4
9305 xorcc %g3, %g4, %g5
9306 bne test_failed
9307 nop
9308
9309 ! Next check that all the writable bits can be written
9310 stx %l2, [%g2] ! store inverted POR value
9311 ldx [%g2], %g4
9312 xorcc %g7, %g4, %g5
9313 bne test_failed
9314 nop
9315
9316
9317 ! First check that the POR value is correct
9318 add %g2, 8, %g2
9319 ldx [%g2], %g4
9320 xorcc %g3, %g4, %g5
9321 bne test_failed
9322 nop
9323
9324 ! Next check that all the writable bits can be written
9325 stx %l2, [%g2] ! store inverted POR value
9326 ldx [%g2], %g4
9327 xorcc %g7, %g4, %g5
9328 bne test_failed
9329 nop
9330
9331
9332 ! First check that the POR value is correct
9333 add %g2, 8, %g2
9334 ldx [%g2], %g4
9335 xorcc %g3, %g4, %g5
9336 bne test_failed
9337 nop
9338
9339 ! Next check that all the writable bits can be written
9340 stx %l2, [%g2] ! store inverted POR value
9341 ldx [%g2], %g4
9342 xorcc %g7, %g4, %g5
9343 bne test_failed
9344 nop
9345
9346
9347 ! First check that the POR value is correct
9348 add %g2, 8, %g2
9349 ldx [%g2], %g4
9350 xorcc %g3, %g4, %g5
9351 bne test_failed
9352 nop
9353
9354 ! Next check that all the writable bits can be written
9355 stx %l2, [%g2] ! store inverted POR value
9356 ldx [%g2], %g4
9357 xorcc %g7, %g4, %g5
9358 bne test_failed
9359 nop
9360
9361
9362 ! First check that the POR value is correct
9363 add %g2, 8, %g2
9364 ldx [%g2], %g4
9365 xorcc %g3, %g4, %g5
9366 bne test_failed
9367 nop
9368
9369 ! Next check that all the writable bits can be written
9370 stx %l2, [%g2] ! store inverted POR value
9371 ldx [%g2], %g4
9372 xorcc %g7, %g4, %g5
9373 bne test_failed
9374 nop
9375
9376
9377 ! First check that the POR value is correct
9378 add %g2, 8, %g2
9379 ldx [%g2], %g4
9380 xorcc %g3, %g4, %g5
9381 bne test_failed
9382 nop
9383
9384 ! Next check that all the writable bits can be written
9385 stx %l2, [%g2] ! store inverted POR value
9386 ldx [%g2], %g4
9387 xorcc %g7, %g4, %g5
9388 bne test_failed
9389 nop
9390
9391
9392 ! First check that the POR value is correct
9393 add %g2, 8, %g2
9394 ldx [%g2], %g4
9395 xorcc %g3, %g4, %g5
9396 bne test_failed
9397 nop
9398
9399 ! Next check that all the writable bits can be written
9400 stx %l2, [%g2] ! store inverted POR value
9401 ldx [%g2], %g4
9402 xorcc %g7, %g4, %g5
9403 bne test_failed
9404 nop
9405
9406
9407 ! First check that the POR value is correct
9408 add %g2, 8, %g2
9409 ldx [%g2], %g4
9410 xorcc %g3, %g4, %g5
9411 bne test_failed
9412 nop
9413
9414 ! Next check that all the writable bits can be written
9415 stx %l2, [%g2] ! store inverted POR value
9416 ldx [%g2], %g4
9417 xorcc %g7, %g4, %g5
9418 bne test_failed
9419 nop
9420
9421
9422 ! First check that the POR value is correct
9423 add %g2, 8, %g2
9424 ldx [%g2], %g4
9425 xorcc %g3, %g4, %g5
9426 bne test_failed
9427 nop
9428
9429 ! Next check that all the writable bits can be written
9430 stx %l2, [%g2] ! store inverted POR value
9431 ldx [%g2], %g4
9432 xorcc %g7, %g4, %g5
9433 bne test_failed
9434 nop
9435
9436
9437 ! First check that the POR value is correct
9438 add %g2, 8, %g2
9439 ldx [%g2], %g4
9440 xorcc %g3, %g4, %g5
9441 bne test_failed
9442 nop
9443
9444 ! Next check that all the writable bits can be written
9445 stx %l2, [%g2] ! store inverted POR value
9446 ldx [%g2], %g4
9447 xorcc %g7, %g4, %g5
9448 bne test_failed
9449 nop
9450
9451
9452 ! First check that the POR value is correct
9453 add %g2, 8, %g2
9454 ldx [%g2], %g4
9455 xorcc %g3, %g4, %g5
9456 bne test_failed
9457 nop
9458
9459 ! Next check that all the writable bits can be written
9460 stx %l2, [%g2] ! store inverted POR value
9461 ldx [%g2], %g4
9462 xorcc %g7, %g4, %g5
9463 bne test_failed
9464 nop
9465
9466
9467 ! First check that the POR value is correct
9468 add %g2, 8, %g2
9469 ldx [%g2], %g4
9470 xorcc %g3, %g4, %g5
9471 bne test_failed
9472 nop
9473
9474 ! Next check that all the writable bits can be written
9475 stx %l2, [%g2] ! store inverted POR value
9476 ldx [%g2], %g4
9477 xorcc %g7, %g4, %g5
9478 bne test_failed
9479 nop
9480
9481
9482 ! First check that the POR value is correct
9483 add %g2, 8, %g2
9484 ldx [%g2], %g4
9485 xorcc %g3, %g4, %g5
9486 bne test_failed
9487 nop
9488
9489 ! Next check that all the writable bits can be written
9490 stx %l2, [%g2] ! store inverted POR value
9491 ldx [%g2], %g4
9492 xorcc %g7, %g4, %g5
9493 bne test_failed
9494 nop
9495
9496
9497 ! First check that the POR value is correct
9498 add %g2, 8, %g2
9499 ldx [%g2], %g4
9500 xorcc %g3, %g4, %g5
9501 bne test_failed
9502 nop
9503
9504 ! Next check that all the writable bits can be written
9505 stx %l2, [%g2] ! store inverted POR value
9506 ldx [%g2], %g4
9507 xorcc %g7, %g4, %g5
9508 bne test_failed
9509 nop
9510
9511
9512 ! First check that the POR value is correct
9513 add %g2, 8, %g2
9514 ldx [%g2], %g4
9515 xorcc %g3, %g4, %g5
9516 bne test_failed
9517 nop
9518
9519 ! Next check that all the writable bits can be written
9520 stx %l2, [%g2] ! store inverted POR value
9521 ldx [%g2], %g4
9522 xorcc %g7, %g4, %g5
9523 bne test_failed
9524 nop
9525
9526
9527 ! First check that the POR value is correct
9528 add %g2, 8, %g2
9529 ldx [%g2], %g4
9530 xorcc %g3, %g4, %g5
9531 bne test_failed
9532 nop
9533
9534 ! Next check that all the writable bits can be written
9535 stx %l2, [%g2] ! store inverted POR value
9536 ldx [%g2], %g4
9537 xorcc %g7, %g4, %g5
9538 bne test_failed
9539 nop
9540
9541
9542 ! First check that the POR value is correct
9543 add %g2, 8, %g2
9544 ldx [%g2], %g4
9545 xorcc %g3, %g4, %g5
9546 bne test_failed
9547 nop
9548
9549 ! Next check that all the writable bits can be written
9550 stx %l2, [%g2] ! store inverted POR value
9551 ldx [%g2], %g4
9552 xorcc %g7, %g4, %g5
9553 bne test_failed
9554 nop
9555
9556
9557 ! First check that the POR value is correct
9558 add %g2, 8, %g2
9559 ldx [%g2], %g4
9560 xorcc %g3, %g4, %g5
9561 bne test_failed
9562 nop
9563
9564 ! Next check that all the writable bits can be written
9565 stx %l2, [%g2] ! store inverted POR value
9566 ldx [%g2], %g4
9567 xorcc %g7, %g4, %g5
9568 bne test_failed
9569 nop
9570
9571
9572 ! First check that the POR value is correct
9573 add %g2, 8, %g2
9574 ldx [%g2], %g4
9575 xorcc %g3, %g4, %g5
9576 bne test_failed
9577 nop
9578
9579 ! Next check that all the writable bits can be written
9580 stx %l2, [%g2] ! store inverted POR value
9581 ldx [%g2], %g4
9582 xorcc %g7, %g4, %g5
9583 bne test_failed
9584 nop
9585
9586
9587 ! First check that the POR value is correct
9588 add %g2, 8, %g2
9589 ldx [%g2], %g4
9590 xorcc %g3, %g4, %g5
9591 bne test_failed
9592 nop
9593
9594 ! Next check that all the writable bits can be written
9595 stx %l2, [%g2] ! store inverted POR value
9596 ldx [%g2], %g4
9597 xorcc %g7, %g4, %g5
9598 bne test_failed
9599 nop
9600
9601
9602 ! First check that the POR value is correct
9603 add %g2, 8, %g2
9604 ldx [%g2], %g4
9605 xorcc %g3, %g4, %g5
9606 bne test_failed
9607 nop
9608
9609 ! Next check that all the writable bits can be written
9610 stx %l2, [%g2] ! store inverted POR value
9611 ldx [%g2], %g4
9612 xorcc %g7, %g4, %g5
9613 bne test_failed
9614 nop
9615
9616
9617 ! First check that the POR value is correct
9618 add %g2, 8, %g2
9619 ldx [%g2], %g4
9620 xorcc %g3, %g4, %g5
9621 bne test_failed
9622 nop
9623
9624 ! Next check that all the writable bits can be written
9625 stx %l2, [%g2] ! store inverted POR value
9626 ldx [%g2], %g4
9627 xorcc %g7, %g4, %g5
9628 bne test_failed
9629 nop
9630
9631
9632 ! First check that the POR value is correct
9633 add %g2, 8, %g2
9634 ldx [%g2], %g4
9635 xorcc %g3, %g4, %g5
9636 bne test_failed
9637 nop
9638
9639 ! Next check that all the writable bits can be written
9640 stx %l2, [%g2] ! store inverted POR value
9641 ldx [%g2], %g4
9642 xorcc %g7, %g4, %g5
9643 bne test_failed
9644 nop
9645
9646
9647 ! First check that the POR value is correct
9648 add %g2, 8, %g2
9649 ldx [%g2], %g4
9650 xorcc %g3, %g4, %g5
9651 bne test_failed
9652 nop
9653
9654 ! Next check that all the writable bits can be written
9655 stx %l2, [%g2] ! store inverted POR value
9656 ldx [%g2], %g4
9657 xorcc %g7, %g4, %g5
9658 bne test_failed
9659 nop
9660
9661
9662 ba test_passed
9663 nop
9664
9665thread_4:
9666
9667REG_TEST_142:
9668 ! First check that the POR value is correct
9669 setx FIRE_DLC_IMU_RDS_MSI_CSR_A_MSI_CLEAR_REG_RW1C_ALIAS_ADDR, %g1, %g2
9670 best_set_reg(FIRE_DLC_IMU_RDS_MSI_CSR_A_MSI_CLEAR_REG_RW1C_ALIAS_POR_VALUE, %g1, %g3)
9671 ldx [%g2], %g4
9672 xorcc %g3, %g4, %g5
9673 bne test_failed
9674 nop
9675
9676 ! Next check that all the writable bits can be written
9677 xor %g3, %l1, %l2
9678 stx %l2, [%g2] ! store inverted POR value
9679
9680#define REG_142_EXP_VALUE mpeval( (~FIRE_DLC_IMU_RDS_MSI_CSR_A_MSI_CLEAR_REG_RW1C_ALIAS_POR_VALUE & 0) | (FIRE_DLC_IMU_RDS_MSI_CSR_A_MSI_CLEAR_REG_RW1C_ALIAS_POR_VALUE & ~0) )
9681
9682 best_set_reg(REG_142_EXP_VALUE, %g1, %g7) ! get expected value
9683 ldx [%g2], %g4
9684 xorcc %g7, %g4, %g5
9685 bne test_failed
9686 nop
9687
9688
9689 ! First check that the POR value is correct
9690 add %g2, 8, %g2
9691 ldx [%g2], %g4
9692 xorcc %g3, %g4, %g5
9693 bne test_failed
9694 nop
9695
9696 ! Next check that all the writable bits can be written
9697 stx %l2, [%g2] ! store inverted POR value
9698 ldx [%g2], %g4
9699 xorcc %g7, %g4, %g5
9700 bne test_failed
9701 nop
9702
9703
9704 ! First check that the POR value is correct
9705 add %g2, 8, %g2
9706 ldx [%g2], %g4
9707 xorcc %g3, %g4, %g5
9708 bne test_failed
9709 nop
9710
9711 ! Next check that all the writable bits can be written
9712 stx %l2, [%g2] ! store inverted POR value
9713 ldx [%g2], %g4
9714 xorcc %g7, %g4, %g5
9715 bne test_failed
9716 nop
9717
9718
9719 ! First check that the POR value is correct
9720 add %g2, 8, %g2
9721 ldx [%g2], %g4
9722 xorcc %g3, %g4, %g5
9723 bne test_failed
9724 nop
9725
9726 ! Next check that all the writable bits can be written
9727 stx %l2, [%g2] ! store inverted POR value
9728 ldx [%g2], %g4
9729 xorcc %g7, %g4, %g5
9730 bne test_failed
9731 nop
9732
9733
9734 ! First check that the POR value is correct
9735 add %g2, 8, %g2
9736 ldx [%g2], %g4
9737 xorcc %g3, %g4, %g5
9738 bne test_failed
9739 nop
9740
9741 ! Next check that all the writable bits can be written
9742 stx %l2, [%g2] ! store inverted POR value
9743 ldx [%g2], %g4
9744 xorcc %g7, %g4, %g5
9745 bne test_failed
9746 nop
9747
9748
9749 ! First check that the POR value is correct
9750 add %g2, 8, %g2
9751 ldx [%g2], %g4
9752 xorcc %g3, %g4, %g5
9753 bne test_failed
9754 nop
9755
9756 ! Next check that all the writable bits can be written
9757 stx %l2, [%g2] ! store inverted POR value
9758 ldx [%g2], %g4
9759 xorcc %g7, %g4, %g5
9760 bne test_failed
9761 nop
9762
9763
9764 ! First check that the POR value is correct
9765 add %g2, 8, %g2
9766 ldx [%g2], %g4
9767 xorcc %g3, %g4, %g5
9768 bne test_failed
9769 nop
9770
9771 ! Next check that all the writable bits can be written
9772 stx %l2, [%g2] ! store inverted POR value
9773 ldx [%g2], %g4
9774 xorcc %g7, %g4, %g5
9775 bne test_failed
9776 nop
9777
9778
9779 ! First check that the POR value is correct
9780 add %g2, 8, %g2
9781 ldx [%g2], %g4
9782 xorcc %g3, %g4, %g5
9783 bne test_failed
9784 nop
9785
9786 ! Next check that all the writable bits can be written
9787 stx %l2, [%g2] ! store inverted POR value
9788 ldx [%g2], %g4
9789 xorcc %g7, %g4, %g5
9790 bne test_failed
9791 nop
9792
9793
9794 ! First check that the POR value is correct
9795 add %g2, 8, %g2
9796 ldx [%g2], %g4
9797 xorcc %g3, %g4, %g5
9798 bne test_failed
9799 nop
9800
9801 ! Next check that all the writable bits can be written
9802 stx %l2, [%g2] ! store inverted POR value
9803 ldx [%g2], %g4
9804 xorcc %g7, %g4, %g5
9805 bne test_failed
9806 nop
9807
9808
9809 ! First check that the POR value is correct
9810 add %g2, 8, %g2
9811 ldx [%g2], %g4
9812 xorcc %g3, %g4, %g5
9813 bne test_failed
9814 nop
9815
9816 ! Next check that all the writable bits can be written
9817 stx %l2, [%g2] ! store inverted POR value
9818 ldx [%g2], %g4
9819 xorcc %g7, %g4, %g5
9820 bne test_failed
9821 nop
9822
9823
9824 ! First check that the POR value is correct
9825 add %g2, 8, %g2
9826 ldx [%g2], %g4
9827 xorcc %g3, %g4, %g5
9828 bne test_failed
9829 nop
9830
9831 ! Next check that all the writable bits can be written
9832 stx %l2, [%g2] ! store inverted POR value
9833 ldx [%g2], %g4
9834 xorcc %g7, %g4, %g5
9835 bne test_failed
9836 nop
9837
9838
9839 ! First check that the POR value is correct
9840 add %g2, 8, %g2
9841 ldx [%g2], %g4
9842 xorcc %g3, %g4, %g5
9843 bne test_failed
9844 nop
9845
9846 ! Next check that all the writable bits can be written
9847 stx %l2, [%g2] ! store inverted POR value
9848 ldx [%g2], %g4
9849 xorcc %g7, %g4, %g5
9850 bne test_failed
9851 nop
9852
9853
9854 ! First check that the POR value is correct
9855 add %g2, 8, %g2
9856 ldx [%g2], %g4
9857 xorcc %g3, %g4, %g5
9858 bne test_failed
9859 nop
9860
9861 ! Next check that all the writable bits can be written
9862 stx %l2, [%g2] ! store inverted POR value
9863 ldx [%g2], %g4
9864 xorcc %g7, %g4, %g5
9865 bne test_failed
9866 nop
9867
9868
9869 ! First check that the POR value is correct
9870 add %g2, 8, %g2
9871 ldx [%g2], %g4
9872 xorcc %g3, %g4, %g5
9873 bne test_failed
9874 nop
9875
9876 ! Next check that all the writable bits can be written
9877 stx %l2, [%g2] ! store inverted POR value
9878 ldx [%g2], %g4
9879 xorcc %g7, %g4, %g5
9880 bne test_failed
9881 nop
9882
9883
9884 ! First check that the POR value is correct
9885 add %g2, 8, %g2
9886 ldx [%g2], %g4
9887 xorcc %g3, %g4, %g5
9888 bne test_failed
9889 nop
9890
9891 ! Next check that all the writable bits can be written
9892 stx %l2, [%g2] ! store inverted POR value
9893 ldx [%g2], %g4
9894 xorcc %g7, %g4, %g5
9895 bne test_failed
9896 nop
9897
9898
9899 ! First check that the POR value is correct
9900 add %g2, 8, %g2
9901 ldx [%g2], %g4
9902 xorcc %g3, %g4, %g5
9903 bne test_failed
9904 nop
9905
9906 ! Next check that all the writable bits can be written
9907 stx %l2, [%g2] ! store inverted POR value
9908 ldx [%g2], %g4
9909 xorcc %g7, %g4, %g5
9910 bne test_failed
9911 nop
9912
9913
9914 ! First check that the POR value is correct
9915 add %g2, 8, %g2
9916 ldx [%g2], %g4
9917 xorcc %g3, %g4, %g5
9918 bne test_failed
9919 nop
9920
9921 ! Next check that all the writable bits can be written
9922 stx %l2, [%g2] ! store inverted POR value
9923 ldx [%g2], %g4
9924 xorcc %g7, %g4, %g5
9925 bne test_failed
9926 nop
9927
9928
9929 ! First check that the POR value is correct
9930 add %g2, 8, %g2
9931 ldx [%g2], %g4
9932 xorcc %g3, %g4, %g5
9933 bne test_failed
9934 nop
9935
9936 ! Next check that all the writable bits can be written
9937 stx %l2, [%g2] ! store inverted POR value
9938 ldx [%g2], %g4
9939 xorcc %g7, %g4, %g5
9940 bne test_failed
9941 nop
9942
9943
9944 ! First check that the POR value is correct
9945 add %g2, 8, %g2
9946 ldx [%g2], %g4
9947 xorcc %g3, %g4, %g5
9948 bne test_failed
9949 nop
9950
9951 ! Next check that all the writable bits can be written
9952 stx %l2, [%g2] ! store inverted POR value
9953 ldx [%g2], %g4
9954 xorcc %g7, %g4, %g5
9955 bne test_failed
9956 nop
9957
9958
9959 ! First check that the POR value is correct
9960 add %g2, 8, %g2
9961 ldx [%g2], %g4
9962 xorcc %g3, %g4, %g5
9963 bne test_failed
9964 nop
9965
9966 ! Next check that all the writable bits can be written
9967 stx %l2, [%g2] ! store inverted POR value
9968 ldx [%g2], %g4
9969 xorcc %g7, %g4, %g5
9970 bne test_failed
9971 nop
9972
9973
9974 ! First check that the POR value is correct
9975 add %g2, 8, %g2
9976 ldx [%g2], %g4
9977 xorcc %g3, %g4, %g5
9978 bne test_failed
9979 nop
9980
9981 ! Next check that all the writable bits can be written
9982 stx %l2, [%g2] ! store inverted POR value
9983 ldx [%g2], %g4
9984 xorcc %g7, %g4, %g5
9985 bne test_failed
9986 nop
9987
9988
9989 ! First check that the POR value is correct
9990 add %g2, 8, %g2
9991 ldx [%g2], %g4
9992 xorcc %g3, %g4, %g5
9993 bne test_failed
9994 nop
9995
9996 ! Next check that all the writable bits can be written
9997 stx %l2, [%g2] ! store inverted POR value
9998 ldx [%g2], %g4
9999 xorcc %g7, %g4, %g5
10000 bne test_failed
10001 nop
10002
10003
10004 ! First check that the POR value is correct
10005 add %g2, 8, %g2
10006 ldx [%g2], %g4
10007 xorcc %g3, %g4, %g5
10008 bne test_failed
10009 nop
10010
10011 ! Next check that all the writable bits can be written
10012 stx %l2, [%g2] ! store inverted POR value
10013 ldx [%g2], %g4
10014 xorcc %g7, %g4, %g5
10015 bne test_failed
10016 nop
10017
10018
10019 ! First check that the POR value is correct
10020 add %g2, 8, %g2
10021 ldx [%g2], %g4
10022 xorcc %g3, %g4, %g5
10023 bne test_failed
10024 nop
10025
10026 ! Next check that all the writable bits can be written
10027 stx %l2, [%g2] ! store inverted POR value
10028 ldx [%g2], %g4
10029 xorcc %g7, %g4, %g5
10030 bne test_failed
10031 nop
10032
10033
10034 ! First check that the POR value is correct
10035 add %g2, 8, %g2
10036 ldx [%g2], %g4
10037 xorcc %g3, %g4, %g5
10038 bne test_failed
10039 nop
10040
10041 ! Next check that all the writable bits can be written
10042 stx %l2, [%g2] ! store inverted POR value
10043 ldx [%g2], %g4
10044 xorcc %g7, %g4, %g5
10045 bne test_failed
10046 nop
10047
10048
10049 ! First check that the POR value is correct
10050 add %g2, 8, %g2
10051 ldx [%g2], %g4
10052 xorcc %g3, %g4, %g5
10053 bne test_failed
10054 nop
10055
10056 ! Next check that all the writable bits can be written
10057 stx %l2, [%g2] ! store inverted POR value
10058 ldx [%g2], %g4
10059 xorcc %g7, %g4, %g5
10060 bne test_failed
10061 nop
10062
10063
10064 ! First check that the POR value is correct
10065 add %g2, 8, %g2
10066 ldx [%g2], %g4
10067 xorcc %g3, %g4, %g5
10068 bne test_failed
10069 nop
10070
10071 ! Next check that all the writable bits can be written
10072 stx %l2, [%g2] ! store inverted POR value
10073 ldx [%g2], %g4
10074 xorcc %g7, %g4, %g5
10075 bne test_failed
10076 nop
10077
10078
10079 ! First check that the POR value is correct
10080 add %g2, 8, %g2
10081 ldx [%g2], %g4
10082 xorcc %g3, %g4, %g5
10083 bne test_failed
10084 nop
10085
10086 ! Next check that all the writable bits can be written
10087 stx %l2, [%g2] ! store inverted POR value
10088 ldx [%g2], %g4
10089 xorcc %g7, %g4, %g5
10090 bne test_failed
10091 nop
10092
10093
10094 ! First check that the POR value is correct
10095 add %g2, 8, %g2
10096 ldx [%g2], %g4
10097 xorcc %g3, %g4, %g5
10098 bne test_failed
10099 nop
10100
10101 ! Next check that all the writable bits can be written
10102 stx %l2, [%g2] ! store inverted POR value
10103 ldx [%g2], %g4
10104 xorcc %g7, %g4, %g5
10105 bne test_failed
10106 nop
10107
10108
10109 ! First check that the POR value is correct
10110 add %g2, 8, %g2
10111 ldx [%g2], %g4
10112 xorcc %g3, %g4, %g5
10113 bne test_failed
10114 nop
10115
10116 ! Next check that all the writable bits can be written
10117 stx %l2, [%g2] ! store inverted POR value
10118 ldx [%g2], %g4
10119 xorcc %g7, %g4, %g5
10120 bne test_failed
10121 nop
10122
10123
10124 ! First check that the POR value is correct
10125 add %g2, 8, %g2
10126 ldx [%g2], %g4
10127 xorcc %g3, %g4, %g5
10128 bne test_failed
10129 nop
10130
10131 ! Next check that all the writable bits can be written
10132 stx %l2, [%g2] ! store inverted POR value
10133 ldx [%g2], %g4
10134 xorcc %g7, %g4, %g5
10135 bne test_failed
10136 nop
10137
10138
10139 ! First check that the POR value is correct
10140 add %g2, 8, %g2
10141 ldx [%g2], %g4
10142 xorcc %g3, %g4, %g5
10143 bne test_failed
10144 nop
10145
10146 ! Next check that all the writable bits can be written
10147 stx %l2, [%g2] ! store inverted POR value
10148 ldx [%g2], %g4
10149 xorcc %g7, %g4, %g5
10150 bne test_failed
10151 nop
10152
10153
10154 ! First check that the POR value is correct
10155 add %g2, 8, %g2
10156 ldx [%g2], %g4
10157 xorcc %g3, %g4, %g5
10158 bne test_failed
10159 nop
10160
10161 ! Next check that all the writable bits can be written
10162 stx %l2, [%g2] ! store inverted POR value
10163 ldx [%g2], %g4
10164 xorcc %g7, %g4, %g5
10165 bne test_failed
10166 nop
10167
10168
10169 ! First check that the POR value is correct
10170 add %g2, 8, %g2
10171 ldx [%g2], %g4
10172 xorcc %g3, %g4, %g5
10173 bne test_failed
10174 nop
10175
10176 ! Next check that all the writable bits can be written
10177 stx %l2, [%g2] ! store inverted POR value
10178 ldx [%g2], %g4
10179 xorcc %g7, %g4, %g5
10180 bne test_failed
10181 nop
10182
10183
10184 ! First check that the POR value is correct
10185 add %g2, 8, %g2
10186 ldx [%g2], %g4
10187 xorcc %g3, %g4, %g5
10188 bne test_failed
10189 nop
10190
10191 ! Next check that all the writable bits can be written
10192 stx %l2, [%g2] ! store inverted POR value
10193 ldx [%g2], %g4
10194 xorcc %g7, %g4, %g5
10195 bne test_failed
10196 nop
10197
10198
10199 ! First check that the POR value is correct
10200 add %g2, 8, %g2
10201 ldx [%g2], %g4
10202 xorcc %g3, %g4, %g5
10203 bne test_failed
10204 nop
10205
10206 ! Next check that all the writable bits can be written
10207 stx %l2, [%g2] ! store inverted POR value
10208 ldx [%g2], %g4
10209 xorcc %g7, %g4, %g5
10210 bne test_failed
10211 nop
10212
10213
10214 ! First check that the POR value is correct
10215 add %g2, 8, %g2
10216 ldx [%g2], %g4
10217 xorcc %g3, %g4, %g5
10218 bne test_failed
10219 nop
10220
10221 ! Next check that all the writable bits can be written
10222 stx %l2, [%g2] ! store inverted POR value
10223 ldx [%g2], %g4
10224 xorcc %g7, %g4, %g5
10225 bne test_failed
10226 nop
10227
10228
10229 ! First check that the POR value is correct
10230 add %g2, 8, %g2
10231 ldx [%g2], %g4
10232 xorcc %g3, %g4, %g5
10233 bne test_failed
10234 nop
10235
10236 ! Next check that all the writable bits can be written
10237 stx %l2, [%g2] ! store inverted POR value
10238 ldx [%g2], %g4
10239 xorcc %g7, %g4, %g5
10240 bne test_failed
10241 nop
10242
10243
10244 ! First check that the POR value is correct
10245 add %g2, 8, %g2
10246 ldx [%g2], %g4
10247 xorcc %g3, %g4, %g5
10248 bne test_failed
10249 nop
10250
10251 ! Next check that all the writable bits can be written
10252 stx %l2, [%g2] ! store inverted POR value
10253 ldx [%g2], %g4
10254 xorcc %g7, %g4, %g5
10255 bne test_failed
10256 nop
10257
10258
10259 ! First check that the POR value is correct
10260 add %g2, 8, %g2
10261 ldx [%g2], %g4
10262 xorcc %g3, %g4, %g5
10263 bne test_failed
10264 nop
10265
10266 ! Next check that all the writable bits can be written
10267 stx %l2, [%g2] ! store inverted POR value
10268 ldx [%g2], %g4
10269 xorcc %g7, %g4, %g5
10270 bne test_failed
10271 nop
10272
10273
10274 ! First check that the POR value is correct
10275 add %g2, 8, %g2
10276 ldx [%g2], %g4
10277 xorcc %g3, %g4, %g5
10278 bne test_failed
10279 nop
10280
10281 ! Next check that all the writable bits can be written
10282 stx %l2, [%g2] ! store inverted POR value
10283 ldx [%g2], %g4
10284 xorcc %g7, %g4, %g5
10285 bne test_failed
10286 nop
10287
10288
10289 ! First check that the POR value is correct
10290 add %g2, 8, %g2
10291 ldx [%g2], %g4
10292 xorcc %g3, %g4, %g5
10293 bne test_failed
10294 nop
10295
10296 ! Next check that all the writable bits can be written
10297 stx %l2, [%g2] ! store inverted POR value
10298 ldx [%g2], %g4
10299 xorcc %g7, %g4, %g5
10300 bne test_failed
10301 nop
10302
10303
10304 ! First check that the POR value is correct
10305 add %g2, 8, %g2
10306 ldx [%g2], %g4
10307 xorcc %g3, %g4, %g5
10308 bne test_failed
10309 nop
10310
10311 ! Next check that all the writable bits can be written
10312 stx %l2, [%g2] ! store inverted POR value
10313 ldx [%g2], %g4
10314 xorcc %g7, %g4, %g5
10315 bne test_failed
10316 nop
10317
10318
10319 ! First check that the POR value is correct
10320 add %g2, 8, %g2
10321 ldx [%g2], %g4
10322 xorcc %g3, %g4, %g5
10323 bne test_failed
10324 nop
10325
10326 ! Next check that all the writable bits can be written
10327 stx %l2, [%g2] ! store inverted POR value
10328 ldx [%g2], %g4
10329 xorcc %g7, %g4, %g5
10330 bne test_failed
10331 nop
10332
10333
10334 ! First check that the POR value is correct
10335 add %g2, 8, %g2
10336 ldx [%g2], %g4
10337 xorcc %g3, %g4, %g5
10338 bne test_failed
10339 nop
10340
10341 ! Next check that all the writable bits can be written
10342 stx %l2, [%g2] ! store inverted POR value
10343 ldx [%g2], %g4
10344 xorcc %g7, %g4, %g5
10345 bne test_failed
10346 nop
10347
10348
10349 ! First check that the POR value is correct
10350 add %g2, 8, %g2
10351 ldx [%g2], %g4
10352 xorcc %g3, %g4, %g5
10353 bne test_failed
10354 nop
10355
10356 ! Next check that all the writable bits can be written
10357 stx %l2, [%g2] ! store inverted POR value
10358 ldx [%g2], %g4
10359 xorcc %g7, %g4, %g5
10360 bne test_failed
10361 nop
10362
10363
10364 ! First check that the POR value is correct
10365 add %g2, 8, %g2
10366 ldx [%g2], %g4
10367 xorcc %g3, %g4, %g5
10368 bne test_failed
10369 nop
10370
10371 ! Next check that all the writable bits can be written
10372 stx %l2, [%g2] ! store inverted POR value
10373 ldx [%g2], %g4
10374 xorcc %g7, %g4, %g5
10375 bne test_failed
10376 nop
10377
10378
10379 ! First check that the POR value is correct
10380 add %g2, 8, %g2
10381 ldx [%g2], %g4
10382 xorcc %g3, %g4, %g5
10383 bne test_failed
10384 nop
10385
10386 ! Next check that all the writable bits can be written
10387 stx %l2, [%g2] ! store inverted POR value
10388 ldx [%g2], %g4
10389 xorcc %g7, %g4, %g5
10390 bne test_failed
10391 nop
10392
10393
10394 ! First check that the POR value is correct
10395 add %g2, 8, %g2
10396 ldx [%g2], %g4
10397 xorcc %g3, %g4, %g5
10398 bne test_failed
10399 nop
10400
10401 ! Next check that all the writable bits can be written
10402 stx %l2, [%g2] ! store inverted POR value
10403 ldx [%g2], %g4
10404 xorcc %g7, %g4, %g5
10405 bne test_failed
10406 nop
10407
10408
10409 ! First check that the POR value is correct
10410 add %g2, 8, %g2
10411 ldx [%g2], %g4
10412 xorcc %g3, %g4, %g5
10413 bne test_failed
10414 nop
10415
10416 ! Next check that all the writable bits can be written
10417 stx %l2, [%g2] ! store inverted POR value
10418 ldx [%g2], %g4
10419 xorcc %g7, %g4, %g5
10420 bne test_failed
10421 nop
10422
10423
10424 ! First check that the POR value is correct
10425 add %g2, 8, %g2
10426 ldx [%g2], %g4
10427 xorcc %g3, %g4, %g5
10428 bne test_failed
10429 nop
10430
10431 ! Next check that all the writable bits can be written
10432 stx %l2, [%g2] ! store inverted POR value
10433 ldx [%g2], %g4
10434 xorcc %g7, %g4, %g5
10435 bne test_failed
10436 nop
10437
10438
10439 ! First check that the POR value is correct
10440 add %g2, 8, %g2
10441 ldx [%g2], %g4
10442 xorcc %g3, %g4, %g5
10443 bne test_failed
10444 nop
10445
10446 ! Next check that all the writable bits can be written
10447 stx %l2, [%g2] ! store inverted POR value
10448 ldx [%g2], %g4
10449 xorcc %g7, %g4, %g5
10450 bne test_failed
10451 nop
10452
10453
10454 ! First check that the POR value is correct
10455 add %g2, 8, %g2
10456 ldx [%g2], %g4
10457 xorcc %g3, %g4, %g5
10458 bne test_failed
10459 nop
10460
10461 ! Next check that all the writable bits can be written
10462 stx %l2, [%g2] ! store inverted POR value
10463 ldx [%g2], %g4
10464 xorcc %g7, %g4, %g5
10465 bne test_failed
10466 nop
10467
10468
10469 ! First check that the POR value is correct
10470 add %g2, 8, %g2
10471 ldx [%g2], %g4
10472 xorcc %g3, %g4, %g5
10473 bne test_failed
10474 nop
10475
10476 ! Next check that all the writable bits can be written
10477 stx %l2, [%g2] ! store inverted POR value
10478 ldx [%g2], %g4
10479 xorcc %g7, %g4, %g5
10480 bne test_failed
10481 nop
10482
10483
10484 ! First check that the POR value is correct
10485 add %g2, 8, %g2
10486 ldx [%g2], %g4
10487 xorcc %g3, %g4, %g5
10488 bne test_failed
10489 nop
10490
10491 ! Next check that all the writable bits can be written
10492 stx %l2, [%g2] ! store inverted POR value
10493 ldx [%g2], %g4
10494 xorcc %g7, %g4, %g5
10495 bne test_failed
10496 nop
10497
10498
10499 ! First check that the POR value is correct
10500 add %g2, 8, %g2
10501 ldx [%g2], %g4
10502 xorcc %g3, %g4, %g5
10503 bne test_failed
10504 nop
10505
10506 ! Next check that all the writable bits can be written
10507 stx %l2, [%g2] ! store inverted POR value
10508 ldx [%g2], %g4
10509 xorcc %g7, %g4, %g5
10510 bne test_failed
10511 nop
10512
10513
10514 ! First check that the POR value is correct
10515 add %g2, 8, %g2
10516 ldx [%g2], %g4
10517 xorcc %g3, %g4, %g5
10518 bne test_failed
10519 nop
10520
10521 ! Next check that all the writable bits can be written
10522 stx %l2, [%g2] ! store inverted POR value
10523 ldx [%g2], %g4
10524 xorcc %g7, %g4, %g5
10525 bne test_failed
10526 nop
10527
10528
10529 ! First check that the POR value is correct
10530 add %g2, 8, %g2
10531 ldx [%g2], %g4
10532 xorcc %g3, %g4, %g5
10533 bne test_failed
10534 nop
10535
10536 ! Next check that all the writable bits can be written
10537 stx %l2, [%g2] ! store inverted POR value
10538 ldx [%g2], %g4
10539 xorcc %g7, %g4, %g5
10540 bne test_failed
10541 nop
10542
10543
10544 ! First check that the POR value is correct
10545 add %g2, 8, %g2
10546 ldx [%g2], %g4
10547 xorcc %g3, %g4, %g5
10548 bne test_failed
10549 nop
10550
10551 ! Next check that all the writable bits can be written
10552 stx %l2, [%g2] ! store inverted POR value
10553 ldx [%g2], %g4
10554 xorcc %g7, %g4, %g5
10555 bne test_failed
10556 nop
10557
10558
10559 ! First check that the POR value is correct
10560 add %g2, 8, %g2
10561 ldx [%g2], %g4
10562 xorcc %g3, %g4, %g5
10563 bne test_failed
10564 nop
10565
10566 ! Next check that all the writable bits can be written
10567 stx %l2, [%g2] ! store inverted POR value
10568 ldx [%g2], %g4
10569 xorcc %g7, %g4, %g5
10570 bne test_failed
10571 nop
10572
10573
10574 ! First check that the POR value is correct
10575 add %g2, 8, %g2
10576 ldx [%g2], %g4
10577 xorcc %g3, %g4, %g5
10578 bne test_failed
10579 nop
10580
10581 ! Next check that all the writable bits can be written
10582 stx %l2, [%g2] ! store inverted POR value
10583 ldx [%g2], %g4
10584 xorcc %g7, %g4, %g5
10585 bne test_failed
10586 nop
10587
10588
10589 ! First check that the POR value is correct
10590 add %g2, 8, %g2
10591 ldx [%g2], %g4
10592 xorcc %g3, %g4, %g5
10593 bne test_failed
10594 nop
10595
10596 ! Next check that all the writable bits can be written
10597 stx %l2, [%g2] ! store inverted POR value
10598 ldx [%g2], %g4
10599 xorcc %g7, %g4, %g5
10600 bne test_failed
10601 nop
10602
10603
10604 ! First check that the POR value is correct
10605 add %g2, 8, %g2
10606 ldx [%g2], %g4
10607 xorcc %g3, %g4, %g5
10608 bne test_failed
10609 nop
10610
10611 ! Next check that all the writable bits can be written
10612 stx %l2, [%g2] ! store inverted POR value
10613 ldx [%g2], %g4
10614 xorcc %g7, %g4, %g5
10615 bne test_failed
10616 nop
10617
10618
10619 ! First check that the POR value is correct
10620 add %g2, 8, %g2
10621 ldx [%g2], %g4
10622 xorcc %g3, %g4, %g5
10623 bne test_failed
10624 nop
10625
10626 ! Next check that all the writable bits can be written
10627 stx %l2, [%g2] ! store inverted POR value
10628 ldx [%g2], %g4
10629 xorcc %g7, %g4, %g5
10630 bne test_failed
10631 nop
10632
10633
10634 ! First check that the POR value is correct
10635 add %g2, 8, %g2
10636 ldx [%g2], %g4
10637 xorcc %g3, %g4, %g5
10638 bne test_failed
10639 nop
10640
10641 ! Next check that all the writable bits can be written
10642 stx %l2, [%g2] ! store inverted POR value
10643 ldx [%g2], %g4
10644 xorcc %g7, %g4, %g5
10645 bne test_failed
10646 nop
10647
10648
10649 ! First check that the POR value is correct
10650 add %g2, 8, %g2
10651 ldx [%g2], %g4
10652 xorcc %g3, %g4, %g5
10653 bne test_failed
10654 nop
10655
10656 ! Next check that all the writable bits can be written
10657 stx %l2, [%g2] ! store inverted POR value
10658 ldx [%g2], %g4
10659 xorcc %g7, %g4, %g5
10660 bne test_failed
10661 nop
10662
10663
10664 ! First check that the POR value is correct
10665 add %g2, 8, %g2
10666 ldx [%g2], %g4
10667 xorcc %g3, %g4, %g5
10668 bne test_failed
10669 nop
10670
10671 ! Next check that all the writable bits can be written
10672 stx %l2, [%g2] ! store inverted POR value
10673 ldx [%g2], %g4
10674 xorcc %g7, %g4, %g5
10675 bne test_failed
10676 nop
10677
10678
10679 ! First check that the POR value is correct
10680 add %g2, 8, %g2
10681 ldx [%g2], %g4
10682 xorcc %g3, %g4, %g5
10683 bne test_failed
10684 nop
10685
10686 ! Next check that all the writable bits can be written
10687 stx %l2, [%g2] ! store inverted POR value
10688 ldx [%g2], %g4
10689 xorcc %g7, %g4, %g5
10690 bne test_failed
10691 nop
10692
10693
10694 ! First check that the POR value is correct
10695 add %g2, 8, %g2
10696 ldx [%g2], %g4
10697 xorcc %g3, %g4, %g5
10698 bne test_failed
10699 nop
10700
10701 ! Next check that all the writable bits can be written
10702 stx %l2, [%g2] ! store inverted POR value
10703 ldx [%g2], %g4
10704 xorcc %g7, %g4, %g5
10705 bne test_failed
10706 nop
10707
10708
10709 ! First check that the POR value is correct
10710 add %g2, 8, %g2
10711 ldx [%g2], %g4
10712 xorcc %g3, %g4, %g5
10713 bne test_failed
10714 nop
10715
10716 ! Next check that all the writable bits can be written
10717 stx %l2, [%g2] ! store inverted POR value
10718 ldx [%g2], %g4
10719 xorcc %g7, %g4, %g5
10720 bne test_failed
10721 nop
10722
10723
10724 ! First check that the POR value is correct
10725 add %g2, 8, %g2
10726 ldx [%g2], %g4
10727 xorcc %g3, %g4, %g5
10728 bne test_failed
10729 nop
10730
10731 ! Next check that all the writable bits can be written
10732 stx %l2, [%g2] ! store inverted POR value
10733 ldx [%g2], %g4
10734 xorcc %g7, %g4, %g5
10735 bne test_failed
10736 nop
10737
10738
10739 ! First check that the POR value is correct
10740 add %g2, 8, %g2
10741 ldx [%g2], %g4
10742 xorcc %g3, %g4, %g5
10743 bne test_failed
10744 nop
10745
10746 ! Next check that all the writable bits can be written
10747 stx %l2, [%g2] ! store inverted POR value
10748 ldx [%g2], %g4
10749 xorcc %g7, %g4, %g5
10750 bne test_failed
10751 nop
10752
10753
10754 ! First check that the POR value is correct
10755 add %g2, 8, %g2
10756 ldx [%g2], %g4
10757 xorcc %g3, %g4, %g5
10758 bne test_failed
10759 nop
10760
10761 ! Next check that all the writable bits can be written
10762 stx %l2, [%g2] ! store inverted POR value
10763 ldx [%g2], %g4
10764 xorcc %g7, %g4, %g5
10765 bne test_failed
10766 nop
10767
10768
10769 ! First check that the POR value is correct
10770 add %g2, 8, %g2
10771 ldx [%g2], %g4
10772 xorcc %g3, %g4, %g5
10773 bne test_failed
10774 nop
10775
10776 ! Next check that all the writable bits can be written
10777 stx %l2, [%g2] ! store inverted POR value
10778 ldx [%g2], %g4
10779 xorcc %g7, %g4, %g5
10780 bne test_failed
10781 nop
10782
10783
10784 ! First check that the POR value is correct
10785 add %g2, 8, %g2
10786 ldx [%g2], %g4
10787 xorcc %g3, %g4, %g5
10788 bne test_failed
10789 nop
10790
10791 ! Next check that all the writable bits can be written
10792 stx %l2, [%g2] ! store inverted POR value
10793 ldx [%g2], %g4
10794 xorcc %g7, %g4, %g5
10795 bne test_failed
10796 nop
10797
10798
10799 ! First check that the POR value is correct
10800 add %g2, 8, %g2
10801 ldx [%g2], %g4
10802 xorcc %g3, %g4, %g5
10803 bne test_failed
10804 nop
10805
10806 ! Next check that all the writable bits can be written
10807 stx %l2, [%g2] ! store inverted POR value
10808 ldx [%g2], %g4
10809 xorcc %g7, %g4, %g5
10810 bne test_failed
10811 nop
10812
10813
10814 ! First check that the POR value is correct
10815 add %g2, 8, %g2
10816 ldx [%g2], %g4
10817 xorcc %g3, %g4, %g5
10818 bne test_failed
10819 nop
10820
10821 ! Next check that all the writable bits can be written
10822 stx %l2, [%g2] ! store inverted POR value
10823 ldx [%g2], %g4
10824 xorcc %g7, %g4, %g5
10825 bne test_failed
10826 nop
10827
10828
10829 ! First check that the POR value is correct
10830 add %g2, 8, %g2
10831 ldx [%g2], %g4
10832 xorcc %g3, %g4, %g5
10833 bne test_failed
10834 nop
10835
10836 ! Next check that all the writable bits can be written
10837 stx %l2, [%g2] ! store inverted POR value
10838 ldx [%g2], %g4
10839 xorcc %g7, %g4, %g5
10840 bne test_failed
10841 nop
10842
10843
10844 ! First check that the POR value is correct
10845 add %g2, 8, %g2
10846 ldx [%g2], %g4
10847 xorcc %g3, %g4, %g5
10848 bne test_failed
10849 nop
10850
10851 ! Next check that all the writable bits can be written
10852 stx %l2, [%g2] ! store inverted POR value
10853 ldx [%g2], %g4
10854 xorcc %g7, %g4, %g5
10855 bne test_failed
10856 nop
10857
10858
10859 ! First check that the POR value is correct
10860 add %g2, 8, %g2
10861 ldx [%g2], %g4
10862 xorcc %g3, %g4, %g5
10863 bne test_failed
10864 nop
10865
10866 ! Next check that all the writable bits can be written
10867 stx %l2, [%g2] ! store inverted POR value
10868 ldx [%g2], %g4
10869 xorcc %g7, %g4, %g5
10870 bne test_failed
10871 nop
10872
10873
10874 ! First check that the POR value is correct
10875 add %g2, 8, %g2
10876 ldx [%g2], %g4
10877 xorcc %g3, %g4, %g5
10878 bne test_failed
10879 nop
10880
10881 ! Next check that all the writable bits can be written
10882 stx %l2, [%g2] ! store inverted POR value
10883 ldx [%g2], %g4
10884 xorcc %g7, %g4, %g5
10885 bne test_failed
10886 nop
10887
10888
10889 ! First check that the POR value is correct
10890 add %g2, 8, %g2
10891 ldx [%g2], %g4
10892 xorcc %g3, %g4, %g5
10893 bne test_failed
10894 nop
10895
10896 ! Next check that all the writable bits can be written
10897 stx %l2, [%g2] ! store inverted POR value
10898 ldx [%g2], %g4
10899 xorcc %g7, %g4, %g5
10900 bne test_failed
10901 nop
10902
10903
10904 ! First check that the POR value is correct
10905 add %g2, 8, %g2
10906 ldx [%g2], %g4
10907 xorcc %g3, %g4, %g5
10908 bne test_failed
10909 nop
10910
10911 ! Next check that all the writable bits can be written
10912 stx %l2, [%g2] ! store inverted POR value
10913 ldx [%g2], %g4
10914 xorcc %g7, %g4, %g5
10915 bne test_failed
10916 nop
10917
10918
10919 ! First check that the POR value is correct
10920 add %g2, 8, %g2
10921 ldx [%g2], %g4
10922 xorcc %g3, %g4, %g5
10923 bne test_failed
10924 nop
10925
10926 ! Next check that all the writable bits can be written
10927 stx %l2, [%g2] ! store inverted POR value
10928 ldx [%g2], %g4
10929 xorcc %g7, %g4, %g5
10930 bne test_failed
10931 nop
10932
10933
10934 ! First check that the POR value is correct
10935 add %g2, 8, %g2
10936 ldx [%g2], %g4
10937 xorcc %g3, %g4, %g5
10938 bne test_failed
10939 nop
10940
10941 ! Next check that all the writable bits can be written
10942 stx %l2, [%g2] ! store inverted POR value
10943 ldx [%g2], %g4
10944 xorcc %g7, %g4, %g5
10945 bne test_failed
10946 nop
10947
10948
10949 ! First check that the POR value is correct
10950 add %g2, 8, %g2
10951 ldx [%g2], %g4
10952 xorcc %g3, %g4, %g5
10953 bne test_failed
10954 nop
10955
10956 ! Next check that all the writable bits can be written
10957 stx %l2, [%g2] ! store inverted POR value
10958 ldx [%g2], %g4
10959 xorcc %g7, %g4, %g5
10960 bne test_failed
10961 nop
10962
10963
10964 ! First check that the POR value is correct
10965 add %g2, 8, %g2
10966 ldx [%g2], %g4
10967 xorcc %g3, %g4, %g5
10968 bne test_failed
10969 nop
10970
10971 ! Next check that all the writable bits can be written
10972 stx %l2, [%g2] ! store inverted POR value
10973 ldx [%g2], %g4
10974 xorcc %g7, %g4, %g5
10975 bne test_failed
10976 nop
10977
10978
10979 ! First check that the POR value is correct
10980 add %g2, 8, %g2
10981 ldx [%g2], %g4
10982 xorcc %g3, %g4, %g5
10983 bne test_failed
10984 nop
10985
10986 ! Next check that all the writable bits can be written
10987 stx %l2, [%g2] ! store inverted POR value
10988 ldx [%g2], %g4
10989 xorcc %g7, %g4, %g5
10990 bne test_failed
10991 nop
10992
10993
10994 ! First check that the POR value is correct
10995 add %g2, 8, %g2
10996 ldx [%g2], %g4
10997 xorcc %g3, %g4, %g5
10998 bne test_failed
10999 nop
11000
11001 ! Next check that all the writable bits can be written
11002 stx %l2, [%g2] ! store inverted POR value
11003 ldx [%g2], %g4
11004 xorcc %g7, %g4, %g5
11005 bne test_failed
11006 nop
11007
11008
11009 ! First check that the POR value is correct
11010 add %g2, 8, %g2
11011 ldx [%g2], %g4
11012 xorcc %g3, %g4, %g5
11013 bne test_failed
11014 nop
11015
11016 ! Next check that all the writable bits can be written
11017 stx %l2, [%g2] ! store inverted POR value
11018 ldx [%g2], %g4
11019 xorcc %g7, %g4, %g5
11020 bne test_failed
11021 nop
11022
11023
11024 ! First check that the POR value is correct
11025 add %g2, 8, %g2
11026 ldx [%g2], %g4
11027 xorcc %g3, %g4, %g5
11028 bne test_failed
11029 nop
11030
11031 ! Next check that all the writable bits can be written
11032 stx %l2, [%g2] ! store inverted POR value
11033 ldx [%g2], %g4
11034 xorcc %g7, %g4, %g5
11035 bne test_failed
11036 nop
11037
11038
11039 ! First check that the POR value is correct
11040 add %g2, 8, %g2
11041 ldx [%g2], %g4
11042 xorcc %g3, %g4, %g5
11043 bne test_failed
11044 nop
11045
11046 ! Next check that all the writable bits can be written
11047 stx %l2, [%g2] ! store inverted POR value
11048 ldx [%g2], %g4
11049 xorcc %g7, %g4, %g5
11050 bne test_failed
11051 nop
11052
11053
11054 ! First check that the POR value is correct
11055 add %g2, 8, %g2
11056 ldx [%g2], %g4
11057 xorcc %g3, %g4, %g5
11058 bne test_failed
11059 nop
11060
11061 ! Next check that all the writable bits can be written
11062 stx %l2, [%g2] ! store inverted POR value
11063 ldx [%g2], %g4
11064 xorcc %g7, %g4, %g5
11065 bne test_failed
11066 nop
11067
11068
11069 ! First check that the POR value is correct
11070 add %g2, 8, %g2
11071 ldx [%g2], %g4
11072 xorcc %g3, %g4, %g5
11073 bne test_failed
11074 nop
11075
11076 ! Next check that all the writable bits can be written
11077 stx %l2, [%g2] ! store inverted POR value
11078 ldx [%g2], %g4
11079 xorcc %g7, %g4, %g5
11080 bne test_failed
11081 nop
11082
11083
11084 ! First check that the POR value is correct
11085 add %g2, 8, %g2
11086 ldx [%g2], %g4
11087 xorcc %g3, %g4, %g5
11088 bne test_failed
11089 nop
11090
11091 ! Next check that all the writable bits can be written
11092 stx %l2, [%g2] ! store inverted POR value
11093 ldx [%g2], %g4
11094 xorcc %g7, %g4, %g5
11095 bne test_failed
11096 nop
11097
11098
11099 ! First check that the POR value is correct
11100 add %g2, 8, %g2
11101 ldx [%g2], %g4
11102 xorcc %g3, %g4, %g5
11103 bne test_failed
11104 nop
11105
11106 ! Next check that all the writable bits can be written
11107 stx %l2, [%g2] ! store inverted POR value
11108 ldx [%g2], %g4
11109 xorcc %g7, %g4, %g5
11110 bne test_failed
11111 nop
11112
11113
11114 ! First check that the POR value is correct
11115 add %g2, 8, %g2
11116 ldx [%g2], %g4
11117 xorcc %g3, %g4, %g5
11118 bne test_failed
11119 nop
11120
11121 ! Next check that all the writable bits can be written
11122 stx %l2, [%g2] ! store inverted POR value
11123 ldx [%g2], %g4
11124 xorcc %g7, %g4, %g5
11125 bne test_failed
11126 nop
11127
11128
11129 ! First check that the POR value is correct
11130 add %g2, 8, %g2
11131 ldx [%g2], %g4
11132 xorcc %g3, %g4, %g5
11133 bne test_failed
11134 nop
11135
11136 ! Next check that all the writable bits can be written
11137 stx %l2, [%g2] ! store inverted POR value
11138 ldx [%g2], %g4
11139 xorcc %g7, %g4, %g5
11140 bne test_failed
11141 nop
11142
11143
11144 ! First check that the POR value is correct
11145 add %g2, 8, %g2
11146 ldx [%g2], %g4
11147 xorcc %g3, %g4, %g5
11148 bne test_failed
11149 nop
11150
11151 ! Next check that all the writable bits can be written
11152 stx %l2, [%g2] ! store inverted POR value
11153 ldx [%g2], %g4
11154 xorcc %g7, %g4, %g5
11155 bne test_failed
11156 nop
11157
11158
11159 ! First check that the POR value is correct
11160 add %g2, 8, %g2
11161 ldx [%g2], %g4
11162 xorcc %g3, %g4, %g5
11163 bne test_failed
11164 nop
11165
11166 ! Next check that all the writable bits can be written
11167 stx %l2, [%g2] ! store inverted POR value
11168 ldx [%g2], %g4
11169 xorcc %g7, %g4, %g5
11170 bne test_failed
11171 nop
11172
11173
11174 ! First check that the POR value is correct
11175 add %g2, 8, %g2
11176 ldx [%g2], %g4
11177 xorcc %g3, %g4, %g5
11178 bne test_failed
11179 nop
11180
11181 ! Next check that all the writable bits can be written
11182 stx %l2, [%g2] ! store inverted POR value
11183 ldx [%g2], %g4
11184 xorcc %g7, %g4, %g5
11185 bne test_failed
11186 nop
11187
11188
11189 ! First check that the POR value is correct
11190 add %g2, 8, %g2
11191 ldx [%g2], %g4
11192 xorcc %g3, %g4, %g5
11193 bne test_failed
11194 nop
11195
11196 ! Next check that all the writable bits can be written
11197 stx %l2, [%g2] ! store inverted POR value
11198 ldx [%g2], %g4
11199 xorcc %g7, %g4, %g5
11200 bne test_failed
11201 nop
11202
11203
11204 ! First check that the POR value is correct
11205 add %g2, 8, %g2
11206 ldx [%g2], %g4
11207 xorcc %g3, %g4, %g5
11208 bne test_failed
11209 nop
11210
11211 ! Next check that all the writable bits can be written
11212 stx %l2, [%g2] ! store inverted POR value
11213 ldx [%g2], %g4
11214 xorcc %g7, %g4, %g5
11215 bne test_failed
11216 nop
11217
11218
11219 ! First check that the POR value is correct
11220 add %g2, 8, %g2
11221 ldx [%g2], %g4
11222 xorcc %g3, %g4, %g5
11223 bne test_failed
11224 nop
11225
11226 ! Next check that all the writable bits can be written
11227 stx %l2, [%g2] ! store inverted POR value
11228 ldx [%g2], %g4
11229 xorcc %g7, %g4, %g5
11230 bne test_failed
11231 nop
11232
11233
11234 ! First check that the POR value is correct
11235 add %g2, 8, %g2
11236 ldx [%g2], %g4
11237 xorcc %g3, %g4, %g5
11238 bne test_failed
11239 nop
11240
11241 ! Next check that all the writable bits can be written
11242 stx %l2, [%g2] ! store inverted POR value
11243 ldx [%g2], %g4
11244 xorcc %g7, %g4, %g5
11245 bne test_failed
11246 nop
11247
11248
11249 ! First check that the POR value is correct
11250 add %g2, 8, %g2
11251 ldx [%g2], %g4
11252 xorcc %g3, %g4, %g5
11253 bne test_failed
11254 nop
11255
11256 ! Next check that all the writable bits can be written
11257 stx %l2, [%g2] ! store inverted POR value
11258 ldx [%g2], %g4
11259 xorcc %g7, %g4, %g5
11260 bne test_failed
11261 nop
11262
11263
11264 ! First check that the POR value is correct
11265 add %g2, 8, %g2
11266 ldx [%g2], %g4
11267 xorcc %g3, %g4, %g5
11268 bne test_failed
11269 nop
11270
11271 ! Next check that all the writable bits can be written
11272 stx %l2, [%g2] ! store inverted POR value
11273 ldx [%g2], %g4
11274 xorcc %g7, %g4, %g5
11275 bne test_failed
11276 nop
11277
11278
11279 ! First check that the POR value is correct
11280 add %g2, 8, %g2
11281 ldx [%g2], %g4
11282 xorcc %g3, %g4, %g5
11283 bne test_failed
11284 nop
11285
11286 ! Next check that all the writable bits can be written
11287 stx %l2, [%g2] ! store inverted POR value
11288 ldx [%g2], %g4
11289 xorcc %g7, %g4, %g5
11290 bne test_failed
11291 nop
11292
11293
11294 ! First check that the POR value is correct
11295 add %g2, 8, %g2
11296 ldx [%g2], %g4
11297 xorcc %g3, %g4, %g5
11298 bne test_failed
11299 nop
11300
11301 ! Next check that all the writable bits can be written
11302 stx %l2, [%g2] ! store inverted POR value
11303 ldx [%g2], %g4
11304 xorcc %g7, %g4, %g5
11305 bne test_failed
11306 nop
11307
11308
11309 ! First check that the POR value is correct
11310 add %g2, 8, %g2
11311 ldx [%g2], %g4
11312 xorcc %g3, %g4, %g5
11313 bne test_failed
11314 nop
11315
11316 ! Next check that all the writable bits can be written
11317 stx %l2, [%g2] ! store inverted POR value
11318 ldx [%g2], %g4
11319 xorcc %g7, %g4, %g5
11320 bne test_failed
11321 nop
11322
11323
11324 ! First check that the POR value is correct
11325 add %g2, 8, %g2
11326 ldx [%g2], %g4
11327 xorcc %g3, %g4, %g5
11328 bne test_failed
11329 nop
11330
11331 ! Next check that all the writable bits can be written
11332 stx %l2, [%g2] ! store inverted POR value
11333 ldx [%g2], %g4
11334 xorcc %g7, %g4, %g5
11335 bne test_failed
11336 nop
11337
11338
11339 ! First check that the POR value is correct
11340 add %g2, 8, %g2
11341 ldx [%g2], %g4
11342 xorcc %g3, %g4, %g5
11343 bne test_failed
11344 nop
11345
11346 ! Next check that all the writable bits can be written
11347 stx %l2, [%g2] ! store inverted POR value
11348 ldx [%g2], %g4
11349 xorcc %g7, %g4, %g5
11350 bne test_failed
11351 nop
11352
11353
11354 ! First check that the POR value is correct
11355 add %g2, 8, %g2
11356 ldx [%g2], %g4
11357 xorcc %g3, %g4, %g5
11358 bne test_failed
11359 nop
11360
11361 ! Next check that all the writable bits can be written
11362 stx %l2, [%g2] ! store inverted POR value
11363 ldx [%g2], %g4
11364 xorcc %g7, %g4, %g5
11365 bne test_failed
11366 nop
11367
11368
11369 ! First check that the POR value is correct
11370 add %g2, 8, %g2
11371 ldx [%g2], %g4
11372 xorcc %g3, %g4, %g5
11373 bne test_failed
11374 nop
11375
11376 ! Next check that all the writable bits can be written
11377 stx %l2, [%g2] ! store inverted POR value
11378 ldx [%g2], %g4
11379 xorcc %g7, %g4, %g5
11380 bne test_failed
11381 nop
11382
11383
11384 ! First check that the POR value is correct
11385 add %g2, 8, %g2
11386 ldx [%g2], %g4
11387 xorcc %g3, %g4, %g5
11388 bne test_failed
11389 nop
11390
11391 ! Next check that all the writable bits can be written
11392 stx %l2, [%g2] ! store inverted POR value
11393 ldx [%g2], %g4
11394 xorcc %g7, %g4, %g5
11395 bne test_failed
11396 nop
11397
11398
11399 ! First check that the POR value is correct
11400 add %g2, 8, %g2
11401 ldx [%g2], %g4
11402 xorcc %g3, %g4, %g5
11403 bne test_failed
11404 nop
11405
11406 ! Next check that all the writable bits can be written
11407 stx %l2, [%g2] ! store inverted POR value
11408 ldx [%g2], %g4
11409 xorcc %g7, %g4, %g5
11410 bne test_failed
11411 nop
11412
11413
11414 ! First check that the POR value is correct
11415 add %g2, 8, %g2
11416 ldx [%g2], %g4
11417 xorcc %g3, %g4, %g5
11418 bne test_failed
11419 nop
11420
11421 ! Next check that all the writable bits can be written
11422 stx %l2, [%g2] ! store inverted POR value
11423 ldx [%g2], %g4
11424 xorcc %g7, %g4, %g5
11425 bne test_failed
11426 nop
11427
11428
11429 ! First check that the POR value is correct
11430 add %g2, 8, %g2
11431 ldx [%g2], %g4
11432 xorcc %g3, %g4, %g5
11433 bne test_failed
11434 nop
11435
11436 ! Next check that all the writable bits can be written
11437 stx %l2, [%g2] ! store inverted POR value
11438 ldx [%g2], %g4
11439 xorcc %g7, %g4, %g5
11440 bne test_failed
11441 nop
11442
11443
11444 ! First check that the POR value is correct
11445 add %g2, 8, %g2
11446 ldx [%g2], %g4
11447 xorcc %g3, %g4, %g5
11448 bne test_failed
11449 nop
11450
11451 ! Next check that all the writable bits can be written
11452 stx %l2, [%g2] ! store inverted POR value
11453 ldx [%g2], %g4
11454 xorcc %g7, %g4, %g5
11455 bne test_failed
11456 nop
11457
11458
11459 ! First check that the POR value is correct
11460 add %g2, 8, %g2
11461 ldx [%g2], %g4
11462 xorcc %g3, %g4, %g5
11463 bne test_failed
11464 nop
11465
11466 ! Next check that all the writable bits can be written
11467 stx %l2, [%g2] ! store inverted POR value
11468 ldx [%g2], %g4
11469 xorcc %g7, %g4, %g5
11470 bne test_failed
11471 nop
11472
11473
11474 ! First check that the POR value is correct
11475 add %g2, 8, %g2
11476 ldx [%g2], %g4
11477 xorcc %g3, %g4, %g5
11478 bne test_failed
11479 nop
11480
11481 ! Next check that all the writable bits can be written
11482 stx %l2, [%g2] ! store inverted POR value
11483 ldx [%g2], %g4
11484 xorcc %g7, %g4, %g5
11485 bne test_failed
11486 nop
11487
11488
11489 ! First check that the POR value is correct
11490 add %g2, 8, %g2
11491 ldx [%g2], %g4
11492 xorcc %g3, %g4, %g5
11493 bne test_failed
11494 nop
11495
11496 ! Next check that all the writable bits can be written
11497 stx %l2, [%g2] ! store inverted POR value
11498 ldx [%g2], %g4
11499 xorcc %g7, %g4, %g5
11500 bne test_failed
11501 nop
11502
11503
11504 ! First check that the POR value is correct
11505 add %g2, 8, %g2
11506 ldx [%g2], %g4
11507 xorcc %g3, %g4, %g5
11508 bne test_failed
11509 nop
11510
11511 ! Next check that all the writable bits can be written
11512 stx %l2, [%g2] ! store inverted POR value
11513 ldx [%g2], %g4
11514 xorcc %g7, %g4, %g5
11515 bne test_failed
11516 nop
11517
11518
11519 ! First check that the POR value is correct
11520 add %g2, 8, %g2
11521 ldx [%g2], %g4
11522 xorcc %g3, %g4, %g5
11523 bne test_failed
11524 nop
11525
11526 ! Next check that all the writable bits can be written
11527 stx %l2, [%g2] ! store inverted POR value
11528 ldx [%g2], %g4
11529 xorcc %g7, %g4, %g5
11530 bne test_failed
11531 nop
11532
11533
11534 ! First check that the POR value is correct
11535 add %g2, 8, %g2
11536 ldx [%g2], %g4
11537 xorcc %g3, %g4, %g5
11538 bne test_failed
11539 nop
11540
11541 ! Next check that all the writable bits can be written
11542 stx %l2, [%g2] ! store inverted POR value
11543 ldx [%g2], %g4
11544 xorcc %g7, %g4, %g5
11545 bne test_failed
11546 nop
11547
11548
11549 ! First check that the POR value is correct
11550 add %g2, 8, %g2
11551 ldx [%g2], %g4
11552 xorcc %g3, %g4, %g5
11553 bne test_failed
11554 nop
11555
11556 ! Next check that all the writable bits can be written
11557 stx %l2, [%g2] ! store inverted POR value
11558 ldx [%g2], %g4
11559 xorcc %g7, %g4, %g5
11560 bne test_failed
11561 nop
11562
11563
11564 ! First check that the POR value is correct
11565 add %g2, 8, %g2
11566 ldx [%g2], %g4
11567 xorcc %g3, %g4, %g5
11568 bne test_failed
11569 nop
11570
11571 ! Next check that all the writable bits can be written
11572 stx %l2, [%g2] ! store inverted POR value
11573 ldx [%g2], %g4
11574 xorcc %g7, %g4, %g5
11575 bne test_failed
11576 nop
11577
11578
11579 ! First check that the POR value is correct
11580 add %g2, 8, %g2
11581 ldx [%g2], %g4
11582 xorcc %g3, %g4, %g5
11583 bne test_failed
11584 nop
11585
11586 ! Next check that all the writable bits can be written
11587 stx %l2, [%g2] ! store inverted POR value
11588 ldx [%g2], %g4
11589 xorcc %g7, %g4, %g5
11590 bne test_failed
11591 nop
11592
11593
11594 ! First check that the POR value is correct
11595 add %g2, 8, %g2
11596 ldx [%g2], %g4
11597 xorcc %g3, %g4, %g5
11598 bne test_failed
11599 nop
11600
11601 ! Next check that all the writable bits can be written
11602 stx %l2, [%g2] ! store inverted POR value
11603 ldx [%g2], %g4
11604 xorcc %g7, %g4, %g5
11605 bne test_failed
11606 nop
11607
11608
11609 ! First check that the POR value is correct
11610 add %g2, 8, %g2
11611 ldx [%g2], %g4
11612 xorcc %g3, %g4, %g5
11613 bne test_failed
11614 nop
11615
11616 ! Next check that all the writable bits can be written
11617 stx %l2, [%g2] ! store inverted POR value
11618 ldx [%g2], %g4
11619 xorcc %g7, %g4, %g5
11620 bne test_failed
11621 nop
11622
11623
11624 ! First check that the POR value is correct
11625 add %g2, 8, %g2
11626 ldx [%g2], %g4
11627 xorcc %g3, %g4, %g5
11628 bne test_failed
11629 nop
11630
11631 ! Next check that all the writable bits can be written
11632 stx %l2, [%g2] ! store inverted POR value
11633 ldx [%g2], %g4
11634 xorcc %g7, %g4, %g5
11635 bne test_failed
11636 nop
11637
11638
11639 ! First check that the POR value is correct
11640 add %g2, 8, %g2
11641 ldx [%g2], %g4
11642 xorcc %g3, %g4, %g5
11643 bne test_failed
11644 nop
11645
11646 ! Next check that all the writable bits can be written
11647 stx %l2, [%g2] ! store inverted POR value
11648 ldx [%g2], %g4
11649 xorcc %g7, %g4, %g5
11650 bne test_failed
11651 nop
11652
11653
11654 ! First check that the POR value is correct
11655 add %g2, 8, %g2
11656 ldx [%g2], %g4
11657 xorcc %g3, %g4, %g5
11658 bne test_failed
11659 nop
11660
11661 ! Next check that all the writable bits can be written
11662 stx %l2, [%g2] ! store inverted POR value
11663 ldx [%g2], %g4
11664 xorcc %g7, %g4, %g5
11665 bne test_failed
11666 nop
11667
11668
11669 ! First check that the POR value is correct
11670 add %g2, 8, %g2
11671 ldx [%g2], %g4
11672 xorcc %g3, %g4, %g5
11673 bne test_failed
11674 nop
11675
11676 ! Next check that all the writable bits can be written
11677 stx %l2, [%g2] ! store inverted POR value
11678 ldx [%g2], %g4
11679 xorcc %g7, %g4, %g5
11680 bne test_failed
11681 nop
11682
11683
11684 ! First check that the POR value is correct
11685 add %g2, 8, %g2
11686 ldx [%g2], %g4
11687 xorcc %g3, %g4, %g5
11688 bne test_failed
11689 nop
11690
11691 ! Next check that all the writable bits can be written
11692 stx %l2, [%g2] ! store inverted POR value
11693 ldx [%g2], %g4
11694 xorcc %g7, %g4, %g5
11695 bne test_failed
11696 nop
11697
11698
11699 ! First check that the POR value is correct
11700 add %g2, 8, %g2
11701 ldx [%g2], %g4
11702 xorcc %g3, %g4, %g5
11703 bne test_failed
11704 nop
11705
11706 ! Next check that all the writable bits can be written
11707 stx %l2, [%g2] ! store inverted POR value
11708 ldx [%g2], %g4
11709 xorcc %g7, %g4, %g5
11710 bne test_failed
11711 nop
11712
11713
11714 ! First check that the POR value is correct
11715 add %g2, 8, %g2
11716 ldx [%g2], %g4
11717 xorcc %g3, %g4, %g5
11718 bne test_failed
11719 nop
11720
11721 ! Next check that all the writable bits can be written
11722 stx %l2, [%g2] ! store inverted POR value
11723 ldx [%g2], %g4
11724 xorcc %g7, %g4, %g5
11725 bne test_failed
11726 nop
11727
11728
11729 ! First check that the POR value is correct
11730 add %g2, 8, %g2
11731 ldx [%g2], %g4
11732 xorcc %g3, %g4, %g5
11733 bne test_failed
11734 nop
11735
11736 ! Next check that all the writable bits can be written
11737 stx %l2, [%g2] ! store inverted POR value
11738 ldx [%g2], %g4
11739 xorcc %g7, %g4, %g5
11740 bne test_failed
11741 nop
11742
11743
11744 ! First check that the POR value is correct
11745 add %g2, 8, %g2
11746 ldx [%g2], %g4
11747 xorcc %g3, %g4, %g5
11748 bne test_failed
11749 nop
11750
11751 ! Next check that all the writable bits can be written
11752 stx %l2, [%g2] ! store inverted POR value
11753 ldx [%g2], %g4
11754 xorcc %g7, %g4, %g5
11755 bne test_failed
11756 nop
11757
11758
11759 ! First check that the POR value is correct
11760 add %g2, 8, %g2
11761 ldx [%g2], %g4
11762 xorcc %g3, %g4, %g5
11763 bne test_failed
11764 nop
11765
11766 ! Next check that all the writable bits can be written
11767 stx %l2, [%g2] ! store inverted POR value
11768 ldx [%g2], %g4
11769 xorcc %g7, %g4, %g5
11770 bne test_failed
11771 nop
11772
11773
11774 ! First check that the POR value is correct
11775 add %g2, 8, %g2
11776 ldx [%g2], %g4
11777 xorcc %g3, %g4, %g5
11778 bne test_failed
11779 nop
11780
11781 ! Next check that all the writable bits can be written
11782 stx %l2, [%g2] ! store inverted POR value
11783 ldx [%g2], %g4
11784 xorcc %g7, %g4, %g5
11785 bne test_failed
11786 nop
11787
11788
11789 ! First check that the POR value is correct
11790 add %g2, 8, %g2
11791 ldx [%g2], %g4
11792 xorcc %g3, %g4, %g5
11793 bne test_failed
11794 nop
11795
11796 ! Next check that all the writable bits can be written
11797 stx %l2, [%g2] ! store inverted POR value
11798 ldx [%g2], %g4
11799 xorcc %g7, %g4, %g5
11800 bne test_failed
11801 nop
11802
11803
11804 ! First check that the POR value is correct
11805 add %g2, 8, %g2
11806 ldx [%g2], %g4
11807 xorcc %g3, %g4, %g5
11808 bne test_failed
11809 nop
11810
11811 ! Next check that all the writable bits can be written
11812 stx %l2, [%g2] ! store inverted POR value
11813 ldx [%g2], %g4
11814 xorcc %g7, %g4, %g5
11815 bne test_failed
11816 nop
11817
11818
11819 ! First check that the POR value is correct
11820 add %g2, 8, %g2
11821 ldx [%g2], %g4
11822 xorcc %g3, %g4, %g5
11823 bne test_failed
11824 nop
11825
11826 ! Next check that all the writable bits can be written
11827 stx %l2, [%g2] ! store inverted POR value
11828 ldx [%g2], %g4
11829 xorcc %g7, %g4, %g5
11830 bne test_failed
11831 nop
11832
11833
11834 ! First check that the POR value is correct
11835 add %g2, 8, %g2
11836 ldx [%g2], %g4
11837 xorcc %g3, %g4, %g5
11838 bne test_failed
11839 nop
11840
11841 ! Next check that all the writable bits can be written
11842 stx %l2, [%g2] ! store inverted POR value
11843 ldx [%g2], %g4
11844 xorcc %g7, %g4, %g5
11845 bne test_failed
11846 nop
11847
11848
11849 ! First check that the POR value is correct
11850 add %g2, 8, %g2
11851 ldx [%g2], %g4
11852 xorcc %g3, %g4, %g5
11853 bne test_failed
11854 nop
11855
11856 ! Next check that all the writable bits can be written
11857 stx %l2, [%g2] ! store inverted POR value
11858 ldx [%g2], %g4
11859 xorcc %g7, %g4, %g5
11860 bne test_failed
11861 nop
11862
11863
11864 ! First check that the POR value is correct
11865 add %g2, 8, %g2
11866 ldx [%g2], %g4
11867 xorcc %g3, %g4, %g5
11868 bne test_failed
11869 nop
11870
11871 ! Next check that all the writable bits can be written
11872 stx %l2, [%g2] ! store inverted POR value
11873 ldx [%g2], %g4
11874 xorcc %g7, %g4, %g5
11875 bne test_failed
11876 nop
11877
11878
11879 ! First check that the POR value is correct
11880 add %g2, 8, %g2
11881 ldx [%g2], %g4
11882 xorcc %g3, %g4, %g5
11883 bne test_failed
11884 nop
11885
11886 ! Next check that all the writable bits can be written
11887 stx %l2, [%g2] ! store inverted POR value
11888 ldx [%g2], %g4
11889 xorcc %g7, %g4, %g5
11890 bne test_failed
11891 nop
11892
11893
11894 ! First check that the POR value is correct
11895 add %g2, 8, %g2
11896 ldx [%g2], %g4
11897 xorcc %g3, %g4, %g5
11898 bne test_failed
11899 nop
11900
11901 ! Next check that all the writable bits can be written
11902 stx %l2, [%g2] ! store inverted POR value
11903 ldx [%g2], %g4
11904 xorcc %g7, %g4, %g5
11905 bne test_failed
11906 nop
11907
11908
11909 ! First check that the POR value is correct
11910 add %g2, 8, %g2
11911 ldx [%g2], %g4
11912 xorcc %g3, %g4, %g5
11913 bne test_failed
11914 nop
11915
11916 ! Next check that all the writable bits can be written
11917 stx %l2, [%g2] ! store inverted POR value
11918 ldx [%g2], %g4
11919 xorcc %g7, %g4, %g5
11920 bne test_failed
11921 nop
11922
11923
11924 ! First check that the POR value is correct
11925 add %g2, 8, %g2
11926 ldx [%g2], %g4
11927 xorcc %g3, %g4, %g5
11928 bne test_failed
11929 nop
11930
11931 ! Next check that all the writable bits can be written
11932 stx %l2, [%g2] ! store inverted POR value
11933 ldx [%g2], %g4
11934 xorcc %g7, %g4, %g5
11935 bne test_failed
11936 nop
11937
11938
11939 ! First check that the POR value is correct
11940 add %g2, 8, %g2
11941 ldx [%g2], %g4
11942 xorcc %g3, %g4, %g5
11943 bne test_failed
11944 nop
11945
11946 ! Next check that all the writable bits can be written
11947 stx %l2, [%g2] ! store inverted POR value
11948 ldx [%g2], %g4
11949 xorcc %g7, %g4, %g5
11950 bne test_failed
11951 nop
11952
11953
11954 ! First check that the POR value is correct
11955 add %g2, 8, %g2
11956 ldx [%g2], %g4
11957 xorcc %g3, %g4, %g5
11958 bne test_failed
11959 nop
11960
11961 ! Next check that all the writable bits can be written
11962 stx %l2, [%g2] ! store inverted POR value
11963 ldx [%g2], %g4
11964 xorcc %g7, %g4, %g5
11965 bne test_failed
11966 nop
11967
11968
11969 ! First check that the POR value is correct
11970 add %g2, 8, %g2
11971 ldx [%g2], %g4
11972 xorcc %g3, %g4, %g5
11973 bne test_failed
11974 nop
11975
11976 ! Next check that all the writable bits can be written
11977 stx %l2, [%g2] ! store inverted POR value
11978 ldx [%g2], %g4
11979 xorcc %g7, %g4, %g5
11980 bne test_failed
11981 nop
11982
11983
11984 ! First check that the POR value is correct
11985 add %g2, 8, %g2
11986 ldx [%g2], %g4
11987 xorcc %g3, %g4, %g5
11988 bne test_failed
11989 nop
11990
11991 ! Next check that all the writable bits can be written
11992 stx %l2, [%g2] ! store inverted POR value
11993 ldx [%g2], %g4
11994 xorcc %g7, %g4, %g5
11995 bne test_failed
11996 nop
11997
11998
11999 ! First check that the POR value is correct
12000 add %g2, 8, %g2
12001 ldx [%g2], %g4
12002 xorcc %g3, %g4, %g5
12003 bne test_failed
12004 nop
12005
12006 ! Next check that all the writable bits can be written
12007 stx %l2, [%g2] ! store inverted POR value
12008 ldx [%g2], %g4
12009 xorcc %g7, %g4, %g5
12010 bne test_failed
12011 nop
12012
12013
12014 ! First check that the POR value is correct
12015 add %g2, 8, %g2
12016 ldx [%g2], %g4
12017 xorcc %g3, %g4, %g5
12018 bne test_failed
12019 nop
12020
12021 ! Next check that all the writable bits can be written
12022 stx %l2, [%g2] ! store inverted POR value
12023 ldx [%g2], %g4
12024 xorcc %g7, %g4, %g5
12025 bne test_failed
12026 nop
12027
12028
12029 ! First check that the POR value is correct
12030 add %g2, 8, %g2
12031 ldx [%g2], %g4
12032 xorcc %g3, %g4, %g5
12033 bne test_failed
12034 nop
12035
12036 ! Next check that all the writable bits can be written
12037 stx %l2, [%g2] ! store inverted POR value
12038 ldx [%g2], %g4
12039 xorcc %g7, %g4, %g5
12040 bne test_failed
12041 nop
12042
12043
12044 ! First check that the POR value is correct
12045 add %g2, 8, %g2
12046 ldx [%g2], %g4
12047 xorcc %g3, %g4, %g5
12048 bne test_failed
12049 nop
12050
12051 ! Next check that all the writable bits can be written
12052 stx %l2, [%g2] ! store inverted POR value
12053 ldx [%g2], %g4
12054 xorcc %g7, %g4, %g5
12055 bne test_failed
12056 nop
12057
12058
12059 ! First check that the POR value is correct
12060 add %g2, 8, %g2
12061 ldx [%g2], %g4
12062 xorcc %g3, %g4, %g5
12063 bne test_failed
12064 nop
12065
12066 ! Next check that all the writable bits can be written
12067 stx %l2, [%g2] ! store inverted POR value
12068 ldx [%g2], %g4
12069 xorcc %g7, %g4, %g5
12070 bne test_failed
12071 nop
12072
12073
12074 ! First check that the POR value is correct
12075 add %g2, 8, %g2
12076 ldx [%g2], %g4
12077 xorcc %g3, %g4, %g5
12078 bne test_failed
12079 nop
12080
12081 ! Next check that all the writable bits can be written
12082 stx %l2, [%g2] ! store inverted POR value
12083 ldx [%g2], %g4
12084 xorcc %g7, %g4, %g5
12085 bne test_failed
12086 nop
12087
12088
12089 ! First check that the POR value is correct
12090 add %g2, 8, %g2
12091 ldx [%g2], %g4
12092 xorcc %g3, %g4, %g5
12093 bne test_failed
12094 nop
12095
12096 ! Next check that all the writable bits can be written
12097 stx %l2, [%g2] ! store inverted POR value
12098 ldx [%g2], %g4
12099 xorcc %g7, %g4, %g5
12100 bne test_failed
12101 nop
12102
12103
12104 ! First check that the POR value is correct
12105 add %g2, 8, %g2
12106 ldx [%g2], %g4
12107 xorcc %g3, %g4, %g5
12108 bne test_failed
12109 nop
12110
12111 ! Next check that all the writable bits can be written
12112 stx %l2, [%g2] ! store inverted POR value
12113 ldx [%g2], %g4
12114 xorcc %g7, %g4, %g5
12115 bne test_failed
12116 nop
12117
12118
12119 ! First check that the POR value is correct
12120 add %g2, 8, %g2
12121 ldx [%g2], %g4
12122 xorcc %g3, %g4, %g5
12123 bne test_failed
12124 nop
12125
12126 ! Next check that all the writable bits can be written
12127 stx %l2, [%g2] ! store inverted POR value
12128 ldx [%g2], %g4
12129 xorcc %g7, %g4, %g5
12130 bne test_failed
12131 nop
12132
12133
12134 ! First check that the POR value is correct
12135 add %g2, 8, %g2
12136 ldx [%g2], %g4
12137 xorcc %g3, %g4, %g5
12138 bne test_failed
12139 nop
12140
12141 ! Next check that all the writable bits can be written
12142 stx %l2, [%g2] ! store inverted POR value
12143 ldx [%g2], %g4
12144 xorcc %g7, %g4, %g5
12145 bne test_failed
12146 nop
12147
12148
12149 ! First check that the POR value is correct
12150 add %g2, 8, %g2
12151 ldx [%g2], %g4
12152 xorcc %g3, %g4, %g5
12153 bne test_failed
12154 nop
12155
12156 ! Next check that all the writable bits can be written
12157 stx %l2, [%g2] ! store inverted POR value
12158 ldx [%g2], %g4
12159 xorcc %g7, %g4, %g5
12160 bne test_failed
12161 nop
12162
12163
12164 ! First check that the POR value is correct
12165 add %g2, 8, %g2
12166 ldx [%g2], %g4
12167 xorcc %g3, %g4, %g5
12168 bne test_failed
12169 nop
12170
12171 ! Next check that all the writable bits can be written
12172 stx %l2, [%g2] ! store inverted POR value
12173 ldx [%g2], %g4
12174 xorcc %g7, %g4, %g5
12175 bne test_failed
12176 nop
12177
12178
12179 ! First check that the POR value is correct
12180 add %g2, 8, %g2
12181 ldx [%g2], %g4
12182 xorcc %g3, %g4, %g5
12183 bne test_failed
12184 nop
12185
12186 ! Next check that all the writable bits can be written
12187 stx %l2, [%g2] ! store inverted POR value
12188 ldx [%g2], %g4
12189 xorcc %g7, %g4, %g5
12190 bne test_failed
12191 nop
12192
12193
12194 ! First check that the POR value is correct
12195 add %g2, 8, %g2
12196 ldx [%g2], %g4
12197 xorcc %g3, %g4, %g5
12198 bne test_failed
12199 nop
12200
12201 ! Next check that all the writable bits can be written
12202 stx %l2, [%g2] ! store inverted POR value
12203 ldx [%g2], %g4
12204 xorcc %g7, %g4, %g5
12205 bne test_failed
12206 nop
12207
12208
12209 ! First check that the POR value is correct
12210 add %g2, 8, %g2
12211 ldx [%g2], %g4
12212 xorcc %g3, %g4, %g5
12213 bne test_failed
12214 nop
12215
12216 ! Next check that all the writable bits can be written
12217 stx %l2, [%g2] ! store inverted POR value
12218 ldx [%g2], %g4
12219 xorcc %g7, %g4, %g5
12220 bne test_failed
12221 nop
12222
12223
12224 ! First check that the POR value is correct
12225 add %g2, 8, %g2
12226 ldx [%g2], %g4
12227 xorcc %g3, %g4, %g5
12228 bne test_failed
12229 nop
12230
12231 ! Next check that all the writable bits can be written
12232 stx %l2, [%g2] ! store inverted POR value
12233 ldx [%g2], %g4
12234 xorcc %g7, %g4, %g5
12235 bne test_failed
12236 nop
12237
12238
12239 ! First check that the POR value is correct
12240 add %g2, 8, %g2
12241 ldx [%g2], %g4
12242 xorcc %g3, %g4, %g5
12243 bne test_failed
12244 nop
12245
12246 ! Next check that all the writable bits can be written
12247 stx %l2, [%g2] ! store inverted POR value
12248 ldx [%g2], %g4
12249 xorcc %g7, %g4, %g5
12250 bne test_failed
12251 nop
12252
12253
12254 ! First check that the POR value is correct
12255 add %g2, 8, %g2
12256 ldx [%g2], %g4
12257 xorcc %g3, %g4, %g5
12258 bne test_failed
12259 nop
12260
12261 ! Next check that all the writable bits can be written
12262 stx %l2, [%g2] ! store inverted POR value
12263 ldx [%g2], %g4
12264 xorcc %g7, %g4, %g5
12265 bne test_failed
12266 nop
12267
12268
12269 ! First check that the POR value is correct
12270 add %g2, 8, %g2
12271 ldx [%g2], %g4
12272 xorcc %g3, %g4, %g5
12273 bne test_failed
12274 nop
12275
12276 ! Next check that all the writable bits can be written
12277 stx %l2, [%g2] ! store inverted POR value
12278 ldx [%g2], %g4
12279 xorcc %g7, %g4, %g5
12280 bne test_failed
12281 nop
12282
12283
12284 ! First check that the POR value is correct
12285 add %g2, 8, %g2
12286 ldx [%g2], %g4
12287 xorcc %g3, %g4, %g5
12288 bne test_failed
12289 nop
12290
12291 ! Next check that all the writable bits can be written
12292 stx %l2, [%g2] ! store inverted POR value
12293 ldx [%g2], %g4
12294 xorcc %g7, %g4, %g5
12295 bne test_failed
12296 nop
12297
12298
12299 ! First check that the POR value is correct
12300 add %g2, 8, %g2
12301 ldx [%g2], %g4
12302 xorcc %g3, %g4, %g5
12303 bne test_failed
12304 nop
12305
12306 ! Next check that all the writable bits can be written
12307 stx %l2, [%g2] ! store inverted POR value
12308 ldx [%g2], %g4
12309 xorcc %g7, %g4, %g5
12310 bne test_failed
12311 nop
12312
12313
12314 ! First check that the POR value is correct
12315 add %g2, 8, %g2
12316 ldx [%g2], %g4
12317 xorcc %g3, %g4, %g5
12318 bne test_failed
12319 nop
12320
12321 ! Next check that all the writable bits can be written
12322 stx %l2, [%g2] ! store inverted POR value
12323 ldx [%g2], %g4
12324 xorcc %g7, %g4, %g5
12325 bne test_failed
12326 nop
12327
12328
12329 ! First check that the POR value is correct
12330 add %g2, 8, %g2
12331 ldx [%g2], %g4
12332 xorcc %g3, %g4, %g5
12333 bne test_failed
12334 nop
12335
12336 ! Next check that all the writable bits can be written
12337 stx %l2, [%g2] ! store inverted POR value
12338 ldx [%g2], %g4
12339 xorcc %g7, %g4, %g5
12340 bne test_failed
12341 nop
12342
12343
12344 ! First check that the POR value is correct
12345 add %g2, 8, %g2
12346 ldx [%g2], %g4
12347 xorcc %g3, %g4, %g5
12348 bne test_failed
12349 nop
12350
12351 ! Next check that all the writable bits can be written
12352 stx %l2, [%g2] ! store inverted POR value
12353 ldx [%g2], %g4
12354 xorcc %g7, %g4, %g5
12355 bne test_failed
12356 nop
12357
12358
12359 ! First check that the POR value is correct
12360 add %g2, 8, %g2
12361 ldx [%g2], %g4
12362 xorcc %g3, %g4, %g5
12363 bne test_failed
12364 nop
12365
12366 ! Next check that all the writable bits can be written
12367 stx %l2, [%g2] ! store inverted POR value
12368 ldx [%g2], %g4
12369 xorcc %g7, %g4, %g5
12370 bne test_failed
12371 nop
12372
12373
12374 ! First check that the POR value is correct
12375 add %g2, 8, %g2
12376 ldx [%g2], %g4
12377 xorcc %g3, %g4, %g5
12378 bne test_failed
12379 nop
12380
12381 ! Next check that all the writable bits can be written
12382 stx %l2, [%g2] ! store inverted POR value
12383 ldx [%g2], %g4
12384 xorcc %g7, %g4, %g5
12385 bne test_failed
12386 nop
12387
12388
12389 ! First check that the POR value is correct
12390 add %g2, 8, %g2
12391 ldx [%g2], %g4
12392 xorcc %g3, %g4, %g5
12393 bne test_failed
12394 nop
12395
12396 ! Next check that all the writable bits can be written
12397 stx %l2, [%g2] ! store inverted POR value
12398 ldx [%g2], %g4
12399 xorcc %g7, %g4, %g5
12400 bne test_failed
12401 nop
12402
12403
12404 ! First check that the POR value is correct
12405 add %g2, 8, %g2
12406 ldx [%g2], %g4
12407 xorcc %g3, %g4, %g5
12408 bne test_failed
12409 nop
12410
12411 ! Next check that all the writable bits can be written
12412 stx %l2, [%g2] ! store inverted POR value
12413 ldx [%g2], %g4
12414 xorcc %g7, %g4, %g5
12415 bne test_failed
12416 nop
12417
12418
12419 ! First check that the POR value is correct
12420 add %g2, 8, %g2
12421 ldx [%g2], %g4
12422 xorcc %g3, %g4, %g5
12423 bne test_failed
12424 nop
12425
12426 ! Next check that all the writable bits can be written
12427 stx %l2, [%g2] ! store inverted POR value
12428 ldx [%g2], %g4
12429 xorcc %g7, %g4, %g5
12430 bne test_failed
12431 nop
12432
12433
12434 ! First check that the POR value is correct
12435 add %g2, 8, %g2
12436 ldx [%g2], %g4
12437 xorcc %g3, %g4, %g5
12438 bne test_failed
12439 nop
12440
12441 ! Next check that all the writable bits can be written
12442 stx %l2, [%g2] ! store inverted POR value
12443 ldx [%g2], %g4
12444 xorcc %g7, %g4, %g5
12445 bne test_failed
12446 nop
12447
12448
12449 ! First check that the POR value is correct
12450 add %g2, 8, %g2
12451 ldx [%g2], %g4
12452 xorcc %g3, %g4, %g5
12453 bne test_failed
12454 nop
12455
12456 ! Next check that all the writable bits can be written
12457 stx %l2, [%g2] ! store inverted POR value
12458 ldx [%g2], %g4
12459 xorcc %g7, %g4, %g5
12460 bne test_failed
12461 nop
12462
12463
12464 ! First check that the POR value is correct
12465 add %g2, 8, %g2
12466 ldx [%g2], %g4
12467 xorcc %g3, %g4, %g5
12468 bne test_failed
12469 nop
12470
12471 ! Next check that all the writable bits can be written
12472 stx %l2, [%g2] ! store inverted POR value
12473 ldx [%g2], %g4
12474 xorcc %g7, %g4, %g5
12475 bne test_failed
12476 nop
12477
12478
12479 ! First check that the POR value is correct
12480 add %g2, 8, %g2
12481 ldx [%g2], %g4
12482 xorcc %g3, %g4, %g5
12483 bne test_failed
12484 nop
12485
12486 ! Next check that all the writable bits can be written
12487 stx %l2, [%g2] ! store inverted POR value
12488 ldx [%g2], %g4
12489 xorcc %g7, %g4, %g5
12490 bne test_failed
12491 nop
12492
12493
12494 ! First check that the POR value is correct
12495 add %g2, 8, %g2
12496 ldx [%g2], %g4
12497 xorcc %g3, %g4, %g5
12498 bne test_failed
12499 nop
12500
12501 ! Next check that all the writable bits can be written
12502 stx %l2, [%g2] ! store inverted POR value
12503 ldx [%g2], %g4
12504 xorcc %g7, %g4, %g5
12505 bne test_failed
12506 nop
12507
12508
12509 ! First check that the POR value is correct
12510 add %g2, 8, %g2
12511 ldx [%g2], %g4
12512 xorcc %g3, %g4, %g5
12513 bne test_failed
12514 nop
12515
12516 ! Next check that all the writable bits can be written
12517 stx %l2, [%g2] ! store inverted POR value
12518 ldx [%g2], %g4
12519 xorcc %g7, %g4, %g5
12520 bne test_failed
12521 nop
12522
12523
12524 ! First check that the POR value is correct
12525 add %g2, 8, %g2
12526 ldx [%g2], %g4
12527 xorcc %g3, %g4, %g5
12528 bne test_failed
12529 nop
12530
12531 ! Next check that all the writable bits can be written
12532 stx %l2, [%g2] ! store inverted POR value
12533 ldx [%g2], %g4
12534 xorcc %g7, %g4, %g5
12535 bne test_failed
12536 nop
12537
12538
12539 ! First check that the POR value is correct
12540 add %g2, 8, %g2
12541 ldx [%g2], %g4
12542 xorcc %g3, %g4, %g5
12543 bne test_failed
12544 nop
12545
12546 ! Next check that all the writable bits can be written
12547 stx %l2, [%g2] ! store inverted POR value
12548 ldx [%g2], %g4
12549 xorcc %g7, %g4, %g5
12550 bne test_failed
12551 nop
12552
12553
12554 ! First check that the POR value is correct
12555 add %g2, 8, %g2
12556 ldx [%g2], %g4
12557 xorcc %g3, %g4, %g5
12558 bne test_failed
12559 nop
12560
12561 ! Next check that all the writable bits can be written
12562 stx %l2, [%g2] ! store inverted POR value
12563 ldx [%g2], %g4
12564 xorcc %g7, %g4, %g5
12565 bne test_failed
12566 nop
12567
12568
12569 ! First check that the POR value is correct
12570 add %g2, 8, %g2
12571 ldx [%g2], %g4
12572 xorcc %g3, %g4, %g5
12573 bne test_failed
12574 nop
12575
12576 ! Next check that all the writable bits can be written
12577 stx %l2, [%g2] ! store inverted POR value
12578 ldx [%g2], %g4
12579 xorcc %g7, %g4, %g5
12580 bne test_failed
12581 nop
12582
12583
12584 ! First check that the POR value is correct
12585 add %g2, 8, %g2
12586 ldx [%g2], %g4
12587 xorcc %g3, %g4, %g5
12588 bne test_failed
12589 nop
12590
12591 ! Next check that all the writable bits can be written
12592 stx %l2, [%g2] ! store inverted POR value
12593 ldx [%g2], %g4
12594 xorcc %g7, %g4, %g5
12595 bne test_failed
12596 nop
12597
12598
12599 ! First check that the POR value is correct
12600 add %g2, 8, %g2
12601 ldx [%g2], %g4
12602 xorcc %g3, %g4, %g5
12603 bne test_failed
12604 nop
12605
12606 ! Next check that all the writable bits can be written
12607 stx %l2, [%g2] ! store inverted POR value
12608 ldx [%g2], %g4
12609 xorcc %g7, %g4, %g5
12610 bne test_failed
12611 nop
12612
12613
12614 ! First check that the POR value is correct
12615 add %g2, 8, %g2
12616 ldx [%g2], %g4
12617 xorcc %g3, %g4, %g5
12618 bne test_failed
12619 nop
12620
12621 ! Next check that all the writable bits can be written
12622 stx %l2, [%g2] ! store inverted POR value
12623 ldx [%g2], %g4
12624 xorcc %g7, %g4, %g5
12625 bne test_failed
12626 nop
12627
12628
12629 ! First check that the POR value is correct
12630 add %g2, 8, %g2
12631 ldx [%g2], %g4
12632 xorcc %g3, %g4, %g5
12633 bne test_failed
12634 nop
12635
12636 ! Next check that all the writable bits can be written
12637 stx %l2, [%g2] ! store inverted POR value
12638 ldx [%g2], %g4
12639 xorcc %g7, %g4, %g5
12640 bne test_failed
12641 nop
12642
12643
12644 ! First check that the POR value is correct
12645 add %g2, 8, %g2
12646 ldx [%g2], %g4
12647 xorcc %g3, %g4, %g5
12648 bne test_failed
12649 nop
12650
12651 ! Next check that all the writable bits can be written
12652 stx %l2, [%g2] ! store inverted POR value
12653 ldx [%g2], %g4
12654 xorcc %g7, %g4, %g5
12655 bne test_failed
12656 nop
12657
12658
12659 ! First check that the POR value is correct
12660 add %g2, 8, %g2
12661 ldx [%g2], %g4
12662 xorcc %g3, %g4, %g5
12663 bne test_failed
12664 nop
12665
12666 ! Next check that all the writable bits can be written
12667 stx %l2, [%g2] ! store inverted POR value
12668 ldx [%g2], %g4
12669 xorcc %g7, %g4, %g5
12670 bne test_failed
12671 nop
12672
12673
12674 ! First check that the POR value is correct
12675 add %g2, 8, %g2
12676 ldx [%g2], %g4
12677 xorcc %g3, %g4, %g5
12678 bne test_failed
12679 nop
12680
12681 ! Next check that all the writable bits can be written
12682 stx %l2, [%g2] ! store inverted POR value
12683 ldx [%g2], %g4
12684 xorcc %g7, %g4, %g5
12685 bne test_failed
12686 nop
12687
12688
12689 ! First check that the POR value is correct
12690 add %g2, 8, %g2
12691 ldx [%g2], %g4
12692 xorcc %g3, %g4, %g5
12693 bne test_failed
12694 nop
12695
12696 ! Next check that all the writable bits can be written
12697 stx %l2, [%g2] ! store inverted POR value
12698 ldx [%g2], %g4
12699 xorcc %g7, %g4, %g5
12700 bne test_failed
12701 nop
12702
12703
12704 ! First check that the POR value is correct
12705 add %g2, 8, %g2
12706 ldx [%g2], %g4
12707 xorcc %g3, %g4, %g5
12708 bne test_failed
12709 nop
12710
12711 ! Next check that all the writable bits can be written
12712 stx %l2, [%g2] ! store inverted POR value
12713 ldx [%g2], %g4
12714 xorcc %g7, %g4, %g5
12715 bne test_failed
12716 nop
12717
12718
12719 ! First check that the POR value is correct
12720 add %g2, 8, %g2
12721 ldx [%g2], %g4
12722 xorcc %g3, %g4, %g5
12723 bne test_failed
12724 nop
12725
12726 ! Next check that all the writable bits can be written
12727 stx %l2, [%g2] ! store inverted POR value
12728 ldx [%g2], %g4
12729 xorcc %g7, %g4, %g5
12730 bne test_failed
12731 nop
12732
12733
12734 ! First check that the POR value is correct
12735 add %g2, 8, %g2
12736 ldx [%g2], %g4
12737 xorcc %g3, %g4, %g5
12738 bne test_failed
12739 nop
12740
12741 ! Next check that all the writable bits can be written
12742 stx %l2, [%g2] ! store inverted POR value
12743 ldx [%g2], %g4
12744 xorcc %g7, %g4, %g5
12745 bne test_failed
12746 nop
12747
12748
12749 ! First check that the POR value is correct
12750 add %g2, 8, %g2
12751 ldx [%g2], %g4
12752 xorcc %g3, %g4, %g5
12753 bne test_failed
12754 nop
12755
12756 ! Next check that all the writable bits can be written
12757 stx %l2, [%g2] ! store inverted POR value
12758 ldx [%g2], %g4
12759 xorcc %g7, %g4, %g5
12760 bne test_failed
12761 nop
12762
12763
12764 ! First check that the POR value is correct
12765 add %g2, 8, %g2
12766 ldx [%g2], %g4
12767 xorcc %g3, %g4, %g5
12768 bne test_failed
12769 nop
12770
12771 ! Next check that all the writable bits can be written
12772 stx %l2, [%g2] ! store inverted POR value
12773 ldx [%g2], %g4
12774 xorcc %g7, %g4, %g5
12775 bne test_failed
12776 nop
12777
12778
12779 ! First check that the POR value is correct
12780 add %g2, 8, %g2
12781 ldx [%g2], %g4
12782 xorcc %g3, %g4, %g5
12783 bne test_failed
12784 nop
12785
12786 ! Next check that all the writable bits can be written
12787 stx %l2, [%g2] ! store inverted POR value
12788 ldx [%g2], %g4
12789 xorcc %g7, %g4, %g5
12790 bne test_failed
12791 nop
12792
12793
12794 ! First check that the POR value is correct
12795 add %g2, 8, %g2
12796 ldx [%g2], %g4
12797 xorcc %g3, %g4, %g5
12798 bne test_failed
12799 nop
12800
12801 ! Next check that all the writable bits can be written
12802 stx %l2, [%g2] ! store inverted POR value
12803 ldx [%g2], %g4
12804 xorcc %g7, %g4, %g5
12805 bne test_failed
12806 nop
12807
12808
12809 ! First check that the POR value is correct
12810 add %g2, 8, %g2
12811 ldx [%g2], %g4
12812 xorcc %g3, %g4, %g5
12813 bne test_failed
12814 nop
12815
12816 ! Next check that all the writable bits can be written
12817 stx %l2, [%g2] ! store inverted POR value
12818 ldx [%g2], %g4
12819 xorcc %g7, %g4, %g5
12820 bne test_failed
12821 nop
12822
12823
12824 ! First check that the POR value is correct
12825 add %g2, 8, %g2
12826 ldx [%g2], %g4
12827 xorcc %g3, %g4, %g5
12828 bne test_failed
12829 nop
12830
12831 ! Next check that all the writable bits can be written
12832 stx %l2, [%g2] ! store inverted POR value
12833 ldx [%g2], %g4
12834 xorcc %g7, %g4, %g5
12835 bne test_failed
12836 nop
12837
12838
12839 ! First check that the POR value is correct
12840 add %g2, 8, %g2
12841 ldx [%g2], %g4
12842 xorcc %g3, %g4, %g5
12843 bne test_failed
12844 nop
12845
12846 ! Next check that all the writable bits can be written
12847 stx %l2, [%g2] ! store inverted POR value
12848 ldx [%g2], %g4
12849 xorcc %g7, %g4, %g5
12850 bne test_failed
12851 nop
12852
12853
12854 ! First check that the POR value is correct
12855 add %g2, 8, %g2
12856 ldx [%g2], %g4
12857 xorcc %g3, %g4, %g5
12858 bne test_failed
12859 nop
12860
12861 ! Next check that all the writable bits can be written
12862 stx %l2, [%g2] ! store inverted POR value
12863 ldx [%g2], %g4
12864 xorcc %g7, %g4, %g5
12865 bne test_failed
12866 nop
12867
12868
12869 ! First check that the POR value is correct
12870 add %g2, 8, %g2
12871 ldx [%g2], %g4
12872 xorcc %g3, %g4, %g5
12873 bne test_failed
12874 nop
12875
12876 ! Next check that all the writable bits can be written
12877 stx %l2, [%g2] ! store inverted POR value
12878 ldx [%g2], %g4
12879 xorcc %g7, %g4, %g5
12880 bne test_failed
12881 nop
12882
12883
12884 ! First check that the POR value is correct
12885 add %g2, 8, %g2
12886 ldx [%g2], %g4
12887 xorcc %g3, %g4, %g5
12888 bne test_failed
12889 nop
12890
12891 ! Next check that all the writable bits can be written
12892 stx %l2, [%g2] ! store inverted POR value
12893 ldx [%g2], %g4
12894 xorcc %g7, %g4, %g5
12895 bne test_failed
12896 nop
12897
12898
12899 ! First check that the POR value is correct
12900 add %g2, 8, %g2
12901 ldx [%g2], %g4
12902 xorcc %g3, %g4, %g5
12903 bne test_failed
12904 nop
12905
12906 ! Next check that all the writable bits can be written
12907 stx %l2, [%g2] ! store inverted POR value
12908 ldx [%g2], %g4
12909 xorcc %g7, %g4, %g5
12910 bne test_failed
12911 nop
12912
12913
12914 ! First check that the POR value is correct
12915 add %g2, 8, %g2
12916 ldx [%g2], %g4
12917 xorcc %g3, %g4, %g5
12918 bne test_failed
12919 nop
12920
12921 ! Next check that all the writable bits can be written
12922 stx %l2, [%g2] ! store inverted POR value
12923 ldx [%g2], %g4
12924 xorcc %g7, %g4, %g5
12925 bne test_failed
12926 nop
12927
12928
12929 ! First check that the POR value is correct
12930 add %g2, 8, %g2
12931 ldx [%g2], %g4
12932 xorcc %g3, %g4, %g5
12933 bne test_failed
12934 nop
12935
12936 ! Next check that all the writable bits can be written
12937 stx %l2, [%g2] ! store inverted POR value
12938 ldx [%g2], %g4
12939 xorcc %g7, %g4, %g5
12940 bne test_failed
12941 nop
12942
12943
12944 ! First check that the POR value is correct
12945 add %g2, 8, %g2
12946 ldx [%g2], %g4
12947 xorcc %g3, %g4, %g5
12948 bne test_failed
12949 nop
12950
12951 ! Next check that all the writable bits can be written
12952 stx %l2, [%g2] ! store inverted POR value
12953 ldx [%g2], %g4
12954 xorcc %g7, %g4, %g5
12955 bne test_failed
12956 nop
12957
12958
12959 ! First check that the POR value is correct
12960 add %g2, 8, %g2
12961 ldx [%g2], %g4
12962 xorcc %g3, %g4, %g5
12963 bne test_failed
12964 nop
12965
12966 ! Next check that all the writable bits can be written
12967 stx %l2, [%g2] ! store inverted POR value
12968 ldx [%g2], %g4
12969 xorcc %g7, %g4, %g5
12970 bne test_failed
12971 nop
12972
12973
12974 ! First check that the POR value is correct
12975 add %g2, 8, %g2
12976 ldx [%g2], %g4
12977 xorcc %g3, %g4, %g5
12978 bne test_failed
12979 nop
12980
12981 ! Next check that all the writable bits can be written
12982 stx %l2, [%g2] ! store inverted POR value
12983 ldx [%g2], %g4
12984 xorcc %g7, %g4, %g5
12985 bne test_failed
12986 nop
12987
12988
12989 ! First check that the POR value is correct
12990 add %g2, 8, %g2
12991 ldx [%g2], %g4
12992 xorcc %g3, %g4, %g5
12993 bne test_failed
12994 nop
12995
12996 ! Next check that all the writable bits can be written
12997 stx %l2, [%g2] ! store inverted POR value
12998 ldx [%g2], %g4
12999 xorcc %g7, %g4, %g5
13000 bne test_failed
13001 nop
13002
13003
13004 ! First check that the POR value is correct
13005 add %g2, 8, %g2
13006 ldx [%g2], %g4
13007 xorcc %g3, %g4, %g5
13008 bne test_failed
13009 nop
13010
13011 ! Next check that all the writable bits can be written
13012 stx %l2, [%g2] ! store inverted POR value
13013 ldx [%g2], %g4
13014 xorcc %g7, %g4, %g5
13015 bne test_failed
13016 nop
13017
13018
13019 ! First check that the POR value is correct
13020 add %g2, 8, %g2
13021 ldx [%g2], %g4
13022 xorcc %g3, %g4, %g5
13023 bne test_failed
13024 nop
13025
13026 ! Next check that all the writable bits can be written
13027 stx %l2, [%g2] ! store inverted POR value
13028 ldx [%g2], %g4
13029 xorcc %g7, %g4, %g5
13030 bne test_failed
13031 nop
13032
13033
13034 ! First check that the POR value is correct
13035 add %g2, 8, %g2
13036 ldx [%g2], %g4
13037 xorcc %g3, %g4, %g5
13038 bne test_failed
13039 nop
13040
13041 ! Next check that all the writable bits can be written
13042 stx %l2, [%g2] ! store inverted POR value
13043 ldx [%g2], %g4
13044 xorcc %g7, %g4, %g5
13045 bne test_failed
13046 nop
13047
13048
13049 ! First check that the POR value is correct
13050 add %g2, 8, %g2
13051 ldx [%g2], %g4
13052 xorcc %g3, %g4, %g5
13053 bne test_failed
13054 nop
13055
13056 ! Next check that all the writable bits can be written
13057 stx %l2, [%g2] ! store inverted POR value
13058 ldx [%g2], %g4
13059 xorcc %g7, %g4, %g5
13060 bne test_failed
13061 nop
13062
13063
13064 ! First check that the POR value is correct
13065 add %g2, 8, %g2
13066 ldx [%g2], %g4
13067 xorcc %g3, %g4, %g5
13068 bne test_failed
13069 nop
13070
13071 ! Next check that all the writable bits can be written
13072 stx %l2, [%g2] ! store inverted POR value
13073 ldx [%g2], %g4
13074 xorcc %g7, %g4, %g5
13075 bne test_failed
13076 nop
13077
13078
13079 ! First check that the POR value is correct
13080 add %g2, 8, %g2
13081 ldx [%g2], %g4
13082 xorcc %g3, %g4, %g5
13083 bne test_failed
13084 nop
13085
13086 ! Next check that all the writable bits can be written
13087 stx %l2, [%g2] ! store inverted POR value
13088 ldx [%g2], %g4
13089 xorcc %g7, %g4, %g5
13090 bne test_failed
13091 nop
13092
13093
13094 ! First check that the POR value is correct
13095 add %g2, 8, %g2
13096 ldx [%g2], %g4
13097 xorcc %g3, %g4, %g5
13098 bne test_failed
13099 nop
13100
13101 ! Next check that all the writable bits can be written
13102 stx %l2, [%g2] ! store inverted POR value
13103 ldx [%g2], %g4
13104 xorcc %g7, %g4, %g5
13105 bne test_failed
13106 nop
13107
13108
13109 ! First check that the POR value is correct
13110 add %g2, 8, %g2
13111 ldx [%g2], %g4
13112 xorcc %g3, %g4, %g5
13113 bne test_failed
13114 nop
13115
13116 ! Next check that all the writable bits can be written
13117 stx %l2, [%g2] ! store inverted POR value
13118 ldx [%g2], %g4
13119 xorcc %g7, %g4, %g5
13120 bne test_failed
13121 nop
13122
13123
13124 ! First check that the POR value is correct
13125 add %g2, 8, %g2
13126 ldx [%g2], %g4
13127 xorcc %g3, %g4, %g5
13128 bne test_failed
13129 nop
13130
13131 ! Next check that all the writable bits can be written
13132 stx %l2, [%g2] ! store inverted POR value
13133 ldx [%g2], %g4
13134 xorcc %g7, %g4, %g5
13135 bne test_failed
13136 nop
13137
13138
13139 ! First check that the POR value is correct
13140 add %g2, 8, %g2
13141 ldx [%g2], %g4
13142 xorcc %g3, %g4, %g5
13143 bne test_failed
13144 nop
13145
13146 ! Next check that all the writable bits can be written
13147 stx %l2, [%g2] ! store inverted POR value
13148 ldx [%g2], %g4
13149 xorcc %g7, %g4, %g5
13150 bne test_failed
13151 nop
13152
13153
13154 ! First check that the POR value is correct
13155 add %g2, 8, %g2
13156 ldx [%g2], %g4
13157 xorcc %g3, %g4, %g5
13158 bne test_failed
13159 nop
13160
13161 ! Next check that all the writable bits can be written
13162 stx %l2, [%g2] ! store inverted POR value
13163 ldx [%g2], %g4
13164 xorcc %g7, %g4, %g5
13165 bne test_failed
13166 nop
13167
13168
13169 ! First check that the POR value is correct
13170 add %g2, 8, %g2
13171 ldx [%g2], %g4
13172 xorcc %g3, %g4, %g5
13173 bne test_failed
13174 nop
13175
13176 ! Next check that all the writable bits can be written
13177 stx %l2, [%g2] ! store inverted POR value
13178 ldx [%g2], %g4
13179 xorcc %g7, %g4, %g5
13180 bne test_failed
13181 nop
13182
13183
13184 ! First check that the POR value is correct
13185 add %g2, 8, %g2
13186 ldx [%g2], %g4
13187 xorcc %g3, %g4, %g5
13188 bne test_failed
13189 nop
13190
13191 ! Next check that all the writable bits can be written
13192 stx %l2, [%g2] ! store inverted POR value
13193 ldx [%g2], %g4
13194 xorcc %g7, %g4, %g5
13195 bne test_failed
13196 nop
13197
13198
13199 ! First check that the POR value is correct
13200 add %g2, 8, %g2
13201 ldx [%g2], %g4
13202 xorcc %g3, %g4, %g5
13203 bne test_failed
13204 nop
13205
13206 ! Next check that all the writable bits can be written
13207 stx %l2, [%g2] ! store inverted POR value
13208 ldx [%g2], %g4
13209 xorcc %g7, %g4, %g5
13210 bne test_failed
13211 nop
13212
13213
13214 ! First check that the POR value is correct
13215 add %g2, 8, %g2
13216 ldx [%g2], %g4
13217 xorcc %g3, %g4, %g5
13218 bne test_failed
13219 nop
13220
13221 ! Next check that all the writable bits can be written
13222 stx %l2, [%g2] ! store inverted POR value
13223 ldx [%g2], %g4
13224 xorcc %g7, %g4, %g5
13225 bne test_failed
13226 nop
13227
13228
13229 ! First check that the POR value is correct
13230 add %g2, 8, %g2
13231 ldx [%g2], %g4
13232 xorcc %g3, %g4, %g5
13233 bne test_failed
13234 nop
13235
13236 ! Next check that all the writable bits can be written
13237 stx %l2, [%g2] ! store inverted POR value
13238 ldx [%g2], %g4
13239 xorcc %g7, %g4, %g5
13240 bne test_failed
13241 nop
13242
13243
13244 ! First check that the POR value is correct
13245 add %g2, 8, %g2
13246 ldx [%g2], %g4
13247 xorcc %g3, %g4, %g5
13248 bne test_failed
13249 nop
13250
13251 ! Next check that all the writable bits can be written
13252 stx %l2, [%g2] ! store inverted POR value
13253 ldx [%g2], %g4
13254 xorcc %g7, %g4, %g5
13255 bne test_failed
13256 nop
13257
13258
13259 ! First check that the POR value is correct
13260 add %g2, 8, %g2
13261 ldx [%g2], %g4
13262 xorcc %g3, %g4, %g5
13263 bne test_failed
13264 nop
13265
13266 ! Next check that all the writable bits can be written
13267 stx %l2, [%g2] ! store inverted POR value
13268 ldx [%g2], %g4
13269 xorcc %g7, %g4, %g5
13270 bne test_failed
13271 nop
13272
13273
13274 ! First check that the POR value is correct
13275 add %g2, 8, %g2
13276 ldx [%g2], %g4
13277 xorcc %g3, %g4, %g5
13278 bne test_failed
13279 nop
13280
13281 ! Next check that all the writable bits can be written
13282 stx %l2, [%g2] ! store inverted POR value
13283 ldx [%g2], %g4
13284 xorcc %g7, %g4, %g5
13285 bne test_failed
13286 nop
13287
13288
13289 ! First check that the POR value is correct
13290 add %g2, 8, %g2
13291 ldx [%g2], %g4
13292 xorcc %g3, %g4, %g5
13293 bne test_failed
13294 nop
13295
13296 ! Next check that all the writable bits can be written
13297 stx %l2, [%g2] ! store inverted POR value
13298 ldx [%g2], %g4
13299 xorcc %g7, %g4, %g5
13300 bne test_failed
13301 nop
13302
13303
13304 ! First check that the POR value is correct
13305 add %g2, 8, %g2
13306 ldx [%g2], %g4
13307 xorcc %g3, %g4, %g5
13308 bne test_failed
13309 nop
13310
13311 ! Next check that all the writable bits can be written
13312 stx %l2, [%g2] ! store inverted POR value
13313 ldx [%g2], %g4
13314 xorcc %g7, %g4, %g5
13315 bne test_failed
13316 nop
13317
13318
13319 ! First check that the POR value is correct
13320 add %g2, 8, %g2
13321 ldx [%g2], %g4
13322 xorcc %g3, %g4, %g5
13323 bne test_failed
13324 nop
13325
13326 ! Next check that all the writable bits can be written
13327 stx %l2, [%g2] ! store inverted POR value
13328 ldx [%g2], %g4
13329 xorcc %g7, %g4, %g5
13330 bne test_failed
13331 nop
13332
13333
13334 ! First check that the POR value is correct
13335 add %g2, 8, %g2
13336 ldx [%g2], %g4
13337 xorcc %g3, %g4, %g5
13338 bne test_failed
13339 nop
13340
13341 ! Next check that all the writable bits can be written
13342 stx %l2, [%g2] ! store inverted POR value
13343 ldx [%g2], %g4
13344 xorcc %g7, %g4, %g5
13345 bne test_failed
13346 nop
13347
13348
13349 ! First check that the POR value is correct
13350 add %g2, 8, %g2
13351 ldx [%g2], %g4
13352 xorcc %g3, %g4, %g5
13353 bne test_failed
13354 nop
13355
13356 ! Next check that all the writable bits can be written
13357 stx %l2, [%g2] ! store inverted POR value
13358 ldx [%g2], %g4
13359 xorcc %g7, %g4, %g5
13360 bne test_failed
13361 nop
13362
13363
13364 ! First check that the POR value is correct
13365 add %g2, 8, %g2
13366 ldx [%g2], %g4
13367 xorcc %g3, %g4, %g5
13368 bne test_failed
13369 nop
13370
13371 ! Next check that all the writable bits can be written
13372 stx %l2, [%g2] ! store inverted POR value
13373 ldx [%g2], %g4
13374 xorcc %g7, %g4, %g5
13375 bne test_failed
13376 nop
13377
13378
13379 ! First check that the POR value is correct
13380 add %g2, 8, %g2
13381 ldx [%g2], %g4
13382 xorcc %g3, %g4, %g5
13383 bne test_failed
13384 nop
13385
13386 ! Next check that all the writable bits can be written
13387 stx %l2, [%g2] ! store inverted POR value
13388 ldx [%g2], %g4
13389 xorcc %g7, %g4, %g5
13390 bne test_failed
13391 nop
13392
13393
13394 ! First check that the POR value is correct
13395 add %g2, 8, %g2
13396 ldx [%g2], %g4
13397 xorcc %g3, %g4, %g5
13398 bne test_failed
13399 nop
13400
13401 ! Next check that all the writable bits can be written
13402 stx %l2, [%g2] ! store inverted POR value
13403 ldx [%g2], %g4
13404 xorcc %g7, %g4, %g5
13405 bne test_failed
13406 nop
13407
13408
13409 ! First check that the POR value is correct
13410 add %g2, 8, %g2
13411 ldx [%g2], %g4
13412 xorcc %g3, %g4, %g5
13413 bne test_failed
13414 nop
13415
13416 ! Next check that all the writable bits can be written
13417 stx %l2, [%g2] ! store inverted POR value
13418 ldx [%g2], %g4
13419 xorcc %g7, %g4, %g5
13420 bne test_failed
13421 nop
13422
13423
13424 ! First check that the POR value is correct
13425 add %g2, 8, %g2
13426 ldx [%g2], %g4
13427 xorcc %g3, %g4, %g5
13428 bne test_failed
13429 nop
13430
13431 ! Next check that all the writable bits can be written
13432 stx %l2, [%g2] ! store inverted POR value
13433 ldx [%g2], %g4
13434 xorcc %g7, %g4, %g5
13435 bne test_failed
13436 nop
13437
13438
13439 ! First check that the POR value is correct
13440 add %g2, 8, %g2
13441 ldx [%g2], %g4
13442 xorcc %g3, %g4, %g5
13443 bne test_failed
13444 nop
13445
13446 ! Next check that all the writable bits can be written
13447 stx %l2, [%g2] ! store inverted POR value
13448 ldx [%g2], %g4
13449 xorcc %g7, %g4, %g5
13450 bne test_failed
13451 nop
13452
13453
13454 ! First check that the POR value is correct
13455 add %g2, 8, %g2
13456 ldx [%g2], %g4
13457 xorcc %g3, %g4, %g5
13458 bne test_failed
13459 nop
13460
13461 ! Next check that all the writable bits can be written
13462 stx %l2, [%g2] ! store inverted POR value
13463 ldx [%g2], %g4
13464 xorcc %g7, %g4, %g5
13465 bne test_failed
13466 nop
13467
13468
13469 ! First check that the POR value is correct
13470 add %g2, 8, %g2
13471 ldx [%g2], %g4
13472 xorcc %g3, %g4, %g5
13473 bne test_failed
13474 nop
13475
13476 ! Next check that all the writable bits can be written
13477 stx %l2, [%g2] ! store inverted POR value
13478 ldx [%g2], %g4
13479 xorcc %g7, %g4, %g5
13480 bne test_failed
13481 nop
13482
13483
13484 ! First check that the POR value is correct
13485 add %g2, 8, %g2
13486 ldx [%g2], %g4
13487 xorcc %g3, %g4, %g5
13488 bne test_failed
13489 nop
13490
13491 ! Next check that all the writable bits can be written
13492 stx %l2, [%g2] ! store inverted POR value
13493 ldx [%g2], %g4
13494 xorcc %g7, %g4, %g5
13495 bne test_failed
13496 nop
13497
13498
13499 ! First check that the POR value is correct
13500 add %g2, 8, %g2
13501 ldx [%g2], %g4
13502 xorcc %g3, %g4, %g5
13503 bne test_failed
13504 nop
13505
13506 ! Next check that all the writable bits can be written
13507 stx %l2, [%g2] ! store inverted POR value
13508 ldx [%g2], %g4
13509 xorcc %g7, %g4, %g5
13510 bne test_failed
13511 nop
13512
13513
13514 ba test_passed
13515 nop
13516
13517thread_5:
13518
13519REG_TEST_143:
13520 ! First check that the POR value is correct
13521 setx FIRE_DLC_IMU_RDS_MSI_CSR_A_MSI_CLEAR_REG_RW1S_ALIAS_ADDR, %g1, %g2
13522 best_set_reg(FIRE_DLC_IMU_RDS_MSI_CSR_A_MSI_CLEAR_REG_RW1S_ALIAS_POR_VALUE, %g1, %g3)
13523 ldx [%g2], %g4
13524 xorcc %g3, %g4, %g5
13525 bne test_failed
13526 nop
13527
13528 ! Next check that all the writable bits can be written
13529 xor %g3, %l1, %l2
13530 stx %l2, [%g2] ! store inverted POR value
13531
13532#define REG_143_EXP_VALUE mpeval( (~FIRE_DLC_IMU_RDS_MSI_CSR_A_MSI_CLEAR_REG_RW1S_ALIAS_POR_VALUE & FIRE_DLC_IMU_RDS_MSI_CSR_A_MSI_CLEAR_REG_RW1S_ALIAS_WRITE_MASK) | (FIRE_DLC_IMU_RDS_MSI_CSR_A_MSI_CLEAR_REG_RW1S_ALIAS_POR_VALUE & ~FIRE_DLC_IMU_RDS_MSI_CSR_A_MSI_CLEAR_REG_RW1S_ALIAS_WRITE_MASK) )
13533
13534 best_set_reg(REG_143_EXP_VALUE, %g1, %g7) ! get expected value
13535 ldx [%g2], %g4
13536 xorcc %g7, %g4, %g5
13537 bne test_failed
13538 nop
13539
13540
13541 ! First check that the POR value is correct
13542 add %g2, 8, %g2
13543 ldx [%g2], %g4
13544 xorcc %g3, %g4, %g5
13545 bne test_failed
13546 nop
13547
13548 ! Next check that all the writable bits can be written
13549 stx %l2, [%g2] ! store inverted POR value
13550 ldx [%g2], %g4
13551 xorcc %g7, %g4, %g5
13552 bne test_failed
13553 nop
13554
13555
13556 ! First check that the POR value is correct
13557 add %g2, 8, %g2
13558 ldx [%g2], %g4
13559 xorcc %g3, %g4, %g5
13560 bne test_failed
13561 nop
13562
13563 ! Next check that all the writable bits can be written
13564 stx %l2, [%g2] ! store inverted POR value
13565 ldx [%g2], %g4
13566 xorcc %g7, %g4, %g5
13567 bne test_failed
13568 nop
13569
13570
13571 ! First check that the POR value is correct
13572 add %g2, 8, %g2
13573 ldx [%g2], %g4
13574 xorcc %g3, %g4, %g5
13575 bne test_failed
13576 nop
13577
13578 ! Next check that all the writable bits can be written
13579 stx %l2, [%g2] ! store inverted POR value
13580 ldx [%g2], %g4
13581 xorcc %g7, %g4, %g5
13582 bne test_failed
13583 nop
13584
13585
13586 ! First check that the POR value is correct
13587 add %g2, 8, %g2
13588 ldx [%g2], %g4
13589 xorcc %g3, %g4, %g5
13590 bne test_failed
13591 nop
13592
13593 ! Next check that all the writable bits can be written
13594 stx %l2, [%g2] ! store inverted POR value
13595 ldx [%g2], %g4
13596 xorcc %g7, %g4, %g5
13597 bne test_failed
13598 nop
13599
13600
13601 ! First check that the POR value is correct
13602 add %g2, 8, %g2
13603 ldx [%g2], %g4
13604 xorcc %g3, %g4, %g5
13605 bne test_failed
13606 nop
13607
13608 ! Next check that all the writable bits can be written
13609 stx %l2, [%g2] ! store inverted POR value
13610 ldx [%g2], %g4
13611 xorcc %g7, %g4, %g5
13612 bne test_failed
13613 nop
13614
13615
13616 ! First check that the POR value is correct
13617 add %g2, 8, %g2
13618 ldx [%g2], %g4
13619 xorcc %g3, %g4, %g5
13620 bne test_failed
13621 nop
13622
13623 ! Next check that all the writable bits can be written
13624 stx %l2, [%g2] ! store inverted POR value
13625 ldx [%g2], %g4
13626 xorcc %g7, %g4, %g5
13627 bne test_failed
13628 nop
13629
13630
13631 ! First check that the POR value is correct
13632 add %g2, 8, %g2
13633 ldx [%g2], %g4
13634 xorcc %g3, %g4, %g5
13635 bne test_failed
13636 nop
13637
13638 ! Next check that all the writable bits can be written
13639 stx %l2, [%g2] ! store inverted POR value
13640 ldx [%g2], %g4
13641 xorcc %g7, %g4, %g5
13642 bne test_failed
13643 nop
13644
13645
13646 ! First check that the POR value is correct
13647 add %g2, 8, %g2
13648 ldx [%g2], %g4
13649 xorcc %g3, %g4, %g5
13650 bne test_failed
13651 nop
13652
13653 ! Next check that all the writable bits can be written
13654 stx %l2, [%g2] ! store inverted POR value
13655 ldx [%g2], %g4
13656 xorcc %g7, %g4, %g5
13657 bne test_failed
13658 nop
13659
13660
13661 ! First check that the POR value is correct
13662 add %g2, 8, %g2
13663 ldx [%g2], %g4
13664 xorcc %g3, %g4, %g5
13665 bne test_failed
13666 nop
13667
13668 ! Next check that all the writable bits can be written
13669 stx %l2, [%g2] ! store inverted POR value
13670 ldx [%g2], %g4
13671 xorcc %g7, %g4, %g5
13672 bne test_failed
13673 nop
13674
13675
13676 ! First check that the POR value is correct
13677 add %g2, 8, %g2
13678 ldx [%g2], %g4
13679 xorcc %g3, %g4, %g5
13680 bne test_failed
13681 nop
13682
13683 ! Next check that all the writable bits can be written
13684 stx %l2, [%g2] ! store inverted POR value
13685 ldx [%g2], %g4
13686 xorcc %g7, %g4, %g5
13687 bne test_failed
13688 nop
13689
13690
13691 ! First check that the POR value is correct
13692 add %g2, 8, %g2
13693 ldx [%g2], %g4
13694 xorcc %g3, %g4, %g5
13695 bne test_failed
13696 nop
13697
13698 ! Next check that all the writable bits can be written
13699 stx %l2, [%g2] ! store inverted POR value
13700 ldx [%g2], %g4
13701 xorcc %g7, %g4, %g5
13702 bne test_failed
13703 nop
13704
13705
13706 ! First check that the POR value is correct
13707 add %g2, 8, %g2
13708 ldx [%g2], %g4
13709 xorcc %g3, %g4, %g5
13710 bne test_failed
13711 nop
13712
13713 ! Next check that all the writable bits can be written
13714 stx %l2, [%g2] ! store inverted POR value
13715 ldx [%g2], %g4
13716 xorcc %g7, %g4, %g5
13717 bne test_failed
13718 nop
13719
13720
13721 ! First check that the POR value is correct
13722 add %g2, 8, %g2
13723 ldx [%g2], %g4
13724 xorcc %g3, %g4, %g5
13725 bne test_failed
13726 nop
13727
13728 ! Next check that all the writable bits can be written
13729 stx %l2, [%g2] ! store inverted POR value
13730 ldx [%g2], %g4
13731 xorcc %g7, %g4, %g5
13732 bne test_failed
13733 nop
13734
13735
13736 ! First check that the POR value is correct
13737 add %g2, 8, %g2
13738 ldx [%g2], %g4
13739 xorcc %g3, %g4, %g5
13740 bne test_failed
13741 nop
13742
13743 ! Next check that all the writable bits can be written
13744 stx %l2, [%g2] ! store inverted POR value
13745 ldx [%g2], %g4
13746 xorcc %g7, %g4, %g5
13747 bne test_failed
13748 nop
13749
13750
13751 ! First check that the POR value is correct
13752 add %g2, 8, %g2
13753 ldx [%g2], %g4
13754 xorcc %g3, %g4, %g5
13755 bne test_failed
13756 nop
13757
13758 ! Next check that all the writable bits can be written
13759 stx %l2, [%g2] ! store inverted POR value
13760 ldx [%g2], %g4
13761 xorcc %g7, %g4, %g5
13762 bne test_failed
13763 nop
13764
13765
13766 ! First check that the POR value is correct
13767 add %g2, 8, %g2
13768 ldx [%g2], %g4
13769 xorcc %g3, %g4, %g5
13770 bne test_failed
13771 nop
13772
13773 ! Next check that all the writable bits can be written
13774 stx %l2, [%g2] ! store inverted POR value
13775 ldx [%g2], %g4
13776 xorcc %g7, %g4, %g5
13777 bne test_failed
13778 nop
13779
13780
13781 ! First check that the POR value is correct
13782 add %g2, 8, %g2
13783 ldx [%g2], %g4
13784 xorcc %g3, %g4, %g5
13785 bne test_failed
13786 nop
13787
13788 ! Next check that all the writable bits can be written
13789 stx %l2, [%g2] ! store inverted POR value
13790 ldx [%g2], %g4
13791 xorcc %g7, %g4, %g5
13792 bne test_failed
13793 nop
13794
13795
13796 ! First check that the POR value is correct
13797 add %g2, 8, %g2
13798 ldx [%g2], %g4
13799 xorcc %g3, %g4, %g5
13800 bne test_failed
13801 nop
13802
13803 ! Next check that all the writable bits can be written
13804 stx %l2, [%g2] ! store inverted POR value
13805 ldx [%g2], %g4
13806 xorcc %g7, %g4, %g5
13807 bne test_failed
13808 nop
13809
13810
13811 ! First check that the POR value is correct
13812 add %g2, 8, %g2
13813 ldx [%g2], %g4
13814 xorcc %g3, %g4, %g5
13815 bne test_failed
13816 nop
13817
13818 ! Next check that all the writable bits can be written
13819 stx %l2, [%g2] ! store inverted POR value
13820 ldx [%g2], %g4
13821 xorcc %g7, %g4, %g5
13822 bne test_failed
13823 nop
13824
13825
13826 ! First check that the POR value is correct
13827 add %g2, 8, %g2
13828 ldx [%g2], %g4
13829 xorcc %g3, %g4, %g5
13830 bne test_failed
13831 nop
13832
13833 ! Next check that all the writable bits can be written
13834 stx %l2, [%g2] ! store inverted POR value
13835 ldx [%g2], %g4
13836 xorcc %g7, %g4, %g5
13837 bne test_failed
13838 nop
13839
13840
13841 ! First check that the POR value is correct
13842 add %g2, 8, %g2
13843 ldx [%g2], %g4
13844 xorcc %g3, %g4, %g5
13845 bne test_failed
13846 nop
13847
13848 ! Next check that all the writable bits can be written
13849 stx %l2, [%g2] ! store inverted POR value
13850 ldx [%g2], %g4
13851 xorcc %g7, %g4, %g5
13852 bne test_failed
13853 nop
13854
13855
13856 ! First check that the POR value is correct
13857 add %g2, 8, %g2
13858 ldx [%g2], %g4
13859 xorcc %g3, %g4, %g5
13860 bne test_failed
13861 nop
13862
13863 ! Next check that all the writable bits can be written
13864 stx %l2, [%g2] ! store inverted POR value
13865 ldx [%g2], %g4
13866 xorcc %g7, %g4, %g5
13867 bne test_failed
13868 nop
13869
13870
13871 ! First check that the POR value is correct
13872 add %g2, 8, %g2
13873 ldx [%g2], %g4
13874 xorcc %g3, %g4, %g5
13875 bne test_failed
13876 nop
13877
13878 ! Next check that all the writable bits can be written
13879 stx %l2, [%g2] ! store inverted POR value
13880 ldx [%g2], %g4
13881 xorcc %g7, %g4, %g5
13882 bne test_failed
13883 nop
13884
13885
13886 ! First check that the POR value is correct
13887 add %g2, 8, %g2
13888 ldx [%g2], %g4
13889 xorcc %g3, %g4, %g5
13890 bne test_failed
13891 nop
13892
13893 ! Next check that all the writable bits can be written
13894 stx %l2, [%g2] ! store inverted POR value
13895 ldx [%g2], %g4
13896 xorcc %g7, %g4, %g5
13897 bne test_failed
13898 nop
13899
13900
13901 ! First check that the POR value is correct
13902 add %g2, 8, %g2
13903 ldx [%g2], %g4
13904 xorcc %g3, %g4, %g5
13905 bne test_failed
13906 nop
13907
13908 ! Next check that all the writable bits can be written
13909 stx %l2, [%g2] ! store inverted POR value
13910 ldx [%g2], %g4
13911 xorcc %g7, %g4, %g5
13912 bne test_failed
13913 nop
13914
13915
13916 ! First check that the POR value is correct
13917 add %g2, 8, %g2
13918 ldx [%g2], %g4
13919 xorcc %g3, %g4, %g5
13920 bne test_failed
13921 nop
13922
13923 ! Next check that all the writable bits can be written
13924 stx %l2, [%g2] ! store inverted POR value
13925 ldx [%g2], %g4
13926 xorcc %g7, %g4, %g5
13927 bne test_failed
13928 nop
13929
13930
13931 ! First check that the POR value is correct
13932 add %g2, 8, %g2
13933 ldx [%g2], %g4
13934 xorcc %g3, %g4, %g5
13935 bne test_failed
13936 nop
13937
13938 ! Next check that all the writable bits can be written
13939 stx %l2, [%g2] ! store inverted POR value
13940 ldx [%g2], %g4
13941 xorcc %g7, %g4, %g5
13942 bne test_failed
13943 nop
13944
13945
13946 ! First check that the POR value is correct
13947 add %g2, 8, %g2
13948 ldx [%g2], %g4
13949 xorcc %g3, %g4, %g5
13950 bne test_failed
13951 nop
13952
13953 ! Next check that all the writable bits can be written
13954 stx %l2, [%g2] ! store inverted POR value
13955 ldx [%g2], %g4
13956 xorcc %g7, %g4, %g5
13957 bne test_failed
13958 nop
13959
13960
13961 ! First check that the POR value is correct
13962 add %g2, 8, %g2
13963 ldx [%g2], %g4
13964 xorcc %g3, %g4, %g5
13965 bne test_failed
13966 nop
13967
13968 ! Next check that all the writable bits can be written
13969 stx %l2, [%g2] ! store inverted POR value
13970 ldx [%g2], %g4
13971 xorcc %g7, %g4, %g5
13972 bne test_failed
13973 nop
13974
13975
13976 ! First check that the POR value is correct
13977 add %g2, 8, %g2
13978 ldx [%g2], %g4
13979 xorcc %g3, %g4, %g5
13980 bne test_failed
13981 nop
13982
13983 ! Next check that all the writable bits can be written
13984 stx %l2, [%g2] ! store inverted POR value
13985 ldx [%g2], %g4
13986 xorcc %g7, %g4, %g5
13987 bne test_failed
13988 nop
13989
13990
13991 ! First check that the POR value is correct
13992 add %g2, 8, %g2
13993 ldx [%g2], %g4
13994 xorcc %g3, %g4, %g5
13995 bne test_failed
13996 nop
13997
13998 ! Next check that all the writable bits can be written
13999 stx %l2, [%g2] ! store inverted POR value
14000 ldx [%g2], %g4
14001 xorcc %g7, %g4, %g5
14002 bne test_failed
14003 nop
14004
14005
14006 ! First check that the POR value is correct
14007 add %g2, 8, %g2
14008 ldx [%g2], %g4
14009 xorcc %g3, %g4, %g5
14010 bne test_failed
14011 nop
14012
14013 ! Next check that all the writable bits can be written
14014 stx %l2, [%g2] ! store inverted POR value
14015 ldx [%g2], %g4
14016 xorcc %g7, %g4, %g5
14017 bne test_failed
14018 nop
14019
14020
14021 ! First check that the POR value is correct
14022 add %g2, 8, %g2
14023 ldx [%g2], %g4
14024 xorcc %g3, %g4, %g5
14025 bne test_failed
14026 nop
14027
14028 ! Next check that all the writable bits can be written
14029 stx %l2, [%g2] ! store inverted POR value
14030 ldx [%g2], %g4
14031 xorcc %g7, %g4, %g5
14032 bne test_failed
14033 nop
14034
14035
14036 ! First check that the POR value is correct
14037 add %g2, 8, %g2
14038 ldx [%g2], %g4
14039 xorcc %g3, %g4, %g5
14040 bne test_failed
14041 nop
14042
14043 ! Next check that all the writable bits can be written
14044 stx %l2, [%g2] ! store inverted POR value
14045 ldx [%g2], %g4
14046 xorcc %g7, %g4, %g5
14047 bne test_failed
14048 nop
14049
14050
14051 ! First check that the POR value is correct
14052 add %g2, 8, %g2
14053 ldx [%g2], %g4
14054 xorcc %g3, %g4, %g5
14055 bne test_failed
14056 nop
14057
14058 ! Next check that all the writable bits can be written
14059 stx %l2, [%g2] ! store inverted POR value
14060 ldx [%g2], %g4
14061 xorcc %g7, %g4, %g5
14062 bne test_failed
14063 nop
14064
14065
14066 ! First check that the POR value is correct
14067 add %g2, 8, %g2
14068 ldx [%g2], %g4
14069 xorcc %g3, %g4, %g5
14070 bne test_failed
14071 nop
14072
14073 ! Next check that all the writable bits can be written
14074 stx %l2, [%g2] ! store inverted POR value
14075 ldx [%g2], %g4
14076 xorcc %g7, %g4, %g5
14077 bne test_failed
14078 nop
14079
14080
14081 ! First check that the POR value is correct
14082 add %g2, 8, %g2
14083 ldx [%g2], %g4
14084 xorcc %g3, %g4, %g5
14085 bne test_failed
14086 nop
14087
14088 ! Next check that all the writable bits can be written
14089 stx %l2, [%g2] ! store inverted POR value
14090 ldx [%g2], %g4
14091 xorcc %g7, %g4, %g5
14092 bne test_failed
14093 nop
14094
14095
14096 ! First check that the POR value is correct
14097 add %g2, 8, %g2
14098 ldx [%g2], %g4
14099 xorcc %g3, %g4, %g5
14100 bne test_failed
14101 nop
14102
14103 ! Next check that all the writable bits can be written
14104 stx %l2, [%g2] ! store inverted POR value
14105 ldx [%g2], %g4
14106 xorcc %g7, %g4, %g5
14107 bne test_failed
14108 nop
14109
14110
14111 ! First check that the POR value is correct
14112 add %g2, 8, %g2
14113 ldx [%g2], %g4
14114 xorcc %g3, %g4, %g5
14115 bne test_failed
14116 nop
14117
14118 ! Next check that all the writable bits can be written
14119 stx %l2, [%g2] ! store inverted POR value
14120 ldx [%g2], %g4
14121 xorcc %g7, %g4, %g5
14122 bne test_failed
14123 nop
14124
14125
14126 ! First check that the POR value is correct
14127 add %g2, 8, %g2
14128 ldx [%g2], %g4
14129 xorcc %g3, %g4, %g5
14130 bne test_failed
14131 nop
14132
14133 ! Next check that all the writable bits can be written
14134 stx %l2, [%g2] ! store inverted POR value
14135 ldx [%g2], %g4
14136 xorcc %g7, %g4, %g5
14137 bne test_failed
14138 nop
14139
14140
14141 ! First check that the POR value is correct
14142 add %g2, 8, %g2
14143 ldx [%g2], %g4
14144 xorcc %g3, %g4, %g5
14145 bne test_failed
14146 nop
14147
14148 ! Next check that all the writable bits can be written
14149 stx %l2, [%g2] ! store inverted POR value
14150 ldx [%g2], %g4
14151 xorcc %g7, %g4, %g5
14152 bne test_failed
14153 nop
14154
14155
14156 ! First check that the POR value is correct
14157 add %g2, 8, %g2
14158 ldx [%g2], %g4
14159 xorcc %g3, %g4, %g5
14160 bne test_failed
14161 nop
14162
14163 ! Next check that all the writable bits can be written
14164 stx %l2, [%g2] ! store inverted POR value
14165 ldx [%g2], %g4
14166 xorcc %g7, %g4, %g5
14167 bne test_failed
14168 nop
14169
14170
14171 ! First check that the POR value is correct
14172 add %g2, 8, %g2
14173 ldx [%g2], %g4
14174 xorcc %g3, %g4, %g5
14175 bne test_failed
14176 nop
14177
14178 ! Next check that all the writable bits can be written
14179 stx %l2, [%g2] ! store inverted POR value
14180 ldx [%g2], %g4
14181 xorcc %g7, %g4, %g5
14182 bne test_failed
14183 nop
14184
14185
14186 ! First check that the POR value is correct
14187 add %g2, 8, %g2
14188 ldx [%g2], %g4
14189 xorcc %g3, %g4, %g5
14190 bne test_failed
14191 nop
14192
14193 ! Next check that all the writable bits can be written
14194 stx %l2, [%g2] ! store inverted POR value
14195 ldx [%g2], %g4
14196 xorcc %g7, %g4, %g5
14197 bne test_failed
14198 nop
14199
14200
14201 ! First check that the POR value is correct
14202 add %g2, 8, %g2
14203 ldx [%g2], %g4
14204 xorcc %g3, %g4, %g5
14205 bne test_failed
14206 nop
14207
14208 ! Next check that all the writable bits can be written
14209 stx %l2, [%g2] ! store inverted POR value
14210 ldx [%g2], %g4
14211 xorcc %g7, %g4, %g5
14212 bne test_failed
14213 nop
14214
14215
14216 ! First check that the POR value is correct
14217 add %g2, 8, %g2
14218 ldx [%g2], %g4
14219 xorcc %g3, %g4, %g5
14220 bne test_failed
14221 nop
14222
14223 ! Next check that all the writable bits can be written
14224 stx %l2, [%g2] ! store inverted POR value
14225 ldx [%g2], %g4
14226 xorcc %g7, %g4, %g5
14227 bne test_failed
14228 nop
14229
14230
14231 ! First check that the POR value is correct
14232 add %g2, 8, %g2
14233 ldx [%g2], %g4
14234 xorcc %g3, %g4, %g5
14235 bne test_failed
14236 nop
14237
14238 ! Next check that all the writable bits can be written
14239 stx %l2, [%g2] ! store inverted POR value
14240 ldx [%g2], %g4
14241 xorcc %g7, %g4, %g5
14242 bne test_failed
14243 nop
14244
14245
14246 ! First check that the POR value is correct
14247 add %g2, 8, %g2
14248 ldx [%g2], %g4
14249 xorcc %g3, %g4, %g5
14250 bne test_failed
14251 nop
14252
14253 ! Next check that all the writable bits can be written
14254 stx %l2, [%g2] ! store inverted POR value
14255 ldx [%g2], %g4
14256 xorcc %g7, %g4, %g5
14257 bne test_failed
14258 nop
14259
14260
14261 ! First check that the POR value is correct
14262 add %g2, 8, %g2
14263 ldx [%g2], %g4
14264 xorcc %g3, %g4, %g5
14265 bne test_failed
14266 nop
14267
14268 ! Next check that all the writable bits can be written
14269 stx %l2, [%g2] ! store inverted POR value
14270 ldx [%g2], %g4
14271 xorcc %g7, %g4, %g5
14272 bne test_failed
14273 nop
14274
14275
14276 ! First check that the POR value is correct
14277 add %g2, 8, %g2
14278 ldx [%g2], %g4
14279 xorcc %g3, %g4, %g5
14280 bne test_failed
14281 nop
14282
14283 ! Next check that all the writable bits can be written
14284 stx %l2, [%g2] ! store inverted POR value
14285 ldx [%g2], %g4
14286 xorcc %g7, %g4, %g5
14287 bne test_failed
14288 nop
14289
14290
14291 ! First check that the POR value is correct
14292 add %g2, 8, %g2
14293 ldx [%g2], %g4
14294 xorcc %g3, %g4, %g5
14295 bne test_failed
14296 nop
14297
14298 ! Next check that all the writable bits can be written
14299 stx %l2, [%g2] ! store inverted POR value
14300 ldx [%g2], %g4
14301 xorcc %g7, %g4, %g5
14302 bne test_failed
14303 nop
14304
14305
14306 ! First check that the POR value is correct
14307 add %g2, 8, %g2
14308 ldx [%g2], %g4
14309 xorcc %g3, %g4, %g5
14310 bne test_failed
14311 nop
14312
14313 ! Next check that all the writable bits can be written
14314 stx %l2, [%g2] ! store inverted POR value
14315 ldx [%g2], %g4
14316 xorcc %g7, %g4, %g5
14317 bne test_failed
14318 nop
14319
14320
14321 ! First check that the POR value is correct
14322 add %g2, 8, %g2
14323 ldx [%g2], %g4
14324 xorcc %g3, %g4, %g5
14325 bne test_failed
14326 nop
14327
14328 ! Next check that all the writable bits can be written
14329 stx %l2, [%g2] ! store inverted POR value
14330 ldx [%g2], %g4
14331 xorcc %g7, %g4, %g5
14332 bne test_failed
14333 nop
14334
14335
14336 ! First check that the POR value is correct
14337 add %g2, 8, %g2
14338 ldx [%g2], %g4
14339 xorcc %g3, %g4, %g5
14340 bne test_failed
14341 nop
14342
14343 ! Next check that all the writable bits can be written
14344 stx %l2, [%g2] ! store inverted POR value
14345 ldx [%g2], %g4
14346 xorcc %g7, %g4, %g5
14347 bne test_failed
14348 nop
14349
14350
14351 ! First check that the POR value is correct
14352 add %g2, 8, %g2
14353 ldx [%g2], %g4
14354 xorcc %g3, %g4, %g5
14355 bne test_failed
14356 nop
14357
14358 ! Next check that all the writable bits can be written
14359 stx %l2, [%g2] ! store inverted POR value
14360 ldx [%g2], %g4
14361 xorcc %g7, %g4, %g5
14362 bne test_failed
14363 nop
14364
14365
14366 ! First check that the POR value is correct
14367 add %g2, 8, %g2
14368 ldx [%g2], %g4
14369 xorcc %g3, %g4, %g5
14370 bne test_failed
14371 nop
14372
14373 ! Next check that all the writable bits can be written
14374 stx %l2, [%g2] ! store inverted POR value
14375 ldx [%g2], %g4
14376 xorcc %g7, %g4, %g5
14377 bne test_failed
14378 nop
14379
14380
14381 ! First check that the POR value is correct
14382 add %g2, 8, %g2
14383 ldx [%g2], %g4
14384 xorcc %g3, %g4, %g5
14385 bne test_failed
14386 nop
14387
14388 ! Next check that all the writable bits can be written
14389 stx %l2, [%g2] ! store inverted POR value
14390 ldx [%g2], %g4
14391 xorcc %g7, %g4, %g5
14392 bne test_failed
14393 nop
14394
14395
14396 ! First check that the POR value is correct
14397 add %g2, 8, %g2
14398 ldx [%g2], %g4
14399 xorcc %g3, %g4, %g5
14400 bne test_failed
14401 nop
14402
14403 ! Next check that all the writable bits can be written
14404 stx %l2, [%g2] ! store inverted POR value
14405 ldx [%g2], %g4
14406 xorcc %g7, %g4, %g5
14407 bne test_failed
14408 nop
14409
14410
14411 ! First check that the POR value is correct
14412 add %g2, 8, %g2
14413 ldx [%g2], %g4
14414 xorcc %g3, %g4, %g5
14415 bne test_failed
14416 nop
14417
14418 ! Next check that all the writable bits can be written
14419 stx %l2, [%g2] ! store inverted POR value
14420 ldx [%g2], %g4
14421 xorcc %g7, %g4, %g5
14422 bne test_failed
14423 nop
14424
14425
14426 ! First check that the POR value is correct
14427 add %g2, 8, %g2
14428 ldx [%g2], %g4
14429 xorcc %g3, %g4, %g5
14430 bne test_failed
14431 nop
14432
14433 ! Next check that all the writable bits can be written
14434 stx %l2, [%g2] ! store inverted POR value
14435 ldx [%g2], %g4
14436 xorcc %g7, %g4, %g5
14437 bne test_failed
14438 nop
14439
14440
14441 ! First check that the POR value is correct
14442 add %g2, 8, %g2
14443 ldx [%g2], %g4
14444 xorcc %g3, %g4, %g5
14445 bne test_failed
14446 nop
14447
14448 ! Next check that all the writable bits can be written
14449 stx %l2, [%g2] ! store inverted POR value
14450 ldx [%g2], %g4
14451 xorcc %g7, %g4, %g5
14452 bne test_failed
14453 nop
14454
14455
14456 ! First check that the POR value is correct
14457 add %g2, 8, %g2
14458 ldx [%g2], %g4
14459 xorcc %g3, %g4, %g5
14460 bne test_failed
14461 nop
14462
14463 ! Next check that all the writable bits can be written
14464 stx %l2, [%g2] ! store inverted POR value
14465 ldx [%g2], %g4
14466 xorcc %g7, %g4, %g5
14467 bne test_failed
14468 nop
14469
14470
14471 ! First check that the POR value is correct
14472 add %g2, 8, %g2
14473 ldx [%g2], %g4
14474 xorcc %g3, %g4, %g5
14475 bne test_failed
14476 nop
14477
14478 ! Next check that all the writable bits can be written
14479 stx %l2, [%g2] ! store inverted POR value
14480 ldx [%g2], %g4
14481 xorcc %g7, %g4, %g5
14482 bne test_failed
14483 nop
14484
14485
14486 ! First check that the POR value is correct
14487 add %g2, 8, %g2
14488 ldx [%g2], %g4
14489 xorcc %g3, %g4, %g5
14490 bne test_failed
14491 nop
14492
14493 ! Next check that all the writable bits can be written
14494 stx %l2, [%g2] ! store inverted POR value
14495 ldx [%g2], %g4
14496 xorcc %g7, %g4, %g5
14497 bne test_failed
14498 nop
14499
14500
14501 ! First check that the POR value is correct
14502 add %g2, 8, %g2
14503 ldx [%g2], %g4
14504 xorcc %g3, %g4, %g5
14505 bne test_failed
14506 nop
14507
14508 ! Next check that all the writable bits can be written
14509 stx %l2, [%g2] ! store inverted POR value
14510 ldx [%g2], %g4
14511 xorcc %g7, %g4, %g5
14512 bne test_failed
14513 nop
14514
14515
14516 ! First check that the POR value is correct
14517 add %g2, 8, %g2
14518 ldx [%g2], %g4
14519 xorcc %g3, %g4, %g5
14520 bne test_failed
14521 nop
14522
14523 ! Next check that all the writable bits can be written
14524 stx %l2, [%g2] ! store inverted POR value
14525 ldx [%g2], %g4
14526 xorcc %g7, %g4, %g5
14527 bne test_failed
14528 nop
14529
14530
14531 ! First check that the POR value is correct
14532 add %g2, 8, %g2
14533 ldx [%g2], %g4
14534 xorcc %g3, %g4, %g5
14535 bne test_failed
14536 nop
14537
14538 ! Next check that all the writable bits can be written
14539 stx %l2, [%g2] ! store inverted POR value
14540 ldx [%g2], %g4
14541 xorcc %g7, %g4, %g5
14542 bne test_failed
14543 nop
14544
14545
14546 ! First check that the POR value is correct
14547 add %g2, 8, %g2
14548 ldx [%g2], %g4
14549 xorcc %g3, %g4, %g5
14550 bne test_failed
14551 nop
14552
14553 ! Next check that all the writable bits can be written
14554 stx %l2, [%g2] ! store inverted POR value
14555 ldx [%g2], %g4
14556 xorcc %g7, %g4, %g5
14557 bne test_failed
14558 nop
14559
14560
14561 ! First check that the POR value is correct
14562 add %g2, 8, %g2
14563 ldx [%g2], %g4
14564 xorcc %g3, %g4, %g5
14565 bne test_failed
14566 nop
14567
14568 ! Next check that all the writable bits can be written
14569 stx %l2, [%g2] ! store inverted POR value
14570 ldx [%g2], %g4
14571 xorcc %g7, %g4, %g5
14572 bne test_failed
14573 nop
14574
14575
14576 ! First check that the POR value is correct
14577 add %g2, 8, %g2
14578 ldx [%g2], %g4
14579 xorcc %g3, %g4, %g5
14580 bne test_failed
14581 nop
14582
14583 ! Next check that all the writable bits can be written
14584 stx %l2, [%g2] ! store inverted POR value
14585 ldx [%g2], %g4
14586 xorcc %g7, %g4, %g5
14587 bne test_failed
14588 nop
14589
14590
14591 ! First check that the POR value is correct
14592 add %g2, 8, %g2
14593 ldx [%g2], %g4
14594 xorcc %g3, %g4, %g5
14595 bne test_failed
14596 nop
14597
14598 ! Next check that all the writable bits can be written
14599 stx %l2, [%g2] ! store inverted POR value
14600 ldx [%g2], %g4
14601 xorcc %g7, %g4, %g5
14602 bne test_failed
14603 nop
14604
14605
14606 ! First check that the POR value is correct
14607 add %g2, 8, %g2
14608 ldx [%g2], %g4
14609 xorcc %g3, %g4, %g5
14610 bne test_failed
14611 nop
14612
14613 ! Next check that all the writable bits can be written
14614 stx %l2, [%g2] ! store inverted POR value
14615 ldx [%g2], %g4
14616 xorcc %g7, %g4, %g5
14617 bne test_failed
14618 nop
14619
14620
14621 ! First check that the POR value is correct
14622 add %g2, 8, %g2
14623 ldx [%g2], %g4
14624 xorcc %g3, %g4, %g5
14625 bne test_failed
14626 nop
14627
14628 ! Next check that all the writable bits can be written
14629 stx %l2, [%g2] ! store inverted POR value
14630 ldx [%g2], %g4
14631 xorcc %g7, %g4, %g5
14632 bne test_failed
14633 nop
14634
14635
14636 ! First check that the POR value is correct
14637 add %g2, 8, %g2
14638 ldx [%g2], %g4
14639 xorcc %g3, %g4, %g5
14640 bne test_failed
14641 nop
14642
14643 ! Next check that all the writable bits can be written
14644 stx %l2, [%g2] ! store inverted POR value
14645 ldx [%g2], %g4
14646 xorcc %g7, %g4, %g5
14647 bne test_failed
14648 nop
14649
14650
14651 ! First check that the POR value is correct
14652 add %g2, 8, %g2
14653 ldx [%g2], %g4
14654 xorcc %g3, %g4, %g5
14655 bne test_failed
14656 nop
14657
14658 ! Next check that all the writable bits can be written
14659 stx %l2, [%g2] ! store inverted POR value
14660 ldx [%g2], %g4
14661 xorcc %g7, %g4, %g5
14662 bne test_failed
14663 nop
14664
14665
14666 ! First check that the POR value is correct
14667 add %g2, 8, %g2
14668 ldx [%g2], %g4
14669 xorcc %g3, %g4, %g5
14670 bne test_failed
14671 nop
14672
14673 ! Next check that all the writable bits can be written
14674 stx %l2, [%g2] ! store inverted POR value
14675 ldx [%g2], %g4
14676 xorcc %g7, %g4, %g5
14677 bne test_failed
14678 nop
14679
14680
14681 ! First check that the POR value is correct
14682 add %g2, 8, %g2
14683 ldx [%g2], %g4
14684 xorcc %g3, %g4, %g5
14685 bne test_failed
14686 nop
14687
14688 ! Next check that all the writable bits can be written
14689 stx %l2, [%g2] ! store inverted POR value
14690 ldx [%g2], %g4
14691 xorcc %g7, %g4, %g5
14692 bne test_failed
14693 nop
14694
14695
14696 ! First check that the POR value is correct
14697 add %g2, 8, %g2
14698 ldx [%g2], %g4
14699 xorcc %g3, %g4, %g5
14700 bne test_failed
14701 nop
14702
14703 ! Next check that all the writable bits can be written
14704 stx %l2, [%g2] ! store inverted POR value
14705 ldx [%g2], %g4
14706 xorcc %g7, %g4, %g5
14707 bne test_failed
14708 nop
14709
14710
14711 ! First check that the POR value is correct
14712 add %g2, 8, %g2
14713 ldx [%g2], %g4
14714 xorcc %g3, %g4, %g5
14715 bne test_failed
14716 nop
14717
14718 ! Next check that all the writable bits can be written
14719 stx %l2, [%g2] ! store inverted POR value
14720 ldx [%g2], %g4
14721 xorcc %g7, %g4, %g5
14722 bne test_failed
14723 nop
14724
14725
14726 ! First check that the POR value is correct
14727 add %g2, 8, %g2
14728 ldx [%g2], %g4
14729 xorcc %g3, %g4, %g5
14730 bne test_failed
14731 nop
14732
14733 ! Next check that all the writable bits can be written
14734 stx %l2, [%g2] ! store inverted POR value
14735 ldx [%g2], %g4
14736 xorcc %g7, %g4, %g5
14737 bne test_failed
14738 nop
14739
14740
14741 ! First check that the POR value is correct
14742 add %g2, 8, %g2
14743 ldx [%g2], %g4
14744 xorcc %g3, %g4, %g5
14745 bne test_failed
14746 nop
14747
14748 ! Next check that all the writable bits can be written
14749 stx %l2, [%g2] ! store inverted POR value
14750 ldx [%g2], %g4
14751 xorcc %g7, %g4, %g5
14752 bne test_failed
14753 nop
14754
14755
14756 ! First check that the POR value is correct
14757 add %g2, 8, %g2
14758 ldx [%g2], %g4
14759 xorcc %g3, %g4, %g5
14760 bne test_failed
14761 nop
14762
14763 ! Next check that all the writable bits can be written
14764 stx %l2, [%g2] ! store inverted POR value
14765 ldx [%g2], %g4
14766 xorcc %g7, %g4, %g5
14767 bne test_failed
14768 nop
14769
14770
14771 ! First check that the POR value is correct
14772 add %g2, 8, %g2
14773 ldx [%g2], %g4
14774 xorcc %g3, %g4, %g5
14775 bne test_failed
14776 nop
14777
14778 ! Next check that all the writable bits can be written
14779 stx %l2, [%g2] ! store inverted POR value
14780 ldx [%g2], %g4
14781 xorcc %g7, %g4, %g5
14782 bne test_failed
14783 nop
14784
14785
14786 ! First check that the POR value is correct
14787 add %g2, 8, %g2
14788 ldx [%g2], %g4
14789 xorcc %g3, %g4, %g5
14790 bne test_failed
14791 nop
14792
14793 ! Next check that all the writable bits can be written
14794 stx %l2, [%g2] ! store inverted POR value
14795 ldx [%g2], %g4
14796 xorcc %g7, %g4, %g5
14797 bne test_failed
14798 nop
14799
14800
14801 ! First check that the POR value is correct
14802 add %g2, 8, %g2
14803 ldx [%g2], %g4
14804 xorcc %g3, %g4, %g5
14805 bne test_failed
14806 nop
14807
14808 ! Next check that all the writable bits can be written
14809 stx %l2, [%g2] ! store inverted POR value
14810 ldx [%g2], %g4
14811 xorcc %g7, %g4, %g5
14812 bne test_failed
14813 nop
14814
14815
14816 ! First check that the POR value is correct
14817 add %g2, 8, %g2
14818 ldx [%g2], %g4
14819 xorcc %g3, %g4, %g5
14820 bne test_failed
14821 nop
14822
14823 ! Next check that all the writable bits can be written
14824 stx %l2, [%g2] ! store inverted POR value
14825 ldx [%g2], %g4
14826 xorcc %g7, %g4, %g5
14827 bne test_failed
14828 nop
14829
14830
14831 ! First check that the POR value is correct
14832 add %g2, 8, %g2
14833 ldx [%g2], %g4
14834 xorcc %g3, %g4, %g5
14835 bne test_failed
14836 nop
14837
14838 ! Next check that all the writable bits can be written
14839 stx %l2, [%g2] ! store inverted POR value
14840 ldx [%g2], %g4
14841 xorcc %g7, %g4, %g5
14842 bne test_failed
14843 nop
14844
14845
14846 ! First check that the POR value is correct
14847 add %g2, 8, %g2
14848 ldx [%g2], %g4
14849 xorcc %g3, %g4, %g5
14850 bne test_failed
14851 nop
14852
14853 ! Next check that all the writable bits can be written
14854 stx %l2, [%g2] ! store inverted POR value
14855 ldx [%g2], %g4
14856 xorcc %g7, %g4, %g5
14857 bne test_failed
14858 nop
14859
14860
14861 ! First check that the POR value is correct
14862 add %g2, 8, %g2
14863 ldx [%g2], %g4
14864 xorcc %g3, %g4, %g5
14865 bne test_failed
14866 nop
14867
14868 ! Next check that all the writable bits can be written
14869 stx %l2, [%g2] ! store inverted POR value
14870 ldx [%g2], %g4
14871 xorcc %g7, %g4, %g5
14872 bne test_failed
14873 nop
14874
14875
14876 ! First check that the POR value is correct
14877 add %g2, 8, %g2
14878 ldx [%g2], %g4
14879 xorcc %g3, %g4, %g5
14880 bne test_failed
14881 nop
14882
14883 ! Next check that all the writable bits can be written
14884 stx %l2, [%g2] ! store inverted POR value
14885 ldx [%g2], %g4
14886 xorcc %g7, %g4, %g5
14887 bne test_failed
14888 nop
14889
14890
14891 ! First check that the POR value is correct
14892 add %g2, 8, %g2
14893 ldx [%g2], %g4
14894 xorcc %g3, %g4, %g5
14895 bne test_failed
14896 nop
14897
14898 ! Next check that all the writable bits can be written
14899 stx %l2, [%g2] ! store inverted POR value
14900 ldx [%g2], %g4
14901 xorcc %g7, %g4, %g5
14902 bne test_failed
14903 nop
14904
14905
14906 ! First check that the POR value is correct
14907 add %g2, 8, %g2
14908 ldx [%g2], %g4
14909 xorcc %g3, %g4, %g5
14910 bne test_failed
14911 nop
14912
14913 ! Next check that all the writable bits can be written
14914 stx %l2, [%g2] ! store inverted POR value
14915 ldx [%g2], %g4
14916 xorcc %g7, %g4, %g5
14917 bne test_failed
14918 nop
14919
14920
14921 ! First check that the POR value is correct
14922 add %g2, 8, %g2
14923 ldx [%g2], %g4
14924 xorcc %g3, %g4, %g5
14925 bne test_failed
14926 nop
14927
14928 ! Next check that all the writable bits can be written
14929 stx %l2, [%g2] ! store inverted POR value
14930 ldx [%g2], %g4
14931 xorcc %g7, %g4, %g5
14932 bne test_failed
14933 nop
14934
14935
14936 ! First check that the POR value is correct
14937 add %g2, 8, %g2
14938 ldx [%g2], %g4
14939 xorcc %g3, %g4, %g5
14940 bne test_failed
14941 nop
14942
14943 ! Next check that all the writable bits can be written
14944 stx %l2, [%g2] ! store inverted POR value
14945 ldx [%g2], %g4
14946 xorcc %g7, %g4, %g5
14947 bne test_failed
14948 nop
14949
14950
14951 ! First check that the POR value is correct
14952 add %g2, 8, %g2
14953 ldx [%g2], %g4
14954 xorcc %g3, %g4, %g5
14955 bne test_failed
14956 nop
14957
14958 ! Next check that all the writable bits can be written
14959 stx %l2, [%g2] ! store inverted POR value
14960 ldx [%g2], %g4
14961 xorcc %g7, %g4, %g5
14962 bne test_failed
14963 nop
14964
14965
14966 ! First check that the POR value is correct
14967 add %g2, 8, %g2
14968 ldx [%g2], %g4
14969 xorcc %g3, %g4, %g5
14970 bne test_failed
14971 nop
14972
14973 ! Next check that all the writable bits can be written
14974 stx %l2, [%g2] ! store inverted POR value
14975 ldx [%g2], %g4
14976 xorcc %g7, %g4, %g5
14977 bne test_failed
14978 nop
14979
14980
14981 ! First check that the POR value is correct
14982 add %g2, 8, %g2
14983 ldx [%g2], %g4
14984 xorcc %g3, %g4, %g5
14985 bne test_failed
14986 nop
14987
14988 ! Next check that all the writable bits can be written
14989 stx %l2, [%g2] ! store inverted POR value
14990 ldx [%g2], %g4
14991 xorcc %g7, %g4, %g5
14992 bne test_failed
14993 nop
14994
14995
14996 ! First check that the POR value is correct
14997 add %g2, 8, %g2
14998 ldx [%g2], %g4
14999 xorcc %g3, %g4, %g5
15000 bne test_failed
15001 nop
15002
15003 ! Next check that all the writable bits can be written
15004 stx %l2, [%g2] ! store inverted POR value
15005 ldx [%g2], %g4
15006 xorcc %g7, %g4, %g5
15007 bne test_failed
15008 nop
15009
15010
15011 ! First check that the POR value is correct
15012 add %g2, 8, %g2
15013 ldx [%g2], %g4
15014 xorcc %g3, %g4, %g5
15015 bne test_failed
15016 nop
15017
15018 ! Next check that all the writable bits can be written
15019 stx %l2, [%g2] ! store inverted POR value
15020 ldx [%g2], %g4
15021 xorcc %g7, %g4, %g5
15022 bne test_failed
15023 nop
15024
15025
15026 ! First check that the POR value is correct
15027 add %g2, 8, %g2
15028 ldx [%g2], %g4
15029 xorcc %g3, %g4, %g5
15030 bne test_failed
15031 nop
15032
15033 ! Next check that all the writable bits can be written
15034 stx %l2, [%g2] ! store inverted POR value
15035 ldx [%g2], %g4
15036 xorcc %g7, %g4, %g5
15037 bne test_failed
15038 nop
15039
15040
15041 ! First check that the POR value is correct
15042 add %g2, 8, %g2
15043 ldx [%g2], %g4
15044 xorcc %g3, %g4, %g5
15045 bne test_failed
15046 nop
15047
15048 ! Next check that all the writable bits can be written
15049 stx %l2, [%g2] ! store inverted POR value
15050 ldx [%g2], %g4
15051 xorcc %g7, %g4, %g5
15052 bne test_failed
15053 nop
15054
15055
15056 ! First check that the POR value is correct
15057 add %g2, 8, %g2
15058 ldx [%g2], %g4
15059 xorcc %g3, %g4, %g5
15060 bne test_failed
15061 nop
15062
15063 ! Next check that all the writable bits can be written
15064 stx %l2, [%g2] ! store inverted POR value
15065 ldx [%g2], %g4
15066 xorcc %g7, %g4, %g5
15067 bne test_failed
15068 nop
15069
15070
15071 ! First check that the POR value is correct
15072 add %g2, 8, %g2
15073 ldx [%g2], %g4
15074 xorcc %g3, %g4, %g5
15075 bne test_failed
15076 nop
15077
15078 ! Next check that all the writable bits can be written
15079 stx %l2, [%g2] ! store inverted POR value
15080 ldx [%g2], %g4
15081 xorcc %g7, %g4, %g5
15082 bne test_failed
15083 nop
15084
15085
15086 ! First check that the POR value is correct
15087 add %g2, 8, %g2
15088 ldx [%g2], %g4
15089 xorcc %g3, %g4, %g5
15090 bne test_failed
15091 nop
15092
15093 ! Next check that all the writable bits can be written
15094 stx %l2, [%g2] ! store inverted POR value
15095 ldx [%g2], %g4
15096 xorcc %g7, %g4, %g5
15097 bne test_failed
15098 nop
15099
15100
15101 ! First check that the POR value is correct
15102 add %g2, 8, %g2
15103 ldx [%g2], %g4
15104 xorcc %g3, %g4, %g5
15105 bne test_failed
15106 nop
15107
15108 ! Next check that all the writable bits can be written
15109 stx %l2, [%g2] ! store inverted POR value
15110 ldx [%g2], %g4
15111 xorcc %g7, %g4, %g5
15112 bne test_failed
15113 nop
15114
15115
15116 ! First check that the POR value is correct
15117 add %g2, 8, %g2
15118 ldx [%g2], %g4
15119 xorcc %g3, %g4, %g5
15120 bne test_failed
15121 nop
15122
15123 ! Next check that all the writable bits can be written
15124 stx %l2, [%g2] ! store inverted POR value
15125 ldx [%g2], %g4
15126 xorcc %g7, %g4, %g5
15127 bne test_failed
15128 nop
15129
15130
15131 ! First check that the POR value is correct
15132 add %g2, 8, %g2
15133 ldx [%g2], %g4
15134 xorcc %g3, %g4, %g5
15135 bne test_failed
15136 nop
15137
15138 ! Next check that all the writable bits can be written
15139 stx %l2, [%g2] ! store inverted POR value
15140 ldx [%g2], %g4
15141 xorcc %g7, %g4, %g5
15142 bne test_failed
15143 nop
15144
15145
15146 ! First check that the POR value is correct
15147 add %g2, 8, %g2
15148 ldx [%g2], %g4
15149 xorcc %g3, %g4, %g5
15150 bne test_failed
15151 nop
15152
15153 ! Next check that all the writable bits can be written
15154 stx %l2, [%g2] ! store inverted POR value
15155 ldx [%g2], %g4
15156 xorcc %g7, %g4, %g5
15157 bne test_failed
15158 nop
15159
15160
15161 ! First check that the POR value is correct
15162 add %g2, 8, %g2
15163 ldx [%g2], %g4
15164 xorcc %g3, %g4, %g5
15165 bne test_failed
15166 nop
15167
15168 ! Next check that all the writable bits can be written
15169 stx %l2, [%g2] ! store inverted POR value
15170 ldx [%g2], %g4
15171 xorcc %g7, %g4, %g5
15172 bne test_failed
15173 nop
15174
15175
15176 ! First check that the POR value is correct
15177 add %g2, 8, %g2
15178 ldx [%g2], %g4
15179 xorcc %g3, %g4, %g5
15180 bne test_failed
15181 nop
15182
15183 ! Next check that all the writable bits can be written
15184 stx %l2, [%g2] ! store inverted POR value
15185 ldx [%g2], %g4
15186 xorcc %g7, %g4, %g5
15187 bne test_failed
15188 nop
15189
15190
15191 ! First check that the POR value is correct
15192 add %g2, 8, %g2
15193 ldx [%g2], %g4
15194 xorcc %g3, %g4, %g5
15195 bne test_failed
15196 nop
15197
15198 ! Next check that all the writable bits can be written
15199 stx %l2, [%g2] ! store inverted POR value
15200 ldx [%g2], %g4
15201 xorcc %g7, %g4, %g5
15202 bne test_failed
15203 nop
15204
15205
15206 ! First check that the POR value is correct
15207 add %g2, 8, %g2
15208 ldx [%g2], %g4
15209 xorcc %g3, %g4, %g5
15210 bne test_failed
15211 nop
15212
15213 ! Next check that all the writable bits can be written
15214 stx %l2, [%g2] ! store inverted POR value
15215 ldx [%g2], %g4
15216 xorcc %g7, %g4, %g5
15217 bne test_failed
15218 nop
15219
15220
15221 ! First check that the POR value is correct
15222 add %g2, 8, %g2
15223 ldx [%g2], %g4
15224 xorcc %g3, %g4, %g5
15225 bne test_failed
15226 nop
15227
15228 ! Next check that all the writable bits can be written
15229 stx %l2, [%g2] ! store inverted POR value
15230 ldx [%g2], %g4
15231 xorcc %g7, %g4, %g5
15232 bne test_failed
15233 nop
15234
15235
15236 ! First check that the POR value is correct
15237 add %g2, 8, %g2
15238 ldx [%g2], %g4
15239 xorcc %g3, %g4, %g5
15240 bne test_failed
15241 nop
15242
15243 ! Next check that all the writable bits can be written
15244 stx %l2, [%g2] ! store inverted POR value
15245 ldx [%g2], %g4
15246 xorcc %g7, %g4, %g5
15247 bne test_failed
15248 nop
15249
15250
15251 ! First check that the POR value is correct
15252 add %g2, 8, %g2
15253 ldx [%g2], %g4
15254 xorcc %g3, %g4, %g5
15255 bne test_failed
15256 nop
15257
15258 ! Next check that all the writable bits can be written
15259 stx %l2, [%g2] ! store inverted POR value
15260 ldx [%g2], %g4
15261 xorcc %g7, %g4, %g5
15262 bne test_failed
15263 nop
15264
15265
15266 ! First check that the POR value is correct
15267 add %g2, 8, %g2
15268 ldx [%g2], %g4
15269 xorcc %g3, %g4, %g5
15270 bne test_failed
15271 nop
15272
15273 ! Next check that all the writable bits can be written
15274 stx %l2, [%g2] ! store inverted POR value
15275 ldx [%g2], %g4
15276 xorcc %g7, %g4, %g5
15277 bne test_failed
15278 nop
15279
15280
15281 ! First check that the POR value is correct
15282 add %g2, 8, %g2
15283 ldx [%g2], %g4
15284 xorcc %g3, %g4, %g5
15285 bne test_failed
15286 nop
15287
15288 ! Next check that all the writable bits can be written
15289 stx %l2, [%g2] ! store inverted POR value
15290 ldx [%g2], %g4
15291 xorcc %g7, %g4, %g5
15292 bne test_failed
15293 nop
15294
15295
15296 ! First check that the POR value is correct
15297 add %g2, 8, %g2
15298 ldx [%g2], %g4
15299 xorcc %g3, %g4, %g5
15300 bne test_failed
15301 nop
15302
15303 ! Next check that all the writable bits can be written
15304 stx %l2, [%g2] ! store inverted POR value
15305 ldx [%g2], %g4
15306 xorcc %g7, %g4, %g5
15307 bne test_failed
15308 nop
15309
15310
15311 ! First check that the POR value is correct
15312 add %g2, 8, %g2
15313 ldx [%g2], %g4
15314 xorcc %g3, %g4, %g5
15315 bne test_failed
15316 nop
15317
15318 ! Next check that all the writable bits can be written
15319 stx %l2, [%g2] ! store inverted POR value
15320 ldx [%g2], %g4
15321 xorcc %g7, %g4, %g5
15322 bne test_failed
15323 nop
15324
15325
15326 ! First check that the POR value is correct
15327 add %g2, 8, %g2
15328 ldx [%g2], %g4
15329 xorcc %g3, %g4, %g5
15330 bne test_failed
15331 nop
15332
15333 ! Next check that all the writable bits can be written
15334 stx %l2, [%g2] ! store inverted POR value
15335 ldx [%g2], %g4
15336 xorcc %g7, %g4, %g5
15337 bne test_failed
15338 nop
15339
15340
15341 ! First check that the POR value is correct
15342 add %g2, 8, %g2
15343 ldx [%g2], %g4
15344 xorcc %g3, %g4, %g5
15345 bne test_failed
15346 nop
15347
15348 ! Next check that all the writable bits can be written
15349 stx %l2, [%g2] ! store inverted POR value
15350 ldx [%g2], %g4
15351 xorcc %g7, %g4, %g5
15352 bne test_failed
15353 nop
15354
15355
15356 ! First check that the POR value is correct
15357 add %g2, 8, %g2
15358 ldx [%g2], %g4
15359 xorcc %g3, %g4, %g5
15360 bne test_failed
15361 nop
15362
15363 ! Next check that all the writable bits can be written
15364 stx %l2, [%g2] ! store inverted POR value
15365 ldx [%g2], %g4
15366 xorcc %g7, %g4, %g5
15367 bne test_failed
15368 nop
15369
15370
15371 ! First check that the POR value is correct
15372 add %g2, 8, %g2
15373 ldx [%g2], %g4
15374 xorcc %g3, %g4, %g5
15375 bne test_failed
15376 nop
15377
15378 ! Next check that all the writable bits can be written
15379 stx %l2, [%g2] ! store inverted POR value
15380 ldx [%g2], %g4
15381 xorcc %g7, %g4, %g5
15382 bne test_failed
15383 nop
15384
15385
15386 ! First check that the POR value is correct
15387 add %g2, 8, %g2
15388 ldx [%g2], %g4
15389 xorcc %g3, %g4, %g5
15390 bne test_failed
15391 nop
15392
15393 ! Next check that all the writable bits can be written
15394 stx %l2, [%g2] ! store inverted POR value
15395 ldx [%g2], %g4
15396 xorcc %g7, %g4, %g5
15397 bne test_failed
15398 nop
15399
15400
15401 ! First check that the POR value is correct
15402 add %g2, 8, %g2
15403 ldx [%g2], %g4
15404 xorcc %g3, %g4, %g5
15405 bne test_failed
15406 nop
15407
15408 ! Next check that all the writable bits can be written
15409 stx %l2, [%g2] ! store inverted POR value
15410 ldx [%g2], %g4
15411 xorcc %g7, %g4, %g5
15412 bne test_failed
15413 nop
15414
15415
15416 ! First check that the POR value is correct
15417 add %g2, 8, %g2
15418 ldx [%g2], %g4
15419 xorcc %g3, %g4, %g5
15420 bne test_failed
15421 nop
15422
15423 ! Next check that all the writable bits can be written
15424 stx %l2, [%g2] ! store inverted POR value
15425 ldx [%g2], %g4
15426 xorcc %g7, %g4, %g5
15427 bne test_failed
15428 nop
15429
15430
15431 ! First check that the POR value is correct
15432 add %g2, 8, %g2
15433 ldx [%g2], %g4
15434 xorcc %g3, %g4, %g5
15435 bne test_failed
15436 nop
15437
15438 ! Next check that all the writable bits can be written
15439 stx %l2, [%g2] ! store inverted POR value
15440 ldx [%g2], %g4
15441 xorcc %g7, %g4, %g5
15442 bne test_failed
15443 nop
15444
15445
15446 ! First check that the POR value is correct
15447 add %g2, 8, %g2
15448 ldx [%g2], %g4
15449 xorcc %g3, %g4, %g5
15450 bne test_failed
15451 nop
15452
15453 ! Next check that all the writable bits can be written
15454 stx %l2, [%g2] ! store inverted POR value
15455 ldx [%g2], %g4
15456 xorcc %g7, %g4, %g5
15457 bne test_failed
15458 nop
15459
15460
15461 ! First check that the POR value is correct
15462 add %g2, 8, %g2
15463 ldx [%g2], %g4
15464 xorcc %g3, %g4, %g5
15465 bne test_failed
15466 nop
15467
15468 ! Next check that all the writable bits can be written
15469 stx %l2, [%g2] ! store inverted POR value
15470 ldx [%g2], %g4
15471 xorcc %g7, %g4, %g5
15472 bne test_failed
15473 nop
15474
15475
15476 ! First check that the POR value is correct
15477 add %g2, 8, %g2
15478 ldx [%g2], %g4
15479 xorcc %g3, %g4, %g5
15480 bne test_failed
15481 nop
15482
15483 ! Next check that all the writable bits can be written
15484 stx %l2, [%g2] ! store inverted POR value
15485 ldx [%g2], %g4
15486 xorcc %g7, %g4, %g5
15487 bne test_failed
15488 nop
15489
15490
15491 ! First check that the POR value is correct
15492 add %g2, 8, %g2
15493 ldx [%g2], %g4
15494 xorcc %g3, %g4, %g5
15495 bne test_failed
15496 nop
15497
15498 ! Next check that all the writable bits can be written
15499 stx %l2, [%g2] ! store inverted POR value
15500 ldx [%g2], %g4
15501 xorcc %g7, %g4, %g5
15502 bne test_failed
15503 nop
15504
15505
15506 ! First check that the POR value is correct
15507 add %g2, 8, %g2
15508 ldx [%g2], %g4
15509 xorcc %g3, %g4, %g5
15510 bne test_failed
15511 nop
15512
15513 ! Next check that all the writable bits can be written
15514 stx %l2, [%g2] ! store inverted POR value
15515 ldx [%g2], %g4
15516 xorcc %g7, %g4, %g5
15517 bne test_failed
15518 nop
15519
15520
15521 ! First check that the POR value is correct
15522 add %g2, 8, %g2
15523 ldx [%g2], %g4
15524 xorcc %g3, %g4, %g5
15525 bne test_failed
15526 nop
15527
15528 ! Next check that all the writable bits can be written
15529 stx %l2, [%g2] ! store inverted POR value
15530 ldx [%g2], %g4
15531 xorcc %g7, %g4, %g5
15532 bne test_failed
15533 nop
15534
15535
15536 ! First check that the POR value is correct
15537 add %g2, 8, %g2
15538 ldx [%g2], %g4
15539 xorcc %g3, %g4, %g5
15540 bne test_failed
15541 nop
15542
15543 ! Next check that all the writable bits can be written
15544 stx %l2, [%g2] ! store inverted POR value
15545 ldx [%g2], %g4
15546 xorcc %g7, %g4, %g5
15547 bne test_failed
15548 nop
15549
15550
15551 ! First check that the POR value is correct
15552 add %g2, 8, %g2
15553 ldx [%g2], %g4
15554 xorcc %g3, %g4, %g5
15555 bne test_failed
15556 nop
15557
15558 ! Next check that all the writable bits can be written
15559 stx %l2, [%g2] ! store inverted POR value
15560 ldx [%g2], %g4
15561 xorcc %g7, %g4, %g5
15562 bne test_failed
15563 nop
15564
15565
15566 ! First check that the POR value is correct
15567 add %g2, 8, %g2
15568 ldx [%g2], %g4
15569 xorcc %g3, %g4, %g5
15570 bne test_failed
15571 nop
15572
15573 ! Next check that all the writable bits can be written
15574 stx %l2, [%g2] ! store inverted POR value
15575 ldx [%g2], %g4
15576 xorcc %g7, %g4, %g5
15577 bne test_failed
15578 nop
15579
15580
15581 ! First check that the POR value is correct
15582 add %g2, 8, %g2
15583 ldx [%g2], %g4
15584 xorcc %g3, %g4, %g5
15585 bne test_failed
15586 nop
15587
15588 ! Next check that all the writable bits can be written
15589 stx %l2, [%g2] ! store inverted POR value
15590 ldx [%g2], %g4
15591 xorcc %g7, %g4, %g5
15592 bne test_failed
15593 nop
15594
15595
15596 ! First check that the POR value is correct
15597 add %g2, 8, %g2
15598 ldx [%g2], %g4
15599 xorcc %g3, %g4, %g5
15600 bne test_failed
15601 nop
15602
15603 ! Next check that all the writable bits can be written
15604 stx %l2, [%g2] ! store inverted POR value
15605 ldx [%g2], %g4
15606 xorcc %g7, %g4, %g5
15607 bne test_failed
15608 nop
15609
15610
15611 ! First check that the POR value is correct
15612 add %g2, 8, %g2
15613 ldx [%g2], %g4
15614 xorcc %g3, %g4, %g5
15615 bne test_failed
15616 nop
15617
15618 ! Next check that all the writable bits can be written
15619 stx %l2, [%g2] ! store inverted POR value
15620 ldx [%g2], %g4
15621 xorcc %g7, %g4, %g5
15622 bne test_failed
15623 nop
15624
15625
15626 ! First check that the POR value is correct
15627 add %g2, 8, %g2
15628 ldx [%g2], %g4
15629 xorcc %g3, %g4, %g5
15630 bne test_failed
15631 nop
15632
15633 ! Next check that all the writable bits can be written
15634 stx %l2, [%g2] ! store inverted POR value
15635 ldx [%g2], %g4
15636 xorcc %g7, %g4, %g5
15637 bne test_failed
15638 nop
15639
15640
15641 ! First check that the POR value is correct
15642 add %g2, 8, %g2
15643 ldx [%g2], %g4
15644 xorcc %g3, %g4, %g5
15645 bne test_failed
15646 nop
15647
15648 ! Next check that all the writable bits can be written
15649 stx %l2, [%g2] ! store inverted POR value
15650 ldx [%g2], %g4
15651 xorcc %g7, %g4, %g5
15652 bne test_failed
15653 nop
15654
15655
15656 ! First check that the POR value is correct
15657 add %g2, 8, %g2
15658 ldx [%g2], %g4
15659 xorcc %g3, %g4, %g5
15660 bne test_failed
15661 nop
15662
15663 ! Next check that all the writable bits can be written
15664 stx %l2, [%g2] ! store inverted POR value
15665 ldx [%g2], %g4
15666 xorcc %g7, %g4, %g5
15667 bne test_failed
15668 nop
15669
15670
15671 ! First check that the POR value is correct
15672 add %g2, 8, %g2
15673 ldx [%g2], %g4
15674 xorcc %g3, %g4, %g5
15675 bne test_failed
15676 nop
15677
15678 ! Next check that all the writable bits can be written
15679 stx %l2, [%g2] ! store inverted POR value
15680 ldx [%g2], %g4
15681 xorcc %g7, %g4, %g5
15682 bne test_failed
15683 nop
15684
15685
15686 ! First check that the POR value is correct
15687 add %g2, 8, %g2
15688 ldx [%g2], %g4
15689 xorcc %g3, %g4, %g5
15690 bne test_failed
15691 nop
15692
15693 ! Next check that all the writable bits can be written
15694 stx %l2, [%g2] ! store inverted POR value
15695 ldx [%g2], %g4
15696 xorcc %g7, %g4, %g5
15697 bne test_failed
15698 nop
15699
15700
15701 ! First check that the POR value is correct
15702 add %g2, 8, %g2
15703 ldx [%g2], %g4
15704 xorcc %g3, %g4, %g5
15705 bne test_failed
15706 nop
15707
15708 ! Next check that all the writable bits can be written
15709 stx %l2, [%g2] ! store inverted POR value
15710 ldx [%g2], %g4
15711 xorcc %g7, %g4, %g5
15712 bne test_failed
15713 nop
15714
15715
15716 ! First check that the POR value is correct
15717 add %g2, 8, %g2
15718 ldx [%g2], %g4
15719 xorcc %g3, %g4, %g5
15720 bne test_failed
15721 nop
15722
15723 ! Next check that all the writable bits can be written
15724 stx %l2, [%g2] ! store inverted POR value
15725 ldx [%g2], %g4
15726 xorcc %g7, %g4, %g5
15727 bne test_failed
15728 nop
15729
15730
15731 ! First check that the POR value is correct
15732 add %g2, 8, %g2
15733 ldx [%g2], %g4
15734 xorcc %g3, %g4, %g5
15735 bne test_failed
15736 nop
15737
15738 ! Next check that all the writable bits can be written
15739 stx %l2, [%g2] ! store inverted POR value
15740 ldx [%g2], %g4
15741 xorcc %g7, %g4, %g5
15742 bne test_failed
15743 nop
15744
15745
15746 ! First check that the POR value is correct
15747 add %g2, 8, %g2
15748 ldx [%g2], %g4
15749 xorcc %g3, %g4, %g5
15750 bne test_failed
15751 nop
15752
15753 ! Next check that all the writable bits can be written
15754 stx %l2, [%g2] ! store inverted POR value
15755 ldx [%g2], %g4
15756 xorcc %g7, %g4, %g5
15757 bne test_failed
15758 nop
15759
15760
15761 ! First check that the POR value is correct
15762 add %g2, 8, %g2
15763 ldx [%g2], %g4
15764 xorcc %g3, %g4, %g5
15765 bne test_failed
15766 nop
15767
15768 ! Next check that all the writable bits can be written
15769 stx %l2, [%g2] ! store inverted POR value
15770 ldx [%g2], %g4
15771 xorcc %g7, %g4, %g5
15772 bne test_failed
15773 nop
15774
15775
15776 ! First check that the POR value is correct
15777 add %g2, 8, %g2
15778 ldx [%g2], %g4
15779 xorcc %g3, %g4, %g5
15780 bne test_failed
15781 nop
15782
15783 ! Next check that all the writable bits can be written
15784 stx %l2, [%g2] ! store inverted POR value
15785 ldx [%g2], %g4
15786 xorcc %g7, %g4, %g5
15787 bne test_failed
15788 nop
15789
15790
15791 ! First check that the POR value is correct
15792 add %g2, 8, %g2
15793 ldx [%g2], %g4
15794 xorcc %g3, %g4, %g5
15795 bne test_failed
15796 nop
15797
15798 ! Next check that all the writable bits can be written
15799 stx %l2, [%g2] ! store inverted POR value
15800 ldx [%g2], %g4
15801 xorcc %g7, %g4, %g5
15802 bne test_failed
15803 nop
15804
15805
15806 ! First check that the POR value is correct
15807 add %g2, 8, %g2
15808 ldx [%g2], %g4
15809 xorcc %g3, %g4, %g5
15810 bne test_failed
15811 nop
15812
15813 ! Next check that all the writable bits can be written
15814 stx %l2, [%g2] ! store inverted POR value
15815 ldx [%g2], %g4
15816 xorcc %g7, %g4, %g5
15817 bne test_failed
15818 nop
15819
15820
15821 ! First check that the POR value is correct
15822 add %g2, 8, %g2
15823 ldx [%g2], %g4
15824 xorcc %g3, %g4, %g5
15825 bne test_failed
15826 nop
15827
15828 ! Next check that all the writable bits can be written
15829 stx %l2, [%g2] ! store inverted POR value
15830 ldx [%g2], %g4
15831 xorcc %g7, %g4, %g5
15832 bne test_failed
15833 nop
15834
15835
15836 ! First check that the POR value is correct
15837 add %g2, 8, %g2
15838 ldx [%g2], %g4
15839 xorcc %g3, %g4, %g5
15840 bne test_failed
15841 nop
15842
15843 ! Next check that all the writable bits can be written
15844 stx %l2, [%g2] ! store inverted POR value
15845 ldx [%g2], %g4
15846 xorcc %g7, %g4, %g5
15847 bne test_failed
15848 nop
15849
15850
15851 ! First check that the POR value is correct
15852 add %g2, 8, %g2
15853 ldx [%g2], %g4
15854 xorcc %g3, %g4, %g5
15855 bne test_failed
15856 nop
15857
15858 ! Next check that all the writable bits can be written
15859 stx %l2, [%g2] ! store inverted POR value
15860 ldx [%g2], %g4
15861 xorcc %g7, %g4, %g5
15862 bne test_failed
15863 nop
15864
15865
15866 ! First check that the POR value is correct
15867 add %g2, 8, %g2
15868 ldx [%g2], %g4
15869 xorcc %g3, %g4, %g5
15870 bne test_failed
15871 nop
15872
15873 ! Next check that all the writable bits can be written
15874 stx %l2, [%g2] ! store inverted POR value
15875 ldx [%g2], %g4
15876 xorcc %g7, %g4, %g5
15877 bne test_failed
15878 nop
15879
15880
15881 ! First check that the POR value is correct
15882 add %g2, 8, %g2
15883 ldx [%g2], %g4
15884 xorcc %g3, %g4, %g5
15885 bne test_failed
15886 nop
15887
15888 ! Next check that all the writable bits can be written
15889 stx %l2, [%g2] ! store inverted POR value
15890 ldx [%g2], %g4
15891 xorcc %g7, %g4, %g5
15892 bne test_failed
15893 nop
15894
15895
15896 ! First check that the POR value is correct
15897 add %g2, 8, %g2
15898 ldx [%g2], %g4
15899 xorcc %g3, %g4, %g5
15900 bne test_failed
15901 nop
15902
15903 ! Next check that all the writable bits can be written
15904 stx %l2, [%g2] ! store inverted POR value
15905 ldx [%g2], %g4
15906 xorcc %g7, %g4, %g5
15907 bne test_failed
15908 nop
15909
15910
15911 ! First check that the POR value is correct
15912 add %g2, 8, %g2
15913 ldx [%g2], %g4
15914 xorcc %g3, %g4, %g5
15915 bne test_failed
15916 nop
15917
15918 ! Next check that all the writable bits can be written
15919 stx %l2, [%g2] ! store inverted POR value
15920 ldx [%g2], %g4
15921 xorcc %g7, %g4, %g5
15922 bne test_failed
15923 nop
15924
15925
15926 ! First check that the POR value is correct
15927 add %g2, 8, %g2
15928 ldx [%g2], %g4
15929 xorcc %g3, %g4, %g5
15930 bne test_failed
15931 nop
15932
15933 ! Next check that all the writable bits can be written
15934 stx %l2, [%g2] ! store inverted POR value
15935 ldx [%g2], %g4
15936 xorcc %g7, %g4, %g5
15937 bne test_failed
15938 nop
15939
15940
15941 ! First check that the POR value is correct
15942 add %g2, 8, %g2
15943 ldx [%g2], %g4
15944 xorcc %g3, %g4, %g5
15945 bne test_failed
15946 nop
15947
15948 ! Next check that all the writable bits can be written
15949 stx %l2, [%g2] ! store inverted POR value
15950 ldx [%g2], %g4
15951 xorcc %g7, %g4, %g5
15952 bne test_failed
15953 nop
15954
15955
15956 ! First check that the POR value is correct
15957 add %g2, 8, %g2
15958 ldx [%g2], %g4
15959 xorcc %g3, %g4, %g5
15960 bne test_failed
15961 nop
15962
15963 ! Next check that all the writable bits can be written
15964 stx %l2, [%g2] ! store inverted POR value
15965 ldx [%g2], %g4
15966 xorcc %g7, %g4, %g5
15967 bne test_failed
15968 nop
15969
15970
15971 ! First check that the POR value is correct
15972 add %g2, 8, %g2
15973 ldx [%g2], %g4
15974 xorcc %g3, %g4, %g5
15975 bne test_failed
15976 nop
15977
15978 ! Next check that all the writable bits can be written
15979 stx %l2, [%g2] ! store inverted POR value
15980 ldx [%g2], %g4
15981 xorcc %g7, %g4, %g5
15982 bne test_failed
15983 nop
15984
15985
15986 ! First check that the POR value is correct
15987 add %g2, 8, %g2
15988 ldx [%g2], %g4
15989 xorcc %g3, %g4, %g5
15990 bne test_failed
15991 nop
15992
15993 ! Next check that all the writable bits can be written
15994 stx %l2, [%g2] ! store inverted POR value
15995 ldx [%g2], %g4
15996 xorcc %g7, %g4, %g5
15997 bne test_failed
15998 nop
15999
16000
16001 ! First check that the POR value is correct
16002 add %g2, 8, %g2
16003 ldx [%g2], %g4
16004 xorcc %g3, %g4, %g5
16005 bne test_failed
16006 nop
16007
16008 ! Next check that all the writable bits can be written
16009 stx %l2, [%g2] ! store inverted POR value
16010 ldx [%g2], %g4
16011 xorcc %g7, %g4, %g5
16012 bne test_failed
16013 nop
16014
16015
16016 ! First check that the POR value is correct
16017 add %g2, 8, %g2
16018 ldx [%g2], %g4
16019 xorcc %g3, %g4, %g5
16020 bne test_failed
16021 nop
16022
16023 ! Next check that all the writable bits can be written
16024 stx %l2, [%g2] ! store inverted POR value
16025 ldx [%g2], %g4
16026 xorcc %g7, %g4, %g5
16027 bne test_failed
16028 nop
16029
16030
16031 ! First check that the POR value is correct
16032 add %g2, 8, %g2
16033 ldx [%g2], %g4
16034 xorcc %g3, %g4, %g5
16035 bne test_failed
16036 nop
16037
16038 ! Next check that all the writable bits can be written
16039 stx %l2, [%g2] ! store inverted POR value
16040 ldx [%g2], %g4
16041 xorcc %g7, %g4, %g5
16042 bne test_failed
16043 nop
16044
16045
16046 ! First check that the POR value is correct
16047 add %g2, 8, %g2
16048 ldx [%g2], %g4
16049 xorcc %g3, %g4, %g5
16050 bne test_failed
16051 nop
16052
16053 ! Next check that all the writable bits can be written
16054 stx %l2, [%g2] ! store inverted POR value
16055 ldx [%g2], %g4
16056 xorcc %g7, %g4, %g5
16057 bne test_failed
16058 nop
16059
16060
16061 ! First check that the POR value is correct
16062 add %g2, 8, %g2
16063 ldx [%g2], %g4
16064 xorcc %g3, %g4, %g5
16065 bne test_failed
16066 nop
16067
16068 ! Next check that all the writable bits can be written
16069 stx %l2, [%g2] ! store inverted POR value
16070 ldx [%g2], %g4
16071 xorcc %g7, %g4, %g5
16072 bne test_failed
16073 nop
16074
16075
16076 ! First check that the POR value is correct
16077 add %g2, 8, %g2
16078 ldx [%g2], %g4
16079 xorcc %g3, %g4, %g5
16080 bne test_failed
16081 nop
16082
16083 ! Next check that all the writable bits can be written
16084 stx %l2, [%g2] ! store inverted POR value
16085 ldx [%g2], %g4
16086 xorcc %g7, %g4, %g5
16087 bne test_failed
16088 nop
16089
16090
16091 ! First check that the POR value is correct
16092 add %g2, 8, %g2
16093 ldx [%g2], %g4
16094 xorcc %g3, %g4, %g5
16095 bne test_failed
16096 nop
16097
16098 ! Next check that all the writable bits can be written
16099 stx %l2, [%g2] ! store inverted POR value
16100 ldx [%g2], %g4
16101 xorcc %g7, %g4, %g5
16102 bne test_failed
16103 nop
16104
16105
16106 ! First check that the POR value is correct
16107 add %g2, 8, %g2
16108 ldx [%g2], %g4
16109 xorcc %g3, %g4, %g5
16110 bne test_failed
16111 nop
16112
16113 ! Next check that all the writable bits can be written
16114 stx %l2, [%g2] ! store inverted POR value
16115 ldx [%g2], %g4
16116 xorcc %g7, %g4, %g5
16117 bne test_failed
16118 nop
16119
16120
16121 ! First check that the POR value is correct
16122 add %g2, 8, %g2
16123 ldx [%g2], %g4
16124 xorcc %g3, %g4, %g5
16125 bne test_failed
16126 nop
16127
16128 ! Next check that all the writable bits can be written
16129 stx %l2, [%g2] ! store inverted POR value
16130 ldx [%g2], %g4
16131 xorcc %g7, %g4, %g5
16132 bne test_failed
16133 nop
16134
16135
16136 ! First check that the POR value is correct
16137 add %g2, 8, %g2
16138 ldx [%g2], %g4
16139 xorcc %g3, %g4, %g5
16140 bne test_failed
16141 nop
16142
16143 ! Next check that all the writable bits can be written
16144 stx %l2, [%g2] ! store inverted POR value
16145 ldx [%g2], %g4
16146 xorcc %g7, %g4, %g5
16147 bne test_failed
16148 nop
16149
16150
16151 ! First check that the POR value is correct
16152 add %g2, 8, %g2
16153 ldx [%g2], %g4
16154 xorcc %g3, %g4, %g5
16155 bne test_failed
16156 nop
16157
16158 ! Next check that all the writable bits can be written
16159 stx %l2, [%g2] ! store inverted POR value
16160 ldx [%g2], %g4
16161 xorcc %g7, %g4, %g5
16162 bne test_failed
16163 nop
16164
16165
16166 ! First check that the POR value is correct
16167 add %g2, 8, %g2
16168 ldx [%g2], %g4
16169 xorcc %g3, %g4, %g5
16170 bne test_failed
16171 nop
16172
16173 ! Next check that all the writable bits can be written
16174 stx %l2, [%g2] ! store inverted POR value
16175 ldx [%g2], %g4
16176 xorcc %g7, %g4, %g5
16177 bne test_failed
16178 nop
16179
16180
16181 ! First check that the POR value is correct
16182 add %g2, 8, %g2
16183 ldx [%g2], %g4
16184 xorcc %g3, %g4, %g5
16185 bne test_failed
16186 nop
16187
16188 ! Next check that all the writable bits can be written
16189 stx %l2, [%g2] ! store inverted POR value
16190 ldx [%g2], %g4
16191 xorcc %g7, %g4, %g5
16192 bne test_failed
16193 nop
16194
16195
16196 ! First check that the POR value is correct
16197 add %g2, 8, %g2
16198 ldx [%g2], %g4
16199 xorcc %g3, %g4, %g5
16200 bne test_failed
16201 nop
16202
16203 ! Next check that all the writable bits can be written
16204 stx %l2, [%g2] ! store inverted POR value
16205 ldx [%g2], %g4
16206 xorcc %g7, %g4, %g5
16207 bne test_failed
16208 nop
16209
16210
16211 ! First check that the POR value is correct
16212 add %g2, 8, %g2
16213 ldx [%g2], %g4
16214 xorcc %g3, %g4, %g5
16215 bne test_failed
16216 nop
16217
16218 ! Next check that all the writable bits can be written
16219 stx %l2, [%g2] ! store inverted POR value
16220 ldx [%g2], %g4
16221 xorcc %g7, %g4, %g5
16222 bne test_failed
16223 nop
16224
16225
16226 ! First check that the POR value is correct
16227 add %g2, 8, %g2
16228 ldx [%g2], %g4
16229 xorcc %g3, %g4, %g5
16230 bne test_failed
16231 nop
16232
16233 ! Next check that all the writable bits can be written
16234 stx %l2, [%g2] ! store inverted POR value
16235 ldx [%g2], %g4
16236 xorcc %g7, %g4, %g5
16237 bne test_failed
16238 nop
16239
16240
16241 ! First check that the POR value is correct
16242 add %g2, 8, %g2
16243 ldx [%g2], %g4
16244 xorcc %g3, %g4, %g5
16245 bne test_failed
16246 nop
16247
16248 ! Next check that all the writable bits can be written
16249 stx %l2, [%g2] ! store inverted POR value
16250 ldx [%g2], %g4
16251 xorcc %g7, %g4, %g5
16252 bne test_failed
16253 nop
16254
16255
16256 ! First check that the POR value is correct
16257 add %g2, 8, %g2
16258 ldx [%g2], %g4
16259 xorcc %g3, %g4, %g5
16260 bne test_failed
16261 nop
16262
16263 ! Next check that all the writable bits can be written
16264 stx %l2, [%g2] ! store inverted POR value
16265 ldx [%g2], %g4
16266 xorcc %g7, %g4, %g5
16267 bne test_failed
16268 nop
16269
16270
16271 ! First check that the POR value is correct
16272 add %g2, 8, %g2
16273 ldx [%g2], %g4
16274 xorcc %g3, %g4, %g5
16275 bne test_failed
16276 nop
16277
16278 ! Next check that all the writable bits can be written
16279 stx %l2, [%g2] ! store inverted POR value
16280 ldx [%g2], %g4
16281 xorcc %g7, %g4, %g5
16282 bne test_failed
16283 nop
16284
16285
16286 ! First check that the POR value is correct
16287 add %g2, 8, %g2
16288 ldx [%g2], %g4
16289 xorcc %g3, %g4, %g5
16290 bne test_failed
16291 nop
16292
16293 ! Next check that all the writable bits can be written
16294 stx %l2, [%g2] ! store inverted POR value
16295 ldx [%g2], %g4
16296 xorcc %g7, %g4, %g5
16297 bne test_failed
16298 nop
16299
16300
16301 ! First check that the POR value is correct
16302 add %g2, 8, %g2
16303 ldx [%g2], %g4
16304 xorcc %g3, %g4, %g5
16305 bne test_failed
16306 nop
16307
16308 ! Next check that all the writable bits can be written
16309 stx %l2, [%g2] ! store inverted POR value
16310 ldx [%g2], %g4
16311 xorcc %g7, %g4, %g5
16312 bne test_failed
16313 nop
16314
16315
16316 ! First check that the POR value is correct
16317 add %g2, 8, %g2
16318 ldx [%g2], %g4
16319 xorcc %g3, %g4, %g5
16320 bne test_failed
16321 nop
16322
16323 ! Next check that all the writable bits can be written
16324 stx %l2, [%g2] ! store inverted POR value
16325 ldx [%g2], %g4
16326 xorcc %g7, %g4, %g5
16327 bne test_failed
16328 nop
16329
16330
16331 ! First check that the POR value is correct
16332 add %g2, 8, %g2
16333 ldx [%g2], %g4
16334 xorcc %g3, %g4, %g5
16335 bne test_failed
16336 nop
16337
16338 ! Next check that all the writable bits can be written
16339 stx %l2, [%g2] ! store inverted POR value
16340 ldx [%g2], %g4
16341 xorcc %g7, %g4, %g5
16342 bne test_failed
16343 nop
16344
16345
16346 ! First check that the POR value is correct
16347 add %g2, 8, %g2
16348 ldx [%g2], %g4
16349 xorcc %g3, %g4, %g5
16350 bne test_failed
16351 nop
16352
16353 ! Next check that all the writable bits can be written
16354 stx %l2, [%g2] ! store inverted POR value
16355 ldx [%g2], %g4
16356 xorcc %g7, %g4, %g5
16357 bne test_failed
16358 nop
16359
16360
16361 ! First check that the POR value is correct
16362 add %g2, 8, %g2
16363 ldx [%g2], %g4
16364 xorcc %g3, %g4, %g5
16365 bne test_failed
16366 nop
16367
16368 ! Next check that all the writable bits can be written
16369 stx %l2, [%g2] ! store inverted POR value
16370 ldx [%g2], %g4
16371 xorcc %g7, %g4, %g5
16372 bne test_failed
16373 nop
16374
16375
16376 ! First check that the POR value is correct
16377 add %g2, 8, %g2
16378 ldx [%g2], %g4
16379 xorcc %g3, %g4, %g5
16380 bne test_failed
16381 nop
16382
16383 ! Next check that all the writable bits can be written
16384 stx %l2, [%g2] ! store inverted POR value
16385 ldx [%g2], %g4
16386 xorcc %g7, %g4, %g5
16387 bne test_failed
16388 nop
16389
16390
16391 ! First check that the POR value is correct
16392 add %g2, 8, %g2
16393 ldx [%g2], %g4
16394 xorcc %g3, %g4, %g5
16395 bne test_failed
16396 nop
16397
16398 ! Next check that all the writable bits can be written
16399 stx %l2, [%g2] ! store inverted POR value
16400 ldx [%g2], %g4
16401 xorcc %g7, %g4, %g5
16402 bne test_failed
16403 nop
16404
16405
16406 ! First check that the POR value is correct
16407 add %g2, 8, %g2
16408 ldx [%g2], %g4
16409 xorcc %g3, %g4, %g5
16410 bne test_failed
16411 nop
16412
16413 ! Next check that all the writable bits can be written
16414 stx %l2, [%g2] ! store inverted POR value
16415 ldx [%g2], %g4
16416 xorcc %g7, %g4, %g5
16417 bne test_failed
16418 nop
16419
16420
16421 ! First check that the POR value is correct
16422 add %g2, 8, %g2
16423 ldx [%g2], %g4
16424 xorcc %g3, %g4, %g5
16425 bne test_failed
16426 nop
16427
16428 ! Next check that all the writable bits can be written
16429 stx %l2, [%g2] ! store inverted POR value
16430 ldx [%g2], %g4
16431 xorcc %g7, %g4, %g5
16432 bne test_failed
16433 nop
16434
16435
16436 ! First check that the POR value is correct
16437 add %g2, 8, %g2
16438 ldx [%g2], %g4
16439 xorcc %g3, %g4, %g5
16440 bne test_failed
16441 nop
16442
16443 ! Next check that all the writable bits can be written
16444 stx %l2, [%g2] ! store inverted POR value
16445 ldx [%g2], %g4
16446 xorcc %g7, %g4, %g5
16447 bne test_failed
16448 nop
16449
16450
16451 ! First check that the POR value is correct
16452 add %g2, 8, %g2
16453 ldx [%g2], %g4
16454 xorcc %g3, %g4, %g5
16455 bne test_failed
16456 nop
16457
16458 ! Next check that all the writable bits can be written
16459 stx %l2, [%g2] ! store inverted POR value
16460 ldx [%g2], %g4
16461 xorcc %g7, %g4, %g5
16462 bne test_failed
16463 nop
16464
16465
16466 ! First check that the POR value is correct
16467 add %g2, 8, %g2
16468 ldx [%g2], %g4
16469 xorcc %g3, %g4, %g5
16470 bne test_failed
16471 nop
16472
16473 ! Next check that all the writable bits can be written
16474 stx %l2, [%g2] ! store inverted POR value
16475 ldx [%g2], %g4
16476 xorcc %g7, %g4, %g5
16477 bne test_failed
16478 nop
16479
16480
16481 ! First check that the POR value is correct
16482 add %g2, 8, %g2
16483 ldx [%g2], %g4
16484 xorcc %g3, %g4, %g5
16485 bne test_failed
16486 nop
16487
16488 ! Next check that all the writable bits can be written
16489 stx %l2, [%g2] ! store inverted POR value
16490 ldx [%g2], %g4
16491 xorcc %g7, %g4, %g5
16492 bne test_failed
16493 nop
16494
16495
16496 ! First check that the POR value is correct
16497 add %g2, 8, %g2
16498 ldx [%g2], %g4
16499 xorcc %g3, %g4, %g5
16500 bne test_failed
16501 nop
16502
16503 ! Next check that all the writable bits can be written
16504 stx %l2, [%g2] ! store inverted POR value
16505 ldx [%g2], %g4
16506 xorcc %g7, %g4, %g5
16507 bne test_failed
16508 nop
16509
16510
16511 ! First check that the POR value is correct
16512 add %g2, 8, %g2
16513 ldx [%g2], %g4
16514 xorcc %g3, %g4, %g5
16515 bne test_failed
16516 nop
16517
16518 ! Next check that all the writable bits can be written
16519 stx %l2, [%g2] ! store inverted POR value
16520 ldx [%g2], %g4
16521 xorcc %g7, %g4, %g5
16522 bne test_failed
16523 nop
16524
16525
16526 ! First check that the POR value is correct
16527 add %g2, 8, %g2
16528 ldx [%g2], %g4
16529 xorcc %g3, %g4, %g5
16530 bne test_failed
16531 nop
16532
16533 ! Next check that all the writable bits can be written
16534 stx %l2, [%g2] ! store inverted POR value
16535 ldx [%g2], %g4
16536 xorcc %g7, %g4, %g5
16537 bne test_failed
16538 nop
16539
16540
16541 ! First check that the POR value is correct
16542 add %g2, 8, %g2
16543 ldx [%g2], %g4
16544 xorcc %g3, %g4, %g5
16545 bne test_failed
16546 nop
16547
16548 ! Next check that all the writable bits can be written
16549 stx %l2, [%g2] ! store inverted POR value
16550 ldx [%g2], %g4
16551 xorcc %g7, %g4, %g5
16552 bne test_failed
16553 nop
16554
16555
16556 ! First check that the POR value is correct
16557 add %g2, 8, %g2
16558 ldx [%g2], %g4
16559 xorcc %g3, %g4, %g5
16560 bne test_failed
16561 nop
16562
16563 ! Next check that all the writable bits can be written
16564 stx %l2, [%g2] ! store inverted POR value
16565 ldx [%g2], %g4
16566 xorcc %g7, %g4, %g5
16567 bne test_failed
16568 nop
16569
16570
16571 ! First check that the POR value is correct
16572 add %g2, 8, %g2
16573 ldx [%g2], %g4
16574 xorcc %g3, %g4, %g5
16575 bne test_failed
16576 nop
16577
16578 ! Next check that all the writable bits can be written
16579 stx %l2, [%g2] ! store inverted POR value
16580 ldx [%g2], %g4
16581 xorcc %g7, %g4, %g5
16582 bne test_failed
16583 nop
16584
16585
16586 ! First check that the POR value is correct
16587 add %g2, 8, %g2
16588 ldx [%g2], %g4
16589 xorcc %g3, %g4, %g5
16590 bne test_failed
16591 nop
16592
16593 ! Next check that all the writable bits can be written
16594 stx %l2, [%g2] ! store inverted POR value
16595 ldx [%g2], %g4
16596 xorcc %g7, %g4, %g5
16597 bne test_failed
16598 nop
16599
16600
16601 ! First check that the POR value is correct
16602 add %g2, 8, %g2
16603 ldx [%g2], %g4
16604 xorcc %g3, %g4, %g5
16605 bne test_failed
16606 nop
16607
16608 ! Next check that all the writable bits can be written
16609 stx %l2, [%g2] ! store inverted POR value
16610 ldx [%g2], %g4
16611 xorcc %g7, %g4, %g5
16612 bne test_failed
16613 nop
16614
16615
16616 ! First check that the POR value is correct
16617 add %g2, 8, %g2
16618 ldx [%g2], %g4
16619 xorcc %g3, %g4, %g5
16620 bne test_failed
16621 nop
16622
16623 ! Next check that all the writable bits can be written
16624 stx %l2, [%g2] ! store inverted POR value
16625 ldx [%g2], %g4
16626 xorcc %g7, %g4, %g5
16627 bne test_failed
16628 nop
16629
16630
16631 ! First check that the POR value is correct
16632 add %g2, 8, %g2
16633 ldx [%g2], %g4
16634 xorcc %g3, %g4, %g5
16635 bne test_failed
16636 nop
16637
16638 ! Next check that all the writable bits can be written
16639 stx %l2, [%g2] ! store inverted POR value
16640 ldx [%g2], %g4
16641 xorcc %g7, %g4, %g5
16642 bne test_failed
16643 nop
16644
16645
16646 ! First check that the POR value is correct
16647 add %g2, 8, %g2
16648 ldx [%g2], %g4
16649 xorcc %g3, %g4, %g5
16650 bne test_failed
16651 nop
16652
16653 ! Next check that all the writable bits can be written
16654 stx %l2, [%g2] ! store inverted POR value
16655 ldx [%g2], %g4
16656 xorcc %g7, %g4, %g5
16657 bne test_failed
16658 nop
16659
16660
16661 ! First check that the POR value is correct
16662 add %g2, 8, %g2
16663 ldx [%g2], %g4
16664 xorcc %g3, %g4, %g5
16665 bne test_failed
16666 nop
16667
16668 ! Next check that all the writable bits can be written
16669 stx %l2, [%g2] ! store inverted POR value
16670 ldx [%g2], %g4
16671 xorcc %g7, %g4, %g5
16672 bne test_failed
16673 nop
16674
16675
16676 ! First check that the POR value is correct
16677 add %g2, 8, %g2
16678 ldx [%g2], %g4
16679 xorcc %g3, %g4, %g5
16680 bne test_failed
16681 nop
16682
16683 ! Next check that all the writable bits can be written
16684 stx %l2, [%g2] ! store inverted POR value
16685 ldx [%g2], %g4
16686 xorcc %g7, %g4, %g5
16687 bne test_failed
16688 nop
16689
16690
16691 ! First check that the POR value is correct
16692 add %g2, 8, %g2
16693 ldx [%g2], %g4
16694 xorcc %g3, %g4, %g5
16695 bne test_failed
16696 nop
16697
16698 ! Next check that all the writable bits can be written
16699 stx %l2, [%g2] ! store inverted POR value
16700 ldx [%g2], %g4
16701 xorcc %g7, %g4, %g5
16702 bne test_failed
16703 nop
16704
16705
16706 ! First check that the POR value is correct
16707 add %g2, 8, %g2
16708 ldx [%g2], %g4
16709 xorcc %g3, %g4, %g5
16710 bne test_failed
16711 nop
16712
16713 ! Next check that all the writable bits can be written
16714 stx %l2, [%g2] ! store inverted POR value
16715 ldx [%g2], %g4
16716 xorcc %g7, %g4, %g5
16717 bne test_failed
16718 nop
16719
16720
16721 ! First check that the POR value is correct
16722 add %g2, 8, %g2
16723 ldx [%g2], %g4
16724 xorcc %g3, %g4, %g5
16725 bne test_failed
16726 nop
16727
16728 ! Next check that all the writable bits can be written
16729 stx %l2, [%g2] ! store inverted POR value
16730 ldx [%g2], %g4
16731 xorcc %g7, %g4, %g5
16732 bne test_failed
16733 nop
16734
16735
16736 ! First check that the POR value is correct
16737 add %g2, 8, %g2
16738 ldx [%g2], %g4
16739 xorcc %g3, %g4, %g5
16740 bne test_failed
16741 nop
16742
16743 ! Next check that all the writable bits can be written
16744 stx %l2, [%g2] ! store inverted POR value
16745 ldx [%g2], %g4
16746 xorcc %g7, %g4, %g5
16747 bne test_failed
16748 nop
16749
16750
16751 ! First check that the POR value is correct
16752 add %g2, 8, %g2
16753 ldx [%g2], %g4
16754 xorcc %g3, %g4, %g5
16755 bne test_failed
16756 nop
16757
16758 ! Next check that all the writable bits can be written
16759 stx %l2, [%g2] ! store inverted POR value
16760 ldx [%g2], %g4
16761 xorcc %g7, %g4, %g5
16762 bne test_failed
16763 nop
16764
16765
16766 ! First check that the POR value is correct
16767 add %g2, 8, %g2
16768 ldx [%g2], %g4
16769 xorcc %g3, %g4, %g5
16770 bne test_failed
16771 nop
16772
16773 ! Next check that all the writable bits can be written
16774 stx %l2, [%g2] ! store inverted POR value
16775 ldx [%g2], %g4
16776 xorcc %g7, %g4, %g5
16777 bne test_failed
16778 nop
16779
16780
16781 ! First check that the POR value is correct
16782 add %g2, 8, %g2
16783 ldx [%g2], %g4
16784 xorcc %g3, %g4, %g5
16785 bne test_failed
16786 nop
16787
16788 ! Next check that all the writable bits can be written
16789 stx %l2, [%g2] ! store inverted POR value
16790 ldx [%g2], %g4
16791 xorcc %g7, %g4, %g5
16792 bne test_failed
16793 nop
16794
16795
16796 ! First check that the POR value is correct
16797 add %g2, 8, %g2
16798 ldx [%g2], %g4
16799 xorcc %g3, %g4, %g5
16800 bne test_failed
16801 nop
16802
16803 ! Next check that all the writable bits can be written
16804 stx %l2, [%g2] ! store inverted POR value
16805 ldx [%g2], %g4
16806 xorcc %g7, %g4, %g5
16807 bne test_failed
16808 nop
16809
16810
16811 ! First check that the POR value is correct
16812 add %g2, 8, %g2
16813 ldx [%g2], %g4
16814 xorcc %g3, %g4, %g5
16815 bne test_failed
16816 nop
16817
16818 ! Next check that all the writable bits can be written
16819 stx %l2, [%g2] ! store inverted POR value
16820 ldx [%g2], %g4
16821 xorcc %g7, %g4, %g5
16822 bne test_failed
16823 nop
16824
16825
16826 ! First check that the POR value is correct
16827 add %g2, 8, %g2
16828 ldx [%g2], %g4
16829 xorcc %g3, %g4, %g5
16830 bne test_failed
16831 nop
16832
16833 ! Next check that all the writable bits can be written
16834 stx %l2, [%g2] ! store inverted POR value
16835 ldx [%g2], %g4
16836 xorcc %g7, %g4, %g5
16837 bne test_failed
16838 nop
16839
16840
16841 ! First check that the POR value is correct
16842 add %g2, 8, %g2
16843 ldx [%g2], %g4
16844 xorcc %g3, %g4, %g5
16845 bne test_failed
16846 nop
16847
16848 ! Next check that all the writable bits can be written
16849 stx %l2, [%g2] ! store inverted POR value
16850 ldx [%g2], %g4
16851 xorcc %g7, %g4, %g5
16852 bne test_failed
16853 nop
16854
16855
16856 ! First check that the POR value is correct
16857 add %g2, 8, %g2
16858 ldx [%g2], %g4
16859 xorcc %g3, %g4, %g5
16860 bne test_failed
16861 nop
16862
16863 ! Next check that all the writable bits can be written
16864 stx %l2, [%g2] ! store inverted POR value
16865 ldx [%g2], %g4
16866 xorcc %g7, %g4, %g5
16867 bne test_failed
16868 nop
16869
16870
16871 ! First check that the POR value is correct
16872 add %g2, 8, %g2
16873 ldx [%g2], %g4
16874 xorcc %g3, %g4, %g5
16875 bne test_failed
16876 nop
16877
16878 ! Next check that all the writable bits can be written
16879 stx %l2, [%g2] ! store inverted POR value
16880 ldx [%g2], %g4
16881 xorcc %g7, %g4, %g5
16882 bne test_failed
16883 nop
16884
16885
16886 ! First check that the POR value is correct
16887 add %g2, 8, %g2
16888 ldx [%g2], %g4
16889 xorcc %g3, %g4, %g5
16890 bne test_failed
16891 nop
16892
16893 ! Next check that all the writable bits can be written
16894 stx %l2, [%g2] ! store inverted POR value
16895 ldx [%g2], %g4
16896 xorcc %g7, %g4, %g5
16897 bne test_failed
16898 nop
16899
16900
16901 ! First check that the POR value is correct
16902 add %g2, 8, %g2
16903 ldx [%g2], %g4
16904 xorcc %g3, %g4, %g5
16905 bne test_failed
16906 nop
16907
16908 ! Next check that all the writable bits can be written
16909 stx %l2, [%g2] ! store inverted POR value
16910 ldx [%g2], %g4
16911 xorcc %g7, %g4, %g5
16912 bne test_failed
16913 nop
16914
16915
16916 ! First check that the POR value is correct
16917 add %g2, 8, %g2
16918 ldx [%g2], %g4
16919 xorcc %g3, %g4, %g5
16920 bne test_failed
16921 nop
16922
16923 ! Next check that all the writable bits can be written
16924 stx %l2, [%g2] ! store inverted POR value
16925 ldx [%g2], %g4
16926 xorcc %g7, %g4, %g5
16927 bne test_failed
16928 nop
16929
16930
16931 ! First check that the POR value is correct
16932 add %g2, 8, %g2
16933 ldx [%g2], %g4
16934 xorcc %g3, %g4, %g5
16935 bne test_failed
16936 nop
16937
16938 ! Next check that all the writable bits can be written
16939 stx %l2, [%g2] ! store inverted POR value
16940 ldx [%g2], %g4
16941 xorcc %g7, %g4, %g5
16942 bne test_failed
16943 nop
16944
16945
16946 ! First check that the POR value is correct
16947 add %g2, 8, %g2
16948 ldx [%g2], %g4
16949 xorcc %g3, %g4, %g5
16950 bne test_failed
16951 nop
16952
16953 ! Next check that all the writable bits can be written
16954 stx %l2, [%g2] ! store inverted POR value
16955 ldx [%g2], %g4
16956 xorcc %g7, %g4, %g5
16957 bne test_failed
16958 nop
16959
16960
16961 ! First check that the POR value is correct
16962 add %g2, 8, %g2
16963 ldx [%g2], %g4
16964 xorcc %g3, %g4, %g5
16965 bne test_failed
16966 nop
16967
16968 ! Next check that all the writable bits can be written
16969 stx %l2, [%g2] ! store inverted POR value
16970 ldx [%g2], %g4
16971 xorcc %g7, %g4, %g5
16972 bne test_failed
16973 nop
16974
16975
16976 ! First check that the POR value is correct
16977 add %g2, 8, %g2
16978 ldx [%g2], %g4
16979 xorcc %g3, %g4, %g5
16980 bne test_failed
16981 nop
16982
16983 ! Next check that all the writable bits can be written
16984 stx %l2, [%g2] ! store inverted POR value
16985 ldx [%g2], %g4
16986 xorcc %g7, %g4, %g5
16987 bne test_failed
16988 nop
16989
16990
16991 ! First check that the POR value is correct
16992 add %g2, 8, %g2
16993 ldx [%g2], %g4
16994 xorcc %g3, %g4, %g5
16995 bne test_failed
16996 nop
16997
16998 ! Next check that all the writable bits can be written
16999 stx %l2, [%g2] ! store inverted POR value
17000 ldx [%g2], %g4
17001 xorcc %g7, %g4, %g5
17002 bne test_failed
17003 nop
17004
17005
17006 ! First check that the POR value is correct
17007 add %g2, 8, %g2
17008 ldx [%g2], %g4
17009 xorcc %g3, %g4, %g5
17010 bne test_failed
17011 nop
17012
17013 ! Next check that all the writable bits can be written
17014 stx %l2, [%g2] ! store inverted POR value
17015 ldx [%g2], %g4
17016 xorcc %g7, %g4, %g5
17017 bne test_failed
17018 nop
17019
17020
17021 ! First check that the POR value is correct
17022 add %g2, 8, %g2
17023 ldx [%g2], %g4
17024 xorcc %g3, %g4, %g5
17025 bne test_failed
17026 nop
17027
17028 ! Next check that all the writable bits can be written
17029 stx %l2, [%g2] ! store inverted POR value
17030 ldx [%g2], %g4
17031 xorcc %g7, %g4, %g5
17032 bne test_failed
17033 nop
17034
17035
17036 ! First check that the POR value is correct
17037 add %g2, 8, %g2
17038 ldx [%g2], %g4
17039 xorcc %g3, %g4, %g5
17040 bne test_failed
17041 nop
17042
17043 ! Next check that all the writable bits can be written
17044 stx %l2, [%g2] ! store inverted POR value
17045 ldx [%g2], %g4
17046 xorcc %g7, %g4, %g5
17047 bne test_failed
17048 nop
17049
17050
17051 ! First check that the POR value is correct
17052 add %g2, 8, %g2
17053 ldx [%g2], %g4
17054 xorcc %g3, %g4, %g5
17055 bne test_failed
17056 nop
17057
17058 ! Next check that all the writable bits can be written
17059 stx %l2, [%g2] ! store inverted POR value
17060 ldx [%g2], %g4
17061 xorcc %g7, %g4, %g5
17062 bne test_failed
17063 nop
17064
17065
17066 ! First check that the POR value is correct
17067 add %g2, 8, %g2
17068 ldx [%g2], %g4
17069 xorcc %g3, %g4, %g5
17070 bne test_failed
17071 nop
17072
17073 ! Next check that all the writable bits can be written
17074 stx %l2, [%g2] ! store inverted POR value
17075 ldx [%g2], %g4
17076 xorcc %g7, %g4, %g5
17077 bne test_failed
17078 nop
17079
17080
17081 ! First check that the POR value is correct
17082 add %g2, 8, %g2
17083 ldx [%g2], %g4
17084 xorcc %g3, %g4, %g5
17085 bne test_failed
17086 nop
17087
17088 ! Next check that all the writable bits can be written
17089 stx %l2, [%g2] ! store inverted POR value
17090 ldx [%g2], %g4
17091 xorcc %g7, %g4, %g5
17092 bne test_failed
17093 nop
17094
17095
17096 ! First check that the POR value is correct
17097 add %g2, 8, %g2
17098 ldx [%g2], %g4
17099 xorcc %g3, %g4, %g5
17100 bne test_failed
17101 nop
17102
17103 ! Next check that all the writable bits can be written
17104 stx %l2, [%g2] ! store inverted POR value
17105 ldx [%g2], %g4
17106 xorcc %g7, %g4, %g5
17107 bne test_failed
17108 nop
17109
17110
17111 ! First check that the POR value is correct
17112 add %g2, 8, %g2
17113 ldx [%g2], %g4
17114 xorcc %g3, %g4, %g5
17115 bne test_failed
17116 nop
17117
17118 ! Next check that all the writable bits can be written
17119 stx %l2, [%g2] ! store inverted POR value
17120 ldx [%g2], %g4
17121 xorcc %g7, %g4, %g5
17122 bne test_failed
17123 nop
17124
17125
17126 ! First check that the POR value is correct
17127 add %g2, 8, %g2
17128 ldx [%g2], %g4
17129 xorcc %g3, %g4, %g5
17130 bne test_failed
17131 nop
17132
17133 ! Next check that all the writable bits can be written
17134 stx %l2, [%g2] ! store inverted POR value
17135 ldx [%g2], %g4
17136 xorcc %g7, %g4, %g5
17137 bne test_failed
17138 nop
17139
17140
17141 ! First check that the POR value is correct
17142 add %g2, 8, %g2
17143 ldx [%g2], %g4
17144 xorcc %g3, %g4, %g5
17145 bne test_failed
17146 nop
17147
17148 ! Next check that all the writable bits can be written
17149 stx %l2, [%g2] ! store inverted POR value
17150 ldx [%g2], %g4
17151 xorcc %g7, %g4, %g5
17152 bne test_failed
17153 nop
17154
17155
17156 ! First check that the POR value is correct
17157 add %g2, 8, %g2
17158 ldx [%g2], %g4
17159 xorcc %g3, %g4, %g5
17160 bne test_failed
17161 nop
17162
17163 ! Next check that all the writable bits can be written
17164 stx %l2, [%g2] ! store inverted POR value
17165 ldx [%g2], %g4
17166 xorcc %g7, %g4, %g5
17167 bne test_failed
17168 nop
17169
17170
17171 ! First check that the POR value is correct
17172 add %g2, 8, %g2
17173 ldx [%g2], %g4
17174 xorcc %g3, %g4, %g5
17175 bne test_failed
17176 nop
17177
17178 ! Next check that all the writable bits can be written
17179 stx %l2, [%g2] ! store inverted POR value
17180 ldx [%g2], %g4
17181 xorcc %g7, %g4, %g5
17182 bne test_failed
17183 nop
17184
17185
17186 ! First check that the POR value is correct
17187 add %g2, 8, %g2
17188 ldx [%g2], %g4
17189 xorcc %g3, %g4, %g5
17190 bne test_failed
17191 nop
17192
17193 ! Next check that all the writable bits can be written
17194 stx %l2, [%g2] ! store inverted POR value
17195 ldx [%g2], %g4
17196 xorcc %g7, %g4, %g5
17197 bne test_failed
17198 nop
17199
17200
17201 ! First check that the POR value is correct
17202 add %g2, 8, %g2
17203 ldx [%g2], %g4
17204 xorcc %g3, %g4, %g5
17205 bne test_failed
17206 nop
17207
17208 ! Next check that all the writable bits can be written
17209 stx %l2, [%g2] ! store inverted POR value
17210 ldx [%g2], %g4
17211 xorcc %g7, %g4, %g5
17212 bne test_failed
17213 nop
17214
17215
17216 ! First check that the POR value is correct
17217 add %g2, 8, %g2
17218 ldx [%g2], %g4
17219 xorcc %g3, %g4, %g5
17220 bne test_failed
17221 nop
17222
17223 ! Next check that all the writable bits can be written
17224 stx %l2, [%g2] ! store inverted POR value
17225 ldx [%g2], %g4
17226 xorcc %g7, %g4, %g5
17227 bne test_failed
17228 nop
17229
17230
17231 ! First check that the POR value is correct
17232 add %g2, 8, %g2
17233 ldx [%g2], %g4
17234 xorcc %g3, %g4, %g5
17235 bne test_failed
17236 nop
17237
17238 ! Next check that all the writable bits can be written
17239 stx %l2, [%g2] ! store inverted POR value
17240 ldx [%g2], %g4
17241 xorcc %g7, %g4, %g5
17242 bne test_failed
17243 nop
17244
17245
17246 ! First check that the POR value is correct
17247 add %g2, 8, %g2
17248 ldx [%g2], %g4
17249 xorcc %g3, %g4, %g5
17250 bne test_failed
17251 nop
17252
17253 ! Next check that all the writable bits can be written
17254 stx %l2, [%g2] ! store inverted POR value
17255 ldx [%g2], %g4
17256 xorcc %g7, %g4, %g5
17257 bne test_failed
17258 nop
17259
17260
17261 ! First check that the POR value is correct
17262 add %g2, 8, %g2
17263 ldx [%g2], %g4
17264 xorcc %g3, %g4, %g5
17265 bne test_failed
17266 nop
17267
17268 ! Next check that all the writable bits can be written
17269 stx %l2, [%g2] ! store inverted POR value
17270 ldx [%g2], %g4
17271 xorcc %g7, %g4, %g5
17272 bne test_failed
17273 nop
17274
17275
17276 ! First check that the POR value is correct
17277 add %g2, 8, %g2
17278 ldx [%g2], %g4
17279 xorcc %g3, %g4, %g5
17280 bne test_failed
17281 nop
17282
17283 ! Next check that all the writable bits can be written
17284 stx %l2, [%g2] ! store inverted POR value
17285 ldx [%g2], %g4
17286 xorcc %g7, %g4, %g5
17287 bne test_failed
17288 nop
17289
17290
17291 ! First check that the POR value is correct
17292 add %g2, 8, %g2
17293 ldx [%g2], %g4
17294 xorcc %g3, %g4, %g5
17295 bne test_failed
17296 nop
17297
17298 ! Next check that all the writable bits can be written
17299 stx %l2, [%g2] ! store inverted POR value
17300 ldx [%g2], %g4
17301 xorcc %g7, %g4, %g5
17302 bne test_failed
17303 nop
17304
17305
17306 ! First check that the POR value is correct
17307 add %g2, 8, %g2
17308 ldx [%g2], %g4
17309 xorcc %g3, %g4, %g5
17310 bne test_failed
17311 nop
17312
17313 ! Next check that all the writable bits can be written
17314 stx %l2, [%g2] ! store inverted POR value
17315 ldx [%g2], %g4
17316 xorcc %g7, %g4, %g5
17317 bne test_failed
17318 nop
17319
17320
17321 ! First check that the POR value is correct
17322 add %g2, 8, %g2
17323 ldx [%g2], %g4
17324 xorcc %g3, %g4, %g5
17325 bne test_failed
17326 nop
17327
17328 ! Next check that all the writable bits can be written
17329 stx %l2, [%g2] ! store inverted POR value
17330 ldx [%g2], %g4
17331 xorcc %g7, %g4, %g5
17332 bne test_failed
17333 nop
17334
17335
17336 ! First check that the POR value is correct
17337 add %g2, 8, %g2
17338 ldx [%g2], %g4
17339 xorcc %g3, %g4, %g5
17340 bne test_failed
17341 nop
17342
17343 ! Next check that all the writable bits can be written
17344 stx %l2, [%g2] ! store inverted POR value
17345 ldx [%g2], %g4
17346 xorcc %g7, %g4, %g5
17347 bne test_failed
17348 nop
17349
17350
17351 ! First check that the POR value is correct
17352 add %g2, 8, %g2
17353 ldx [%g2], %g4
17354 xorcc %g3, %g4, %g5
17355 bne test_failed
17356 nop
17357
17358 ! Next check that all the writable bits can be written
17359 stx %l2, [%g2] ! store inverted POR value
17360 ldx [%g2], %g4
17361 xorcc %g7, %g4, %g5
17362 bne test_failed
17363 nop
17364
17365
17366 ba test_passed
17367 nop
17368
17369thread_6:
17370
17371REG_TEST_144:
17372 ! First check that the POR value is correct
17373 setx FIRE_DLC_IMU_RDS_MSI_CSR_A_INT_MONDO_DATA_0_REG_ADDR, %g1, %g2
17374 best_set_reg(FIRE_DLC_IMU_RDS_MSI_CSR_A_INT_MONDO_DATA_0_REG_POR_VALUE, %g1, %g3)
17375 ldx [%g2], %g4
17376 xorcc %g3, %g4, %g5
17377 bne test_failed
17378 nop
17379
17380 ! Next check that all the writable bits can be written
17381 xor %g3, %l1, %l2
17382 stx %l2, [%g2] ! store inverted POR value
17383
17384#define REG_144_EXP_VALUE mpeval( (~FIRE_DLC_IMU_RDS_MSI_CSR_A_INT_MONDO_DATA_0_REG_POR_VALUE & FIRE_DLC_IMU_RDS_MSI_CSR_A_INT_MONDO_DATA_0_REG_WRITE_MASK) | (FIRE_DLC_IMU_RDS_MSI_CSR_A_INT_MONDO_DATA_0_REG_POR_VALUE & ~FIRE_DLC_IMU_RDS_MSI_CSR_A_INT_MONDO_DATA_0_REG_WRITE_MASK) )
17385
17386 best_set_reg(REG_144_EXP_VALUE, %g1, %g7) ! get expected value
17387 ldx [%g2], %g4
17388 xorcc %g7, %g4, %g5
17389 bne test_failed
17390 nop
17391
17392
17393REG_TEST_145:
17394 ! First check that the POR value is correct
17395 setx FIRE_DLC_IMU_RDS_MSI_CSR_A_INT_MONDO_DATA_1_REG_ADDR, %g1, %g2
17396 best_set_reg(FIRE_DLC_IMU_RDS_MSI_CSR_A_INT_MONDO_DATA_1_REG_POR_VALUE, %g1, %g3)
17397 ldx [%g2], %g4
17398 xorcc %g3, %g4, %g5
17399 bne test_failed
17400 nop
17401
17402 ! Next check that all the writable bits can be written
17403 xor %g3, %l1, %l2
17404 stx %l2, [%g2] ! store inverted POR value
17405
17406#define REG_145_EXP_VALUE mpeval( (~FIRE_DLC_IMU_RDS_MSI_CSR_A_INT_MONDO_DATA_1_REG_POR_VALUE & FIRE_DLC_IMU_RDS_MSI_CSR_A_INT_MONDO_DATA_1_REG_WRITE_MASK) | (FIRE_DLC_IMU_RDS_MSI_CSR_A_INT_MONDO_DATA_1_REG_POR_VALUE & ~FIRE_DLC_IMU_RDS_MSI_CSR_A_INT_MONDO_DATA_1_REG_WRITE_MASK) )
17407
17408 best_set_reg(REG_145_EXP_VALUE, %g1, %g7) ! get expected value
17409 ldx [%g2], %g4
17410 xorcc %g7, %g4, %g5
17411 bne test_failed
17412 nop
17413
17414
17415REG_TEST_146:
17416 ! First check that the POR value is correct
17417 setx FIRE_DLC_PSB_CSR_A_PSB_DMA_ADDR, %g1, %g2
17418 best_set_reg(FIRE_DLC_PSB_CSR_A_PSB_DMA_POR_VALUE, %g1, %g3)
17419 ldx [%g2], %g4
17420 xorcc %g3, %g4, %g5
17421 bne test_failed
17422 nop
17423
17424 ! Next check that all the writable bits can be written
17425 xor %g3, %l1, %l2
17426 stx %l2, [%g2] ! store inverted POR value
17427
17428#define REG_146_EXP_VALUE mpeval( (~FIRE_DLC_PSB_CSR_A_PSB_DMA_POR_VALUE & FIRE_DLC_PSB_CSR_A_PSB_DMA_WRITE_MASK) | (FIRE_DLC_PSB_CSR_A_PSB_DMA_POR_VALUE & ~FIRE_DLC_PSB_CSR_A_PSB_DMA_WRITE_MASK) )
17429
17430 best_set_reg(REG_146_EXP_VALUE, %g1, %g7) ! get expected value
17431 ldx [%g2], %g4
17432 xorcc %g7, %g4, %g5
17433 bne test_failed
17434 nop
17435
17436
17437 ! First check that the POR value is correct
17438 add %g2, 8, %g2
17439 ldx [%g2], %g4
17440 xorcc %g3, %g4, %g5
17441 bne test_failed
17442 nop
17443
17444 ! Next check that all the writable bits can be written
17445 stx %l2, [%g2] ! store inverted POR value
17446 ldx [%g2], %g4
17447 xorcc %g7, %g4, %g5
17448 bne test_failed
17449 nop
17450
17451
17452 ! First check that the POR value is correct
17453 add %g2, 8, %g2
17454 ldx [%g2], %g4
17455 xorcc %g3, %g4, %g5
17456 bne test_failed
17457 nop
17458
17459 ! Next check that all the writable bits can be written
17460 stx %l2, [%g2] ! store inverted POR value
17461 ldx [%g2], %g4
17462 xorcc %g7, %g4, %g5
17463 bne test_failed
17464 nop
17465
17466
17467 ! First check that the POR value is correct
17468 add %g2, 8, %g2
17469 ldx [%g2], %g4
17470 xorcc %g3, %g4, %g5
17471 bne test_failed
17472 nop
17473
17474 ! Next check that all the writable bits can be written
17475 stx %l2, [%g2] ! store inverted POR value
17476 ldx [%g2], %g4
17477 xorcc %g7, %g4, %g5
17478 bne test_failed
17479 nop
17480
17481
17482 ! First check that the POR value is correct
17483 add %g2, 8, %g2
17484 ldx [%g2], %g4
17485 xorcc %g3, %g4, %g5
17486 bne test_failed
17487 nop
17488
17489 ! Next check that all the writable bits can be written
17490 stx %l2, [%g2] ! store inverted POR value
17491 ldx [%g2], %g4
17492 xorcc %g7, %g4, %g5
17493 bne test_failed
17494 nop
17495
17496
17497 ! First check that the POR value is correct
17498 add %g2, 8, %g2
17499 ldx [%g2], %g4
17500 xorcc %g3, %g4, %g5
17501 bne test_failed
17502 nop
17503
17504 ! Next check that all the writable bits can be written
17505 stx %l2, [%g2] ! store inverted POR value
17506 ldx [%g2], %g4
17507 xorcc %g7, %g4, %g5
17508 bne test_failed
17509 nop
17510
17511
17512 ! First check that the POR value is correct
17513 add %g2, 8, %g2
17514 ldx [%g2], %g4
17515 xorcc %g3, %g4, %g5
17516 bne test_failed
17517 nop
17518
17519 ! Next check that all the writable bits can be written
17520 stx %l2, [%g2] ! store inverted POR value
17521 ldx [%g2], %g4
17522 xorcc %g7, %g4, %g5
17523 bne test_failed
17524 nop
17525
17526
17527 ! First check that the POR value is correct
17528 add %g2, 8, %g2
17529 ldx [%g2], %g4
17530 xorcc %g3, %g4, %g5
17531 bne test_failed
17532 nop
17533
17534 ! Next check that all the writable bits can be written
17535 stx %l2, [%g2] ! store inverted POR value
17536 ldx [%g2], %g4
17537 xorcc %g7, %g4, %g5
17538 bne test_failed
17539 nop
17540
17541
17542 ! First check that the POR value is correct
17543 add %g2, 8, %g2
17544 ldx [%g2], %g4
17545 xorcc %g3, %g4, %g5
17546 bne test_failed
17547 nop
17548
17549 ! Next check that all the writable bits can be written
17550 stx %l2, [%g2] ! store inverted POR value
17551 ldx [%g2], %g4
17552 xorcc %g7, %g4, %g5
17553 bne test_failed
17554 nop
17555
17556
17557 ! First check that the POR value is correct
17558 add %g2, 8, %g2
17559 ldx [%g2], %g4
17560 xorcc %g3, %g4, %g5
17561 bne test_failed
17562 nop
17563
17564 ! Next check that all the writable bits can be written
17565 stx %l2, [%g2] ! store inverted POR value
17566 ldx [%g2], %g4
17567 xorcc %g7, %g4, %g5
17568 bne test_failed
17569 nop
17570
17571
17572 ! First check that the POR value is correct
17573 add %g2, 8, %g2
17574 ldx [%g2], %g4
17575 xorcc %g3, %g4, %g5
17576 bne test_failed
17577 nop
17578
17579 ! Next check that all the writable bits can be written
17580 stx %l2, [%g2] ! store inverted POR value
17581 ldx [%g2], %g4
17582 xorcc %g7, %g4, %g5
17583 bne test_failed
17584 nop
17585
17586
17587 ! First check that the POR value is correct
17588 add %g2, 8, %g2
17589 ldx [%g2], %g4
17590 xorcc %g3, %g4, %g5
17591 bne test_failed
17592 nop
17593
17594 ! Next check that all the writable bits can be written
17595 stx %l2, [%g2] ! store inverted POR value
17596 ldx [%g2], %g4
17597 xorcc %g7, %g4, %g5
17598 bne test_failed
17599 nop
17600
17601
17602 ! First check that the POR value is correct
17603 add %g2, 8, %g2
17604 ldx [%g2], %g4
17605 xorcc %g3, %g4, %g5
17606 bne test_failed
17607 nop
17608
17609 ! Next check that all the writable bits can be written
17610 stx %l2, [%g2] ! store inverted POR value
17611 ldx [%g2], %g4
17612 xorcc %g7, %g4, %g5
17613 bne test_failed
17614 nop
17615
17616
17617 ! First check that the POR value is correct
17618 add %g2, 8, %g2
17619 ldx [%g2], %g4
17620 xorcc %g3, %g4, %g5
17621 bne test_failed
17622 nop
17623
17624 ! Next check that all the writable bits can be written
17625 stx %l2, [%g2] ! store inverted POR value
17626 ldx [%g2], %g4
17627 xorcc %g7, %g4, %g5
17628 bne test_failed
17629 nop
17630
17631
17632 ! First check that the POR value is correct
17633 add %g2, 8, %g2
17634 ldx [%g2], %g4
17635 xorcc %g3, %g4, %g5
17636 bne test_failed
17637 nop
17638
17639 ! Next check that all the writable bits can be written
17640 stx %l2, [%g2] ! store inverted POR value
17641 ldx [%g2], %g4
17642 xorcc %g7, %g4, %g5
17643 bne test_failed
17644 nop
17645
17646
17647 ! First check that the POR value is correct
17648 add %g2, 8, %g2
17649 ldx [%g2], %g4
17650 xorcc %g3, %g4, %g5
17651 bne test_failed
17652 nop
17653
17654 ! Next check that all the writable bits can be written
17655 stx %l2, [%g2] ! store inverted POR value
17656 ldx [%g2], %g4
17657 xorcc %g7, %g4, %g5
17658 bne test_failed
17659 nop
17660
17661
17662 ! First check that the POR value is correct
17663 add %g2, 8, %g2
17664 ldx [%g2], %g4
17665 xorcc %g3, %g4, %g5
17666 bne test_failed
17667 nop
17668
17669 ! Next check that all the writable bits can be written
17670 stx %l2, [%g2] ! store inverted POR value
17671 ldx [%g2], %g4
17672 xorcc %g7, %g4, %g5
17673 bne test_failed
17674 nop
17675
17676
17677 ! First check that the POR value is correct
17678 add %g2, 8, %g2
17679 ldx [%g2], %g4
17680 xorcc %g3, %g4, %g5
17681 bne test_failed
17682 nop
17683
17684 ! Next check that all the writable bits can be written
17685 stx %l2, [%g2] ! store inverted POR value
17686 ldx [%g2], %g4
17687 xorcc %g7, %g4, %g5
17688 bne test_failed
17689 nop
17690
17691
17692 ! First check that the POR value is correct
17693 add %g2, 8, %g2
17694 ldx [%g2], %g4
17695 xorcc %g3, %g4, %g5
17696 bne test_failed
17697 nop
17698
17699 ! Next check that all the writable bits can be written
17700 stx %l2, [%g2] ! store inverted POR value
17701 ldx [%g2], %g4
17702 xorcc %g7, %g4, %g5
17703 bne test_failed
17704 nop
17705
17706
17707 ! First check that the POR value is correct
17708 add %g2, 8, %g2
17709 ldx [%g2], %g4
17710 xorcc %g3, %g4, %g5
17711 bne test_failed
17712 nop
17713
17714 ! Next check that all the writable bits can be written
17715 stx %l2, [%g2] ! store inverted POR value
17716 ldx [%g2], %g4
17717 xorcc %g7, %g4, %g5
17718 bne test_failed
17719 nop
17720
17721
17722 ! First check that the POR value is correct
17723 add %g2, 8, %g2
17724 ldx [%g2], %g4
17725 xorcc %g3, %g4, %g5
17726 bne test_failed
17727 nop
17728
17729 ! Next check that all the writable bits can be written
17730 stx %l2, [%g2] ! store inverted POR value
17731 ldx [%g2], %g4
17732 xorcc %g7, %g4, %g5
17733 bne test_failed
17734 nop
17735
17736
17737 ! First check that the POR value is correct
17738 add %g2, 8, %g2
17739 ldx [%g2], %g4
17740 xorcc %g3, %g4, %g5
17741 bne test_failed
17742 nop
17743
17744 ! Next check that all the writable bits can be written
17745 stx %l2, [%g2] ! store inverted POR value
17746 ldx [%g2], %g4
17747 xorcc %g7, %g4, %g5
17748 bne test_failed
17749 nop
17750
17751
17752 ! First check that the POR value is correct
17753 add %g2, 8, %g2
17754 ldx [%g2], %g4
17755 xorcc %g3, %g4, %g5
17756 bne test_failed
17757 nop
17758
17759 ! Next check that all the writable bits can be written
17760 stx %l2, [%g2] ! store inverted POR value
17761 ldx [%g2], %g4
17762 xorcc %g7, %g4, %g5
17763 bne test_failed
17764 nop
17765
17766
17767 ! First check that the POR value is correct
17768 add %g2, 8, %g2
17769 ldx [%g2], %g4
17770 xorcc %g3, %g4, %g5
17771 bne test_failed
17772 nop
17773
17774 ! Next check that all the writable bits can be written
17775 stx %l2, [%g2] ! store inverted POR value
17776 ldx [%g2], %g4
17777 xorcc %g7, %g4, %g5
17778 bne test_failed
17779 nop
17780
17781
17782 ! First check that the POR value is correct
17783 add %g2, 8, %g2
17784 ldx [%g2], %g4
17785 xorcc %g3, %g4, %g5
17786 bne test_failed
17787 nop
17788
17789 ! Next check that all the writable bits can be written
17790 stx %l2, [%g2] ! store inverted POR value
17791 ldx [%g2], %g4
17792 xorcc %g7, %g4, %g5
17793 bne test_failed
17794 nop
17795
17796
17797 ! First check that the POR value is correct
17798 add %g2, 8, %g2
17799 ldx [%g2], %g4
17800 xorcc %g3, %g4, %g5
17801 bne test_failed
17802 nop
17803
17804 ! Next check that all the writable bits can be written
17805 stx %l2, [%g2] ! store inverted POR value
17806 ldx [%g2], %g4
17807 xorcc %g7, %g4, %g5
17808 bne test_failed
17809 nop
17810
17811
17812 ! First check that the POR value is correct
17813 add %g2, 8, %g2
17814 ldx [%g2], %g4
17815 xorcc %g3, %g4, %g5
17816 bne test_failed
17817 nop
17818
17819 ! Next check that all the writable bits can be written
17820 stx %l2, [%g2] ! store inverted POR value
17821 ldx [%g2], %g4
17822 xorcc %g7, %g4, %g5
17823 bne test_failed
17824 nop
17825
17826
17827 ! First check that the POR value is correct
17828 add %g2, 8, %g2
17829 ldx [%g2], %g4
17830 xorcc %g3, %g4, %g5
17831 bne test_failed
17832 nop
17833
17834 ! Next check that all the writable bits can be written
17835 stx %l2, [%g2] ! store inverted POR value
17836 ldx [%g2], %g4
17837 xorcc %g7, %g4, %g5
17838 bne test_failed
17839 nop
17840
17841
17842 ! First check that the POR value is correct
17843 add %g2, 8, %g2
17844 ldx [%g2], %g4
17845 xorcc %g3, %g4, %g5
17846 bne test_failed
17847 nop
17848
17849 ! Next check that all the writable bits can be written
17850 stx %l2, [%g2] ! store inverted POR value
17851 ldx [%g2], %g4
17852 xorcc %g7, %g4, %g5
17853 bne test_failed
17854 nop
17855
17856
17857 ! First check that the POR value is correct
17858 add %g2, 8, %g2
17859 ldx [%g2], %g4
17860 xorcc %g3, %g4, %g5
17861 bne test_failed
17862 nop
17863
17864 ! Next check that all the writable bits can be written
17865 stx %l2, [%g2] ! store inverted POR value
17866 ldx [%g2], %g4
17867 xorcc %g7, %g4, %g5
17868 bne test_failed
17869 nop
17870
17871
17872 ! First check that the POR value is correct
17873 add %g2, 8, %g2
17874 ldx [%g2], %g4
17875 xorcc %g3, %g4, %g5
17876 bne test_failed
17877 nop
17878
17879 ! Next check that all the writable bits can be written
17880 stx %l2, [%g2] ! store inverted POR value
17881 ldx [%g2], %g4
17882 xorcc %g7, %g4, %g5
17883 bne test_failed
17884 nop
17885
17886
17887 ! First check that the POR value is correct
17888 add %g2, 8, %g2
17889 ldx [%g2], %g4
17890 xorcc %g3, %g4, %g5
17891 bne test_failed
17892 nop
17893
17894 ! Next check that all the writable bits can be written
17895 stx %l2, [%g2] ! store inverted POR value
17896 ldx [%g2], %g4
17897 xorcc %g7, %g4, %g5
17898 bne test_failed
17899 nop
17900
17901
17902REG_TEST_147:
17903 ! First check that the POR value is correct
17904 setx FIRE_DLC_PSB_CSR_A_PSB_PIO_ADDR, %g1, %g2
17905 best_set_reg(FIRE_DLC_PSB_CSR_A_PSB_PIO_POR_VALUE, %g1, %g3)
17906 ldx [%g2], %g4
17907 xorcc %g3, %g4, %g5
17908 bne test_failed
17909 nop
17910
17911 ! Next check that all the writable bits can be written
17912 xor %g3, %l1, %l2
17913 stx %l2, [%g2] ! store inverted POR value
17914
17915#define REG_147_EXP_VALUE mpeval( (~FIRE_DLC_PSB_CSR_A_PSB_PIO_POR_VALUE & FIRE_DLC_PSB_CSR_A_PSB_PIO_WRITE_MASK) | (FIRE_DLC_PSB_CSR_A_PSB_PIO_POR_VALUE & ~FIRE_DLC_PSB_CSR_A_PSB_PIO_WRITE_MASK) )
17916
17917 best_set_reg(REG_147_EXP_VALUE, %g1, %g7) ! get expected value
17918 ldx [%g2], %g4
17919 xorcc %g7, %g4, %g5
17920 bne test_failed
17921 nop
17922
17923
17924 ! First check that the POR value is correct
17925 add %g2, 8, %g2
17926 ldx [%g2], %g4
17927 xorcc %g3, %g4, %g5
17928 bne test_failed
17929 nop
17930
17931 ! Next check that all the writable bits can be written
17932 stx %l2, [%g2] ! store inverted POR value
17933 ldx [%g2], %g4
17934 xorcc %g7, %g4, %g5
17935 bne test_failed
17936 nop
17937
17938
17939 ! First check that the POR value is correct
17940 add %g2, 8, %g2
17941 ldx [%g2], %g4
17942 xorcc %g3, %g4, %g5
17943 bne test_failed
17944 nop
17945
17946 ! Next check that all the writable bits can be written
17947 stx %l2, [%g2] ! store inverted POR value
17948 ldx [%g2], %g4
17949 xorcc %g7, %g4, %g5
17950 bne test_failed
17951 nop
17952
17953
17954 ! First check that the POR value is correct
17955 add %g2, 8, %g2
17956 ldx [%g2], %g4
17957 xorcc %g3, %g4, %g5
17958 bne test_failed
17959 nop
17960
17961 ! Next check that all the writable bits can be written
17962 stx %l2, [%g2] ! store inverted POR value
17963 ldx [%g2], %g4
17964 xorcc %g7, %g4, %g5
17965 bne test_failed
17966 nop
17967
17968
17969 ! First check that the POR value is correct
17970 add %g2, 8, %g2
17971 ldx [%g2], %g4
17972 xorcc %g3, %g4, %g5
17973 bne test_failed
17974 nop
17975
17976 ! Next check that all the writable bits can be written
17977 stx %l2, [%g2] ! store inverted POR value
17978 ldx [%g2], %g4
17979 xorcc %g7, %g4, %g5
17980 bne test_failed
17981 nop
17982
17983
17984 ! First check that the POR value is correct
17985 add %g2, 8, %g2
17986 ldx [%g2], %g4
17987 xorcc %g3, %g4, %g5
17988 bne test_failed
17989 nop
17990
17991 ! Next check that all the writable bits can be written
17992 stx %l2, [%g2] ! store inverted POR value
17993 ldx [%g2], %g4
17994 xorcc %g7, %g4, %g5
17995 bne test_failed
17996 nop
17997
17998
17999 ! First check that the POR value is correct
18000 add %g2, 8, %g2
18001 ldx [%g2], %g4
18002 xorcc %g3, %g4, %g5
18003 bne test_failed
18004 nop
18005
18006 ! Next check that all the writable bits can be written
18007 stx %l2, [%g2] ! store inverted POR value
18008 ldx [%g2], %g4
18009 xorcc %g7, %g4, %g5
18010 bne test_failed
18011 nop
18012
18013
18014 ! First check that the POR value is correct
18015 add %g2, 8, %g2
18016 ldx [%g2], %g4
18017 xorcc %g3, %g4, %g5
18018 bne test_failed
18019 nop
18020
18021 ! Next check that all the writable bits can be written
18022 stx %l2, [%g2] ! store inverted POR value
18023 ldx [%g2], %g4
18024 xorcc %g7, %g4, %g5
18025 bne test_failed
18026 nop
18027
18028
18029 ! First check that the POR value is correct
18030 add %g2, 8, %g2
18031 ldx [%g2], %g4
18032 xorcc %g3, %g4, %g5
18033 bne test_failed
18034 nop
18035
18036 ! Next check that all the writable bits can be written
18037 stx %l2, [%g2] ! store inverted POR value
18038 ldx [%g2], %g4
18039 xorcc %g7, %g4, %g5
18040 bne test_failed
18041 nop
18042
18043
18044 ! First check that the POR value is correct
18045 add %g2, 8, %g2
18046 ldx [%g2], %g4
18047 xorcc %g3, %g4, %g5
18048 bne test_failed
18049 nop
18050
18051 ! Next check that all the writable bits can be written
18052 stx %l2, [%g2] ! store inverted POR value
18053 ldx [%g2], %g4
18054 xorcc %g7, %g4, %g5
18055 bne test_failed
18056 nop
18057
18058
18059 ! First check that the POR value is correct
18060 add %g2, 8, %g2
18061 ldx [%g2], %g4
18062 xorcc %g3, %g4, %g5
18063 bne test_failed
18064 nop
18065
18066 ! Next check that all the writable bits can be written
18067 stx %l2, [%g2] ! store inverted POR value
18068 ldx [%g2], %g4
18069 xorcc %g7, %g4, %g5
18070 bne test_failed
18071 nop
18072
18073
18074 ! First check that the POR value is correct
18075 add %g2, 8, %g2
18076 ldx [%g2], %g4
18077 xorcc %g3, %g4, %g5
18078 bne test_failed
18079 nop
18080
18081 ! Next check that all the writable bits can be written
18082 stx %l2, [%g2] ! store inverted POR value
18083 ldx [%g2], %g4
18084 xorcc %g7, %g4, %g5
18085 bne test_failed
18086 nop
18087
18088
18089 ! First check that the POR value is correct
18090 add %g2, 8, %g2
18091 ldx [%g2], %g4
18092 xorcc %g3, %g4, %g5
18093 bne test_failed
18094 nop
18095
18096 ! Next check that all the writable bits can be written
18097 stx %l2, [%g2] ! store inverted POR value
18098 ldx [%g2], %g4
18099 xorcc %g7, %g4, %g5
18100 bne test_failed
18101 nop
18102
18103
18104 ! First check that the POR value is correct
18105 add %g2, 8, %g2
18106 ldx [%g2], %g4
18107 xorcc %g3, %g4, %g5
18108 bne test_failed
18109 nop
18110
18111 ! Next check that all the writable bits can be written
18112 stx %l2, [%g2] ! store inverted POR value
18113 ldx [%g2], %g4
18114 xorcc %g7, %g4, %g5
18115 bne test_failed
18116 nop
18117
18118
18119 ! First check that the POR value is correct
18120 add %g2, 8, %g2
18121 ldx [%g2], %g4
18122 xorcc %g3, %g4, %g5
18123 bne test_failed
18124 nop
18125
18126 ! Next check that all the writable bits can be written
18127 stx %l2, [%g2] ! store inverted POR value
18128 ldx [%g2], %g4
18129 xorcc %g7, %g4, %g5
18130 bne test_failed
18131 nop
18132
18133
18134 ! First check that the POR value is correct
18135 add %g2, 8, %g2
18136 ldx [%g2], %g4
18137 xorcc %g3, %g4, %g5
18138 bne test_failed
18139 nop
18140
18141 ! Next check that all the writable bits can be written
18142 stx %l2, [%g2] ! store inverted POR value
18143 ldx [%g2], %g4
18144 xorcc %g7, %g4, %g5
18145 bne test_failed
18146 nop
18147
18148
18149REG_TEST_148:
18150 ! First check that the POR value is correct
18151 setx FIRE_DLC_TSB_CSR_A_TSB_DMA_ADDR, %g1, %g2
18152 best_set_reg(FIRE_DLC_TSB_CSR_A_TSB_DMA_POR_VALUE, %g1, %g3)
18153 ldx [%g2], %g4
18154 xorcc %g3, %g4, %g5
18155 bne test_failed
18156 nop
18157
18158 ! Next check that all the writable bits can be written
18159 xor %g3, %l1, %l2
18160 stx %l2, [%g2] ! store inverted POR value
18161
18162#define REG_148_EXP_VALUE mpeval( (~FIRE_DLC_TSB_CSR_A_TSB_DMA_POR_VALUE & FIRE_DLC_TSB_CSR_A_TSB_DMA_WRITE_MASK) | (FIRE_DLC_TSB_CSR_A_TSB_DMA_POR_VALUE & ~FIRE_DLC_TSB_CSR_A_TSB_DMA_WRITE_MASK) )
18163
18164 best_set_reg(REG_148_EXP_VALUE, %g1, %g7) ! get expected value
18165 ldx [%g2], %g4
18166 xorcc %g7, %g4, %g5
18167 bne test_failed
18168 nop
18169
18170
18171 ! First check that the POR value is correct
18172 add %g2, 8, %g2
18173 ldx [%g2], %g4
18174 xorcc %g3, %g4, %g5
18175 bne test_failed
18176 nop
18177
18178 ! Next check that all the writable bits can be written
18179 stx %l2, [%g2] ! store inverted POR value
18180 ldx [%g2], %g4
18181 xorcc %g7, %g4, %g5
18182 bne test_failed
18183 nop
18184
18185
18186 ! First check that the POR value is correct
18187 add %g2, 8, %g2
18188 ldx [%g2], %g4
18189 xorcc %g3, %g4, %g5
18190 bne test_failed
18191 nop
18192
18193 ! Next check that all the writable bits can be written
18194 stx %l2, [%g2] ! store inverted POR value
18195 ldx [%g2], %g4
18196 xorcc %g7, %g4, %g5
18197 bne test_failed
18198 nop
18199
18200
18201 ! First check that the POR value is correct
18202 add %g2, 8, %g2
18203 ldx [%g2], %g4
18204 xorcc %g3, %g4, %g5
18205 bne test_failed
18206 nop
18207
18208 ! Next check that all the writable bits can be written
18209 stx %l2, [%g2] ! store inverted POR value
18210 ldx [%g2], %g4
18211 xorcc %g7, %g4, %g5
18212 bne test_failed
18213 nop
18214
18215
18216 ! First check that the POR value is correct
18217 add %g2, 8, %g2
18218 ldx [%g2], %g4
18219 xorcc %g3, %g4, %g5
18220 bne test_failed
18221 nop
18222
18223 ! Next check that all the writable bits can be written
18224 stx %l2, [%g2] ! store inverted POR value
18225 ldx [%g2], %g4
18226 xorcc %g7, %g4, %g5
18227 bne test_failed
18228 nop
18229
18230
18231 ! First check that the POR value is correct
18232 add %g2, 8, %g2
18233 ldx [%g2], %g4
18234 xorcc %g3, %g4, %g5
18235 bne test_failed
18236 nop
18237
18238 ! Next check that all the writable bits can be written
18239 stx %l2, [%g2] ! store inverted POR value
18240 ldx [%g2], %g4
18241 xorcc %g7, %g4, %g5
18242 bne test_failed
18243 nop
18244
18245
18246 ! First check that the POR value is correct
18247 add %g2, 8, %g2
18248 ldx [%g2], %g4
18249 xorcc %g3, %g4, %g5
18250 bne test_failed
18251 nop
18252
18253 ! Next check that all the writable bits can be written
18254 stx %l2, [%g2] ! store inverted POR value
18255 ldx [%g2], %g4
18256 xorcc %g7, %g4, %g5
18257 bne test_failed
18258 nop
18259
18260
18261 ! First check that the POR value is correct
18262 add %g2, 8, %g2
18263 ldx [%g2], %g4
18264 xorcc %g3, %g4, %g5
18265 bne test_failed
18266 nop
18267
18268 ! Next check that all the writable bits can be written
18269 stx %l2, [%g2] ! store inverted POR value
18270 ldx [%g2], %g4
18271 xorcc %g7, %g4, %g5
18272 bne test_failed
18273 nop
18274
18275
18276 ! First check that the POR value is correct
18277 add %g2, 8, %g2
18278 ldx [%g2], %g4
18279 xorcc %g3, %g4, %g5
18280 bne test_failed
18281 nop
18282
18283 ! Next check that all the writable bits can be written
18284 stx %l2, [%g2] ! store inverted POR value
18285 ldx [%g2], %g4
18286 xorcc %g7, %g4, %g5
18287 bne test_failed
18288 nop
18289
18290
18291 ! First check that the POR value is correct
18292 add %g2, 8, %g2
18293 ldx [%g2], %g4
18294 xorcc %g3, %g4, %g5
18295 bne test_failed
18296 nop
18297
18298 ! Next check that all the writable bits can be written
18299 stx %l2, [%g2] ! store inverted POR value
18300 ldx [%g2], %g4
18301 xorcc %g7, %g4, %g5
18302 bne test_failed
18303 nop
18304
18305
18306 ! First check that the POR value is correct
18307 add %g2, 8, %g2
18308 ldx [%g2], %g4
18309 xorcc %g3, %g4, %g5
18310 bne test_failed
18311 nop
18312
18313 ! Next check that all the writable bits can be written
18314 stx %l2, [%g2] ! store inverted POR value
18315 ldx [%g2], %g4
18316 xorcc %g7, %g4, %g5
18317 bne test_failed
18318 nop
18319
18320
18321 ! First check that the POR value is correct
18322 add %g2, 8, %g2
18323 ldx [%g2], %g4
18324 xorcc %g3, %g4, %g5
18325 bne test_failed
18326 nop
18327
18328 ! Next check that all the writable bits can be written
18329 stx %l2, [%g2] ! store inverted POR value
18330 ldx [%g2], %g4
18331 xorcc %g7, %g4, %g5
18332 bne test_failed
18333 nop
18334
18335
18336 ! First check that the POR value is correct
18337 add %g2, 8, %g2
18338 ldx [%g2], %g4
18339 xorcc %g3, %g4, %g5
18340 bne test_failed
18341 nop
18342
18343 ! Next check that all the writable bits can be written
18344 stx %l2, [%g2] ! store inverted POR value
18345 ldx [%g2], %g4
18346 xorcc %g7, %g4, %g5
18347 bne test_failed
18348 nop
18349
18350
18351 ! First check that the POR value is correct
18352 add %g2, 8, %g2
18353 ldx [%g2], %g4
18354 xorcc %g3, %g4, %g5
18355 bne test_failed
18356 nop
18357
18358 ! Next check that all the writable bits can be written
18359 stx %l2, [%g2] ! store inverted POR value
18360 ldx [%g2], %g4
18361 xorcc %g7, %g4, %g5
18362 bne test_failed
18363 nop
18364
18365
18366 ! First check that the POR value is correct
18367 add %g2, 8, %g2
18368 ldx [%g2], %g4
18369 xorcc %g3, %g4, %g5
18370 bne test_failed
18371 nop
18372
18373 ! Next check that all the writable bits can be written
18374 stx %l2, [%g2] ! store inverted POR value
18375 ldx [%g2], %g4
18376 xorcc %g7, %g4, %g5
18377 bne test_failed
18378 nop
18379
18380
18381 ! First check that the POR value is correct
18382 add %g2, 8, %g2
18383 ldx [%g2], %g4
18384 xorcc %g3, %g4, %g5
18385 bne test_failed
18386 nop
18387
18388 ! Next check that all the writable bits can be written
18389 stx %l2, [%g2] ! store inverted POR value
18390 ldx [%g2], %g4
18391 xorcc %g7, %g4, %g5
18392 bne test_failed
18393 nop
18394
18395
18396 ! First check that the POR value is correct
18397 add %g2, 8, %g2
18398 ldx [%g2], %g4
18399 xorcc %g3, %g4, %g5
18400 bne test_failed
18401 nop
18402
18403 ! Next check that all the writable bits can be written
18404 stx %l2, [%g2] ! store inverted POR value
18405 ldx [%g2], %g4
18406 xorcc %g7, %g4, %g5
18407 bne test_failed
18408 nop
18409
18410
18411 ! First check that the POR value is correct
18412 add %g2, 8, %g2
18413 ldx [%g2], %g4
18414 xorcc %g3, %g4, %g5
18415 bne test_failed
18416 nop
18417
18418 ! Next check that all the writable bits can be written
18419 stx %l2, [%g2] ! store inverted POR value
18420 ldx [%g2], %g4
18421 xorcc %g7, %g4, %g5
18422 bne test_failed
18423 nop
18424
18425
18426 ! First check that the POR value is correct
18427 add %g2, 8, %g2
18428 ldx [%g2], %g4
18429 xorcc %g3, %g4, %g5
18430 bne test_failed
18431 nop
18432
18433 ! Next check that all the writable bits can be written
18434 stx %l2, [%g2] ! store inverted POR value
18435 ldx [%g2], %g4
18436 xorcc %g7, %g4, %g5
18437 bne test_failed
18438 nop
18439
18440
18441 ! First check that the POR value is correct
18442 add %g2, 8, %g2
18443 ldx [%g2], %g4
18444 xorcc %g3, %g4, %g5
18445 bne test_failed
18446 nop
18447
18448 ! Next check that all the writable bits can be written
18449 stx %l2, [%g2] ! store inverted POR value
18450 ldx [%g2], %g4
18451 xorcc %g7, %g4, %g5
18452 bne test_failed
18453 nop
18454
18455
18456 ! First check that the POR value is correct
18457 add %g2, 8, %g2
18458 ldx [%g2], %g4
18459 xorcc %g3, %g4, %g5
18460 bne test_failed
18461 nop
18462
18463 ! Next check that all the writable bits can be written
18464 stx %l2, [%g2] ! store inverted POR value
18465 ldx [%g2], %g4
18466 xorcc %g7, %g4, %g5
18467 bne test_failed
18468 nop
18469
18470
18471 ! First check that the POR value is correct
18472 add %g2, 8, %g2
18473 ldx [%g2], %g4
18474 xorcc %g3, %g4, %g5
18475 bne test_failed
18476 nop
18477
18478 ! Next check that all the writable bits can be written
18479 stx %l2, [%g2] ! store inverted POR value
18480 ldx [%g2], %g4
18481 xorcc %g7, %g4, %g5
18482 bne test_failed
18483 nop
18484
18485
18486 ! First check that the POR value is correct
18487 add %g2, 8, %g2
18488 ldx [%g2], %g4
18489 xorcc %g3, %g4, %g5
18490 bne test_failed
18491 nop
18492
18493 ! Next check that all the writable bits can be written
18494 stx %l2, [%g2] ! store inverted POR value
18495 ldx [%g2], %g4
18496 xorcc %g7, %g4, %g5
18497 bne test_failed
18498 nop
18499
18500
18501 ! First check that the POR value is correct
18502 add %g2, 8, %g2
18503 ldx [%g2], %g4
18504 xorcc %g3, %g4, %g5
18505 bne test_failed
18506 nop
18507
18508 ! Next check that all the writable bits can be written
18509 stx %l2, [%g2] ! store inverted POR value
18510 ldx [%g2], %g4
18511 xorcc %g7, %g4, %g5
18512 bne test_failed
18513 nop
18514
18515
18516 ! First check that the POR value is correct
18517 add %g2, 8, %g2
18518 ldx [%g2], %g4
18519 xorcc %g3, %g4, %g5
18520 bne test_failed
18521 nop
18522
18523 ! Next check that all the writable bits can be written
18524 stx %l2, [%g2] ! store inverted POR value
18525 ldx [%g2], %g4
18526 xorcc %g7, %g4, %g5
18527 bne test_failed
18528 nop
18529
18530
18531 ! First check that the POR value is correct
18532 add %g2, 8, %g2
18533 ldx [%g2], %g4
18534 xorcc %g3, %g4, %g5
18535 bne test_failed
18536 nop
18537
18538 ! Next check that all the writable bits can be written
18539 stx %l2, [%g2] ! store inverted POR value
18540 ldx [%g2], %g4
18541 xorcc %g7, %g4, %g5
18542 bne test_failed
18543 nop
18544
18545
18546 ! First check that the POR value is correct
18547 add %g2, 8, %g2
18548 ldx [%g2], %g4
18549 xorcc %g3, %g4, %g5
18550 bne test_failed
18551 nop
18552
18553 ! Next check that all the writable bits can be written
18554 stx %l2, [%g2] ! store inverted POR value
18555 ldx [%g2], %g4
18556 xorcc %g7, %g4, %g5
18557 bne test_failed
18558 nop
18559
18560
18561 ! First check that the POR value is correct
18562 add %g2, 8, %g2
18563 ldx [%g2], %g4
18564 xorcc %g3, %g4, %g5
18565 bne test_failed
18566 nop
18567
18568 ! Next check that all the writable bits can be written
18569 stx %l2, [%g2] ! store inverted POR value
18570 ldx [%g2], %g4
18571 xorcc %g7, %g4, %g5
18572 bne test_failed
18573 nop
18574
18575
18576 ! First check that the POR value is correct
18577 add %g2, 8, %g2
18578 ldx [%g2], %g4
18579 xorcc %g3, %g4, %g5
18580 bne test_failed
18581 nop
18582
18583 ! Next check that all the writable bits can be written
18584 stx %l2, [%g2] ! store inverted POR value
18585 ldx [%g2], %g4
18586 xorcc %g7, %g4, %g5
18587 bne test_failed
18588 nop
18589
18590
18591 ! First check that the POR value is correct
18592 add %g2, 8, %g2
18593 ldx [%g2], %g4
18594 xorcc %g3, %g4, %g5
18595 bne test_failed
18596 nop
18597
18598 ! Next check that all the writable bits can be written
18599 stx %l2, [%g2] ! store inverted POR value
18600 ldx [%g2], %g4
18601 xorcc %g7, %g4, %g5
18602 bne test_failed
18603 nop
18604
18605
18606 ! First check that the POR value is correct
18607 add %g2, 8, %g2
18608 ldx [%g2], %g4
18609 xorcc %g3, %g4, %g5
18610 bne test_failed
18611 nop
18612
18613 ! Next check that all the writable bits can be written
18614 stx %l2, [%g2] ! store inverted POR value
18615 ldx [%g2], %g4
18616 xorcc %g7, %g4, %g5
18617 bne test_failed
18618 nop
18619
18620
18621 ! First check that the POR value is correct
18622 add %g2, 8, %g2
18623 ldx [%g2], %g4
18624 xorcc %g3, %g4, %g5
18625 bne test_failed
18626 nop
18627
18628 ! Next check that all the writable bits can be written
18629 stx %l2, [%g2] ! store inverted POR value
18630 ldx [%g2], %g4
18631 xorcc %g7, %g4, %g5
18632 bne test_failed
18633 nop
18634
18635
18636REG_TEST_149:
18637 ! First check that the POR value is correct
18638 setx FIRE_DLC_TSB_CSR_A_TSB_STS_ADDR, %g1, %g2
18639 best_set_reg(FIRE_DLC_TSB_CSR_A_TSB_STS_POR_VALUE, %g1, %g3)
18640 ldx [%g2], %g4
18641 xorcc %g3, %g4, %g5
18642 bne test_failed
18643 nop
18644
18645 ! Next check that all the writable bits can be written
18646 xor %g3, %l1, %l2
18647 stx %l2, [%g2] ! store inverted POR value
18648
18649#define REG_149_EXP_VALUE mpeval( (~FIRE_DLC_TSB_CSR_A_TSB_STS_POR_VALUE & FIRE_DLC_TSB_CSR_A_TSB_STS_WRITE_MASK) | (FIRE_DLC_TSB_CSR_A_TSB_STS_POR_VALUE & ~FIRE_DLC_TSB_CSR_A_TSB_STS_WRITE_MASK) )
18650
18651 best_set_reg(REG_149_EXP_VALUE, %g1, %g7) ! get expected value
18652 ldx [%g2], %g4
18653 xorcc %g7, %g4, %g5
18654 bne test_failed
18655 nop
18656
18657
18658REG_TEST_150:
18659 ! First check that the POR value is correct
18660 setx FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_ADDR, %g1, %g2
18661 best_set_reg(FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_POR_VALUE, %g1, %g3)
18662 ldx [%g2], %g4
18663 xorcc %g3, %g4, %g5
18664 bne test_failed
18665 nop
18666
18667 ! Next check that all the writable bits can be written
18668 xor %g3, %l1, %l2
18669 stx %l2, [%g2] ! store inverted POR value
18670
18671#define REG_150_EXP_VALUE mpeval( (~FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_POR_VALUE & FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_WRITE_MASK) | (FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_POR_VALUE & ~FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_WRITE_MASK) )
18672
18673 best_set_reg(REG_150_EXP_VALUE, %g1, %g7) ! get expected value
18674 ldx [%g2], %g4
18675 xorcc %g7, %g4, %g5
18676 bne test_failed
18677 nop
18678
18679
18680REG_TEST_151:
18681 ! First check that the POR value is correct
18682 setx FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_ADDR, %g1, %g2
18683 best_set_reg(FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_POR_VALUE, %g1, %g3)
18684 ldx [%g2], %g4
18685 xorcc %g3, %g4, %g5
18686 bne test_failed
18687 nop
18688
18689 ! Next check that all the writable bits can be written
18690 xor %g3, %l1, %l2
18691 stx %l2, [%g2] ! store inverted POR value
18692
18693#define REG_151_EXP_VALUE mpeval( (~FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_POR_VALUE & FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_WRITE_MASK) | (FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_POR_VALUE & ~FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_WRITE_MASK) )
18694
18695 best_set_reg(REG_151_EXP_VALUE, %g1, %g7) ! get expected value
18696 ldx [%g2], %g4
18697 xorcc %g7, %g4, %g5
18698 bne test_failed
18699 nop
18700
18701
18702REG_TEST_152:
18703 ! First check that the POR value is correct
18704 setx FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_ADDR, %g1, %g2
18705 best_set_reg(FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_POR_VALUE, %g1, %g3)
18706 ldx [%g2], %g4
18707 xorcc %g3, %g4, %g5
18708 bne test_failed
18709 nop
18710
18711 ! Next check that all the writable bits can be written
18712 xor %g3, %l1, %l2
18713 stx %l2, [%g2] ! store inverted POR value
18714
18715#define REG_152_EXP_VALUE mpeval( (~FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_POR_VALUE & FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_WRITE_MASK) | (FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_POR_VALUE & ~FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_WRITE_MASK) )
18716
18717 best_set_reg(REG_152_EXP_VALUE, %g1, %g7) ! get expected value
18718 ldx [%g2], %g4
18719 xorcc %g7, %g4, %g5
18720 bne test_failed
18721 nop
18722
18723
18724REG_TEST_153:
18725 ! First check that the POR value is correct
18726 setx FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_ADDR, %g1, %g2
18727 best_set_reg(FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_POR_VALUE, %g1, %g3)
18728 ldx [%g2], %g4
18729 xorcc %g3, %g4, %g5
18730 bne test_failed
18731 nop
18732
18733 ! Next check that all the writable bits can be written
18734 xor %g3, %l1, %l2
18735 stx %l2, [%g2] ! store inverted POR value
18736
18737#define REG_153_EXP_VALUE mpeval( (~FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_POR_VALUE & 0) | (FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_POR_VALUE & ~0) )
18738
18739 best_set_reg(REG_153_EXP_VALUE, %g1, %g7) ! get expected value
18740 ldx [%g2], %g4
18741 xorcc %g7, %g4, %g5
18742 bne test_failed
18743 nop
18744
18745
18746REG_TEST_154:
18747 ! First check that the POR value is correct
18748 setx FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_ADDR, %g1, %g2
18749 best_set_reg(FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_POR_VALUE, %g1, %g3)
18750 ldx [%g2], %g4
18751 xorcc %g3, %g4, %g5
18752 bne test_failed
18753 nop
18754
18755 ! Next check that all the writable bits can be written
18756 xor %g3, %l1, %l2
18757 stx %l2, [%g2] ! store inverted POR value
18758
18759#define REG_154_EXP_VALUE mpeval( (~FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_POR_VALUE & FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_WRITE_MASK) | (FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_POR_VALUE & ~FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_WRITE_MASK) )
18760
18761 best_set_reg(REG_154_EXP_VALUE, %g1, %g7) ! get expected value
18762 ldx [%g2], %g4
18763 xorcc %g7, %g4, %g5
18764 bne test_failed
18765 nop
18766
18767
18768REG_TEST_155:
18769 ! First check that the POR value is correct
18770 setx FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_ADDR, %g1, %g2
18771 best_set_reg(FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_POR_VALUE, %g1, %g3)
18772 ldx [%g2], %g4
18773 xorcc %g3, %g4, %g5
18774 bne test_failed
18775 nop
18776
18777 ! Next check that all the writable bits can be written
18778 xor %g3, %l1, %l2
18779 stx %l2, [%g2] ! store inverted POR value
18780
18781#define REG_155_EXP_VALUE mpeval( (~FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_POR_VALUE & FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_WRITE_MASK) | (FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_POR_VALUE & ~FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_WRITE_MASK) )
18782
18783 best_set_reg(REG_155_EXP_VALUE, %g1, %g7) ! get expected value
18784 ldx [%g2], %g4
18785 xorcc %g7, %g4, %g5
18786 bne test_failed
18787 nop
18788
18789
18790REG_TEST_156:
18791 ! First check that the POR value is correct
18792 setx FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_ADDR, %g1, %g2
18793 best_set_reg(FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_POR_VALUE, %g1, %g3)
18794 ldx [%g2], %g4
18795 xorcc %g3, %g4, %g5
18796 !bne test_failed ! set by other reg tests
18797 nop
18798
18799 ! Next check that all the writable bits can be written
18800 xor %g3, %l1, %l2
18801 stx %l2, [%g2] ! store inverted POR value
18802
18803#define REG_156_EXP_VALUE mpeval( (~FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_POR_VALUE & FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_WRITE_MASK) | (FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_POR_VALUE & ~FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_WRITE_MASK) )
18804
18805 best_set_reg(REG_156_EXP_VALUE, %g1, %g7) ! get expected value
18806 ldx [%g2], %g4
18807 xorcc %g7, %g4, %g5
18808 !bne test_failed ! set by other reg tests
18809 nop
18810
18811
18812REG_TEST_157:
18813 ! First check that the POR value is correct
18814 setx FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ADDR, %g1, %g2
18815#ifdef DTM_ENABLED
18816 setx FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_POR_VALUE+4, %g1, %g3 ! Half rate in DTM mode
18817#else
18818 best_set_reg(FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_POR_VALUE, %g1, %g3)
18819#endif
18820 ldx [%g2], %g4
18821 xorcc %g3, %g4, %g5
18822 bne test_failed
18823 nop
18824
18825 ! Next check that all the writable bits can be written
18826 !xor %g3, %l1, %l2
18827 stx %g4, [%g2] ! store POR value
18828
18829 ldx [%g2], %g5
18830 cmp %g5, %g4
18831 bne test_failed
18832 nop
18833
18834REG_TEST_158:
18835 ! First check that the POR value is correct
18836 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_ADDR, %g1, %g2
18837 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_POR_VALUE, %g1, %g3)
18838 ldx [%g2], %g4
18839 xorcc %g3, %g4, %g5
18840 bne test_failed
18841 nop
18842
18843 ! Next check that all the writable bits can be written
18844 !xor %g3, %l1, %l2
18845 setx 0xfffffffffffffd01, %g1, %l2 ! leave non-spare config bits as is
18846 stx %l2, [%g2] ! store inverted POR value
18847
18848#define REG_158_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_WRITE_MASK) )
18849
18850 !best_set_reg(REG_158_EXP_VALUE, %g1, %g7) ! get expected value
18851
18852 setx 0x00000000ff17fd01, %g1, %g7 ! get expected value
18853 ldx [%g2], %g4
18854 xorcc %g7, %g4, %g5
18855 bne test_failed
18856 nop
18857
18858
18859REG_TEST_159:
18860 ! First check that the POR value is correct
18861 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_STS_ADDR, %g1, %g2
18862#ifdef DTM_ENABLED
18863 set 4, %g3 ! Data link active state
18864#else
18865 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_STS_POR_VALUE, %g1, %g3)
18866#endif
18867 ldx [%g2], %g4
18868
18869 xor %l1, 0x100, %l3 ! mask off the drain state bit
18870 and %l3, %g4, %g4
18871
18872 xorcc %g3, %g4, %g5
18873 bne test_failed
18874 nop
18875
18876/*****************************
18877 ! Next check that all the writable bits can be written
18878 xor %g3, %l1, %l2
18879 stx %l2, [%g2] ! store inverted POR value
18880
18881#define REG_159_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_STS_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_STS_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_STS_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_STS_WRITE_MASK) )
18882
18883 best_set_reg(REG_159_EXP_VALUE, %g1, %g7) ! get expected value
18884 ldx [%g2], %g4
18885 xorcc %g7, %g4, %g5
18886 bne test_failed
18887 nop
18888******************************/
18889
18890REG_TEST_160:
18891 ! First check that the POR value is correct
18892 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_TRN_OFF_ADDR, %g1, %g2
18893 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_TRN_OFF_POR_VALUE, %g1, %g3)
18894 ldx [%g2], %g4
18895 xorcc %g3, %g4, %g5
18896 bne test_failed
18897 nop
18898
18899 ! Next check that all the writable bits can be written
18900 !xor %g3, %l1, %l2
18901 stx %g0, [%g2] ! write 0s for VCM coverage
18902
18903 ldx [%g2], %g4
18904 cmp %g4, 0
18905 bne test_failed
18906 nop
18907
18908REG_TEST_161:
18909 ! First check that the POR value is correct
18910 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_ADDR, %g1, %g2
18911 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_POR_VALUE, %g1, %g3)
18912 ldx [%g2], %g4
18913 xorcc %g3, %g4, %g5
18914 bne test_failed
18915 nop
18916
18917 ! Next check that all the writable bits can be written
18918 xor %g3, %l1, %l2
18919 stx %l2, [%g2] ! store inverted POR value
18920
18921#define REG_161_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_WRITE_MASK) )
18922
18923 best_set_reg(REG_161_EXP_VALUE, %g1, %g7) ! get expected value
18924 ldx [%g2], %g4
18925 xorcc %g7, %g4, %g5
18926 bne test_failed
18927 nop
18928
18929
18930REG_TEST_162:
18931 ! First check that the POR value is correct
18932 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_ADDR, %g1, %g2
18933 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_POR_VALUE, %g1, %g3)
18934 ldx [%g2], %g4
18935 xorcc %g3, %g4, %g5
18936 bne test_failed
18937 nop
18938
18939/************** writing to this reg could cause parity errors
18940 ! Next check that all the writable bits can be written
18941 xor %g3, %l1, %l2
18942 stx %l2, [%g2] ! store inverted POR value
18943
18944#define REG_162_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_WRITE_MASK) )
18945
18946 best_set_reg(REG_162_EXP_VALUE, %g1, %g7) ! get expected value
18947 ldx [%g2], %g4
18948 xorcc %g7, %g4, %g5
18949 bne test_failed
18950 nop
18951*****************************************/
18952
18953REG_TEST_163:
18954 ! First check that the POR value is correct
18955 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_ADDR, %g1, %g2
18956 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_POR_VALUE, %g1, %g3)
18957 ldx [%g2], %g4
18958 xorcc %g3, %g4, %g5
18959 bne test_failed
18960 nop
18961
18962 ! Next check that all the writable bits can be written
18963 xor %g3, %l1, %l2
18964 stx %l2, [%g2] ! store inverted POR value
18965
18966#define REG_163_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_WRITE_MASK) )
18967
18968 best_set_reg(REG_163_EXP_VALUE, %g1, %g7) ! get expected value
18969 ldx [%g2], %g4
18970 xorcc %g7, %g4, %g5
18971 bne test_failed
18972 nop
18973
18974
18975REG_TEST_164:
18976 ! First check that the POR value is correct
18977 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_ADDR, %g1, %g2
18978 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_POR_VALUE, %g1, %g3)
18979 ldx [%g2], %g4
18980 xorcc %g3, %g4, %g5
18981 bne test_failed
18982 nop
18983
18984 ! Next check that all the writable bits can be written
18985 xor %g3, %l1, %l2
18986 stx %l2, [%g2] ! store inverted POR value
18987
18988#define REG_164_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_WRITE_MASK) )
18989
18990 best_set_reg(REG_164_EXP_VALUE, %g1, %g7) ! get expected value
18991 ldx [%g2], %g4
18992 xorcc %g7, %g4, %g5
18993 bne test_failed
18994 nop
18995
18996
18997REG_TEST_165:
18998 ! First check that the POR value is correct
18999 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ERB_ADDR, %g1, %g2
19000 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ERB_POR_VALUE, %g1, %g3)
19001 ldx [%g2], %g4
19002 xorcc %g3, %g4, %g5
19003 !bne test_failed ! somehow, drain state is set
19004 nop
19005
19006 ! Next check that all the writable bits can be written
19007 xor %g3, %l1, %l2
19008 stx %l2, [%g2] ! store inverted POR value
19009
19010#define REG_165_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ERB_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ERB_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ERB_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ERB_WRITE_MASK) )
19011
19012 best_set_reg(REG_165_EXP_VALUE, %g1, %g7) ! get expected value
19013 ldx [%g2], %g4
19014 xorcc %g7, %g4, %g5
19015 !bne test_failed
19016 nop
19017
19018
19019REG_TEST_166:
19020 ! First check that the POR value is correct
19021 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_ADDR, %g1, %g2
19022 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_POR_VALUE, %g1, %g3)
19023 ldx [%g2], %g4
19024 xorcc %g3, %g4, %g5
19025 !bne test_failed ! getting wrong result, I suspect due to drain state
19026 nop
19027
19028 ! Next check that all the writable bits can be written
19029 xor %g3, %l1, %l2
19030 stx %l2, [%g2] ! store inverted POR value
19031
19032#define REG_166_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_WRITE_MASK) )
19033
19034 best_set_reg(REG_166_EXP_VALUE, %g1, %g7) ! get expected value
19035 ldx [%g2], %g4
19036 xorcc %g7, %g4, %g5
19037 !bne test_failed ! getting wrong result, I suspect due to drain state
19038 nop
19039
19040
19041REG_TEST_167:
19042 ! First check that the POR value is correct
19043 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_ADDR, %g1, %g2
19044 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_POR_VALUE, %g1, %g3)
19045 ldx [%g2], %g4
19046 xorcc %g3, %g4, %g5
19047 bne test_failed
19048 nop
19049
19050 ! Next check that all the writable bits can be written
19051 xor %g3, %l1, %l2
19052 stx %l2, [%g2] ! store inverted POR value
19053
19054#define REG_167_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_WRITE_MASK) )
19055
19056 best_set_reg(REG_167_EXP_VALUE, %g1, %g7) ! get expected value
19057 ldx [%g2], %g4
19058 xorcc %g7, %g4, %g5
19059 bne test_failed
19060 nop
19061
19062
19063 ba test_passed
19064 nop
19065
19066thread_7:
19067
19068REG_TEST_168:
19069 ! First check that the POR value is correct
19070 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_LOG_ADDR, %g1, %g2
19071 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_LOG_POR_VALUE, %g1, %g3)
19072 ldx [%g2], %g4
19073 xorcc %g3, %g4, %g5
19074 bne test_failed
19075 nop
19076
19077 ! Next check that all the writable bits can be written
19078 xor %g3, %l1, %l2
19079 stx %l2, [%g2] ! store inverted POR value
19080
19081#define REG_168_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_LOG_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_LOG_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_LOG_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_LOG_WRITE_MASK) )
19082
19083 best_set_reg(REG_168_EXP_VALUE, %g1, %g7) ! get expected value
19084 ldx [%g2], %g4
19085 xorcc %g7, %g4, %g5
19086 bne test_failed
19087 nop
19088
19089
19090REG_TEST_169:
19091 ! First check that the POR value is correct
19092 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_INT_EN_ADDR, %g1, %g2
19093 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_INT_EN_POR_VALUE, %g1, %g3)
19094 ldx [%g2], %g4
19095 xorcc %g3, %g4, %g5
19096 bne test_failed
19097 nop
19098
19099 ! Next check that all the writable bits can be written
19100 xor %g3, %l1, %l2
19101 stx %l2, [%g2] ! store inverted POR value
19102
19103#define REG_169_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_INT_EN_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_INT_EN_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_INT_EN_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_INT_EN_WRITE_MASK) )
19104
19105 best_set_reg(REG_169_EXP_VALUE, %g1, %g7) ! get expected value
19106 ldx [%g2], %g4
19107 xorcc %g7, %g4, %g5
19108 bne test_failed
19109 nop
19110
19111
19112REG_TEST_170:
19113 ! First check that the POR value is correct
19114 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_EN_ERR_ADDR, %g1, %g2
19115#ifdef DTM_ENABLED
19116 best_set_reg(0x100, %g1, %g3) ! link up bit set in DTM mode
19117#else
19118 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_EN_ERR_POR_VALUE, %g1, %g3) ! por value == 0
19119#endif
19120 ldx [%g2], %g4
19121
19122 xorcc %g3, %g4, %g5
19123 bne test_failed
19124 nop
19125
19126 ! Next check that all the writable bits can be written
19127 xor %g3, %l1, %l2
19128 stx %l2, [%g2] ! store inverted POR value
19129
19130#ifdef DTM_ENABLED
19131! link up bit set in DTM mode
19132#define REG_170_EXP_VALUE 0x100
19133#else
19134#define REG_170_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_EN_ERR_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_EN_ERR_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_EN_ERR_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_EN_ERR_WRITE_MASK) )
19135#endif
19136
19137 best_set_reg(REG_170_EXP_VALUE, %g1, %g7) ! get expected value
19138 ldx [%g2], %g4
19139 xorcc %g7, %g4, %g5
19140 bne test_failed
19141 nop
19142
19143
19144REG_TEST_171:
19145 ! First check that the POR value is correct
19146 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_ADDR, %g1, %g2
19147#ifdef DTM_ENABLED
19148 best_set_reg(0x100, %g1, %g3) ! link up bit set in DTM mode
19149#else
19150 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_POR_VALUE, %g1, %g3)
19151#endif
19152 ldx [%g2], %g4
19153 xorcc %g3, %g4, %g5
19154 bne test_failed
19155 nop
19156
19157 ! Next check that all the writable bits can be written
19158 !xor %g3, %l1, %l2
19159 stx %l1, [%g2] ! store inverted POR value, should clear bit 8 in DTM mode
19160
19161#define REG_171_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_POR_VALUE & 0) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_POR_VALUE & ~0) )
19162
19163 best_set_reg(REG_171_EXP_VALUE, %g1, %g7) ! get expected value
19164 ldx [%g2], %g4
19165 xorcc %g7, %g4, %g5
19166 bne test_failed
19167 nop
19168
19169
19170REG_TEST_172:
19171 ! First check that the POR value is correct
19172 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_ADDR, %g1, %g2
19173 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_POR_VALUE, %g1, %g3)
19174 ldx [%g2], %g4
19175 xorcc %g3, %g4, %g5
19176 bne test_failed
19177 nop
19178
19179 ! Next check that all the writable bits can be written
19180 xor %g3, %l1, %l2
19181 stx %l2, [%g2] ! store inverted POR value
19182
19183#define REG_172_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_WRITE_MASK) )
19184
19185 best_set_reg(REG_172_EXP_VALUE, %g1, %g7) ! get expected value
19186 ldx [%g2], %g4
19187 xorcc %g7, %g4, %g5
19188 bne test_failed
19189 nop
19190
19191
19192REG_TEST_173:
19193 ! First check that the POR value is correct
19194 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR1_ADDR, %g1, %g2
19195 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR1_POR_VALUE, %g1, %g3)
19196 ldx [%g2], %g4
19197 xorcc %g3, %g4, %g5
19198 bne test_failed
19199 nop
19200
19201 ! Next check that all the writable bits can be written
19202 xor %g3, %l1, %l2
19203 stx %l2, [%g2] ! store inverted POR value
19204
19205#define REG_173_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR1_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR1_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR1_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR1_WRITE_MASK) )
19206
19207 best_set_reg(REG_173_EXP_VALUE, %g1, %g7) ! get expected value
19208 ldx [%g2], %g4
19209 xorcc %g7, %g4, %g5
19210 bne test_failed
19211 nop
19212
19213
19214REG_TEST_174:
19215 ! First check that the POR value is correct
19216 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR2_ADDR, %g1, %g2
19217 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR2_POR_VALUE, %g1, %g3)
19218 ldx [%g2], %g4
19219 xorcc %g3, %g4, %g5
19220 bne test_failed
19221 nop
19222
19223 ! Next check that all the writable bits can be written
19224 xor %g3, %l1, %l2
19225 stx %l2, [%g2] ! store inverted POR value
19226
19227#define REG_174_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR2_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR2_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR2_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR2_WRITE_MASK) )
19228
19229 best_set_reg(REG_174_EXP_VALUE, %g1, %g7) ! get expected value
19230 ldx [%g2], %g4
19231 xorcc %g7, %g4, %g5
19232 bne test_failed
19233 nop
19234
19235
19236REG_TEST_175:
19237 ! First check that the POR value is correct
19238 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR1_ADDR, %g1, %g2
19239 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR1_POR_VALUE, %g1, %g3)
19240 ldx [%g2], %g4
19241 xorcc %g3, %g4, %g5
19242 !bne test_failed
19243 nop
19244
19245 ! Next check that all the writable bits can be written
19246 xor %g3, %l1, %l2
19247 stx %l2, [%g2] ! store inverted POR value
19248
19249#define REG_175_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR1_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR1_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR1_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR1_WRITE_MASK) )
19250
19251 best_set_reg(REG_175_EXP_VALUE, %g1, %g7) ! get expected value
19252 ldx [%g2], %g4
19253 xorcc %g7, %g4, %g5
19254 !bne test_failed
19255 nop
19256
19257
19258REG_TEST_176:
19259 ! First check that the POR value is correct
19260 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR2_ADDR, %g1, %g2
19261 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR2_POR_VALUE, %g1, %g3)
19262 ldx [%g2], %g4
19263 xorcc %g3, %g4, %g5
19264 !bne test_failed
19265 nop
19266
19267 ! Next check that all the writable bits can be written
19268 xor %g3, %l1, %l2
19269 stx %l2, [%g2] ! store inverted POR value
19270
19271#define REG_176_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR2_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR2_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR2_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR2_WRITE_MASK) )
19272
19273 best_set_reg(REG_176_EXP_VALUE, %g1, %g7) ! get expected value
19274 ldx [%g2], %g4
19275 xorcc %g7, %g4, %g5
19276 !bne test_failed
19277 nop
19278
19279
19280REG_TEST_177:
19281 ! First check that the POR value is correct
19282 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_ADDR, %g1, %g2
19283 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_POR_VALUE, %g1, %g3)
19284 ldx [%g2], %g4
19285 xorcc %g3, %g4, %g5
19286 bne test_failed
19287 nop
19288
19289 ! Next check that all the writable bits can be written
19290 xor %g3, %l1, %l2
19291 stx %l2, [%g2] ! store inverted POR value
19292
19293#define REG_177_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_WRITE_MASK) )
19294
19295 best_set_reg(REG_177_EXP_VALUE, %g1, %g7) ! get expected value
19296 ldx [%g2], %g4
19297 xorcc %g7, %g4, %g5
19298 bne test_failed
19299 nop
19300
19301
19302REG_TEST_178:
19303 ! First check that the POR value is correct
19304 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF0_ADDR, %g1, %g2
19305 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF0_POR_VALUE, %g1, %g3)
19306 ldx [%g2], %g4
19307 xorcc %g3, %g4, %g5
19308 bne test_failed
19309 nop
19310
19311 ! Next check that all the writable bits can be written
19312 xor %g3, %l1, %l2
19313 stx %l2, [%g2] ! store inverted POR value
19314
19315#define REG_178_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF0_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF0_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF0_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF0_WRITE_MASK) )
19316
19317 best_set_reg(REG_178_EXP_VALUE, %g1, %g7) ! get expected value
19318 ldx [%g2], %g4
19319 xorcc %g7, %g4, %g5
19320 bne test_failed
19321 nop
19322
19323
19324REG_TEST_179:
19325 ! First check that the POR value is correct
19326 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF1_ADDR, %g1, %g2
19327 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF1_POR_VALUE, %g1, %g3)
19328 ldx [%g2], %g4
19329 xorcc %g3, %g4, %g5
19330 bne test_failed
19331 nop
19332
19333 ! Next check that all the writable bits can be written
19334 xor %g3, %l1, %l2
19335 stx %l2, [%g2] ! store inverted POR value
19336
19337#define REG_179_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF1_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF1_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF1_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF1_WRITE_MASK) )
19338
19339 best_set_reg(REG_179_EXP_VALUE, %g1, %g7) ! get expected value
19340 ldx [%g2], %g4
19341 xorcc %g7, %g4, %g5
19342 bne test_failed
19343 nop
19344
19345
19346REG_TEST_180:
19347 ! First check that the POR value is correct
19348 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF2_ADDR, %g1, %g2
19349 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF2_POR_VALUE, %g1, %g3)
19350 ldx [%g2], %g4
19351 xorcc %g3, %g4, %g5
19352 bne test_failed
19353 nop
19354
19355 ! Next check that all the writable bits can be written
19356 xor %g3, %l1, %l2
19357 stx %l2, [%g2] ! store inverted POR value
19358
19359#define REG_180_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF2_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF2_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF2_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF2_WRITE_MASK) )
19360
19361 best_set_reg(REG_180_EXP_VALUE, %g1, %g7) ! get expected value
19362 ldx [%g2], %g4
19363 xorcc %g7, %g4, %g5
19364 bne test_failed
19365 nop
19366
19367
19368REG_TEST_181:
19369 ! First check that the POR value is correct
19370 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_ADDR, %g1, %g2
19371 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_POR_VALUE, %g1, %g3)
19372 ldx [%g2], %g4
19373 xorcc %g3, %g4, %g5
19374 bne test_failed
19375 nop
19376
19377 ! Next check that all the writable bits can be written
19378 xor %g3, %l1, %l2
19379 stx %l2, [%g2] ! store inverted POR value
19380
19381#define REG_181_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_WRITE_MASK) )
19382
19383 best_set_reg(REG_181_EXP_VALUE, %g1, %g7) ! get expected value
19384 ldx [%g2], %g4
19385 xorcc %g7, %g4, %g5
19386 bne test_failed
19387 nop
19388
19389
19390REG_TEST_182:
19391 ! First check that the POR value is correct
19392 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_ADDR, %g1, %g2
19393 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_POR_VALUE, %g1, %g3)
19394 ldx [%g2], %g4
19395 xorcc %g3, %g4, %g5
19396 bne test_failed
19397 nop
19398
19399 ! Next check that all the writable bits can be written
19400 xor %g3, %l1, %l2
19401 stx %l2, [%g2] ! store inverted POR value
19402
19403#define REG_182_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_WRITE_MASK) )
19404
19405 best_set_reg(REG_182_EXP_VALUE, %g1, %g7) ! get expected value
19406 ldx [%g2], %g4
19407 xorcc %g7, %g4, %g5
19408 bne test_failed
19409 nop
19410
19411
19412REG_TEST_183:
19413 ! First check that the POR value is correct
19414 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_ADDR, %g1, %g2
19415 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_POR_VALUE, %g1, %g3)
19416 ldx [%g2], %g4
19417 xorcc %g3, %g4, %g5
19418 bne test_failed
19419 nop
19420
19421 ! Next check that all the writable bits can be written
19422 xor %g3, %l1, %l2
19423 stx %l2, [%g2] ! store inverted POR value
19424
19425#define REG_183_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_WRITE_MASK) )
19426
19427 best_set_reg(REG_183_EXP_VALUE, %g1, %g7) ! get expected value
19428 ldx [%g2], %g4
19429 xorcc %g7, %g4, %g5
19430 bne test_failed
19431 nop
19432
19433
19434REG_TEST_184:
19435 ! First check that the POR value is correct
19436 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CTL_ADDR, %g1, %g2
19437 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CTL_POR_VALUE, %g1, %g3)
19438 ldx [%g2], %g4
19439 xorcc %g3, %g4, %g5
19440 bne test_failed
19441 nop
19442
19443 ! Next check that all the writable bits can be written
19444 xor %g3, %l1, %l2
19445 stx %l2, [%g2] ! store inverted POR value
19446
19447#define REG_184_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CTL_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CTL_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CTL_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CTL_WRITE_MASK) )
19448
19449 best_set_reg(REG_184_EXP_VALUE, %g1, %g7) ! get expected value
19450 ldx [%g2], %g4
19451 xorcc %g7, %g4, %g5
19452 bne test_failed
19453 nop
19454
19455
19456REG_TEST_185:
19457 ! First check that the POR value is correct
19458 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_STS_ADDR, %g1, %g2
19459 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_STS_POR_VALUE, %g1, %g3)
19460 ldx [%g2], %g4
19461 xorcc %g3, %g4, %g5
19462 bne test_failed
19463 nop
19464
19465 ! Next check that all the writable bits can be written
19466 xor %g3, %l1, %l2
19467 stx %l2, [%g2] ! store inverted POR value
19468
19469#define REG_185_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_STS_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_STS_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_STS_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_STS_WRITE_MASK) )
19470
19471 best_set_reg(REG_185_EXP_VALUE, %g1, %g7) ! get expected value
19472 ldx [%g2], %g4
19473 xorcc %g7, %g4, %g5
19474 bne test_failed
19475 nop
19476
19477
19478REG_TEST_186:
19479 ! First check that the POR value is correct
19480 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_ADDR, %g1, %g2
19481 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_POR_VALUE, %g1, %g3)
19482 ldx [%g2], %g4
19483 xorcc %g3, %g4, %g5
19484 bne test_failed
19485 nop
19486
19487 ! Next check that all the writable bits can be written
19488 xor %g3, %l1, %l2
19489 stx %l2, [%g2] ! store inverted POR value
19490
19491#define REG_186_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_WRITE_MASK) )
19492
19493 best_set_reg(REG_186_EXP_VALUE, %g1, %g7) ! get expected value
19494 ldx [%g2], %g4
19495 xorcc %g7, %g4, %g5
19496 bne test_failed
19497 nop
19498
19499
19500REG_TEST_187:
19501 ! First check that the POR value is correct
19502 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_ADDR, %g1, %g2
19503 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_POR_VALUE, %g1, %g3)
19504 ldx [%g2], %g4
19505 xorcc %g3, %g4, %g5
19506 bne test_failed
19507 nop
19508
19509 ! Next check that all the writable bits can be written
19510 mov 0x30, %g3 ! don't write to the retrain & link disable bits
19511 xor %g3, %l1, %l2
19512 stx %l2, [%g2] ! store inverted POR value
19513
19514/* #define REG_187_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_WRITE_MASK) ) */
19515
19516!#define REG_187_EXP_VALUE 0x00000000000000d3
19517#define REG_187_EXP_VALUE 0x00000000000000c3
19518
19519 best_set_reg(REG_187_EXP_VALUE, %g1, %g7) ! get expected value
19520 ldx [%g2], %g4
19521 xorcc %g7, %g4, %g5
19522 bne test_failed
19523 nop
19524
19525
19526REG_TEST_188:
19527 ! First check that the POR value is correct
19528 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_ADDR, %g1, %g2
19529#ifdef DTM_ENABLED
19530 set 0x81, %g3 ! link is up, with 8 lanes
19531#else
19532 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_POR_VALUE, %g1, %g3)
19533#endif
19534 ldx [%g2], %g4
19535 xorcc %g3, %g4, %g5
19536 bne test_failed
19537 nop
19538
19539 ! Next check that all the writable bits can be written
19540 xor %g3, %l1, %l2
19541 stx %l2, [%g2] ! store inverted POR value
19542
19543#define REG_188_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_WRITE_MASK) )
19544
19545 !best_set_reg(REG_188_EXP_VALUE, %g1, %g7) ! get expected value
19546 ldx [%g2], %g4
19547 !xorcc %g7, %g4, %g5
19548 xorcc %g3, %g4, %g5
19549 bne test_failed
19550 nop
19551
19552
19553REG_TEST_189:
19554 ! First check that the POR value is correct
19555 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_SLT_CAP_ADDR, %g1, %g2
19556 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_SLT_CAP_POR_VALUE, %g1, %g3)
19557 ldx [%g2], %g4
19558 xorcc %g3, %g4, %g5
19559 bne test_failed
19560 nop
19561
19562/******************* A write to this reg will cause the msg to be sent
19563 ! Next check that all the writable bits can be written
19564 xor %g3, %l1, %l2
19565 stx %l2, [%g2] ! store inverted POR value
19566
19567#define REG_189_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_SLT_CAP_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_SLT_CAP_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_SLT_CAP_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_SLT_CAP_WRITE_MASK) )
19568
19569 best_set_reg(REG_189_EXP_VALUE, %g1, %g7) ! get expected value
19570 ldx [%g2], %g4
19571 xorcc %g7, %g4, %g5
19572 bne test_failed
19573 nop
19574*******************************/
19575
19576REG_TEST_190:
19577 ! First check that the POR value is correct
19578 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_LOG_ADDR, %g1, %g2
19579 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_LOG_POR_VALUE, %g1, %g3)
19580 ldx [%g2], %g4
19581 xorcc %g3, %g4, %g5
19582 bne test_failed
19583 nop
19584
19585 ! Next check that all the writable bits can be written
19586 xor %g3, %l1, %l2
19587 stx %l2, [%g2] ! store inverted POR value
19588
19589#define REG_190_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_LOG_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_LOG_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_LOG_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_LOG_WRITE_MASK) )
19590
19591 best_set_reg(REG_190_EXP_VALUE, %g1, %g7) ! get expected value
19592 ldx [%g2], %g4
19593 xorcc %g7, %g4, %g5
19594 bne test_failed
19595 nop
19596
19597
19598REG_TEST_191:
19599 ! First check that the POR value is correct
19600 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_INT_EN_ADDR, %g1, %g2
19601 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_INT_EN_POR_VALUE, %g1, %g3)
19602 ldx [%g2], %g4
19603 xorcc %g3, %g4, %g5
19604 bne test_failed
19605 nop
19606
19607 ! Next check that all the writable bits can be written
19608 xor %g3, %l1, %l2
19609 stx %l2, [%g2] ! store inverted POR value
19610
19611#define REG_191_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_INT_EN_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_INT_EN_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_INT_EN_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_INT_EN_WRITE_MASK) )
19612
19613 best_set_reg(REG_191_EXP_VALUE, %g1, %g7) ! get expected value
19614 ldx [%g2], %g4
19615 xorcc %g7, %g4, %g5
19616 bne test_failed
19617 nop
19618
19619
19620REG_TEST_192:
19621 ! First check that the POR value is correct
19622 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_EN_ERR_ADDR, %g1, %g2
19623 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_EN_ERR_POR_VALUE, %g1, %g3)
19624 ldx [%g2], %g4
19625 xorcc %g3, %g4, %g5
19626 bne test_failed
19627 nop
19628
19629 ! Next check that all the writable bits can be written
19630 xor %g3, %l1, %l2
19631 stx %l2, [%g2] ! store inverted POR value
19632
19633#define REG_192_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_EN_ERR_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_EN_ERR_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_EN_ERR_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_EN_ERR_WRITE_MASK) )
19634
19635 best_set_reg(REG_192_EXP_VALUE, %g1, %g7) ! get expected value
19636 ldx [%g2], %g4
19637 xorcc %g7, %g4, %g5
19638 bne test_failed
19639 nop
19640
19641
19642REG_TEST_193:
19643 ! First check that the POR value is correct
19644 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_ADDR, %g1, %g2
19645 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_POR_VALUE, %g1, %g3)
19646 ldx [%g2], %g4
19647 xorcc %g3, %g4, %g5
19648 bne test_failed
19649 nop
19650
19651 ! Next check that all the writable bits can be written
19652 xor %g3, %l1, %l2
19653 stx %l2, [%g2] ! store inverted POR value
19654
19655#define REG_193_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_POR_VALUE & 0) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_POR_VALUE & ~0) )
19656
19657 best_set_reg(REG_193_EXP_VALUE, %g1, %g7) ! get expected value
19658 ldx [%g2], %g4
19659 xorcc %g7, %g4, %g5
19660 bne test_failed
19661 nop
19662
19663
19664REG_TEST_194:
19665 ! First check that the POR value is correct
19666 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_ADDR, %g1, %g2
19667 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_POR_VALUE, %g1, %g3)
19668 ldx [%g2], %g4
19669 xorcc %g3, %g4, %g5
19670 bne test_failed
19671 nop
19672
19673 ! Next check that all the writable bits can be written
19674 xor %g3, %l1, %l2
19675 stx %l2, [%g2] ! store inverted POR value
19676
19677#define REG_194_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_WRITE_MASK) )
19678
19679 best_set_reg(REG_194_EXP_VALUE, %g1, %g7) ! get expected value
19680 ldx [%g2], %g4
19681 xorcc %g7, %g4, %g5
19682 bne test_failed
19683 nop
19684
19685
19686REG_TEST_195:
19687 ! First check that the POR value is correct
19688 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR1_ADDR, %g1, %g2
19689 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR1_POR_VALUE, %g1, %g3)
19690 ldx [%g2], %g4
19691 xorcc %g3, %g4, %g5
19692 bne test_failed
19693 nop
19694
19695 ! Next check that all the writable bits can be written
19696 xor %g3, %l1, %l2
19697 stx %l2, [%g2] ! store inverted POR value
19698
19699#define REG_195_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR1_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR1_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR1_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR1_WRITE_MASK) )
19700
19701 best_set_reg(REG_195_EXP_VALUE, %g1, %g7) ! get expected value
19702 ldx [%g2], %g4
19703 !xorcc %g7, %g4, %g5
19704 !bne test_failed
19705 !nop
19706
19707
19708REG_TEST_196:
19709 ! First check that the POR value is correct
19710 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR2_ADDR, %g1, %g2
19711 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR2_POR_VALUE, %g1, %g3)
19712 ldx [%g2], %g4
19713 xorcc %g3, %g4, %g5
19714 bne test_failed
19715 nop
19716
19717 ! Next check that all the writable bits can be written
19718 xor %g3, %l1, %l2
19719 stx %l2, [%g2] ! store inverted POR value
19720
19721#define REG_196_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR2_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR2_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR2_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR2_WRITE_MASK) )
19722
19723 best_set_reg(REG_196_EXP_VALUE, %g1, %g7) ! get expected value
19724 ldx [%g2], %g4
19725 !xorcc %g7, %g4, %g5
19726 !bne test_failed
19727 !nop
19728
19729
19730REG_TEST_197:
19731 ! First check that the POR value is correct
19732 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR1_ADDR, %g1, %g2
19733 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR1_POR_VALUE, %g1, %g3)
19734 ldx [%g2], %g4
19735
19736 !xorcc %g3, %g4, %g5 ! got 0000000000000d00 in simulation
19737 !bne test_failed
19738 !nop
19739
19740 ! Next check that all the writable bits can be written
19741 xor %g3, %l1, %l2
19742 stx %l2, [%g2] ! store inverted POR value
19743
19744#define REG_197_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR1_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR1_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR1_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR1_WRITE_MASK) )
19745
19746 best_set_reg(REG_197_EXP_VALUE, %g1, %g7) ! get expected value
19747 ldx [%g2], %g4
19748 !xorcc %g7, %g4, %g5
19749 !bne test_failed
19750 !nop
19751
19752
19753REG_TEST_198:
19754 ! First check that the POR value is correct
19755 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR2_ADDR, %g1, %g2
19756 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR2_POR_VALUE, %g1, %g3)
19757 ldx [%g2], %g4
19758 xorcc %g3, %g4, %g5
19759 bne test_failed
19760 nop
19761
19762 ! Next check that all the writable bits can be written
19763 xor %g3, %l1, %l2
19764 stx %l2, [%g2] ! store inverted POR value
19765
19766#define REG_198_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR2_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR2_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR2_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR2_WRITE_MASK) )
19767
19768 best_set_reg(REG_198_EXP_VALUE, %g1, %g7) ! get expected value
19769 ldx [%g2], %g4
19770 !xorcc %g7, %g4, %g5
19771 !bne test_failed
19772 !nop
19773
19774
19775REG_TEST_199:
19776 ! First check that the POR value is correct
19777 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_LOG_ADDR, %g1, %g2
19778 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_LOG_POR_VALUE, %g1, %g3)
19779 ldx [%g2], %g4
19780 xorcc %g3, %g4, %g5
19781 bne test_failed
19782 nop
19783
19784 ! Next check that all the writable bits can be written
19785 xor %g3, %l1, %l2
19786 stx %l2, [%g2] ! store inverted POR value
19787
19788#define REG_199_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_LOG_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_LOG_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_LOG_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_LOG_WRITE_MASK) )
19789
19790 best_set_reg(REG_199_EXP_VALUE, %g1, %g7) ! get expected value
19791 ldx [%g2], %g4
19792 xorcc %g7, %g4, %g5
19793 bne test_failed
19794 nop
19795
19796
19797REG_TEST_200:
19798 ! First check that the POR value is correct
19799 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_INT_EN_ADDR, %g1, %g2
19800 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_INT_EN_POR_VALUE, %g1, %g3)
19801 ldx [%g2], %g4
19802 xorcc %g3, %g4, %g5
19803 bne test_failed
19804 nop
19805
19806 ! Next check that all the writable bits can be written
19807 xor %g3, %l1, %l2
19808 stx %l2, [%g2] ! store inverted POR value
19809
19810#define REG_200_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_INT_EN_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_INT_EN_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_INT_EN_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_INT_EN_WRITE_MASK) )
19811
19812 best_set_reg(REG_200_EXP_VALUE, %g1, %g7) ! get expected value
19813 ldx [%g2], %g4
19814 xorcc %g7, %g4, %g5
19815 bne test_failed
19816 nop
19817
19818
19819REG_TEST_201:
19820 ! First check that the POR value is correct
19821 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_EN_ERR_ADDR, %g1, %g2
19822 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_EN_ERR_POR_VALUE, %g1, %g3)
19823 ldx [%g2], %g4
19824 xorcc %g3, %g4, %g5
19825 bne test_failed
19826 nop
19827
19828 ! Next check that all the writable bits can be written
19829 xor %g3, %l1, %l2
19830 stx %l2, [%g2] ! store inverted POR value
19831
19832#define REG_201_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_EN_ERR_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_EN_ERR_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_EN_ERR_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_EN_ERR_WRITE_MASK) )
19833
19834 best_set_reg(REG_201_EXP_VALUE, %g1, %g7) ! get expected value
19835 ldx [%g2], %g4
19836 xorcc %g7, %g4, %g5
19837 bne test_failed
19838 nop
19839
19840
19841REG_TEST_202:
19842 ! First check that the POR value is correct
19843 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_ADDR, %g1, %g2
19844 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_POR_VALUE, %g1, %g3)
19845 ldx [%g2], %g4
19846 xorcc %g3, %g4, %g5
19847 bne test_failed
19848 nop
19849
19850 ! Next check that all the writable bits can be written
19851 xor %g3, %l1, %l2
19852 stx %l2, [%g2] ! store inverted POR value
19853
19854#define REG_202_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_POR_VALUE & 0) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_POR_VALUE & ~0) )
19855
19856 best_set_reg(REG_202_EXP_VALUE, %g1, %g7) ! get expected value
19857 ldx [%g2], %g4
19858 xorcc %g7, %g4, %g5
19859 bne test_failed
19860 nop
19861
19862
19863REG_TEST_203:
19864 ! First check that the POR value is correct
19865 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_ADDR, %g1, %g2
19866 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_POR_VALUE, %g1, %g3)
19867 ldx [%g2], %g4
19868 xorcc %g3, %g4, %g5
19869 bne test_failed
19870 nop
19871
19872 ! Next check that all the writable bits can be written
19873 xor %g3, %l1, %l2
19874 stx %l2, [%g2] ! store inverted POR value
19875
19876#define REG_203_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_WRITE_MASK) )
19877
19878 best_set_reg(REG_203_EXP_VALUE, %g1, %g7) ! get expected value
19879 ldx [%g2], %g4
19880 xorcc %g7, %g4, %g5
19881 bne test_failed
19882 nop
19883
19884
19885REG_TEST_204:
19886 ! First check that the POR value is correct
19887 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_PEU_DLPL_SERDES_REV_ADDR, %g1, %g2
19888 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_PEU_DLPL_SERDES_REV_POR_VALUE, %g1, %g3)
19889 ldx [%g2], %g4
19890 xorcc %g3, %g4, %g5
19891 bne test_failed
19892 nop
19893
19894 ! Next check that all the writable bits can be written
19895 xor %g3, %l1, %l2
19896 stx %l2, [%g2] ! store inverted POR value
19897
19898#define REG_204_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_PEU_DLPL_SERDES_REV_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_PEU_DLPL_SERDES_REV_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_PEU_DLPL_SERDES_REV_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_PEU_DLPL_SERDES_REV_WRITE_MASK) )
19899
19900 best_set_reg(REG_204_EXP_VALUE, %g1, %g7) ! get expected value
19901 ldx [%g2], %g4
19902 xorcc %g7, %g4, %g5
19903 bne test_failed
19904 nop
19905
19906
19907REG_TEST_205:
19908 ! First check that the POR value is correct
19909 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_THRESH_ADDR, %g1, %g2
19910 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_THRESH_POR_VALUE, %g1, %g3)
19911 ldx [%g2], %g4
19912 xorcc %g3, %g4, %g5
19913 bne test_failed
19914 nop
19915
19916 ! Next check that all the writable bits can be written
19917 xor %g3, %l1, %l2
19918 stx %l2, [%g2] ! store inverted POR value
19919
19920#define REG_205_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_THRESH_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_THRESH_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_THRESH_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_THRESH_WRITE_MASK) )
19921
19922 best_set_reg(REG_205_EXP_VALUE, %g1, %g7) ! get expected value
19923 ldx [%g2], %g4
19924 xorcc %g7, %g4, %g5
19925 bne test_failed
19926 nop
19927
19928
19929REG_TEST_206:
19930 ! First check that the POR value is correct
19931 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_TIMER_ADDR, %g1, %g2
19932 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_TIMER_POR_VALUE, %g1, %g3)
19933 ldx [%g2], %g4
19934 xorcc %g3, %g4, %g5
19935 bne test_failed
19936 nop
19937
19938 ! Next check that all the writable bits can be written
19939 xor %g3, %l1, %l2
19940 stx %l2, [%g2] ! store inverted POR value
19941
19942#define REG_206_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_TIMER_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_TIMER_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_TIMER_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_TIMER_WRITE_MASK) )
19943
19944 best_set_reg(REG_206_EXP_VALUE, %g1, %g7) ! get expected value
19945 ldx [%g2], %g4
19946 xorcc %g7, %g4, %g5
19947 bne test_failed
19948 nop
19949
19950
19951REG_TEST_207:
19952 ! First check that the POR value is correct
19953 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIM_THRESH_ADDR, %g1, %g2
19954 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIM_THRESH_POR_VALUE, %g1, %g3)
19955 ldx [%g2], %g4
19956 xorcc %g3, %g4, %g5
19957 bne test_failed
19958 nop
19959
19960 ! Next check that all the writable bits can be written
19961 xor %g3, %l1, %l2
19962 stx %l2, [%g2] ! store inverted POR value
19963
19964#define REG_207_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIM_THRESH_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIM_THRESH_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIM_THRESH_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIM_THRESH_WRITE_MASK) )
19965
19966 best_set_reg(REG_207_EXP_VALUE, %g1, %g7) ! get expected value
19967 ldx [%g2], %g4
19968 xorcc %g7, %g4, %g5
19969 bne test_failed
19970 nop
19971
19972
19973REG_TEST_208:
19974 ! First check that the POR value is correct
19975 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIMER_ADDR, %g1, %g2
19976 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIMER_POR_VALUE, %g1, %g3)
19977 ldx [%g2], %g4
19978 xorcc %g3, %g4, %g5
19979 bne test_failed
19980 nop
19981
19982 ! Next check that all the writable bits can be written
19983 xor %g3, %l1, %l2
19984 stx %l2, [%g2] ! store inverted POR value
19985
19986#define REG_208_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIMER_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIMER_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIMER_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIMER_WRITE_MASK) )
19987
19988 best_set_reg(REG_208_EXP_VALUE, %g1, %g7) ! get expected value
19989 ldx [%g2], %g4
19990 xorcc %g7, %g4, %g5
19991 bne test_failed
19992 nop
19993
19994
19995REG_TEST_209:
19996 ! First check that the POR value is correct
19997 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_VEN_DLLP_MSG_ADDR, %g1, %g2
19998 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_VEN_DLLP_MSG_POR_VALUE, %g1, %g3)
19999 ldx [%g2], %g4
20000 xorcc %g3, %g4, %g5
20001 bne test_failed
20002 nop
20003
20004 ! Next check that all the writable bits can be written
20005 xor %g3, %l1, %l2
20006 stx %l2, [%g2] ! store inverted POR value
20007
20008#define REG_209_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_VEN_DLLP_MSG_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_VEN_DLLP_MSG_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_VEN_DLLP_MSG_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_VEN_DLLP_MSG_WRITE_MASK) )
20009
20010 best_set_reg(REG_209_EXP_VALUE, %g1, %g7) ! get expected value
20011 ldx [%g2], %g4
20012 xorcc %g7, %g4, %g5
20013 bne test_failed
20014 nop
20015
20016
20017REG_TEST_210:
20018 ! First check that the POR value is correct
20019 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_FORCE_LTSSM_ADDR, %g1, %g2
20020 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_FORCE_LTSSM_POR_VALUE, %g1, %g3)
20021 ldx [%g2], %g4
20022 xorcc %g3, %g4, %g5
20023 bne test_failed
20024 nop
20025
20026 ! Next check that all the writable bits can be written
20027 xor %g3, %l1, %l2
20028 stx %l2, [%g2] ! store inverted POR value
20029
20030#define REG_210_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_FORCE_LTSSM_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_FORCE_LTSSM_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_FORCE_LTSSM_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_FORCE_LTSSM_WRITE_MASK) )
20031
20032 best_set_reg(REG_210_EXP_VALUE, %g1, %g7) ! get expected value
20033 ldx [%g2], %g4
20034 xorcc %g7, %g4, %g5
20035 bne test_failed
20036 nop
20037
20038
20039REG_TEST_211:
20040 ! First check that the POR value is correct
20041 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_ADDR, %g1, %g2
20042 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_POR_VALUE, %g1, %g3)
20043 ldx [%g2], %g4
20044 xorcc %g3, %g4, %g5
20045 bne test_failed
20046 nop
20047
20048 ! Next check that all the writable bits can be written
20049 xor %g3, %l1, %l2
20050#ifdef DTM_ENABLED
20051 set 4, %l3 ! mask for "omr" bit 2 in DTM mode
20052 xor %l3, %l1, %l3 ! invert it so it can be masked off
20053 and %l2, %l3, %l2 ! so that an invalid DLLP is not sent
20054#endif
20055 stx %l2, [%g2] ! store inverted POR value
20056
20057#ifdef DTM_ENABLED
20058#define REG_211_EXP_VALUE mpeval( (~(FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_POR_VALUE|4) & FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_WRITE_MASK) )
20059#else
20060#define REG_211_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_WRITE_MASK) )
20061#endif
20062
20063 best_set_reg(REG_211_EXP_VALUE, %g1, %g7) ! get expected value
20064 ldx [%g2], %g4
20065 xorcc %g7, %g4, %g5
20066 bne test_failed
20067 nop
20068
20069
20070REG_TEST_212:
20071 ! First check that the POR value is correct
20072 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_ADDR, %g1, %g2
20073#ifdef DTM_ENABLED
20074 ! in DTM mode, scrambling is disabled
20075 best_set_reg(eval(FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_POR_VALUE+2), %g1, %g3)
20076#else
20077 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_POR_VALUE, %g1, %g3)
20078#endif
20079 ldx [%g2], %g4
20080 xorcc %g3, %g4, %g5
20081 bne test_failed
20082 nop
20083
20084#ifdef DTM_ENABLED
20085 stx %g4, [%g2] ! store POR value for some coverage
20086 ldx [%g2], %g7
20087#else
20088 ! Next check that all the writable bits can be written
20089 xor %g3, %l1, %l2
20090 stx %l2, [%g2] ! store inverted POR value
20091
20092#define REG_212_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_WRITE_MASK) )
20093
20094 best_set_reg(REG_212_EXP_VALUE, %g1, %g7) ! get expected value
20095 ldx [%g2], %g4
20096#endif
20097 xorcc %g7, %g4, %g5
20098 bne test_failed
20099 nop
20100
20101
20102REG_TEST_213:
20103 ! First check that the POR value is correct
20104 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_ADDR, %g1, %g2
20105 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_POR_VALUE, %g1, %g3)
20106 ldx [%g2], %g4
20107 xorcc %g3, %g4, %g5
20108 bne test_failed
20109 nop
20110
20111 ! Next check that all the writable bits can be written
20112 xor %g3, %l1, %l2
20113 stx %l2, [%g2] ! store inverted POR value
20114
20115#define REG_213_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_WRITE_MASK) )
20116
20117 best_set_reg(REG_213_EXP_VALUE, %g1, %g7) ! get expected value
20118 ldx [%g2], %g4
20119 xorcc %g7, %g4, %g5
20120 bne test_failed
20121 nop
20122
20123
20124REG_TEST_214:
20125 ! First check that the POR value is correct
20126 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_ADDR, %g1, %g2
20127 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_POR_VALUE, %g1, %g3)
20128 ldx [%g2], %g4
20129 xorcc %g3, %g4, %g5
20130 bne test_failed
20131 nop
20132
20133 ! Next check that all the writable bits can be written
20134 xor %g3, %l1, %l2
20135 stx %l2, [%g2] ! store inverted POR value
20136
20137#define REG_214_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_WRITE_MASK) )
20138
20139 best_set_reg(REG_214_EXP_VALUE, %g1, %g7) ! get expected value
20140 ldx [%g2], %g4
20141 xorcc %g7, %g4, %g5
20142 bne test_failed
20143 nop
20144
20145
20146REG_TEST_215:
20147 ! First check that the POR value is correct
20148 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_TIMER_ADDR, %g1, %g2
20149 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_TIMER_POR_VALUE, %g1, %g3)
20150 ldx [%g2], %g4
20151 xorcc %g3, %g4, %g5
20152 bne test_failed
20153 nop
20154
20155 ! Next check that all the writable bits can be written
20156 xor %g3, %l1, %l2
20157 stx %l2, [%g2] ! store inverted POR value
20158
20159#define REG_215_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_TIMER_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_TIMER_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_TIMER_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_TIMER_WRITE_MASK) )
20160
20161 best_set_reg(REG_215_EXP_VALUE, %g1, %g7) ! get expected value
20162 ldx [%g2], %g4
20163 xorcc %g7, %g4, %g5
20164 bne test_failed
20165 nop
20166
20167
20168REG_TEST_216:
20169 ! First check that the POR value is correct
20170 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_ADDR, %g1, %g2
20171 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_POR_VALUE, %g1, %g3)
20172 ldx [%g2], %g4
20173 xorcc %g3, %g4, %g5
20174 !bne test_failed
20175 nop
20176
20177 ! Next check that all the writable bits can be written
20178 xor %g3, %l1, %l2
20179 stx %l2, [%g2] ! store inverted POR value
20180
20181#define REG_216_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_WRITE_MASK) )
20182
20183 best_set_reg(REG_216_EXP_VALUE, %g1, %g7) ! get expected value
20184 ldx [%g2], %g4
20185 xorcc %g7, %g4, %g5
20186 !bne test_failed
20187 nop
20188
20189
20190REG_TEST_217:
20191 ! First check that the POR value is correct
20192 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_LOG_EN_ADDR, %g1, %g2
20193 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_LOG_EN_POR_VALUE, %g1, %g3)
20194 ldx [%g2], %g4
20195 xorcc %g3, %g4, %g5
20196 bne test_failed
20197 nop
20198
20199 ! Next check that all the writable bits can be written
20200 xor %g3, %l1, %l2
20201 stx %l2, [%g2] ! store inverted POR value
20202
20203#define REG_217_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_LOG_EN_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_LOG_EN_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_LOG_EN_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_LOG_EN_WRITE_MASK) )
20204
20205 best_set_reg(REG_217_EXP_VALUE, %g1, %g7) ! get expected value
20206 ldx [%g2], %g4
20207 xorcc %g7, %g4, %g5
20208 bne test_failed
20209 nop
20210
20211
20212REG_TEST_218:
20213 ! First check that the POR value is correct
20214 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_EN_ADDR, %g1, %g2
20215 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_EN_POR_VALUE, %g1, %g3)
20216 ldx [%g2], %g4
20217 xorcc %g3, %g4, %g5
20218 bne test_failed
20219 nop
20220
20221 ! Next check that all the writable bits can be written
20222 xor %g3, %l1, %l2
20223 stx %l2, [%g2] ! store inverted POR value
20224
20225#define REG_218_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_EN_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_EN_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_EN_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_EN_WRITE_MASK) )
20226
20227 best_set_reg(REG_218_EXP_VALUE, %g1, %g7) ! get expected value
20228 ldx [%g2], %g4
20229 xorcc %g7, %g4, %g5
20230 bne test_failed
20231 nop
20232
20233
20234REG_TEST_219:
20235 ! First check that the POR value is correct
20236 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_STS_ADDR, %g1, %g2
20237 ldx [%g2], %g4
20238
20239 ! mask off some status bits that might have gotten set
20240 best_set_reg(0xffffffff00ffbfff, %g1, %l3)
20241 and %l3, %g4, %g4
20242
20243 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_STS_POR_VALUE, %g1, %g3)
20244 xorcc %g3, %g4, %g5
20245 bne test_failed
20246 nop
20247
20248 ! Next check that all the writable bits can be written
20249 xor %g3, %l1, %l2
20250 stx %l2, [%g2] ! store inverted POR value
20251
20252#define REG_219_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_STS_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_STS_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_STS_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_STS_WRITE_MASK) )
20253
20254 best_set_reg(REG_219_EXP_VALUE, %g1, %g7) ! get expected value
20255 ldx [%g2], %g4
20256 and %l3, %g4, %g4 ! mask off some status bits that might have gotten set
20257 xorcc %g7, %g4, %g5
20258 bne test_failed
20259 nop
20260
20261
20262REG_TEST_220:
20263 ! First check that the POR value is correct
20264 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ADDR, %g1, %g2
20265 ldx [%g2], %g4
20266
20267 ! mask off some status bits that might have gotten set
20268 and %l3, %g4, %g4
20269
20270 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_POR_VALUE, %g1, %g3)
20271 xorcc %g3, %g4, %g5
20272 bne test_failed
20273 nop
20274
20275 ! Next check that all the writable bits can be written
20276 xor %g3, %l1, %l2
20277 stx %l2, [%g2] ! store inverted POR value
20278
20279#define REG_220_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_POR_VALUE & 0) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_POR_VALUE & ~0) )
20280
20281 best_set_reg(REG_220_EXP_VALUE, %g1, %g7) ! get expected value
20282 ldx [%g2], %g4
20283 and %l3, %g4, %g4 ! mask off some status bits that might have gotten set
20284 xorcc %g7, %g4, %g5
20285 bne test_failed
20286 nop
20287
20288
20289REG_TEST_221:
20290 ! First check that the POR value is correct
20291 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ADDR, %g1, %g2
20292 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_POR_VALUE, %g1, %g3)
20293 ldx [%g2], %g4
20294 xorcc %g3, %g4, %g5
20295 !bne test_failed
20296 nop
20297
20298 ! Next check that all the writable bits can be written
20299 xor %g3, %l1, %l2
20300 stx %l2, [%g2] ! store inverted POR value
20301
20302#define REG_221_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_WRITE_MASK) )
20303
20304 best_set_reg(REG_221_EXP_VALUE, %g1, %g7) ! get expected value
20305 ldx [%g2], %g4
20306 xorcc %g7, %g4, %g5
20307 !bne test_failed
20308 nop
20309
20310
20311REG_TEST_222:
20312 ! First check that the POR value is correct
20313 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_ADDR, %g1, %g2
20314 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_POR_VALUE, %g1, %g3)
20315 ldx [%g2], %g4
20316 xorcc %g3, %g4, %g5
20317 !bne test_failed
20318 nop
20319
20320 ! Next check that all the writable bits can be written
20321 xor %g3, %l1, %l2
20322 stx %l2, [%g2] ! store inverted POR value
20323
20324#define REG_222_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_WRITE_MASK) )
20325
20326 best_set_reg(REG_222_EXP_VALUE, %g1, %g7) ! get expected value
20327 ldx [%g2], %g4
20328 xorcc %g7, %g4, %g5
20329 !bne test_failed
20330 nop
20331
20332
20333REG_TEST_223:
20334 ! First check that the POR value is correct
20335 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_ADDR, %g1, %g2
20336 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_POR_VALUE, %g1, %g3)
20337 ldx [%g2], %g4
20338 xorcc %g3, %g4, %g5
20339 bne test_failed
20340 nop
20341
20342 ! Next check that all the writable bits can be written
20343 xor %g3, %l1, %l2
20344 stx %l2, [%g2] ! store inverted POR value
20345
20346#define REG_223_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_WRITE_MASK) )
20347
20348 best_set_reg(REG_223_EXP_VALUE, %g1, %g7) ! get expected value
20349 ldx [%g2], %g4
20350 xorcc %g7, %g4, %g5
20351 bne test_failed
20352 nop
20353
20354
20355REG_TEST_224:
20356 ! First check that the POR value is correct
20357 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_ADDR, %g1, %g2
20358#ifdef DTM_ENABLED
20359 set 5, %g3 ! 125 Mhz ref clk in DTM mode
20360#else
20361 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_POR_VALUE, %g1, %g3)
20362#endif
20363 ldx [%g2], %g4
20364 xorcc %g3, %g4, %g5
20365 bne test_failed
20366 nop
20367
20368/****** don't change the serdes pll config
20369 ! Next check that all the writable bits can be written
20370 xor %g3, %l1, %l2
20371 stx %l2, [%g2] ! store inverted POR value
20372
20373#define REG_224_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_WRITE_MASK) )
20374
20375 best_set_reg(REG_224_EXP_VALUE, %g1, %g7) ! get expected value
20376 ldx [%g2], %g4
20377 xorcc %g7, %g4, %g5
20378 bne test_failed
20379 nop
20380******/
20381
20382REG_TEST_225:
20383 ! First check that the POR value is correct
20384 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_ADDR, %g1, %g2
20385 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_POR_VALUE, %g1, %g3)
20386 ldx [%g2], %g4
20387 xorcc %g3, %g4, %g5
20388 bne test_failed
20389 nop
20390
20391/**** ! Next check that all the writable bits can be written
20392 xor %g3, %l1, %l2
20393 stx %l2, [%g2] ! store inverted POR value
20394
20395#define REG_225_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_WRITE_MASK) )
20396
20397 best_set_reg(REG_225_EXP_VALUE, %g1, %g7) ! get expected value
20398 ldx [%g2], %g4
20399 xorcc %g7, %g4, %g5
20400 bne test_failed
20401 nop
20402****/
20403
20404 ! First check that the POR value is correct
20405 add %g2, 8, %g2
20406 ldx [%g2], %g4
20407 xorcc %g3, %g4, %g5
20408 bne test_failed
20409 nop
20410
20411/**** ! Next check that all the writable bits can be written
20412 stx %l2, [%g2] ! store inverted POR value
20413 ldx [%g2], %g4
20414 xorcc %g7, %g4, %g5
20415 bne test_failed
20416 nop
20417****/
20418
20419 ! First check that the POR value is correct
20420 add %g2, 8, %g2
20421 ldx [%g2], %g4
20422 xorcc %g3, %g4, %g5
20423 bne test_failed
20424 nop
20425
20426/**** ! Next check that all the writable bits can be written
20427 stx %l2, [%g2] ! store inverted POR value
20428 ldx [%g2], %g4
20429 xorcc %g7, %g4, %g5
20430 bne test_failed
20431 nop
20432****/
20433
20434 ! First check that the POR value is correct
20435 add %g2, 8, %g2
20436 ldx [%g2], %g4
20437 xorcc %g3, %g4, %g5
20438 bne test_failed
20439 nop
20440
20441/**** ! Next check that all the writable bits can be written
20442 stx %l2, [%g2] ! store inverted POR value
20443 ldx [%g2], %g4
20444 xorcc %g7, %g4, %g5
20445 bne test_failed
20446 nop
20447****/
20448
20449 ! First check that the POR value is correct
20450 add %g2, 8, %g2
20451 ldx [%g2], %g4
20452 xorcc %g3, %g4, %g5
20453 bne test_failed
20454 nop
20455
20456/**** ! Next check that all the writable bits can be written
20457 stx %l2, [%g2] ! store inverted POR value
20458 ldx [%g2], %g4
20459 xorcc %g7, %g4, %g5
20460 bne test_failed
20461 nop
20462****/
20463
20464 ! First check that the POR value is correct
20465 add %g2, 8, %g2
20466 ldx [%g2], %g4
20467 xorcc %g3, %g4, %g5
20468 bne test_failed
20469 nop
20470
20471/**** ! Next check that all the writable bits can be written
20472 stx %l2, [%g2] ! store inverted POR value
20473 ldx [%g2], %g4
20474 xorcc %g7, %g4, %g5
20475 bne test_failed
20476 nop
20477****/
20478
20479 ! First check that the POR value is correct
20480 add %g2, 8, %g2
20481 ldx [%g2], %g4
20482 xorcc %g3, %g4, %g5
20483 bne test_failed
20484 nop
20485
20486/**** ! Next check that all the writable bits can be written
20487 stx %l2, [%g2] ! store inverted POR value
20488 ldx [%g2], %g4
20489 xorcc %g7, %g4, %g5
20490 bne test_failed
20491 nop
20492****/
20493
20494 ! First check that the POR value is correct
20495 add %g2, 8, %g2
20496 ldx [%g2], %g4
20497 xorcc %g3, %g4, %g5
20498 bne test_failed
20499 nop
20500
20501/**** ! Next check that all the writable bits can be written
20502 stx %l2, [%g2] ! store inverted POR value
20503 ldx [%g2], %g4
20504 xorcc %g7, %g4, %g5
20505 bne test_failed
20506 nop
20507****/
20508
20509REG_TEST_226:
20510 ! First check that the POR value is correct
20511 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_ADDR, %g1, %g2
20512 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_POR_VALUE, %g1, %g3)
20513 ldx [%g2], %g4
20514 xorcc %g3, %g4, %g5
20515 !bne test_failed
20516 nop
20517
20518 ! Next check that all the writable bits can be written
20519 xor %g3, %l1, %l2
20520 stx %l2, [%g2] ! store inverted POR value
20521
20522#define REG_226_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_WRITE_MASK) )
20523
20524 best_set_reg(REG_226_EXP_VALUE, %g1, %g7) ! get expected value
20525 ldx [%g2], %g4
20526 xorcc %g7, %g4, %g5
20527 !bne test_failed
20528 nop
20529
20530
20531 ! First check that the POR value is correct
20532 add %g2, 8, %g2
20533 ldx [%g2], %g4
20534 xorcc %g3, %g4, %g5
20535 !bne test_failed
20536 nop
20537
20538 ! Next check that all the writable bits can be written
20539 stx %l2, [%g2] ! store inverted POR value
20540 ldx [%g2], %g4
20541 xorcc %g7, %g4, %g5
20542 !bne test_failed
20543 nop
20544
20545
20546 ! First check that the POR value is correct
20547 add %g2, 8, %g2
20548 ldx [%g2], %g4
20549 xorcc %g3, %g4, %g5
20550 !bne test_failed
20551 nop
20552
20553 ! Next check that all the writable bits can be written
20554 stx %l2, [%g2] ! store inverted POR value
20555 ldx [%g2], %g4
20556 xorcc %g7, %g4, %g5
20557 !bne test_failed
20558 nop
20559
20560
20561 ! First check that the POR value is correct
20562 add %g2, 8, %g2
20563 ldx [%g2], %g4
20564 xorcc %g3, %g4, %g5
20565 !bne test_failed
20566 nop
20567
20568 ! Next check that all the writable bits can be written
20569 stx %l2, [%g2] ! store inverted POR value
20570 ldx [%g2], %g4
20571 xorcc %g7, %g4, %g5
20572 !bne test_failed
20573 nop
20574
20575
20576 ! First check that the POR value is correct
20577 add %g2, 8, %g2
20578 ldx [%g2], %g4
20579 xorcc %g3, %g4, %g5
20580 !bne test_failed
20581 nop
20582
20583 ! Next check that all the writable bits can be written
20584 stx %l2, [%g2] ! store inverted POR value
20585 ldx [%g2], %g4
20586 xorcc %g7, %g4, %g5
20587 !bne test_failed
20588 nop
20589
20590
20591 ! First check that the POR value is correct
20592 add %g2, 8, %g2
20593 ldx [%g2], %g4
20594 xorcc %g3, %g4, %g5
20595 !bne test_failed
20596 nop
20597
20598 ! Next check that all the writable bits can be written
20599 stx %l2, [%g2] ! store inverted POR value
20600 ldx [%g2], %g4
20601 xorcc %g7, %g4, %g5
20602 !bne test_failed
20603 nop
20604
20605
20606 ! First check that the POR value is correct
20607 add %g2, 8, %g2
20608 ldx [%g2], %g4
20609 xorcc %g3, %g4, %g5
20610 !bne test_failed
20611 nop
20612
20613 ! Next check that all the writable bits can be written
20614 stx %l2, [%g2] ! store inverted POR value
20615 ldx [%g2], %g4
20616 xorcc %g7, %g4, %g5
20617 !bne test_failed
20618 nop
20619
20620
20621 ! First check that the POR value is correct
20622 add %g2, 8, %g2
20623 ldx [%g2], %g4
20624 xorcc %g3, %g4, %g5
20625 !bne test_failed
20626 nop
20627
20628 ! Next check that all the writable bits can be written
20629 stx %l2, [%g2] ! store inverted POR value
20630 ldx [%g2], %g4
20631 xorcc %g7, %g4, %g5
20632 !bne test_failed
20633 nop
20634
20635
20636REG_TEST_227:
20637 ! First check that the POR value is correct
20638 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_ADDR, %g1, %g2
20639 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_POR_VALUE, %g1, %g3)
20640 ldx [%g2], %g4
20641 xorcc %g3, %g4, %g5
20642 bne test_failed
20643 nop
20644
20645/**** ! Next check that all the writable bits can be written
20646 xor %g3, %l1, %l2
20647 stx %l2, [%g2] ! store inverted POR value
20648
20649#define REG_227_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_WRITE_MASK) )
20650
20651 best_set_reg(REG_227_EXP_VALUE, %g1, %g7) ! get expected value
20652 ldx [%g2], %g4
20653 xorcc %g7, %g4, %g5
20654 bne test_failed
20655 nop
20656****/
20657
20658 ! First check that the POR value is correct
20659 add %g2, 8, %g2
20660 ldx [%g2], %g4
20661 xorcc %g3, %g4, %g5
20662 bne test_failed
20663 nop
20664
20665/**** ! Next check that all the writable bits can be written
20666 stx %l2, [%g2] ! store inverted POR value
20667 ldx [%g2], %g4
20668 xorcc %g7, %g4, %g5
20669 bne test_failed
20670 nop
20671****/
20672
20673 ! First check that the POR value is correct
20674 add %g2, 8, %g2
20675 ldx [%g2], %g4
20676 xorcc %g3, %g4, %g5
20677 bne test_failed
20678 nop
20679
20680/**** ! Next check that all the writable bits can be written
20681 stx %l2, [%g2] ! store inverted POR value
20682 ldx [%g2], %g4
20683 xorcc %g7, %g4, %g5
20684 bne test_failed
20685 nop
20686****/
20687
20688 ! First check that the POR value is correct
20689 add %g2, 8, %g2
20690 ldx [%g2], %g4
20691 xorcc %g3, %g4, %g5
20692 bne test_failed
20693 nop
20694
20695/**** ! Next check that all the writable bits can be written
20696 stx %l2, [%g2] ! store inverted POR value
20697 ldx [%g2], %g4
20698 xorcc %g7, %g4, %g5
20699 bne test_failed
20700 nop
20701****/
20702
20703 ! First check that the POR value is correct
20704 add %g2, 8, %g2
20705 ldx [%g2], %g4
20706 xorcc %g3, %g4, %g5
20707 bne test_failed
20708 nop
20709
20710/**** ! Next check that all the writable bits can be written
20711 stx %l2, [%g2] ! store inverted POR value
20712 ldx [%g2], %g4
20713 xorcc %g7, %g4, %g5
20714 bne test_failed
20715 nop
20716****/
20717
20718 ! First check that the POR value is correct
20719 add %g2, 8, %g2
20720 ldx [%g2], %g4
20721 xorcc %g3, %g4, %g5
20722 bne test_failed
20723 nop
20724
20725/**** ! Next check that all the writable bits can be written
20726 stx %l2, [%g2] ! store inverted POR value
20727 ldx [%g2], %g4
20728 xorcc %g7, %g4, %g5
20729 bne test_failed
20730 nop
20731****/
20732
20733 ! First check that the POR value is correct
20734 add %g2, 8, %g2
20735 ldx [%g2], %g4
20736 xorcc %g3, %g4, %g5
20737 bne test_failed
20738 nop
20739
20740/**** ! Next check that all the writable bits can be written
20741 stx %l2, [%g2] ! store inverted POR value
20742 ldx [%g2], %g4
20743 xorcc %g7, %g4, %g5
20744 bne test_failed
20745 nop
20746****/
20747
20748 ! First check that the POR value is correct
20749 add %g2, 8, %g2
20750 ldx [%g2], %g4
20751 xorcc %g3, %g4, %g5
20752 bne test_failed
20753 nop
20754
20755/**** ! Next check that all the writable bits can be written
20756 stx %l2, [%g2] ! store inverted POR value
20757 ldx [%g2], %g4
20758 xorcc %g7, %g4, %g5
20759 bne test_failed
20760 nop
20761****/
20762
20763REG_TEST_228:
20764 ! First check that the POR value is correct
20765 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_ADDR, %g1, %g2
20766 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_POR_VALUE, %g1, %g3)
20767 ldx [%g2], %g4
20768 xorcc %g3, %g4, %g5
20769 bne test_failed
20770 nop
20771
20772 ! Next check that all the writable bits can be written
20773 xor %g3, %l1, %l2
20774 stx %l2, [%g2] ! store inverted POR value
20775
20776#define REG_228_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_WRITE_MASK) )
20777
20778 best_set_reg(REG_228_EXP_VALUE, %g1, %g7) ! get expected value
20779 ldx [%g2], %g4
20780 xorcc %g7, %g4, %g5
20781 bne test_failed
20782 nop
20783
20784
20785 ! First check that the POR value is correct
20786 add %g2, 8, %g2
20787 ldx [%g2], %g4
20788 xorcc %g3, %g4, %g5
20789 bne test_failed
20790 nop
20791
20792 ! Next check that all the writable bits can be written
20793 stx %l2, [%g2] ! store inverted POR value
20794 ldx [%g2], %g4
20795 xorcc %g7, %g4, %g5
20796 bne test_failed
20797 nop
20798
20799
20800 ! First check that the POR value is correct
20801 add %g2, 8, %g2
20802 ldx [%g2], %g4
20803 xorcc %g3, %g4, %g5
20804 bne test_failed
20805 nop
20806
20807 ! Next check that all the writable bits can be written
20808 stx %l2, [%g2] ! store inverted POR value
20809 ldx [%g2], %g4
20810 xorcc %g7, %g4, %g5
20811 bne test_failed
20812 nop
20813
20814
20815 ! First check that the POR value is correct
20816 add %g2, 8, %g2
20817 ldx [%g2], %g4
20818 xorcc %g3, %g4, %g5
20819 bne test_failed
20820 nop
20821
20822 ! Next check that all the writable bits can be written
20823 stx %l2, [%g2] ! store inverted POR value
20824 ldx [%g2], %g4
20825 xorcc %g7, %g4, %g5
20826 bne test_failed
20827 nop
20828
20829
20830 ! First check that the POR value is correct
20831 add %g2, 8, %g2
20832 ldx [%g2], %g4
20833 xorcc %g3, %g4, %g5
20834 bne test_failed
20835 nop
20836
20837 ! Next check that all the writable bits can be written
20838 stx %l2, [%g2] ! store inverted POR value
20839 ldx [%g2], %g4
20840 xorcc %g7, %g4, %g5
20841 bne test_failed
20842 nop
20843
20844
20845 ! First check that the POR value is correct
20846 add %g2, 8, %g2
20847 ldx [%g2], %g4
20848 xorcc %g3, %g4, %g5
20849 bne test_failed
20850 nop
20851
20852 ! Next check that all the writable bits can be written
20853 stx %l2, [%g2] ! store inverted POR value
20854 ldx [%g2], %g4
20855 xorcc %g7, %g4, %g5
20856 bne test_failed
20857 nop
20858
20859
20860 ! First check that the POR value is correct
20861 add %g2, 8, %g2
20862 ldx [%g2], %g4
20863 xorcc %g3, %g4, %g5
20864 bne test_failed
20865 nop
20866
20867 ! Next check that all the writable bits can be written
20868 stx %l2, [%g2] ! store inverted POR value
20869 ldx [%g2], %g4
20870 xorcc %g7, %g4, %g5
20871 bne test_failed
20872 nop
20873
20874
20875 ! First check that the POR value is correct
20876 add %g2, 8, %g2
20877 ldx [%g2], %g4
20878 xorcc %g3, %g4, %g5
20879 bne test_failed
20880 nop
20881
20882 ! Next check that all the writable bits can be written
20883 stx %l2, [%g2] ! store inverted POR value
20884 ldx [%g2], %g4
20885 xorcc %g7, %g4, %g5
20886 bne test_failed
20887 nop
20888
20889
20890REG_TEST_229:
20891 ! First check that the POR value is correct
20892 setx FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_ADDR, %g1, %g2
20893 best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_POR_VALUE, %g1, %g3)
20894 ldx [%g2], %g4
20895 xorcc %g3, %g4, %g5
20896 bne test_failed
20897 nop
20898
20899/****************** don't modify this reg
20900 ! Next check that all the writable bits can be written
20901 xor %g3, %l1, %l2
20902 stx %l2, [%g2] ! store inverted POR value
20903
20904#define REG_229_EXP_VALUE mpeval( (~FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_POR_VALUE & FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_WRITE_MASK) | (FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_POR_VALUE & ~FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_WRITE_MASK) )
20905
20906 best_set_reg(REG_229_EXP_VALUE, %g1, %g7) ! get expected value
20907 ldx [%g2], %g4
20908 xorcc %g7, %g4, %g5
20909 bne test_failed
20910 nop
20911***********************************/
20912
20913 ! First check that the POR value is correct
20914 add %g2, 8, %g2
20915 ldx [%g2], %g4
20916 xorcc %g3, %g4, %g5
20917 bne test_failed
20918 nop
20919
20920/****************** don't modify this reg
20921 ! Next check that all the writable bits can be written
20922 stx %l2, [%g2] ! store inverted POR value
20923 ldx [%g2], %g4
20924 xorcc %g7, %g4, %g5
20925 bne test_failed
20926 nop
20927*******************************************/
20928
20929
20930
20931test_passed:
20932 EXIT_GOOD
20933
20934 .align 64 ! start a new line
20935test_failed:
20936 EXIT_BAD
20937
20938
Full OpenSPARC design & verification tarball including full HDL.