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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / diag / assembly / uarch / tlu / diag / tlu_rand01_ind_04.s
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86530b38
AT		 1/*
2* ========== Copyright Header Begin ==========================================
3*
4* OpenSPARC T2 Processor File: tlu_rand01_ind_04.s
5* Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
6* 4150 Network Circle, Santa Clara, California 95054, U.S.A.
7*
8* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
9*
10* This program is free software; you can redistribute it and/or modify
11* it under the terms of the GNU General Public License as published by
12* the Free Software Foundation; version 2 of the License.
13*
14* This program is distributed in the hope that it will be useful,
15* but WITHOUT ANY WARRANTY; without even the implied warranty of
16* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17* GNU General Public License for more details.
18*
19* You should have received a copy of the GNU General Public License
20* along with this program; if not, write to the Free Software
21* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*
23* For the avoidance of doubt, and except that if any non-GPL license
24* choice is available it will apply instead, Sun elects to use only
25* the General Public License version 2 (GPLv2) at this time for any
26* software where a choice of GPL license versions is made
27* available with the language indicating that GPLv2 or any later version
28* may be used, or where a choice of which version of the GPL is applied is
29* otherwise unspecified.
30*
31* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
32* CA 95054 USA or visit www.sun.com if you need additional information or
33* have any questions.
34*
35*
36* ========== Copyright Header End ============================================
37*/
38#define TRAP_SECT_HV_ALSO
39#define DMMU_SKIP_IF_NO_TTE
40#define IMMU_SKIP_IF_NO_TTE
41
42#define MAIN_PAGE_NUCLEUS_ALSO
43#define MAIN_PAGE_HV_ALSO
44
45#define H_T1_Trap_Instruction_0
46#define My_T1_Trap_Instruction_0 \
47 ba 1f; \
48 save; \
49 2: done; \
50 nop; \
51 1: ba 2b; \
52 restore; \
53 nop; nop
54#define H_T1_Trap_Instruction_1
55#define My_T1_Trap_Instruction_1 \
56 rdpr %tnpc, %g2; \
57 wrpr %g2, %tpc; \
58 add %g2, 4, %g2;\
59 wrpr %g2, %tnpc; \
60 illtrap;\
61 retry ;\
62 nop; nop;
63#define H_T1_Trap_Instruction_2
64#define My_T1_Trap_Instruction_2 \
65 ba 1f; \
66 save; \
67 2: done; \
68 nop; \
69 1: ba 2b; \
70 restore; \
71 nop; nop
72#define H_T1_Trap_Instruction_3
73#define My_T1_Trap_Instruction_3 \
74 save ;\
75 restore ;\
76 done ;\
77 nop; nop; nop; nop; nop
78#define H_T1_Trap_Instruction_4
79#define My_T1_Trap_Instruction_4 \
80 rdpr %tnpc, %g2; \
81 wrpr %g2, %tpc; \
82 add %g2, 4, %g2;\
83 wrpr %g2, %tnpc; \
84 retry ;\
85 illtrap; \
86 nop; nop
87#define H_T1_Trap_Instruction_5
88#define My_T1_Trap_Instruction_5 \
89 rdpr %tnpc, %g2; \
90 wrpr %g2, %tpc; \
91 add %g2, 4, %g2;\
92 wrpr %g2, %tnpc; \
93 sdiv %r2, %r10, %r0; \
94 retry ;\
95 nop; nop
96
97#define H_HT0_Trap_Instruction_0
98#define My_HT0_Trap_Instruction_0 \
99 save; \
100 restore; \
101 done ;\
102 nop; nop; nop; nop; nop
103#define H_HT0_Trap_Instruction_1
104#define My_HT0_Trap_Instruction_1 \
105 ba 1f; \
106 save; \
107 2: done; \
108 nop; \
109 1: ba 2b; \
110 restore; nop; nop
111#define H_HT0_Trap_Instruction_2
112#define My_HT0_Trap_Instruction_2 \
113 rdpr %tnpc, %g2; \
114 wrpr %g2, %tpc; \
115 add %g2, 4, %g2;\
116 wrpr %g2, %tnpc; \
117 sdiv %r2, %r0, %r0; \
118 retry ;\
119 nop; nop
120#define H_HT0_Trap_Instruction_3
121#define My_HT0_Trap_Instruction_3 \
122 rdpr %tnpc, %g2; \
123 illtrap ;\
124 wrpr %g2, %tpc; \
125 add %g2, 4, %g2;\
126 wrpr %g2, %tnpc; \
127 retry ;\
128 nop; nop
129#define H_HT0_Trap_Instruction_4
130#define My_HT0_Trap_Instruction_4 \
131 rdpr %tnpc, %g2; \
132 save; \
133 wrpr %g2, %tpc; \
134 add %g2, 4, %g2;\
135 wrpr %g2, %tnpc; \
136 restore; \
137 illtrap;\
138 retry
139#define H_HT0_Trap_Instruction_5
140#define My_HT0_Trap_Instruction_5 \
141 rd %pc, %g2; \
142 add %g2, 28, %g2;\
143 rdpr %tl, %g3;\
144 inc %g3;\
145 wrpr %g3, %tl; \
146 wrpr %g2, %tpc;\
147 retry; done
148#define H_HT0_Mem_Address_Not_Aligned_0x34
149#define My_HT0_Mem_Address_Not_Aligned_0x34 \
150 save ;\
151 restore ;\
152 done ;\
153 nop; nop; nop; nop; nop
154#define H_HT0_Illegal_instruction_0x10
155#define My_HT0_Illegal_instruction_0x10 \
156 ba 1f; \
157 save; \
158 2: done; \
159 nop; \
160 1: ba 2b; \
161 restore; \
162 nop; nop
163#define H_HT0_DAE_so_page_0x30
164#define My_HT0_DAE_so_page_0x30 \
165 save; \
166 restore;\
167 rd %fprs, %g2; \
168 wr %g2, 0x4, %fprs ;\
169 done; \
170 nop; nop; nop;
171#define H_HT0_DAE_invalid_asi_0x14
172#define SUN_H_HT0_DAE_invalid_asi_0x14 \
173 save; \
174 restore;\
175 rd %fprs, %g2; \
176 wr %g2, 0x4, %fprs ;\
177 done; \
178 nop; nop; nop;
179#define H_HT0_DAE_privilege_violation_0x15
180#define SUN_H_HT0_DAE_privilege_violation_0x15 \
181 save; \
182 restore;\
183 rd %fprs, %g2; \
184 wr %g2, 0x4, %fprs ;\
185 done; \
186 nop; nop; nop;
187#define H_HT0_Privileged_Action_0x37
188#define My_HT0_Privileged_Action_0x37 \
189 save; \
190 restore;\
191 done; \
192 nop; nop; nop; nop; nop
193#define H_HT0_Lddf_Mem_Address_Not_Aligned_0x35
194#define My_HT0_Lddf_Mem_Address_Not_Aligned_0x35 \
195 rdpr %tpc, %g2; \
196 add %g2, 0x4, %g2; \
197 wrpr %g2, %tpc; \
198 add %g2, 0x4, %g2; \
199 wrpr %g2, %tnpc; \
200 retry ;\
201 nop; nop
202#define H_HT0_Fp_exception_other_0x22
203#define My_HT0_Fp_exception_other_0x22 \
204 save; \
205 restore;\
206 done; \
207 nop; nop; nop; nop; nop
208#define H_HT0_Division_By_Zero
209#define My_HT0_Division_By_Zero \
210 save; \
211 restore;\
212 done; \
213 nop; nop; nop; nop; nop
214#define H_T1_Division_By_Zero_0x28
215#define My_H_T1_Division_By_Zero_0x28 \
216 save; \
217 restore;\
218 done; \
219 nop; nop; nop; nop; nop
220#define H_T1_Fp_Exception_Other_0x22
221#define My_H_T1_Fp_Exception_Other_0x22 \
222 save; \
223 restore;\
224 done; \
225 nop; nop; nop; nop; nop
226#define H_T1_Privileged_Opcode_0x11
227#define SUN_H_T1_Privileged_Opcode_0x11 \
228 save; \
229 restore;\
230 done; \
231 nop; nop; nop; nop; nop
232
233#define H_T1_Fp_Disabled_0x20
234#define My_H_T1_Fp_Disabled_0x20 \
235 rd %fprs, %g2; \
236 wr %g2, 0x4, %fprs ;\
237 retry;\
238 nop; nop; nop; nop; nop
239
240
241#define H_HT0_Instruction_address_range_0x0d
242#define SUN_H_HT0_Instruction_address_range_0x0d \
243 done;nop
244
245#define H_HT0_mem_real_range_0x2d
246#define SUN_H_HT0_mem_real_range_0x2d \
247 done;nop
248
249#define H_HT0_mem_address_range_0x2e
250#define SUN_H_HT0_mem_address_range_0x2e \
251 done;nop
252
253
254#include "hboot.s"
255.text
256.global main
257main:
258
259 !Start with TL 1
260 ta T_CHANGE_TO_TL1
261
262 ! Set up ld/st area per thread
263 ta T_RD_THID
264 mov %o1, %l6
265 umul %l6, 256, %l7
266 setx user_data_start, %g1, %g3
267 add %l7, %g3, %l7
268
269! Register init code
270
271 setx 0xd6fe33dd7edfd459, %g1, %g0
272 setx 0xa18628ae745539eb, %g1, %g1
273 setx 0x2c9968e98cdc6c22, %g1, %g2
274 setx 0x53e384e91893f2f7, %g1, %g3
275 setx 0xdaf214c3693e8326, %g1, %g4
276 setx 0xafe22c3381b3748d, %g1, %g5
277 setx 0x42bf9a8111aa8e37, %g1, %g6
278 setx 0xbf7458b64a209357, %g1, %g7
279 setx 0x0fe7d96629acd853, %g1, %r16
280 setx 0x74affce812c7b3d3, %g1, %r17
281 setx 0x42e1e2c11f6495fb, %g1, %r18
282 setx 0x2df86a2b843e039e, %g1, %r19
283 setx 0x34626a76887e6105, %g1, %r20
284 setx 0xc101161c2d235086, %g1, %r21
285 setx 0x41b65e3f5b73c266, %g1, %r22
286 setx 0xf5fb1f30ec60daa5, %g1, %r23
287 setx 0xc18cdd7753825239, %g1, %r24
288 setx 0xb15811da06cabf0b, %g1, %r25
289 setx 0xa1371bd005b0c2bb, %g1, %r26
290 setx 0x0d2516eb1c023ca5, %g1, %r27
291 setx 0xfb98dfedaedab534, %g1, %r28
292 setx 0x2c6033f9901ca97d, %g1, %r29
293 setx 0x87284011883bd71c, %g1, %r30
294 setx 0x87a4e9ccf06030e7, %g1, %r31
295 save
296 setx 0xe14d9e0c62dfde4b, %g1, %r16
297 setx 0xe2cece062fc69525, %g1, %r17
298 setx 0x98b780ae759ba66e, %g1, %r18
299 setx 0x17a737b4c3c40c03, %g1, %r19
300 setx 0xbecaafac065559a3, %g1, %r20
301 setx 0xfaf5b5f482e0a83b, %g1, %r21
302 setx 0xc80aaae8e94ac55e, %g1, %r22
303 setx 0x00cd3e9b3ba05d5d, %g1, %r23
304 setx 0xab34b23cf10f8ecc, %g1, %r24
305 setx 0x332848b39e47b5b1, %g1, %r25
306 setx 0xc2b563bf09a354a0, %g1, %r26
307 setx 0xb18322b8fcafb945, %g1, %r27
308 setx 0x6b9ffcf89b09c5d5, %g1, %r28
309 setx 0x66ce20023a6ca1ee, %g1, %r29
310 setx 0x37f948a694c46ef8, %g1, %r30
311 setx 0x8ac9fcca4c738f28, %g1, %r31
312 save
313 setx 0x27bcedaa0d08f2c5, %g1, %r16
314 setx 0xe6375e969382f89f, %g1, %r17
315 setx 0xd2e19e1b5c3098d3, %g1, %r18
316 setx 0xeb06c196cf7cc2b6, %g1, %r19
317 setx 0xc3225004113850e7, %g1, %r20
318 setx 0x9d7dd08727552a26, %g1, %r21
319 setx 0x1e8d75aa7cdf2373, %g1, %r22
320 setx 0x0e945324d7b1f617, %g1, %r23
321 setx 0x7ecfcf8278028170, %g1, %r24
322 setx 0x5120890fa7b5d0a9, %g1, %r25
323 setx 0x3fd14ac961f5599c, %g1, %r26
324 setx 0x9643178003c8787e, %g1, %r27
325 setx 0x8134bc30c10cb878, %g1, %r28
326 setx 0x47b5a05869de9eb5, %g1, %r29
327 setx 0x1041444f6aee1488, %g1, %r30
328 setx 0xe3d4e3efaa9b7ca0, %g1, %r31
329 restore
330 restore
331 .word 0xc2c7e030 ! 3: LDSWA_I ldswa [%r31, + 0x0030] %asi, %r1
332 .word 0x97d02031 ! 4: Tcc_I tge icc_or_xcc, %r0 + 49
333 .word 0x81d02035 ! 5: Tcc_I tn icc_or_xcc, %r0 + 53
334 .word 0x87802010 ! 8: WRASI_I wr %r0, 0x0010, %asi
335 .word 0x9bd02032 ! 23: Tcc_I tcc icc_or_xcc, %r0 + 50
336 .word 0x8d802000 ! 30: WRFPRS_I wr %r0, 0x0000, %fprs
337 .word 0x986a6001 ! 33: UDIVX_I udivx %r9, 0x0001, %r12
338 .word 0xd84fe001 ! 36: LDSB_I ldsb [%r31 + 0x0001], %r12
339 .word 0x9ac02001 ! 41: ADDCcc_I addccc %r0, 0x0001, %r13
340 .word 0x22800001 ! 46: BE be,a <label_0x1>
341 .word 0xda17c000 ! 51: LDUH_R lduh [%r31 + %r0], %r13
342 .word 0xda0fe001 ! 56: LDUB_I ldub [%r31 + 0x0001], %r13
343 ta T_CHANGE_HPRIV ! macro
344 .word 0x95d02031 ! 62: Tcc_I tg icc_or_xcc, %r0 + 49
345 .word 0x26700001 ! 65: BPL <illegal instruction>
346 .word 0x87802014 ! 66: WRASI_I wr %r0, 0x0014, %asi
347 .word 0x87802014 ! 67: WRASI_I wr %r0, 0x0014, %asi
348 .word 0x93d02032 ! 72: Tcc_I tne icc_or_xcc, %r0 + 50
349 .word 0x24800001 ! 73: BLE ble,a <label_0x1>
350 mov 0x32, %r30
351 .word 0x87d0001e ! 74: Tcc_R tl icc_or_xcc, %r0 + %r30
352 .word 0x88c26001 ! 75: ADDCcc_I addccc %r9, 0x0001, %r4
353 .word 0x8b500000 ! 76: RDPR_TPC rdpr %tpc, %r5
354 .word 0xca57e001 ! 81: LDSH_I ldsh [%r31 + 0x0001], %r5
355 .word 0x8bd02032 ! 84: Tcc_I tcs icc_or_xcc, %r0 + 50
356 ta T_CHANGE_NONHPRIV ! macro
357 .word 0x8768e001 ! 86: SDIVX_I sdivx %r3, 0x0001, %r3
358 .word 0x2e700001 ! 87: BPVS <illegal instruction>
359 .word 0xc647c000 ! 88: LDSW_R ldsw [%r31 + %r0], %r3
360 .word 0x32800001 ! 95: BNE bne,a <label_0x1>
361 .word 0x9882400a ! 96: ADDcc_R addcc %r9, %r10, %r12
362 .word 0x2c800001 ! 97: BNEG bneg,a <label_0x1>
363 .word 0x3c700001 ! 100: BPPOS <illegal instruction>
364 .word 0xd84fe001 ! 101: LDSB_I ldsb [%r31 + 0x0001], %r12
365 .word 0xd817c000 ! 102: LDUH_R lduh [%r31 + %r0], %r12
366 .word 0x87802016 ! 105: WRASI_I wr %r0, 0x0016, %asi
367 mov 0x34, %r30
368 .word 0x97d0001e ! 108: Tcc_R tge icc_or_xcc, %r0 + %r30
369 .word 0x87802045 ! 109: WRASI_I wr %r0, 0x0045, %asi
370 .word 0xd847e001 ! 114: LDSW_I ldsw [%r31 + 0x0001], %r12
371 .word 0x2c800001 ! 119: BNEG bneg,a <label_0x1>
372 .word 0x2e700001 ! 126: BPVS <illegal instruction>
373 .word 0xd897e020 ! 129: LDUHA_I lduha [%r31, + 0x0020] %asi, %r12
374 .word 0xd89004a0 ! 130: LDUHA_R lduha [%r0, %r0] 0x25, %r12
375 .word 0xd897e030 ! 131: LDUHA_I lduha [%r31, + 0x0030] %asi, %r12
376 .word 0x8cd3a001 ! 136: UMULcc_I umulcc %r14, 0x0001, %r6
377 mov 0x32, %r30
378 .word 0x87d0001e ! 139: Tcc_R tl icc_or_xcc, %r0 + %r30
379 .word 0xccc7e000 ! 142: LDSWA_I ldswa [%r31, + 0x0000] %asi, %r6
380 mov 0x34, %r30
381 .word 0x93d0001e ! 143: Tcc_R tne icc_or_xcc, %r0 + %r30
382 .word 0x8cda800c ! 146: SMULcc_R smulcc %r10, %r12, %r6
383 .word 0x8d802000 ! 157: WRFPRS_I wr %r0, 0x0000, %fprs
384 mov 0x33, %r30
385 .word 0x87d0001e ! 162: Tcc_R tl icc_or_xcc, %r0 + %r30
386 .word 0x8068c00b ! 165: UDIVX_R udivx %r3, %r11, %r0
387 .word 0xc087e000 ! 174: LDUWA_I lduwa [%r31, + 0x0000] %asi, %r0
388 .word 0xc0dfe010 ! 177: LDXA_I ldxa [%r31, + 0x0010] %asi, %r0
389 .word 0x9c036001 ! 180: ADD_I add %r13, 0x0001, %r14
390 .word 0x87802004 ! 183: WRASI_I wr %r0, 0x0004, %asi
391 mov 0x31, %r30
392 .word 0x9fd0001e ! 186: Tcc_R tvc icc_or_xcc, %r0 + %r30
393 .word 0x28800001 ! 187: BLEU bleu,a <label_0x1>
394 ta T_CHANGE_NONPRIV ! macro
395 .word 0x80832001 ! 189: ADDcc_I addcc %r12, 0x0001, %r0
396 .word 0x87d02033 ! 190: Tcc_I tl icc_or_xcc, %r0 + 51
397 .word 0x87802014 ! 193: WRASI_I wr %r0, 0x0014, %asi
398 .word 0x9d504000 ! 194: RDPR_TNPC rdpr %tnpc, %r14
399 .word 0xdc8fe010 ! 197: LDUBA_I lduba [%r31, + 0x0010] %asi, %r14
400 .word 0xdc5fc000 ! 204: LDX_R ldx [%r31 + %r0], %r14
401 .word 0xdcd7e010 ! 205: LDSHA_I ldsha [%r31, + 0x0010] %asi, %r14
402 .word 0x8d802004 ! 208: WRFPRS_I wr %r0, 0x0004, %fprs
403 .word 0x8d802000 ! 209: WRFPRS_I wr %r0, 0x0000, %fprs
404 mov 0x35, %r30
405 .word 0x87d0001e ! 226: Tcc_R tl icc_or_xcc, %r0 + %r30
406 .word 0xdc0fc000 ! 227: LDUB_R ldub [%r31 + %r0], %r14
407 .word 0xdcd7e030 ! 230: LDSHA_I ldsha [%r31, + 0x0030] %asi, %r14
408 .word 0xd0fb0027 ! 231: SWAPA_R swapa %r8, [%r12 + %r7] 0x01
409 mov 0x30, %r30
410 .word 0x9dd0001e ! 232: Tcc_R tpos icc_or_xcc, %r0 + %r30
411 .word 0x87a309c3 ! 237: FDIVd fdivd %f12, %f34, %f34
412 .word 0xc617c000 ! 240: LDUH_R lduh [%r31 + %r0], %r3
413 mov 0x34, %r30
414 .word 0x93d0001e ! 253: Tcc_R tne icc_or_xcc, %r0 + %r30
415 .word 0x8fd02030 ! 254: Tcc_I tvs icc_or_xcc, %r0 + 48
416 .word 0x9ed2e001 ! 255: UMULcc_I umulcc %r11, 0x0001, %r15
417 .word 0x9569a001 ! 256: SDIVX_I sdivx %r6, 0x0001, %r10
418 .word 0xd487e010 ! 259: LDUWA_I lduwa [%r31, + 0x0010] %asi, %r10
419 mov 0x35, %r30
420 .word 0x8bd0001e ! 262: Tcc_R tcs icc_or_xcc, %r0 + %r30
421 .word 0xd497e030 ! 263: LDUHA_I lduha [%r31, + 0x0030] %asi, %r10
422 .word 0x91500000 ! 266: RDPR_TPC rdpr %tpc, %r8
423 .word 0xd017c000 ! 275: LDUH_R lduh [%r31 + %r0], %r8
424 .word 0x93d02035 ! 282: Tcc_I tne icc_or_xcc, %r0 + 53
425 .word 0x87802016 ! 283: WRASI_I wr %r0, 0x0016, %asi
426 .word 0xd00fc000 ! 286: LDUB_R ldub [%r31 + %r0], %r8
427 .word 0xd0dfe020 ! 289: LDXA_I ldxa [%r31, + 0x0020] %asi, %r8
428 .word 0x8fa049ab ! 292: FDIVs fdivs %f1, %f11, %f7
429 .word 0x98dbc003 ! 293: SMULcc_R smulcc %r15, %r3, %r12
430 mov 0x32, %r30
431 .word 0x99d0001e ! 302: Tcc_R tgu icc_or_xcc, %r0 + %r30
432 .word 0xd887e030 ! 305: LDUWA_I lduwa [%r31, + 0x0030] %asi, %r12
433 mov 0x34, %r30
434 .word 0x83d0001e ! 306: Tcc_R te icc_or_xcc, %r0 + %r30
435 .word 0x89a089c7 ! 307: FDIVd fdivd %f2, %f38, %f4
436 ta T_CHANGE_NONPRIV ! macro
437 .word 0xc847c000 ! 311: LDSW_R ldsw [%r31 + %r0], %r4
438 .word 0x8d802004 ! 320: WRFPRS_I wr %r0, 0x0004, %fprs
439 .word 0x32800001 ! 323: BNE bne,a <label_0x1>
440 .word 0x2e700001 ! 324: BPVS <illegal instruction>
441 .word 0x87802054 ! 327: WRASI_I wr %r0, 0x0054, %asi
442 .word 0x38700001 ! 330: BPGU <illegal instruction>
443 .word 0xc80fc000 ! 337: LDUB_R ldub [%r31 + %r0], %r4
444 .word 0xc857c000 ! 340: LDSH_R ldsh [%r31 + %r0], %r4
445 .word 0xc897e010 ! 341: LDUHA_I lduha [%r31, + 0x0010] %asi, %r4
446 mov 0x32, %r30
447 .word 0x89d0001e ! 352: Tcc_R tleu icc_or_xcc, %r0 + %r30
448 mov 0x30, %r30
449 .word 0x89d0001e ! 355: Tcc_R tleu icc_or_xcc, %r0 + %r30
450 .word 0x24800001 ! 356: BLE ble,a <label_0x1>
451 mov 0x34, %r30
452 .word 0x8bd0001e ! 359: Tcc_R tcs icc_or_xcc, %r0 + %r30
453 .word 0x34800001 ! 360: BG bg,a <label_0x1>
454 .word 0xc1e24024 ! 361: CASA_I casa [%r9] 0x 1, %r4, %r0
455 .word 0x30700001 ! 364: BPA <illegal instruction>
456 .word 0x3e700001 ! 365: BPVC <illegal instruction>
457 .word 0xc08804a0 ! 366: LDUBA_R lduba [%r0, %r0] 0x25, %r0
458 .word 0x9f480000 ! 371: RDHPR_HPSTATE rdhpr %hpstate, %r15
459 .word 0x9750c000 ! 372: RDPR_TT rdpr %tt, %r11
460 .word 0xd6c804a0 ! 377: LDSBA_R ldsba [%r0, %r0] 0x25, %r11
461 .word 0xd6cfe000 ! 378: LDSBA_I ldsba [%r31, + 0x0000] %asi, %r11
462 .word 0x9e7a8004 ! 383: SDIV_R sdiv %r10, %r4, %r15
463 .word 0xde57e001 ! 388: LDSH_I ldsh [%r31 + 0x0001], %r15
464 .word 0xdec7e010 ! 389: LDSWA_I ldswa [%r31, + 0x0010] %asi, %r15
465 .word 0x22800001 ! 396: BE be,a <label_0x1>
466 .word 0x38700001 ! 397: BPGU <illegal instruction>
467 .word 0x88d24003 ! 402: UMULcc_R umulcc %r9, %r3, %r4
468 mov 0x34, %r30
469 .word 0x9bd0001e ! 413: Tcc_R tcc icc_or_xcc, %r0 + %r30
470 .word 0xc847c000 ! 416: LDSW_R ldsw [%r31 + %r0], %r4
471 .word 0x976be001 ! 425: SDIVX_I sdivx %r15, 0x0001, %r11
472 mov 0x32, %r30
473 .word 0x95d0001e ! 426: Tcc_R tg icc_or_xcc, %r0 + %r30
474 .word 0xd65fc000 ! 427: LDX_R ldx [%r31 + %r0], %r11
475 .word 0xd60fc000 ! 428: LDUB_R ldub [%r31 + %r0], %r11
476 .word 0x83d02030 ! 429: Tcc_I te icc_or_xcc, %r0 + 48
477 .word 0xd6900e60 ! 436: LDUHA_R lduha [%r0, %r0] 0x73, %r11
478 ta T_CHANGE_PRIV ! macro
479 .word 0x87d02033 ! 442: Tcc_I tl icc_or_xcc, %r0 + 51
480 .word 0x87802014 ! 443: WRASI_I wr %r0, 0x0014, %asi
481 .word 0x83698006 ! 444: SDIVX_R sdivx %r6, %r6, %r1
482 .word 0x80812001 ! 461: ADDcc_I addcc %r4, 0x0001, %r0
483 .word 0xc097e020 ! 462: LDUHA_I lduha [%r31, + 0x0020] %asi, %r0
484 .word 0xc087e020 ! 465: LDUWA_I lduwa [%r31, + 0x0020] %asi, %r0
485 .word 0x2c800001 ! 468: BNEG bneg,a <label_0x1>
486 .word 0xc08fe010 ! 471: LDUBA_I lduba [%r31, + 0x0010] %asi, %r0
487 .word 0x88d3a001 ! 472: UMULcc_I umulcc %r14, 0x0001, %r4
488 .word 0x36700001 ! 475: BPGE <illegal instruction>
489 .word 0x3a700001 ! 478: BPCC <illegal instruction>
490 .word 0xc89004a0 ! 481: LDUHA_R lduha [%r0, %r0] 0x25, %r4
491 .word 0x32700001 ! 482: BPNE <illegal instruction>
492 .word 0xc80fc000 ! 483: LDUB_R ldub [%r31 + %r0], %r4
493 .word 0x9fd02032 ! 484: Tcc_I tvc icc_or_xcc, %r0 + 50
494 .word 0x85d02034 ! 489: Tcc_I tle icc_or_xcc, %r0 + 52
495 .word 0x8a528007 ! 496: UMUL_R umul %r10, %r7, %r5
496 .word 0x9bd02031 ! 513: Tcc_I tcc icc_or_xcc, %r0 + 49
497 .word 0x91d02031 ! 518: Tcc_I ta icc_or_xcc, %r0 + 49
498 .word 0x89d02032 ! 519: Tcc_I tleu icc_or_xcc, %r0 + 50
499 .word 0x89a309ed ! 520: FDIVq dis not found
500
501 ta T_CHANGE_NONPRIV ! macro
502 .word 0xc80fc000 ! 522: LDUB_R ldub [%r31 + %r0], %r4
503 .word 0x3a700001 ! 525: BPCC <illegal instruction>
504 .word 0x8bd02034 ! 526: Tcc_I tcs icc_or_xcc, %r0 + 52
505 .word 0x9a81c00a ! 527: ADDcc_R addcc %r7, %r10, %r13
506 mov 0x33, %r30
507 .word 0x8dd0001e ! 530: Tcc_R tneg icc_or_xcc, %r0 + %r30
508 .word 0x83d02032 ! 531: Tcc_I te icc_or_xcc, %r0 + 50
509 .word 0x30700001 ! 532: BPA <illegal instruction>
510 .word 0x98c02001 ! 533: ADDCcc_I addccc %r0, 0x0001, %r12
511 .word 0x20700001 ! 536: BPN <illegal instruction>
512 .word 0x927aa001 ! 541: SDIV_I sdiv %r10, 0x0001, %r9
513 .word 0xd2d004a0 ! 542: LDSHA_R ldsha [%r0, %r0] 0x25, %r9
514 .word 0x8d802004 ! 547: WRFPRS_I wr %r0, 0x0004, %fprs
515 .word 0x3a700001 ! 552: BPCC <illegal instruction>
516 .word 0x32800001 ! 555: BNE bne,a <label_0x1>
517 .word 0xd207c000 ! 556: LDUW_R lduw [%r31 + %r0], %r9
518 .word 0xd2c804a0 ! 557: LDSBA_R ldsba [%r0, %r0] 0x25, %r9
519 .word 0x944a6001 ! 558: MULX_I mulx %r9, 0x0001, %r10
520 .word 0xd4d7e000 ! 563: LDSHA_I ldsha [%r31, + 0x0000] %asi, %r10
521 .word 0x89d02030 ! 566: Tcc_I tleu icc_or_xcc, %r0 + 48
522 .word 0x91d02034 ! 571: Tcc_I ta icc_or_xcc, %r0 + 52
523 mov 0x34, %r30
524 .word 0x8dd0001e ! 572: Tcc_R tneg icc_or_xcc, %r0 + %r30
525 .word 0x36700001 ! 575: BPGE <illegal instruction>
526 .word 0x20800001 ! 576: BN bn,a <label_0x1>
527 .word 0xd48fe030 ! 581: LDUBA_I lduba [%r31, + 0x0030] %asi, %r10
528 .word 0x87802010 ! 584: WRASI_I wr %r0, 0x0010, %asi
529 .word 0xd417c000 ! 587: LDUH_R lduh [%r31 + %r0], %r10
530 mov 0x31, %r30
531 .word 0x9fd0001e ! 588: Tcc_R tvc icc_or_xcc, %r0 + %r30
532 .word 0xd40fc000 ! 589: LDUB_R ldub [%r31 + %r0], %r10
533 .word 0x8edbc004 ! 592: SMULcc_R smulcc %r15, %r4, %r7
534 .word 0xce17c000 ! 593: LDUH_R lduh [%r31 + %r0], %r7
535 .word 0xce07e001 ! 596: LDUW_I lduw [%r31 + 0x0001], %r7
536 .word 0x95d02030 ! 603: Tcc_I tg icc_or_xcc, %r0 + 48
537 .word 0xced7e030 ! 604: LDSHA_I ldsha [%r31, + 0x0030] %asi, %r7
538 .word 0x38700001 ! 605: BPGU <illegal instruction>
539 .word 0x9c78a001 ! 610: SDIV_I sdiv %r2, 0x0001, %r14
540 .word 0xdcd7e030 ! 611: LDSHA_I ldsha [%r31, + 0x0030] %asi, %r14
541 ta T_CHANGE_HPRIV ! macro
542 .word 0xdc87e000 ! 615: LDUWA_I lduwa [%r31, + 0x0000] %asi, %r14
543 .word 0x8d802004 ! 618: WRFPRS_I wr %r0, 0x0004, %fprs
544 .word 0x24700001 ! 623: BPLE <illegal instruction>
545 .word 0x28700001 ! 624: BPLEU <illegal instruction>
546 mov 0x32, %r30
547 .word 0x93d0001e ! 633: Tcc_R tne icc_or_xcc, %r0 + %r30
548 .word 0xdc8fe020 ! 634: LDUBA_I lduba [%r31, + 0x0020] %asi, %r14
549 mov 0x32, %r30
550 .word 0x8fd0001e ! 635: Tcc_R tvs icc_or_xcc, %r0 + %r30
551 .word 0xdc57e001 ! 638: LDSH_I ldsh [%r31 + 0x0001], %r14
552 mov 0x31, %r30
553 .word 0x99d0001e ! 641: Tcc_R tgu icc_or_xcc, %r0 + %r30
554 .word 0x98c1e001 ! 644: ADDCcc_I addccc %r7, 0x0001, %r12
555 .word 0x8b51c000 ! 647: RDPR_TL rdpr %tl, %r5
556 .word 0x87802054 ! 650: WRASI_I wr %r0, 0x0054, %asi
557 .word 0x83d02033 ! 655: Tcc_I te icc_or_xcc, %r0 + 51
558 mov 0x30, %r30
559 .word 0x8dd0001e ! 658: Tcc_R tneg icc_or_xcc, %r0 + %r30
560 .word 0x2c700001 ! 659: BPNEG <illegal instruction>
561 .word 0x87802004 ! 668: WRASI_I wr %r0, 0x0004, %asi
562 .word 0xcadfe030 ! 673: LDXA_I ldxa [%r31, + 0x0030] %asi, %r5
563 mov 0x31, %r30
564 .word 0x99d0001e ! 674: Tcc_R tgu icc_or_xcc, %r0 + %r30
565 .word 0x807b6001 ! 675: SDIV_I sdiv %r13, 0x0001, %r0
566 mov 0x30, %r30
567 .word 0x99d0001e ! 676: Tcc_R tgu icc_or_xcc, %r0 + %r30
568 .word 0x2e700001 ! 681: BPVS <illegal instruction>
569 .word 0xc087e020 ! 686: LDUWA_I lduwa [%r31, + 0x0020] %asi, %r0
570 mov 0x33, %r30
571 .word 0x97d0001e ! 687: Tcc_R tge icc_or_xcc, %r0 + %r30
572 .word 0xc007e001 ! 688: LDUW_I lduw [%r31 + 0x0001], %r0
573 .word 0x3e700001 ! 689: BPVC <illegal instruction>
574 .word 0xc0cfe030 ! 696: LDSBA_I ldsba [%r31, + 0x0030] %asi, %r0
575 .word 0x8d802000 ! 697: WRFPRS_I wr %r0, 0x0000, %fprs
576 ta T_CHANGE_HPRIV ! macro
577 ta T_CHANGE_HPRIV ! macro
578 .word 0x22800001 ! 708: BE be,a <label_0x1>
579 mov 0x34, %r30
580 .word 0x8dd0001e ! 713: Tcc_R tneg icc_or_xcc, %r0 + %r30
581 .word 0x8e698005 ! 714: UDIVX_R udivx %r6, %r5, %r7
582 .word 0x87802014 ! 723: WRASI_I wr %r0, 0x0014, %asi
583 .word 0x87802054 ! 724: WRASI_I wr %r0, 0x0054, %asi
584 ta T_CHANGE_NONPRIV ! macro
585 .word 0x9d686001 ! 726: SDIVX_I sdivx %r1, 0x0001, %r14
586 .word 0x9fd02034 ! 727: Tcc_I tvc icc_or_xcc, %r0 + 52
587 .word 0xdc47c000 ! 730: LDSW_R ldsw [%r31 + %r0], %r14
588 .word 0xdc47c000 ! 739: LDSW_R ldsw [%r31 + %r0], %r14
589 .word 0x844a4007 ! 748: MULX_R mulx %r9, %r7, %r2
590 .word 0x8d802004 ! 749: WRFPRS_I wr %r0, 0x0004, %fprs
591 .word 0xc447e001 ! 762: LDSW_I ldsw [%r31 + 0x0001], %r2
592 .word 0xc4800e60 ! 763: LDUWA_R lduwa [%r0, %r0] 0x73, %r2
593 mov 0x30, %r30
594 .word 0x9dd0001e ! 766: Tcc_R tpos icc_or_xcc, %r0 + %r30
595 .word 0x97d02035 ! 767: Tcc_I tge icc_or_xcc, %r0 + 53
596 .word 0xc4d804a0 ! 768: LDXA_R ldxa [%r0, %r0] 0x25, %r2
597 .word 0x8d802004 ! 769: WRFPRS_I wr %r0, 0x0004, %fprs
598 .word 0x87504000 ! 770: RDPR_TNPC rdpr %tnpc, %r3
599 mov 0x35, %r30
600 .word 0x99d0001e ! 779: Tcc_R tgu icc_or_xcc, %r0 + %r30
601 .word 0x85480000 ! 782: RDHPR_HPSTATE rdhpr %hpstate, %r2
602 .word 0xc40fe001 ! 783: LDUB_I ldub [%r31 + 0x0001], %r2
603 .word 0x93d02031 ! 784: Tcc_I tne icc_or_xcc, %r0 + 49
604 .word 0x9351c000 ! 791: RDPR_TL rdpr %tl, %r9
605 .word 0xd257c000 ! 794: LDSH_R ldsh [%r31 + %r0], %r9
606 .word 0x32800001 ! 795: BNE bne,a <label_0x1>
607 .word 0xd287e000 ! 798: LDUWA_I lduwa [%r31, + 0x0000] %asi, %r9
608 .word 0xd2cfe010 ! 805: LDSBA_I ldsba [%r31, + 0x0010] %asi, %r9
609 mov 0x32, %r30
610 .word 0x81d0001e ! 806: Tcc_R tn icc_or_xcc, %r0 + %r30
611 mov 0x33, %r30
612 .word 0x99d0001e ! 809: Tcc_R tgu icc_or_xcc, %r0 + %r30
613 .word 0x9dd02033 ! 814: Tcc_I tpos icc_or_xcc, %r0 + 51
614 .word 0xd247e001 ! 815: LDSW_I ldsw [%r31 + 0x0001], %r9
615 .word 0x98d34001 ! 816: UMULcc_R umulcc %r13, %r1, %r12
616 .word 0xd857e001 ! 823: LDSH_I ldsh [%r31 + 0x0001], %r12
617 mov 0x35, %r30
618 .word 0x9bd0001e ! 828: Tcc_R tcc icc_or_xcc, %r0 + %r30
619 ta T_CHANGE_HPRIV ! macro
620 .word 0x95d02031 ! 838: Tcc_I tg icc_or_xcc, %r0 + 49
621 .word 0x8c812001 ! 841: ADDcc_I addcc %r4, 0x0001, %r6
622 .word 0x9f50c000 ! 844: RDPR_TT rdpr %tt, %r15
623 .word 0x84786001 ! 845: SDIV_I sdiv %r1, 0x0001, %r2
624 .word 0x26700001 ! 846: BPL <illegal instruction>
625 .word 0x9dd02035 ! 851: Tcc_I tpos icc_or_xcc, %r0 + 53
626 .word 0x9f514000 ! 856: RDPR_TBA rdpr %tba, %r15
627 .word 0xdecfe020 ! 861: LDSBA_I ldsba [%r31, + 0x0020] %asi, %r15
628 .word 0xdec7e000 ! 868: LDSWA_I ldswa [%r31, + 0x0000] %asi, %r15
629 .word 0x89504000 ! 871: RDPR_TNPC rdpr %tnpc, %r4
630 .word 0x86db4004 ! 872: SMULcc_R smulcc %r13, %r4, %r3
631 mov 0x31, %r30
632 .word 0x95d0001e ! 881: Tcc_R tg icc_or_xcc, %r0 + %r30
633 mov 0x35, %r30
634 .word 0x83d0001e ! 882: Tcc_R te icc_or_xcc, %r0 + %r30
635 .word 0x82782001 ! 889: SDIV_I sdiv %r0, 0x0001, %r1
636 .word 0x36700001 ! 894: BPGE <illegal instruction>
637 .word 0xc2c7e020 ! 899: LDSWA_I ldswa [%r31, + 0x0020] %asi, %r1
638 ta T_CHANGE_NONPRIV ! macro
639 .word 0xc287e030 ! 903: LDUWA_I lduwa [%r31, + 0x0030] %asi, %r1
640 .word 0x8680c00f ! 908: ADDcc_R addcc %r3, %r15, %r3
641 mov 0x35, %r30
642 .word 0x91d0001e ! 915: Tcc_R ta icc_or_xcc, %r0 + %r30
643 .word 0xc687e030 ! 922: LDUWA_I lduwa [%r31, + 0x0030] %asi, %r3
644 .word 0xc64fc000 ! 927: LDSB_R ldsb [%r31 + %r0], %r3
645 mov 0x35, %r30
646 .word 0x8fd0001e ! 928: Tcc_R tvs icc_or_xcc, %r0 + %r30
647 .word 0x9a6bc00b ! 931: UDIVX_R udivx %r15, %r11, %r13
648 .word 0x9fd02032 ! 932: Tcc_I tvc icc_or_xcc, %r0 + 50
649 .word 0xdacfe020 ! 933: LDSBA_I ldsba [%r31, + 0x0020] %asi, %r13
650 mov 0x32, %r30
651 .word 0x9dd0001e ! 942: Tcc_R tpos icc_or_xcc, %r0 + %r30
652 .word 0x87802010 ! 945: WRASI_I wr %r0, 0x0010, %asi
653 .word 0x87802004 ! 948: WRASI_I wr %r0, 0x0004, %asi
654 .word 0xdadfe030 ! 955: LDXA_I ldxa [%r31, + 0x0030] %asi, %r13
655 .word 0x916a000a ! 958: SDIVX_R sdivx %r8, %r10, %r8
656 .word 0x26800001 ! 965: BL bl,a <label_0x1>
657 .word 0x20700001 ! 966: BPN <illegal instruction>
658 .word 0xd007c000 ! 967: LDUW_R lduw [%r31 + %r0], %r8
659 .word 0xd04fe001 ! 972: LDSB_I ldsb [%r31 + 0x0001], %r8
660 .word 0xd0d7e000 ! 975: LDSHA_I ldsha [%r31, + 0x0000] %asi, %r8
661 mov 0x34, %r30
662 .word 0x85d0001e ! 980: Tcc_R tle icc_or_xcc, %r0 + %r30
663 ta T_CHANGE_NONPRIV ! macro
664 .word 0x2c800001 ! 982: BNEG bneg,a <label_0x1>
665 .word 0x80c3e001 ! 985: ADDCcc_I addccc %r15, 0x0001, %r0
666 .word 0x95d02034 ! 986: Tcc_I tg icc_or_xcc, %r0 + 52
667 .word 0xc087e000 ! 987: LDUWA_I lduwa [%r31, + 0x0000] %asi, %r0
668 .word 0xc0d7e030 ! 988: LDSHA_I ldsha [%r31, + 0x0030] %asi, %r0
669 .word 0x8dd02030 ! 989: Tcc_I tneg icc_or_xcc, %r0 + 48
670 .word 0xc047e001 ! 990: LDSW_I ldsw [%r31 + 0x0001], %r0
671 .word 0x34800001 ! 997: BG bg,a <label_0x1>
672
673
674.data
675user_data_start:
676 .xword 0x6b523bc2166e4157
677 .xword 0x108857e27318e966
678 .xword 0xbb24f42dc0aaf89f
679 .xword 0xc63648496a4b5ad7
680 .xword 0x3d407cc92da15eb0
681 .xword 0x2a3a3965b86ffaf9
682 .xword 0xd6aa1e82fabdc2fc
683 .xword 0x0b99260f892bbfdc
684 .xword 0xedc816f885b79f24
685 .xword 0x3297127592690542
686 .xword 0xa38eee6adae4bcb2
687 .xword 0x6d483aec9242284d
688 .xword 0xeb62a7041d440c01
689 .xword 0x93f5320d47146f35
690 .xword 0xd89cff044c979100
691 .xword 0x8da421ae217aef37
692
693
694.text
695 ta T_GOOD_TRAP
696.data
697 .xword 0x0
698
699#if 0
700!!# /*
701!!# output of /import/bw/tools/local/indra-release/indra,1.4.11/bin/ijpp (indrajal preprocessor) - Fri Mar 26 09:04:23 2004
702!!# */
703!!#
704!!# %%section c_declarations
705!!#
706!!#
707!!#
708!!# %%
709!!# %%section control
710!!#
711!!# %%
712!!# %%section init
713!!# {
714!!#
715!!#
716!!# IJ_bind_thread_group("diag.j", 22, th0, 0x01);
717!!#
718!!# // Random 64 bits //
719!!# IJ_set_rvar("diag.j", 25, Rv_rand_64,"64'hrrrrrrrr_rrrrrrrr");
720!!#
721!!# // Register usage - use 0-27 //
722!!# // R31 is memory pointer
723!!# // R30 is trap number register
724!!# //
725!!# IJ_set_ropr_fld("diag.j", 31, ijdefault, Ft_Rs1, "5'b0rrrr");
726!!# IJ_set_ropr_fld("diag.j", 32, ijdefault, Ft_Rs2, "5'b0rrrr");
727!!# IJ_set_ropr_fld("diag.j", 33, ijdefault, Ft_Rd, "5'b0rrrr");
728!!#
729!!# // Load/Store pointer = r31
730!!# IJ_set_ropr_fld("diag.j", 36, Ro_ldst_ptr, Ft_Rs1, "{31}");
731!!#
732!!# // ASI register values
733!!# IJ_set_ropr_fld("diag.j", 39, Ro_wrasi_i, Ft_Rs1, "{0}");
734!!# IJ_set_ropr_fld("diag.j", 40, Ro_wrasi_i, Ft_Simm13, "{0x4, 0x10, 0x14, 0x16, 0x45, 0x54}");
735!!#
736!!# // General Ldst ASIs to use .. 50% should be illegal ..
737!!# IJ_set_ropr_fld("diag.j", 43, Ro_nontrap_ldasi, Ft_Imm_Asi, "{0x12,0x14, 0x53..0x64}");
738!!# IJ_set_ropr_fld("diag.j", 44, Ro_nontrap_ldasi, Ft_Rs1, "{31}");
739!!# IJ_set_ropr_fld("diag.j", 45, Ro_nontrap_ldasi, Ft_Rs2, "{0}");
740!!# IJ_set_ropr_fld("diag.j", 46, Ro_nontrap_ldasi, Ft_Simm13, "{0x0}, 6'brr0000");
741!!#
742!!# // General Ldst alignment to use .. 50% should be illegal ..
743!!# IJ_set_ropr_fld("diag.j", 49, Ro_nontrap_ld, Fm_align_Simm13, "{0x0, 0x7}");
744!!# IJ_set_ropr_fld("diag.j", 50, Ro_nontrap_ld, Ft_Rs1, "{31}");
745!!# IJ_set_ropr_fld("diag.j", 51, Ro_nontrap_ld, Ft_Rs2, "{0}");
746!!#
747!!# // Trap ASI operands
748!!# IJ_set_ropr_fld("diag.j", 54, Ro_traps_asi, Ft_Imm_Asi, "{0x25, 0x72..0x74}");
749!!# IJ_set_ropr_fld("diag.j", 55, Ro_traps_asi, Ft_Rs1, "{0}");
750!!# IJ_set_ropr_fld("diag.j", 56, Ro_traps_asi, Ft_Rs2, "{0}");
751!!# IJ_set_ropr_fld("diag.j", 57, Ro_traps_asi, Ft_Simm13, "{0x25, 0x72..0x74}");
752!!#
753!!# // Trap #s to use
754!!# IJ_set_ropr_fld("diag.j", 60, Ro_traps_i, Ft_Sw_Trap, "{0x30..0x35 }");
755!!# IJ_set_ropr_fld("diag.j", 61, Ro_traps_i, Ft_Rs1, "{0}");
756!!# IJ_set_ropr_fld("diag.j", 62, Ro_traps_i, Ft_Cond_f2, "{0x0 .. 0xf}");
757!!# IJ_set_ropr_fld("diag.j", 63, Ro_traps_r, Ft_Rs1, "{0}");
758!!# IJ_set_ropr_fld("diag.j", 64, Ro_traps_r, Ft_Rs2, "{30}");
759!!# IJ_set_ropr_fld("diag.j", 65, Ro_traps_r, Ft_Cond_f2, "{0x0 .. 0xf}");
760!!# IJ_set_ropr_fld("diag.j", 66, Ro_traps_r, Ft_Simm13, "{0x30..0x35}");
761!!# IJ_set_rvar("diag.j", 67, Rv_init_trap, "{0x30..0x35}");
762!!#
763!!# // FPRS splash
764!!# IJ_set_ropr_fld("diag.j", 70, Ro_wrfprs, Ft_Rs1, "{0}");
765!!# IJ_set_ropr_fld("diag.j", 71, Ro_wrfprs, Ft_Simm13, "{0, 4}");
766!!#
767!!# // Weights
768!!# IJ_set_rvar("diag.j", 74, wt_high, "{6}");
769!!# IJ_set_rvar("diag.j", 75, wt_med, "{3}");
770!!# IJ_set_rvar("diag.j", 76, wt_low, "{1}");
771!!#
772!!# // Initialize registers ..
773!!# IJ_init_regs_by_setx ("diag.j", 79, th0, 3, 2, Rv_rand_64);
774!!#
775!!# }
776!!#
777!!# %%
778!!# %%section finish
779!!# {
780!!#
781!!#
782!!# int i;
783!!# IJ_printf ("diag.j", 84, th0,"\n\n.data\nuser_data_start:\n");
784!!# for (i = 0; i < 16; i++) {
785!!# IJ_printf ("diag.j", 86, th0,"\t.xword\t0x%016llrx\n", Rv_rand_64);
786!!# }
787!!#
788!!# }
789!!#
790!!# %%
791!!# %%section map
792!!#
793!!# %%
794!!# %%section grammar
795!!#
796!!#
797!!# block: inst | block inst
798!!# {
799!!# IJ_generate ("diag.j", 277, th0, $2);
800!!# };
801!!#
802!!# inst: trap_asr %rvar wt_low
803!!# | trap_asi %rvar wt_low
804!!# | tcc %rvar wt_high
805!!# | ldst_excp %rvar wt_med
806!!# | ldstasi_excp %rvar wt_med
807!!# | change_mode %rvar wt_low
808!!# | alu %rvar wt_med
809!!# | br %rvar wt_med
810!!# | wrasi %rvar wt_low
811!!# | splash_fprs %rvar wt_low
812!!# ;
813!!#
814!!# change_mode :
815!!# tCHANGE_NONPRIV
816!!# | tCHANGE_PRIV
817!!# | tCHANGE_NONHPRIV
818!!# | tCHANGE_HPRIV
819!!# ;
820!!#
821!!# trap_asr :
822!!# tRDPR_TPC
823!!# | tRDPR_TSTATE
824!!# | tRDPR_TT
825!!# | tRDPR_TNPC
826!!# | tRDPR_TBA
827!!# | tRDPR_TL
828!!# | tRDHPR_HTBA
829!!# | tRDHPR_HPSTATE
830!!# ;
831!!#
832!!# splash_fprs :
833!!# tWRFPRS_I %ropr Ro_wrfprs
834!!# ;
835!!#
836!!# trap_asi :
837!!# asi_load_r %ropr Ro_traps_asi
838!!# ;
839!!#
840!!# wrasi : tWRASI_I %ropr Ro_wrasi_i
841!!# ;
842!!# reg_tcc : tTcc_R %ropr Ro_traps_r
843!!# {
844!!# IJ_printf("diag.j", 324, th0, "\tmov 0x%rx, %%r30\n", Rv_init_trap);
845!!# }
846!!# ;
847!!#
848!!# tcc :
849!!# tTcc_I %ropr Ro_traps_i
850!!# | reg_tcc
851!!#
852!!# ;
853!!#
854!!# ldst_excp : mLDST_EXCP
855!!# ldds %ropr Ro_nontrap_ld |
856!!# load_r %ropr Ro_nontrap_ld |
857!!# load_i %ropr Ro_nontrap_ld
858!!#
859!!# ;
860!!#
861!!# ldstasi_excp :
862!!# asi_load_i %ropr Ro_nontrap_ldasi
863!!# ;
864!!#
865!!# ldds: tLDD_R | tLDD_I | tLDDA_I | tLDDA_R
866!!# ;
867!!#
868!!# stds: tSTDA_R | tSTDA_I | tSTD_R | tSTD_I
869!!# ;
870!!#
871!!# load_r: tLDSB_R | tLDSH_R | tLDSW_R | tLDUB_R | tLDUH_R | tLDUW_R | tLDX_R
872!!# ;
873!!#
874!!# load_i: tLDSB_I | tLDSH_I | tLDSW_I | tLDUB_I | tLDUH_I | tLDUW_I | tLDX_I
875!!# ;
876!!#
877!!# asi_load_i: tLDSBA_I | tLDSHA_I | tLDSWA_I | tLDUBA_I | tLDUHA_I | tLDUWA_I
878!!# | tLDXA_I
879!!# ;
880!!#
881!!# asi_load_r:tLDSBA_R | tLDSHA_R | tLDSWA_R | tLDUBA_R | tLDUHA_R | tLDUWA_R
882!!# | tLDXA_R
883!!# ;
884!!#
885!!# asi_store_i: tSTBA_I | tSTHA_I | tSTWA_I | tSTXA_I
886!!# ;
887!!#
888!!# asi_store_r: tSTBA_R | tSTHA_R | tSTWA_R | tSTXA_R
889!!# ;
890!!#
891!!# alu :
892!!# tADD_I | tADDcc_R | tADDcc_I | tADDCcc_I |
893!!# tMULX_R | tMULX_I | tUMUL_R | tUMULcc_R | tUMULcc_I |
894!!# tSMULcc_R | tSDIV_I | tSDIV_R | tSDIVX_R | tSDIVX_I | tUDIVX_R |
895!!# tUDIVX_I | tFDIVs | tFDIVd | tFDIVq | tSWAP_I | tSWAPA_R | tCASA_I
896!!# ;
897!!#
898!!# br : tBA | tBN | tBNE | tBE | tBG | tBLE | tBGE | tBL | tBGU | tBLEU |
899!!# tBCC | tBCS | tBPOS | tBNEG | tBVC | tBVS | tBPA | tBPN | tBPNE |
900!!# tBPE | tBPG | tBPLE | tBPGE | tBPL | tBPGU | tBPLEU | tBPCC | tBPCS |
901!!# tBPPOS | tBPNEG | tBPVC | tBPVS
902!!# ;
903!!#
904!!#
905!!#
906!!#
907!!# %%
908!!# %%section cbfunc
909!!#
910!!# %%
911!!# %%section stat
912!!#
913!!# %%
914#endif
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