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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: tlu_rand05_ind_01.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define TRAP_SECT_HV_ALSO | |
39 | #define DMMU_SKIP_IF_NO_TTE | |
40 | #define IMMU_SKIP_IF_NO_TTE | |
41 | ||
42 | #define MAIN_PAGE_NUCLEUS_ALSO | |
43 | #define MAIN_PAGE_HV_ALSO | |
44 | #define MAIN_PAGE_VA_IS_RA_ALSO | |
45 | #define DISABLE_PART_LIMIT_CHECK | |
46 | # 5 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
47 | !!!!!!!!!!!!!!!!!!!!!!!!! | |
48 | !! Disable trap checking | |
49 | #define NO_TRAPCHECK | |
50 | ||
51 | ! Enable Traps | |
52 | #define ENABLE_T1_Privileged_Opcode_0x11 | |
53 | #define ENABLE_T1_Fp_Disabled_0x20 | |
54 | #define ENABLE_HT0_Watchdog_Reset_0x02 | |
55 | ||
56 | #define FILL_TRAP_RETRY | |
57 | #define SPILL_TRAP_RETRY | |
58 | #define CLEAN_WIN_RETRY | |
59 | ||
60 | #define My_RED_Mode_Other_Reset | |
61 | #define My_RED_Mode_Other_Reset \ | |
62 | ba red_other_ext;\ | |
63 | nop;retry;nop;nop;nop;nop;nop | |
64 | # 24 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
65 | #define H_T1_Clean_Window_0x24 | |
66 | #define SUN_H_T1_Clean_Window_0x24 \ | |
67 | rdpr %cleanwin, %g1;\ | |
68 | add %g1,1,%g1;\ | |
69 | wrpr %g1, %g0, %cleanwin;\ | |
70 | retry; nop; nop; nop; nop | |
71 | ||
72 | #define H_T1_Clean_Window_0x25 | |
73 | #define SUN_H_T1_Clean_Window_0x25 \ | |
74 | rdpr %cleanwin, %g1;\ | |
75 | add %g1,1,%g1;\ | |
76 | wrpr %g1, %g0, %cleanwin;\ | |
77 | retry; nop; nop; nop; nop | |
78 | ||
79 | #define H_T1_Clean_Window_0x26 | |
80 | #define SUN_H_T1_Clean_Window_0x26 \ | |
81 | rdpr %cleanwin, %g1;\ | |
82 | add %g1,1,%g1;\ | |
83 | wrpr %g1, %g0, %cleanwin;\ | |
84 | retry; nop; nop; nop; nop | |
85 | ||
86 | #define H_T1_Clean_Window_0x27 | |
87 | #define SUN_H_T1_Clean_Window_0x27 \ | |
88 | rdpr %cleanwin, %g1;\ | |
89 | add %g1,1,%g1;\ | |
90 | wrpr %g1, %g0, %cleanwin;\ | |
91 | retry; nop; nop; nop; nop | |
92 | # 53 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
93 | #define H_HT0_Tag_Overflow | |
94 | #define My_HT0_Tag_Overflow \ | |
95 | done;nop; | |
96 | ||
97 | #define H_T0_Tag_Overflow | |
98 | #define My_T0_Tag_Overflow \ | |
99 | done;nop; | |
100 | ||
101 | #define H_T1_Tag_Overflow_0x23 | |
102 | #define SUN_H_T1_Tag_Overflow_0x23 \ | |
103 | done;nop; | |
104 | ||
105 | #define H_T0_Window_Spill_0_Normal_Trap | |
106 | #define SUN_H_T0_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
107 | ||
108 | #define H_T0_Window_Spill_1_Normal_Trap | |
109 | #define SUN_H_T0_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
110 | ||
111 | #define H_T0_Window_Spill_2_Normal_Trap | |
112 | #define SUN_H_T0_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
113 | ||
114 | #define H_T0_Window_Spill_3_Normal_Trap | |
115 | #define SUN_H_T0_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
116 | ||
117 | #define H_T0_Window_Spill_4_Normal_Trap | |
118 | #define SUN_H_T0_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
119 | ||
120 | #define H_T0_Window_Spill_5_Normal_Trap | |
121 | #define SUN_H_T0_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
122 | ||
123 | #define H_T0_Window_Spill_6_Normal_Trap | |
124 | #define SUN_H_T0_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
125 | ||
126 | #define H_T0_Window_Spill_7_Normal_Trap | |
127 | #define SUN_H_T0_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
128 | ||
129 | #define H_T0_Window_Spill_0_Other_Trap | |
130 | #define SUN_H_T0_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
131 | ||
132 | #define H_T0_Window_Spill_1_Other_Trap | |
133 | #define SUN_H_T0_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
134 | ||
135 | #define H_T0_Window_Spill_2_Other_Trap | |
136 | #define SUN_H_T0_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
137 | ||
138 | #define H_T0_Window_Spill_3_Other_Trap | |
139 | #define SUN_H_T0_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
140 | ||
141 | #define H_T0_Window_Spill_4_Other_Trap | |
142 | #define SUN_H_T0_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
143 | ||
144 | #define H_T0_Window_Spill_5_Other_Trap | |
145 | #define SUN_H_T0_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
146 | ||
147 | #define H_T0_Window_Spill_6_Other_Trap | |
148 | #define SUN_H_T0_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
149 | ||
150 | #define H_T0_Window_Spill_7_Other_Trap | |
151 | #define SUN_H_T0_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
152 | ||
153 | #define H_T0_Window_Fill_0_Normal_Trap | |
154 | #define SUN_H_T0_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
155 | ||
156 | #define H_T0_Window_Fill_1_Normal_Trap | |
157 | #define SUN_H_T0_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
158 | ||
159 | #define H_T0_Window_Fill_2_Normal_Trap | |
160 | #define SUN_H_T0_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
161 | ||
162 | #define H_T0_Window_Fill_3_Normal_Trap | |
163 | #define SUN_H_T0_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
164 | ||
165 | #define H_T0_Window_Fill_4_Normal_Trap | |
166 | #define SUN_H_T0_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
167 | ||
168 | #define H_T0_Window_Fill_5_Normal_Trap | |
169 | #define SUN_H_T0_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
170 | ||
171 | #define H_T0_Window_Fill_6_Normal_Trap | |
172 | #define SUN_H_T0_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
173 | ||
174 | #define H_T0_Window_Fill_7_Normal_Trap | |
175 | #define SUN_H_T0_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
176 | ||
177 | #define H_T0_Window_Fill_0_Other_Trap | |
178 | #define SUN_H_T0_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
179 | ||
180 | #define H_T0_Window_Fill_1_Other_Trap | |
181 | #define SUN_H_T0_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
182 | ||
183 | #define H_T0_Window_Fill_2_Other_Trap | |
184 | #define SUN_H_T0_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
185 | ||
186 | #define H_T0_Window_Fill_3_Other_Trap | |
187 | #define SUN_H_T0_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
188 | ||
189 | #define H_T0_Window_Fill_4_Other_Trap | |
190 | #define SUN_H_T0_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
191 | ||
192 | #define H_T0_Window_Fill_5_Other_Trap | |
193 | #define SUN_H_T0_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
194 | ||
195 | #define H_T0_Window_Fill_6_Other_Trap | |
196 | #define SUN_H_T0_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
197 | ||
198 | #define H_T0_Window_Fill_7_Other_Trap | |
199 | #define SUN_H_T0_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
200 | # 162 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
201 | #define H_T1_Window_Spill_0_Normal_0x80 | |
202 | #define SUN_H_T1_Window_Spill_0_Normal_0x80 saved; retry; nop;nop;nop;nop;nop;nop; | |
203 | ||
204 | #define H_T1_Window_Spill_1_Normal_0x84 | |
205 | #define SUN_H_T1_Window_Spill_1_Normal_0x84 saved; retry; nop;nop;nop;nop;nop;nop; | |
206 | ||
207 | #define H_T1_Window_Spill_2_Normal_0x88 | |
208 | #define SUN_H_T1_Window_Spill_2_Normal_0x88 saved; retry; nop;nop;nop;nop;nop;nop; | |
209 | ||
210 | #define H_T1_Window_Spill_3_Normal_0x8c | |
211 | #define SUN_H_T1_Window_Spill_3_Normal_0x8c saved; retry; nop;nop;nop;nop;nop;nop; | |
212 | ||
213 | #define H_T1_Window_Spill_4_Normal_0x90 | |
214 | #define SUN_H_T1_Window_Spill_4_Normal_0x90 saved; retry; nop;nop;nop;nop;nop;nop; | |
215 | ||
216 | #define H_T1_Window_Spill_5_Normal_0x94 | |
217 | #define SUN_H_T1_Window_Spill_5_Normal_0x94 saved; retry; nop;nop;nop;nop;nop;nop; | |
218 | ||
219 | #define H_T1_Window_Spill_6_Normal_0x98 | |
220 | #define SUN_H_T1_Window_Spill_6_Normal_0x98 saved; retry; nop;nop;nop;nop;nop;nop; | |
221 | ||
222 | #define H_T1_Window_Spill_7_Normal_0x9c | |
223 | #define SUN_H_T1_Window_Spill_7_Normal_0x9c saved; retry; nop;nop;nop;nop;nop;nop; | |
224 | ||
225 | #define H_T1_Window_Spill_0_Other_0xa0 | |
226 | #define SUN_H_T1_Window_Spill_0_Other_0xa0 saved; retry; nop;nop;nop;nop;nop;nop; | |
227 | ||
228 | #define H_T1_Window_Spill_1_Other_0xa4 | |
229 | #define SUN_H_T1_Window_Spill_1_Other_0xa4 saved; retry; nop;nop;nop;nop;nop;nop; | |
230 | ||
231 | #define H_T1_Window_Spill_2_Other_0xa8 | |
232 | #define SUN_H_T1_Window_Spill_2_Other_0xa8 saved; retry; nop;nop;nop;nop;nop;nop; | |
233 | ||
234 | #define H_T1_Window_Spill_3_Other_0xac | |
235 | #define SUN_H_T1_Window_Spill_3_Other_0xac saved; retry; nop;nop;nop;nop;nop;nop; | |
236 | ||
237 | #define H_T1_Window_Spill_4_Other_0xb0 | |
238 | #define SUN_H_T1_Window_Spill_4_Other_0xb0 saved; retry; nop;nop;nop;nop;nop;nop; | |
239 | ||
240 | #define H_T1_Window_Spill_5_Other_0xb4 | |
241 | #define SUN_H_T1_Window_Spill_5_Other_0xb4 saved; retry; nop;nop;nop;nop;nop;nop; | |
242 | ||
243 | #define H_T1_Window_Spill_6_Other_0xb8 | |
244 | #define SUN_H_T1_Window_Spill_6_Other_0xb8 saved; retry; nop;nop;nop;nop;nop;nop; | |
245 | ||
246 | #define H_T1_Window_Spill_7_Other_0xbc | |
247 | #define SUN_H_T1_Window_Spill_7_Other_0xbc saved; retry; nop;nop;nop;nop;nop;nop; | |
248 | ||
249 | #define H_T1_Window_Fill_0_Normal_0xc0 | |
250 | #define SUN_H_T1_Window_Fill_0_Normal_0xc0 restored; retry; nop;nop;nop;nop;nop;nop; | |
251 | ||
252 | #define H_T1_Window_Fill_1_Normal_0xc4 | |
253 | #define SUN_H_T1_Window_Fill_1_Normal_0xc4 restored; retry; nop;nop;nop;nop;nop;nop; | |
254 | ||
255 | #define H_T1_Window_Fill_2_Normal_0xc8 | |
256 | #define SUN_H_T1_Window_Fill_2_Normal_0xc8 restored; retry; nop;nop;nop;nop;nop;nop; | |
257 | ||
258 | #define H_T1_Window_Fill_3_Normal_0xcc | |
259 | #define SUN_H_T1_Window_Fill_3_Normal_0xcc restored; retry; nop;nop;nop;nop;nop;nop; | |
260 | ||
261 | #define H_T1_Window_Fill_4_Normal_0xd0 | |
262 | #define SUN_H_T1_Window_Fill_4_Normal_0xd0 restored; retry; nop;nop;nop;nop;nop;nop; | |
263 | ||
264 | #define H_T1_Window_Fill_5_Normal_0xd4 | |
265 | #define SUN_H_T1_Window_Fill_5_Normal_0xd4 restored; retry; nop;nop;nop;nop;nop;nop; | |
266 | ||
267 | #define H_T1_Window_Fill_6_Normal_0xd8 | |
268 | #define SUN_H_T1_Window_Fill_6_Normal_0xd8 restored; retry; nop;nop;nop;nop;nop;nop; | |
269 | ||
270 | #define H_T1_Window_Fill_7_Normal_Trap | |
271 | #define SUN_H_T1_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
272 | ||
273 | #define H_T1_Window_Fill_0_Other_0xe0 | |
274 | #define SUN_H_T1_Window_Fill_0_Other_0xe0 restored; retry; nop;nop;nop;nop;nop;nop; | |
275 | ||
276 | #define H_T1_Window_Fill_1_Other_0xe4 | |
277 | #define SUN_H_T1_Window_Fill_1_Other_0xe4 restored; retry; nop;nop;nop;nop;nop;nop; | |
278 | ||
279 | #define H_T1_Window_Fill_2_Other_0xe8 | |
280 | #define SUN_H_T1_Window_Fill_2_Other_0xe8 restored; retry; nop;nop;nop;nop;nop;nop; | |
281 | ||
282 | #define H_T1_Window_Fill_3_Other_0xec | |
283 | #define SUN_H_T1_Window_Fill_3_Other_0xec restored; retry; nop;nop;nop;nop;nop;nop; | |
284 | ||
285 | #define H_T1_Window_Fill_4_Other_0xf0 | |
286 | #define SUN_H_T1_Window_Fill_4_Other_0xf0 restored; retry; nop;nop;nop;nop;nop;nop; | |
287 | ||
288 | #define H_T1_Window_Fill_5_Other_0xf4 | |
289 | #define SUN_H_T1_Window_Fill_5_Other_0xf4 restored; retry; nop;nop;nop;nop;nop;nop; | |
290 | ||
291 | #define H_T1_Window_Fill_6_Other_0xf8 | |
292 | #define SUN_H_T1_Window_Fill_6_Other_0xf8 restored; retry; nop;nop;nop;nop;nop;nop; | |
293 | ||
294 | #define H_T1_Window_Fill_7_Other_0xfc | |
295 | #define SUN_H_T1_Window_Fill_7_Other_0xfc restored; retry; nop;nop;nop;nop;nop;nop; | |
296 | ||
297 | #define H_T0_Trap_Instruction_0 | |
298 | #define My_T0_Trap_Instruction_0 \ | |
299 | rdpr %tnpc, %g2; \ | |
300 | save %i7, %g0, %i7; \ | |
301 | wrpr %g2, %tpc; \ | |
302 | add %g2, 4, %g2;\ | |
303 | wrpr %g2, %tnpc; \ | |
304 | restore %i7, %g0, %i7; \ | |
305 | stw %g2, [%i7];\ | |
306 | retry | |
307 | #define H_T0_Trap_Instruction_1 | |
308 | #define My_T0_Trap_Instruction_1 \ | |
309 | umul %o4, 2, %o5;\ | |
310 | rdpr %tnpc, %g2; \ | |
311 | wrpr %g2, %tpc; \ | |
312 | add %g2, 4, %g2;\ | |
313 | wrpr %g2, %tnpc; \ | |
314 | stw %g2, [%i7];\ | |
315 | illtrap;\ | |
316 | retry | |
317 | #define H_T0_Trap_Instruction_2 | |
318 | #define My_T0_Trap_Instruction_2 \ | |
319 | inc %o3;\ | |
320 | umul %o3, 2, %o4;\ | |
321 | ba 1f; \ | |
322 | save %i7, %g0, %i7; \ | |
323 | 2: done; \ | |
324 | nop; \ | |
325 | 1: ba 2b; \ | |
326 | restore %i7, %g0, %i7 | |
327 | #define H_T0_Trap_Instruction_3 | |
328 | #define My_T0_Trap_Instruction_3 \ | |
329 | inc %l3;\ | |
330 | inc %o3;\ | |
331 | umul %o3, 2, %o4;\ | |
332 | stw %o4, [%i7];\ | |
333 | save %i7, %g0, %i7 ;\ | |
334 | restore %i7, %g0, %i7 ;\ | |
335 | done ;\ | |
336 | nop; | |
337 | #define H_T0_Trap_Instruction_4 | |
338 | #define My_T0_Trap_Instruction_4 \ | |
339 | umul %i4, 2, %l5;\ | |
340 | inc %o1;\ | |
341 | rdpr %tnpc, %g2; \ | |
342 | wrpr %g2, %tpc; \ | |
343 | add %g2, 4, %g2;\ | |
344 | wrpr %g2, %tnpc; \ | |
345 | retry ;\ | |
346 | illtrap | |
347 | #define H_T0_Trap_Instruction_5 | |
348 | #define My_T0_Trap_Instruction_5 \ | |
349 | umul %i7, 2, %l1;\ | |
350 | inc %o5;\ | |
351 | rdpr %tnpc, %g2; \ | |
352 | wrpr %g2, %tpc; \ | |
353 | add %g2, 4, %g2;\ | |
354 | wrpr %g2, %tnpc; \ | |
355 | sdiv %r2, %r10, %r0; \ | |
356 | retry | |
357 | ||
358 | #define H_T1_Trap_Instruction_0 | |
359 | #define My_T1_Trap_Instruction_0 \ | |
360 | inc %o4;\ | |
361 | umul %o4, 2, %o5;\ | |
362 | ba 3f; \ | |
363 | save %i7, %g0, %i7; \ | |
364 | 4: done; \ | |
365 | nop; \ | |
366 | 3: ba 4b; \ | |
367 | restore %i7, %g0, %i7 | |
368 | #define H_T1_Trap_Instruction_1 | |
369 | #define My_T1_Trap_Instruction_1 \ | |
370 | umul %o4, 2, %o5;\ | |
371 | rdpr %tnpc, %g2; \ | |
372 | wrpr %g2, %tpc; \ | |
373 | add %g2, 4, %g2;\ | |
374 | stw %g2, [%i7];\ | |
375 | wrpr %g2, %tnpc; \ | |
376 | restore %i7, %g0, %i7 ;;\ | |
377 | retry | |
378 | #define H_T1_Trap_Instruction_2 | |
379 | #define My_T1_Trap_Instruction_2 \ | |
380 | inc %o3;\ | |
381 | umul %o3, 2, %o4;\ | |
382 | ba 5f; \ | |
383 | save %i7, %g0, %i7; \ | |
384 | 6: done; \ | |
385 | nop; \ | |
386 | 5: ba 6b; \ | |
387 | restore %i7, %g0, %i7 | |
388 | #define H_T1_Trap_Instruction_3 | |
389 | #define My_T1_Trap_Instruction_3 \ | |
390 | inc %l3;\ | |
391 | inc %o3;\ | |
392 | umul %o3, 2, %o4;\ | |
393 | inc %i3;\ | |
394 | save %i7, %g0, %i7 ;\ | |
395 | restore %i7, %g0, %i7 ;\ | |
396 | done ;\ | |
397 | nop; | |
398 | #define H_T1_Trap_Instruction_4 | |
399 | #define My_T1_Trap_Instruction_4 \ | |
400 | umul %i4, 2, %l5;\ | |
401 | rdpr %tnpc, %g2; \ | |
402 | wrpr %g2, %tpc; \ | |
403 | stw %g2, [%i7];\ | |
404 | add %g2, 4, %g2;\ | |
405 | wrpr %g2, %tnpc; \ | |
406 | retry ;\ | |
407 | illtrap | |
408 | #define H_T1_Trap_Instruction_5 | |
409 | #define My_T1_Trap_Instruction_5 \ | |
410 | umul %i7, 2, %l1;\ | |
411 | inc %o5;\ | |
412 | rdpr %tnpc, %g2; \ | |
413 | wrpr %g2, %tpc; \ | |
414 | add %g2, 4, %g2;\ | |
415 | wrpr %g2, %tnpc; \ | |
416 | sdiv %r2, %r10, %r0; \ | |
417 | retry | |
418 | ||
419 | #define H_HT0_Trap_Instruction_0 | |
420 | #define My_HT0_Trap_Instruction_0 \ | |
421 | rd %asi, %g2;\ | |
422 | mov 0x80, %g3;\ | |
423 | stxa %g3, [%g3] 0x57;\ | |
424 | stw %g2, [%i7];\ | |
425 | done;\ | |
426 | nop;nop;nop | |
427 | ||
428 | #define H_HT0_Trap_Instruction_1 | |
429 | #define My_HT0_Trap_Instruction_1 \ | |
430 | rd %asi, %g2;\ | |
431 | mov 0x80, %g3;\ | |
432 | stxa %g3, [%g3] 0x5f;\ | |
433 | done;\ | |
434 | nop;nop;nop;nop | |
435 | #define H_HT0_Trap_Instruction_2 | |
436 | #define My_HT0_Trap_Instruction_2 \ | |
437 | umul %i6, 2, %l4;\ | |
438 | stw %l4, [%i7];\ | |
439 | rdpr %tnpc, %g2; \ | |
440 | wrpr %g2, %tpc; \ | |
441 | add %g2, 4, %g2;\ | |
442 | wrpr %g2, %tnpc; \ | |
443 | sdiv %r2, %r0, %r0; \ | |
444 | retry | |
445 | #define H_HT0_Trap_Instruction_3 | |
446 | #define My_HT0_Trap_Instruction_3 \ | |
447 | umul %i5, 3, %l3;\ | |
448 | inc %o6;\ | |
449 | illtrap ;\ | |
450 | rdpr %tnpc, %g2; \ | |
451 | wrpr %g2, %tpc; \ | |
452 | add %g2, 4, %g2;\ | |
453 | wrpr %g2, %tnpc; \ | |
454 | retry | |
455 | #define H_HT0_Trap_Instruction_4 | |
456 | #define My_HT0_Trap_Instruction_4 \ | |
457 | rdpr %tnpc, %g2; \ | |
458 | save %i7, %g0, %i7; \ | |
459 | wrpr %g2, %tpc; \ | |
460 | add %g2, 4, %g2;\ | |
461 | stw %g2, [%i7];\ | |
462 | wrpr %g2, %tnpc; \ | |
463 | restore %i7, %g0, %i7 ;\ | |
464 | retry | |
465 | #define H_HT0_Trap_Instruction_5 | |
466 | #define My_HT0_Trap_Instruction_5 \ | |
467 | ba htrap_5_ext;\ | |
468 | nop; retry;\ | |
469 | nop; nop; nop; nop; nop | |
470 | ||
471 | #define H_HT0_Mem_Address_Not_Aligned_0x34 | |
472 | #define My_HT0_Mem_Address_Not_Aligned_0x34 \ | |
473 | umul %i7, 4, %g1;\ | |
474 | inc %o6;\ | |
475 | umul %i4, 3, %l3;\ | |
476 | inc %g6;\ | |
477 | save %i7, %g0, %i7 ;\ | |
478 | restore %i7, %g0, %i7 ;\ | |
479 | done ;\ | |
480 | nop; | |
481 | #define H_HT0_Illegal_instruction_0x10 | |
482 | #define My_HT0_Illegal_instruction_0x10 \ | |
483 | umul %i0, 4, %g1;\ | |
484 | inc %o6;\ | |
485 | ba 7f; \ | |
486 | rdhpr %htstate, %g3;\ | |
487 | 8: done; \ | |
488 | 7: ba 8b;\ | |
489 | wrhpr %g3, 1, %htstate;nop | |
490 | ||
491 | #define H_HT0_DAE_so_page_0x30 | |
492 | #define My_HT0_DAE_so_page_0x30 \ | |
493 | umul %i5, 4, %g5;\ | |
494 | inc %g6;\ | |
495 | save %i7, %g0, %i7; \ | |
496 | restore %i7, %g0, %i7;\ | |
497 | rd %fprs, %g2; \ | |
498 | wr %g2, 0x4, %fprs ;\ | |
499 | done; \ | |
500 | nop; | |
501 | #define H_HT0_DAE_invalid_asi_0x14 | |
502 | #define SUN_H_HT0_DAE_invalid_asi_0x14 \ | |
503 | umul %i5, 4, %g5;\ | |
504 | inc %g6;\ | |
505 | save %i7, %g0, %i7; \ | |
506 | restore %i7, %g0, %i7;\ | |
507 | rd %fprs, %g2; \ | |
508 | wr %g2, 0x4, %fprs ;\ | |
509 | done; \ | |
510 | nop; | |
511 | #define H_HT0_DAE_privilege_violation_0x15 | |
512 | #define SUN_H_HT0_DAE_privilege_violation_0x15 \ | |
513 | umul %i5, 4, %g5;\ | |
514 | inc %g6;\ | |
515 | save %i7, %g0, %i7; \ | |
516 | restore %i7, %g0, %i7;\ | |
517 | rd %fprs, %g2; \ | |
518 | wr %g2, 0x4, %fprs ;\ | |
519 | done; \ | |
520 | nop; | |
521 | #define H_HT0_Privileged_Action_0x37 | |
522 | #define My_HT0_Privileged_Action_0x37 \ | |
523 | inc %l5;\ | |
524 | dec %g3;\ | |
525 | umul %i5, 4, %g5;\ | |
526 | save %i7, %g0, %i7; \ | |
527 | restore %i7, %g0, %i7;\ | |
528 | done; \ | |
529 | nop; nop | |
530 | #define H_HT0_Lddf_Mem_Address_Not_Aligned_0x35 | |
531 | #define My_HT0_Lddf_Mem_Address_Not_Aligned_0x35 \ | |
532 | inc %l5;\ | |
533 | dec %g3;\ | |
534 | rdpr %tpc, %g2; \ | |
535 | add %g2, 0x4, %g2; \ | |
536 | wrpr %g2, %tpc; \ | |
537 | add %g2, 0x4, %g2; \ | |
538 | wrpr %g2, %tnpc; \ | |
539 | retry | |
540 | #define H_HT0_Stdf_Mem_Address_Not_Aligned_0x36 | |
541 | #define My_HT0_Stdf_Mem_Address_Not_Aligned_0x36 \ | |
542 | inc %l5;\ | |
543 | dec %g3;\ | |
544 | rdpr %tpc, %g2; \ | |
545 | add %g2, 0x4, %g2; \ | |
546 | wrpr %g2, %tpc; \ | |
547 | add %g2, 0x4, %g2; \ | |
548 | wrpr %g2, %tnpc; \ | |
549 | retry | |
550 | #define H_HT0_Fp_exception_other_0x22 | |
551 | #define My_HT0_Fp_exception_other_0x22 \ | |
552 | inc %l6;\ | |
553 | dec %g5;\ | |
554 | umul %i5, 4, %g2;\ | |
555 | save %i7, %g0, %i7; \ | |
556 | restore %i7, %g0, %i7;\ | |
557 | stw %g2, [%i7];\ | |
558 | done; \ | |
559 | nop | |
560 | #define H_HT0_Division_By_Zero | |
561 | #define My_HT0_Division_By_Zero \ | |
562 | inc %l6;\ | |
563 | dec %g5;\ | |
564 | umul %i5, 4, %g2;\ | |
565 | save %i7, %g0, %i7; \ | |
566 | restore %i7, %g0, %i7;\ | |
567 | done; \ | |
568 | nop; nop | |
569 | #define H_T0_Division_By_Zero | |
570 | #define My_T0_Division_By_Zero \ | |
571 | inc %l6;\ | |
572 | dec %g5;\ | |
573 | umul %i5, 4, %g2;\ | |
574 | save %i7, %g0, %i7; \ | |
575 | restore %i7, %g0, %i7;\ | |
576 | done; \ | |
577 | nop; nop | |
578 | #define H_T1_Division_By_Zero_0x28 | |
579 | #define My_H_T1_Division_By_Zero_0x28 \ | |
580 | inc %l6;\ | |
581 | dec %g5;\ | |
582 | umul %i5, 4, %g2;\ | |
583 | save %i7, %g0, %i7; \ | |
584 | restore %i7, %g0, %i7;\ | |
585 | done; \ | |
586 | nop; nop | |
587 | ||
588 | #define H_T0_Division_By_Zero | |
589 | #define My_T0_Division_By_Zero\ | |
590 | inc %l6;\ | |
591 | dec %g5;\ | |
592 | umul %i5, 4, %g2;\ | |
593 | save %i7, %g0, %i7; \ | |
594 | restore %i7, %g0, %i7;\ | |
595 | done; \ | |
596 | nop; nop | |
597 | ||
598 | #define H_T1_Fp_Exception_Other_0x22 | |
599 | #define My_H_T1_Fp_Exception_Other_0x22 \ | |
600 | inc %l6;\ | |
601 | dec %g5;\ | |
602 | umul %i5, 4, %g2;\ | |
603 | save %i7, %g0, %i7; \ | |
604 | restore %i7, %g0, %i7;\ | |
605 | done; \ | |
606 | nop; nop | |
607 | #define H_T1_Privileged_Opcode_0x11 | |
608 | #define SUN_H_T1_Privileged_Opcode_0x11 \ | |
609 | inc %l6;\ | |
610 | dec %g5;\ | |
611 | stw %g5, [%i7];\ | |
612 | umul %i5, 4, %g2;\ | |
613 | restore %i7, %g0, %i7;\ | |
614 | save %i7, %g0, %i7; \ | |
615 | done; \ | |
616 | nop; | |
617 | ||
618 | #define H_HT0_Privileged_opcode_0x11 | |
619 | #define My_HT0_Privileged_opcode_0x11 \ | |
620 | xor %i0, %l1, %g1;\ | |
621 | and %g1, 0xf, %g1; \ | |
622 | ba hh11_1; \ | |
623 | not %g0, %g2; \ | |
624 | hh11_2: done; \ | |
625 | hh11_1: xor %g1, %g2, %g2; \ | |
626 | ba hh11_2; \ | |
627 | jmp %g2; | |
628 | ||
629 | #define H_HT0_Fp_disabled_0x20 | |
630 | #define My_HT0_Fp_disabled_0x20 \ | |
631 | mov 0x4, %g2 ;\ | |
632 | wr %g2, 0x0, %fprs ;\ | |
633 | sllx %g2, 10, %g3; \ | |
634 | rdpr %tstate, %g2;\ | |
635 | or %g2, %g3, %g2 ;\ | |
636 | stw %g2, [%i7];\ | |
637 | wrpr %g2, 0x0, %tstate;\ | |
638 | retry; | |
639 | ||
640 | #define H_T0_Fp_disabled_0x20 | |
641 | #define My_T0_Fp_disabled_0x20 \ | |
642 | mov 0x4, %g2 ;\ | |
643 | wr %g2, 0x0, %fprs ;\ | |
644 | sllx %g2, 10, %g3; \ | |
645 | rdpr %tstate, %g2;\ | |
646 | or %g2, %g3, %g2 ;\ | |
647 | wrpr %g2, 0x0, %tstate;\ | |
648 | retry; nop | |
649 | ||
650 | #define H_T1_Fp_Disabled_0x20 | |
651 | #define My_H_T1_Fp_Disabled_0x20 \ | |
652 | mov 0x4, %g2 ;\ | |
653 | wr %g2, 0x0, %fprs ;\ | |
654 | sllx %g2, 10, %g3; \ | |
655 | rdpr %tstate, %g2;\ | |
656 | or %g2, %g3, %g2 ;\ | |
657 | wrpr %g2, 0x0, %tstate;\ | |
658 | stw %g2, [%i7];\ | |
659 | retry | |
660 | ||
661 | #define H_HT0_Watchdog_Reset_0x02 | |
662 | #define My_HT0_Watchdog_Reset_0x02 \ | |
663 | ba wdog_2_ext;\ | |
664 | nop;retry;nop;nop;nop;nop;nop | |
665 | ||
666 | #define H_T0_Privileged_opcode_0x11 | |
667 | #define My_T0_Privileged_opcode_0x11 \ | |
668 | xor %i0, %l1, %g1;\ | |
669 | and %g1, 0xf, %g1; \ | |
670 | ba h11_1; \ | |
671 | not %g0, %g2; \ | |
672 | h11_2: done; \ | |
673 | h11_1: xor %g1, %g2, %g2; \ | |
674 | ba h11_2; \ | |
675 | jmp %g2; | |
676 | ||
677 | #define H_T1_Fp_exception_other_0x22 | |
678 | #define My_T1_Fp_exception_other_0x22 \ | |
679 | inc %l6;\ | |
680 | dec %g5;\ | |
681 | umul %i5, 4, %g2;\ | |
682 | restore %i7, %g0, %i7 ; \ | |
683 | save %i7, %g0, %i7; \ | |
684 | restore %i7, %g0, %i7;\ | |
685 | ldx [%g2], %g2;\ | |
686 | done; | |
687 | ||
688 | #define H_T0_Fp_exception_other_0x22 | |
689 | #define My_T0_Fp_exception_other_0x22 \ | |
690 | inc %l6;\ | |
691 | dec %g5;\ | |
692 | umul %i5, 4, %g2;\ | |
693 | save %i7, %g0, %i7; \ | |
694 | restore %i7, %g0, %i7;\ | |
695 | stw %g2, [%i7];\ | |
696 | done; \ | |
697 | nop | |
698 | ||
699 | #define H_HT0_Trap_Level_Zero_0x5f | |
700 | #define My_HT0_Trap_Level_Zero_0x5f \ | |
701 | not %g0, %g2; \ | |
702 | rdhpr %hpstate, %g3;\ | |
703 | jmp %g2;\ | |
704 | rdhpr %htstate, %g3;\ | |
705 | and %g3, 0xfe, %g3;\ | |
706 | wrhpr %g3, 0, %htstate;\ | |
707 | stw %g2, [%i7];\ | |
708 | retry | |
709 | ||
710 | #define My_Watchdog_Reset | |
711 | #define My_Watchdog_Reset \ | |
712 | ba wdog_red_ext;\ | |
713 | nop;retry;nop;nop;nop;nop;nop | |
714 | ||
715 | #define H_HT0_Control_Transfer_Instr_0x74 | |
716 | #define My_H_HT0_Control_Transfer_Instr_0x74 \ | |
717 | done;nop; | |
718 | ||
719 | #define H_T0_Control_Transfer_Instr_0x74 | |
720 | #define My_H_T0_Control_Transfer_Instr_0x74 \ | |
721 | done;nop; | |
722 | ||
723 | #define H_T1_Control_Transfer_Instr_0x74 | |
724 | #define My_H_T1_Control_Transfer_Instr_0x74 \ | |
725 | done;nop; | |
726 | ||
727 | #define H_HT0_IAE_privilege_violation_0x08 | |
728 | #define My_HT0_IAE_privilege_violation_0x08 \ | |
729 | done; nop; | |
730 | #define H_HT0_IAE_unauth_access_0x0b | |
731 | #define SUN_H_HT0_IAE_unauth_access_0x0b \ | |
732 | done; nop; | |
733 | ||
734 | #define H_HT0_data_access_protection_0x6c | |
735 | #define SUN_H_HT0_data_access_protection_0x6c ba daccess_prot_handler; nop | |
736 | ||
737 | !!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!! | |
738 | # 12 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
739 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
740 | !!!!!!!!!!!!!!!! START of Interrupt Handlers !!!!!!!!!!!!!!!!! | |
741 | ||
742 | #define H_HT0_Externally_Initiated_Reset_0x03 | |
743 | #define SUN_H_HT0_Externally_Initiated_Reset_0x03 \ | |
744 | setx External_Reset_Handler, %g1, %g2; \ | |
745 | jmp %g2; \ | |
746 | nop | |
747 | ||
748 | !!!!! HW interrupt handlers | |
749 | ||
750 | #define H_HT0_Interrupt_0x60 | |
751 | #define My_HT0_Interrupt_0x60 \ | |
752 | ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g1 ;\ | |
753 | ldxa [%g0] ASI_SWVR_INTR_R, %g2 ;\ | |
754 | ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g3 ;\ | |
755 | cmp %g1, %g3 ;\ | |
756 | nop; \ | |
757 | retry; | |
758 | ||
759 | !!!!! Queue interrupt handler | |
760 | # 30 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
761 | #define H_T0_Cpu_Mondo_Trap_0x7c | |
762 | #define My_T0_Cpu_Mondo_Trap_0x7c \ | |
763 | mov 0x3c8, %g3; \ | |
764 | ldxa [%g3] 0x25, %g5; \ | |
765 | mov 0x3c0, %g3; \ | |
766 | stxa %g5, [%g3] 0x25; \ | |
767 | retry; \ | |
768 | nop; \ | |
769 | nop; \ | |
770 | nop | |
771 | ||
772 | #define H_T0_Dev_Mondo_Trap_0x7d | |
773 | #define My_T0_Dev_Mondo_Trap_0x7d \ | |
774 | mov 0x3d8, %g3; \ | |
775 | ldxa [%g3] 0x25, %g5; \ | |
776 | mov 0x3d0, %g3; \ | |
777 | stxa %g5, [%g3] 0x25; \ | |
778 | retry; \ | |
779 | nop; \ | |
780 | nop; \ | |
781 | nop | |
782 | ||
783 | #define H_T0_Resumable_Error_0x7e | |
784 | #define My_T0_Resumable_Error_0x7e \ | |
785 | mov 0x3e8, %g3; \ | |
786 | ldxa [%g3] 0x25, %g5; \ | |
787 | mov 0x3e0, %g3; \ | |
788 | stxa %g5, [%g3] 0x25; \ | |
789 | retry; \ | |
790 | nop; \ | |
791 | nop; \ | |
792 | nop | |
793 | ||
794 | #define H_T1_Cpu_Mondo_Trap_0x7c | |
795 | #define My_T1_Cpu_Mondo_Trap_0x7c \ | |
796 | mov 0x3c8, %g3; \ | |
797 | ldxa [%g3] 0x25, %g5; \ | |
798 | mov 0x3c0, %g3; \ | |
799 | stxa %g5, [%g3] 0x25; \ | |
800 | retry; \ | |
801 | nop; \ | |
802 | nop; \ | |
803 | nop | |
804 | ||
805 | #define H_T1_Dev_Mondo_Trap_0x7d | |
806 | #define My_T1_Dev_Mondo_Trap_0x7d \ | |
807 | mov 0x3d8, %g3; \ | |
808 | ldxa [%g3] 0x25, %g5; \ | |
809 | mov 0x3d0, %g3; \ | |
810 | stxa %g5, [%g3] 0x25; \ | |
811 | retry; \ | |
812 | nop; \ | |
813 | nop; \ | |
814 | nop | |
815 | ||
816 | #define H_T1_Resumable_Error_0x7e | |
817 | #define My_T1_Resumable_Error_0x7e \ | |
818 | mov 0x3e8, %g3; \ | |
819 | ldxa [%g3] 0x25, %g5; \ | |
820 | mov 0x3e0, %g3; \ | |
821 | stxa %g5, [%g3] 0x25; \ | |
822 | retry; \ | |
823 | nop; \ | |
824 | nop; \ | |
825 | nop | |
826 | ||
827 | #define H_HT0_Reserved_0x7c | |
828 | #define SUN_H_HT0_Reserved_0x7c \ | |
829 | mov 0x3c8, %g3; \ | |
830 | ldxa [%g3] 0x25, %g5; \ | |
831 | mov 0x3c0, %g3; \ | |
832 | stxa %g5, [%g3] 0x25; \ | |
833 | retry; \ | |
834 | nop; \ | |
835 | nop; \ | |
836 | nop | |
837 | ||
838 | #define H_HT0_Reserved_0x7d | |
839 | #define SUN_H_HT0_Reserved_0x7d \ | |
840 | mov 0x3d8, %g3; \ | |
841 | ldxa [%g3] 0x25, %g5; \ | |
842 | mov 0x3d0, %g3; \ | |
843 | stxa %g5, [%g3] 0x25; \ | |
844 | retry; \ | |
845 | nop; \ | |
846 | nop; \ | |
847 | nop | |
848 | ||
849 | #define H_HT0_Reserved_0x7e | |
850 | #define SUN_H_HT0_Reserved_0x7e \ | |
851 | mov 0x3e8, %g3; \ | |
852 | ldxa [%g3] 0x25, %g5; \ | |
853 | mov 0x3e0, %g3; \ | |
854 | stxa %g5, [%g3] 0x25; \ | |
855 | retry; \ | |
856 | nop; \ | |
857 | nop; \ | |
858 | nop | |
859 | # 130 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
860 | !!!!! Hstick-match trap handler | |
861 | # 133 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
862 | #define H_T0_Reserved_0x5e | |
863 | #define My_T0_Reserved_0x5e \ | |
864 | rdhpr %hintp, %g3; \ | |
865 | wrhpr %g3, %g3, %hintp; \ | |
866 | retry; \ | |
867 | nop; \ | |
868 | nop; \ | |
869 | nop; \ | |
870 | nop; \ | |
871 | nop | |
872 | ||
873 | #define H_HT0_Hstick_Match_0x5e | |
874 | #define My_HT0_Hstick_Match_0x5e \ | |
875 | rdhpr %hintp, %g3; \ | |
876 | wrhpr %g3, %g3, %hintp; \ | |
877 | retry; \ | |
878 | nop; \ | |
879 | nop; \ | |
880 | nop; \ | |
881 | nop; \ | |
882 | nop | |
883 | ||
884 | #define H_T0_Reserved_0x5e | |
885 | #define My_T0_Reserved_0x5e \ | |
886 | rdhpr %hintp, %g3; \ | |
887 | wrhpr %g3, %g3, %hintp; \ | |
888 | retry; \ | |
889 | nop; \ | |
890 | nop; \ | |
891 | nop; \ | |
892 | nop; \ | |
893 | nop | |
894 | ||
895 | #define H_T1_Reserved_0x5e | |
896 | #define My_T1_Reserved_0x5e \ | |
897 | rdhpr %hintp, %g3; \ | |
898 | wrhpr %g3, %g3, %hintp; \ | |
899 | retry; \ | |
900 | nop; \ | |
901 | nop; \ | |
902 | nop; \ | |
903 | nop; \ | |
904 | nop | |
905 | # 178 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
906 | !!!!! SW interuupt handlers | |
907 | # 181 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
908 | #define H_T0_Interrupt_Level_14_0x4e | |
909 | #define My_T0_Interrupt_Level_14_0x4e \ | |
910 | rd %softint, %g3; \ | |
911 | sethi %hi(0x14000), %g3; \ | |
912 | or %g3, 0x1, %g3; \ | |
913 | wr %g3, %g0, %clear_softint; \ | |
914 | retry; \ | |
915 | nop; \ | |
916 | nop; \ | |
917 | nop | |
918 | ||
919 | #define H_T0_Interrupt_Level_1_0x41 | |
920 | #define My_T0_Interrupt_Level_1_0x41 \ | |
921 | rd %softint, %g3; \ | |
922 | or %g0, 0x2, %g3; \ | |
923 | wr %g3, %g0, %clear_softint; \ | |
924 | retry; \ | |
925 | nop; \ | |
926 | nop; \ | |
927 | nop; \ | |
928 | nop | |
929 | ||
930 | #define H_T0_Interrupt_Level_2_0x42 | |
931 | #define My_T0_Interrupt_Level_2_0x42 \ | |
932 | rd %softint, %g3; \ | |
933 | or %g0, 0x4, %g3; \ | |
934 | wr %g3, %g0, %clear_softint; \ | |
935 | retry; \ | |
936 | nop; \ | |
937 | nop; \ | |
938 | nop; \ | |
939 | nop | |
940 | ||
941 | #define H_T0_Interrupt_Level_3_0x43 | |
942 | #define My_T0_Interrupt_Level_3_0x43 \ | |
943 | rd %softint, %g3; \ | |
944 | or %g0, 0x8, %g3; \ | |
945 | wr %g3, %g0, %clear_softint; \ | |
946 | retry; \ | |
947 | nop; \ | |
948 | nop; \ | |
949 | nop; \ | |
950 | nop | |
951 | ||
952 | #define H_T0_Interrupt_Level_4_0x44 | |
953 | #define My_T0_Interrupt_Level_4_0x44 \ | |
954 | rd %softint, %g3; \ | |
955 | or %g0, 0x10, %g3; \ | |
956 | wr %g3, %g0, %clear_softint; \ | |
957 | retry; \ | |
958 | nop; \ | |
959 | nop; \ | |
960 | nop; \ | |
961 | nop | |
962 | ||
963 | #define H_T0_Interrupt_Level_5_0x45 | |
964 | #define My_T0_Interrupt_Level_5_0x45 \ | |
965 | rd %softint, %g3; \ | |
966 | or %g0, 0x20, %g3; \ | |
967 | wr %g3, %g0, %clear_softint; \ | |
968 | retry; \ | |
969 | nop; \ | |
970 | nop; \ | |
971 | nop; \ | |
972 | nop | |
973 | ||
974 | #define H_T0_Interrupt_Level_6_0x46 | |
975 | #define My_T0_Interrupt_Level_6_0x46 \ | |
976 | rd %softint, %g3; \ | |
977 | or %g0, 0x40, %g3; \ | |
978 | wr %g3, %g0, %clear_softint; \ | |
979 | retry; \ | |
980 | nop; \ | |
981 | nop; \ | |
982 | nop; \ | |
983 | nop | |
984 | ||
985 | #define H_T0_Interrupt_Level_7_0x47 | |
986 | #define My_T0_Interrupt_Level_7_0x47 \ | |
987 | rd %softint, %g3; \ | |
988 | or %g0, 0x80, %g3; \ | |
989 | wr %g3, %g0, %clear_softint; \ | |
990 | retry; \ | |
991 | nop; \ | |
992 | nop; \ | |
993 | nop; \ | |
994 | nop | |
995 | ||
996 | #define H_T0_Interrupt_Level_8_0x48 | |
997 | #define My_T0_Interrupt_Level_8_0x48 \ | |
998 | rd %softint, %g3; \ | |
999 | or %g0, 0x100, %g3; \ | |
1000 | wr %g3, %g0, %clear_softint; \ | |
1001 | retry; \ | |
1002 | nop; \ | |
1003 | nop; \ | |
1004 | nop; \ | |
1005 | nop | |
1006 | ||
1007 | #define H_T0_Interrupt_Level_9_0x49 | |
1008 | #define My_T0_Interrupt_Level_9_0x49 \ | |
1009 | rd %softint, %g3; \ | |
1010 | or %g0, 0x200, %g3; \ | |
1011 | wr %g3, %g0, %clear_softint; \ | |
1012 | retry; \ | |
1013 | nop; \ | |
1014 | nop; \ | |
1015 | nop; \ | |
1016 | nop | |
1017 | ||
1018 | #define H_T0_Interrupt_Level_10_0x4a | |
1019 | #define My_T0_Interrupt_Level_10_0x4a \ | |
1020 | rd %softint, %g3; \ | |
1021 | or %g0, 0x400, %g3; \ | |
1022 | wr %g3, %g0, %clear_softint; \ | |
1023 | retry; \ | |
1024 | nop; \ | |
1025 | nop; \ | |
1026 | nop; \ | |
1027 | nop | |
1028 | ||
1029 | #define H_T0_Interrupt_Level_11_0x4b | |
1030 | #define My_T0_Interrupt_Level_11_0x4b \ | |
1031 | rd %softint, %g3; \ | |
1032 | or %g0, 0x800, %g3; \ | |
1033 | wr %g3, %g0, %clear_softint; \ | |
1034 | retry; \ | |
1035 | nop; \ | |
1036 | nop; \ | |
1037 | nop; \ | |
1038 | nop | |
1039 | ||
1040 | #define H_T0_Interrupt_Level_12_0x4c | |
1041 | #define My_T0_Interrupt_Level_12_0x4c \ | |
1042 | rd %softint, %g3; \ | |
1043 | sethi %hi(0x1000), %g3; \ | |
1044 | wr %g3, %g0, %clear_softint; \ | |
1045 | retry; \ | |
1046 | nop; \ | |
1047 | nop; \ | |
1048 | nop; \ | |
1049 | nop | |
1050 | ||
1051 | #define H_T0_Interrupt_Level_13_0x4d | |
1052 | #define My_T0_Interrupt_Level_13_0x4d \ | |
1053 | rd %softint, %g3; \ | |
1054 | sethi %hi(0x2000), %g3; \ | |
1055 | wr %g3, %g0, %clear_softint; \ | |
1056 | retry; \ | |
1057 | nop; \ | |
1058 | nop; \ | |
1059 | nop; \ | |
1060 | nop | |
1061 | ||
1062 | #define H_T0_Interrupt_Level_15_0x4f | |
1063 | #define My_T0_Interrupt_Level_15_0x4f \ | |
1064 | rd %softint, %g3; \ | |
1065 | sethi %hi(0x8000), %g3; \ | |
1066 | wr %g3, %g0, %clear_softint; \ | |
1067 | rd %pcr, %g3; \ | |
1068 | and %g3, 0x300, %g5; \ | |
1069 | wr %g3, %g5, %pcr; \ | |
1070 | retry; \ | |
1071 | nop | |
1072 | ||
1073 | #define H_T1_Interrupt_Level_14_0x4e | |
1074 | #define My_T1_Interrupt_Level_14_0x4e \ | |
1075 | rd %softint, %g3; \ | |
1076 | sethi %hi(0x14000), %g3; \ | |
1077 | or %g3, 0x1, %g3; \ | |
1078 | wr %g3, %g0, %clear_softint; \ | |
1079 | retry; \ | |
1080 | nop; \ | |
1081 | nop; \ | |
1082 | nop | |
1083 | ||
1084 | #define H_T1_Interrupt_Level_1_0x41 | |
1085 | #define My_T1_Interrupt_Level_1_0x41 \ | |
1086 | rd %softint, %g3; \ | |
1087 | or %g0, 0x2, %g3; \ | |
1088 | wr %g3, %g0, %clear_softint; \ | |
1089 | retry; \ | |
1090 | nop; \ | |
1091 | nop; \ | |
1092 | nop; \ | |
1093 | nop | |
1094 | ||
1095 | #define H_T1_Interrupt_Level_2_0x42 | |
1096 | #define My_T1_Interrupt_Level_2_0x42 \ | |
1097 | rd %softint, %g3; \ | |
1098 | or %g0, 0x4, %g3; \ | |
1099 | wr %g3, %g0, %clear_softint; \ | |
1100 | retry; \ | |
1101 | nop; \ | |
1102 | nop; \ | |
1103 | nop; \ | |
1104 | nop | |
1105 | ||
1106 | #define H_T1_Interrupt_Level_3_0x43 | |
1107 | #define My_T1_Interrupt_Level_3_0x43 \ | |
1108 | rd %softint, %g3; \ | |
1109 | or %g0, 0x8, %g3; \ | |
1110 | wr %g3, %g0, %clear_softint; \ | |
1111 | retry; \ | |
1112 | nop; \ | |
1113 | nop; \ | |
1114 | nop; \ | |
1115 | nop | |
1116 | ||
1117 | #define H_T1_Interrupt_Level_4_0x44 | |
1118 | #define My_T1_Interrupt_Level_4_0x44 \ | |
1119 | rd %softint, %g3; \ | |
1120 | or %g0, 0x10, %g3; \ | |
1121 | wr %g3, %g0, %clear_softint; \ | |
1122 | retry; \ | |
1123 | nop; \ | |
1124 | nop; \ | |
1125 | nop; \ | |
1126 | nop | |
1127 | ||
1128 | #define H_T1_Interrupt_Level_5_0x45 | |
1129 | #define My_T1_Interrupt_Level_5_0x45 \ | |
1130 | rd %softint, %g3; \ | |
1131 | or %g0, 0x20, %g3; \ | |
1132 | wr %g3, %g0, %clear_softint; \ | |
1133 | retry; \ | |
1134 | nop; \ | |
1135 | nop; \ | |
1136 | nop; \ | |
1137 | nop | |
1138 | ||
1139 | #define H_T1_Interrupt_Level_6_0x46 | |
1140 | #define My_T1_Interrupt_Level_6_0x46 \ | |
1141 | rd %softint, %g3; \ | |
1142 | or %g0, 0x40, %g3; \ | |
1143 | wr %g3, %g0, %clear_softint; \ | |
1144 | retry; \ | |
1145 | nop; \ | |
1146 | nop; \ | |
1147 | nop; \ | |
1148 | nop | |
1149 | ||
1150 | #define H_T1_Interrupt_Level_7_0x47 | |
1151 | #define My_T1_Interrupt_Level_7_0x47 \ | |
1152 | rd %softint, %g3; \ | |
1153 | or %g0, 0x80, %g3; \ | |
1154 | wr %g3, %g0, %clear_softint; \ | |
1155 | retry; \ | |
1156 | nop; \ | |
1157 | nop; \ | |
1158 | nop; \ | |
1159 | nop | |
1160 | ||
1161 | #define H_T1_Interrupt_Level_8_0x48 | |
1162 | #define My_T1_Interrupt_Level_8_0x48 \ | |
1163 | rd %softint, %g3; \ | |
1164 | or %g0, 0x100, %g3; \ | |
1165 | wr %g3, %g0, %clear_softint; \ | |
1166 | retry; \ | |
1167 | nop; \ | |
1168 | nop; \ | |
1169 | nop; \ | |
1170 | nop | |
1171 | ||
1172 | #define H_T1_Interrupt_Level_9_0x49 | |
1173 | #define My_T1_Interrupt_Level_9_0x49 \ | |
1174 | rd %softint, %g3; \ | |
1175 | or %g0, 0x200, %g3; \ | |
1176 | wr %g3, %g0, %clear_softint; \ | |
1177 | retry; \ | |
1178 | nop; \ | |
1179 | nop; \ | |
1180 | nop; \ | |
1181 | nop | |
1182 | ||
1183 | #define H_T1_Interrupt_Level_10_0x4a | |
1184 | #define My_T1_Interrupt_Level_10_0x4a \ | |
1185 | rd %softint, %g3; \ | |
1186 | or %g0, 0x400, %g3; \ | |
1187 | wr %g3, %g0, %clear_softint; \ | |
1188 | retry; \ | |
1189 | nop; \ | |
1190 | nop; \ | |
1191 | nop; \ | |
1192 | nop | |
1193 | ||
1194 | #define H_T1_Interrupt_Level_11_0x4b | |
1195 | #define My_T1_Interrupt_Level_11_0x4b \ | |
1196 | rd %softint, %g3; \ | |
1197 | or %g0, 0x800, %g3; \ | |
1198 | wr %g3, %g0, %clear_softint; \ | |
1199 | retry; \ | |
1200 | nop; \ | |
1201 | nop; \ | |
1202 | nop; \ | |
1203 | nop | |
1204 | ||
1205 | #define H_T1_Interrupt_Level_12_0x4c | |
1206 | #define My_T1_Interrupt_Level_12_0x4c \ | |
1207 | rd %softint, %g3; \ | |
1208 | sethi %hi(0x1000), %g3; \ | |
1209 | wr %g3, %g0, %clear_softint; \ | |
1210 | retry; \ | |
1211 | nop; \ | |
1212 | nop; \ | |
1213 | nop; \ | |
1214 | nop | |
1215 | ||
1216 | #define H_T1_Interrupt_Level_13_0x4d | |
1217 | #define My_T1_Interrupt_Level_13_0x4d \ | |
1218 | rd %softint, %g3; \ | |
1219 | sethi %hi(0x2000), %g3; \ | |
1220 | wr %g3, %g0, %clear_softint; \ | |
1221 | retry; \ | |
1222 | nop; \ | |
1223 | nop; \ | |
1224 | nop; \ | |
1225 | nop | |
1226 | ||
1227 | #define H_T1_Interrupt_Level_15_0x4f | |
1228 | #define My_T1_Interrupt_Level_15_0x4f \ | |
1229 | rd %softint, %g3; \ | |
1230 | sethi %hi(0x8000), %g3; \ | |
1231 | wr %g3, %g0, %clear_softint; \ | |
1232 | rd %pcr, %g3; \ | |
1233 | and %g3, 0x300, %g5; \ | |
1234 | wr %g3, %g5, %pcr; \ | |
1235 | retry; \ | |
1236 | nop | |
1237 | ||
1238 | #define H_HT0_Interrupt_Level_14_0x4e | |
1239 | #define My_HT0_Interrupt_Level_14_0x4e \ | |
1240 | rd %softint, %g3; \ | |
1241 | sethi %hi(0x14000), %g3; \ | |
1242 | or %g3, 0x1, %g3; \ | |
1243 | wr %g3, %g0, %clear_softint; \ | |
1244 | retry; \ | |
1245 | nop; \ | |
1246 | nop; \ | |
1247 | nop | |
1248 | ||
1249 | #define H_HT0_Interrupt_Level_1_0x41 | |
1250 | #define My_HT0_Interrupt_Level_1_0x41 \ | |
1251 | rd %softint, %g3; \ | |
1252 | or %g0, 0x2, %g3; \ | |
1253 | wr %g3, %g0, %clear_softint; \ | |
1254 | retry; \ | |
1255 | nop; \ | |
1256 | nop; \ | |
1257 | nop; \ | |
1258 | nop | |
1259 | ||
1260 | #define H_HT0_Interrupt_Level_2_0x42 | |
1261 | #define My_HT0_Interrupt_Level_2_0x42 \ | |
1262 | rd %softint, %g3; \ | |
1263 | or %g0, 0x4, %g3; \ | |
1264 | wr %g3, %g0, %clear_softint; \ | |
1265 | retry; \ | |
1266 | nop; \ | |
1267 | nop; \ | |
1268 | nop; \ | |
1269 | nop | |
1270 | ||
1271 | #define H_HT0_Interrupt_Level_3_0x43 | |
1272 | #define My_HT0_Interrupt_Level_3_0x43 \ | |
1273 | rd %softint, %g3; \ | |
1274 | or %g0, 0x8, %g3; \ | |
1275 | wr %g3, %g0, %clear_softint; \ | |
1276 | retry; \ | |
1277 | nop; \ | |
1278 | nop; \ | |
1279 | nop; \ | |
1280 | nop | |
1281 | ||
1282 | #define H_HT0_Interrupt_Level_4_0x44 | |
1283 | #define My_HT0_Interrupt_Level_4_0x44 \ | |
1284 | rd %softint, %g3; \ | |
1285 | or %g0, 0x10, %g3; \ | |
1286 | wr %g3, %g0, %clear_softint; \ | |
1287 | retry; \ | |
1288 | nop; \ | |
1289 | nop; \ | |
1290 | nop; \ | |
1291 | nop | |
1292 | ||
1293 | #define H_HT0_Interrupt_Level_5_0x45 | |
1294 | #define My_HT0_Interrupt_Level_5_0x45 \ | |
1295 | rd %softint, %g3; \ | |
1296 | or %g0, 0x20, %g3; \ | |
1297 | wr %g3, %g0, %clear_softint; \ | |
1298 | retry; \ | |
1299 | nop; \ | |
1300 | nop; \ | |
1301 | nop; \ | |
1302 | nop | |
1303 | ||
1304 | #define H_HT0_Interrupt_Level_6_0x46 | |
1305 | #define My_HT0_Interrupt_Level_6_0x46 \ | |
1306 | rd %softint, %g3; \ | |
1307 | or %g0, 0x40, %g3; \ | |
1308 | wr %g3, %g0, %clear_softint; \ | |
1309 | retry; \ | |
1310 | nop; \ | |
1311 | nop; \ | |
1312 | nop; \ | |
1313 | nop | |
1314 | ||
1315 | #define H_HT0_Interrupt_Level_7_0x47 | |
1316 | #define My_HT0_Interrupt_Level_7_0x47 \ | |
1317 | rd %softint, %g3; \ | |
1318 | or %g0, 0x80, %g3; \ | |
1319 | wr %g3, %g0, %clear_softint; \ | |
1320 | retry; \ | |
1321 | nop; \ | |
1322 | nop; \ | |
1323 | nop; \ | |
1324 | nop | |
1325 | ||
1326 | #define H_HT0_Interrupt_Level_8_0x48 | |
1327 | #define My_HT0_Interrupt_Level_8_0x48 \ | |
1328 | rd %softint, %g3; \ | |
1329 | or %g0, 0x100, %g3; \ | |
1330 | wr %g3, %g0, %clear_softint; \ | |
1331 | retry; \ | |
1332 | nop; \ | |
1333 | nop; \ | |
1334 | nop; \ | |
1335 | nop | |
1336 | ||
1337 | #define H_HT0_Interrupt_Level_9_0x49 | |
1338 | #define My_HT0_Interrupt_Level_9_0x49 \ | |
1339 | rd %softint, %g3; \ | |
1340 | or %g0, 0x200, %g3; \ | |
1341 | wr %g3, %g0, %clear_softint; \ | |
1342 | retry; \ | |
1343 | nop; \ | |
1344 | nop; \ | |
1345 | nop; \ | |
1346 | nop | |
1347 | ||
1348 | #define H_HT0_Interrupt_Level_10_0x4a | |
1349 | #define My_HT0_Interrupt_Level_10_0x4a \ | |
1350 | rd %softint, %g3; \ | |
1351 | or %g0, 0x400, %g3; \ | |
1352 | wr %g3, %g0, %clear_softint; \ | |
1353 | retry; \ | |
1354 | nop; \ | |
1355 | nop; \ | |
1356 | nop; \ | |
1357 | nop | |
1358 | ||
1359 | #define H_HT0_Interrupt_Level_11_0x4b | |
1360 | #define My_HT0_Interrupt_Level_11_0x4b \ | |
1361 | rd %softint, %g3; \ | |
1362 | or %g0, 0x800, %g3; \ | |
1363 | wr %g3, %g0, %clear_softint; \ | |
1364 | retry; \ | |
1365 | nop; \ | |
1366 | nop; \ | |
1367 | nop; \ | |
1368 | nop | |
1369 | ||
1370 | #define H_HT0_Interrupt_Level_12_0x4c | |
1371 | #define My_HT0_Interrupt_Level_12_0x4c \ | |
1372 | rd %softint, %g3; \ | |
1373 | sethi %hi(0x1000), %g3; \ | |
1374 | wr %g3, %g0, %clear_softint; \ | |
1375 | retry; \ | |
1376 | nop; \ | |
1377 | nop; \ | |
1378 | nop; \ | |
1379 | nop | |
1380 | ||
1381 | #define H_HT0_Interrupt_Level_13_0x4d | |
1382 | #define My_HT0_Interrupt_Level_13_0x4d \ | |
1383 | rd %softint, %g3; \ | |
1384 | sethi %hi(0x2000), %g3; \ | |
1385 | wr %g3, %g0, %clear_softint; \ | |
1386 | retry; \ | |
1387 | nop; \ | |
1388 | nop; \ | |
1389 | nop; \ | |
1390 | nop | |
1391 | ||
1392 | #define H_HT0_Interrupt_Level_15_0x4f | |
1393 | #define My_HT0_Interrupt_Level_15_0x4f \ | |
1394 | rd %softint, %g3; \ | |
1395 | sethi %hi(0x8000), %g3; \ | |
1396 | wr %g3, %g0, %clear_softint; \ | |
1397 | rd %pcr, %g3; \ | |
1398 | and %g3, 0x300, %g4; \ | |
1399 | wr %g3, %g4, %pcr; \ | |
1400 | retry; \ | |
1401 | nop | |
1402 | # 677 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
1403 | ||
1404 | #define H_HT0_mem_address_range_0x2e | |
1405 | #define SUN_H_HT0_mem_address_range_0x2e \ | |
1406 | done;nop | |
1407 | ||
1408 | !!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!! | |
1409 | # 210 "diag.j" | |
1410 | ||
1411 | #define H_HT0_Instruction_address_range_0x0d | |
1412 | #define SUN_H_HT0_Instruction_address_range_0x0d \ | |
1413 | done;nop | |
1414 | ||
1415 | #include "hboot.s" | |
1416 | .text | |
1417 | .global main | |
1418 | main: | |
1419 | ||
1420 | ! Set up ld/st area per thread | |
1421 | ta T_RD_THID ! Result in %o1 = r9 | |
1422 | umul %r9, 256, %r31 | |
1423 | setx user_data_start, %r1, %r3 | |
1424 | add %r31, %r3, %r31 | |
1425 | wr %r0, 0x4, %asi | |
1426 | ||
1427 | !Initializing integer registers | |
1428 | ldx [%r31+0], %r0 | |
1429 | ldx [%r31+8], %r1 | |
1430 | ldx [%r31+16], %r2 | |
1431 | ldx [%r31+24], %r3 | |
1432 | ldx [%r31+32], %r4 | |
1433 | ldx [%r31+40], %r5 | |
1434 | ldx [%r31+48], %r6 | |
1435 | ldx [%r31+56], %r7 | |
1436 | ldx [%r31+64], %r8 | |
1437 | ldx [%r31+72], %r9 | |
1438 | ldx [%r31+80], %r10 | |
1439 | ldx [%r31+88], %r11 | |
1440 | ldx [%r31+96], %r12 | |
1441 | ldx [%r31+104], %r13 | |
1442 | ldx [%r31+112], %r14 | |
1443 | mov %r31, %r15 | |
1444 | ldx [%r31+128], %r16 | |
1445 | ldx [%r31+136], %r17 | |
1446 | ldx [%r31+144], %r18 | |
1447 | ldx [%r31+152], %r19 | |
1448 | ldx [%r31+160], %r20 | |
1449 | ldx [%r31+168], %r21 | |
1450 | ldx [%r31+176], %r22 | |
1451 | ldx [%r31+184], %r23 | |
1452 | ldx [%r31+192], %r24 | |
1453 | ldx [%r31+200], %r25 | |
1454 | ldx [%r31+208], %r26 | |
1455 | ldx [%r31+216], %r27 | |
1456 | ldx [%r31+224], %r28 | |
1457 | ldx [%r31+232], %r29 | |
1458 | mov 0xb3, %r14 | |
1459 | mov 0x30, %r30 | |
1460 | save %r31, %r0, %r31 | |
1461 | ldx [%r31+0], %r0 | |
1462 | ldx [%r31+8], %r1 | |
1463 | ldx [%r31+16], %r2 | |
1464 | ldx [%r31+24], %r3 | |
1465 | ldx [%r31+32], %r4 | |
1466 | ldx [%r31+40], %r5 | |
1467 | ldx [%r31+48], %r6 | |
1468 | ldx [%r31+56], %r7 | |
1469 | ldx [%r31+64], %r8 | |
1470 | ldx [%r31+72], %r9 | |
1471 | ldx [%r31+80], %r10 | |
1472 | ldx [%r31+88], %r11 | |
1473 | ldx [%r31+96], %r12 | |
1474 | ldx [%r31+104], %r13 | |
1475 | ldx [%r31+112], %r14 | |
1476 | mov %r31, %r15 | |
1477 | ldx [%r31+128], %r16 | |
1478 | ldx [%r31+136], %r17 | |
1479 | ldx [%r31+144], %r18 | |
1480 | ldx [%r31+152], %r19 | |
1481 | ldx [%r31+160], %r20 | |
1482 | ldx [%r31+168], %r21 | |
1483 | ldx [%r31+176], %r22 | |
1484 | ldx [%r31+184], %r23 | |
1485 | ldx [%r31+192], %r24 | |
1486 | ldx [%r31+200], %r25 | |
1487 | ldx [%r31+208], %r26 | |
1488 | ldx [%r31+216], %r27 | |
1489 | ldx [%r31+224], %r28 | |
1490 | ldx [%r31+232], %r29 | |
1491 | mov 0x31, %r14 | |
1492 | mov 0xb0, %r30 | |
1493 | save %r31, %r0, %r31 | |
1494 | ldx [%r31+0], %r0 | |
1495 | ldx [%r31+8], %r1 | |
1496 | ldx [%r31+16], %r2 | |
1497 | ldx [%r31+24], %r3 | |
1498 | ldx [%r31+32], %r4 | |
1499 | ldx [%r31+40], %r5 | |
1500 | ldx [%r31+48], %r6 | |
1501 | ldx [%r31+56], %r7 | |
1502 | ldx [%r31+64], %r8 | |
1503 | ldx [%r31+72], %r9 | |
1504 | ldx [%r31+80], %r10 | |
1505 | ldx [%r31+88], %r11 | |
1506 | ldx [%r31+96], %r12 | |
1507 | ldx [%r31+104], %r13 | |
1508 | ldx [%r31+112], %r14 | |
1509 | mov %r31, %r15 | |
1510 | ldx [%r31+128], %r16 | |
1511 | ldx [%r31+136], %r17 | |
1512 | ldx [%r31+144], %r18 | |
1513 | ldx [%r31+152], %r19 | |
1514 | ldx [%r31+160], %r20 | |
1515 | ldx [%r31+168], %r21 | |
1516 | ldx [%r31+176], %r22 | |
1517 | ldx [%r31+184], %r23 | |
1518 | ldx [%r31+192], %r24 | |
1519 | ldx [%r31+200], %r25 | |
1520 | ldx [%r31+208], %r26 | |
1521 | ldx [%r31+216], %r27 | |
1522 | ldx [%r31+224], %r28 | |
1523 | ldx [%r31+232], %r29 | |
1524 | mov 0x33, %r14 | |
1525 | mov 0xb5, %r30 | |
1526 | save %r31, %r0, %r31 | |
1527 | ldx [%r31+0], %r0 | |
1528 | ldx [%r31+8], %r1 | |
1529 | ldx [%r31+16], %r2 | |
1530 | ldx [%r31+24], %r3 | |
1531 | ldx [%r31+32], %r4 | |
1532 | ldx [%r31+40], %r5 | |
1533 | ldx [%r31+48], %r6 | |
1534 | ldx [%r31+56], %r7 | |
1535 | ldx [%r31+64], %r8 | |
1536 | ldx [%r31+72], %r9 | |
1537 | ldx [%r31+80], %r10 | |
1538 | ldx [%r31+88], %r11 | |
1539 | ldx [%r31+96], %r12 | |
1540 | ldx [%r31+104], %r13 | |
1541 | ldx [%r31+112], %r14 | |
1542 | mov %r31, %r15 | |
1543 | ldx [%r31+128], %r16 | |
1544 | ldx [%r31+136], %r17 | |
1545 | ldx [%r31+144], %r18 | |
1546 | ldx [%r31+152], %r19 | |
1547 | ldx [%r31+160], %r20 | |
1548 | ldx [%r31+168], %r21 | |
1549 | ldx [%r31+176], %r22 | |
1550 | ldx [%r31+184], %r23 | |
1551 | ldx [%r31+192], %r24 | |
1552 | ldx [%r31+200], %r25 | |
1553 | ldx [%r31+208], %r26 | |
1554 | ldx [%r31+216], %r27 | |
1555 | ldx [%r31+224], %r28 | |
1556 | ldx [%r31+232], %r29 | |
1557 | mov 0xb1, %r14 | |
1558 | mov 0x33, %r30 | |
1559 | save %r31, %r0, %r31 | |
1560 | ldx [%r31+0], %r0 | |
1561 | ldx [%r31+8], %r1 | |
1562 | ldx [%r31+16], %r2 | |
1563 | ldx [%r31+24], %r3 | |
1564 | ldx [%r31+32], %r4 | |
1565 | ldx [%r31+40], %r5 | |
1566 | ldx [%r31+48], %r6 | |
1567 | ldx [%r31+56], %r7 | |
1568 | ldx [%r31+64], %r8 | |
1569 | ldx [%r31+72], %r9 | |
1570 | ldx [%r31+80], %r10 | |
1571 | ldx [%r31+88], %r11 | |
1572 | ldx [%r31+96], %r12 | |
1573 | ldx [%r31+104], %r13 | |
1574 | ldx [%r31+112], %r14 | |
1575 | mov %r31, %r15 | |
1576 | ldx [%r31+128], %r16 | |
1577 | ldx [%r31+136], %r17 | |
1578 | ldx [%r31+144], %r18 | |
1579 | ldx [%r31+152], %r19 | |
1580 | ldx [%r31+160], %r20 | |
1581 | ldx [%r31+168], %r21 | |
1582 | ldx [%r31+176], %r22 | |
1583 | ldx [%r31+184], %r23 | |
1584 | ldx [%r31+192], %r24 | |
1585 | ldx [%r31+200], %r25 | |
1586 | ldx [%r31+208], %r26 | |
1587 | ldx [%r31+216], %r27 | |
1588 | ldx [%r31+224], %r28 | |
1589 | ldx [%r31+232], %r29 | |
1590 | mov 0xb4, %r14 | |
1591 | mov 0x34, %r30 | |
1592 | save %r31, %r0, %r31 | |
1593 | ldx [%r31+0], %r0 | |
1594 | ldx [%r31+8], %r1 | |
1595 | ldx [%r31+16], %r2 | |
1596 | ldx [%r31+24], %r3 | |
1597 | ldx [%r31+32], %r4 | |
1598 | ldx [%r31+40], %r5 | |
1599 | ldx [%r31+48], %r6 | |
1600 | ldx [%r31+56], %r7 | |
1601 | ldx [%r31+64], %r8 | |
1602 | ldx [%r31+72], %r9 | |
1603 | ldx [%r31+80], %r10 | |
1604 | ldx [%r31+88], %r11 | |
1605 | ldx [%r31+96], %r12 | |
1606 | ldx [%r31+104], %r13 | |
1607 | ldx [%r31+112], %r14 | |
1608 | mov %r31, %r15 | |
1609 | ldx [%r31+128], %r16 | |
1610 | ldx [%r31+136], %r17 | |
1611 | ldx [%r31+144], %r18 | |
1612 | ldx [%r31+152], %r19 | |
1613 | ldx [%r31+160], %r20 | |
1614 | ldx [%r31+168], %r21 | |
1615 | ldx [%r31+176], %r22 | |
1616 | ldx [%r31+184], %r23 | |
1617 | ldx [%r31+192], %r24 | |
1618 | ldx [%r31+200], %r25 | |
1619 | ldx [%r31+208], %r26 | |
1620 | ldx [%r31+216], %r27 | |
1621 | ldx [%r31+224], %r28 | |
1622 | ldx [%r31+232], %r29 | |
1623 | mov 0xb1, %r14 | |
1624 | mov 0xb5, %r30 | |
1625 | save %r31, %r0, %r31 | |
1626 | ldx [%r31+0], %r0 | |
1627 | ldx [%r31+8], %r1 | |
1628 | ldx [%r31+16], %r2 | |
1629 | ldx [%r31+24], %r3 | |
1630 | ldx [%r31+32], %r4 | |
1631 | ldx [%r31+40], %r5 | |
1632 | ldx [%r31+48], %r6 | |
1633 | ldx [%r31+56], %r7 | |
1634 | ldx [%r31+64], %r8 | |
1635 | ldx [%r31+72], %r9 | |
1636 | ldx [%r31+80], %r10 | |
1637 | ldx [%r31+88], %r11 | |
1638 | ldx [%r31+96], %r12 | |
1639 | ldx [%r31+104], %r13 | |
1640 | ldx [%r31+112], %r14 | |
1641 | mov %r31, %r15 | |
1642 | ldx [%r31+128], %r16 | |
1643 | ldx [%r31+136], %r17 | |
1644 | ldx [%r31+144], %r18 | |
1645 | ldx [%r31+152], %r19 | |
1646 | ldx [%r31+160], %r20 | |
1647 | ldx [%r31+168], %r21 | |
1648 | ldx [%r31+176], %r22 | |
1649 | ldx [%r31+184], %r23 | |
1650 | ldx [%r31+192], %r24 | |
1651 | ldx [%r31+200], %r25 | |
1652 | ldx [%r31+208], %r26 | |
1653 | ldx [%r31+216], %r27 | |
1654 | ldx [%r31+224], %r28 | |
1655 | ldx [%r31+232], %r29 | |
1656 | mov 0x31, %r14 | |
1657 | mov 0x33, %r30 | |
1658 | save %r31, %r0, %r31 | |
1659 | restore | |
1660 | restore | |
1661 | restore | |
1662 | !Initializing float registers | |
1663 | ldd [%r31+0], %f0 | |
1664 | ldd [%r31+16], %f2 | |
1665 | ldd [%r31+32], %f4 | |
1666 | ldd [%r31+48], %f6 | |
1667 | ldd [%r31+64], %f8 | |
1668 | ldd [%r31+80], %f10 | |
1669 | ldd [%r31+96], %f12 | |
1670 | ldd [%r31+112], %f14 | |
1671 | ldd [%r31+128], %f16 | |
1672 | ldd [%r31+144], %f18 | |
1673 | ldd [%r31+160], %f20 | |
1674 | ldd [%r31+176], %f22 | |
1675 | ldd [%r31+192], %f24 | |
1676 | ldd [%r31+208], %f26 | |
1677 | ldd [%r31+224], %f28 | |
1678 | ldd [%r31+240], %f30 | |
1679 | !! Set TPC/TNPC to diag-finish in case we get to a strange TL .. | |
1680 | ta T_CHANGE_HPRIV | |
1681 | setx diag_finish, %r29, %r28 | |
1682 | add %r28, 4, %r29 | |
1683 | wrpr %g0, 1, %tl | |
1684 | wrpr %r28, %tpc | |
1685 | wrpr %r29, %tnpc | |
1686 | wrpr %g0, 2, %tl | |
1687 | wrpr %r28, %tpc | |
1688 | wrpr %r29, %tnpc | |
1689 | wrpr %g0, 3, %tl | |
1690 | wrpr %r28, %tpc | |
1691 | wrpr %r29, %tnpc | |
1692 | wrpr %g0, 4, %tl | |
1693 | wrpr %r28, %tpc | |
1694 | wrpr %r29, %tnpc | |
1695 | wrpr %g0, 5, %tl | |
1696 | wrpr %r28, %tpc | |
1697 | wrpr %r29, %tnpc | |
1698 | wrpr %g0, 6, %tl | |
1699 | wrpr %r28, %tpc | |
1700 | wrpr %r29, %tnpc | |
1701 | wrpr %g0, 0, %tl | |
1702 | ||
1703 | ta T_CHANGE_HPRIV | |
1704 | ||
1705 | !Initializing Tick Cmprs | |
1706 | mov 1, %g2 | |
1707 | sllx %g2, 63, %g2 | |
1708 | or %g1, %g2, %g1 | |
1709 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
1710 | wr %g1, %g0, %tick_cmpr | |
1711 | wr %g1, %g0, %sys_tick_cmpr | |
1712 | ta T_CHANGE_NONHPRIV | |
1713 | ||
1714 | .word 0xe0dfe010 ! 1: LDXA_I ldxa [%r31, + 0x0010] %asi, %r16 | |
1715 | .word 0x8790229b ! 2: WRPR_TT_I wrpr %r0, 0x029b, %tt | |
1716 | .word 0xe0800c40 ! 3: LDUWA_R lduwa [%r0, %r0] 0x62, %r16 | |
1717 | .word 0xa1902005 ! 4: WRPR_GL_I wrpr %r0, 0x0005, %- | |
1718 | .word 0xe137e001 ! 5: STQF_I - %f16, [0x0001, %r31] | |
1719 | .word 0x87802063 ! 6: WRASI_I wr %r0, 0x0063, %asi | |
1720 | ta T_CHANGE_PRIV ! macro | |
1721 | .word 0xe00fe001 ! 8: LDUB_I ldub [%r31 + 0x0001], %r16 | |
1722 | .word 0xa7802001 ! 9: WR_GRAPHICS_STATUS_REG_I wr %r0, 0x0001, %- | |
1723 | DS_0_0: | |
1724 | nop | |
1725 | not %g0, %g2 | |
1726 | .word 0x9d902004 ! 10: WRPR_WSTATE_I wrpr %r0, 0x0004, %wstate | |
1727 | splash_lsu_0_1: | |
1728 | set 0x15, %r2 | |
1729 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
1730 | .word 0x3d400001 ! 11: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
1731 | .word 0x8790206c ! 12: WRPR_TT_I wrpr %r0, 0x006c, %tt | |
1732 | .word 0xe0c80e60 ! 13: LDSBA_R ldsba [%r0, %r0] 0x73, %r16 | |
1733 | ta T_CHANGE_HPRIV ! macro | |
1734 | .word 0xe0800aa0 ! 15: LDUWA_R lduwa [%r0, %r0] 0x55, %r16 | |
1735 | .word 0xe0c7e030 ! 16: LDSWA_I ldswa [%r31, + 0x0030] %asi, %r16 | |
1736 | .word 0xa1902001 ! 17: WRPR_GL_I wrpr %r0, 0x0001, %- | |
1737 | .word 0xe197e001 ! 18: LDQFA_I - [%r31, 0x0001], %f16 | |
1738 | .word 0x8d9028f2 ! 19: WRPR_PSTATE_I wrpr %r0, 0x08f2, %pstate | |
1739 | .word 0xe04fe001 ! 20: LDSB_I ldsb [%r31 + 0x0001], %r16 | |
1740 | .word 0xe197e001 ! 21: LDQFA_I - [%r31, 0x0001], %f16 | |
1741 | .word 0xe0c004a0 ! 22: LDSWA_R ldswa [%r0, %r0] 0x25, %r16 | |
1742 | DS_0_2: | |
1743 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
1744 | pdist %f4, %f30, %f2 | |
1745 | .word 0x93b10312 ! 23: ALIGNADDRESS alignaddr %r4, %r18, %r9 | |
1746 | .word 0x8d902019 ! 24: WRPR_PSTATE_I wrpr %r0, 0x0019, %pstate | |
1747 | .word 0x93902001 ! 25: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
1748 | ta T_CHANGE_PRIV ! macro | |
1749 | otherw | |
1750 | mov 0x31, %r30 | |
1751 | .word 0x91d0001e ! 27: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
1752 | tagged_0_3: | |
1753 | taddcctv %r11, 0x1805, %r6 | |
1754 | .word 0xd207e001 ! 28: LDUW_I lduw [%r31 + 0x0001], %r9 | |
1755 | DS_0_4: | |
1756 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
1757 | .word 0xbfe7c000 ! 29: SAVE_R save %r31, %r0, %r31 | |
1758 | .word 0xa4dac002 ! 30: SMULcc_R smulcc %r11, %r2, %r18 | |
1759 | .word 0x95514000 ! 31: RDPR_TBA rdpr %tba, %r10 | |
1760 | .word 0x2c800001 ! 32: BNEG bneg,a <label_0x1> | |
1761 | set 0xcf499fc3, %r28 | |
1762 | stxa %r28, [%g0] 0x73 | |
1763 | intvec_0_5: | |
1764 | .word 0x39400001 ! 33: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1765 | splash_lsu_0_6: | |
1766 | set 0x11, %r2 | |
1767 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
1768 | .word 0x3d400001 ! 34: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
1769 | .word 0x87802004 ! 35: WRASI_I wr %r0, 0x0004, %asi | |
1770 | .word 0x91d02034 ! 36: Tcc_I ta icc_or_xcc, %r0 + 52 | |
1771 | change_to_randtl_0_7: | |
1772 | ta T_CHANGE_HPRIV ! macro | |
1773 | done_change_to_randtl_0_7: | |
1774 | .word 0x8f902003 ! 37: WRPR_TL_I wrpr %r0, 0x0003, %tl | |
1775 | .word 0xd51fe001 ! 38: LDDF_I ldd [%r31, 0x0001], %f10 | |
1776 | .word 0xd42fe001 ! 39: STB_I stb %r10, [%r31 + 0x0001] | |
1777 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_8)) -> intp(0,1,3) | |
1778 | xir_0_8: | |
1779 | .word 0xa9852001 ! 40: WR_SET_SOFTINT_I wr %r20, 0x0001, %set_softint | |
1780 | .word 0xd4d80e60 ! 41: LDXA_R ldxa [%r0, %r0] 0x73, %r10 | |
1781 | .word 0xa9500000 ! 42: RDPR_TPC <illegal instruction> | |
1782 | .word 0xe847c000 ! 43: LDSW_R ldsw [%r31 + %r0], %r20 | |
1783 | .word 0x91932001 ! 44: WRPR_PIL_I wrpr %r12, 0x0001, %pil | |
1784 | DS_0_9: | |
1785 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
1786 | .word 0xd9306001 ! 1: STQF_I - %f12, [0x0001, %r1] | |
1787 | normalw | |
1788 | .word 0x8d458000 ! 45: RD_SOFTINT_REG rd %softint, %r6 | |
1789 | .word 0x87802020 ! 46: WRASI_I wr %r0, 0x0020, %asi | |
1790 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_10)) -> intp(0,0,2) | |
1791 | intvec_0_10: | |
1792 | .word 0x39400001 ! 47: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1793 | .word 0x8790233d ! 48: WRPR_TT_I wrpr %r0, 0x033d, %tt | |
1794 | mondo_0_11: | |
1795 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
1796 | ||
1797 | stxa %r4, [%r0+0x3e0] %asi | |
1798 | .word 0x9d924001 ! 49: WRPR_WSTATE_R wrpr %r9, %r1, %wstate | |
1799 | .word 0x87902199 ! 50: WRPR_TT_I wrpr %r0, 0x0199, %tt | |
1800 | invalw | |
1801 | mov 0xb3, %r30 | |
1802 | .word 0x83d0001e ! 51: Tcc_R te icc_or_xcc, %r0 + %r30 | |
1803 | .word 0xa1902009 ! 52: WRPR_GL_I wrpr %r0, 0x0009, %- | |
1804 | .word 0xcc1fc000 ! 53: LDD_R ldd [%r31 + %r0], %r6 | |
1805 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_12)) -> intp(0,1,3) | |
1806 | xir_0_12: | |
1807 | .word 0xa9816001 ! 54: WR_SET_SOFTINT_I wr %r5, 0x0001, %set_softint | |
1808 | .word 0x8790228d ! 55: WRPR_TT_I wrpr %r0, 0x028d, %tt | |
1809 | otherw | |
1810 | mov 0x35, %r30 | |
1811 | .word 0x91d0001e ! 56: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
1812 | .word 0xa190200a ! 57: WRPR_GL_I wrpr %r0, 0x000a, %- | |
1813 | .word 0x8f450000 ! 58: RD_SET_SOFTINT rd %set_softint, %r7 | |
1814 | .word 0xcf37e001 ! 59: STQF_I - %f7, [0x0001, %r31] | |
1815 | set 0xac8a656, %r28 | |
1816 | stxa %r28, [%g0] 0x73 | |
1817 | intvec_0_13: | |
1818 | .word 0x39400001 ! 60: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1819 | .word 0x30700001 ! 61: BPA <illegal instruction> | |
1820 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_14)) -> intp(0,0,5) | |
1821 | intvec_0_14: | |
1822 | .word 0x39400001 ! 62: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1823 | .word 0xa9464000 ! 63: RD_STICK_CMPR_REG rd %-, %r20 | |
1824 | .word 0x8f902002 ! 1: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
1825 | ta T_CHANGE_NONHPRIV ! macro | |
1826 | .word 0x976ae001 ! 64: SDIVX_I sdivx %r11, 0x0001, %r11 | |
1827 | .word 0xd64fc000 ! 65: LDSB_R ldsb [%r31 + %r0], %r11 | |
1828 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_16)) -> intp(0,0,27) | |
1829 | intvec_0_16: | |
1830 | .word 0x39400001 ! 66: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1831 | change_to_randtl_0_17: | |
1832 | ta T_CHANGE_HPRIV ! macro | |
1833 | done_change_to_randtl_0_17: | |
1834 | .word 0x8f902004 ! 67: WRPR_TL_I wrpr %r0, 0x0004, %tl | |
1835 | .word 0x879020d2 ! 68: WRPR_TT_I wrpr %r0, 0x00d2, %tt | |
1836 | tagged_0_18: | |
1837 | tsubcctv %r21, 0x13e3, %r8 | |
1838 | .word 0xd607e001 ! 69: LDUW_I lduw [%r31 + 0x0001], %r11 | |
1839 | .word 0xad816001 ! 70: WR_SOFTINT_REG_I wr %r5, 0x0001, %softint | |
1840 | splash_tba_0_19: | |
1841 | set 0x120000, %r2 | |
1842 | ld [%r2+%r0], %r1 | |
1843 | ta T_CHANGE_PRIV | |
1844 | set 0x120000, %r2 | |
1845 | .word 0x8b900002 ! 71: WRPR_TBA_R wrpr %r0, %r2, %tba | |
1846 | .word 0xd737c001 ! 72: STQF_R - %f11, [%r1, %r31] | |
1847 | splash_lsu_0_20: | |
1848 | set 0xd, %r2 | |
1849 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
1850 | .word 0x3d400001 ! 73: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
1851 | .word 0xd64fc000 ! 74: LDSB_R ldsb [%r31 + %r0], %r11 | |
1852 | .word 0xd797e001 ! 75: LDQFA_I - [%r31, 0x0001], %f11 | |
1853 | set 0x89cceac8, %r28 | |
1854 | stxa %r28, [%g0] 0x73 | |
1855 | intvec_0_21: | |
1856 | .word 0x39400001 ! 76: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1857 | .word 0xd68008a0 ! 77: LDUWA_R lduwa [%r0, %r0] 0x45, %r11 | |
1858 | .word 0xd737e001 ! 78: STQF_I - %f11, [0x0001, %r31] | |
1859 | .word 0x91d02032 ! 79: Tcc_I ta icc_or_xcc, %r0 + 50 | |
1860 | .word 0xd6880e80 ! 80: LDUBA_R lduba [%r0, %r0] 0x74, %r11 | |
1861 | DS_0_22: | |
1862 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
1863 | .word 0xe7334011 ! 1: STQF_R - %f19, [%r17, %r13] | |
1864 | normalw | |
1865 | .word 0x85458000 ! 81: RD_SOFTINT_REG rd %softint, %r2 | |
1866 | ta T_CHANGE_PRIV ! macro | |
1867 | .word 0x2c700001 ! 83: BPNEG <illegal instruction> | |
1868 | .word 0xc40fe001 ! 84: LDUB_I ldub [%r31 + 0x0001], %r2 | |
1869 | .word 0x99902005 ! 85: WRPR_CLEANWIN_I wrpr %r0, 0x0005, %cleanwin | |
1870 | DS_0_23: | |
1871 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
1872 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
1873 | .word 0xa5a00553 ! 1: FSQRTd fsqrt | |
1874 | .word 0x97a50834 ! 86: FADDs fadds %f20, %f20, %f11 | |
1875 | .word 0xd647e001 ! 87: LDSW_I ldsw [%r31 + 0x0001], %r11 | |
1876 | .word 0xd717c000 ! 88: LDQF_R - [%r31, %r0], %f11 | |
1877 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_24)) -> intp(0,1,3) | |
1878 | xir_0_24: | |
1879 | .word 0xa9842001 ! 89: WR_SET_SOFTINT_I wr %r16, 0x0001, %set_softint | |
1880 | .word 0x8f480000 ! 90: RDHPR_HPSTATE rdhpr %hpstate, %r7 | |
1881 | splash_lsu_0_25: | |
1882 | set 0x13, %r2 | |
1883 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
1884 | .word 0x3d400001 ! 91: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
1885 | .word 0x91d020b2 ! 92: Tcc_I ta icc_or_xcc, %r0 + 178 | |
1886 | .word 0x9f802001 ! 93: SIR sir 0x0001 | |
1887 | .word 0xce77c014 ! 94: STX_R stx %r7, [%r31 + %r20] | |
1888 | .word 0xcf97e001 ! 95: LDQFA_I - [%r31, 0x0001], %f7 | |
1889 | .word 0x93902007 ! 96: WRPR_CWP_I wrpr %r0, 0x0007, %cwp | |
1890 | .word 0xce8008a0 ! 97: LDUWA_R lduwa [%r0, %r0] 0x45, %r7 | |
1891 | .word 0x81982a9d ! 98: WRHPR_HPSTATE_I wrhpr %r0, 0x0a9d, %hpstate | |
1892 | DS_0_26: | |
1893 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
1894 | pdist %f26, %f22, %f24 | |
1895 | .word 0x89b1c300 ! 99: ALIGNADDRESS alignaddr %r7, %r0, %r4 | |
1896 | .word 0xa1902006 ! 100: WRPR_GL_I wrpr %r0, 0x0006, %- | |
1897 | tagged_0_27: | |
1898 | taddcctv %r7, 0x1132, %r8 | |
1899 | .word 0xc807e001 ! 101: LDUW_I lduw [%r31 + 0x0001], %r4 | |
1900 | .word 0xab840014 ! 102: WR_CLEAR_SOFTINT_R wr %r16, %r20, %clear_softint | |
1901 | .word 0xc917c000 ! 103: LDQF_R - [%r31, %r0], %f4 | |
1902 | .word 0x8198235f ! 104: WRHPR_HPSTATE_I wrhpr %r0, 0x035f, %hpstate | |
1903 | .word 0xc8c7e020 ! 105: LDSWA_I ldswa [%r31, + 0x0020] %asi, %r4 | |
1904 | .word 0xc8c7e010 ! 106: LDSWA_I ldswa [%r31, + 0x0010] %asi, %r4 | |
1905 | .word 0xc8c7e030 ! 107: LDSWA_I ldswa [%r31, + 0x0030] %asi, %r4 | |
1906 | .word 0x87802004 ! 108: WRASI_I wr %r0, 0x0004, %asi | |
1907 | .word 0xc91fe001 ! 109: LDDF_I ldd [%r31, 0x0001], %f4 | |
1908 | .word 0xc88008a0 ! 110: LDUWA_R lduwa [%r0, %r0] 0x45, %r4 | |
1909 | splash_tba_0_28: | |
1910 | set 0x120000, %r2 | |
1911 | st %r1, [%r2+%r0] | |
1912 | ta T_CHANGE_PRIV | |
1913 | set 0x120000, %r2 | |
1914 | .word 0x8b900002 ! 111: WRPR_TBA_R wrpr %r0, %r2, %tba | |
1915 | ta T_CHANGE_HPRIV ! macro | |
1916 | .word 0x3a800001 ! 113: BCC bcc,a <label_0x1> | |
1917 | .word 0xc81fe001 ! 114: LDD_I ldd [%r31 + 0x0001], %r4 | |
1918 | mondo_0_29: | |
1919 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
1920 | ||
1921 | stxa %r9, [%r0+0x3c0] %asi | |
1922 | .word 0x9d934008 ! 115: WRPR_WSTATE_R wrpr %r13, %r8, %wstate | |
1923 | .word 0xc937c008 ! 116: STQF_R - %f4, [%r8, %r31] | |
1924 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_30)) -> intp(0,0,19) | |
1925 | intvec_0_30: | |
1926 | .word 0x39400001 ! 117: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1927 | set 0x8d832c73, %r28 | |
1928 | stxa %r28, [%g0] 0x73 | |
1929 | intvec_0_31: | |
1930 | .word 0x39400001 ! 118: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1931 | invalw | |
1932 | mov 0xb4, %r30 | |
1933 | .word 0x83d0001e ! 119: Tcc_R te icc_or_xcc, %r0 + %r30 | |
1934 | .word 0x8780201c ! 120: WRASI_I wr %r0, 0x001c, %asi | |
1935 | .word 0x8d902b38 ! 121: WRPR_PSTATE_I wrpr %r0, 0x0b38, %pstate | |
1936 | splash_htba_0_32: | |
1937 | set 0x80000, %r2 | |
1938 | st %r1, [%r2+%r0] | |
1939 | ta T_CHANGE_HPRIV | |
1940 | set 0x80000, %r2 | |
1941 | .word 0x8b980002 ! 122: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
1942 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_33)) -> intp(0,1,3) | |
1943 | xir_0_33: | |
1944 | .word 0xa9836001 ! 123: WR_SET_SOFTINT_I wr %r13, 0x0001, %set_softint | |
1945 | .word 0xc91fe001 ! 124: LDDF_I ldd [%r31, 0x0001], %f4 | |
1946 | .word 0x8f902002 ! 1: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
1947 | ta T_CHANGE_NONPRIV ! macro | |
1948 | .word 0x99696001 ! 125: SDIVX_I sdivx %r5, 0x0001, %r12 | |
1949 | .word 0xa1902009 ! 126: WRPR_GL_I wrpr %r0, 0x0009, %- | |
1950 | mondo_0_35: | |
1951 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
1952 | ||
1953 | stxa %r5, [%r0+0x3e8] %asi | |
1954 | .word 0x9d914013 ! 127: WRPR_WSTATE_R wrpr %r5, %r19, %wstate | |
1955 | .word 0x8d90232a ! 128: WRPR_PSTATE_I wrpr %r0, 0x032a, %pstate | |
1956 | DS_0_36: | |
1957 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
1958 | .word 0xd9306001 ! 1: STQF_I - %f12, [0x0001, %r1] | |
1959 | normalw | |
1960 | .word 0x8b458000 ! 129: RD_SOFTINT_REG rd %softint, %r5 | |
1961 | .word 0x8da509f1 ! 130: FDIVq dis not found | |
1962 | ||
1963 | .word 0xcd37c011 ! 131: STQF_R - %f6, [%r17, %r31] | |
1964 | .word 0xcc37c011 ! 132: STH_R sth %r6, [%r31 + %r17] | |
1965 | .word 0x87802016 ! 133: WRASI_I wr %r0, 0x0016, %asi | |
1966 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
1967 | ta T_CHANGE_NONHPRIV ! macro | |
1968 | .word 0xb1804013 ! 134: WR_STICK_REG_R wr %r1, %r19, %- | |
1969 | .word 0x87902254 ! 135: WRPR_TT_I wrpr %r0, 0x0254, %tt | |
1970 | .word 0x99480000 ! 136: RDHPR_HPSTATE rdhpr %hpstate, %r12 | |
1971 | .word 0xa1902003 ! 137: WRPR_GL_I wrpr %r0, 0x0003, %- | |
1972 | splash_htba_0_38: | |
1973 | set 0x80000, %r2 | |
1974 | st %r1, [%r2+%r0] | |
1975 | ta T_CHANGE_HPRIV | |
1976 | set 0x80000, %r2 | |
1977 | .word 0x8b980002 ! 138: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
1978 | .word 0x93902001 ! 139: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
1979 | .word 0xd82fc013 ! 140: STB_R stb %r12, [%r31 + %r19] | |
1980 | .word 0xd8d80e80 ! 141: LDXA_R ldxa [%r0, %r0] 0x74, %r12 | |
1981 | .word 0x83d020b2 ! 142: Tcc_I te icc_or_xcc, %r0 + 178 | |
1982 | DS_0_39: | |
1983 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
1984 | .word 0xbfe7c000 ! 143: SAVE_R save %r31, %r0, %r31 | |
1985 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_40)) -> intp(0,1,3) | |
1986 | xir_0_40: | |
1987 | .word 0xa984a001 ! 144: WR_SET_SOFTINT_I wr %r18, 0x0001, %set_softint | |
1988 | splash_lsu_0_41: | |
1989 | set 0x1d, %r2 | |
1990 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
1991 | .word 0x3d400001 ! 145: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
1992 | .word 0xd84fc000 ! 146: LDSB_R ldsb [%r31 + %r0], %r12 | |
1993 | .word 0xd897e000 ! 147: LDUHA_I lduha [%r31, + 0x0000] %asi, %r12 | |
1994 | .word 0x93902001 ! 148: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
1995 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_42)) -> intp(0,0,27) | |
1996 | intvec_0_42: | |
1997 | .word 0x39400001 ! 149: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
1998 | .word 0xd91fe001 ! 150: LDDF_I ldd [%r31, 0x0001], %f12 | |
1999 | .word 0xd927e001 ! 151: STF_I st %f12, [0x0001, %r31] | |
2000 | mondo_0_43: | |
2001 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2002 | ||
2003 | stxa %r19, [%r0+0x3e0] %asi | |
2004 | .word 0x9d944000 ! 152: WRPR_WSTATE_R wrpr %r17, %r0, %wstate | |
2005 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_44)) -> intp(0,0,12) | |
2006 | intvec_0_44: | |
2007 | .word 0x39400001 ! 153: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2008 | .word 0xd89fc020 ! 154: LDDA_R ldda [%r31, %r0] 0x01, %r12 | |
2009 | .word 0x9f802001 ! 155: SIR sir 0x0001 | |
2010 | .word 0xd8dfe020 ! 156: LDXA_I ldxa [%r31, + 0x0020] %asi, %r12 | |
2011 | .word 0x91d02034 ! 157: Tcc_I ta icc_or_xcc, %r0 + 52 | |
2012 | .word 0x93d020b4 ! 158: Tcc_I tne icc_or_xcc, %r0 + 180 | |
2013 | .word 0x8d9028f8 ! 159: WRPR_PSTATE_I wrpr %r0, 0x08f8, %pstate | |
2014 | .word 0x83d020b2 ! 160: Tcc_I te icc_or_xcc, %r0 + 178 | |
2015 | set 0x9b35fdfa, %r28 | |
2016 | stxa %r28, [%g0] 0x73 | |
2017 | intvec_0_45: | |
2018 | .word 0x39400001 ! 161: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2019 | .word 0x99902005 ! 162: WRPR_CLEANWIN_I wrpr %r0, 0x0005, %cleanwin | |
2020 | invalw | |
2021 | mov 0x32, %r30 | |
2022 | .word 0x91d0001e ! 163: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2023 | .word 0x87902168 ! 164: WRPR_TT_I wrpr %r0, 0x0168, %tt | |
2024 | invalw | |
2025 | mov 0x32, %r30 | |
2026 | .word 0x91d0001e ! 165: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2027 | .word 0xd84fe001 ! 166: LDSB_I ldsb [%r31 + 0x0001], %r12 | |
2028 | .word 0xd8c804a0 ! 167: LDSBA_R ldsba [%r0, %r0] 0x25, %r12 | |
2029 | splash_lsu_0_46: | |
2030 | set 0x17, %r2 | |
2031 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2032 | .word 0x3d400001 ! 168: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2033 | .word 0x93902002 ! 169: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
2034 | .word 0x83a18dd1 ! 170: FdMULq fdmulq | |
2035 | .word 0x8780201c ! 171: WRASI_I wr %r0, 0x001c, %asi | |
2036 | .word 0x93902000 ! 172: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
2037 | mondo_0_47: | |
2038 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2039 | ||
2040 | stxa %r20, [%r0+0x3e8] %asi | |
2041 | .word 0x9d95000b ! 173: WRPR_WSTATE_R wrpr %r20, %r11, %wstate | |
2042 | .word 0xc28008a0 ! 174: LDUWA_R lduwa [%r0, %r0] 0x45, %r1 | |
2043 | .word 0xc28008a0 ! 175: LDUWA_R lduwa [%r0, %r0] 0x45, %r1 | |
2044 | DS_0_48: | |
2045 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
2046 | .xword 0xdb78349e ! Random illegal ? | |
2047 | .word 0xd914c010 ! 1: LDQF_R - [%r19, %r16], %f12 | |
2048 | .word 0x8da4882c ! 176: FADDs fadds %f18, %f12, %f6 | |
2049 | .word 0xcc8008a0 ! 177: LDUWA_R lduwa [%r0, %r0] 0x45, %r6 | |
2050 | change_to_randtl_0_49: | |
2051 | ta T_CHANGE_HPRIV ! macro | |
2052 | done_change_to_randtl_0_49: | |
2053 | .word 0x8f902003 ! 178: WRPR_TL_I wrpr %r0, 0x0003, %tl | |
2054 | invalw | |
2055 | mov 0x34, %r30 | |
2056 | .word 0x91d0001e ! 179: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2057 | splash_lsu_0_50: | |
2058 | set 0x13, %r2 | |
2059 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2060 | .word 0x3d400001 ! 180: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2061 | .word 0xcc9fc020 ! 181: LDDA_R ldda [%r31, %r0] 0x01, %r6 | |
2062 | .word 0xa9454000 ! 182: RD_CLEAR_SOFTINT rd %clear_softint, %r20 | |
2063 | .word 0x87802020 ! 183: WRASI_I wr %r0, 0x0020, %asi | |
2064 | .word 0x99902001 ! 184: WRPR_CLEANWIN_I wrpr %r0, 0x0001, %cleanwin | |
2065 | .word 0xe807c000 ! 185: LDUW_R lduw [%r31 + %r0], %r20 | |
2066 | .word 0x81a00574 ! 186: FSQRTq fsqrt | |
2067 | .word 0x8780204f ! 187: WRASI_I wr %r0, 0x004f, %asi | |
2068 | splash_lsu_0_51: | |
2069 | set 0x13, %r2 | |
2070 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2071 | .word 0x3d400001 ! 188: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2072 | invalw | |
2073 | mov 0xb5, %r30 | |
2074 | .word 0x91d0001e ! 189: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2075 | invalw | |
2076 | mov 0x33, %r30 | |
2077 | .word 0x91d0001e ! 190: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2078 | DS_0_52: | |
2079 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
2080 | .xword 0xf95178ac ! Random illegal ? | |
2081 | .word 0x9ba00554 ! 1: FSQRTd fsqrt | |
2082 | .word 0x89a20825 ! 191: FADDs fadds %f8, %f5, %f4 | |
2083 | .word 0xc89fe001 ! 192: LDDA_I ldda [%r31, + 0x0001] %asi, %r4 | |
2084 | .word 0x91d02032 ! 193: Tcc_I ta icc_or_xcc, %r0 + 50 | |
2085 | set 0xef238a28, %r28 | |
2086 | stxa %r28, [%g0] 0x73 | |
2087 | intvec_0_53: | |
2088 | .word 0x39400001 ! 194: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2089 | .word 0x81a44dc9 ! 195: FdMULq fdmulq | |
2090 | invalw | |
2091 | mov 0xb5, %r30 | |
2092 | .word 0x91d0001e ! 196: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2093 | .word 0xc127c009 ! 197: STF_R st %f0, [%r9, %r31] | |
2094 | .word 0xc0dfe010 ! 198: LDXA_I ldxa [%r31, + 0x0010] %asi, %r0 | |
2095 | .word 0xc08008a0 ! 199: LDUWA_R lduwa [%r0, %r0] 0x45, %r0 | |
2096 | .word 0xc0c004a0 ! 200: LDSWA_R ldswa [%r0, %r0] 0x25, %r0 | |
2097 | .word 0x99902000 ! 201: WRPR_CLEANWIN_I wrpr %r0, 0x0000, %cleanwin | |
2098 | .word 0x8d9023d7 ! 202: WRPR_PSTATE_I wrpr %r0, 0x03d7, %pstate | |
2099 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_54)) -> intp(0,0,5) | |
2100 | intvec_0_54: | |
2101 | .word 0x39400001 ! 203: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2102 | .word 0x9f802001 ! 204: SIR sir 0x0001 | |
2103 | .word 0x8d9026b7 ! 205: WRPR_PSTATE_I wrpr %r0, 0x06b7, %pstate | |
2104 | .word 0x8ba00542 ! 206: FSQRTd fsqrt | |
2105 | .word 0xa190200c ! 207: WRPR_GL_I wrpr %r0, 0x000c, %- | |
2106 | .word 0xcadfe030 ! 208: LDXA_I ldxa [%r31, + 0x0030] %asi, %r5 | |
2107 | .word 0x83d02032 ! 209: Tcc_I te icc_or_xcc, %r0 + 50 | |
2108 | .word 0x84848014 ! 210: ADDcc_R addcc %r18, %r20, %r2 | |
2109 | .word 0x93902006 ! 211: WRPR_CWP_I wrpr %r0, 0x0006, %cwp | |
2110 | splash_lsu_0_55: | |
2111 | set 0x5, %r2 | |
2112 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2113 | .word 0x3d400001 ! 212: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2114 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_56)) -> intp(0,0,22) | |
2115 | intvec_0_56: | |
2116 | .word 0x39400001 ! 213: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2117 | .word 0xc48008a0 ! 214: LDUWA_R lduwa [%r0, %r0] 0x45, %r2 | |
2118 | tagged_0_57: | |
2119 | taddcctv %r11, 0x14fc, %r21 | |
2120 | .word 0xc407e001 ! 215: LDUW_I lduw [%r31 + 0x0001], %r2 | |
2121 | .word 0xc48008a0 ! 216: LDUWA_R lduwa [%r0, %r0] 0x45, %r2 | |
2122 | DS_0_58: | |
2123 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
2124 | .xword 0xcd5efaac ! Random illegal ? | |
2125 | .word 0x8da00554 ! 1: FSQRTd fsqrt | |
2126 | .word 0x97a28822 ! 217: FADDs fadds %f10, %f2, %f11 | |
2127 | .word 0x93902005 ! 218: WRPR_CWP_I wrpr %r0, 0x0005, %cwp | |
2128 | .word 0x93902002 ! 219: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
2129 | splash_tba_0_59: | |
2130 | set 0x120000, %r2 | |
2131 | ld [%r2+%r0], %r1 | |
2132 | ta T_CHANGE_PRIV | |
2133 | set 0x120000, %r2 | |
2134 | .word 0x8b900002 ! 220: WRPR_TBA_R wrpr %r0, %r2, %tba | |
2135 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_60)) -> intp(0,0,23) | |
2136 | intvec_0_60: | |
2137 | .word 0x39400001 ! 221: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2138 | set 0xee0917ac, %r28 | |
2139 | stxa %r28, [%g0] 0x73 | |
2140 | intvec_0_61: | |
2141 | .word 0x39400001 ! 222: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2142 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_62)) -> intp(0,1,3) | |
2143 | xir_0_62: | |
2144 | .word 0xa9802001 ! 223: WR_SET_SOFTINT_I wr %r0, 0x0001, %set_softint | |
2145 | splash_cmpr_0_63: | |
2146 | nop | |
2147 | mov 1, %g2 | |
2148 | sllx %g2, 63, %g2 | |
2149 | or %g1, %g2, %g1 | |
2150 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
2151 | .word 0xb184e001 ! 224: WR_STICK_REG_I wr %r19, 0x0001, %- | |
2152 | .word 0x93902007 ! 225: WRPR_CWP_I wrpr %r0, 0x0007, %cwp | |
2153 | .word 0xd647c000 ! 226: LDSW_R ldsw [%r31 + %r0], %r11 | |
2154 | .word 0xd607c000 ! 227: LDUW_R lduw [%r31 + %r0], %r11 | |
2155 | .word 0x87802014 ! 228: WRASI_I wr %r0, 0x0014, %asi | |
2156 | invalw | |
2157 | mov 0x31, %r30 | |
2158 | .word 0x93d0001e ! 229: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
2159 | splash_lsu_0_64: | |
2160 | set 0x11, %r2 | |
2161 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2162 | .word 0x3d400001 ! 230: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2163 | otherw | |
2164 | mov 0xb5, %r30 | |
2165 | .word 0x83d0001e ! 231: Tcc_R te icc_or_xcc, %r0 + %r30 | |
2166 | splash_lsu_0_65: | |
2167 | set 0xb, %r2 | |
2168 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2169 | .word 0x3d400001 ! 232: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2170 | DS_0_66: | |
2171 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
2172 | .word 0xcf336001 ! 1: STQF_I - %f7, [0x0001, %r13] | |
2173 | normalw | |
2174 | .word 0x91458000 ! 233: RD_SOFTINT_REG rd %softint, %r8 | |
2175 | ta T_CHANGE_HPRIV ! macro | |
2176 | otherw | |
2177 | mov 0x31, %r30 | |
2178 | .word 0x91d0001e ! 235: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2179 | .word 0xa190200f ! 236: WRPR_GL_I wrpr %r0, 0x000f, %- | |
2180 | otherw | |
2181 | mov 0xb3, %r30 | |
2182 | .word 0x91d0001e ! 237: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2183 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_67)) -> intp(0,1,3) | |
2184 | xir_0_67: | |
2185 | .word 0xa9852001 ! 238: WR_SET_SOFTINT_I wr %r20, 0x0001, %set_softint | |
2186 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_68)) -> intp(0,0,15) | |
2187 | intvec_0_68: | |
2188 | .word 0x39400001 ! 239: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2189 | .word 0x8d902b18 ! 240: WRPR_PSTATE_I wrpr %r0, 0x0b18, %pstate | |
2190 | .word 0x81982306 ! 241: WRHPR_HPSTATE_I wrhpr %r0, 0x0306, %hpstate | |
2191 | mondo_0_69: | |
2192 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2193 | ||
2194 | stxa %r20, [%r0+0x3c8] %asi | |
2195 | .word 0x9d94400b ! 242: WRPR_WSTATE_R wrpr %r17, %r11, %wstate | |
2196 | .word 0x879023ff ! 243: WRPR_TT_I wrpr %r0, 0x03ff, %tt | |
2197 | .word 0xd01fc000 ! 244: LDD_R ldd [%r31 + %r0], %r8 | |
2198 | .word 0x81a01a61 ! 245: FqTOi fqtoi | |
2199 | .word 0x8790208b ! 246: WRPR_TT_I wrpr %r0, 0x008b, %tt | |
2200 | .word 0x36800001 ! 247: BGE bge,a <label_0x1> | |
2201 | .word 0xc08008a0 ! 248: LDUWA_R lduwa [%r0, %r0] 0x45, %r0 | |
2202 | mondo_0_70: | |
2203 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2204 | ||
2205 | stxa %r1, [%r0+0x3e0] %asi | |
2206 | .word 0x9d91000c ! 249: WRPR_WSTATE_R wrpr %r4, %r12, %wstate | |
2207 | splash_lsu_0_71: | |
2208 | set 0xb, %r2 | |
2209 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2210 | .word 0x3d400001 ! 250: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2211 | .word 0x93902006 ! 251: WRPR_CWP_I wrpr %r0, 0x0006, %cwp | |
2212 | .word 0xc097e020 ! 252: LDUHA_I lduha [%r31, + 0x0020] %asi, %r0 | |
2213 | change_to_randtl_0_72: | |
2214 | ta T_CHANGE_PRIV ! macro | |
2215 | done_change_to_randtl_0_72: | |
2216 | .word 0x8f902001 ! 253: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
2217 | .word 0x8790238f ! 254: WRPR_TT_I wrpr %r0, 0x038f, %tt | |
2218 | set 0x70bc526e, %r28 | |
2219 | stxa %r28, [%g0] 0x73 | |
2220 | intvec_0_73: | |
2221 | .word 0x39400001 ! 255: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2222 | splash_htba_0_74: | |
2223 | set 0x80000, %r2 | |
2224 | st %r1, [%r2+%r0] | |
2225 | ta T_CHANGE_HPRIV | |
2226 | set 0x80000, %r2 | |
2227 | .word 0x8b980002 ! 256: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
2228 | DS_0_75: | |
2229 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
2230 | .word 0xbfefc000 ! 257: RESTORE_R restore %r31, %r0, %r31 | |
2231 | .word 0xc13fe001 ! 258: STDF_I std %f0, [0x0001, %r31] | |
2232 | .word 0x8d902c7d ! 259: WRPR_PSTATE_I wrpr %r0, 0x0c7d, %pstate | |
2233 | .word 0xc0d80e60 ! 260: LDXA_R ldxa [%r0, %r0] 0x73, %r0 | |
2234 | .word 0xad852001 ! 261: WR_SOFTINT_REG_I wr %r20, 0x0001, %softint | |
2235 | invalw | |
2236 | mov 0xb0, %r30 | |
2237 | .word 0x91d0001e ! 262: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2238 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_76)) -> intp(0,0,4) | |
2239 | intvec_0_76: | |
2240 | .word 0x39400001 ! 263: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2241 | DS_0_77: | |
2242 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
2243 | pdist %f10, %f18, %f4 | |
2244 | .word 0xa9b10314 ! 264: ALIGNADDRESS alignaddr %r4, %r20, %r20 | |
2245 | change_to_randtl_0_78: | |
2246 | ta T_CHANGE_PRIV ! macro | |
2247 | done_change_to_randtl_0_78: | |
2248 | .word 0x8f902002 ! 265: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
2249 | .word 0x91d020b3 ! 266: Tcc_I ta icc_or_xcc, %r0 + 179 | |
2250 | .word 0x83d020b4 ! 267: Tcc_I te icc_or_xcc, %r0 + 180 | |
2251 | .word 0xe847e001 ! 268: LDSW_I ldsw [%r31 + 0x0001], %r20 | |
2252 | .word 0x93902001 ! 269: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
2253 | .word 0xe89fe001 ! 270: LDDA_I ldda [%r31, + 0x0001] %asi, %r20 | |
2254 | ta T_CHANGE_HPRIV ! macro | |
2255 | tagged_0_79: | |
2256 | taddcctv %r22, 0x19f2, %r8 | |
2257 | .word 0xe807e001 ! 272: LDUW_I lduw [%r31 + 0x0001], %r20 | |
2258 | mondo_0_80: | |
2259 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2260 | ||
2261 | stxa %r19, [%r0+0x3c0] %asi | |
2262 | .word 0x9d940011 ! 273: WRPR_WSTATE_R wrpr %r16, %r17, %wstate | |
2263 | .word 0xe857e001 ! 274: LDSH_I ldsh [%r31 + 0x0001], %r20 | |
2264 | .word 0x99902002 ! 275: WRPR_CLEANWIN_I wrpr %r0, 0x0002, %cleanwin | |
2265 | .word 0xe8c80e80 ! 276: LDSBA_R ldsba [%r0, %r0] 0x74, %r20 | |
2266 | tagged_0_81: | |
2267 | taddcctv %r14, 0x127d, %r24 | |
2268 | .word 0xe807e001 ! 277: LDUW_I lduw [%r31 + 0x0001], %r20 | |
2269 | .word 0xe88008a0 ! 278: LDUWA_R lduwa [%r0, %r0] 0x45, %r20 | |
2270 | .word 0x80d24010 ! 279: UMULcc_R umulcc %r9, %r16, %r0 | |
2271 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
2272 | ta T_CHANGE_NONPRIV ! macro | |
2273 | .word 0x8568e001 ! 280: SDIVX_I sdivx %r3, 0x0001, %r2 | |
2274 | otherw | |
2275 | mov 0x31, %r30 | |
2276 | .word 0x91d0001e ! 281: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2277 | .word 0x2c800001 ! 282: BNEG bneg,a <label_0x1> | |
2278 | DS_0_83: | |
2279 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
2280 | .word 0xbfefc000 ! 283: RESTORE_R restore %r31, %r0, %r31 | |
2281 | .word 0x91d02034 ! 284: Tcc_I ta icc_or_xcc, %r0 + 52 | |
2282 | .word 0x846c400d ! 285: UDIVX_R udivx %r17, %r13, %r2 | |
2283 | .word 0x85508000 ! 286: RDPR_TSTATE rdpr %tstate, %r2 | |
2284 | DS_0_84: | |
2285 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
2286 | .word 0xbfe7c000 ! 287: SAVE_R save %r31, %r0, %r31 | |
2287 | set 0x27132129, %r28 | |
2288 | stxa %r28, [%g0] 0x73 | |
2289 | intvec_0_85: | |
2290 | .word 0x39400001 ! 288: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2291 | .word 0x8d902608 ! 289: WRPR_PSTATE_I wrpr %r0, 0x0608, %pstate | |
2292 | .word 0xc447e001 ! 290: LDSW_I ldsw [%r31 + 0x0001], %r2 | |
2293 | .word 0xc4cfe030 ! 291: LDSBA_I ldsba [%r31, + 0x0030] %asi, %r2 | |
2294 | invalw | |
2295 | mov 0x32, %r30 | |
2296 | .word 0x91d0001e ! 292: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2297 | .word 0x87802089 ! 293: WRASI_I wr %r0, 0x0089, %asi | |
2298 | .word 0x81460000 ! 294: RD_STICK_REG stbar | |
2299 | .word 0x81b01021 ! 295: SIAM siam 1 | |
2300 | DS_0_86: | |
2301 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
2302 | .word 0xbfefc000 ! 296: RESTORE_R restore %r31, %r0, %r31 | |
2303 | otherw | |
2304 | mov 0xb2, %r30 | |
2305 | .word 0x91d0001e ! 297: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2306 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_87)) -> intp(0,1,3) | |
2307 | xir_0_87: | |
2308 | .word 0xa984e001 ! 298: WR_SET_SOFTINT_I wr %r19, 0x0001, %set_softint | |
2309 | .word 0xc41fc000 ! 299: LDD_R ldd [%r31 + %r0], %r2 | |
2310 | invalw | |
2311 | mov 0x33, %r30 | |
2312 | .word 0x91d0001e ! 300: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2313 | splash_tba_0_88: | |
2314 | set 0x120000, %r2 | |
2315 | st %r1, [%r2+%r0] | |
2316 | ta T_CHANGE_PRIV | |
2317 | set 0x120000, %r2 | |
2318 | .word 0x8b900002 ! 301: WRPR_TBA_R wrpr %r0, %r2, %tba | |
2319 | splash_lsu_0_89: | |
2320 | set 0xd, %r2 | |
2321 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2322 | .word 0x3d400001 ! 302: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2323 | splash_lsu_0_90: | |
2324 | set 0x9, %r2 | |
2325 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2326 | .word 0x3d400001 ! 303: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2327 | .word 0xc517c000 ! 304: LDQF_R - [%r31, %r0], %f2 | |
2328 | .word 0xa66c2001 ! 305: UDIVX_I udivx %r16, 0x0001, %r19 | |
2329 | .word 0xe64fe001 ! 306: LDSB_I ldsb [%r31 + 0x0001], %r19 | |
2330 | .word 0xa1902008 ! 307: WRPR_GL_I wrpr %r0, 0x0008, %- | |
2331 | .word 0x93d02035 ! 308: Tcc_I tne icc_or_xcc, %r0 + 53 | |
2332 | .word 0xa4fa8012 ! 309: SDIVcc_R sdivcc %r10, %r18, %r18 | |
2333 | DS_0_91: | |
2334 | nop | |
2335 | not %g0, %g2 | |
2336 | .word 0x9d902001 ! 310: WRPR_WSTATE_I wrpr %r0, 0x0001, %wstate | |
2337 | .word 0xe40fe001 ! 311: LDUB_I ldub [%r31 + 0x0001], %r18 | |
2338 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_92)) -> intp(0,1,3) | |
2339 | xir_0_92: | |
2340 | .word 0xa9846001 ! 312: WR_SET_SOFTINT_I wr %r17, 0x0001, %set_softint | |
2341 | otherw | |
2342 | mov 0xb4, %r30 | |
2343 | .word 0x91d0001e ! 313: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2344 | .word 0x8780204f ! 314: WRASI_I wr %r0, 0x004f, %asi | |
2345 | .word 0xe49fc020 ! 315: LDDA_R ldda [%r31, %r0] 0x01, %r18 | |
2346 | .word 0x8d90271e ! 316: WRPR_PSTATE_I wrpr %r0, 0x071e, %pstate | |
2347 | .word 0xa190200f ! 317: WRPR_GL_I wrpr %r0, 0x000f, %- | |
2348 | otherw | |
2349 | mov 0x34, %r30 | |
2350 | .word 0x91d0001e ! 318: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2351 | .word 0xe527c012 ! 319: STF_R st %f18, [%r18, %r31] | |
2352 | tagged_0_93: | |
2353 | taddcctv %r2, 0x1a7c, %r14 | |
2354 | .word 0xe407e001 ! 320: LDUW_I lduw [%r31 + 0x0001], %r18 | |
2355 | .word 0xe4c00e40 ! 321: LDSWA_R ldswa [%r0, %r0] 0x72, %r18 | |
2356 | .word 0xa1902005 ! 322: WRPR_GL_I wrpr %r0, 0x0005, %- | |
2357 | .word 0x8d802000 ! 323: WRFPRS_I wr %r0, 0x0000, %fprs | |
2358 | .word 0x93d02034 ! 324: Tcc_I tne icc_or_xcc, %r0 + 52 | |
2359 | .word 0xe40fe001 ! 325: LDUB_I ldub [%r31 + 0x0001], %r18 | |
2360 | .word 0xe51fe001 ! 326: LDDF_I ldd [%r31, 0x0001], %f18 | |
2361 | .word 0x99902003 ! 327: WRPR_CLEANWIN_I wrpr %r0, 0x0003, %cleanwin | |
2362 | DS_0_94: | |
2363 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
2364 | .xword 0x897ff4d0 ! Random illegal ? | |
2365 | .word 0x89a00550 ! 1: FSQRTd fsqrt | |
2366 | .word 0x93a28821 ! 328: FADDs fadds %f10, %f1, %f9 | |
2367 | .word 0xd297e020 ! 329: LDUHA_I lduha [%r31, + 0x0020] %asi, %r9 | |
2368 | splash_htba_0_95: | |
2369 | set 0x80000, %r2 | |
2370 | ld [%r2+%r0], %r1 | |
2371 | ta T_CHANGE_HPRIV | |
2372 | set 0x80000, %r2 | |
2373 | .word 0x8b980002 ! 330: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
2374 | .word 0x81460000 ! 331: RD_STICK_REG stbar | |
2375 | .word 0xd28008a0 ! 332: LDUWA_R lduwa [%r0, %r0] 0x45, %r9 | |
2376 | .word 0xd317c000 ! 333: LDQF_R - [%r31, %r0], %f9 | |
2377 | .word 0xd2cfe030 ! 334: LDSBA_I ldsba [%r31, + 0x0030] %asi, %r9 | |
2378 | change_to_randtl_0_96: | |
2379 | ta T_CHANGE_PRIV ! macro | |
2380 | done_change_to_randtl_0_96: | |
2381 | .word 0x8f902002 ! 335: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
2382 | tagged_0_97: | |
2383 | taddcctv %r12, 0x1104, %r3 | |
2384 | .word 0xd207e001 ! 336: LDUW_I lduw [%r31 + 0x0001], %r9 | |
2385 | .word 0xd2900e80 ! 337: LDUHA_R lduha [%r0, %r0] 0x74, %r9 | |
2386 | mondo_0_98: | |
2387 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2388 | ||
2389 | stxa %r20, [%r0+0x3d0] %asi | |
2390 | .word 0x9d900009 ! 338: WRPR_WSTATE_R wrpr %r0, %r9, %wstate | |
2391 | .word 0x83500000 ! 339: RDPR_TPC rdpr %tpc, %r1 | |
2392 | .word 0x93902007 ! 340: WRPR_CWP_I wrpr %r0, 0x0007, %cwp | |
2393 | .word 0xc28008a0 ! 341: LDUWA_R lduwa [%r0, %r0] 0x45, %r1 | |
2394 | splash_cmpr_0_99: | |
2395 | nop | |
2396 | mov 1, %g2 | |
2397 | sllx %g2, 63, %g2 | |
2398 | or %g1, %g2, %g1 | |
2399 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
2400 | .word 0xb184a001 ! 342: WR_STICK_REG_I wr %r18, 0x0001, %- | |
2401 | .word 0xc257c000 ! 343: LDSH_R ldsh [%r31 + %r0], %r1 | |
2402 | splash_tba_0_100: | |
2403 | set 0x120000, %r2 | |
2404 | st %r1, [%r2+%r0] | |
2405 | ta T_CHANGE_PRIV | |
2406 | set 0x120000, %r2 | |
2407 | .word 0x8b900002 ! 344: WRPR_TBA_R wrpr %r0, %r2, %tba | |
2408 | DS_0_101: | |
2409 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
2410 | .word 0xd3346001 ! 1: STQF_I - %f9, [0x0001, %r17] | |
2411 | normalw | |
2412 | .word 0xa3458000 ! 345: RD_SOFTINT_REG rd %softint, %r17 | |
2413 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_102)) -> intp(0,0,3) | |
2414 | intvec_0_102: | |
2415 | .word 0x39400001 ! 346: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2416 | .word 0xe28008a0 ! 347: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 | |
2417 | tagged_0_103: | |
2418 | taddcctv %r13, 0x17bb, %r13 | |
2419 | .word 0xe207e001 ! 348: LDUW_I lduw [%r31 + 0x0001], %r17 | |
2420 | .word 0xa1902003 ! 349: WRPR_GL_I wrpr %r0, 0x0003, %- | |
2421 | .word 0x8d902b0c ! 350: WRPR_PSTATE_I wrpr %r0, 0x0b0c, %pstate | |
2422 | mondo_0_104: | |
2423 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2424 | ||
2425 | stxa %r9, [%r0+0x3c0] %asi | |
2426 | .word 0x9d944014 ! 351: WRPR_WSTATE_R wrpr %r17, %r20, %wstate | |
2427 | .word 0x93902004 ! 352: WRPR_CWP_I wrpr %r0, 0x0004, %cwp | |
2428 | tagged_0_105: | |
2429 | taddcctv %r8, 0x1261, %r3 | |
2430 | .word 0xe207e001 ! 353: LDUW_I lduw [%r31 + 0x0001], %r17 | |
2431 | .word 0x87802080 ! 354: WRASI_I wr %r0, 0x0080, %asi | |
2432 | .word 0xe317c000 ! 355: LDQF_R - [%r31, %r0], %f17 | |
2433 | .word 0x93902007 ! 356: WRPR_CWP_I wrpr %r0, 0x0007, %cwp | |
2434 | invalw | |
2435 | mov 0x35, %r30 | |
2436 | .word 0x83d0001e ! 357: Tcc_R te icc_or_xcc, %r0 + %r30 | |
2437 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_106)) -> intp(0,0,23) | |
2438 | intvec_0_106: | |
2439 | .word 0x39400001 ! 358: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2440 | tagged_0_107: | |
2441 | taddcctv %r6, 0x1a87, %r21 | |
2442 | .word 0xe207e001 ! 359: LDUW_I lduw [%r31 + 0x0001], %r17 | |
2443 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
2444 | ta T_CHANGE_NONPRIV ! macro | |
2445 | .word 0xb1818010 ! 360: WR_STICK_REG_R wr %r6, %r16, %- | |
2446 | .word 0x93902007 ! 361: WRPR_CWP_I wrpr %r0, 0x0007, %cwp | |
2447 | tagged_0_109: | |
2448 | taddcctv %r25, 0x18a8, %r14 | |
2449 | .word 0xe207e001 ! 362: LDUW_I lduw [%r31 + 0x0001], %r17 | |
2450 | DS_0_110: | |
2451 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
2452 | pdist %f30, %f28, %f16 | |
2453 | .word 0x8bb50312 ! 363: ALIGNADDRESS alignaddr %r20, %r18, %r5 | |
2454 | ta T_CHANGE_HPRIV ! macro | |
2455 | ta T_CHANGE_PRIV ! macro | |
2456 | otherw | |
2457 | mov 0xb1, %r30 | |
2458 | .word 0x91d0001e ! 366: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2459 | .word 0x87902020 ! 367: WRPR_TT_I wrpr %r0, 0x0020, %tt | |
2460 | set 0x40407453, %r28 | |
2461 | stxa %r28, [%g0] 0x73 | |
2462 | intvec_0_111: | |
2463 | .word 0x39400001 ! 368: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2464 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_112)) -> intp(0,0,22) | |
2465 | intvec_0_112: | |
2466 | .word 0x39400001 ! 369: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2467 | DS_0_113: | |
2468 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
2469 | .word 0xcb346001 ! 1: STQF_I - %f5, [0x0001, %r17] | |
2470 | normalw | |
2471 | .word 0xa1458000 ! 370: RD_SOFTINT_REG rd %softint, %r16 | |
2472 | .word 0xe05fe001 ! 371: LDX_I ldx [%r31 + 0x0001], %r16 | |
2473 | .word 0xa3514000 ! 372: RDPR_TBA rdpr %tba, %r17 | |
2474 | .word 0x879023e1 ! 373: WRPR_TT_I wrpr %r0, 0x03e1, %tt | |
2475 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_114)) -> intp(0,0,17) | |
2476 | intvec_0_114: | |
2477 | .word 0x39400001 ! 374: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2478 | .word 0xe397e001 ! 375: LDQFA_I - [%r31, 0x0001], %f17 | |
2479 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_115)) -> intp(0,1,3) | |
2480 | xir_0_115: | |
2481 | .word 0xa9836001 ! 376: WR_SET_SOFTINT_I wr %r13, 0x0001, %set_softint | |
2482 | .word 0x879022f0 ! 377: WRPR_TT_I wrpr %r0, 0x02f0, %tt | |
2483 | .word 0x93902004 ! 378: WRPR_CWP_I wrpr %r0, 0x0004, %cwp | |
2484 | .word 0x95500000 ! 379: RDPR_TPC rdpr %tpc, %r10 | |
2485 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
2486 | ta T_CHANGE_NONPRIV ! macro | |
2487 | .word 0x95a01971 ! 380: FqTOd dis not found | |
2488 | ||
2489 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_117)) -> intp(0,1,3) | |
2490 | xir_0_117: | |
2491 | .word 0xa9842001 ! 381: WR_SET_SOFTINT_I wr %r16, 0x0001, %set_softint | |
2492 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_118)) -> intp(0,0,17) | |
2493 | intvec_0_118: | |
2494 | .word 0x39400001 ! 382: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2495 | DS_0_119: | |
2496 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
2497 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
2498 | .word 0xd1144007 ! 1: LDQF_R - [%r17, %r7], %f8 | |
2499 | .word 0x95a20832 ! 383: FADDs fadds %f8, %f18, %f10 | |
2500 | .word 0x93902001 ! 384: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
2501 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_120)) -> intp(0,0,31) | |
2502 | intvec_0_120: | |
2503 | .word 0x39400001 ! 385: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2504 | .word 0xd4d804a0 ! 386: LDXA_R ldxa [%r0, %r0] 0x25, %r10 | |
2505 | .word 0x24800001 ! 387: BLE ble,a <label_0x1> | |
2506 | set 0xa61f1564, %r28 | |
2507 | stxa %r28, [%g0] 0x73 | |
2508 | intvec_0_121: | |
2509 | .word 0x39400001 ! 388: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2510 | .word 0xd4c7e030 ! 389: LDSWA_I ldswa [%r31, + 0x0030] %asi, %r10 | |
2511 | DS_0_122: | |
2512 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
2513 | .word 0xcf31a001 ! 1: STQF_I - %f7, [0x0001, %r6] | |
2514 | normalw | |
2515 | .word 0x83458000 ! 390: RD_SOFTINT_REG rd %softint, %r1 | |
2516 | .word 0xc297e000 ! 391: LDUHA_I lduha [%r31, + 0x0000] %asi, %r1 | |
2517 | .word 0x81460000 ! 392: RD_STICK_REG stbar | |
2518 | .word 0xc28fe020 ! 393: LDUBA_I lduba [%r31, + 0x0020] %asi, %r1 | |
2519 | .word 0x879023c1 ! 394: WRPR_TT_I wrpr %r0, 0x03c1, %tt | |
2520 | splash_lsu_0_123: | |
2521 | set 0x13, %r2 | |
2522 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2523 | .word 0x3d400001 ! 395: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2524 | .word 0xa1454000 ! 396: RD_CLEAR_SOFTINT rd %clear_softint, %r16 | |
2525 | .word 0xe08008a0 ! 397: LDUWA_R lduwa [%r0, %r0] 0x45, %r16 | |
2526 | .word 0x8d9025c7 ! 398: WRPR_PSTATE_I wrpr %r0, 0x05c7, %pstate | |
2527 | .word 0x91d02035 ! 399: Tcc_I ta icc_or_xcc, %r0 + 53 | |
2528 | mondo_0_124: | |
2529 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2530 | ||
2531 | stxa %r20, [%r0+0x3c0] %asi | |
2532 | .word 0x9d92400a ! 400: WRPR_WSTATE_R wrpr %r9, %r10, %wstate | |
2533 | .word 0xe08008a0 ! 401: LDUWA_R lduwa [%r0, %r0] 0x45, %r16 | |
2534 | .word 0x85450000 ! 402: RD_SET_SOFTINT rd %set_softint, %r2 | |
2535 | DS_0_125: | |
2536 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
2537 | pdist %f12, %f24, %f0 | |
2538 | .word 0x8bb0c301 ! 403: ALIGNADDRESS alignaddr %r3, %r1, %r5 | |
2539 | change_to_randtl_0_126: | |
2540 | ta T_CHANGE_PRIV ! macro | |
2541 | done_change_to_randtl_0_126: | |
2542 | .word 0x8f902002 ! 404: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
2543 | .word 0x87902352 ! 405: WRPR_TT_I wrpr %r0, 0x0352, %tt | |
2544 | otherw | |
2545 | mov 0x31, %r30 | |
2546 | .word 0x83d0001e ! 406: Tcc_R te icc_or_xcc, %r0 + %r30 | |
2547 | .word 0x95a309c8 ! 407: FDIVd fdivd %f12, %f8, %f10 | |
2548 | splash_lsu_0_127: | |
2549 | set 0x17, %r2 | |
2550 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2551 | .word 0x3d400001 ! 408: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2552 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_128)) -> intp(0,0,12) | |
2553 | intvec_0_128: | |
2554 | .word 0x39400001 ! 409: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2555 | .word 0xd457c000 ! 410: LDSH_R ldsh [%r31 + %r0], %r10 | |
2556 | splash_lsu_0_129: | |
2557 | set 0x13, %r2 | |
2558 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2559 | .word 0x3d400001 ! 411: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2560 | .word 0x8d90277b ! 412: WRPR_PSTATE_I wrpr %r0, 0x077b, %pstate | |
2561 | .word 0x8780201c ! 413: WRASI_I wr %r0, 0x001c, %asi | |
2562 | DS_0_130: | |
2563 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
2564 | .word 0xbfe7c000 ! 414: SAVE_R save %r31, %r0, %r31 | |
2565 | .word 0xad812001 ! 415: WR_SOFTINT_REG_I wr %r4, 0x0001, %softint | |
2566 | set 0xfe5d80d, %r28 | |
2567 | stxa %r28, [%g0] 0x73 | |
2568 | intvec_0_131: | |
2569 | .word 0x39400001 ! 416: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2570 | .word 0x88d0e001 ! 417: UMULcc_I umulcc %r3, 0x0001, %r4 | |
2571 | .word 0xc8800c00 ! 418: LDUWA_R lduwa [%r0, %r0] 0x60, %r4 | |
2572 | .word 0xc81fc000 ! 419: LDD_R ldd [%r31 + %r0], %r4 | |
2573 | .word 0xc8ffc028 ! 420: SWAPA_R swapa %r4, [%r31 + %r8] 0x01 | |
2574 | tagged_0_132: | |
2575 | tsubcctv %r22, 0x1057, %r23 | |
2576 | .word 0xc807e001 ! 421: LDUW_I lduw [%r31 + 0x0001], %r4 | |
2577 | set 0x5d3e543b, %r28 | |
2578 | stxa %r28, [%g0] 0x73 | |
2579 | intvec_0_133: | |
2580 | .word 0x39400001 ! 422: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2581 | .word 0x8b520000 ! 423: RDPR_PIL rdpr %pil, %r5 | |
2582 | .word 0xa1902008 ! 424: WRPR_GL_I wrpr %r0, 0x0008, %- | |
2583 | tagged_0_134: | |
2584 | tsubcctv %r2, 0x1ed8, %r25 | |
2585 | .word 0xca07e001 ! 425: LDUW_I lduw [%r31 + 0x0001], %r5 | |
2586 | set 0x84b86036, %r28 | |
2587 | stxa %r28, [%g0] 0x73 | |
2588 | intvec_0_135: | |
2589 | .word 0x39400001 ! 426: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2590 | .word 0xa190200f ! 427: WRPR_GL_I wrpr %r0, 0x000f, %- | |
2591 | .word 0x91d02032 ! 428: Tcc_I ta icc_or_xcc, %r0 + 50 | |
2592 | .word 0xca9fe001 ! 429: LDDA_I ldda [%r31, + 0x0001] %asi, %r5 | |
2593 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_136)) -> intp(0,0,25) | |
2594 | intvec_0_136: | |
2595 | .word 0x39400001 ! 430: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2596 | .word 0x8d902f9f ! 431: WRPR_PSTATE_I wrpr %r0, 0x0f9f, %pstate | |
2597 | set 0xfd86ded6, %r28 | |
2598 | stxa %r28, [%g0] 0x73 | |
2599 | intvec_0_137: | |
2600 | .word 0x39400001 ! 432: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2601 | DS_0_138: | |
2602 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
2603 | .xword 0x93561550 ! Random illegal ? | |
2604 | .word 0xe310000d ! 1: LDQF_R - [%r0, %r13], %f17 | |
2605 | .word 0xa3a10826 ! 433: FADDs fadds %f4, %f6, %f17 | |
2606 | set 0x9938ef87, %r28 | |
2607 | stxa %r28, [%g0] 0x73 | |
2608 | intvec_0_139: | |
2609 | .word 0x39400001 ! 434: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2610 | .word 0x84488008 ! 435: MULX_R mulx %r2, %r8, %r2 | |
2611 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_140)) -> intp(0,0,21) | |
2612 | intvec_0_140: | |
2613 | .word 0x39400001 ! 436: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2614 | .word 0x2a700001 ! 437: BPCS <illegal instruction> | |
2615 | .word 0x8780204f ! 438: WRASI_I wr %r0, 0x004f, %asi | |
2616 | .word 0xa190200b ! 439: WRPR_GL_I wrpr %r0, 0x000b, %- | |
2617 | .word 0xc4dfe000 ! 440: LDXA_I ldxa [%r31, + 0x0000] %asi, %r2 | |
2618 | splash_htba_0_141: | |
2619 | set 0x00390000, %r2 | |
2620 | ld [%r2+%r0], %r1 | |
2621 | ta T_CHANGE_HPRIV | |
2622 | set 0x003a0000, %r2 | |
2623 | .word 0x8b980002 ! 441: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
2624 | .word 0xc51fc000 ! 442: LDDF_R ldd [%r31, %r0], %f2 | |
2625 | .word 0xa190200a ! 443: WRPR_GL_I wrpr %r0, 0x000a, %- | |
2626 | .word 0xc49fc020 ! 444: LDDA_R ldda [%r31, %r0] 0x01, %r2 | |
2627 | DS_0_142: | |
2628 | nop | |
2629 | not %g0, %g2 | |
2630 | .word 0x9d902005 ! 445: WRPR_WSTATE_I wrpr %r0, 0x0005, %wstate | |
2631 | xir_0_143: | |
2632 | .word 0xa984a001 ! 446: WR_SET_SOFTINT_I wr %r18, 0x0001, %set_softint | |
2633 | .word 0xab80c012 ! 447: WR_CLEAR_SOFTINT_R wr %r3, %r18, %clear_softint | |
2634 | .word 0x91d02035 ! 448: Tcc_I ta icc_or_xcc, %r0 + 53 | |
2635 | .word 0xc41fe001 ! 449: LDD_I ldd [%r31 + 0x0001], %r2 | |
2636 | .word 0xc527e001 ! 450: STF_I st %f2, [0x0001, %r31] | |
2637 | .word 0x8790234f ! 451: WRPR_TT_I wrpr %r0, 0x034f, %tt | |
2638 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_144)) -> intp(0,0,23) | |
2639 | intvec_0_144: | |
2640 | .word 0x39400001 ! 452: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2641 | .word 0xc49004a0 ! 453: LDUHA_R lduha [%r0, %r0] 0x25, %r2 | |
2642 | .word 0xa190200a ! 454: WRPR_GL_I wrpr %r0, 0x000a, %- | |
2643 | .word 0x93d02033 ! 455: Tcc_I tne icc_or_xcc, %r0 + 51 | |
2644 | .word 0xc497e020 ! 456: LDUHA_I lduha [%r31, + 0x0020] %asi, %r2 | |
2645 | set 0x15a9782b, %r28 | |
2646 | stxa %r28, [%g0] 0x73 | |
2647 | intvec_0_145: | |
2648 | .word 0x39400001 ! 457: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2649 | mondo_0_146: | |
2650 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2651 | ||
2652 | stxa %r17, [%r0+0x3d8] %asi | |
2653 | .word 0x9d90c00d ! 458: WRPR_WSTATE_R wrpr %r3, %r13, %wstate | |
2654 | .word 0x94fc2001 ! 459: SDIVcc_I sdivcc %r16, 0x0001, %r10 | |
2655 | .word 0x8d902ebb ! 460: WRPR_PSTATE_I wrpr %r0, 0x0ebb, %pstate | |
2656 | .word 0x97500000 ! 461: RDPR_TPC rdpr %tpc, %r11 | |
2657 | .word 0xd68008a0 ! 462: LDUWA_R lduwa [%r0, %r0] 0x45, %r11 | |
2658 | .word 0xd797e001 ! 463: LDQFA_I - [%r31, 0x0001], %f11 | |
2659 | .word 0x87902108 ! 464: WRPR_TT_I wrpr %r0, 0x0108, %tt | |
2660 | .word 0xd637c00d ! 465: STH_R sth %r11, [%r31 + %r13] | |
2661 | xir_0_147: | |
2662 | .word 0xa982e001 ! 466: WR_SET_SOFTINT_I wr %r11, 0x0001, %set_softint | |
2663 | .word 0x94fb0006 ! 467: SDIVcc_R sdivcc %r12, %r6, %r10 | |
2664 | .word 0xd4d804a0 ! 468: LDXA_R ldxa [%r0, %r0] 0x25, %r10 | |
2665 | .word 0x98816001 ! 469: ADDcc_I addcc %r5, 0x0001, %r12 | |
2666 | mondo_0_148: | |
2667 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2668 | ||
2669 | stxa %r11, [%r0+0x3c0] %asi | |
2670 | .word 0x9d920000 ! 470: WRPR_WSTATE_R wrpr %r8, %r0, %wstate | |
2671 | .word 0xd88fe000 ! 471: LDUBA_I lduba [%r31, + 0x0000] %asi, %r12 | |
2672 | .word 0x8d802000 ! 472: WRFPRS_I wr %r0, 0x0000, %fprs | |
2673 | otherw | |
2674 | mov 0x31, %r30 | |
2675 | .word 0x91d0001e ! 473: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2676 | .word 0xd88008a0 ! 474: LDUWA_R lduwa [%r0, %r0] 0x45, %r12 | |
2677 | .word 0x87902028 ! 475: WRPR_TT_I wrpr %r0, 0x0028, %tt | |
2678 | .word 0xa1902006 ! 476: WRPR_GL_I wrpr %r0, 0x0006, %- | |
2679 | .word 0x8f902002 ! 1: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
2680 | ta T_CHANGE_NONHPRIV ! macro | |
2681 | .word 0xa769a001 ! 477: SDIVX_I sdivx %r6, 0x0001, %r19 | |
2682 | .word 0xa1902004 ! 478: WRPR_GL_I wrpr %r0, 0x0004, %- | |
2683 | splash_htba_0_150: | |
2684 | set 0x003b0000, %r2 | |
2685 | st %r1, [%r2+%r0] | |
2686 | ta T_CHANGE_HPRIV | |
2687 | set 0x00380000, %r2 | |
2688 | .word 0x8b980002 ! 479: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
2689 | .word 0xa190200b ! 480: WRPR_GL_I wrpr %r0, 0x000b, %- | |
2690 | .word 0xe6c004a0 ! 481: LDSWA_R ldswa [%r0, %r0] 0x25, %r19 | |
2691 | otherw | |
2692 | mov 0x31, %r30 | |
2693 | .word 0x93d0001e ! 482: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
2694 | mondo_0_151: | |
2695 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2696 | ||
2697 | stxa %r16, [%r0+0x3d8] %asi | |
2698 | .word 0x9d94c012 ! 483: WRPR_WSTATE_R wrpr %r19, %r18, %wstate | |
2699 | .word 0xa153c000 ! 484: RDPR_FQ <illegal instruction> | |
2700 | xir_0_152: | |
2701 | .word 0xa981e001 ! 485: WR_SET_SOFTINT_I wr %r7, 0x0001, %set_softint | |
2702 | otherw | |
2703 | mov 0x33, %r30 | |
2704 | .word 0x83d0001e ! 486: Tcc_R te icc_or_xcc, %r0 + %r30 | |
2705 | .word 0xe02fc012 ! 487: STB_R stb %r16, [%r31 + %r18] | |
2706 | .word 0x91504000 ! 488: RDPR_TNPC <illegal instruction> | |
2707 | ta T_CHANGE_HPRIV ! macro | |
2708 | .word 0xd047e001 ! 490: LDSW_I ldsw [%r31 + 0x0001], %r8 | |
2709 | splash_lsu_0_153: | |
2710 | set 0x1f, %r2 | |
2711 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2712 | .word 0x3d400001 ! 491: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2713 | .word 0x87902303 ! 492: WRPR_TT_I wrpr %r0, 0x0303, %tt | |
2714 | .word 0x8d802000 ! 493: WRFPRS_I wr %r0, 0x0000, %fprs | |
2715 | .word 0xa945c000 ! 494: RD_TICK_CMPR_REG rd %-, %r20 | |
2716 | splash_cmpr_0_154: | |
2717 | nop | |
2718 | mov 1, %g2 | |
2719 | sllx %g2, 63, %g2 | |
2720 | or %g1, %g2, %g1 | |
2721 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2722 | .word 0xb1832001 ! 495: WR_STICK_REG_I wr %r12, 0x0001, %- | |
2723 | .word 0xe88008a0 ! 496: LDUWA_R lduwa [%r0, %r0] 0x45, %r20 | |
2724 | splash_cmpr_0_155: | |
2725 | nop | |
2726 | mov 1, %g2 | |
2727 | sllx %g2, 63, %g2 | |
2728 | or %g1, %g2, %g1 | |
2729 | .word 0xb3800001 ! 1: WR_STICK_CMPR_REG_R wr %r0, %r1, %- | |
2730 | .word 0xb182e001 ! 497: WR_STICK_REG_I wr %r11, 0x0001, %- | |
2731 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_156)) -> intp(0,1,3) | |
2732 | xir_0_156: | |
2733 | .word 0xa984a001 ! 498: WR_SET_SOFTINT_I wr %r18, 0x0001, %set_softint | |
2734 | otherw | |
2735 | mov 0x35, %r30 | |
2736 | .word 0x91d0001e ! 499: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2737 | .word 0xe8800c80 ! 500: LDUWA_R lduwa [%r0, %r0] 0x64, %r20 | |
2738 | DS_0_157: | |
2739 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
2740 | pdist %f22, %f30, %f6 | |
2741 | .word 0x81b40310 ! 501: ALIGNADDRESS alignaddr %r16, %r16, %r0 | |
2742 | .word 0x91d02034 ! 502: Tcc_I ta icc_or_xcc, %r0 + 52 | |
2743 | .word 0xc13fe001 ! 503: STDF_I std %f0, [0x0001, %r31] | |
2744 | .word 0xc0cfe000 ! 504: LDSBA_I ldsba [%r31, + 0x0000] %asi, %r0 | |
2745 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_158)) -> intp(0,0,21) | |
2746 | intvec_0_158: | |
2747 | .word 0x39400001 ! 505: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2748 | DS_0_159: | |
2749 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
2750 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
2751 | .word 0xd314000d ! 1: LDQF_R - [%r16, %r13], %f9 | |
2752 | .word 0x89a48821 ! 506: FADDs fadds %f18, %f1, %f4 | |
2753 | splash_htba_0_160: | |
2754 | set 0x80000, %r2 | |
2755 | st %r1, [%r2+%r0] | |
2756 | ta T_CHANGE_HPRIV | |
2757 | set 0x80000, %r2 | |
2758 | .word 0x8b980002 ! 507: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
2759 | splash_lsu_0_161: | |
2760 | set 0xb, %r2 | |
2761 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2762 | .word 0x3d400001 ! 508: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2763 | ta T_CHANGE_HPRIV ! macro | |
2764 | tagged_0_162: | |
2765 | tsubcctv %r20, 0x127a, %r17 | |
2766 | .word 0xc807e001 ! 510: LDUW_I lduw [%r31 + 0x0001], %r4 | |
2767 | .word 0x85464000 ! 511: RD_STICK_CMPR_REG rd %-, %r2 | |
2768 | .word 0x87802014 ! 512: WRASI_I wr %r0, 0x0014, %asi | |
2769 | .word 0xa151c000 ! 513: RDPR_TL rdpr %tl, %r16 | |
2770 | DS_0_163: | |
2771 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
2772 | pdist %f12, %f0, %f10 | |
2773 | .word 0xa5b34302 ! 514: ALIGNADDRESS alignaddr %r13, %r2, %r18 | |
2774 | .word 0xe4bfe001 ! 515: STDA_I stda %r18, [%r31 + 0x0001] %asi | |
2775 | .word 0xa190200e ! 516: WRPR_GL_I wrpr %r0, 0x000e, %- | |
2776 | splash_tba_0_164: | |
2777 | set 0x120000, %r2 | |
2778 | st %r1, [%r2+%r0] | |
2779 | ta T_CHANGE_PRIV | |
2780 | set 0x120000, %r2 | |
2781 | .word 0x8b900002 ! 517: WRPR_TBA_R wrpr %r0, %r2, %tba | |
2782 | otherw | |
2783 | mov 0x30, %r30 | |
2784 | .word 0x93d0001e ! 518: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
2785 | .word 0x36800001 ! 519: BGE bge,a <label_0x1> | |
2786 | .word 0xe44fc000 ! 520: LDSB_R ldsb [%r31 + %r0], %r18 | |
2787 | .word 0x91d020b2 ! 521: Tcc_I ta icc_or_xcc, %r0 + 178 | |
2788 | .word 0xe49fc020 ! 522: LDDA_R ldda [%r31, %r0] 0x01, %r18 | |
2789 | .word 0xa1902000 ! 523: WRPR_GL_I wrpr %r0, 0x0000, %- | |
2790 | .word 0xe4d80e80 ! 524: LDXA_R ldxa [%r0, %r0] 0x74, %r18 | |
2791 | .word 0x93540000 ! 525: RDPR_GL rdpr %-, %r9 | |
2792 | mondo_0_165: | |
2793 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2794 | ||
2795 | stxa %r12, [%r0+0x3e8] %asi | |
2796 | .word 0x9d904010 ! 526: WRPR_WSTATE_R wrpr %r1, %r16, %wstate | |
2797 | .word 0xd20fc000 ! 527: LDUB_R ldub [%r31 + %r0], %r9 | |
2798 | .word 0x93902000 ! 528: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
2799 | .word 0x81460000 ! 529: RD_STICK_REG stbar | |
2800 | splash_lsu_0_166: | |
2801 | set 0x15, %r2 | |
2802 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2803 | .word 0x3d400001 ! 530: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2804 | DS_0_167: | |
2805 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
2806 | .word 0xbfe7c000 ! 531: SAVE_R save %r31, %r0, %r31 | |
2807 | splash_lsu_0_168: | |
2808 | set 0x1f, %r2 | |
2809 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2810 | .word 0x3d400001 ! 532: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2811 | .word 0xd23fc010 ! 533: STD_R std %r9, [%r31 + %r16] | |
2812 | .word 0x9545c000 ! 534: RD_TICK_CMPR_REG rd %-, %r10 | |
2813 | set 0xc22a26bf, %r28 | |
2814 | stxa %r28, [%g0] 0x73 | |
2815 | intvec_0_169: | |
2816 | .word 0x39400001 ! 535: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2817 | .word 0x87802088 ! 536: WRASI_I wr %r0, 0x0088, %asi | |
2818 | .word 0x9f802001 ! 537: SIR sir 0x0001 | |
2819 | change_to_randtl_0_170: | |
2820 | ta T_CHANGE_PRIV ! macro | |
2821 | done_change_to_randtl_0_170: | |
2822 | .word 0x8f902002 ! 538: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
2823 | splash_htba_0_171: | |
2824 | set 0x00390000, %r2 | |
2825 | ld [%r2+%r0], %r1 | |
2826 | ta T_CHANGE_HPRIV | |
2827 | set 0x003a0000, %r2 | |
2828 | .word 0x8b980002 ! 539: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
2829 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_172)) -> intp(0,0,9) | |
2830 | intvec_0_172: | |
2831 | .word 0x39400001 ! 540: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2832 | .word 0x83d020b5 ! 541: Tcc_I te icc_or_xcc, %r0 + 181 | |
2833 | otherw | |
2834 | mov 0x35, %r30 | |
2835 | .word 0x91d0001e ! 542: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2836 | .word 0xa049c00a ! 543: MULX_R mulx %r7, %r10, %r16 | |
2837 | splash_lsu_0_173: | |
2838 | set 0x15, %r2 | |
2839 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2840 | .word 0x3d400001 ! 544: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2841 | .word 0xe11fc000 ! 545: LDDF_R ldd [%r31, %r0], %f16 | |
2842 | .word 0x87902237 ! 546: WRPR_TT_I wrpr %r0, 0x0237, %tt | |
2843 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_174)) -> intp(0,1,3) | |
2844 | xir_0_174: | |
2845 | .word 0xa981a001 ! 547: WR_SET_SOFTINT_I wr %r6, 0x0001, %set_softint | |
2846 | tagged_0_175: | |
2847 | taddcctv %r12, 0x10c1, %r13 | |
2848 | .word 0xe007e001 ! 548: LDUW_I lduw [%r31 + 0x0001], %r16 | |
2849 | DS_0_176: | |
2850 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
2851 | .word 0xbfefc000 ! 549: RESTORE_R restore %r31, %r0, %r31 | |
2852 | set 0xc5bbd101, %r28 | |
2853 | stxa %r28, [%g0] 0x73 | |
2854 | intvec_0_177: | |
2855 | .word 0x39400001 ! 550: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2856 | invalw | |
2857 | mov 0x34, %r30 | |
2858 | .word 0x91d0001e ! 551: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2859 | .word 0xe0d7e000 ! 552: LDSHA_I ldsha [%r31, + 0x0000] %asi, %r16 | |
2860 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_178)) -> intp(0,1,3) | |
2861 | xir_0_178: | |
2862 | .word 0xa980e001 ! 553: WR_SET_SOFTINT_I wr %r3, 0x0001, %set_softint | |
2863 | .word 0x9194e001 ! 554: WRPR_PIL_I wrpr %r19, 0x0001, %pil | |
2864 | .word 0xad816001 ! 555: WR_SOFTINT_REG_I wr %r5, 0x0001, %softint | |
2865 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_179)) -> intp(0,1,3) | |
2866 | xir_0_179: | |
2867 | .word 0xa9836001 ! 556: WR_SET_SOFTINT_I wr %r13, 0x0001, %set_softint | |
2868 | tagged_0_180: | |
2869 | tsubcctv %r26, 0x19dc, %r14 | |
2870 | .word 0xe007e001 ! 557: LDUW_I lduw [%r31 + 0x0001], %r16 | |
2871 | .word 0x97454000 ! 558: RD_CLEAR_SOFTINT rd %clear_softint, %r11 | |
2872 | .word 0xd6d7e020 ! 559: LDSHA_I ldsha [%r31, + 0x0020] %asi, %r11 | |
2873 | .word 0xd61fe001 ! 560: LDD_I ldd [%r31 + 0x0001], %r11 | |
2874 | otherw | |
2875 | mov 0x31, %r30 | |
2876 | .word 0x91d0001e ! 561: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2877 | xir_0_181: | |
2878 | .word 0xa9852001 ! 562: WR_SET_SOFTINT_I wr %r20, 0x0001, %set_softint | |
2879 | .word 0xd68008a0 ! 563: LDUWA_R lduwa [%r0, %r0] 0x45, %r11 | |
2880 | .word 0x22800001 ! 564: BE be,a <label_0x1> | |
2881 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_182)) -> intp(0,1,3) | |
2882 | xir_0_182: | |
2883 | .word 0xa9842001 ! 565: WR_SET_SOFTINT_I wr %r16, 0x0001, %set_softint | |
2884 | .word 0xd6d804a0 ! 566: LDXA_R ldxa [%r0, %r0] 0x25, %r11 | |
2885 | .word 0x81460000 ! 567: RD_STICK_REG stbar | |
2886 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_183)) -> intp(0,1,3) | |
2887 | xir_0_183: | |
2888 | .word 0xa9826001 ! 568: WR_SET_SOFTINT_I wr %r9, 0x0001, %set_softint | |
2889 | ta T_CHANGE_PRIV ! macro | |
2890 | .word 0x93902006 ! 570: WRPR_CWP_I wrpr %r0, 0x0006, %cwp | |
2891 | invalw | |
2892 | mov 0x35, %r30 | |
2893 | .word 0x91d0001e ! 571: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2894 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_184)) -> intp(0,1,3) | |
2895 | xir_0_184: | |
2896 | .word 0xa9812001 ! 572: WR_SET_SOFTINT_I wr %r4, 0x0001, %set_softint | |
2897 | .word 0xd737e001 ! 573: STQF_I - %f11, [0x0001, %r31] | |
2898 | .word 0x93902000 ! 574: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
2899 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_185)) -> intp(0,1,3) | |
2900 | xir_0_185: | |
2901 | .word 0xa984e001 ! 575: WR_SET_SOFTINT_I wr %r19, 0x0001, %set_softint | |
2902 | .word 0x93902000 ! 576: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
2903 | .word 0xd727c00a ! 577: STF_R st %f11, [%r10, %r31] | |
2904 | .word 0x28700001 ! 578: BPLEU <illegal instruction> | |
2905 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_186)) -> intp(0,0,1) | |
2906 | intvec_0_186: | |
2907 | .word 0x39400001 ! 579: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2908 | .word 0xd6d804a0 ! 580: LDXA_R ldxa [%r0, %r0] 0x25, %r11 | |
2909 | .word 0xd64fe001 ! 581: LDSB_I ldsb [%r31 + 0x0001], %r11 | |
2910 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_187)) -> intp(0,1,3) | |
2911 | xir_0_187: | |
2912 | .word 0xa981e001 ! 582: WR_SET_SOFTINT_I wr %r7, 0x0001, %set_softint | |
2913 | splash_cmpr_0_188: | |
2914 | nop | |
2915 | mov 1, %g2 | |
2916 | sllx %g2, 63, %g2 | |
2917 | or %g1, %g2, %g1 | |
2918 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2919 | .word 0xb1812001 ! 583: WR_STICK_REG_I wr %r4, 0x0001, %- | |
2920 | .word 0x8cc4e001 ! 584: ADDCcc_I addccc %r19, 0x0001, %r6 | |
2921 | splash_lsu_0_189: | |
2922 | set 0x1b, %r2 | |
2923 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2924 | .word 0x3d400001 ! 585: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2925 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_190)) -> intp(0,1,3) | |
2926 | xir_0_190: | |
2927 | .word 0xa981e001 ! 586: WR_SET_SOFTINT_I wr %r7, 0x0001, %set_softint | |
2928 | .word 0xcc800c80 ! 587: LDUWA_R lduwa [%r0, %r0] 0x64, %r6 | |
2929 | tagged_0_191: | |
2930 | taddcctv %r3, 0x1186, %r16 | |
2931 | .word 0xcc07e001 ! 588: LDUW_I lduw [%r31 + 0x0001], %r6 | |
2932 | .word 0x8d9021cc ! 589: WRPR_PSTATE_I wrpr %r0, 0x01cc, %pstate | |
2933 | invalw | |
2934 | mov 0x32, %r30 | |
2935 | .word 0x93d0001e ! 590: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
2936 | .word 0x93902005 ! 591: WRPR_CWP_I wrpr %r0, 0x0005, %cwp | |
2937 | splash_lsu_0_192: | |
2938 | set 0x1d, %r2 | |
2939 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2940 | .word 0x3d400001 ! 592: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2941 | .word 0x2c700001 ! 593: BPNEG <illegal instruction> | |
2942 | .word 0xccd804a0 ! 594: LDXA_R ldxa [%r0, %r0] 0x25, %r6 | |
2943 | .word 0xcc9fe001 ! 595: LDDA_I ldda [%r31, + 0x0001] %asi, %r6 | |
2944 | set 0x544f4e0f, %r28 | |
2945 | stxa %r28, [%g0] 0x73 | |
2946 | intvec_0_193: | |
2947 | .word 0x39400001 ! 596: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2948 | .word 0x8d802000 ! 597: WRFPRS_I wr %r0, 0x0000, %fprs | |
2949 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_194)) -> intp(0,1,3) | |
2950 | xir_0_194: | |
2951 | .word 0xa980e001 ! 598: WR_SET_SOFTINT_I wr %r3, 0x0001, %set_softint | |
2952 | .word 0x93a449eb ! 599: FDIVq dis not found | |
2953 | ||
2954 | set 0x377896de, %r28 | |
2955 | stxa %r28, [%g0] 0x73 | |
2956 | intvec_0_195: | |
2957 | .word 0x39400001 ! 600: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2958 | splash_htba_0_196: | |
2959 | set 0x80000, %r2 | |
2960 | st %r1, [%r2+%r0] | |
2961 | ta T_CHANGE_HPRIV | |
2962 | set 0x80000, %r2 | |
2963 | .word 0x8b980002 ! 601: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
2964 | .word 0xd28804a0 ! 602: LDUBA_R lduba [%r0, %r0] 0x25, %r9 | |
2965 | otherw | |
2966 | mov 0xb1, %r30 | |
2967 | .word 0x91d0001e ! 603: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2968 | .word 0x38800001 ! 604: BGU bgu,a <label_0x1> | |
2969 | .word 0xd28804a0 ! 605: LDUBA_R lduba [%r0, %r0] 0x25, %r9 | |
2970 | .word 0xd327c00b ! 606: STF_R st %f9, [%r11, %r31] | |
2971 | DS_0_197: | |
2972 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
2973 | .word 0xbfe7c000 ! 607: SAVE_R save %r31, %r0, %r31 | |
2974 | tagged_0_198: | |
2975 | tsubcctv %r5, 0x11b9, %r6 | |
2976 | .word 0xd207e001 ! 608: LDUW_I lduw [%r31 + 0x0001], %r9 | |
2977 | .word 0xd2c804a0 ! 609: LDSBA_R ldsba [%r0, %r0] 0x25, %r9 | |
2978 | set 0xc3d2a222, %r28 | |
2979 | stxa %r28, [%g0] 0x73 | |
2980 | intvec_0_199: | |
2981 | .word 0x39400001 ! 610: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2982 | .word 0x8d9020de ! 611: WRPR_PSTATE_I wrpr %r0, 0x00de, %pstate | |
2983 | .word 0x8d9029e7 ! 612: WRPR_PSTATE_I wrpr %r0, 0x09e7, %pstate | |
2984 | .word 0xd257e001 ! 613: LDSH_I ldsh [%r31 + 0x0001], %r9 | |
2985 | .word 0xd28008a0 ! 614: LDUWA_R lduwa [%r0, %r0] 0x45, %r9 | |
2986 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
2987 | ta T_CHANGE_NONPRIV ! macro | |
2988 | .word 0xb1844001 ! 615: WR_STICK_REG_R wr %r17, %r1, %- | |
2989 | .word 0xa1902007 ! 616: WRPR_GL_I wrpr %r0, 0x0007, %- | |
2990 | otherw | |
2991 | mov 0xb5, %r30 | |
2992 | .word 0x91d0001e ! 617: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2993 | mondo_0_201: | |
2994 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2995 | ||
2996 | stxa %r20, [%r0+0x3e0] %asi | |
2997 | .word 0x9d94c007 ! 618: WRPR_WSTATE_R wrpr %r19, %r7, %wstate | |
2998 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_202)) -> intp(0,0,15) | |
2999 | intvec_0_202: | |
3000 | .word 0x39400001 ! 619: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3001 | .word 0xa1902004 ! 620: WRPR_GL_I wrpr %r0, 0x0004, %- | |
3002 | mondo_0_203: | |
3003 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3004 | ||
3005 | stxa %r20, [%r0+0x3c0] %asi | |
3006 | .word 0x9d90c002 ! 621: WRPR_WSTATE_R wrpr %r3, %r2, %wstate | |
3007 | tagged_0_204: | |
3008 | tsubcctv %r24, 0x14f9, %r21 | |
3009 | .word 0xd207e001 ! 622: LDUW_I lduw [%r31 + 0x0001], %r9 | |
3010 | splash_htba_0_205: | |
3011 | set 0x80000, %r2 | |
3012 | ld [%r2+%r0], %r1 | |
3013 | ta T_CHANGE_HPRIV | |
3014 | set 0x80000, %r2 | |
3015 | .word 0x8b980002 ! 623: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
3016 | .word 0x8751c000 ! 624: RDPR_TL rdpr %tl, %r3 | |
3017 | .word 0xab80c000 ! 625: WR_CLEAR_SOFTINT_R wr %r3, %r0, %clear_softint | |
3018 | tagged_0_206: | |
3019 | tsubcctv %r3, 0x1ea5, %r8 | |
3020 | .word 0xc607e001 ! 626: LDUW_I lduw [%r31 + 0x0001], %r3 | |
3021 | .word 0xc60fc000 ! 627: LDUB_R ldub [%r31 + %r0], %r3 | |
3022 | .word 0xa1902000 ! 628: WRPR_GL_I wrpr %r0, 0x0000, %- | |
3023 | otherw | |
3024 | mov 0xb3, %r30 | |
3025 | .word 0x91d0001e ! 629: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3026 | splash_lsu_0_207: | |
3027 | set 0x19, %r2 | |
3028 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3029 | .word 0x3d400001 ! 630: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3030 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_208)) -> intp(0,1,3) | |
3031 | xir_0_208: | |
3032 | .word 0xa984e001 ! 631: WR_SET_SOFTINT_I wr %r19, 0x0001, %set_softint | |
3033 | .word 0xc677c000 ! 632: STX_R stx %r3, [%r31 + %r0] | |
3034 | mondo_0_209: | |
3035 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3036 | ||
3037 | stxa %r16, [%r0+0x3c8] %asi | |
3038 | .word 0x9d918010 ! 633: WRPR_WSTATE_R wrpr %r6, %r16, %wstate | |
3039 | tagged_0_210: | |
3040 | tsubcctv %r24, 0x1073, %r14 | |
3041 | .word 0xc607e001 ! 634: LDUW_I lduw [%r31 + 0x0001], %r3 | |
3042 | .word 0x8d902367 ! 635: WRPR_PSTATE_I wrpr %r0, 0x0367, %pstate | |
3043 | .word 0x8d902804 ! 636: WRPR_PSTATE_I wrpr %r0, 0x0804, %pstate | |
3044 | otherw | |
3045 | mov 0x35, %r30 | |
3046 | .word 0x91d0001e ! 637: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3047 | set 0x5529f074, %r28 | |
3048 | stxa %r28, [%g0] 0x73 | |
3049 | intvec_0_211: | |
3050 | .word 0x39400001 ! 638: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3051 | .word 0x9b494000 ! 639: RDHPR_HTBA rdhpr %htba, %r13 | |
3052 | .word 0xa1902001 ! 640: WRPR_GL_I wrpr %r0, 0x0001, %- | |
3053 | .word 0x8d9028b6 ! 641: WRPR_PSTATE_I wrpr %r0, 0x08b6, %pstate | |
3054 | .word 0xa1902009 ! 642: WRPR_GL_I wrpr %r0, 0x0009, %- | |
3055 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_212)) -> intp(0,0,24) | |
3056 | intvec_0_212: | |
3057 | .word 0x39400001 ! 643: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3058 | .word 0x8d802000 ! 644: WRFPRS_I wr %r0, 0x0000, %fprs | |
3059 | .word 0x8790231f ! 645: WRPR_TT_I wrpr %r0, 0x031f, %tt | |
3060 | .word 0xda1fe001 ! 646: LDD_I ldd [%r31 + 0x0001], %r13 | |
3061 | .word 0xda57c000 ! 647: LDSH_R ldsh [%r31 + %r0], %r13 | |
3062 | .word 0x81460000 ! 648: RD_STICK_REG stbar | |
3063 | .word 0x9545c000 ! 649: RD_TICK_CMPR_REG rd %-, %r10 | |
3064 | .word 0xd47fe001 ! 650: SWAP_I swap %r10, [%r31 + 0x0001] | |
3065 | .word 0x84c22001 ! 651: ADDCcc_I addccc %r8, 0x0001, %r2 | |
3066 | .word 0xab84c007 ! 652: WR_CLEAR_SOFTINT_R wr %r19, %r7, %clear_softint | |
3067 | .word 0xc4800b00 ! 653: LDUWA_R lduwa [%r0, %r0] 0x58, %r2 | |
3068 | ta T_CHANGE_HPRIV ! macro | |
3069 | .word 0xc4cfe020 ! 655: LDSBA_I ldsba [%r31, + 0x0020] %asi, %r2 | |
3070 | .word 0xc4cfe020 ! 656: LDSBA_I ldsba [%r31, + 0x0020] %asi, %r2 | |
3071 | DS_0_213: | |
3072 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3073 | .word 0xbfe7c000 ! 657: SAVE_R save %r31, %r0, %r31 | |
3074 | .word 0xa8c0e001 ! 658: ADDCcc_I addccc %r3, 0x0001, %r20 | |
3075 | .word 0x95508000 ! 659: RDPR_TSTATE <illegal instruction> | |
3076 | tagged_0_214: | |
3077 | tsubcctv %r18, 0x16b4, %r6 | |
3078 | .word 0xd407e001 ! 660: LDUW_I lduw [%r31 + 0x0001], %r10 | |
3079 | .word 0xd407c000 ! 661: LDUW_R lduw [%r31 + %r0], %r10 | |
3080 | .word 0xd48008a0 ! 662: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 | |
3081 | .word 0x87902016 ! 663: WRPR_TT_I wrpr %r0, 0x0016, %tt | |
3082 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_215)) -> intp(0,1,3) | |
3083 | xir_0_215: | |
3084 | .word 0xa980a001 ! 664: WR_SET_SOFTINT_I wr %r2, 0x0001, %set_softint | |
3085 | .word 0xd44fe001 ! 665: LDSB_I ldsb [%r31 + 0x0001], %r10 | |
3086 | .word 0xa1902004 ! 666: WRPR_GL_I wrpr %r0, 0x0004, %- | |
3087 | .word 0x93902004 ! 667: WRPR_CWP_I wrpr %r0, 0x0004, %cwp | |
3088 | .word 0xd527c007 ! 668: STF_R st %f10, [%r7, %r31] | |
3089 | .word 0xa7514000 ! 669: RDPR_TBA rdpr %tba, %r19 | |
3090 | .word 0xe6800bc0 ! 670: LDUWA_R lduwa [%r0, %r0] 0x5e, %r19 | |
3091 | invalw | |
3092 | mov 0xb3, %r30 | |
3093 | .word 0x93d0001e ! 671: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
3094 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_216)) -> intp(0,1,3) | |
3095 | xir_0_216: | |
3096 | .word 0xa9812001 ! 672: WR_SET_SOFTINT_I wr %r4, 0x0001, %set_softint | |
3097 | .word 0xe647e001 ! 673: LDSW_I ldsw [%r31 + 0x0001], %r19 | |
3098 | .word 0x8f464000 ! 674: RD_STICK_CMPR_REG rd %-, %r7 | |
3099 | .word 0x8780204f ! 675: WRASI_I wr %r0, 0x004f, %asi | |
3100 | .word 0xce77c000 ! 676: STX_R stx %r7, [%r31 + %r7] | |
3101 | .word 0x91902001 ! 677: WRPR_PIL_I wrpr %r0, 0x0001, %pil | |
3102 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_217)) -> intp(0,1,3) | |
3103 | xir_0_217: | |
3104 | .word 0xa9826001 ! 678: WR_SET_SOFTINT_I wr %r9, 0x0001, %set_softint | |
3105 | .word 0x91d02035 ! 679: Tcc_I ta icc_or_xcc, %r0 + 53 | |
3106 | ta T_CHANGE_PRIV ! macro | |
3107 | .word 0x91d020b4 ! 681: Tcc_I ta icc_or_xcc, %r0 + 180 | |
3108 | .word 0xce3fe001 ! 682: STD_I std %r7, [%r31 + 0x0001] | |
3109 | splash_lsu_0_218: | |
3110 | set 0x17, %r2 | |
3111 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3112 | .word 0x3d400001 ! 683: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3113 | DS_0_219: | |
3114 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3115 | .word 0xbfefc000 ! 684: RESTORE_R restore %r31, %r0, %r31 | |
3116 | .word 0x8d902be2 ! 685: WRPR_PSTATE_I wrpr %r0, 0x0be2, %pstate | |
3117 | .word 0x93902000 ! 686: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
3118 | invalw | |
3119 | mov 0x33, %r30 | |
3120 | .word 0x93d0001e ! 687: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
3121 | .word 0x93902002 ! 688: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
3122 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_220)) -> intp(0,0,31) | |
3123 | intvec_0_220: | |
3124 | .word 0x39400001 ! 689: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3125 | otherw | |
3126 | mov 0x34, %r30 | |
3127 | .word 0x93d0001e ! 690: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
3128 | set 0x84db87b6, %r28 | |
3129 | stxa %r28, [%g0] 0x73 | |
3130 | intvec_0_221: | |
3131 | .word 0x39400001 ! 691: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3132 | .word 0x8f50c000 ! 692: RDPR_TT rdpr %tt, %r7 | |
3133 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_222)) -> intp(0,1,3) | |
3134 | xir_0_222: | |
3135 | .word 0xa980e001 ! 693: WR_SET_SOFTINT_I wr %r3, 0x0001, %set_softint | |
3136 | .word 0xce3fc007 ! 694: STD_R std %r7, [%r31 + %r7] | |
3137 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_223)) -> intp(0,1,3) | |
3138 | xir_0_223: | |
3139 | .word 0xa9826001 ! 695: WR_SET_SOFTINT_I wr %r9, 0x0001, %set_softint | |
3140 | .word 0xa7454000 ! 696: RD_CLEAR_SOFTINT rd %clear_softint, %r19 | |
3141 | invalw | |
3142 | mov 0x32, %r30 | |
3143 | .word 0x91d0001e ! 697: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3144 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_224)) -> intp(0,0,10) | |
3145 | intvec_0_224: | |
3146 | .word 0x39400001 ! 698: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3147 | .word 0x879020b9 ! 699: WRPR_TT_I wrpr %r0, 0x00b9, %tt | |
3148 | .word 0xe647c000 ! 700: LDSW_R ldsw [%r31 + %r0], %r19 | |
3149 | .word 0xe6dfe010 ! 701: LDXA_I ldxa [%r31, + 0x0010] %asi, %r19 | |
3150 | .word 0xe647c000 ! 702: LDSW_R ldsw [%r31 + %r0], %r19 | |
3151 | DS_0_225: | |
3152 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3153 | .word 0xbfe7c000 ! 703: SAVE_R save %r31, %r0, %r31 | |
3154 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_226)) -> intp(0,1,3) | |
3155 | xir_0_226: | |
3156 | .word 0xa982a001 ! 704: WR_SET_SOFTINT_I wr %r10, 0x0001, %set_softint | |
3157 | tagged_0_227: | |
3158 | taddcctv %r6, 0x1df3, %r5 | |
3159 | .word 0xe607e001 ! 705: LDUW_I lduw [%r31 + 0x0001], %r19 | |
3160 | .word 0x95a20dd0 ! 706: FdMULq fdmulq | |
3161 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_228)) -> intp(0,0,16) | |
3162 | intvec_0_228: | |
3163 | .word 0x39400001 ! 707: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3164 | splash_lsu_0_229: | |
3165 | set 0x1f, %r2 | |
3166 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3167 | .word 0x3d400001 ! 708: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3168 | .word 0xa1514000 ! 709: RDPR_TBA rdpr %tba, %r16 | |
3169 | .word 0x8d9024ab ! 710: WRPR_PSTATE_I wrpr %r0, 0x04ab, %pstate | |
3170 | invalw | |
3171 | mov 0x34, %r30 | |
3172 | .word 0x91d0001e ! 711: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3173 | .word 0xe08804a0 ! 712: LDUBA_R lduba [%r0, %r0] 0x25, %r16 | |
3174 | .word 0xe01fc000 ! 713: LDD_R ldd [%r31 + %r0], %r16 | |
3175 | .word 0xe01fe001 ! 714: LDD_I ldd [%r31 + 0x0001], %r16 | |
3176 | .word 0xa1902004 ! 715: WRPR_GL_I wrpr %r0, 0x0004, %- | |
3177 | tagged_0_230: | |
3178 | tsubcctv %r18, 0x1354, %r10 | |
3179 | .word 0xe007e001 ! 716: LDUW_I lduw [%r31 + 0x0001], %r16 | |
3180 | .word 0xe08008a0 ! 717: LDUWA_R lduwa [%r0, %r0] 0x45, %r16 | |
3181 | .word 0xa190200f ! 718: WRPR_GL_I wrpr %r0, 0x000f, %- | |
3182 | .word 0x91454000 ! 719: RD_CLEAR_SOFTINT rd %clear_softint, %r8 | |
3183 | .word 0xd04fc000 ! 720: LDSB_R ldsb [%r31 + %r0], %r8 | |
3184 | mondo_0_231: | |
3185 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3186 | ||
3187 | stxa %r12, [%r0+0x3d0] %asi | |
3188 | .word 0x9d92c006 ! 721: WRPR_WSTATE_R wrpr %r11, %r6, %wstate | |
3189 | .word 0x93902004 ! 722: WRPR_CWP_I wrpr %r0, 0x0004, %cwp | |
3190 | ta T_CHANGE_HPRIV ! macro | |
3191 | .word 0x8d802000 ! 724: WRFPRS_I wr %r0, 0x0000, %fprs | |
3192 | .word 0x99508000 ! 725: RDPR_TSTATE rdpr %tstate, %r12 | |
3193 | .word 0x8d802000 ! 726: WRFPRS_I wr %r0, 0x0000, %fprs | |
3194 | DS_0_232: | |
3195 | nop | |
3196 | not %g0, %g2 | |
3197 | .word 0x9d902000 ! 727: WRPR_WSTATE_I wrpr %r0, 0x0000, %wstate | |
3198 | .word 0x87802055 ! 728: WRASI_I wr %r0, 0x0055, %asi | |
3199 | mondo_0_233: | |
3200 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3201 | ||
3202 | stxa %r4, [%r0+0x3c0] %asi | |
3203 | .word 0x9d90400b ! 729: WRPR_WSTATE_R wrpr %r1, %r11, %wstate | |
3204 | .word 0x8d902320 ! 730: WRPR_PSTATE_I wrpr %r0, 0x0320, %pstate | |
3205 | .word 0x8d802000 ! 731: WRFPRS_I wr %r0, 0x0000, %fprs | |
3206 | .word 0x93902000 ! 732: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
3207 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_234)) -> intp(0,0,23) | |
3208 | intvec_0_234: | |
3209 | .word 0x39400001 ! 733: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3210 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_235)) -> intp(0,1,3) | |
3211 | xir_0_235: | |
3212 | .word 0xa9836001 ! 734: WR_SET_SOFTINT_I wr %r13, 0x0001, %set_softint | |
3213 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_236)) -> intp(0,1,3) | |
3214 | xir_0_236: | |
3215 | .word 0xa980a001 ! 735: WR_SET_SOFTINT_I wr %r2, 0x0001, %set_softint | |
3216 | .word 0x93902002 ! 736: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
3217 | .word 0x93902006 ! 737: WRPR_CWP_I wrpr %r0, 0x0006, %cwp | |
3218 | .word 0x8d902716 ! 738: WRPR_PSTATE_I wrpr %r0, 0x0716, %pstate | |
3219 | .word 0x8790213b ! 739: WRPR_TT_I wrpr %r0, 0x013b, %tt | |
3220 | .word 0x8790211c ! 740: WRPR_TT_I wrpr %r0, 0x011c, %tt | |
3221 | .word 0xd89fe001 ! 741: LDDA_I ldda [%r31, + 0x0001] %asi, %r12 | |
3222 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
3223 | ta T_CHANGE_NONHPRIV ! macro | |
3224 | .word 0xb1818014 ! 742: WR_STICK_REG_R wr %r6, %r20, %- | |
3225 | .word 0x8790213f ! 743: WRPR_TT_I wrpr %r0, 0x013f, %tt | |
3226 | invalw | |
3227 | mov 0xb0, %r30 | |
3228 | .word 0x91d0001e ! 744: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3229 | .word 0xd88008a0 ! 745: LDUWA_R lduwa [%r0, %r0] 0x45, %r12 | |
3230 | .word 0xd83fe001 ! 746: STD_I std %r12, [%r31 + 0x0001] | |
3231 | splash_cmpr_0_238: | |
3232 | nop | |
3233 | mov 1, %g2 | |
3234 | sllx %g2, 63, %g2 | |
3235 | or %g1, %g2, %g1 | |
3236 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
3237 | .word 0xb1816001 ! 747: WR_STICK_REG_I wr %r5, 0x0001, %- | |
3238 | splash_lsu_0_239: | |
3239 | set 0xb, %r2 | |
3240 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3241 | .word 0x3d400001 ! 748: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3242 | tagged_0_240: | |
3243 | tsubcctv %r4, 0x1ab5, %r15 | |
3244 | .word 0xd807e001 ! 749: LDUW_I lduw [%r31 + 0x0001], %r12 | |
3245 | set 0x61b18847, %r28 | |
3246 | stxa %r28, [%g0] 0x73 | |
3247 | intvec_0_241: | |
3248 | .word 0x39400001 ! 750: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3249 | .word 0x87802004 ! 751: WRASI_I wr %r0, 0x0004, %asi | |
3250 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_242)) -> intp(0,0,9) | |
3251 | intvec_0_242: | |
3252 | .word 0x39400001 ! 752: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3253 | .word 0x91d020b5 ! 753: Tcc_I ta icc_or_xcc, %r0 + 181 | |
3254 | DS_0_243: | |
3255 | nop | |
3256 | not %g0, %g2 | |
3257 | .word 0x9d902003 ! 754: WRPR_WSTATE_I wrpr %r0, 0x0003, %wstate | |
3258 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_244)) -> intp(0,1,3) | |
3259 | xir_0_244: | |
3260 | .word 0xa9836001 ! 755: WR_SET_SOFTINT_I wr %r13, 0x0001, %set_softint | |
3261 | DS_0_245: | |
3262 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3263 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
3264 | .word 0xa5a00544 ! 1: FSQRTd fsqrt | |
3265 | .word 0x8ba48829 ! 756: FADDs fadds %f18, %f9, %f5 | |
3266 | .word 0x87802055 ! 757: WRASI_I wr %r0, 0x0055, %asi | |
3267 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_246)) -> intp(0,0,0) | |
3268 | intvec_0_246: | |
3269 | .word 0x39400001 ! 758: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3270 | .word 0xca07c000 ! 759: LDUW_R lduw [%r31 + %r0], %r5 | |
3271 | .word 0x81982487 ! 760: WRHPR_HPSTATE_I wrhpr %r0, 0x0487, %hpstate | |
3272 | .word 0x85a489ab ! 761: FDIVs fdivs %f18, %f11, %f2 | |
3273 | .word 0xa5454000 ! 762: RD_CLEAR_SOFTINT rd %clear_softint, %r18 | |
3274 | .word 0xe4900e40 ! 763: LDUHA_R lduha [%r0, %r0] 0x72, %r18 | |
3275 | .word 0xe4d804a0 ! 764: LDXA_R ldxa [%r0, %r0] 0x25, %r18 | |
3276 | .word 0xe597e001 ! 765: LDQFA_I - [%r31, 0x0001], %f18 | |
3277 | .word 0x91d02032 ! 766: Tcc_I ta icc_or_xcc, %r0 + 50 | |
3278 | .word 0x879023aa ! 767: WRPR_TT_I wrpr %r0, 0x03aa, %tt | |
3279 | .word 0x93d02035 ! 768: Tcc_I tne icc_or_xcc, %r0 + 53 | |
3280 | .word 0xe4880e80 ! 769: LDUBA_R lduba [%r0, %r0] 0x74, %r18 | |
3281 | .word 0x81510000 ! 770: RDPR_TICK rdpr %tick, %r0 | |
3282 | tagged_0_247: | |
3283 | taddcctv %r9, 0x19f3, %r6 | |
3284 | .word 0xe407e001 ! 771: LDUW_I lduw [%r31 + 0x0001], %r18 | |
3285 | .word 0x38800001 ! 772: BGU bgu,a <label_0x1> | |
3286 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_248)) -> intp(0,0,6) | |
3287 | intvec_0_248: | |
3288 | .word 0x39400001 ! 773: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3289 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_249)) -> intp(0,1,3) | |
3290 | xir_0_249: | |
3291 | .word 0xa9802001 ! 774: WR_SET_SOFTINT_I wr %r0, 0x0001, %set_softint | |
3292 | .word 0xe4880e80 ! 775: LDUBA_R lduba [%r0, %r0] 0x74, %r18 | |
3293 | .word 0x8790225d ! 776: WRPR_TT_I wrpr %r0, 0x025d, %tt | |
3294 | .word 0xa7a00545 ! 777: FSQRTd fsqrt | |
3295 | change_to_randtl_0_250: | |
3296 | ta T_CHANGE_PRIV ! macro | |
3297 | done_change_to_randtl_0_250: | |
3298 | .word 0x8f902002 ! 778: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
3299 | mondo_0_251: | |
3300 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3301 | ||
3302 | stxa %r16, [%r0+0x3c0] %asi | |
3303 | .word 0x9d948002 ! 779: WRPR_WSTATE_R wrpr %r18, %r2, %wstate | |
3304 | invalw | |
3305 | mov 0xb3, %r30 | |
3306 | .word 0x91d0001e ! 780: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3307 | .word 0xe6c7e030 ! 781: LDSWA_I ldswa [%r31, + 0x0030] %asi, %r19 | |
3308 | .word 0xa3500000 ! 782: RDPR_TPC rdpr %tpc, %r17 | |
3309 | .word 0x87802080 ! 783: WRASI_I wr %r0, 0x0080, %asi | |
3310 | .word 0x93d02035 ! 784: Tcc_I tne icc_or_xcc, %r0 + 53 | |
3311 | .word 0xe2dfe010 ! 785: LDXA_I ldxa [%r31, + 0x0010] %asi, %r17 | |
3312 | .word 0x86f86001 ! 786: SDIVcc_I sdivcc %r1, 0x0001, %r3 | |
3313 | .word 0x87802080 ! 787: WRASI_I wr %r0, 0x0080, %asi | |
3314 | .word 0x36700001 ! 788: BPGE <illegal instruction> | |
3315 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_252)) -> intp(0,1,3) | |
3316 | xir_0_252: | |
3317 | .word 0xa9842001 ! 789: WR_SET_SOFTINT_I wr %r16, 0x0001, %set_softint | |
3318 | .word 0x93902007 ! 790: WRPR_CWP_I wrpr %r0, 0x0007, %cwp | |
3319 | .word 0x89514000 ! 791: RDPR_TBA rdpr %tba, %r4 | |
3320 | mondo_0_253: | |
3321 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3322 | ||
3323 | stxa %r17, [%r0+0x3c0] %asi | |
3324 | .word 0x9d948010 ! 792: WRPR_WSTATE_R wrpr %r18, %r16, %wstate | |
3325 | .word 0xc91fe001 ! 793: LDDF_I ldd [%r31, 0x0001], %f4 | |
3326 | tagged_0_254: | |
3327 | tsubcctv %r16, 0x1225, %r19 | |
3328 | .word 0xc807e001 ! 794: LDUW_I lduw [%r31 + 0x0001], %r4 | |
3329 | DS_0_255: | |
3330 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
3331 | .word 0xc7334011 ! 1: STQF_R - %f3, [%r17, %r13] | |
3332 | normalw | |
3333 | .word 0x81458000 ! 795: RD_SOFTINT_REG stbar | |
3334 | .word 0x8550c000 ! 796: RDPR_TT rdpr %tt, %r2 | |
3335 | .word 0xc48008a0 ! 797: LDUWA_R lduwa [%r0, %r0] 0x45, %r2 | |
3336 | change_to_randtl_0_256: | |
3337 | ta T_CHANGE_PRIV ! macro | |
3338 | done_change_to_randtl_0_256: | |
3339 | .word 0x8f902002 ! 798: WRPR_TL_I wrpr %r0, 0x0002, %tl | |
3340 | .word 0xc48008a0 ! 799: LDUWA_R lduwa [%r0, %r0] 0x45, %r2 | |
3341 | .word 0x8b51c000 ! 800: RDPR_TL rdpr %tl, %r5 | |
3342 | set 0x2f9729ff, %r28 | |
3343 | stxa %r28, [%g0] 0x73 | |
3344 | intvec_0_257: | |
3345 | .word 0x39400001 ! 801: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3346 | .word 0x26800001 ! 802: BL bl,a <label_0x1> | |
3347 | .word 0x90850006 ! 803: ADDcc_R addcc %r20, %r6, %r8 | |
3348 | .word 0xa1902009 ! 804: WRPR_GL_I wrpr %r0, 0x0009, %- | |
3349 | .word 0xd03fe001 ! 805: STD_I std %r8, [%r31 + 0x0001] | |
3350 | .word 0x91d02032 ! 806: Tcc_I ta icc_or_xcc, %r0 + 50 | |
3351 | .word 0x91504000 ! 807: RDPR_TNPC rdpr %tnpc, %r8 | |
3352 | .word 0x8150c000 ! 808: RDPR_TT rdpr %tt, %r0 | |
3353 | .word 0x93d02034 ! 809: Tcc_I tne icc_or_xcc, %r0 + 52 | |
3354 | splash_lsu_0_258: | |
3355 | set 0x3, %r2 | |
3356 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3357 | .word 0x3d400001 ! 810: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3358 | .word 0x93520000 ! 811: RDPR_PIL rdpr %pil, %r9 | |
3359 | set 0x76ed90de, %r28 | |
3360 | stxa %r28, [%g0] 0x73 | |
3361 | intvec_0_259: | |
3362 | .word 0x39400001 ! 812: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3363 | .word 0x87802016 ! 813: WRASI_I wr %r0, 0x0016, %asi | |
3364 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_260)) -> intp(0,0,30) | |
3365 | intvec_0_260: | |
3366 | .word 0x39400001 ! 814: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3367 | set 0x9bb84b4f, %r28 | |
3368 | stxa %r28, [%g0] 0x73 | |
3369 | intvec_0_261: | |
3370 | .word 0x39400001 ! 815: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3371 | .word 0xa9818008 ! 816: WR_SET_SOFTINT_R wr %r6, %r8, %set_softint | |
3372 | .word 0xd2bfe001 ! 817: STDA_I stda %r9, [%r31 + 0x0001] %asi | |
3373 | ta T_CHANGE_PRIV ! macro | |
3374 | tagged_0_262: | |
3375 | tsubcctv %r13, 0x1158, %r24 | |
3376 | .word 0xd207e001 ! 819: LDUW_I lduw [%r31 + 0x0001], %r9 | |
3377 | .word 0xd2cfe020 ! 820: LDSBA_I ldsba [%r31, + 0x0020] %asi, %r9 | |
3378 | .word 0xd247c000 ! 821: LDSW_R ldsw [%r31 + %r0], %r9 | |
3379 | .word 0x24800001 ! 822: BLE ble,a <label_0x1> | |
3380 | .word 0x2c700001 ! 823: BPNEG <illegal instruction> | |
3381 | mondo_0_263: | |
3382 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3383 | ||
3384 | stxa %r6, [%r0+0x3c8] %asi | |
3385 | .word 0x9d950004 ! 824: WRPR_WSTATE_R wrpr %r20, %r4, %wstate | |
3386 | .word 0xd337c004 ! 825: STQF_R - %f9, [%r4, %r31] | |
3387 | .word 0xd31fe001 ! 826: LDDF_I ldd [%r31, 0x0001], %f9 | |
3388 | .word 0xa1464000 ! 827: RD_STICK_CMPR_REG rd %-, %r16 | |
3389 | change_to_randtl_0_264: | |
3390 | ta T_CHANGE_PRIV ! macro | |
3391 | done_change_to_randtl_0_264: | |
3392 | .word 0x8f902000 ! 828: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
3393 | .word 0xe197e001 ! 829: LDQFA_I - [%r31, 0x0001], %f16 | |
3394 | splash_lsu_0_265: | |
3395 | set 0x1b, %r2 | |
3396 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3397 | .word 0x3d400001 ! 830: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3398 | .word 0x8d802000 ! 831: WRFPRS_I wr %r0, 0x0000, %fprs | |
3399 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_266)) -> intp(0,0,5) | |
3400 | intvec_0_266: | |
3401 | .word 0x39400001 ! 832: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3402 | .word 0xe047e001 ! 833: LDSW_I ldsw [%r31 + 0x0001], %r16 | |
3403 | .word 0xab810001 ! 834: WR_CLEAR_SOFTINT_R wr %r4, %r1, %clear_softint | |
3404 | splash_lsu_0_267: | |
3405 | set 0x15, %r2 | |
3406 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3407 | .word 0x3d400001 ! 835: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3408 | .word 0x8d802000 ! 836: WRFPRS_I wr %r0, 0x0000, %fprs | |
3409 | .word 0xe08804a0 ! 837: LDUBA_R lduba [%r0, %r0] 0x25, %r16 | |
3410 | .word 0x879022ae ! 838: WRPR_TT_I wrpr %r0, 0x02ae, %tt | |
3411 | splash_cmpr_0_268: | |
3412 | nop | |
3413 | mov 1, %g2 | |
3414 | sllx %g2, 63, %g2 | |
3415 | or %g1, %g2, %g1 | |
3416 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
3417 | .word 0xb1816001 ! 839: WR_STICK_REG_I wr %r5, 0x0001, %- | |
3418 | .word 0xa3520000 ! 840: RDPR_PIL <illegal instruction> | |
3419 | .word 0x93d020b4 ! 841: Tcc_I tne icc_or_xcc, %r0 + 180 | |
3420 | splash_cmpr_0_269: | |
3421 | nop | |
3422 | mov 1, %g2 | |
3423 | sllx %g2, 63, %g2 | |
3424 | or %g1, %g2, %g1 | |
3425 | .word 0xaf800001 ! 1: WR_TICK_CMPR_REG_R wr %r0, %r1, %- | |
3426 | .word 0xb182a001 ! 842: WR_STICK_REG_I wr %r10, 0x0001, %- | |
3427 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_270)) -> intp(0,1,3) | |
3428 | xir_0_270: | |
3429 | .word 0xa984a001 ! 843: WR_SET_SOFTINT_I wr %r18, 0x0001, %set_softint | |
3430 | .word 0xe2800ac0 ! 844: LDUWA_R lduwa [%r0, %r0] 0x56, %r17 | |
3431 | mondo_0_271: | |
3432 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3433 | ||
3434 | stxa %r19, [%r0+0x3c0] %asi | |
3435 | .word 0x9d94c012 ! 845: WRPR_WSTATE_R wrpr %r19, %r18, %wstate | |
3436 | .word 0x879021f9 ! 846: WRPR_TT_I wrpr %r0, 0x01f9, %tt | |
3437 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_272)) -> intp(0,0,16) | |
3438 | intvec_0_272: | |
3439 | .word 0x39400001 ! 847: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3440 | .word 0x879020ea ! 848: WRPR_TT_I wrpr %r0, 0x00ea, %tt | |
3441 | DS_0_273: | |
3442 | nop | |
3443 | not %g0, %g2 | |
3444 | .word 0x9d902003 ! 849: WRPR_WSTATE_I wrpr %r0, 0x0003, %wstate | |
3445 | .word 0x836a0004 ! 850: SDIVX_R sdivx %r8, %r4, %r1 | |
3446 | .word 0xa190200c ! 851: WRPR_GL_I wrpr %r0, 0x000c, %- | |
3447 | .word 0x91d02033 ! 852: Tcc_I ta icc_or_xcc, %r0 + 51 | |
3448 | .word 0x93902002 ! 853: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
3449 | .word 0x8d802000 ! 854: WRFPRS_I wr %r0, 0x0000, %fprs | |
3450 | tagged_0_274: | |
3451 | tsubcctv %r8, 0x1e64, %r17 | |
3452 | .word 0xc207e001 ! 855: LDUW_I lduw [%r31 + 0x0001], %r1 | |
3453 | .word 0x87802080 ! 856: WRASI_I wr %r0, 0x0080, %asi | |
3454 | set 0xc5b4fe0b, %r28 | |
3455 | stxa %r28, [%g0] 0x73 | |
3456 | intvec_0_275: | |
3457 | .word 0x39400001 ! 857: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3458 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_276)) -> intp(0,1,3) | |
3459 | xir_0_276: | |
3460 | .word 0xa981a001 ! 858: WR_SET_SOFTINT_I wr %r6, 0x0001, %set_softint | |
3461 | change_to_randtl_0_277: | |
3462 | ta T_CHANGE_HPRIV ! macro | |
3463 | done_change_to_randtl_0_277: | |
3464 | .word 0x8f902004 ! 859: WRPR_TL_I wrpr %r0, 0x0004, %tl | |
3465 | .word 0x87802020 ! 860: WRASI_I wr %r0, 0x0020, %asi | |
3466 | .word 0xc28008a0 ! 861: LDUWA_R lduwa [%r0, %r0] 0x45, %r1 | |
3467 | .word 0xa190200b ! 862: WRPR_GL_I wrpr %r0, 0x000b, %- | |
3468 | .word 0xc2d7e000 ! 863: LDSHA_I ldsha [%r31, + 0x0000] %asi, %r1 | |
3469 | ta T_CHANGE_HPRIV ! macro | |
3470 | .word 0x93902000 ! 865: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
3471 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_278)) -> intp(0,0,23) | |
3472 | intvec_0_278: | |
3473 | .word 0x39400001 ! 866: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3474 | .word 0x93d02035 ! 867: Tcc_I tne icc_or_xcc, %r0 + 53 | |
3475 | .word 0xa190200d ! 868: WRPR_GL_I wrpr %r0, 0x000d, %- | |
3476 | .word 0x9b520000 ! 869: RDPR_PIL rdpr %pil, %r13 | |
3477 | DS_0_279: | |
3478 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3479 | .word 0xbfefc000 ! 870: RESTORE_R restore %r31, %r0, %r31 | |
3480 | .word 0x9551c000 ! 871: RDPR_TL rdpr %tl, %r10 | |
3481 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_280)) -> intp(0,1,3) | |
3482 | xir_0_280: | |
3483 | .word 0xa980e001 ! 872: WR_SET_SOFTINT_I wr %r3, 0x0001, %set_softint | |
3484 | mondo_0_281: | |
3485 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3486 | ||
3487 | stxa %r18, [%r0+0x3c0] %asi | |
3488 | .word 0x9d93400b ! 873: WRPR_WSTATE_R wrpr %r13, %r11, %wstate | |
3489 | .word 0xd597e001 ! 874: LDQFA_I - [%r31, 0x0001], %f10 | |
3490 | .word 0x8d902422 ! 875: WRPR_PSTATE_I wrpr %r0, 0x0422, %pstate | |
3491 | tagged_0_282: | |
3492 | tsubcctv %r15, 0x1288, %r9 | |
3493 | .word 0xd407e001 ! 876: LDUW_I lduw [%r31 + 0x0001], %r10 | |
3494 | .word 0xa1902000 ! 877: WRPR_GL_I wrpr %r0, 0x0000, %- | |
3495 | .word 0x95508000 ! 878: RDPR_TSTATE rdpr %tstate, %r10 | |
3496 | .word 0x93902006 ! 879: WRPR_CWP_I wrpr %r0, 0x0006, %cwp | |
3497 | .word 0xd49004a0 ! 880: LDUHA_R lduha [%r0, %r0] 0x25, %r10 | |
3498 | .word 0x8d902956 ! 881: WRPR_PSTATE_I wrpr %r0, 0x0956, %pstate | |
3499 | DS_0_283: | |
3500 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3501 | .word 0xbfe7c000 ! 882: SAVE_R save %r31, %r0, %r31 | |
3502 | .word 0x83450000 ! 883: RD_SET_SOFTINT rd %set_softint, %r1 | |
3503 | .word 0x93902004 ! 884: WRPR_CWP_I wrpr %r0, 0x0004, %cwp | |
3504 | .word 0x22800001 ! 885: BE be,a <label_0x1> | |
3505 | .word 0x879023f8 ! 886: WRPR_TT_I wrpr %r0, 0x03f8, %tt | |
3506 | splash_tba_0_284: | |
3507 | set 0x120000, %r2 | |
3508 | st %r1, [%r2+%r0] | |
3509 | ta T_CHANGE_PRIV | |
3510 | set 0x120000, %r2 | |
3511 | .word 0x8b900002 ! 887: WRPR_TBA_R wrpr %r0, %r2, %tba | |
3512 | .word 0x32800001 ! 888: BNE bne,a <label_0x1> | |
3513 | splash_lsu_0_285: | |
3514 | set 0xb, %r2 | |
3515 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3516 | .word 0x3d400001 ! 889: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3517 | change_to_randtl_0_286: | |
3518 | ta T_CHANGE_PRIV ! macro | |
3519 | done_change_to_randtl_0_286: | |
3520 | .word 0x8f902000 ! 890: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
3521 | tagged_0_287: | |
3522 | taddcctv %r9, 0x1f28, %r11 | |
3523 | .word 0xc207e001 ! 891: LDUW_I lduw [%r31 + 0x0001], %r1 | |
3524 | DS_0_288: | |
3525 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
3526 | .xword 0xeb782861 ! Random illegal ? | |
3527 | .word 0xe714c003 ! 1: LDQF_R - [%r19, %r3], %f19 | |
3528 | .word 0x91a1c821 ! 892: FADDs fadds %f7, %f1, %f8 | |
3529 | .word 0x93902004 ! 893: WRPR_CWP_I wrpr %r0, 0x0004, %cwp | |
3530 | DS_0_289: | |
3531 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
3532 | pdist %f20, %f2, %f12 | |
3533 | .word 0xa3b0c30b ! 894: ALIGNADDRESS alignaddr %r3, %r11, %r17 | |
3534 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_290)) -> intp(0,0,24) | |
3535 | intvec_0_290: | |
3536 | .word 0x39400001 ! 895: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3537 | .word 0xe2c804a0 ! 896: LDSBA_R ldsba [%r0, %r0] 0x25, %r17 | |
3538 | ta T_CHANGE_PRIV ! macro | |
3539 | .word 0x20800001 ! 898: BN bn,a <label_0x1> | |
3540 | .word 0xe28008a0 ! 899: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 | |
3541 | set 0x73661c2c, %r28 | |
3542 | stxa %r28, [%g0] 0x73 | |
3543 | intvec_0_291: | |
3544 | .word 0x39400001 ! 900: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3545 | .word 0x8d802000 ! 901: WRFPRS_I wr %r0, 0x0000, %fprs | |
3546 | .word 0xe2c7e010 ! 902: LDSWA_I ldswa [%r31, + 0x0010] %asi, %r17 | |
3547 | .word 0xe28008a0 ! 903: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 | |
3548 | .word 0xe28008a0 ! 904: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 | |
3549 | .word 0xe2d7e000 ! 905: LDSHA_I ldsha [%r31, + 0x0000] %asi, %r17 | |
3550 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_292)) -> intp(0,0,9) | |
3551 | intvec_0_292: | |
3552 | .word 0x39400001 ! 906: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3553 | set 0xdad9696a, %r28 | |
3554 | stxa %r28, [%g0] 0x73 | |
3555 | intvec_0_293: | |
3556 | .word 0x39400001 ! 907: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3557 | splash_htba_0_294: | |
3558 | set 0x003b0000, %r2 | |
3559 | st %r1, [%r2+%r0] | |
3560 | ta T_CHANGE_HPRIV | |
3561 | set 0x00380000, %r2 | |
3562 | .word 0x8b980002 ! 908: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
3563 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_295)) -> intp(0,1,3) | |
3564 | xir_0_295: | |
3565 | .word 0xa9812001 ! 909: WR_SET_SOFTINT_I wr %r4, 0x0001, %set_softint | |
3566 | .word 0xe237c00b ! 910: STH_R sth %r17, [%r31 + %r11] | |
3567 | .word 0x93902000 ! 911: WRPR_CWP_I wrpr %r0, 0x0000, %cwp | |
3568 | .word 0x8d902be7 ! 912: WRPR_PSTATE_I wrpr %r0, 0x0be7, %pstate | |
3569 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_296)) -> intp(0,1,3) | |
3570 | xir_0_296: | |
3571 | .word 0xa981a001 ! 913: WR_SET_SOFTINT_I wr %r6, 0x0001, %set_softint | |
3572 | splash_lsu_0_297: | |
3573 | set 0x15, %r2 | |
3574 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3575 | .word 0x3d400001 ! 914: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3576 | .word 0xe2c804a0 ! 915: LDSBA_R ldsba [%r0, %r0] 0x25, %r17 | |
3577 | .word 0xe2d804a0 ! 916: LDXA_R ldxa [%r0, %r0] 0x25, %r17 | |
3578 | .word 0xe327e001 ! 917: STF_I st %f17, [0x0001, %r31] | |
3579 | .word 0xe2d804a0 ! 918: LDXA_R ldxa [%r0, %r0] 0x25, %r17 | |
3580 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_298)) -> intp(0,0,30) | |
3581 | intvec_0_298: | |
3582 | .word 0x39400001 ! 919: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3583 | .word 0x8d9023e2 ! 920: WRPR_PSTATE_I wrpr %r0, 0x03e2, %pstate | |
3584 | .word 0xe2cfe000 ! 921: LDSBA_I ldsba [%r31, + 0x0000] %asi, %r17 | |
3585 | .word 0x81460000 ! 922: RD_STICK_REG stbar | |
3586 | .word 0x87902024 ! 923: WRPR_TT_I wrpr %r0, 0x0024, %tt | |
3587 | DS_0_299: | |
3588 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
3589 | .word 0xc9342001 ! 1: STQF_I - %f4, [0x0001, %r16] | |
3590 | normalw | |
3591 | .word 0xa9458000 ! 924: RD_SOFTINT_REG rd %softint, %r20 | |
3592 | mondo_0_300: | |
3593 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3594 | ||
3595 | stxa %r19, [%r0+0x3c0] %asi | |
3596 | .word 0x9d920008 ! 925: WRPR_WSTATE_R wrpr %r8, %r8, %wstate | |
3597 | .word 0x2c800001 ! 926: BNEG bneg,a <label_0x1> | |
3598 | .word 0x93902005 ! 927: WRPR_CWP_I wrpr %r0, 0x0005, %cwp | |
3599 | .word 0xad812001 ! 928: WR_SOFTINT_REG_I wr %r4, 0x0001, %softint | |
3600 | set 0xc3cac967, %r28 | |
3601 | stxa %r28, [%g0] 0x73 | |
3602 | intvec_0_301: | |
3603 | .word 0x39400001 ! 929: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3604 | .word 0xa190200b ! 930: WRPR_GL_I wrpr %r0, 0x000b, %- | |
3605 | invalw | |
3606 | mov 0xb5, %r30 | |
3607 | .word 0x93d0001e ! 931: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
3608 | .word 0xe997e001 ! 932: LDQFA_I - [%r31, 0x0001], %f20 | |
3609 | .word 0xe89004a0 ! 933: LDUHA_R lduha [%r0, %r0] 0x25, %r20 | |
3610 | .word 0x91946001 ! 934: WRPR_PIL_I wrpr %r17, 0x0001, %pil | |
3611 | .word 0x8d902575 ! 935: WRPR_PSTATE_I wrpr %r0, 0x0575, %pstate | |
3612 | .word 0x2c800001 ! 936: BNEG bneg,a <label_0x1> | |
3613 | .word 0xa1902003 ! 937: WRPR_GL_I wrpr %r0, 0x0003, %- | |
3614 | .word 0x9f802001 ! 938: SIR sir 0x0001 | |
3615 | .word 0xe937e001 ! 939: STQF_I - %f20, [0x0001, %r31] | |
3616 | .word 0x87802004 ! 940: WRASI_I wr %r0, 0x0004, %asi | |
3617 | .word 0xe88008a0 ! 941: LDUWA_R lduwa [%r0, %r0] 0x45, %r20 | |
3618 | .word 0x8790214e ! 942: WRPR_TT_I wrpr %r0, 0x014e, %tt | |
3619 | .word 0xe80fc000 ! 943: LDUB_R ldub [%r31 + %r0], %r20 | |
3620 | .word 0xe88804a0 ! 944: LDUBA_R lduba [%r0, %r0] 0x25, %r20 | |
3621 | .word 0x38800001 ! 945: BGU bgu,a <label_0x1> | |
3622 | .word 0x93902005 ! 946: WRPR_CWP_I wrpr %r0, 0x0005, %cwp | |
3623 | .word 0xe80fc000 ! 947: LDUB_R ldub [%r31 + %r0], %r20 | |
3624 | .word 0x87802088 ! 948: WRASI_I wr %r0, 0x0088, %asi | |
3625 | .word 0x20800001 ! 949: BN bn,a <label_0x1> | |
3626 | .word 0x87494000 ! 950: RDHPR_HTBA rdhpr %htba, %r3 | |
3627 | .word 0xc64fc000 ! 951: LDSB_R ldsb [%r31 + %r0], %r3 | |
3628 | .word 0x22700001 ! 952: BPE <illegal instruction> | |
3629 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_302)) -> intp(0,0,23) | |
3630 | intvec_0_302: | |
3631 | .word 0x39400001 ! 953: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3632 | .word 0x9f802001 ! 954: SIR sir 0x0001 | |
3633 | .word 0xc6d804a0 ! 955: LDXA_R ldxa [%r0, %r0] 0x25, %r3 | |
3634 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_303)) -> intp(0,1,3) | |
3635 | xir_0_303: | |
3636 | .word 0xa9852001 ! 956: WR_SET_SOFTINT_I wr %r20, 0x0001, %set_softint | |
3637 | mondo_0_304: | |
3638 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3639 | ||
3640 | stxa %r12, [%r0+0x3c8] %asi | |
3641 | .word 0x9d950002 ! 957: WRPR_WSTATE_R wrpr %r20, %r2, %wstate | |
3642 | splash_htba_0_305: | |
3643 | set 0x80000, %r2 | |
3644 | ld [%r2+%r0], %r1 | |
3645 | ta T_CHANGE_HPRIV | |
3646 | set 0x80000, %r2 | |
3647 | .word 0x8b980002 ! 958: WRHPR_HTBA_R wrhpr %r0, %r2, %htba | |
3648 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
3649 | ta T_CHANGE_NONPRIV ! macro | |
3650 | .word 0x89824002 ! 959: WRTICK_R wr %r9, %r2, %tick | |
3651 | .word 0x8fa000cb ! 960: FNEGd fnegd %f42, %f38 | |
3652 | .word 0xce9fc020 ! 961: LDDA_R ldda [%r31, %r0] 0x01, %r7 | |
3653 | .word 0x99902005 ! 962: WRPR_CLEANWIN_I wrpr %r0, 0x0005, %cleanwin | |
3654 | .word 0xa190200f ! 963: WRPR_GL_I wrpr %r0, 0x000f, %- | |
3655 | .word 0x87802004 ! 964: WRASI_I wr %r0, 0x0004, %asi | |
3656 | set 0x5edf89f8, %r28 | |
3657 | stxa %r28, [%g0] 0x73 | |
3658 | intvec_0_307: | |
3659 | .word 0x39400001 ! 965: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3660 | .word 0x93902002 ! 966: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
3661 | .word 0xa980c008 ! 967: WR_SET_SOFTINT_R wr %r3, %r8, %set_softint | |
3662 | .word 0xa1902008 ! 968: WRPR_GL_I wrpr %r0, 0x0008, %- | |
3663 | .word 0x8d802000 ! 969: WRFPRS_I wr %r0, 0x0000, %fprs | |
3664 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_308)) -> intp(0,0,15) | |
3665 | intvec_0_308: | |
3666 | .word 0x39400001 ! 970: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3667 | set 0xefdce143, %r28 | |
3668 | stxa %r28, [%g0] 0x73 | |
3669 | intvec_0_309: | |
3670 | .word 0x39400001 ! 971: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3671 | .word 0x91922001 ! 972: WRPR_PIL_I wrpr %r8, 0x0001, %pil | |
3672 | .word 0x91450000 ! 973: RD_SET_SOFTINT rd %set_softint, %r8 | |
3673 | .word 0x91d020b5 ! 974: Tcc_I ta icc_or_xcc, %r0 + 181 | |
3674 | !$EV trig_pc_d(1, @VA(.MAIN.xir_0_310)) -> intp(0,1,3) | |
3675 | xir_0_310: | |
3676 | .word 0xa984a001 ! 975: WR_SET_SOFTINT_I wr %r18, 0x0001, %set_softint | |
3677 | .word 0x8d902ceb ! 976: WRPR_PSTATE_I wrpr %r0, 0x0ceb, %pstate | |
3678 | .word 0xd0c004a0 ! 977: LDSWA_R ldswa [%r0, %r0] 0x25, %r8 | |
3679 | .word 0x93902002 ! 978: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
3680 | .word 0xd0cfe010 ! 979: LDSBA_I ldsba [%r31, + 0x0010] %asi, %r8 | |
3681 | set 0x57971dac, %r28 | |
3682 | stxa %r28, [%g0] 0x73 | |
3683 | intvec_0_311: | |
3684 | .word 0x39400001 ! 980: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3685 | .word 0xd01fe001 ! 981: LDD_I ldd [%r31 + 0x0001], %r8 | |
3686 | .word 0x9351c000 ! 982: RDPR_TL rdpr %tl, %r9 | |
3687 | .word 0xd2d7e030 ! 983: LDSHA_I ldsha [%r31, + 0x0030] %asi, %r9 | |
3688 | DS_0_312: | |
3689 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> | |
3690 | .word 0xbfe7c000 ! 984: SAVE_R save %r31, %r0, %r31 | |
3691 | .word 0x8d802004 ! 985: WRFPRS_I wr %r0, 0x0004, %fprs | |
3692 | .word 0x22700001 ! 986: BPE <illegal instruction> | |
3693 | mondo_0_313: | |
3694 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3695 | ||
3696 | stxa %r7, [%r0+0x3d8] %asi | |
3697 | .word 0x9d94c00b ! 987: WRPR_WSTATE_R wrpr %r19, %r11, %wstate | |
3698 | .word 0xd2800a60 ! 988: LDUWA_R lduwa [%r0, %r0] 0x53, %r9 | |
3699 | invalw | |
3700 | mov 0x30, %r30 | |
3701 | .word 0x83d0001e ! 989: Tcc_R te icc_or_xcc, %r0 + %r30 | |
3702 | splash_tba_0_314: | |
3703 | set 0x120000, %r2 | |
3704 | st %r1, [%r2+%r0] | |
3705 | ta T_CHANGE_PRIV | |
3706 | set 0x120000, %r2 | |
3707 | .word 0x8b900002 ! 990: WRPR_TBA_R wrpr %r0, %r2, %tba | |
3708 | .word 0xd20fe001 ! 991: LDUB_I ldub [%r31 + 0x0001], %r9 | |
3709 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
3710 | ta T_CHANGE_NONHPRIV ! macro | |
3711 | .word 0x89844003 ! 992: WRTICK_R wr %r17, %r3, %tick | |
3712 | .word 0x91d02032 ! 993: Tcc_I ta icc_or_xcc, %r0 + 50 | |
3713 | .word 0x28800001 ! 994: BLEU bleu,a <label_0x1> | |
3714 | !$EV trig_pc_d(1, @VA(.MAIN.intvec_0_316)) -> intp(0,0,23) | |
3715 | intvec_0_316: | |
3716 | .word 0x39400001 ! 995: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3717 | .word 0x93a00554 ! 996: FSQRTd fsqrt | |
3718 | DS_0_317: | |
3719 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
3720 | .word 0xd1326001 ! 1: STQF_I - %f8, [0x0001, %r9] | |
3721 | normalw | |
3722 | .word 0xa9458000 ! 997: RD_SOFTINT_REG rd %softint, %r20 | |
3723 | invalw | |
3724 | mov 0x30, %r30 | |
3725 | .word 0x91d0001e ! 998: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3726 | SECTION .MAIN | |
3727 | .text | |
3728 | diag_finish: | |
3729 | nop | |
3730 | nop | |
3731 | nop | |
3732 | ta T_CHANGE_HPRIV | |
3733 | set 0x80000, %r2 | |
3734 | wrhpr %g2, %g0, %htba | |
3735 | ta T_GOOD_TRAP | |
3736 | nop | |
3737 | nop | |
3738 | nop | |
3739 | .data | |
3740 | .xword 0x0 | |
3741 | ||
3742 | .global user_data_start | |
3743 | .data | |
3744 | user_data_start: | |
3745 | ||
3746 | .xword 0xc16869251896646f | |
3747 | .xword 0x1a2550c4d4105f74 | |
3748 | .xword 0xa40f4c066197c723 | |
3749 | .xword 0x4fc3b8d0fb546010 | |
3750 | .xword 0x076633668b26c727 | |
3751 | .xword 0x684895a21cd54812 | |
3752 | .xword 0x29e75afffc935c4e | |
3753 | .xword 0x18892b165ed91d56 | |
3754 | .xword 0xefea599bc33cf760 | |
3755 | .xword 0xcd0de9244f4ea9cd | |
3756 | .xword 0x2f9388d82de0ab36 | |
3757 | .xword 0xc537c16108dd2b5d | |
3758 | .xword 0x191c907ae717ed20 | |
3759 | .xword 0x06c09727d33a27ba | |
3760 | .xword 0x29ff5482f47c6786 | |
3761 | .xword 0x52622392ba03c434 | |
3762 | .xword 0xf83e016851725fad | |
3763 | .xword 0x89e70721e9faca03 | |
3764 | .xword 0xd746345fbd31faad | |
3765 | .xword 0xa2c8719fbe68a6bc | |
3766 | .xword 0x43d8b61a8f732b4f | |
3767 | .xword 0x15ca939029f306a0 | |
3768 | .xword 0x058f47fa0963683b | |
3769 | .xword 0x5105bc5f4a22c2c9 | |
3770 | .xword 0x9e7f1d5ffd5ef542 | |
3771 | .xword 0xae53c35d38da025e | |
3772 | .xword 0x5f7b41b4c8f100e6 | |
3773 | .xword 0x15e4e14da7edb483 | |
3774 | .xword 0xeeffb4e7c1f6b1b4 | |
3775 | .xword 0x8e95272d02153039 | |
3776 | .xword 0x3313b1560be7a7c3 | |
3777 | .xword 0xcf7ade1361fb0b76 | |
3778 | .xword 0xcaf136ed72977b1d | |
3779 | .xword 0x071be5446e694998 | |
3780 | .xword 0xe9043a982163017a | |
3781 | .xword 0x36cea78af0d981bf | |
3782 | .xword 0xf4ca5a3a827f4e51 | |
3783 | .xword 0x724a7ebe9057f1de | |
3784 | .xword 0x0c663966186458f1 | |
3785 | .xword 0xb6d0d2c0db8aa4e9 | |
3786 | .xword 0xf248ecb88d7a0442 | |
3787 | .xword 0x2c649105363ebdbd | |
3788 | .xword 0x22016e4f9471703c | |
3789 | .xword 0x613d5dbad2af341d | |
3790 | .xword 0x96a6df3329a0806d | |
3791 | .xword 0x98bfa0b7edfc9f71 | |
3792 | .xword 0xef80edc8694ae9c5 | |
3793 | .xword 0xecffb03ce95a1d33 | |
3794 | .xword 0x69f7808ac1f0797c | |
3795 | .xword 0x454ab049b52f4919 | |
3796 | .xword 0xbd89fd71d2e2a492 | |
3797 | .xword 0x67dea3b9a3435da8 | |
3798 | .xword 0x14e1d9e34ed9a61f | |
3799 | .xword 0x75326fa2ff071a2d | |
3800 | .xword 0x8a750e9a5106da90 | |
3801 | .xword 0x68e47105c9fd1446 | |
3802 | .xword 0x12244d82e1ac58c1 | |
3803 | .xword 0x2d3dc80685f8116c | |
3804 | .xword 0x36ce37d7484916ed | |
3805 | .xword 0x5f201dc97e2a9d33 | |
3806 | .xword 0x425c9ef07c70d931 | |
3807 | .xword 0x9139bb3676c8ff80 | |
3808 | .xword 0xb58423800326f6a7 | |
3809 | .xword 0xff5b4153bba5f1b0 | |
3810 | .xword 0x79d0463c8ddf57f3 | |
3811 | .xword 0x1405bce1c51a45dc | |
3812 | .xword 0xd9958c17a13bceae | |
3813 | .xword 0x68e075a284e7f3dd | |
3814 | .xword 0xe518320462f8e836 | |
3815 | .xword 0xdf4d83b823691527 | |
3816 | .xword 0x4357b020cbf93444 | |
3817 | .xword 0xde7f13598d932d85 | |
3818 | .xword 0x30f98db17ca5533c | |
3819 | .xword 0x044f327584d9388f | |
3820 | .xword 0xadae8f2674ae4173 | |
3821 | .xword 0xdb1ad5bb1a7666f4 | |
3822 | .xword 0xa1e0a3e11dcd1082 | |
3823 | .xword 0xba4d82876a727ff8 | |
3824 | .xword 0x19962db87b7c18d7 | |
3825 | .xword 0xfa4c5f024902b6cb | |
3826 | .xword 0x0c8f58c1cc017a7e | |
3827 | .xword 0x49934305d9ab70a5 | |
3828 | .xword 0xa0b85a145c487ca5 | |
3829 | .xword 0xe5f2951b642a1659 | |
3830 | .xword 0x7b54ba571f266d82 | |
3831 | .xword 0x0466a53f1669d408 | |
3832 | .xword 0x736ed33b16afe83a | |
3833 | .xword 0x8b8aed3507807812 | |
3834 | .xword 0x033ad63e9e42d891 | |
3835 | .xword 0x7b47d8d23d58f888 | |
3836 | .xword 0x84780efc19e73f1d | |
3837 | .xword 0xa075eb7dbe45fc53 | |
3838 | .xword 0xc7c9603aacff4084 | |
3839 | .xword 0x7fe081d2a002edde | |
3840 | .xword 0xc1c91dd6496306ff | |
3841 | .xword 0x124120b048220adc | |
3842 | .xword 0xf200ec7bbef369ae | |
3843 | .xword 0xdee68c908632ff91 | |
3844 | .xword 0x086fe437517d7c1c | |
3845 | .xword 0x86796640fe875567 | |
3846 | .xword 0x31b52d76622437aa | |
3847 | .xword 0x15da88f3373bc170 | |
3848 | .xword 0x7d116b1ff41b756d | |
3849 | .xword 0x7b91375004c1a7f0 | |
3850 | .xword 0xb339b60c9040f452 | |
3851 | .xword 0x7870a047f4034497 | |
3852 | .xword 0x4f08b0f806b35ff3 | |
3853 | .xword 0xd19fcf39e45eb2c7 | |
3854 | .xword 0xe4955ead2db3cebb | |
3855 | .xword 0x166a33cb93fc33f1 | |
3856 | .xword 0x935f64a222f1247f | |
3857 | .xword 0x0769a341670b663c | |
3858 | .xword 0x8c21efe2c96ca14e | |
3859 | .xword 0x28e9e73f63486390 | |
3860 | .xword 0xd55a9e30343848b6 | |
3861 | .xword 0xf136962fa13e2ea8 | |
3862 | .xword 0xc7885b127e1fd96c | |
3863 | .xword 0x4b2cd93300da6a42 | |
3864 | .xword 0xd1983ee8795bc8fc | |
3865 | .xword 0x6405a64db4ce9a09 | |
3866 | .xword 0x0f3ae7b0fa29e76f | |
3867 | .xword 0x2f76dcbf2fbdd5ac | |
3868 | .xword 0x0867fdf677cc9216 | |
3869 | .xword 0xb6cae65884024067 | |
3870 | .xword 0x69bd92b9f9669adc | |
3871 | .xword 0xbe1c1c4e45f516c5 | |
3872 | .xword 0xcecadc6b7b54decb | |
3873 | .xword 0xe3289117253def23 | |
3874 | .xword 0x7ee26f740c45ff79 | |
3875 | .xword 0x62254c5dff89bdb7 | |
3876 | .xword 0xc493aa53380a136a | |
3877 | .xword 0xb3fdfc48e936299d | |
3878 | .xword 0x626e8f99e5ec041c | |
3879 | .xword 0xcca9a65e175de389 | |
3880 | .xword 0x8b1a9de1499a4142 | |
3881 | .xword 0x5aa7d0f026236c18 | |
3882 | .xword 0x2fae79ce4e255ed4 | |
3883 | .xword 0xbe41771dd00a48b0 | |
3884 | .xword 0xe78aa9373d5210c3 | |
3885 | .xword 0x58084e6a2c7bb7fe | |
3886 | .xword 0x6d3ea35a16a6181c | |
3887 | .xword 0x2a12a7f3688cc976 | |
3888 | .xword 0x0bfb52f78c5c4f28 | |
3889 | .xword 0xbdac6b876e71c8a9 | |
3890 | .xword 0xf3bf43bc5a3d0b98 | |
3891 | .xword 0x026ec21d2dbf2588 | |
3892 | .xword 0xdcf5e0061464fc5d | |
3893 | .xword 0x5516e3ef9de03044 | |
3894 | .xword 0xade829b0a762c411 | |
3895 | .xword 0x0cf6cca9d7897ec2 | |
3896 | .xword 0x796056f9f66ed64f | |
3897 | .xword 0xc0d7d8156051b8df | |
3898 | .xword 0x0d7aa0e429eb6df9 | |
3899 | .xword 0xcc32bcc7a38bc9c0 | |
3900 | .xword 0xd6d7755e81aa606e | |
3901 | .xword 0x56ddbaec5d83d6e9 | |
3902 | .xword 0x3d1835e190aea33c | |
3903 | .xword 0xe26688c1ffc5641d | |
3904 | .xword 0xb067b49309f108cb | |
3905 | .xword 0x993f71a40dea6737 | |
3906 | .xword 0xe5b49f17698c4ab8 | |
3907 | .xword 0x8179da184a91d81d | |
3908 | .xword 0x1dee86016aefdbc0 | |
3909 | .xword 0xd919dc228c2475e1 | |
3910 | .xword 0x98159c6aa3b12419 | |
3911 | .xword 0xa1d36a1494de0b3c | |
3912 | .xword 0x05a404ac80440bf6 | |
3913 | .xword 0x06a19446c119a6e3 | |
3914 | .xword 0x95188ff3616929b8 | |
3915 | .xword 0x9dc03f22aafeaf0a | |
3916 | .xword 0x97b285c0f467fc9b | |
3917 | .xword 0x7665a74d5b4f1e2c | |
3918 | .xword 0xcd25a13f07b2d17e | |
3919 | .xword 0xbd27dd06fbd029cf | |
3920 | .xword 0x9240eb8dc595e587 | |
3921 | .xword 0x9cb1766e62ae782f | |
3922 | .xword 0x173eaec8457917a0 | |
3923 | .xword 0x169c53013c3f4327 | |
3924 | .xword 0xb091066c549436b5 | |
3925 | .xword 0xa5a1aab987b33201 | |
3926 | .xword 0x25d70ab180e4a1a7 | |
3927 | .xword 0x72754a8aaad2f6c3 | |
3928 | .xword 0x3504c71bb439abb1 | |
3929 | .xword 0x259302c7cb704ea8 | |
3930 | .xword 0xbd65fc16f70f34ae | |
3931 | .xword 0x120d4a1ce1a0155d | |
3932 | .xword 0x9ac53b8b8be9ec95 | |
3933 | .xword 0xe6b0ade1c6bacddf | |
3934 | .xword 0x53a45a052752c594 | |
3935 | .xword 0xb809d6eab8a29e47 | |
3936 | .xword 0x6d371fb0cf473375 | |
3937 | .xword 0x6c0b47ba6c738500 | |
3938 | .xword 0xb9c339c1a7242cb6 | |
3939 | .xword 0x3b709a4b027536a4 | |
3940 | .xword 0xb256de194eb26dfa | |
3941 | .xword 0x90faf5053672f822 | |
3942 | .xword 0x0aa690013ff1676a | |
3943 | .xword 0x15d0b447e93b5bac | |
3944 | .xword 0x5eb51886860771da | |
3945 | .xword 0xad025af7505aba92 | |
3946 | .xword 0x35441c8134eb29a7 | |
3947 | .xword 0xf1f4b67ced382ad2 | |
3948 | .xword 0x5f6ab91169608387 | |
3949 | .xword 0xa30e235ed2d12b68 | |
3950 | .xword 0x426557f94141c6fe | |
3951 | .xword 0x7f4694c89cf31453 | |
3952 | .xword 0x9d7925bf268ab0d4 | |
3953 | .xword 0x197a151527275b90 | |
3954 | .xword 0x75b68066d60ab293 | |
3955 | .xword 0xd7260c069d79b70a | |
3956 | .xword 0x503184ca22af9c4b | |
3957 | .xword 0x19e15be8d4cdf361 | |
3958 | .xword 0xea98b50b327c6782 | |
3959 | .xword 0xeb0863a9d0392f0e | |
3960 | .xword 0x7ee5a9109c8fd371 | |
3961 | .xword 0x82f1d93dec78c9dd | |
3962 | .xword 0xc548abd116d735b0 | |
3963 | .xword 0x8b47e8131644bfec | |
3964 | .xword 0xcbaa7797f686f13c | |
3965 | .xword 0x605731e96e6e03a7 | |
3966 | .xword 0x9a4357c5b935135c | |
3967 | .xword 0xa751fc218a196cbe | |
3968 | .xword 0xb454cd252a044e6d | |
3969 | .xword 0x2b96e382787a0a47 | |
3970 | .xword 0xdddfdff658fb73a4 | |
3971 | .xword 0x2cfc9c2af88e1ea6 | |
3972 | .xword 0xa039394fcbb6c908 | |
3973 | .xword 0x35333b1e337c0fb2 | |
3974 | .xword 0x61f64f41ba09fc71 | |
3975 | .xword 0x2faea98da072b66b | |
3976 | .xword 0x0ee30630281cccb8 | |
3977 | .xword 0x948b1b2de7da88c2 | |
3978 | .xword 0xcf558500af662fb6 | |
3979 | .xword 0xa8c4e0c02e3ca626 | |
3980 | .xword 0x3706733bdc1cf52c | |
3981 | .xword 0x46dee1edcef7fb1d | |
3982 | .xword 0xae9197d28e654f53 | |
3983 | .xword 0x787d158df7a5cd71 | |
3984 | .xword 0xea27feb9ad4ecbf5 | |
3985 | .xword 0x955472d58c6af9e7 | |
3986 | .xword 0xd6c211b00034687c | |
3987 | .xword 0xff908b2e5bf76cab | |
3988 | .xword 0x3e93fdb445c81611 | |
3989 | .xword 0xa04e4e5f673a0b8e | |
3990 | .xword 0xc256ac0cc6a17e89 | |
3991 | .xword 0xb1453c3db2c79418 | |
3992 | .xword 0xff7cdbbe1abaee51 | |
3993 | .xword 0x283c34cfd8aee2d1 | |
3994 | .xword 0x51d8c5e09a825700 | |
3995 | .xword 0x40d6111ca0ba43bb | |
3996 | .xword 0x57078f2ff05430ee | |
3997 | .xword 0x235dea02e858092a | |
3998 | .xword 0xa441fcaeb095daca | |
3999 | .xword 0xc778352c7adcc047 | |
4000 | .xword 0xb06cdfc0d50430f9 | |
4001 | .xword 0x82ed5f90704392fb | |
4002 | ||
4003 | .global wdog_2_ext | |
4004 | # 9 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_extensions.s" | |
4005 | .global wdog_2_ext | |
4006 | ||
4007 | SECTION .HTRAPS | |
4008 | .text | |
4009 | htrap_5_ext: | |
4010 | rd %pc, %l2 | |
4011 | inc %l3 | |
4012 | add %l2, htrap_5_ext_done-htrap_5_ext, %l2 | |
4013 | rdpr %tl, %l3 | |
4014 | rdpr %tstate, %l4 | |
4015 | rdhpr %htstate, %l5 | |
4016 | or %l5, 0x4, %l5 | |
4017 | inc %l3 | |
4018 | wrpr %l3, %tl | |
4019 | wrpr %l2, %tpc | |
4020 | add %l2, 4, %l2 | |
4021 | wrpr %l2, %tnpc | |
4022 | wrpr %l4, %tstate | |
4023 | wrhpr %l5, %htstate | |
4024 | retry | |
4025 | htrap_5_ext_done: | |
4026 | done | |
4027 | ||
4028 | wdog_2_ext: | |
4029 | mov 0x1f, %l1 | |
4030 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
4031 | stxa %g0, [%g0] ASI_ERROR_INJECT | |
4032 | ! If TT != 2, then goto trap handler | |
4033 | rdpr %tt, %l1 | |
4034 | cmp %l1, 0x2 | |
4035 | bne wdog_2_goto_handler | |
4036 | nop | |
4037 | ! else done | |
4038 | done | |
4039 | wdog_2_goto_handler: | |
4040 | rdhpr %htba, %l2 | |
4041 | sllx %l1, 5, %l1 | |
4042 | add %l1, %l2, %l2 | |
4043 | jmp %l2 | |
4044 | nop | |
4045 | # 51 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_extensions.s" | |
4046 | ! Red mode other reset handler | |
4047 | ! Get htba, and tt and make trap address | |
4048 | ! Jump to trap handler .. | |
4049 | ||
4050 | SECTION .RED_SEC | |
4051 | .text | |
4052 | red_other_ext: | |
4053 | ! IF TL=6, shift stack by one .. | |
4054 | rdpr %tl, %l1 | |
4055 | cmp %l1, 6 | |
4056 | be start_tsa_shift | |
4057 | nop | |
4058 | ||
4059 | continue_red_other: | |
4060 | mov 0x1f, %l1 | |
4061 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
4062 | stxa %g0, [%g0] ASI_ERROR_INJECT | |
4063 | ||
4064 | rdpr %tt, %l1 | |
4065 | sllx %l1, 5, %l1 | |
4066 | rdhpr %htba, %l2 | |
4067 | add %l1, %l2, %l2 | |
4068 | rdhpr %hpstate, %l1 | |
4069 | jmp %l2 | |
4070 | wrhpr %l1, 0x20, %hpstate | |
4071 | nop | |
4072 | ||
4073 | wdog_red_ext: | |
4074 | ! Shift stack down by 1 ... | |
4075 | rdpr %tl, %l1 | |
4076 | start_tsa_shift: | |
4077 | mov 0x2, %l2 | |
4078 | ||
4079 | tsa_shift: | |
4080 | wrpr %l2, %tl | |
4081 | rdpr %tt, %l3 | |
4082 | rdpr %tpc, %l4 | |
4083 | rdpr %tnpc, %l5 | |
4084 | rdpr %tstate, %l6 | |
4085 | rdhpr %htstate, %l7 | |
4086 | dec %l2 | |
4087 | wrpr %l2, %tl | |
4088 | wrpr %l3, %tt | |
4089 | wrpr %l4, %tpc | |
4090 | wrpr %l5, %tnpc | |
4091 | wrpr %l6, %tstate | |
4092 | wrhpr %l7, %htstate | |
4093 | add %l2, 2, %l2 | |
4094 | cmp %l2, %l1 | |
4095 | ble tsa_shift | |
4096 | nop | |
4097 | tsa_shift_done: | |
4098 | dec %l1 | |
4099 | wrpr %l1, %tl | |
4100 | ||
4101 | ! If TT != 2, then goto trap handler | |
4102 | rdpr %tt, %l1 | |
4103 | ||
4104 | cmp %l1, 0x2 | |
4105 | bne continue_red_other | |
4106 | nop | |
4107 | ! else done | |
4108 | mov 0x1f, %l1 | |
4109 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
4110 | stxa %g0, [%g0] ASI_ERROR_INJECT | |
4111 | done | |
4112 | # 324 "diag.j" | |
4113 | ||
4114 | ||
4115 | ||
4116 | SECTION .MyHTRAPS_0 TEXT_VA = 0x0000000000380000, DATA_VA = 0x000000000038c000 | |
4117 | attr_text { | |
4118 | Name = .MyHTRAPS_0, | |
4119 | RA = 0x0000000000380000, | |
4120 | PA = ra2pa(0x0000000000380000,0), | |
4121 | part_0_ctx_zero_tsb_config_0, | |
4122 | part_0_ctx_nonzero_tsb_config_0, | |
4123 | TTE_G = 1, | |
4124 | TTE_Context = 0, | |
4125 | TTE_V = 1, | |
4126 | TTE_Size = 0, | |
4127 | TTE_NFO = 0, | |
4128 | TTE_IE = 0, | |
4129 | TTE_Soft2 = 0, | |
4130 | TTE_Diag = 0, | |
4131 | TTE_Soft = 0, | |
4132 | TTE_L = 0, | |
4133 | TTE_CP = 1, | |
4134 | TTE_CV = 0, | |
4135 | TTE_E = 0, | |
4136 | TTE_P = 1, | |
4137 | TTE_W = 0, | |
4138 | TTE_X = 1 | |
4139 | } | |
4140 | ||
4141 | ||
4142 | attr_data { | |
4143 | Name = .MyHTRAPS_0, | |
4144 | RA = 0x000000000038c000, | |
4145 | PA = ra2pa(0x000000000038c000,0), | |
4146 | part_0_ctx_zero_tsb_config_0, | |
4147 | part_0_ctx_nonzero_tsb_config_0, | |
4148 | TTE_G = 1, | |
4149 | TTE_Context = 0, | |
4150 | TTE_V = 1, | |
4151 | TTE_Size = 0, | |
4152 | TTE_NFO = 0, | |
4153 | TTE_IE = 0, | |
4154 | TTE_Soft2 = 0, | |
4155 | TTE_Diag = 0, | |
4156 | TTE_Soft = 0, | |
4157 | TTE_L = 0, | |
4158 | TTE_CP = 1, | |
4159 | TTE_CV = 0, | |
4160 | TTE_E = 0, | |
4161 | TTE_P = 1, | |
4162 | TTE_W = 0 | |
4163 | } | |
4164 | ||
4165 | ||
4166 | attr_text { | |
4167 | Name = .MyHTRAPS_0, | |
4168 | hypervisor | |
4169 | } | |
4170 | ||
4171 | ||
4172 | attr_data { | |
4173 | Name = .MyHTRAPS_0, | |
4174 | hypervisor | |
4175 | } | |
4176 | ||
4177 | #include "htraps.s" | |
4178 | #include "tlu_htraps_ext.s" | |
4179 | ||
4180 | ||
4181 | ||
4182 | SECTION .MyHTRAPS_1 TEXT_VA = 0x0000000000390000, DATA_VA = 0x000000000039c000 | |
4183 | attr_text { | |
4184 | Name = .MyHTRAPS_1, | |
4185 | RA = 0x0000000000390000, | |
4186 | PA = ra2pa(0x0000000000390000,0), | |
4187 | part_0_ctx_zero_tsb_config_0, | |
4188 | part_0_ctx_nonzero_tsb_config_0, | |
4189 | TTE_G = 1, | |
4190 | TTE_Context = 0, | |
4191 | TTE_V = 1, | |
4192 | TTE_Size = 0, | |
4193 | TTE_NFO = 0, | |
4194 | TTE_IE = 0, | |
4195 | TTE_Soft2 = 0, | |
4196 | TTE_Diag = 0, | |
4197 | TTE_Soft = 0, | |
4198 | TTE_L = 0, | |
4199 | TTE_CP = 1, | |
4200 | TTE_CV = 0, | |
4201 | TTE_E = 0, | |
4202 | TTE_P = 1, | |
4203 | TTE_W = 0, | |
4204 | TTE_X = 1 | |
4205 | } | |
4206 | ||
4207 | ||
4208 | attr_data { | |
4209 | Name = .MyHTRAPS_1, | |
4210 | RA = 0x000000000039c000, | |
4211 | PA = ra2pa(0x000000000039c000,0), | |
4212 | part_0_ctx_zero_tsb_config_0, | |
4213 | part_0_ctx_nonzero_tsb_config_0, | |
4214 | TTE_G = 1, | |
4215 | TTE_Context = 0, | |
4216 | TTE_V = 1, | |
4217 | TTE_Size = 0, | |
4218 | TTE_NFO = 0, | |
4219 | TTE_IE = 0, | |
4220 | TTE_Soft2 = 0, | |
4221 | TTE_Diag = 0, | |
4222 | TTE_Soft = 0, | |
4223 | TTE_L = 0, | |
4224 | TTE_CP = 1, | |
4225 | TTE_CV = 0, | |
4226 | TTE_E = 0, | |
4227 | TTE_P = 1, | |
4228 | TTE_W = 0 | |
4229 | } | |
4230 | ||
4231 | ||
4232 | attr_text { | |
4233 | Name = .MyHTRAPS_1, | |
4234 | hypervisor | |
4235 | } | |
4236 | ||
4237 | ||
4238 | attr_data { | |
4239 | Name = .MyHTRAPS_1, | |
4240 | hypervisor | |
4241 | } | |
4242 | ||
4243 | #include "htraps.s" | |
4244 | #include "tlu_htraps_ext.s" | |
4245 | ||
4246 | ||
4247 | ||
4248 | SECTION .MyHTRAPS_2 TEXT_VA = 0x00000000003a0000, DATA_VA = 0x00000000003ac000 | |
4249 | attr_text { | |
4250 | Name = .MyHTRAPS_2, | |
4251 | RA = 0x00000000003a0000, | |
4252 | PA = ra2pa(0x00000000003a0000,0), | |
4253 | part_0_ctx_zero_tsb_config_0, | |
4254 | part_0_ctx_nonzero_tsb_config_0, | |
4255 | TTE_G = 1, | |
4256 | TTE_Context = 0, | |
4257 | TTE_V = 1, | |
4258 | TTE_Size = 0, | |
4259 | TTE_NFO = 0, | |
4260 | TTE_IE = 0, | |
4261 | TTE_Soft2 = 0, | |
4262 | TTE_Diag = 0, | |
4263 | TTE_Soft = 0, | |
4264 | TTE_L = 0, | |
4265 | TTE_CP = 1, | |
4266 | TTE_CV = 0, | |
4267 | TTE_E = 0, | |
4268 | TTE_P = 1, | |
4269 | TTE_W = 0, | |
4270 | TTE_X = 1 | |
4271 | } | |
4272 | ||
4273 | ||
4274 | attr_data { | |
4275 | Name = .MyHTRAPS_2, | |
4276 | RA = 0x00000000003ac000, | |
4277 | PA = ra2pa(0x00000000003ac000,0), | |
4278 | part_0_ctx_zero_tsb_config_0, | |
4279 | part_0_ctx_nonzero_tsb_config_0, | |
4280 | TTE_G = 1, | |
4281 | TTE_Context = 0, | |
4282 | TTE_V = 1, | |
4283 | TTE_Size = 0, | |
4284 | TTE_NFO = 0, | |
4285 | TTE_IE = 0, | |
4286 | TTE_Soft2 = 0, | |
4287 | TTE_Diag = 0, | |
4288 | TTE_Soft = 0, | |
4289 | TTE_L = 0, | |
4290 | TTE_CP = 1, | |
4291 | TTE_CV = 0, | |
4292 | TTE_E = 0, | |
4293 | TTE_P = 1, | |
4294 | TTE_W = 0 | |
4295 | } | |
4296 | ||
4297 | ||
4298 | attr_text { | |
4299 | Name = .MyHTRAPS_2, | |
4300 | hypervisor | |
4301 | } | |
4302 | ||
4303 | ||
4304 | attr_data { | |
4305 | Name = .MyHTRAPS_2, | |
4306 | hypervisor | |
4307 | } | |
4308 | ||
4309 | #include "htraps.s" | |
4310 | #include "tlu_htraps_ext.s" | |
4311 | ||
4312 | ||
4313 | ||
4314 | SECTION .MyHTRAPS_3 TEXT_VA = 0x00000000003b0000, DATA_VA = 0x00000000003bc000 | |
4315 | attr_text { | |
4316 | Name = .MyHTRAPS_3, | |
4317 | RA = 0x00000000003b0000, | |
4318 | PA = ra2pa(0x00000000003b0000,0), | |
4319 | part_0_ctx_zero_tsb_config_0, | |
4320 | part_0_ctx_nonzero_tsb_config_0, | |
4321 | TTE_G = 1, | |
4322 | TTE_Context = 0, | |
4323 | TTE_V = 1, | |
4324 | TTE_Size = 0, | |
4325 | TTE_NFO = 0, | |
4326 | TTE_IE = 0, | |
4327 | TTE_Soft2 = 0, | |
4328 | TTE_Diag = 0, | |
4329 | TTE_Soft = 0, | |
4330 | TTE_L = 0, | |
4331 | TTE_CP = 1, | |
4332 | TTE_CV = 0, | |
4333 | TTE_E = 0, | |
4334 | TTE_P = 1, | |
4335 | TTE_W = 0, | |
4336 | TTE_X = 1 | |
4337 | } | |
4338 | ||
4339 | ||
4340 | attr_data { | |
4341 | Name = .MyHTRAPS_3, | |
4342 | RA = 0x00000000003bc000, | |
4343 | PA = ra2pa(0x00000000003bc000,0), | |
4344 | part_0_ctx_zero_tsb_config_0, | |
4345 | part_0_ctx_nonzero_tsb_config_0, | |
4346 | TTE_G = 1, | |
4347 | TTE_Context = 0, | |
4348 | TTE_V = 1, | |
4349 | TTE_Size = 0, | |
4350 | TTE_NFO = 0, | |
4351 | TTE_IE = 0, | |
4352 | TTE_Soft2 = 0, | |
4353 | TTE_Diag = 0, | |
4354 | TTE_Soft = 0, | |
4355 | TTE_L = 0, | |
4356 | TTE_CP = 1, | |
4357 | TTE_CV = 0, | |
4358 | TTE_E = 0, | |
4359 | TTE_P = 1, | |
4360 | TTE_W = 0 | |
4361 | } | |
4362 | ||
4363 | ||
4364 | attr_text { | |
4365 | Name = .MyHTRAPS_3, | |
4366 | hypervisor | |
4367 | } | |
4368 | ||
4369 | ||
4370 | attr_data { | |
4371 | Name = .MyHTRAPS_3, | |
4372 | hypervisor | |
4373 | } | |
4374 | ||
4375 | #include "htraps.s" | |
4376 | #include "tlu_htraps_ext.s" | |
4377 | ||
4378 | ||
4379 | ||
4380 | ||
4381 | ||
4382 | SECTION .MyTRAPS_0 TEXT_VA = 0x00000000003c0000, DATA_VA = 0x00000000003cc000 | |
4383 | attr_text { | |
4384 | Name = .MyTRAPS_0, | |
4385 | RA = 0x00000000003c0000, | |
4386 | PA = ra2pa(0x00000000003c0000,0), | |
4387 | part_0_ctx_zero_tsb_config_0, | |
4388 | part_0_ctx_nonzero_tsb_config_0, | |
4389 | TTE_G = 1, | |
4390 | TTE_Context = 0, | |
4391 | TTE_V = 1, | |
4392 | TTE_Size = 0, | |
4393 | TTE_NFO = 0, | |
4394 | TTE_IE = 0, | |
4395 | TTE_Soft2 = 0, | |
4396 | TTE_Diag = 0, | |
4397 | TTE_Soft = 0, | |
4398 | TTE_L = 0, | |
4399 | TTE_CP = 1, | |
4400 | TTE_CV = 0, | |
4401 | TTE_E = 0, | |
4402 | TTE_P = 1, | |
4403 | TTE_W = 0, | |
4404 | TTE_X = 1 | |
4405 | } | |
4406 | ||
4407 | ||
4408 | attr_data { | |
4409 | Name = .MyTRAPS_0, | |
4410 | RA = 0x00000000003cc000, | |
4411 | PA = ra2pa(0x00000000003cc000,0), | |
4412 | part_0_ctx_zero_tsb_config_0, | |
4413 | part_0_ctx_nonzero_tsb_config_0, | |
4414 | TTE_G = 1, | |
4415 | TTE_Context = 0, | |
4416 | TTE_V = 1, | |
4417 | TTE_Size = 0, | |
4418 | TTE_NFO = 0, | |
4419 | TTE_IE = 0, | |
4420 | TTE_Soft2 = 0, | |
4421 | TTE_Diag = 0, | |
4422 | TTE_Soft = 0, | |
4423 | TTE_L = 0, | |
4424 | TTE_CP = 1, | |
4425 | TTE_CV = 0, | |
4426 | TTE_E = 0, | |
4427 | TTE_P = 1, | |
4428 | TTE_W = 0 | |
4429 | } | |
4430 | ||
4431 | ||
4432 | attr_text { | |
4433 | Name = .MyTRAPS_0, | |
4434 | hypervisor | |
4435 | } | |
4436 | ||
4437 | ||
4438 | attr_data { | |
4439 | Name = .MyTRAPS_0, | |
4440 | hypervisor | |
4441 | } | |
4442 | ||
4443 | #include "traps.s" | |
4444 | ||
4445 | ||
4446 | ||
4447 | SECTION .MyTRAPS_1 TEXT_VA = 0x00000000003d0000, DATA_VA = 0x00000000003dc000 | |
4448 | attr_text { | |
4449 | Name = .MyTRAPS_1, | |
4450 | RA = 0x00000000003d0000, | |
4451 | PA = ra2pa(0x00000000003d0000,0), | |
4452 | part_0_ctx_zero_tsb_config_0, | |
4453 | part_0_ctx_nonzero_tsb_config_0, | |
4454 | TTE_G = 1, | |
4455 | TTE_Context = 0, | |
4456 | TTE_V = 1, | |
4457 | TTE_Size = 0, | |
4458 | TTE_NFO = 0, | |
4459 | TTE_IE = 0, | |
4460 | TTE_Soft2 = 0, | |
4461 | TTE_Diag = 0, | |
4462 | TTE_Soft = 0, | |
4463 | TTE_L = 0, | |
4464 | TTE_CP = 1, | |
4465 | TTE_CV = 0, | |
4466 | TTE_E = 0, | |
4467 | TTE_P = 1, | |
4468 | TTE_W = 0, | |
4469 | TTE_X = 1 | |
4470 | } | |
4471 | ||
4472 | ||
4473 | attr_data { | |
4474 | Name = .MyTRAPS_1, | |
4475 | RA = 0x00000000003dc000, | |
4476 | PA = ra2pa(0x00000000003dc000,0), | |
4477 | part_0_ctx_zero_tsb_config_0, | |
4478 | part_0_ctx_nonzero_tsb_config_0, | |
4479 | TTE_G = 1, | |
4480 | TTE_Context = 0, | |
4481 | TTE_V = 1, | |
4482 | TTE_Size = 0, | |
4483 | TTE_NFO = 0, | |
4484 | TTE_IE = 0, | |
4485 | TTE_Soft2 = 0, | |
4486 | TTE_Diag = 0, | |
4487 | TTE_Soft = 0, | |
4488 | TTE_L = 0, | |
4489 | TTE_CP = 1, | |
4490 | TTE_CV = 0, | |
4491 | TTE_E = 0, | |
4492 | TTE_P = 1, | |
4493 | TTE_W = 0 | |
4494 | } | |
4495 | ||
4496 | ||
4497 | attr_text { | |
4498 | Name = .MyTRAPS_1, | |
4499 | hypervisor | |
4500 | } | |
4501 | ||
4502 | ||
4503 | attr_data { | |
4504 | Name = .MyTRAPS_1, | |
4505 | hypervisor | |
4506 | } | |
4507 | ||
4508 | #include "traps.s" | |
4509 | ||
4510 | ||
4511 | ||
4512 | SECTION .MyTRAPS_2 TEXT_VA = 0x00000000003e0000, DATA_VA = 0x00000000003ec000 | |
4513 | attr_text { | |
4514 | Name = .MyTRAPS_2, | |
4515 | RA = 0x00000000003e0000, | |
4516 | PA = ra2pa(0x00000000003e0000,0), | |
4517 | part_0_ctx_zero_tsb_config_0, | |
4518 | part_0_ctx_nonzero_tsb_config_0, | |
4519 | TTE_G = 1, | |
4520 | TTE_Context = 0, | |
4521 | TTE_V = 1, | |
4522 | TTE_Size = 0, | |
4523 | TTE_NFO = 0, | |
4524 | TTE_IE = 0, | |
4525 | TTE_Soft2 = 0, | |
4526 | TTE_Diag = 0, | |
4527 | TTE_Soft = 0, | |
4528 | TTE_L = 0, | |
4529 | TTE_CP = 1, | |
4530 | TTE_CV = 0, | |
4531 | TTE_E = 0, | |
4532 | TTE_P = 1, | |
4533 | TTE_W = 0, | |
4534 | TTE_X = 1 | |
4535 | } | |
4536 | ||
4537 | ||
4538 | attr_data { | |
4539 | Name = .MyTRAPS_2, | |
4540 | RA = 0x00000000003ec000, | |
4541 | PA = ra2pa(0x00000000003ec000,0), | |
4542 | part_0_ctx_zero_tsb_config_0, | |
4543 | part_0_ctx_nonzero_tsb_config_0, | |
4544 | TTE_G = 1, | |
4545 | TTE_Context = 0, | |
4546 | TTE_V = 1, | |
4547 | TTE_Size = 0, | |
4548 | TTE_NFO = 0, | |
4549 | TTE_IE = 0, | |
4550 | TTE_Soft2 = 0, | |
4551 | TTE_Diag = 0, | |
4552 | TTE_Soft = 0, | |
4553 | TTE_L = 0, | |
4554 | TTE_CP = 1, | |
4555 | TTE_CV = 0, | |
4556 | TTE_E = 0, | |
4557 | TTE_P = 1, | |
4558 | TTE_W = 0 | |
4559 | } | |
4560 | ||
4561 | ||
4562 | attr_text { | |
4563 | Name = .MyTRAPS_2, | |
4564 | hypervisor | |
4565 | } | |
4566 | ||
4567 | ||
4568 | attr_data { | |
4569 | Name = .MyTRAPS_2, | |
4570 | hypervisor | |
4571 | } | |
4572 | ||
4573 | #include "traps.s" | |
4574 | ||
4575 | ||
4576 | ||
4577 | SECTION .MyTRAPS_3 TEXT_VA = 0x00000000003f0000, DATA_VA = 0x00000000003fc000 | |
4578 | attr_text { | |
4579 | Name = .MyTRAPS_3, | |
4580 | RA = 0x00000000003f0000, | |
4581 | PA = ra2pa(0x00000000003f0000,0), | |
4582 | part_0_ctx_zero_tsb_config_0, | |
4583 | part_0_ctx_nonzero_tsb_config_0, | |
4584 | TTE_G = 1, | |
4585 | TTE_Context = 0, | |
4586 | TTE_V = 1, | |
4587 | TTE_Size = 0, | |
4588 | TTE_NFO = 0, | |
4589 | TTE_IE = 0, | |
4590 | TTE_Soft2 = 0, | |
4591 | TTE_Diag = 0, | |
4592 | TTE_Soft = 0, | |
4593 | TTE_L = 0, | |
4594 | TTE_CP = 1, | |
4595 | TTE_CV = 0, | |
4596 | TTE_E = 0, | |
4597 | TTE_P = 1, | |
4598 | TTE_W = 0, | |
4599 | TTE_X = 1 | |
4600 | } | |
4601 | ||
4602 | ||
4603 | attr_data { | |
4604 | Name = .MyTRAPS_3, | |
4605 | RA = 0x00000000003fc000, | |
4606 | PA = ra2pa(0x00000000003fc000,0), | |
4607 | part_0_ctx_zero_tsb_config_0, | |
4608 | part_0_ctx_nonzero_tsb_config_0, | |
4609 | TTE_G = 1, | |
4610 | TTE_Context = 0, | |
4611 | TTE_V = 1, | |
4612 | TTE_Size = 0, | |
4613 | TTE_NFO = 0, | |
4614 | TTE_IE = 0, | |
4615 | TTE_Soft2 = 0, | |
4616 | TTE_Diag = 0, | |
4617 | TTE_Soft = 0, | |
4618 | TTE_L = 0, | |
4619 | TTE_CP = 1, | |
4620 | TTE_CV = 0, | |
4621 | TTE_E = 0, | |
4622 | TTE_P = 1, | |
4623 | TTE_W = 0 | |
4624 | } | |
4625 | ||
4626 | ||
4627 | attr_text { | |
4628 | Name = .MyTRAPS_3, | |
4629 | hypervisor | |
4630 | } | |
4631 | ||
4632 | ||
4633 | attr_data { | |
4634 | Name = .MyTRAPS_3, | |
4635 | hypervisor | |
4636 | } | |
4637 | ||
4638 | #include "traps.s" | |
4639 | ||
4640 | ||
4641 | ||
4642 | #if 0 | |
4643 | #endif | |
4644 |