Initial commit of OpenSPARC T2 design and verification files.

[OpenSPARC-T2-DV] / verif / env / cmp / vera / classes / asmToVeraIntf.vrh

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// OpenSPARC T2 Processor File: asmToVeraIntf.vrh
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#ifndef INC__TMP_ASMTOVERAINTF_VRH
#define INC__TMP_ASMTOVERAINTF_VRH

extern class AsmToVeraIntf extends BaseAsmToVeraIntf {
  
  // trig_pc_d(kind, 64'h1234567812345678) -> intp(tid, type, vector) hex, w/no 64'h
  // trig_pc_d(kind, 64'h1234567812345678) -> intp(tid, type, vector, src, wait)    
  task intp(reg [5:0] tid = 0,
            reg [63:0] type = 0,
            reg [63:0] vec = 0,
            integer src = 16, // 0-16 are ccx ports. 16 = NCU
            integer wait = 0);

  // dump actual RAM contents
  // trig_pc_d(1,expr(@VA(.MAIN.T1_ext_intr_200), 16, 16)) -> dump_mem(addr, amount)
  task dump_mem(reg [63:0] addr=0,
                integer amount = 8);
  
  task warmrst(integer wait = 0);
  
  // SPC BFM will do a store. Pick correct port w/ BFM!!!
  // trig_pc_d(1,...) -> store(cpu/ccxPort, addr, data)
  task store(reg [7:0] ccxPortMask = 0,
             reg [63:0] addr=0,
             reg [63:0] data=0);

  task marker(string what, reg [5:0] fromTid, reg [63:0] pc);  
}

#endif