Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / common / coverage / ilu_peu / ilu_peu_ltssm_state_sample.vrh
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: ilu_peu_ltssm_state_sample.vrh
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
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10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
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34// ========== Copyright Header End ============================================
35#define DETECT_QUIET 5'h00
36#define DETECT_ACT 5'h01
37#define POLL_ACTIVE 5'h02
38#define POLL_COMPLIANCE 5'h03
39#define POLL_CONFIG 5'h04
40#define PRE_DETECT_QUIET 5'h05
41#define DETECT_WAIT 5'h06
42#define CFG_LINKWD_START 5'h07
43#define CFG_LINKWD_ACEPT 5'h08
44#define CFG_LANENUM_WAIT 5'h09
45#define CFG_LANENUM_ACEPT 5'h0A
46#define CFG_COMPLETE 5'h0B
47#define CFG_IDLE 5'h0C
48#define RCVRY_LOCK 5'h0D
49#define RCVRY_RCVRCFG 5'h0E
50#define RCVRY_IDLE 5'h0F
51#define L0 5'h10
52#define L0S 5'h11
53#define L123_SEND_EIDLE 5'h12
54#define L1_IDLE 5'h13
55#define L2_IDLE 5'h14
56// #define L2_WAKE 5'h15
57#define DISABLED_ENTRY 5'h16
58#define DISABLED_IDLE 5'h17
59#define DISABLED 5'h18
60#define LPBK_ENTRY 5'h19
61#define LPBK_ACTIVE 5'h1A
62#define LPBK_EXIT 5'h1B
63#define LPBK_EXIT_TIMEOUT 5'h1C
64#define HOT_RESET_ENTRY 5'h1D
65#define HOT_RESET 5'h1F
66
67
68sample ilu_peu_coverage_ltssm_state_coverage_group.lts_state
69
70
71{
72 state S_DETECT_QUIET (DETECT_QUIET);
73 state s_DETECT_ACT (DETECT_ACT);
74 state s_POLL_ACTIVE (POLL_ACTIVE);
75 state s_POLL_COMPLIANCE (POLL_COMPLIANCE);
76 state s_POLL_CONFIG (POLL_CONFIG);
77 state s_PRE_DETECT_QUIET (PRE_DETECT_QUIET);
78 state s_DETECT_WAIT (DETECT_WAIT);
79 state s_CFG_LINKWD_START (CFG_LINKWD_START);
80 state s_CFG_LINKWD_ACEPT (CFG_LINKWD_ACEPT);
81 state s_CFG_LANENUM_WAIT (CFG_LANENUM_WAIT);
82 state s_CFG_LANENUM_ACEPT (CFG_LANENUM_ACEPT);
83 state s_CFG_COMPLETE (CFG_COMPLETE);
84 state s_CFG_IDLE (CFG_IDLE);
85 state s_RCVRY_LOCK (RCVRY_LOCK);
86 state s_RCVRY_RCVRCFG (RCVRY_RCVRCFG);
87 state s_RCVRY_IDLE (RCVRY_IDLE);
88 state s_L0 (L0);
89 state s_L0S (L0S);
90 state s_L123_SEND_EIDLE (L123_SEND_EIDLE);
91 state s_L1_IDLE (L1_IDLE);
92 state s_L2_IDLE (L2_IDLE);
93// state s_L2_WAKE (L2_WAKE);
94 state s_DISABLED_ENTRY (DISABLED_ENTRY);
95 state s_DISABLED_IDLE (DISABLED_IDLE);
96 state s_DISABLED (DISABLED);
97 state s_LPBK_ENTRY (LPBK_ENTRY);
98 state s_LPBK_ACTIVE (LPBK_ACTIVE);
99 state s_LPBK_EXIT (LPBK_EXIT);
100 state s_LPBK_EXIT_TIMEOUT (LPBK_EXIT_TIMEOUT);
101 state s_HOT_RESET_ENTRY (HOT_RESET_ENTRY);
102 state s_HOT_RESET (HOT_RESET);
103
104// trans t_DETECT_QUIET_DETECT_QUIET_01 (DETECT_QUIET -> DETECT_QUIET);
105 trans t_DETECT_QUIET_DETECT_ACT_02 (DETECT_QUIET -> DETECT_ACT);
106 trans t_DETECT_ACT_POLL_ACTIVE_03 (DETECT_ACT -> POLL_ACTIVE);
107 trans t_DETECT_ACT_DETECT_QUIET_04 (DETECT_ACT -> DETECT_QUIET);
108 trans t_DETECT_ACT_DETECT_WAIT_05 (DETECT_ACT -> DETECT_WAIT);
109// trans t_DETECT_ACT_DETECT_ACT_06 (DETECT_ACT -> DETECT_ACT);
110 trans t_POLL_ACTIVE_POLL_CONFIG_07 (POLL_ACTIVE -> POLL_CONFIG);
111 trans t_POLL_ACTIVE_POLL_COMPLIANCE_08 (POLL_ACTIVE -> POLL_COMPLIANCE);
112 trans t_POLL_ACTIVE_PRE_DETECT_QUIET_09 (POLL_ACTIVE -> PRE_DETECT_QUIET);
113// trans t_POLL_ACTIVE_POLL_ACTIVE_10 (POLL_ACTIVE -> POLL_ACTIVE);
114 trans t_POLL_COMPLIANCE_POLL_ACTIVE_11 (POLL_COMPLIANCE -> POLL_ACTIVE);
115// trans t_POLL_COMPLIANCE_POLL_COMPLIANCE_12 (POLL_COMPLIANCE -> POLL_COMPLIANCE);
116 trans t_POLL_CONFIG_CFG_LINKWD_START_13 (POLL_CONFIG -> CFG_LINKWD_START);
117 trans t_POLL_CONFIG_PRE_DETECT_QUIET_14 (POLL_CONFIG -> PRE_DETECT_QUIET);
118// trans t_POLL_CONFIG_POLL_CONFIG_15 (POLL_CONFIG -> POLL_CONFIG);
119 trans t_PRE_DETECT_QUIET_DETECT_QUIET_16 (PRE_DETECT_QUIET -> DETECT_QUIET);
120// trans t_PRE_DETECT_QUIET_PRE_DETECT_QUIET_17 (PRE_DETECT_QUIET -> PRE_DETECT_QUIET);
121 trans t_DETECT_WAIT_DETECT_ACT_18 (DETECT_WAIT -> DETECT_ACT);
122// trans t_DETECT_WAIT_DETECT_WAIT_19 (DETECT_WAIT -> DETECT_WAIT);
123 trans t_CFG_LINKWD_START_DISABLED_ENTRY_20 (CFG_LINKWD_START -> DISABLED_ENTRY);
124 trans t_CFG_LINKWD_START_LPBK_ENTRY_21 (CFG_LINKWD_START -> LPBK_ENTRY);
125 trans t_CFG_LINKWD_START_CFG_LINKWD_ACEPT_22 (CFG_LINKWD_START -> CFG_LINKWD_ACEPT);
126 trans t_CFG_LINKWD_START_PRE_DETECT_QUIET_23 (CFG_LINKWD_START -> PRE_DETECT_QUIET);
127// trans t_CFG_LINKWD_START_CFG_LINKWD_START_24 (CFG_LINKWD_START -> CFG_LINKWD_START);
128 trans t_CFG_LINKWD_ACEPT_CFG_LANENUM_WAIT_25 (CFG_LINKWD_ACEPT -> CFG_LANENUM_WAIT);
129 trans t_CFG_LINKWD_ACEPT_PRE_DETECT_QUIET_26 (CFG_LINKWD_ACEPT -> PRE_DETECT_QUIET);
130// trans t_CFG_LINKWD_ACEPT_CFG_LINKWD_ACEPT_27 (CFG_LINKWD_ACEPT -> CFG_LINKWD_ACEPT);
131// trans t_CFG_LANENUM_WAIT_CFG_LINKWD_ACEPT_28 (CFG_LANENUM_WAIT -> CFG_LINKWD_ACEPT);
132 trans t_CFG_LANENUM_WAIT_PRE_DETECT_QUIET_29 (CFG_LANENUM_WAIT -> PRE_DETECT_QUIET);
133// trans t_CFG_LANENUM_WAIT_CFG_LANENUM_WAIT_30 (CFG_LANENUM_WAIT -> CFG_LANENUM_WAIT);
134 trans t_CFG_LANENUM_ACEPT_CFG_COMPLETE_31 (CFG_LANENUM_ACEPT -> CFG_COMPLETE);
135 trans t_CFG_LANENUM_ACEPT_CFG_LANENUM_WAIT_32 (CFG_LANENUM_ACEPT -> CFG_LANENUM_WAIT);
136 trans t_CFG_LANENUM_ACEPT_PRE_DETECT_QUIET_33 (CFG_LANENUM_ACEPT -> PRE_DETECT_QUIET);
137 trans t_CFG_LANENUM_ACEPT_CFG_LINKWD_ACEPT_34 (CFG_LANENUM_ACEPT -> CFG_LINKWD_ACEPT);
138 trans t_CFG_COMPLETE_CFG_IDLE_35 (CFG_COMPLETE -> CFG_IDLE);
139 trans t_CFG_COMPLETE_PRE_DETECT_QUIET_36 (CFG_COMPLETE -> PRE_DETECT_QUIET);
140// trans t_CFG_COMPLETE_CFG_COMPLETE_37 (CFG_COMPLETE -> CFG_COMPLETE);
141 trans t_CFG_IDLE_L0_38 (CFG_IDLE -> L0);
142 trans t_CFG_IDLE_PRE_DETECT_QUIET_39 (CFG_IDLE -> PRE_DETECT_QUIET);
143// trans t_CFG_IDLE_CFG_IDLE_40 (CFG_IDLE -> CFG_IDLE);
144 trans t_RCVRY_LOCK_RCVRY_RCVRCFG_41 (RCVRY_LOCK -> RCVRY_RCVRCFG);
145 trans t_RCVRY_LOCK_CFG_LINKWD_START_42 (RCVRY_LOCK -> CFG_LINKWD_START);
146 trans t_RCVRY_LOCK_PRE_DETECT_QUIET_43 (RCVRY_LOCK -> PRE_DETECT_QUIET);
147// trans t_RCVRY_LOCK_RCVRY_LOCK_44 (RCVRY_LOCK -> RCVRY_LOCK);
148 trans t_RCVRY_RCVRCFG_RCVRY_IDLE_45 (RCVRY_RCVRCFG -> RCVRY_IDLE);
149 trans t_RCVRY_RCVRCFG_CFG_LINKWD_START_46 (RCVRY_RCVRCFG -> CFG_LINKWD_START);
150 trans t_RCVRY_RCVRCFG_PRE_DETECT_QUIET_47 (RCVRY_RCVRCFG -> PRE_DETECT_QUIET);
151// trans t_RCVRY_RCVRCFG_RCVRY_RCVRCFG_48 (RCVRY_RCVRCFG -> RCVRY_RCVRCFG);
152 trans t_RCVRY_IDLE_HOT_RESET_ENTRY_49 (RCVRY_IDLE -> HOT_RESET_ENTRY);
153 trans t_RCVRY_IDLE_LPBK_ENTRY_50 (RCVRY_IDLE -> LPBK_ENTRY);
154 trans t_RCVRY_IDLE_DISABLED_ENTRY_51 (RCVRY_IDLE -> DISABLED_ENTRY);
155 trans t_RCVRY_IDLE_CFG_LINKWD_START_52 (RCVRY_IDLE -> CFG_LINKWD_START);
156 trans t_RCVRY_IDLE_PRE_DETECT_QUIET_53 (RCVRY_IDLE -> PRE_DETECT_QUIET);
157// trans t_RCVRY_IDLE_RCVRY_IDLE_53 (RCVRY_IDLE -> RCVRY_IDLE);
158 trans t_L0_RCVRY_LOCK_54 (L0 -> RCVRY_LOCK);
159 trans t_L0_L123_SEND_EIDLE_55 (L0 -> L123_SEND_EIDLE);
160 trans t_L0_L0S_56 (L0 -> L0S);
161// trans t_L0_L0_57 (L0 -> L0);
162 trans t_L0S_L0_58 (L0S -> L0);
163 trans t_L0S_RCVRY_LOCK_59 (L0S -> RCVRY_LOCK);
164// trans t_L0S_L0S_60 (L0S -> L0S);
165 trans t_L123_SEND_EIDLE_L1_IDLE_61 (L123_SEND_EIDLE -> L1_IDLE);
166 trans t_L123_SEND_EIDLE_L2_IDLE_62 (L123_SEND_EIDLE -> L2_IDLE);
167// trans t_L123_SEND_EIDLE_L123_SEND_EIDLE_63 (L123_SEND_EIDLE -> L123_SEND_EIDLE);
168 trans t_L1_IDLE_RCVRY_LOCK_64 (L1_IDLE -> RCVRY_LOCK);
169// trans t_L1_IDLE_L1_IDLE_65 (L1_IDLE -> L1_IDLE);
170// trans t_L2_IDLE_DETECT_QUIET_66 (L2_IDLE -> DETECT_QUIET);
171// trans t_L2_IDLE_L2_WAKE_67 (L2_IDLE -> L2_WAKE);
172// trans t_L2_IDLE_L2_IDLE_68 (L2_IDLE -> L2_IDLE);
173// trans t_L2_WAKE_DETECT_QUIET_69 (L2_WAKE -> DETECT_QUIET);
174// trans t_L2_WAKE_L2_WAKE_70 (L2_WAKE -> L2_WAKE);
175 trans t_DISABLED_ENTRY_DISABLED_IDLE_71 (DISABLED_ENTRY -> DISABLED_IDLE);
176// trans t_DISABLED_ENTRY_DISABLED_ENTRY_72 (DISABLED_ENTRY -> DISABLED_ENTRY);
177 trans t_DISABLED_IDLE_DISABLED_73 (DISABLED_IDLE -> DISABLED);
178 trans t_DISABLED_IDLE_DETECT_QUIET_74 (DISABLED_IDLE -> DETECT_QUIET);
179// trans t_DISABLED_IDLE_DISABLED_IDLE_75 (DISABLED_IDLE -> DISABLED_IDLE);
180 trans t_DISABLED_DETECT_QUIET_76 (DISABLED -> DETECT_QUIET);
181// trans t_DISABLED_DISABLED_77 (DISABLED -> DISABLED_IDLE);
182 trans t_LPBK_ENTRY_LPBK_ACTIVE_78 (LPBK_ENTRY -> LPBK_ACTIVE);
183// trans t_LPBK_ENTRY_LPBK_EXIT_79 (LPBK_ENTRY -> LPBK_EXIT);
184 trans t_LPBK_ENTRY_PRE_DETECT_QUIET_80 (LPBK_ENTRY -> PRE_DETECT_QUIET);
185// trans t_LPBK_ENTRY_LPBK_ENTRY_81 (LPBK_ENTRY -> LPBK_ENTRY);
186 trans t_LPBK_ACTIVE_LPBK_EXIT_82 (LPBK_ACTIVE -> LPBK_EXIT);
187// trans t_LPBK_ACTIVE_LPBK_ACTIVE_83 (LPBK_ACTIVE -> LPBK_ACTIVE);
188 trans t_LPBK_EXIT_LPBK_EXIT_TIMEOUT_84 (LPBK_EXIT -> LPBK_EXIT_TIMEOUT);
189// trans t_LPBK_EXIT_LPBK_EXIT_85 (LPBK_EXIT -> LPBK_EXIT);
190 trans t_LPBK_EXIT_TIMEOUT_DETECT_QUIET_86 (LPBK_EXIT_TIMEOUT -> DETECT_QUIET);
191// trans t_LPBK_EXIT_TIMEOUT_LPBK_EXIT_TIMEOUT_87 (LPBK_EXIT_TIMEOUT -> LPBK_EXIT_TIMEOUT);
192 trans t_HOT_RESET_ENTRY_HOT_RESET_88 (HOT_RESET_ENTRY -> HOT_RESET);
193// trans t_HOT_RESET_ENTRY_HOT_RESET_ENTRY_89 (HOT_RESET_ENTRY -> HOT_RESET_ENTRY);
194 trans t_HOT_RESET_PRE_DETECT_QUIET_90 (HOT_RESET -> PRE_DETECT_QUIET);
195// trans t_HOT_RESET_HOT_RESET_91 (HOT_RESET -> HOT_RESET);
196
197
198}