Initial commit of OpenSPARC T2 design and verification files.

[OpenSPARC-T2-DV] / verif / env / common / coverage / ncu / ncu_cpx_sample.vrhpal

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// OpenSPARC T2 Processor File: ncu_cpx_sample.vrhpal
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sample ncu_cpx_intf_type_sample (ncu_cpx_type)
{
           state LOAD_RETURN  		(4'b1000) ;
           state STORE_RETURN 		(4'b0100) ;
           state IFILL_RETURN 		(4'b1001) ;
           state INT_RETURN 		(4'b0111) ;
           state SOC_RETURN 		(4'b1101) ;
}


sample ncu_cpx_intf_cpu_sample (ncu_cpx_cpu)
{
   state CPU0    (8'h01) ;
   state CPU1    (8'h02) ;
   state CPU2    (8'h04) ;
   state CPU3    (8'h08) ;
   state CPU4    (8'h10) ;
   state CPU5    (8'h20) ;
   state CPU6    (8'h40) ;
   state CPU7    (8'h80) ;

}

sample ncu_cpx_intf_thr_id_sample (ncu_cpx_cpu_thr_id)
{
   m_state THREAD_ID    (0:63) ;
}
sample ncu_cpx_intf_err_sample (ncu_cpx_err)
{
   m_state CPX_ERR    (0:2) ;
}

sample ncu_cpx_intf_b2b_sample (ncu_cpx_b2b)
{
   m_state CPX_B2B    (2:3) ;
}
sample ccx_ncu_intf_intr_vec_cov (ncu_cpx_int_vec)
{
   m_state INT_VEC    (0:63) ;
}

sample ncu_cpx_intf_req_to_gnt_cnt (ncu_cpx_req_to_gnt_cnt)
{
	m_state REQ2GNT_CNT (2:50);
}
sample ncu_cpx_intf_req (ncu_cov_ccx.ncu_cpx_req_cq)
{
	state REQ0 (8'b00000001);
	state REQ1 (8'b00000010);
	state REQ2 (8'b00000100);
	state REQ3 (8'b00001000);
	state REQ4 (8'b00010000);
	state REQ5 (8'b00100000);
	state REQ6 (8'b01000000);
	state REQ7 (8'b10000000);
}
sample ncu_cpx_intf_gnt (ncu_cov_ccx.cpx_ncu_grant_cx_in)
{
	state GNT0 (8'b00000001);
	state GNT1 (8'b00000010);
	state GNT2 (8'b00000100);
	state GNT3 (8'b00001000);
	state GNT4 (8'b00010000);
	state GNT5 (8'b00100000);
	state GNT6 (8'b01000000);
	state GNT7 (8'b10000000);
}
sample ncu_cpx_intf_pkt_gap (ncu_pcx_pkt_gap_cnt)
{
	m_state PKT_GAP (1:10);
}