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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: ncu_pcx_sample.vrhpal | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | sample ncu_pcx_intf_add_global (ncu_pcx_add[39:32]) | |
36 | { | |
37 | state NCU_ADD ( 8'h80 ); | |
38 | state NIU_ADD ( 8'h81 ); | |
39 | state CCU_ADD ( 8'h83 ); | |
40 | state MCU_ADD ( 8'h84 ); | |
41 | state TCU_ADD ( 8'h85 ); | |
42 | state DBG1_ADD ( 8'h86 ); | |
43 | state DMU_ADD ( 8'h88 ); | |
44 | state RST_ADD ( 8'h89 ); | |
45 | state ASI_ADD ( 8'h90 ); | |
46 | wildcard state PIO_ADD ( 8'Hcx ); | |
47 | state SSI_ADD ( 8'hff ); | |
48 | ||
49 | } | |
50 | ||
51 | sample ncu_pcx_intf_add_mcu (ncu_pcx_add[13:12]) | |
52 | { | |
53 | m_state MCU_ADD (0:3) if (ncu_pcx_add[39:32] === 8'h84); | |
54 | } | |
55 | ||
56 | sample ncu_pcx_intf_add_ncu (ncu_pcx_add[15:0]) | |
57 | { | |
58 | wildcard state INTMAN_REG (16'b0000_00xx_xxxx_x000) if (ncu_pcx_add[39:16] === 24'h800000); | |
59 | state MONDOINVEC_reg (16'h0a00) if (ncu_pcx_add[39:16] === 24'h800000); | |
60 | state SERNUM_REG (16'h1000) if (ncu_pcx_add[39:16] === 24'h800000); | |
61 | state FUSESTAT_REG (16'h1008) if (ncu_pcx_add[39:16] === 24'h800000); | |
62 | state COREAVAIL_REG (16'h1010) if (ncu_pcx_add[39:16] === 24'h800000); | |
63 | state BANKAVAIL_REG (16'h1018) if (ncu_pcx_add[39:16] === 24'h800000); | |
64 | state BANK_ENABLE_REG (16'h1020) if (ncu_pcx_add[39:16] === 24'h800000); | |
65 | state BANK_ENABLE_STATUS_REG (16'h1028) if (ncu_pcx_add[39:16] === 24'h800000); | |
66 | state L2_IDX_HASH_EN_REG (16'h1030) if (ncu_pcx_add[39:16] === 24'h800000); | |
67 | state L2_IDX_HASH_EN_ST_REG (16'h1038) if (ncu_pcx_add[39:16] === 24'h800000); | |
68 | state MEM32_BASE_REG (16'h2000) if (ncu_pcx_add[39:16] === 24'h800000); | |
69 | state MEM32_MASK_REG (16'h2008) if (ncu_pcx_add[39:16] === 24'h800000); | |
70 | state MEM64_BASE_REG (16'h2010) if (ncu_pcx_add[39:16] === 24'h800000); | |
71 | state MEM64_MASK_REG (16'h2018) if (ncu_pcx_add[39:16] === 24'h800000); | |
72 | state IOCON_BASE_REG (16'h2020) if (ncu_pcx_add[39:16] === 24'h800000); | |
73 | state IOCON_MASK_REG (16'h2028) if (ncu_pcx_add[39:16] === 24'h800000); | |
74 | state MMUFSH_REG (16'h2030) if (ncu_pcx_add[39:16] === 24'h800000); | |
75 | wildcard state MDATA0_REG (16'b0000_000x_xxxx_x000) if (ncu_pcx_add[39:16] === 24'h800004); | |
76 | wildcard state MDATA1_REG (16'b0000_001x_xxxx_x000) if (ncu_pcx_add[39:16] === 24'h800004); | |
77 | state MDATA0_ALIAS_REG (16'h0400) if (ncu_pcx_add[39:16] === 24'h800004); | |
78 | state MDATA1_ALIAS_REG (16'h0600) if (ncu_pcx_add[39:16] === 24'h800004); | |
79 | wildcard state MBUSY_REG (16'b0000_100x_xxxx_x000) if (ncu_pcx_add[39:16] === 24'h800004); | |
80 | state MBUSY_ALIAS_REG (16'h0600) if (ncu_pcx_add[39:16] === 24'h800004); | |
81 | state ASI_CORAVAIL_REG (16'h0000) if (ncu_pcx_add[39:16] === 24'h900104); | |
82 | state ASI_COREN_STAT_REG (16'h0010) if (ncu_pcx_add[39:16] === 24'h900104); | |
83 | state ASI_COREN_REG (16'h0020) if (ncu_pcx_add[39:16] === 24'h900104); | |
84 | state ASI_CORRUN_REG (16'h0050) if (ncu_pcx_add[39:16] === 24'h900104); | |
85 | state ASI_CORRUN_STATU_REG (16'h0058) if (ncu_pcx_add[39:16] === 24'h900104); | |
86 | state ASI_CORRUN_W1S_REG (16'h0060) if (ncu_pcx_add[39:16] === 24'h900104); | |
87 | state ASI_CORRUN_W1C_REG (16'h0068) if (ncu_pcx_add[39:16] === 24'h900104); | |
88 | state ASI_INT_VEC_DISP_REG (16'h0000) if (ncu_pcx_add[39:16] === 24'h9001cc); | |
89 | } | |
90 | sample ncu_intr_pcx_int_des (pcx_int_des_reg) | |
91 | { | |
92 | wildcard state INT32_IN32CLK (2'bx1); | |
93 | wildcard state INT32_IN64CLK (2'b1x); | |
94 | } | |
95 | sample ncu_pcx_intf_add_ncu_mem (ncu_pcx_add[9:3]) | |
96 | { | |
97 | m_state INTMAN_REG (0:127) if (ncu_pcx_add[39:16] === 24'h800000); | |
98 | m_state MDATA0_REG (0:63) if (ncu_pcx_add[39:16] === 24'h800004); | |
99 | m_state MDATA1_REG (0:63) if (ncu_pcx_add[39:16] === 24'h800004); | |
100 | m_state MBUSY_REG (0:63) if (ncu_pcx_add[39:16] === 24'h800004); | |
101 | } | |
102 | ||
103 | sample ncu_pcx_intf_type_sample (ncu_pcx_type) | |
104 | { | |
105 | state PCX_LOAD (5'b00000); | |
106 | state PCX_STORE (5'b00001); | |
107 | } | |
108 | ||
109 | ||
110 | ||
111 | sample ncu_pcx_intf_type_trans (ncu_pcx_type) | |
112 | { | |
113 | state PCX_LOAD (5'b00000); | |
114 | state PCX_STORE (5'b00001); | |
115 | state PCX_IFILL (5'b10000); | |
116 | trans PCX_TYPE_TRAN00 ("PCX_LOAD"->"PCX_LOAD"); | |
117 | trans PCX_TYPE_TRAN01 ("PCX_LOAD"->"PCX_STORE"); | |
118 | trans PCX_TYPE_TRAN02 ("PCX_LOAD"->"PCX_IFILL"); | |
119 | ||
120 | trans PCX_TYPE_TRAN10 ("PCX_STORE"->"PCX_LOAD"); | |
121 | trans PCX_TYPE_TRAN11 ("PCX_STORE"->"PCX_STORE"); | |
122 | trans PCX_TYPE_TRAN12 ("PCX_STORE"->"PCX_IFILL"); | |
123 | ||
124 | trans PCX_TYPE_TRAN20 ("PCX_IFILL"->"PCX_LOAD"); | |
125 | trans PCX_TYPE_TRAN21 ("PCX_IFILL"->"PCX_STORE"); | |
126 | trans PCX_TYPE_TRAN22 ("PCX_IFILL"->"PCX_IFILL"); | |
127 | } | |
128 | ||
129 | ||
130 | sample ncu_pcx_intf_size_sample (ncu_pcx_size) | |
131 | { | |
132 | m_state PCX_BYTE1248 (0:3) if (ncu_pcx_type == 5'bx0000); | |
133 | state PCX_PKT_1BYTE0 (8'b00000001) if (ncu_pcx_type === 5'b0001); | |
134 | state PCX_PKT_1BYTE1 (8'b00000010) if (ncu_pcx_type === 5'b0001); | |
135 | state PCX_PKT_1BYTE2 (8'b00000100) if (ncu_pcx_type === 5'b0001); | |
136 | state PCX_PKT_1BYTE3 (8'b00001000) if (ncu_pcx_type === 5'b0001); | |
137 | state PCX_PKT_1BYTE4 (8'b00010000) if (ncu_pcx_type === 5'b0001); | |
138 | state PCX_PKT_1BYTE5 (8'b00100000) if (ncu_pcx_type === 5'b0001); | |
139 | state PCX_PKT_1BYTE6 (8'b01000000) if (ncu_pcx_type === 5'b0001); | |
140 | state PCX_PKT_1BYTE7 (8'b10000000) if (ncu_pcx_type === 5'b0001); | |
141 | state PCX_PKT_2BYTE0 (8'b00000011) if (ncu_pcx_type === 5'b0001); | |
142 | state PCX_PKT_2BYTE1 (8'b00001100) if (ncu_pcx_type === 5'b0001); | |
143 | state PCX_PKT_2BYTE2 (8'b00110000) if (ncu_pcx_type === 5'b0001); | |
144 | state PCX_PKT_2BYTE3 (8'b11000000) if (ncu_pcx_type === 5'b0001); | |
145 | state PCX_PKT_4BYTE0 (8'b00001111) if (ncu_pcx_type === 5'b0001); | |
146 | state PCX_PKT_4BYTE1 (8'b11110000) if (ncu_pcx_type === 5'b0001); | |
147 | state PCX_PKT_8BYTE0 (8'b11111111) if (ncu_pcx_type === 5'b0001); | |
148 | ||
149 | } | |
150 | ||
151 | ||
152 | sample ncu_pcx_intf_cpu_sample (ncu_pcx_cpu) | |
153 | { | |
154 | m_state CPU_THREAD_ID (0:63); | |
155 | } | |
156 | sample ncu_pcx_intf_b2b_sample (ncu_pcx_b2b) | |
157 | { | |
158 | m_state PCX_B2B (2:34); | |
159 | } | |
160 | ||
161 | sample ncu_pcx_intf_stall_cnt_cov (ncu_pcx_stall_cnt) | |
162 | { | |
163 | m_state STALL (1:50); | |
164 | } | |
165 | ||
166 | cross ncu_pcx_intf_type_add_cross ( ncu_pcx_intf_type_sample , ncu_pcx_intf_add_global); | |
167 | cross ncu_pcx_intf_type_cpu_cross ( ncu_pcx_intf_type_sample , ncu_pcx_intf_cpu_sample); | |
168 | ||
169 | ||
170 | ||
171 | sample ncu_pcx_intf_load_b2b (ncu_pcx_load_b2b) | |
172 | { | |
173 | m_state (2:32); | |
174 | } | |
175 | sample ncu_pcx_intf_store_b2b (ncu_pcx_load_b2b) | |
176 | { | |
177 | m_state (2:32); | |
178 | } | |
179 | sample ncu_pcx_intf_pio_b2b (ncu_pcx_load_b2b) | |
180 | { | |
181 | m_state (2:32); | |
182 | } | |
183 | sample ncu_pcx_intf_niu_b2b (ncu_pcx_load_b2b) | |
184 | { | |
185 | m_state (2:32); | |
186 | } | |
187 | sample ncu_pcx_intf_ccu_b2b (ncu_pcx_load_b2b) | |
188 | { | |
189 | m_state (2:32); | |
190 | } | |
191 | sample ncu_pcx_intf_tcu_b2b (ncu_pcx_load_b2b) | |
192 | { | |
193 | m_state (2:32); | |
194 | } | |
195 | sample ncu_pcx_intf_ssi_b2b (ncu_pcx_load_b2b) | |
196 | { | |
197 | m_state (2:32); | |
198 | } | |
199 | sample ncu_pcx_intf_dmu_b2b (ncu_pcx_load_b2b) | |
200 | { | |
201 | m_state (2:32); | |
202 | } | |
203 | sample ncu_pcx_intf_rst_b2b (ncu_pcx_load_b2b) | |
204 | { | |
205 | m_state (2:32); | |
206 | } | |
207 | sample ncu_pcx_intf_mcu0_b2b (ncu_pcx_load_b2b) | |
208 | { | |
209 | m_state (2:32); | |
210 | } | |
211 | sample ncu_pcx_intf_mcu1_b2b (ncu_pcx_load_b2b) | |
212 | { | |
213 | m_state (2:32); | |
214 | } | |
215 | sample ncu_pcx_intf_mcu2_b2b (ncu_pcx_load_b2b) | |
216 | { | |
217 | m_state (2:32); | |
218 | } | |
219 | sample ncu_pcx_intf_mcu3_b2b (ncu_pcx_load_b2b) | |
220 | { | |
221 | m_state (2:32); | |
222 | } | |
223 | sample ncu_pcx_intf_dbg1_b2b (ncu_pcx_load_b2b) | |
224 | { | |
225 | m_state (2:32); | |
226 | } | |
227 | sample ncu_pcx_intf_pkt_gap (ncu_pcx_pkt_gap_cnt) | |
228 | { | |
229 | m_state (1:10); | |
230 | } |