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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / common / vera / include / verilog_tasks_err.vri
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AT		 1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: verilog_tasks_err.vri
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35#ifdef NTB
36
37hdl_task injDTLBerr (bit [2:0] etype,
38 bit [5:0] dtdp_bit,
39 bit diag_acc)
40 "tb_top.ras.dtlb_err.injDTLBerr";
41
42
43hdl_task injDCerr (bit [3:0] etype,
44 bit [1:0] dcvp_mask,
45 bit [4:0] dctp_mask,
46 bit [3:0] dcdp_mask,
47 bit [7:0] dcdp_word_mask,
48 bit [15:0] way_mask)
49 "tb_top.ras.dc_err.injDCerr";
50
51hdl_task injSTBerr (bit [5:0] sbapp_mask,
52 bit [5:0] w0_mask0,
53 bit [5:0] w0_mask1,
54 bit [5:0] w1_mask0,
55 bit [5:0] w1_mask1,
56 bit [1:0] priv_mask,
57 bit stb_ue_io)
58"tb_top.ras.stb_err.injSTBerr";
59
60hdl_task injITLBerr (bit [2:0] etype,
61 bit [5:0] itdp_bit,
62 bit diag_acc)
63 "tb_top.ras.ifu_err.injITLBerr";
64
65hdl_task injICDPerr(bit [5:0] icdp_mask,
66 bit [3:0] icdp_word_mask)
67 "tb_top.ras.ifu_err.injICDPerr";
68
69hdl_task injICerr(bit [3:0] etype,
70 bit [1:0] icvp_mask,
71 bit [4:0] ictp_mask,
72 bit [23:0] way_mask)
73 "tb_top.ras.ifu_err.injICerr";
74
75hdl_task injIRF0err(bit [2:0] etype,
76 bit [6:0] p0_mask0,
77 bit [6:0] p0_mask1,
78 bit [6:0] p1_mask0,
79 bit [6:0] p1_mask1,
80 bit [6:0] p2_mask0,
81 bit [6:0] p2_mask1)
82 "tb_top.ras.irf_err.injIRF0err";
83
84hdl_task injIRF1err(bit [2:0] etype,
85 bit [6:0] p0_mask0,
86 bit [6:0] p0_mask1,
87 bit [6:0] p1_mask0,
88 bit [6:0] p1_mask1,
89 bit [6:0] p2_mask0,
90 bit [6:0] p2_mask1)
91 "tb_top.ras.irf_err.injIRF1err";
92
93hdl_task injMRA0err(reg [6:0] mask0,
94 reg [6:0] mask1,
95 reg mra_wr_err_en)
96 "tb_top.ras.mra_err.injMRA0err";
97
98hdl_task injMRA1err(reg [6:0] mask0,
99 reg [6:0] mask1,
100 reg mra_wr_err_en)
101 "tb_top.ras.mra_err.injMRA1err";
102
103hdl_task injSCA0err(reg [6:0] mask0,
104 reg [6:0] mask1)
105 "tb_top.ras.sca_err.injSCA0err";
106
107hdl_task injSCA1err(reg [6:0] mask0,
108 reg [6:0] mask1)
109 "tb_top.ras.sca_err.injSCA1err";
110
111hdl_task injTSA0err(reg [6:0] w0_mask0,
112 reg [6:0] w0_mask1,
113 reg [6:0] w1_mask0,
114 reg [6:0] w1_mask1,
115 reg [2:0] req_type,
116 reg tsa_wr_err_en)
117 "tb_top.ras.tsa_err.injTSA0err";
118
119hdl_task injTSA1err(reg [6:0] w0_mask0,
120 reg [6:0] w0_mask1,
121 reg [6:0] w1_mask0,
122 reg [6:0] w1_mask1,
123 reg [2:0] req_type,
124 reg tsa_wr_err_en)
125 "tb_top.ras.tsa_err.injTSA1err";
126
127hdl_task injTCCerr(reg [6:0] mask0,
128 reg [6:0] mask1,
129 reg [2:0] req_type)
130 "tb_top.ras.tcc_err.injTCCerr";
131
132hdl_task injFRFerr(reg [38:0] rs1_mask0,
133 reg [38:0] rs1_mask1,
134 reg [38:0] rs2_mask0,
135 reg [38:0] rs2_mask1,
136 reg is_pdist,
137 reg [2:0] etype)
138 "tb_top.ras.frf_err.injFRFerr";
139
140hdl_task injMAMEMerr(reg [5:0] p0_mask0,
141 reg [5:0] p0_mask1,
142 reg [5:0] p1_mask0,
143 reg [5:0] p1_mask1)
144 "tb_top.ras.mamem_err.injMAMEMerr";
145
146#else
147
148#ifdef PROG_FILE
149#define EXTERN
150#else
151#define EXTERN extern
152#endif
153
154
155EXTERN hdl_task injDTLBerr (bit [2:0] etype,
156 bit [5:0] dtdp_bit,
157 bit diag_acc)
158#ifndef PROG_FILE
159;
160#else
161"tb_top.ras.dtlb_err.injDTLBerr";
162#endif
163
164EXTERN hdl_task injDCerr (bit [3:0] etype,
165 bit [1:0] dcvp_mask,
166 bit [4:0] dctp_mask,
167 bit [3:0] dcdp_mask,
168 bit [7:0] dcdp_word_mask,
169 bit [15:0] way_mask)
170#ifndef PROG_FILE
171;
172#else
173"tb_top.ras.dc_err.injDCerr";
174#endif
175
176EXTERN hdl_task injSTBerr (bit [5:0] sbapp_mask,
177 bit [5:0] w0_mask0,
178 bit [5:0] w0_mask1,
179 bit [5:0] w1_mask0,
180 bit [5:0] w1_mask1,
181 bit [1:0] priv_mask,
182 bit stb_ue_io)
183#ifndef PROG_FILE
184;
185#else
186"tb_top.ras.stb_err.injSTBerr";
187#endif
188
189EXTERN hdl_task injITLBerr (bit [2:0] etype,
190 bit [5:0] itdp_bit,
191 bit diag_acc)
192#ifndef PROG_FILE
193;
194#else
195"tb_top.ras.ifu_err.injITLBerr";
196#endif
197
198EXTERN hdl_task injICDPerr(bit [5:0] icdp_mask,
199 bit [3:0] icdp_word_mask)
200#ifndef PROG_FILE
201;
202#else
203 "tb_top.ras.ifu_err.injICDPerr";
204#endif
205
206EXTERN hdl_task injICerr(bit [3:0] etype,
207 bit [1:0] icvp_mask,
208 bit [4:0] ictp_mask,
209 bit [23:0] way_mask)
210#ifndef PROG_FILE
211;
212#else
213 "tb_top.ras.ifu_err.injICerr";
214#endif
215
216EXTERN hdl_task injIRF0err(bit [2:0] etype,
217 bit [6:0] p0_mask0,
218 bit [6:0] p0_mask1,
219 bit [6:0] p1_mask0,
220 bit [6:0] p1_mask1,
221 bit [6:0] p2_mask0,
222 bit [6:0] p2_mask1)
223#ifndef PROG_FILE
224;
225#else
226 "tb_top.ras.irf_err.injIRF0err";
227#endif
228EXTERN hdl_task injIRF1err(bit [2:0] etype,
229 bit [6:0] p0_mask0,
230 bit [6:0] p0_mask1,
231 bit [6:0] p1_mask0,
232 bit [6:0] p1_mask1,
233 bit [6:0] p2_mask0,
234 bit [6:0] p2_mask1)
235#ifndef PROG_FILE
236;
237#else
238 "tb_top.ras.irf_err.injIRF1err";
239#endif
240
241EXTERN hdl_task injMRA0err(reg [6:0] mask0,
242 reg [6:0] mask1,
243 reg mra_wr_err_en)
244#ifndef PROG_FILE
245;
246#else
247 "tb_top.ras.mra_err.injMRA0err";
248#endif
249
250EXTERN hdl_task injMRA1err(reg [6:0] mask0,
251 reg [6:0] mask1,
252 reg mra_wr_err_en)
253#ifndef PROG_FILE
254;
255#else
256 "tb_top.ras.mra_err.injMRA1err";
257#endif
258
259EXTERN hdl_task injSCA0err(reg [6:0] mask0,
260 reg [6:0] mask1)
261#ifndef PROG_FILE
262;
263#else
264 "tb_top.ras.sca_err.injSCA0err";
265#endif
266
267EXTERN hdl_task injSCA1err(reg [6:0] mask0,
268 reg [6:0] mask1)
269#ifndef PROG_FILE
270;
271#else
272 "tb_top.ras.sca_err.injSCA1err";
273#endif
274
275EXTERN hdl_task injTSA0err(reg [6:0] w0_mask0,
276 reg [6:0] w0_mask1,
277 reg [6:0] w1_mask0,
278 reg [6:0] w1_mask1,
279 reg [2:0] req_type,
280 reg tsa_wr_err_en)
281#ifndef PROG_FILE
282;
283#else
284 "tb_top.ras.tsa_err.injTSA0err";
285#endif
286
287EXTERN hdl_task injTSA1err(reg [6:0] w0_mask0,
288 reg [6:0] w0_mask1,
289 reg [6:0] w1_mask0,
290 reg [6:0] w1_mask1,
291 reg [2:0] req_type,
292 reg tsa_wr_err_en)
293#ifndef PROG_FILE
294;
295#else
296 "tb_top.ras.tsa_err.injTSA1err";
297#endif
298
299EXTERN hdl_task injTCCerr(reg [6:0] mask0,
300 reg [6:0] mask1,
301 reg [2:0] req_type)
302#ifndef PROG_FILE
303;
304#else
305 "tb_top.ras.tcc_err.injTCCerr";
306#endif
307
308EXTERN hdl_task injFRFerr(reg [38:0] rs1_mask0,
309 reg [38:0] rs1_mask1,
310 reg [38:0] rs2_mask0,
311 reg [38:0] rs2_mask1,
312 reg is_pdist,
313 reg [2:0] etype)
314#ifndef PROG_FILE
315;
316#else
317 "tb_top.ras.frf_err.injFRFerr";
318#endif
319
320EXTERN hdl_task injMAMEMerr(reg [5:0] p0_mask0,
321 reg [5:0] p0_mask1,
322 reg [5:0] p1_mask0,
323 reg [5:0] p1_mask1)
324#ifndef PROG_FILE
325;
326#else
327 "tb_top.ras.mamem_err.injMAMEMerr";
328#endif
329
330#endif
Full OpenSPARC design & verification tarball including full HDL.