Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / common / verilog / monitors / n2_int_latency.v
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2//
3// OpenSPARC T2 Processor File: n2_int_latency.v
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35`include "defines.vh"
36`include "dispmonDefines.vh"
37
38module n2_int_latency ( clk,rst_l);
39
40input clk;
41input rst_l;
42
43wire [145:0] cpx_spc0_data_cx2 = `CPU.cpx_spc0_data_cx2;
44wire [145:0] cpx_spc1_data_cx2 = `CPU.cpx_spc1_data_cx2;
45wire [145:0] cpx_spc2_data_cx2 = `CPU.cpx_spc2_data_cx2;
46wire [145:0] cpx_spc3_data_cx2 = `CPU.cpx_spc3_data_cx2;
47wire [145:0] cpx_spc4_data_cx2 = `CPU.cpx_spc4_data_cx2;
48wire [145:0] cpx_spc5_data_cx2 = `CPU.cpx_spc5_data_cx2;
49wire [145:0] cpx_spc6_data_cx2 = `CPU.cpx_spc6_data_cx2;
50wire [145:0] cpx_spc7_data_cx2 = `CPU.cpx_spc7_data_cx2;
51
52wire [129:0] spc0_pcx_data_pa = `CPU.spc0_pcx_data_pa;
53wire [129:0] spc1_pcx_data_pa = `CPU.spc1_pcx_data_pa;
54wire [129:0] spc2_pcx_data_pa = `CPU.spc2_pcx_data_pa;
55wire [129:0] spc3_pcx_data_pa = `CPU.spc3_pcx_data_pa;
56wire [129:0] spc4_pcx_data_pa = `CPU.spc4_pcx_data_pa;
57wire [129:0] spc5_pcx_data_pa = `CPU.spc5_pcx_data_pa;
58wire [129:0] spc6_pcx_data_pa = `CPU.spc6_pcx_data_pa;
59wire [129:0] spc7_pcx_data_pa = `CPU.spc7_pcx_data_pa;
60wire [129:0] pcx_ncu_data_px2 = `CPU.pcx_ncu_data_px2;
61
62wire [8:0] spc0_pcx_req_pq = `CPU.spc0_pcx_req_pq;
63wire [8:0] spc1_pcx_req_pq = `CPU.spc1_pcx_req_pq;
64wire [8:0] spc2_pcx_req_pq = `CPU.spc2_pcx_req_pq;
65wire [8:0] spc3_pcx_req_pq = `CPU.spc3_pcx_req_pq;
66wire [8:0] spc4_pcx_req_pq = `CPU.spc4_pcx_req_pq;
67wire [8:0] spc5_pcx_req_pq = `CPU.spc5_pcx_req_pq;
68wire [8:0] spc6_pcx_req_pq = `CPU.spc6_pcx_req_pq;
69wire [8:0] spc7_pcx_req_pq = `CPU.spc7_pcx_req_pq;
70wire pcx_ncu_data_rdy_px1 = `CPU.pcx_ncu_data_rdy_px1;
71
72reg [8:0] spc0_pcx_req_pq_local;
73reg [8:0] spc1_pcx_req_pq_local;
74reg [8:0] spc2_pcx_req_pq_local;
75reg [8:0] spc3_pcx_req_pq_local;
76reg [8:0] spc4_pcx_req_pq_local;
77reg [8:0] spc5_pcx_req_pq_local;
78reg [8:0] spc6_pcx_req_pq_local;
79reg [8:0] spc7_pcx_req_pq_local;
80reg pcx_ncu_data_rdy_px1_local;
81
82reg [129:0] data[0:256];
83reg [129:0] local;
84integer time0[0:256];
85reg [129:0] data1[0:256];
86integer time1[0:256];
87
88integer i;
89integer j;
90integer k;
91integer l;
92integer m;
93integer n;
94integer count;
95integer count1;
96integer start_time;
97integer stop_time;
98integer latency;
99integer temp;
100
101initial
102begin
103 i = 0;
104 j = 0;
105 k = 0;
106 l = 0;
107 m = 0;
108 n = 0;
109 count = 0;
110 count1 = 0;
111 start_time = 0;
112 stop_time = 0;
113 latency = 0;
114end
115
116
117always @(posedge clk)
118 begin
119 if(rst_l)
120 begin
121 spc0_pcx_req_pq_local <= #1 spc0_pcx_req_pq;
122 spc1_pcx_req_pq_local <= #1 spc0_pcx_req_pq;
123 spc2_pcx_req_pq_local <= #1 spc0_pcx_req_pq;
124 spc3_pcx_req_pq_local <= #1 spc0_pcx_req_pq;
125 spc4_pcx_req_pq_local <= #1 spc0_pcx_req_pq;
126 spc5_pcx_req_pq_local <= #1 spc0_pcx_req_pq;
127 spc6_pcx_req_pq_local <= #1 spc0_pcx_req_pq;
128 spc7_pcx_req_pq_local <= #1 spc0_pcx_req_pq;
129 pcx_ncu_data_rdy_px1_local <= #1 pcx_ncu_data_rdy_px1;
130 end
131 else
132 begin
133 spc0_pcx_req_pq_local <= 0;
134 spc1_pcx_req_pq_local <= 0;
135 spc2_pcx_req_pq_local <= 0;
136 spc3_pcx_req_pq_local <= 0;
137 spc4_pcx_req_pq_local <= 0;
138 spc5_pcx_req_pq_local <= 0;
139 spc6_pcx_req_pq_local <= 0;
140 spc7_pcx_req_pq_local <= 0;
141 pcx_ncu_data_rdy_px1_local <=0;
142 end
143 end
144//=============================================================
145
146
147
148always @(posedge clk) begin
149 if((spc0_pcx_req_pq_local != 9'h000)
150 && (/*PA[39:32]*/spc0_pcx_data_pa[103:96] == 8'h90)
151 && (/*PA[25: 0]*/spc0_pcx_data_pa[ 89:64] == 26'h1cc0000)
152 && (spc0_pcx_data_pa[128:124] == 5'h01))
153 begin
154 data[i] = spc0_pcx_data_pa;
155 time0[i] = $time;
156 i=i+1;
157 end
158 if((spc1_pcx_req_pq_local != 9'h000)
159 && (/*PA[39:32]*/spc1_pcx_data_pa[103:96] == 8'h90)
160 && (/*PA[25: 0]*/spc1_pcx_data_pa[ 89:64] == 26'h1cc0000)
161 && (spc1_pcx_data_pa[128:124] == 5'h01))
162 begin
163 data[i] = spc1_pcx_data_pa;
164 time0[i] = $time;
165 i=i+1;
166 end
167 if((spc2_pcx_req_pq_local != 9'h000)
168 && (/*PA[39:32]*/spc2_pcx_data_pa[103:96] == 8'h90)
169 && (/*PA[25: 0]*/spc2_pcx_data_pa[ 89:64] == 26'h1cc0000)
170 && (spc2_pcx_data_pa[128:124] == 5'h01))
171 begin
172 data[i] = spc2_pcx_data_pa;
173 time0[i] = $time;
174 i=i+1;
175 end
176 if((spc3_pcx_req_pq_local != 9'h000)
177 && (/*PA[39:32]*/spc3_pcx_data_pa[103:96] == 8'h90)
178 && (/*PA[25: 0]*/spc3_pcx_data_pa[ 89:64] == 26'h1cc0000)
179 && (spc3_pcx_data_pa[128:124] == 5'h01))
180 begin
181 data[i] = spc3_pcx_data_pa;
182 time0[i] = $time;
183 i=i+1;
184 end
185 if((spc4_pcx_req_pq_local != 9'h000)
186 && (/*PA[39:32]*/spc4_pcx_data_pa[103:96] == 8'h90)
187 && (/*PA[25: 0]*/spc4_pcx_data_pa[ 89:64] == 26'h1cc0000)
188 && (spc4_pcx_data_pa[128:124] == 5'h01))
189 begin
190 data[i] = spc4_pcx_data_pa;
191 time0[i] = $time;
192 i=i+1;
193 end
194 if((spc5_pcx_req_pq_local != 9'h000)
195 && (/*PA[39:32]*/spc5_pcx_data_pa[103:96] == 8'h90)
196 && (/*PA[25: 0]*/spc5_pcx_data_pa[ 89:64] == 26'h1cc0000)
197 && (spc5_pcx_data_pa[128:124] == 5'h01))
198 begin
199 data[i] = spc5_pcx_data_pa;
200 time0[i] = $time;
201 i=i+1;
202 end
203 if((spc6_pcx_req_pq_local != 9'h000)
204 && (/*PA[39:32]*/spc6_pcx_data_pa[103:96] == 8'h90)
205 && (/*PA[25: 0]*/spc6_pcx_data_pa[ 89:64] == 26'h1cc0000)
206 && (spc6_pcx_data_pa[128:124] == 5'h01))
207 begin
208 data[i] = spc6_pcx_data_pa;
209 time0[i] = $time;
210 i=i+1;
211 end
212 if((spc7_pcx_req_pq_local != 9'h000)
213 && (/*PA[39:32]*/spc7_pcx_data_pa[103:96] == 8'h90)
214 && (/*PA[25: 0]*/spc7_pcx_data_pa[ 89:64] == 26'h1cc0000)
215 && (spc7_pcx_data_pa[128:124] == 5'h01))
216 begin
217 data[i] = spc7_pcx_data_pa;
218 time0[i] = $time;
219 i=i+1;
220 end
221
222end
223
224always @(posedge clk) begin
225 if((pcx_ncu_data_rdy_px1_local ==1)
226 && (pcx_ncu_data_px2[128:124] == 5'h01)
227 && (/*PA[39:32]*/pcx_ncu_data_px2[103:96] == 8'h90)
228 && (/*PA[25: 0]*/pcx_ncu_data_px2[ 89:64] == 26'h1cc0000))
229 begin
230 count = 0;
231 for(k=0; k<i; k=k+1)
232 begin
233 if ((pcx_ncu_data_px2 == data[k]) && (count == 0))
234 begin
235 local = data[k];
236 data1[j] = local;
237 time1[j] = time0[k];
238 count = 1;
239 for(l=k;l<i;l=l+1)
240 begin
241 temp = l+1 ;
242 local = data[temp];
243 data[l] =local;
244 time0[l] = time0[temp];
245 end
246 j = j+1;
247 i= i-1;
248 end
249 end
250 end
251end
252
253always @(posedge clk) begin
254 if((cpx_spc0_data_cx2[145] == 1'b1) && (cpx_spc0_data_cx2[144:141] == 4'b0111))
255 begin
256 count1 = 0;
257 for(m=0;m<j;m=m+1)
258 begin
259 local = data1[m];
260 if((count1 == 0) && (local[10:8] == cpx_spc0_data_cx2[10:8]) && (local[13:11] == cpx_spc0_data_cx2[13:11]) && (local[5:0] == cpx_spc0_data_cx2[5:0]))
261 begin
262 stop_time = $time;
263 start_time = time1[m];
264 latency = (stop_time - start_time);
265 `PR_INFO("n2_int_latency", `INFO, "latency for interrupt between <C%h> <T%h> and <C%h> <T%h> is = %d",local[122:120],local[119:117],local[13:11],local[10:8],latency);
266 // $display("latency = %d \n",latency);
267 count1 = 1;
268 for(n=m;n<j;n=n+1)
269 begin
270 temp = n+1;
271 local = data1[temp];
272 data1[n] = local;
273 time1[n] = time1[temp];
274 end
275 j = j-1;
276 end
277 end
278 end
279
280 if((cpx_spc1_data_cx2[145] == 1'b1) && (cpx_spc1_data_cx2[144:141] == 4'b0111))
281 begin
282 count1 = 0;
283 for(m=0;m<j;m=m+1)
284 begin
285 local = data1[m];
286 if((count1 == 0) && (local[10:8] == cpx_spc1_data_cx2[10:8]) && (local[13:11] == cpx_spc1_data_cx2[13:11]) && (local[5:0] == cpx_spc1_data_cx2[5:0]))
287 begin
288 stop_time = $time;
289 start_time = time1[m];
290 latency = (stop_time - start_time);
291 `PR_INFO("n2_int_latency", `INFO, "latency for interrupt between <C%h> <T%h> and <C%h> <T%h> is = %d",local[122:120],local[119:117],local[13:11],local[10:8],latency);
292 // $display("latency = %d \n",latency);
293 count1 = 1;
294 for(n=m;n<j;n=n+1)
295 begin
296 temp = n+1;
297 local = data1[temp];
298 data1[n] = local;
299 time1[n] = time1[temp];
300 end
301 j = j-1;
302 end
303 end
304 end
305
306
307 if((cpx_spc2_data_cx2[145] == 1'b1) && (cpx_spc2_data_cx2[144:141] == 4'b0111))
308 begin
309 count1 = 0;
310 for(m=0;m<j;m=m+1)
311 begin
312 local = data1[m];
313 if((count1 == 0) && (local[10:8] == cpx_spc2_data_cx2[10:8]) && (local[13:11] == cpx_spc2_data_cx2[13:11]) && (local[5:0] == cpx_spc2_data_cx2[5:0]))
314 begin
315 stop_time = $time;
316 start_time = time1[m];
317 latency = (stop_time - start_time);
318 `PR_INFO("n2_int_latency", `INFO, "latency for interrupt between <C%h> <T%h> and <C%h> <T%h> is = %d",local[122:120],local[119:117],local[13:11],local[10:8],latency);
319
320 // $display("latency = %d \n",latency);
321 count1 = 1;
322 for(n=m;n<j;n=n+1)
323 begin
324 temp = n+1;
325 local = data1[temp];
326 data1[n] = local;
327 time1[n] = time1[temp];
328 end
329 j = j-1;
330 end
331 end
332 end
333
334 if((cpx_spc3_data_cx2[145] == 1'b1) && (cpx_spc3_data_cx2[144:141] == 4'b0111))
335 begin
336 count1 = 0;
337 for(m=0;m<j;m=m+1)
338 begin
339 local = data1[m];
340 if((count1 == 0) && (local[10:8] == cpx_spc3_data_cx2[10:8]) && (local[13:11] == cpx_spc3_data_cx2[13:11]) && (local[5:0] == cpx_spc3_data_cx2[5:0]))
341 begin
342 stop_time = $time;
343 start_time = time1[m];
344 latency = (stop_time - start_time);
345 `PR_INFO("n2_int_latency", `INFO, "latency for interrupt between <C%h> <T%h> and <C%h> <T%h> is = %d",local[122:120],local[119:117],local[13:11],local[10:8],latency);
346 //$display("latency =%d \n",latency);
347 count1 = 1;
348 for(n=m;n<j;n=n+1)
349 begin
350 temp = n+1;
351 local = data1[temp];
352 data1[n] = local;
353 time1[n] = time1[temp];
354 end
355 j = j-1;
356 end
357 end
358 end
359
360
361
362 if((cpx_spc4_data_cx2[145] == 1'b1) && (cpx_spc4_data_cx2[144:141] == 4'b0111))
363 begin
364 count1 = 0;
365 for(m=0;m<j;m=m+1)
366 begin
367 local = data1[m];
368 if((count1 == 0) && (local[10:8] == cpx_spc4_data_cx2[10:8]) && (local[13:11] == cpx_spc4_data_cx2[13:11]) && (local[5:0] == cpx_spc4_data_cx2[5:0]))
369 begin
370 stop_time = $time;
371 start_time = time1[m];
372 latency = (stop_time - start_time);
373 `PR_INFO("n2_int_latency", `INFO, "latency for interrupt between <C%h> <T%h> and <C%h> <T%h> is = %d",local[122:120],local[119:117],local[13:11],local[10:8],latency);
374 // $display("latency = %d \n",latency);
375 count1 = 1;
376 for(n=m;n<j;n=n+1)
377 begin
378 temp = n+1;
379 local = data1[temp];
380 data1[n] = local;
381 time1[n] = time1[temp];
382 end
383 j = j-1;
384 end
385 end
386 end
387
388 if((cpx_spc5_data_cx2[145] == 1'b1) && (cpx_spc5_data_cx2[144:141] == 4'b0111))
389 begin
390 count1 = 0;
391 for(m=0;m<j;m=m+1)
392 begin
393 local = data1[m];
394 if((count1 == 0) && (local[10:8] == cpx_spc5_data_cx2[10:8]) && (local[13:11] == cpx_spc5_data_cx2[13:11]) && (local[5:0] == cpx_spc5_data_cx2[5:0]))
395 begin
396 stop_time = $time;
397 start_time = time1[m];
398 latency = (stop_time - start_time);
399 `PR_INFO("n2_int_latency", `INFO, "latency for interrupt between <C%h> <T%h> and <C%h> <T%h> is = %d",local[122:120],local[119:117],local[13:11],local[10:8],latency);
400 // $display("latency = %d \n",latency);
401 count1 = 1;
402 for(n=m;n<j;n=n+1)
403 begin
404 temp = n+1;
405 local = data1[temp];
406 data1[n] = local;
407 time1[n] = time1[temp];
408 end
409 j = j-1;
410 end
411 end
412 end
413
414
415 if((cpx_spc6_data_cx2[145] == 1'b1) && (cpx_spc6_data_cx2[144:141] == 4'b0111))
416 begin
417 count1 = 0;
418 for(m=0;m<j;m=m+1)
419 begin
420 local = data1[m];
421 if((count1 == 0) && (local[10:8] == cpx_spc6_data_cx2[10:8]) && (local[13:11] == cpx_spc6_data_cx2[13:11]) && (local[5:0] == cpx_spc6_data_cx2[5:0]))
422 begin
423 stop_time = $time;
424 start_time = time1[m];
425 latency = (stop_time - start_time);
426 `PR_INFO("n2_int_latency", `INFO, "latency for interrupt between <C%h> <T%h> and <C%h> <T%h> is = %d",local[122:120],local[119:117],local[13:11],local[10:8],latency);
427 // $display("latency = %d \n",latency);
428 count1 = 1;
429 for(n=m;n<j;n=n+1)
430 begin
431 temp = n+1;
432 local = data1[temp];
433 data1[n] = local;
434 time1[n] = time1[temp];
435 end
436 j = j-1;
437 end
438 end
439 end
440
441 if((cpx_spc7_data_cx2[145] == 1'b1) && (cpx_spc7_data_cx2[144:141] == 4'b0111))
442 begin
443 count1 = 0;
444 for(m=0;m<j;m=m+1)
445 begin
446 local = data1[m];
447 if((count1 == 0) && (local[10:8] == cpx_spc7_data_cx2[10:8]) && (local[13:11] == cpx_spc7_data_cx2[13:11]) && (local[5:0] == cpx_spc7_data_cx2[5:0]))
448 begin
449 stop_time = $time;
450 start_time = time1[m];
451 latency = (stop_time - start_time);
452 `PR_INFO("n2_int_latency", `INFO, "latency for interrupt between <C%h> <T%h> and <C%h> <T%h> is = %d",local[122:120],local[119:117],local[13:11],local[10:8],latency);
453 // $display("latency = %d \n",latency);
454 count1 = 1;
455 for(n=m;n<j;n=n+1)
456 begin
457 temp = n+1;
458 local = data1[temp];
459 data1[n] = local;
460 time1[n] = time1[temp];
461 end
462 j = j-1;
463 end
464 end
465 end
466
467end // always @ (posedge clk)
468
469endmodule // n2_int_latency