[OpenSPARC-T2-DV] / verif / env / common / verilog / soc_sync / soc_sync.flist.2


// Testbench Files for :/verif/env/common/verilog/soc_sync files
+incdir++
fc_dmupeu_csr_probe.v
fc_niu_csr_probe.v     
fc_ncu_csr_probe.v     
fc_mcu_csr_probe.v     
fc_l2_csr_probe.v
Commit	Line	Data
86530b38 AT	1
	2	// Testbench Files for :/verif/env/common/verilog/soc_sync files
	3	+incdir++
	4	fc_dmupeu_csr_probe.v
	5	fc_niu_csr_probe.v
	6	fc_ncu_csr_probe.v
	7	fc_mcu_csr_probe.v
	8	fc_l2_csr_probe.v