Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / fc / vera / classes / asmToVeraIntf.vrh
CommitLineData
86530b38
AT
1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: asmToVeraIntf.vrh
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35#ifndef INC__TMP_ASMTOVERAINTF_VRH
36#define INC__TMP_ASMTOVERAINTF_VRH
37
38extern class TxPacketGenConfig;
39extern class BaseAsmToVeraIntf;
40
41extern class AsmToVeraIntf extends BaseAsmToVeraIntf {
42
43 task generic_ev(
44 string arg1_str,
45 reg [63:0] arg2_64bits,
46 reg [63:0] arg3_64bits
47 );
48
49 task intp(reg [5:0] tid = 0,
50 reg [63:0] type = 0,
51 reg [63:0] vec = 0,
52 integer src = 16, // 0-16 are ccx ports. 16 = NCU
53 integer wait = 0);
54
55 task dump_mem(reg [63:0] addr=0,
56 integer amount = 8);
57
58 task extint(integer wait = 0, integer width = 0);
59
60 task warmrst(integer wait = 0);
61
62 task store(reg [7:0] ccxPortMask = 0,
63 reg [63:0] addr=0,
64 reg [63:0] data=0);
65
66 task jtagRdWrL2(reg [63:0] paAddr = 0,
67 reg [63:0] data=0,
68 reg [63:0] jtagDoneAddrMem=0,
69 reg rdwr=0);
70
71// added this
72#ifndef FC_NO_NIU_T2
73task pktGenConfig (
74 integer mac_port,
75 integer frame_type,
76 integer frame_class,
77 integer data_length,
78 (integer tx_multi_port = 0, integer data_length_p1 = -1)
79);
80
81 task NIU_AddTxChannels (
82 integer mac_port,
83 integer dma_no,
84 (integer tx_multi_port = 0, bit [15:0] tx_multi_dma_p0 = 16'h0, bit [15:0] tx_multi_dma_p1 = 16'h0)
85);
86
87task NIU_SetTxRingKick (
88 integer mac_port,
89 integer dma_no,
90 (integer tx_multi_port = 0, bit [15:0] tx_multi_dma_p0 = 16'h0, bit [15:0] tx_multi_dma_p1 = 16'h0)
91);
92
93task NIU_SetTxMaxBurst (
94 integer mac_port,
95 integer dma_no,
96 integer SetTxMaxBurst_Data,
97 (integer tx_multi_port = 0, bit [15:0] tx_multi_dma_p0 = 16'h0, bit [15:0] tx_multi_dma_p1 = 16'h0)
98);
99
100task NIU_InitTxDma (
101 integer mac_port,
102 integer dma_no,
103 bit Xlate,
104 (integer tx_multi_port = 0, bit [15:0] tx_multi_dma_p0 = 16'h0, bit [15:0] tx_multi_dma_p1 = 16'h0)
105);
106
107 task NIU_TxDMAActivate (
108 integer mac_port,
109 integer dma_activelist,
110 (integer tx_multi_port = 0, bit [15:0] tx_multi_dma_p0 = 16'h0, bit [15:0] tx_multi_dma_p1 = 16'h0)
111);
112
113 task NIU_EXIT_chk (
114 integer mac_port
115);
116
117task TxPktGen (
118 integer mac_port,
119 integer dmaport,
120 integer numofpacket,
121 (integer tx_multi_port = 0, bit [15:0] tx_multi_dma_p0 = 16'h0, bit [15:0] tx_multi_dma_p1 = 16'h0)
122);
123
124task TxPktGen_int (
125 integer mac_port,
126 integer dmaport,
127 integer numofpacket,
128 (integer tx_multi_port = 0, bit [15:0] tx_multi_dma_p0 = 16'h0, bit [15:0] tx_multi_dma_p1 = 16'h0)
129);
130
131task NIU_InitRxDma (
132 integer RxDmaChnlNo,
133 integer RxDescRingLen,
134 bit [39:0] RxRingStartAddr,
135 bit [63:0] RbrConfData,
136 integer RxInitKick,
137 bit Xlate,
138 (bit [15:0] rx_multi_dma = 16'h0)
139);
140
141task NIU_RxPktConf (
142 integer RxPktCnt,
143 (integer iport = 0)
144);
145
146task NIU_RxGenPkt (
147 integer mac_port,
148 integer RxDmaChnlNo,
149 integer RxPktCnt,
150 integer RxPktLen,
151 (integer rx_multi_PORT = 0,
152 bit [15:0] rx_multi_DMA = 16'h0)
153);
154
155task NIU_internalrx (
156 integer mac_port,
157 integer RxDmaChnlNo,
158 integer RxPktCnt,
159 integer RxPktLen,
160 (integer rx_multi_port=0,
161 bit [15:0] rx_multi_dma= 16'h0)
162);
163#endif
164
165task IosErrInj (string errtype, bit [15:0] ctag, bit [39:0] pa);
166task IosRandErrInj (string errtype, integer num_errs, integer weight);
167
168task marker(
169 string what,
170 reg [5:0] fromTid,
171 reg [63:0] pc
172);
173
174task reset_now(
175 string what
176);
177
178#ifndef FC_NO_PEU_VERA
179task set_StartPEUTest ();
180
181task EnablePCIeEgCmd (string cmdType,
182 bit [63:0] addr,
183 bit [31:0] txLen,
184 bit [31:0] startData,
185 string err);
186
187
188task EnablePCIeIgCmd (string cmdType,
189 bit [63:0] StartAddr,
190 bit [63:0] EndAddr,
191 string txLen,
192 bit [31:0] NumCmds,
193 string err);
194#endif
195
196
197}
198
199#endif