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Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / fc / vera / fc_niu_ev2a.vr
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AT		 1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: fc_niu_ev2a.vr
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
25// software where a choice of GPL license versions is made
26// available with the language indicating that GPLv2 or any later version
27// may be used, or where a choice of which version of the GPL is applied is
28// otherwise unspecified.
29//
30// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35#include "niu_pktgen_csr_ev2a.vrh"
36
37#include "std_display_class.vrh"
38extern StandardDisplay gDbg;
39#define STD_DISP gDbg
40
41#include "memArray.vrh"
42extern MemArray gMem;
43
44#include "niu_mem.vrh"
45extern CSparseMem SparseMem;
46
47#ifdef FC_NO_PEU_VERA
48#ifdef USE_BOBO
49extern hdl_task bobo_write_64bit (bit [39:0] pa,
50 bit [63:0] data64
51 );
52#else
53#ifndef FC_NO_PEU_VERA
54extern hdl_task pep_write_32bit (bit [39:0] pa,
55 bit [31:0] data32
56 );
57#endif
58#endif // USE_BOBO
59#endif // FC_NO_PEU_VERA
60
61
62/* Utility function used by other Fc_Niu_Ev2a functions */
63task Fc_Niu_Ev2a_write1 (bit [63:0] data,
64 bit [63:0] memArray_addr,
65 string func_name)
66{
67 bit [7:0] be = 8'hff;
68 bit [63:0] Rdata0;
69
70 Rdata0 = {data[7:0],
71 data[15:8],
72 data[23:16],
73 data[31:24],
74 data[39:32],
75 data[47:40],
76 data[55:48],
77 data[63:56]};
78 SparseMem.WriteMem(memArray_addr, Rdata0, be);
79 PR_INFO("fc_niu_ev2a", MON_INFO,
80 psprintf("MAQ-Debug : %s Addr = 64'h%h, Data = %h, Rdata = %h \n ",
81 func_name, memArray_addr, data, Rdata0 ));
82 gMem.writeBM (memArray_addr, data, be);
83#ifdef FC_NO_PEU_VERA
84#ifdef USE_BOBO
85 bobo_write_64bit(memArray_addr[39:0], Rdata0[63:0]);
86#else
87#ifndef FC_NO_PEU_VERA
88 pep_write_32bit (memArray_addr[39:0], Rdata0[31:0]);
89 pep_write_32bit (memArray_addr[39:0]+40'h4, Rdata0[63:32]);
90#endif
91#endif // USE_BOBO
92#endif // FC_NO_PEU_VERA
93}
94
95
96task Fc_Niu_Ev2a_setRxDmaCfig_1 (bit [63:0] data)
97{
98 Fc_Niu_Ev2a_write1(data, NIU_PKTGEN_CSR_EV2A_RXDMA_CFIG1_0,
99 "setRxDmaCfig_1");
100 /*
101// SparseMem.WriteMem(64'h200000800, data,8'hff);
102// printf("MAQ-Debug : setRxDmaCfig_1 Addr = 64'h200000800, Data = %h \n ", data );
103 data_tmp0 = data;
104 Rdata0 = {data_tmp0[7:0],data_tmp0[15:8],data_tmp0[23:16],data_tmp0[31:24],data_tmp0[39:32],data_tmp0[47:40],data_tmp0[55:48],data_tmp0[63:56]};
105 SparseMem.WriteMem(64'hc100000800, Rdata0,8'hff);
106 printf("MAQ-Debug : setRxDmaCfig_1 Addr = 64'hc100000800, Data = %h \n ", data );
107 printf("MAQ-Debug : setRxDmaCfig_1 Addr = 64'hc100000800, Data(Rdata) = %h \n ", Rdata0 );
108
109 memArray_addr = 64'hc100000800;
110 be = 8'hff;
111 gMem.writeBM (memArray_addr[63:0], data, be);
112 printf("KHH-Debug : gMem.WriteBM setRxDmaCfig_1 Addr = 64'hc100000800, Data = %h \n ", data);
113 */
114}
115
116
117task Fc_Niu_Ev2a_setRxDmaCfig_1_1 (bit [63:0] data)
118{
119 Fc_Niu_Ev2a_write1(data, NIU_PKTGEN_CSR_EV2A_RXDMA_CFIG1_1,
120 "setRxDmaCfig_1_1");
121 /*
122// SparseMem.WriteMem(64'h200000a00, {32'h0000_0000, 24'h800000, mailbox_address[39:32]},8'hff);
123// printf("MAQ-Debug : setRxDmaCfig_1_1 Addr = 64'h200000a00, Data = %h \n ", {32'h0000_0000, 24'h800000, mailbox_address[39:32]});
124 data_tmp1 = {32'h0000_0000, 24'h800000, mailbox_address[39:32]};
125 Rdata1 = {data_tmp1[7:0],data_tmp1[15:8],data_tmp1[23:16],data_tmp1[31:24],data_tmp1[39:32],data_tmp1[47:40],data_tmp1[55:48],data_tmp1[63:56]};
126 SparseMem.WriteMem(64'hc100000a00, Rdata1,8'hff);
127 printf("MAQ-Debug : setRxDmaCfig_1_1 Addr = 64'hc100000a00, Data = %h \n ", {32'h0000_0000, 24'h800000, mailbox_address[39:32]});
128 printf("MAQ-Debug : setRxDmaCfig_1_1 Addr = 64'hc100000a00, Data(Rdata) = %h \n ", Rdata1);
129
130 memArray_addr = 64'hc100000a00;
131 be = 8'hff;
132 gMem.writeBM (memArray_addr[63:0], {32'h0000_0000, 24'h800000, mailbox_address[39:32]}, be);
133 printf("KHH-Debug : gMem.WriteBM setRxDmaCfig_1_1 Addr = 64'hc100000a00, Data = %h \n ", {32'h0000_0000, 24'h800000, mailbox_address[39:32]});
134 */
135}
136
137
138task Fc_Niu_Ev2a_setRxDmaCfig_2 (bit [63:0] data)
139{
140 Fc_Niu_Ev2a_write1(data, NIU_PKTGEN_CSR_EV2A_RXDMA_CFIG2,
141 "RXDMA_CFIG2_START");
142 /*
143 bit [7:0] be = 8'hff;
144 bit [63:0] memArray_addr;
145 bit [63:0] data_tmp0;
146 bit [63:0] Rdata0;
147
148// SparseMem.WriteMem(64'h200000900, {32'h0000_0000, mailbox_address[31:6], 6'h00},8'hff);
149// printf("MAQ-Debug : RXDMA_CFIG2_START Addr = 64'h200000900, Data = %h \n ", {32'h0000_0000, mailbox_address[31:6], 6'h00} );
150 data_tmp0 = {32'h0000_0000, mailbox_address[31:6], 6'h00};
151 Rdata0 = {data_tmp0[7:0],data_tmp0[15:8],data_tmp0[23:16],data_tmp0[31:24],data_tmp0[39:32],data_tmp0[47:40],data_tmp0[55:48],data_tmp0[63:56]};
152 SparseMem.WriteMem(64'hc100000900, Rdata0,8'hff);
153 printf("MAQ-Debug : RXDMA_CFIG2_START Addr = 64'hc100000900, Data = %h \n ", {32'h0000_0000, mailbox_address[31:6], 6'h00} );
154 printf("MAQ-Debug : RXDMA_CFIG2_START Addr = 64'hc100000900, Data(Rdata) = %h \n ", Rdata0 );
155
156 memArray_addr = 64'hc100000900;
157 be = 8'hff;
158 gMem.writeBM (memArray_addr[63:0], {32'h0000_0000, mailbox_address[31:6], 6'h00}, be);
159 printf("KHH-Debug : gMem.WriteBM RXDMA_CFIG2_START Addr = 64'hc100000900, Data = %h \n ", {32'h0000_0000, mailbox_address[31:6], 6'h00});
160 */
161}
162
163
164task Fc_Niu_Ev2a_SetPage0Registers (bit [31:0] mask,
165 bit [31:0] value,
166 bit [31:0] reloc)
167{
168 Fc_Niu_Ev2a_write1({32'h0,mask}, NIU_PKTGEN_CSR_EV2A_RX_LOG_MASK1,
169 "RX_LOG_MASK1_START");
170 Fc_Niu_Ev2a_write1({32'h0,value}, NIU_PKTGEN_CSR_EV2A_RX_LOG_VAL1,
171 "RX_LOG_VAL1_START");
172 Fc_Niu_Ev2a_write1({32'h0,reloc}, NIU_PKTGEN_CSR_EV2A_RX_LOG_RELO1,
173 "RX_LOG_RELO1_START");
174 /*
175 bit [7:0] be = 8'hff;
176 bit [63:0] memArray_addr;
177 bit [63:0] Rdata0;
178 bit [63:0] Rdata1;
179 bit [63:0] Rdata2;
180 bit [63:0] data_tmp0;
181 bit [63:0] data_tmp1;
182 bit [63:0] data_tmp2;
183
184// SparseMem.WriteMem(64'h200000100, {32'h0,mask},8'hff);
185// SparseMem.WriteMem(64'h200000200, {32'h0,value},8'hff);
186// SparseMem.WriteMem(64'h200000300, {32'h0,reloc},8'hff);
187// printf("MAQ-Debug : RX_LOG_MASK1_START Addr = 64'h200000100, Data = %h \n ", {32'h0,mask} );
188// printf("MAQ-Debug : RX_LOG_VAL1_START Addr = 64'h200000100, Data = %h \n ", {32'h0,value} );
189// printf("MAQ-Debug : RX_LOG_RELO1_START Addr = 64'h200000100, Data = %h \n ", {32'h0,reloc} );
190 data_tmp0 = {32'h0,mask};
191 data_tmp1 = {32'h0,value};
192 data_tmp2 = {32'h0,reloc};
193 Rdata0 = {data_tmp0[7:0],data_tmp0[15:8],data_tmp0[23:16],data_tmp0[31:24],data_tmp0[39:32],data_tmp0[47:40],data_tmp0[55:48],data_tmp0[63:56]};
194 Rdata1 = {data_tmp1[7:0],data_tmp1[15:8],data_tmp1[23:16],data_tmp1[31:24],data_tmp1[39:32],data_tmp1[47:40],data_tmp1[55:48],data_tmp1[63:56]};
195 Rdata2 = {data_tmp2[7:0],data_tmp2[15:8],data_tmp2[23:16],data_tmp2[31:24],data_tmp2[39:32],data_tmp2[47:40],data_tmp2[55:48],data_tmp2[63:56]};
196 SparseMem.WriteMem(64'hc100000100, Rdata0,8'hff);
197 SparseMem.WriteMem(64'hc100000200, Rdata1,8'hff);
198 SparseMem.WriteMem(64'hc100000300, Rdata2,8'hff);
199 printf("MAQ-Debug : RX_LOG_MASK1_START Addr = 64'hc100000100, Data = %h \n ", {32'h0,mask} );
200 printf("MAQ-Debug : RX_LOG_VAL1_START Addr = 64'hc100000200, Data = %h \n ", {32'h0,value} );
201 printf("MAQ-Debug : RX_LOG_RELO1_START Addr = 64'hc100000300, Data = %h \n ", {32'h0,reloc} );
202 printf("MAQ-Debug : RX_LOG_MASK1_START Addr = 64'hc100000100, Data(Rdata) = %h \n ", Rdata0 );
203 printf("MAQ-Debug : RX_LOG_VAL1_START Addr = 64'hc100000200, Data(Rdata) = %h \n ", Rdata1 );
204 printf("MAQ-Debug : RX_LOG_RELO1_START Addr = 64'hc100000300, Data(Rdata) = %h \n ", Rdata2 );
205
206 memArray_addr = 64'hc100000100;
207 be = 8'hff;
208 gMem.writeBM (memArray_addr[63:0], {32'h0,mask}, be);
209
210 memArray_addr = 64'hc100000200;
211 gMem.writeBM (memArray_addr[63:0], {32'h0,value}, be);
212
213 memArray_addr = 64'hc100000300;
214 gMem.writeBM (memArray_addr[63:0], {32'h0,reloc}, be);
215 printf("KHH-Debug : gMem.WriteBM RX_LOG_MASK1_START Addr = 64'hc100000100, Data = %h \n ", {32'h0,mask});
216 printf("KHH-Debug : gMem.WriteBM RX_LOG_VAL1_START Addr = 64'hc100000200, Data = %h \n ", {32'h0,value});
217 printf("KHH-Debug : gMem.WriteBM RX_LOG_RELO1_START Addr = 64'hc100000300, Data = %h \n ", {32'h0,reloc});
218 */
219}
220
221
222task Fc_Niu_Ev2a_SetPage1Registers (bit [31:0] mask,
223 bit [31:0] value,
224 bit [31:0] reloc)
225{
226 Fc_Niu_Ev2a_write1({32'h0,mask}, NIU_PKTGEN_CSR_EV2A_RX_LOG_MASK2,
227 "RX_LOG_MASK2_START");
228 Fc_Niu_Ev2a_write1({32'h0,value}, NIU_PKTGEN_CSR_EV2A_RX_LOG_VAL2,
229 "RX_LOG_VAL2_START");
230 Fc_Niu_Ev2a_write1({32'h0,reloc}, NIU_PKTGEN_CSR_EV2A_RX_LOG_RELO2,
231 "RX_LOG_RELO2_START");
232 /*
233 bit [63:0] memArray_addr;
234 bit [7:0] be = 8'hff;
235 bit [63:0] Rdata0;
236 bit [63:0] Rdata1;
237 bit [63:0] Rdata2;
238 bit [63:0] data_tmp0;
239 bit [63:0] data_tmp1;
240 bit [63:0] data_tmp2;
241
242// SparseMem.WriteMem(64'h200000c00, {32'h0,mask},8'hff);
243// SparseMem.WriteMem(64'h200000d00, {32'h0,value},8'hff);
244// SparseMem.WriteMem(64'h200000e00, {32'h0,reloc},8'hff);
245// printf("MAQ-Debug : RX_LOG_MASK2_START Addr = 64'h200000c00, Data = %h \n ", {32'h0,mask} );
246// printf("MAQ-Debug : RX_LOG_VAL2_START Addr = 64'h200000d00, Data = %h \n ", {32'h0,value} );
247// printf("MAQ-Debug : RX_LOG_RELO2_START Addr = 64'h200000e00, Data = %h \n ", {32'h0,reloc} );
248 data_tmp0 = {32'h0,mask};
249 data_tmp1 = {32'h0,value};
250 data_tmp2 = {32'h0,reloc};
251 Rdata0 = {data_tmp0[7:0],data_tmp0[15:8],data_tmp0[23:16],data_tmp0[31:24],data_tmp0[39:32],data_tmp0[47:40],data_tmp0[55:48],data_tmp0[63:56]};
252 Rdata1 = {data_tmp1[7:0],data_tmp1[15:8],data_tmp1[23:16],data_tmp1[31:24],data_tmp1[39:32],data_tmp1[47:40],data_tmp1[55:48],data_tmp1[63:56]};
253 Rdata2 = {data_tmp2[7:0],data_tmp2[15:8],data_tmp2[23:16],data_tmp2[31:24],data_tmp2[39:32],data_tmp2[47:40],data_tmp2[55:48],data_tmp2[63:56]};
254 SparseMem.WriteMem(64'hc100000c00, Rdata0,8'hff);
255 SparseMem.WriteMem(64'hc100000d00, Rdata1,8'hff);
256 SparseMem.WriteMem(64'hc100000e00, Rdata2,8'hff);
257 printf("MAQ-Debug : RX_LOG_MASK2_START Addr = 64'hc100000c00, Data = %h \n ", {32'h0,mask} );
258 printf("MAQ-Debug : RX_LOG_VAL2_START Addr = 64'hc100000d00, Data = %h \n ", {32'h0,value} );
259 printf("MAQ-Debug : RX_LOG_RELO2_START Addr = 64'hc100000e00, Data = %h \n ", {32'h0,reloc} );
260 printf("MAQ-Debug : RX_LOG_MASK2_START Addr = 64'hc100000c00, Data(Rdata) = %h \n ", Rdata0 );
261 printf("MAQ-Debug : RX_LOG_VAL2_START Addr = 64'hc100000d00, Data(Rdata) = %h \n ", Rdata1 );
262 printf("MAQ-Debug : RX_LOG_RELO2_START Addr = 64'hc100000e00, Data(Rdata) = %h \n ", Rdata2 );
263
264 memArray_addr = 64'hc100000c00;
265 be = 8'hff;
266 gMem.writeBM (memArray_addr[63:0], {32'h0,mask}, be);
267
268 memArray_addr = 64'hc100000d00;
269 gMem.writeBM (memArray_addr[63:0], {32'h0,value}, be);
270
271 memArray_addr = 64'hc100000e00;
272 gMem.writeBM (memArray_addr[63:0], {32'h0,reloc}, be);
273 printf("KHH-Debug : gMem.WriteBM RX_LOG_MASK2_START Addr = 64'hc100000c00, Data = %h \n ", {32'h0,mask});
274 printf("KHH-Debug : gMem.WriteBM RX_LOG_VAL2_START Addr = 64'hc100000d00, Data = %h \n ", {32'h0,value});
275 printf("KHH-Debug : gMem.WriteBM RX_LOG_RELO2_START Addr = 64'hc100000e00, Data = %h \n ", {32'h0,reloc});
276 */
277}
278
279
280task Fc_Niu_Ev2a_setRxLogPgVld (bit [63:0] data)
281{
282 Fc_Niu_Ev2a_write1(data, NIU_PKTGEN_CSR_EV2A_RX_LOG_PAGE_VLD,
283 "RX_LOG_PAGE_VLD");
284 /*
285 bit [63:0] Rdata0;
286 bit [63:0] data_tmp0;
287 bit [63:0] memArray_addr;
288 bit [7:0] be = 8'hff;
289
290// SparseMem.WriteMem(64'h200000400, data,8'hff);
291// printf("MAQ-Debug : RX_LOG_PAGE_VLD Addr = 64'h200000400, Data = %h \n ", data );
292 data_tmp0 = data;
293 Rdata0 = {data_tmp0[7:0],data_tmp0[15:8],data_tmp0[23:16],data_tmp0[31:24],data_tmp0[39:32],data_tmp0[47:40],data_tmp0[55:48],data_tmp0[63:56]};
294 SparseMem.WriteMem(64'hc100000400, Rdata0,8'hff);
295 printf("MAQ-Debug : RX_LOG_PAGE_VLD Addr = 64'hc100000400, Data = %h \n ", data );
296 printf("MAQ-Debug : RX_LOG_PAGE_VLD Addr = 64'hc100000400, Data(Rdata) = %h \n ", Rdata0 );
297
298 memArray_addr = 64'hc100000400;
299 be = 8'hff;
300 gMem.writeBM (memArray_addr[63:0], data, be);
301 printf("KHH-Debug : gMem.WriteBM RX_LOG_PAGE_VLD Addr = 64'hc100000400, Data = %h \n ", data);
302 */
303}
304
305
306task Fc_Niu_Ev2a_setRbrConfig_A (bit [63:0] data)
307{
308 Fc_Niu_Ev2a_write1(data, NIU_PKTGEN_CSR_EV2A_RBR_CFIG_A,
309 "setRbrConfig_A");
310 /*
311 bit [63:0] Rdata0;
312 bit [63:0] data_tmp0;
313 bit [63:0] memArray_addr;
314 bit [7:0] be = 8'hff;
315
316// SparseMem.WriteMem(64'h200000500, config_rbr_data1,8'hff);
317// printf("MAQ-Debug : setRbrConfig_A Addr = 64'h200000500, Data = %h \n ", config_rbr_data1 );
318 data_tmp0 = config_rbr_data1;
319 Rdata0 = {data_tmp0[7:0],data_tmp0[15:8],data_tmp0[23:16],data_tmp0[31:24],data_tmp0[39:32],data_tmp0[47:40],data_tmp0[55:48],data_tmp0[63:56]};
320 SparseMem.WriteMem(64'hc100000500, Rdata0,8'hff);
321 printf("MAQ-Debug : setRbrConfig_A Addr = 64'hc100000500, Data = %h \n ", config_rbr_data1 );
322 printf("MAQ-Debug : setRbrConfig_A Addr = 64'hc100000500, Data(Rdata) = %h \n ", Rdata0 );
323
324// peutest.env.N2fcWrMem(64'hc100000500, config_rbr_data1[31:0],8'hf);
325// printf("KHH-Debug : setRbrConfig_A Addr = 64'hc100000500, Data = %h \n ", config_rbr_data1[31:0]);
326// peutest.env.N2fcWrMem(64'hc100000504, config_rbr_data1[63:32],8'hf);
327// printf("KHH-Debug : setRbrConfig_A Addr = 64'hc100000504, Data = %h \n ", config_rbr_data1[63:32]);
328
329// SparseMem.WriteMem(64'hc100000500, config_rbr_data1,8'hff);
330// printf("MAQ-Debug : setRbrConfig_A Addr = 64'hc100000500, Data = %h \n ", config_rbr_data1 );
331
332 memArray_addr = 64'hc100000500;
333 be = 8'hff;
334 gMem.writeBM (memArray_addr[63:0], config_rbr_data1, be);
335 printf("KHH-Debug : gMem.WriteBM setRbrConfig_A Addr = 64'hc100000500, Data = %h \n ", config_rbr_data1[31:0]);
336 */
337}
338
339
340task Fc_Niu_Ev2a_setRbrConfig_B (bit [63:0] data)
341{
342 Fc_Niu_Ev2a_write1(data, NIU_PKTGEN_CSR_EV2A_RBR_CFIG_B,
343 "setRbrConfig_B");
344 /*
345 bit [63:0] Rdata0;
346 bit [63:0] data_tmp0;
347 bit [63:0] memArray_addr;
348 bit [7:0] be = 8'hff;
349
350// SparseMem.WriteMem(64'h200000600, data,8'hff);
351// printf("MAQ-Debug : setRbrConfig_B Addr = 64'h200000600, Data = %h \n ", data );
352 data_tmp0 = data;
353 Rdata0 = {data_tmp0[7:0],data_tmp0[15:8],data_tmp0[23:16],data_tmp0[31:24],data_tmp0[39:32],data_tmp0[47:40],data_tmp0[55:48],data_tmp0[63:56]};
354 SparseMem.WriteMem(64'hc100000600, Rdata0,8'hff);
355 printf("MAQ-Debug : setRbrConfig_B Addr = 64'hc100000600, Data = %h \n ", data );
356 printf("MAQ-Debug : setRbrConfig_B Addr = 64'hc100000600, Data(Rdata) = %h \n ", Rdata0 );
357
358 memArray_addr = 64'hc100000600;
359 be = 8'hff;
360 gMem.writeBM (memArray_addr[63:0], data, be);
361 printf("KHH-Debug : gMem.WriteBM setRbrConfig_B Addr = 64'hc100000600, Data = %h \n ", data);
362 */
363}
364
365
366task Fc_Niu_Ev2a_setRxRingKick (bit [63:0] data)
367{
368 Fc_Niu_Ev2a_write1(data, NIU_PKTGEN_CSR_EV2A_RBR_KICK,
369 "setRxRingKick");
370 /*
371 bit [63:0] memArray_addr;
372 bit [63:0] Rdata0;
373 bit [63:0] data_tmp0;
374 bit [7:0] be = 8'hff;
375
376// SparseMem.WriteMem(64'h200000b00, data,8'hff);
377// printf("MAQ-Debug : setRxRingKick Addr = 64'h200000b00, Data = %h \n ", data );
378 data_tmp0 = data;
379 Rdata0 = {data_tmp0[7:0],data_tmp0[15:8],data_tmp0[23:16],data_tmp0[31:24],data_tmp0[39:32],data_tmp0[47:40],data_tmp0[55:48],data_tmp0[63:56]};
380 SparseMem.WriteMem(64'hc100000b00, Rdata0,8'hff);
381 printf("MAQ-Debug : setRxRingKick Addr = 64'hc100000b00, Data = %h \n ", data );
382 printf("MAQ-Debug : setRxRingKick Addr = 64'hc100000b00, Data(Rdata) = %h \n ", Rdata0 );
383
384 memArray_addr = 64'hc100000b00;
385 be = 8'hff;
386 gMem.writeBM (memArray_addr[63:0], data, be);
387 printf("KHH-Debug : gMem.WriteBM setRxRingKick Addr = 64'hc100000b00, Data = %h \n ", data);
388 */
389}
390
391
392task Fc_Niu_Ev2a_setRcrConfig_A (bit [63:0] data)
393{
394 Fc_Niu_Ev2a_write1(data, NIU_PKTGEN_CSR_EV2A_RCR_CFIG_A,
395 "setRcrConfig_A");
396 /*
397 bit[63:0] Rdata0;
398 bit[63:0] data_tmp0;
399 bit [63:0] memArray_addr;
400 bit [7:0] be = 8'hff;
401
402// SparseMem.WriteMem(64'h200000700, data,8'hff);
403// printf("MAQ-Debug : setRcrConfig_A Addr = 64'h200000700, Data = %h \n ", data );
404 data_tmp0 = data;
405 Rdata0 = {data_tmp0[7:0],data_tmp0[15:8],data_tmp0[23:16],data_tmp0[31:24],data_tmp0[39:32],data_tmp0[47:40],data_tmp0[55:48],data_tmp0[63:56]};
406 SparseMem.WriteMem(64'hc100000700, Rdata0,8'hff);
407 printf("MAQ-Debug : setRcrConfig_A Addr = 64'hc100000700, Data = %h \n ", data );
408 printf("MAQ-Debug : setRcrConfig_A Addr = 64'hc100000700, Data(Rdata) = %h \n ", Rdata0 );
409
410 memArray_addr = 64'hc100000700;
411 be = 8'hff;
412 gMem.writeBM (memArray_addr[63:0], data, be);
413 printf("KHH-Debug : gMem.WriteBM setRcrConfig_A Addr = 64'hc100000700, Data = %h \n ", data);
414 */
415}
416
417
418////////////////////////////////////////////////////////////////////////////
419////////////////////////////////////////////////////////////////////////////
420
421task Fc_Niu_Ev2a_setTxRingConfig (bit [63:0] data)
422{
423 Fc_Niu_Ev2a_write1(data, NIU_PKTGEN_CSR_EV2A_TX_RNG_CFIG,
424 "setTxRingConfig");
425 /*
426 bit [63:0] data_tmp0;
427 bit [63:0] Rdata0;
428 bit [63:0] memArray_addr;
429 bit [7:0] be = 8'hff;
430
431 data_tmp0 = data;
432 Rdata0 = {data_tmp0[7:0],data_tmp0[15:8],data_tmp0[23:16],data_tmp0[31:24],data_tmp0[39:32],data_tmp0[47:40],data_tmp0[55:48],data_tmp0[63:56]};
433// SparseMem.WriteMem(64'h100000000, config_data,8'hff);
434 SparseMem.WriteMem(64'hc100001000, Rdata0,8'hff);
435 printf("MAQ-Debug : setTxRingConfig Addr = 64'hc100001000, Data = %h \n ", data );
436 printf("MAQ-Debug : setTxRingConfig Addr = 64'hc100001000, Data(Rdata) = %h \n ", Rdata0);
437
438 memArray_addr = 64'hc100001000;
439 be = 8'hff;
440 gMem.writeBM (memArray_addr[63:0], data, be);
441 printf("KHH-Debug : gMem.WriteBM setTxRingConfig Addr = 64'hc100001000, Data = %h \n ", config_data);
442 */
443}
444
445
446task Fc_Niu_Ev2a_setTxRingKick (bit [63:0] data)
447{
448 Fc_Niu_Ev2a_write1(data, NIU_PKTGEN_CSR_EV2A_TX_RNG_KICK,
449 "setTxRingKick");
450 /*
451 bit [63:0] data_tmp0;
452 bit [63:0] Rdata0;
453 bit [63:0] memArray_addr;
454 bit [7:0] be = 8'hff;
455
456// Write the Kick data for Core to program
457 data_tmp0 = ac_data;
458 Rdata0 = {data_tmp0[7:0],data_tmp0[15:8],data_tmp0[23:16],data_tmp0[31:24],data_tmp0[39:32],data_tmp0[47:40],data_tmp0[55:48],data_tmp0[63:56]};
459// SparseMem.WriteMem(64'h100000100, ac_data,8'hff);
460 SparseMem.WriteMem(64'hc100001100, Rdata0,8'hff);
461 printf("MAQ-Debug : setTxRingKick Addr = 64'hc100001100, Data = %h \n ", ac_data );
462 printf("MAQ-Debug : setTxRingKick Addr = 64'hc100001100, Data(Rdata) = %h \n ", Rdata0);
463
464 memArray_addr = 64'hc100001100;
465 be = 8'hff;
466 gMem.writeBM (memArray_addr[63:0], ac_data, be);
467 printf("KHH-Debug : gMem.WriteBM setTxRingKick = 64'hc100001100, Data = %h \n ", ac_data);
468 */
469}
470
471
472task Fc_Niu_Ev2a_SetTxLPValid (bit [63:0] data)
473{
474 Fc_Niu_Ev2a_write1(data, NIU_PKTGEN_CSR_EV2A_TX_LOG_PAGE_VLD,
475 "SetTxLPValid");
476 /*
477 bit [63:0] data_tmp0;
478 bit [63:0] Rdata0;
479 bit [63:0] memArray_addr;
480 bit [7:0] be = 8'hff;
481
482 data_tmp0 = data;
483 Rdata0 = {data_tmp0[7:0],data_tmp0[15:8],data_tmp0[23:16],data_tmp0[31:24],data_tmp0[39:32],data_tmp0[47:40],data_tmp0[55:48],data_tmp0[63:56]};
484// SparseMem.WriteMem(64'h100000800, data,8'hff);
485 SparseMem.WriteMem(64'hc100001800, Rdata0,8'hff);
486 printf("MAQ-Debug : SetTxLPValid Addr = 64'hc100001800, Data = %h \n ", data );
487 printf("MAQ-Debug : SetTxLPValid Addr = 64'hc100001800, Data(Rdata) = %h \n ", Rdata0);
488
489 memArray_addr = 64'hc100001800;
490 be = 8'hff;
491 gMem.writeBM (memArray_addr[63:0], data, be);
492 printf("KHH-Debug : gMem.WriteBM SetTxLPValid = 64'hc100001800, Data = %h \n ", data);
493 */
494}
495
496
497task Fc_Niu_Ev2a_SetTxLPMask1 (bit [63:0] data)
498{
499 Fc_Niu_Ev2a_write1(data, NIU_PKTGEN_CSR_EV2A_TX_LOG_MASK1,
500 "SetTxLPMask1");
501 /*
502 bit [63:0] data_tmp0;
503 bit [63:0] Rdata0;
504 bit [63:0] memArray_addr;
505 bit [7:0] be = 8'hff;
506
507 data_tmp0 = data;
508 Rdata0 = {data_tmp0[7:0],data_tmp0[15:8],data_tmp0[23:16],data_tmp0[31:24],data_tmp0[39:32],data_tmp0[47:40],data_tmp0[55:48],data_tmp0[63:56]};
509// SparseMem.WriteMem(64'h100000200, data,8'hff);
510 SparseMem.WriteMem(64'hc100001200, Rdata0,8'hff);
511 printf("MAQ-Debug : SetTxLPMask1 Addr = 64'hc100001200, Data = %h \n ", data );
512 printf("MAQ-Debug : SetTxLPMask1 Addr = 64'hc100001200, Data(Rdata) = %h \n ", Rdata0);
513
514 memArray_addr = 64'hc100001200;
515 be = 8'hff;
516 gMem.writeBM (memArray_addr[63:0], data, be);
517 printf("KHH-Debug : gMem.WriteBM SetTxLPMask1 = 64'hc100001200, Data = %h \n ", data);
518 */
519}
520
521
522task Fc_Niu_Ev2a_SetTxLPValue1 (bit [63:0] data)
523{
524 Fc_Niu_Ev2a_write1(data, NIU_PKTGEN_CSR_EV2A_TX_LOG_VALUE1,
525 "SetTxLPValue1");
526 /*
527 bit [63:0] data_tmp0;
528 bit [63:0] Rdata0;
529 bit [63:0] memArray_addr;
530 bit [7:0] be = 8'hff;
531
532 data_tmp0 = data;
533 Rdata0 = {data_tmp0[7:0],data_tmp0[15:8],data_tmp0[23:16],data_tmp0[31:24],data_tmp0[39:32],data_tmp0[47:40],data_tmp0[55:48],data_tmp0[63:56]};
534// SparseMem.WriteMem(64'h100000300, data,8'hff);
535 SparseMem.WriteMem(64'hc100001300, Rdata0,8'hff);
536 printf("MAQ-Debug : SetTxLPValue1 Addr = 64'hc100001300, Data = %h \n ", data );
537 printf("MAQ-Debug : SetTxLPValue1 Addr = 64'hc100001300, Data(Rdata) = %h \n ", Rdata0);
538
539 memArray_addr = 64'hc100001300;
540 be = 8'hff;
541 gMem.writeBM (memArray_addr[63:0], data, be);
542 printf("KHH-Debug : gMem.WriteBM SetTxLPValue1 = 64'hc100001300, Data = %h \n ", data);
543 */
544}
545
546
547task Fc_Niu_Ev2a_SetTxLPMask2 (bit [63:0] data)
548{
549 Fc_Niu_Ev2a_write1(data, NIU_PKTGEN_CSR_EV2A_TX_LOG_MASK2,
550 "SetTxLPMask2");
551 /*
552 bit [63:0] data_tmp0;
553 bit [63:0] Rdata0;
554 bit [63:0] memArray_addr;
555 bit [7:0] be = 8'hff;
556
557 data_tmp0 = data;
558 Rdata0 = {data_tmp0[7:0],data_tmp0[15:8],data_tmp0[23:16],data_tmp0[31:24],data_tmp0[39:32],data_tmp0[47:40],data_tmp0[55:48],data_tmp0[63:56]};
559// SparseMem.WriteMem(64'h100000500, data,8'hff);
560 SparseMem.WriteMem(64'hc100001500, Rdata0,8'hff);
561 printf("MAQ-Debug : SetTxLPMask2 Addr = 64'hc100001500, Data = %h \n ", data );
562 printf("MAQ-Debug : SetTxLPMask2 Addr = 64'hc100001500, Data(Rdata) = %h \n ", Rdata0);
563
564 memArray_addr = 64'hc100001500;
565 be = 8'hff;
566 gMem.writeBM (memArray_addr[63:0], data, be);
567 printf("KHH-Debug : gMem.WriteBM SetTxLPMask2 = 64'hc100001500, Data = %h \n ", data);
568 */
569}
570
571
572task Fc_Niu_Ev2a_SetTxLPValue2 (bit [63:0] data)
573{
574 Fc_Niu_Ev2a_write1(data, NIU_PKTGEN_CSR_EV2A_TX_LOG_VALUE2,
575 "SetTxLPValue2");
576 /*
577 bit [63:0] data_tmp0;
578 bit [63:0] Rdata0;
579 bit [63:0] memArray_addr;
580 bit [7:0] be = 8'hff;
581
582 data_tmp0 = data;
583 Rdata0 = {data_tmp0[7:0],data_tmp0[15:8],data_tmp0[23:16],data_tmp0[31:24],data_tmp0[39:32],data_tmp0[47:40],data_tmp0[55:48],data_tmp0[63:56]};
584// SparseMem.WriteMem(64'h100000600, data,8'hff);
585 SparseMem.WriteMem(64'hc100001600, Rdata0,8'hff);
586 printf("MAQ-Debug : SetTxLPValue2 Addr = 64'hc100001600, Data = %h \n ", data );
587 printf("MAQ-Debug : SetTxLPValue2 Addr = 64'hc100001600, Data(Rdata) = %h \n ", Rdata0);
588
589 memArray_addr = 64'hc100001600;
590 be = 8'hff;
591 gMem.writeBM (memArray_addr[63:0], data, be);
592 printf("KHH-Debug : gMem.WriteBM SetTxLPValue2 = 64'hc100001600, Data = %h \n ", data);
593 */
594}
595
596
597task Fc_Niu_Ev2a_SetTxLPRELOC1 (bit [63:0] data)
598{
599 Fc_Niu_Ev2a_write1(data, NIU_PKTGEN_CSR_EV2A_TX_LOG_PAGE_RELO1,
600 "SetTxLPRELOC1");
601 /*
602 bit [63:0] data_tmp0;
603 bit [63:0] Rdata0;
604 bit [63:0] memArray_addr;
605 bit [7:0] be = 8'hff;
606
607 data_tmp0 = data;
608 Rdata0 = {data_tmp0[7:0],data_tmp0[15:8],data_tmp0[23:16],data_tmp0[31:24],data_tmp0[39:32],data_tmp0[47:40],data_tmp0[55:48],data_tmp0[63:56]};
609// SparseMem.WriteMem(64'h100000400, data,8'hff);
610 SparseMem.WriteMem(64'hc100001400, Rdata0,8'hff);
611 printf("MAQ-Debug : SetTxLPRELOC1 Addr = 64'hc100001400, Data = %h \n ", data );
612 printf("MAQ-Debug : SetTxLPRELOC1 Addr = 64'hc100001400, Data(Rdata) = %h \n ", Rdata0);
613
614 memArray_addr = 64'hc100001400;
615 be = 8'hff;
616 gMem.writeBM (memArray_addr[63:0], data, be);
617 printf("KHH-Debug : gMem.WriteBM SetTxLPRELOC1 = 64'hc100001400, Data = %h \n ", data);
618 */
619}
620
621
622task Fc_Niu_Ev2a_SetTxLPRELOC2 (bit [63:0] data)
623{
624 Fc_Niu_Ev2a_write1(data, NIU_PKTGEN_CSR_EV2A_TX_LOG_PAGE_RELO2,
625 "SetTxLPRELOC2");
626 /*
627 bit [63:0] data_tmp0;
628 bit [63:0] Rdata0;
629 bit [63:0] memArray_addr;
630 bit [7:0] be = 8'hff;
631
632 data_tmp0 = data;
633 Rdata0 = {data_tmp0[7:0],data_tmp0[15:8],data_tmp0[23:16],data_tmp0[31:24],data_tmp0[39:32],data_tmp0[47:40],data_tmp0[55:48],data_tmp0[63:56]};
634// SparseMem.WriteMem(64'h100000700, data,8'hff);
635 SparseMem.WriteMem(64'hc100001700, Rdata0,8'hff);
636 printf("MAQ-Debug : SetTxLPRELOC2 Addr = 64'hc100001700, Data = %h \n ", data );
637 printf("MAQ-Debug : SetTxLPRELOC2 Addr = 64'hc100001700, Data(Rdata) = %h \n ", Rdata0);
638
639 memArray_addr = 64'hc100001700;
640 be = 8'hff;
641 gMem.writeBM (memArray_addr[63:0], data, be);
642 printf("KHH-Debug : gMem.WriteBM SetTxLPRELOC2 = 64'hc100001700, Data = %h \n ", data);
643 */
644}
Full OpenSPARC design & verification tarball including full HDL.