Initial commit of OpenSPARC T2 design and verification files.

[OpenSPARC-T2-DV] / verif / env / fnx / vlib / DMUXtr / include / DMUXtrBinds.vri

// ========== Copyright Header Begin ==========================================
// 
// OpenSPARC T2 Processor File: DMUXtrBinds.vri
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// ========== Copyright Header End ============================================
#ifndef DMU_XTR_BINDS_VRI
#define DMU_XTR_BINDS_VRI

#include "DMUXtrPorts.vri"

bind po_DMUegress bindDMUegress {
  recd         ILU_EgressPEC.recd;     	  //k2y_rcd
  enq          ILU_EgressPEC.enq;	  //k2y_rcd_enq
  deq          ILU_EgressPEC.deq;         //y2k_rcd_deq 
  data         ILU_EgressData.data;       //k2y_buf_data
  par          ILU_EgressData.dpar;       //k2y_buf_dpar 
  addr         ILU_EgressData.addr;       //y2k_buf_addr
  relrcd       ILU_EgressRel.recd;        //y2k_rel_rcd
  relrcdenq    ILU_EgressRel.enq;         //y2k_rel_enq
  douvalid     ILU_EgressData.valid;	  //k2y_dou_vld
  douaddr      ILU_EgressData.valid_addr; //k2y_dou_dptr
  douerr       ILU_EgressData.valid_err;  //k2y_dou_err
}

bind po_DMUingress bindDMUingress {
  recd         ILU_IngressPEC.recd;     //y2k_rcd
  enq          ILU_IngressPEC.enq;	//y2k_rcd_enq
  deq          ILU_IngressPEC.deq;      //k2y_rcd_deq 
  data         ILU_IngressData.data;    //y2k_buf_data 
  par          ILU_IngressData.dpar;    //y2k_buf_dpar
  addr         ILU_IngressData.addr;    //k2y_buf_addr
  relrcd       ILU_IngressRel.recd;     //k2y_rel_rcd 
  relrcdenq    ILU_IngressRel.enq;      //k2y_rel_enq 
}
//// ILU connections only  fnx_dlc_ilu dmca_dmc_core_dlc_ilu(
//.y2k_dbg_a(y2k_dbg_a),
//.y2k_dbg_b(y2k_dbg_b),
//.y2k_int_l(y2k_int_l),
//.y2k_mps(y2k_mps),
//
//.csr_ring_in(csr_ring_in),
//.csr_ring_out(dmca_peca_csr_ring),
//
////hw_fe Are these in FIRE? N2?
//.dmc_rbc_ilu_sp_erh_event0_hw_fe(dmc_rbc_ilu_sp_erh_event0_hw_fe),
//.dmc_rbc_ilu_sp_erh_event1_hw_fe(dmc_rbc_ilu_sp_erh_event1_hw_fe),
//.dmc_rbc_ilu_sp_erh_event2_hw_fe(dmc_rbc_ilu_sp_erh_event2_hw_fe),
//.dmc_rbc_ilu_sp_erh_event3_hw_fe(dmc_rbc_ilu_sp_erh_event3_hw_fe),
//
//.g2d_j_clk(g2d_j_clk),  iol2clk
//
//.j2d_rst_l(dmca_dmc_core_dmc_node_reset_l),
//.j2d_por_l(dmca_dmc_core_dmc_node_reset_l),
//.j2d_instance_id({n_4}),
//
//.k2y_buf_addr_vld_monitor(k2y_buf_addr_vld_monitor),
//.y2k_buf_addr_vld_monitor(y2k_buf_addr_vld_monitor),
//.k2y_buf_ce(k2y_buf_ce),
//.k2y_buf_ue(k2y_buf_ue),
//.k2y_dbg_sel_a(k2y_dbg_sel_a),
//.k2y_dbg_sel_b(k2y_dbg_sel_b),
#endif