Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / niu / vera / niu_pio / include / mac_defines.vri
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: mac_defines.vri
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
19// along with this program; if not, write to the Free Software
20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
23// choice is available it will apply instead, Sun elects to use only
24// the General Public License version 2 (GPLv2) at this time for any
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31// CA 95054 USA or visit www.sun.com if you need additional information or
32// have any questions.
33//
34// ========== Copyright Header End ============================================
35#define XMAC_TOTAL_REGS 310
36#define BMAC_TOTAL_REGS 113
37
38#define RX_MAC_RESET 64'h0000_0000_0000_0001
39#define TX_MAC_RESET 64'h0000_0000_0000_0002
40#define MAC_CONF_10 64'h0000_0000_0000_0004
41#define MAC_CONF_100 64'h0000_0000_0000_0008
42#define MAC_REG_VERIFY 64'h0000_0000_0000_0010
43#define MAC_ER_CK_EN 64'h0000_0000_0000_0020
44#define MAC_LOOPBACK 64'h0000_0000_0000_0040
45#define MAC_NOT_MUXED 64'h0000_0000_0000_0080
46#define MAC_NOT_PROM 64'h0000_0000_0000_0100
47#define MAC_NOT_PROM_GR 64'h0000_0000_0000_0200
48#define MAC_SHORT_PKT 64'h0000_0000_0000_0400
49#define MAC_RSVD_MTCST 64'h0000_0000_0000_0800
50#define MAC_INIT_ALL_REG \
51 64'h0000_0000_0000_1000
52#define MAC_CONF_1000 64'h0000_0000_0000_2000
53#define MAC_DIS_PAUSE 64'h0000_0000_0000_4000
54#define MAC_DONT_PASS_FC \
55 64'h0000_0000_0000_8000
56#define MAC_FORCE_MII 64'h0000_0000_0001_0000
57#define MAC_TX_CE 64'h0000_0000_0002_0000
58#define MAC_RX_CE 64'h0000_0000_0004_0000
59#define MAC_HALF_DPLX 64'h0000_0000_0008_0000
60#define MAC_EN_IPG0 64'h0000_0000_0010_0000
61#define MAC_CONF_10000 64'h0000_0000_0020_0000
62
63#define MI_DEBUG 64'h8000_0000_0000_0000
64
65
66#define MAC_DEF_ADDR0 48'h4eed_0add_1200
67#define MAC_DEF_ADDR1 48'h4eed_0add_1201
68#define MAC_DEF_ADDR2 48'h4eed_0add_1202
69#define MAC_DEF_ADDR3 48'h4eed_0add_1203
70#define MAC_DEF_ADDR4 48'h4eed_0add_1204
71#define MAC_DEF_ADDR5 48'h4eed_0add_1205
72#define MAC_DEF_ADDR6 48'h4eed_0add_1206
73#define MAC_DEF_ADDR7 48'h4eed_0add_1207
74#define MAC_DEF_ADDR8 48'h4eed_0add_1208
75#define MAC_DEF_ADDR9 48'h4eed_0add_1209
76#define MAC_DEF_ADDR10 48'h4eed_0add_2100
77#define MAC_DEF_ADDR11 48'h4eed_0add_2101
78#define MAC_DEF_ADDR12 48'h4eed_0add_2102
79#define MAC_DEF_ADDR13 48'h4eed_0add_2103
80#define MAC_DEF_ADDR14 48'h4eed_0add_2104
81#define MAC_DEF_ADDR15 48'h4eed_0add_2105
82#define MAC_DEF_ADDR16 48'h4eed_0add_2106
83#define MAC_DEF_ADDR17 48'h4eed_0add_2107
84#define MAC_DEF_ADDR18 48'h4eed_0add_2108
85#define MAC_FC_ADDR 48'h01_80_c2_00_00_01
86
87
88//
89// FAKE OPP/MAC
90//
91#define OMF_MAC_GEN_CRC 16'h0001
92#define OMF_CRC_ERR 16'h0002
93#define OMF_SA_REPL 16'h0004
94