projects / OpenSPARC-T2-DV / blame
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1 | // ========== Copyright Header Begin ========================================== |
| 2 | // | |
| 3 | // OpenSPARC T2 Processor File: vega_memory_map.vri | |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
| 6 | // | |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
| 8 | // | |
| 9 | // This program is free software; you can redistribute it and/or modify | |
| 10 | // it under the terms of the GNU General Public License as published by | |
| 11 | // the Free Software Foundation; version 2 of the License. | |
| 12 | // | |
| 13 | // This program is distributed in the hope that it will be useful, | |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | // GNU General Public License for more details. | |
| 17 | // | |
| 18 | // You should have received a copy of the GNU General Public License | |
| 19 | // along with this program; if not, write to the Free Software | |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 21 | // | |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license | |
| 23 | // choice is available it will apply instead, Sun elects to use only | |
| 24 | // the General Public License version 2 (GPLv2) at this time for any | |
| 25 | // software where a choice of GPL license versions is made | |
| 26 | // available with the language indicating that GPLv2 or any later version | |
| 27 | // may be used, or where a choice of which version of the GPL is applied is | |
| 28 | // otherwise unspecified. | |
| 29 | // | |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
| 32 | // have any questions. | |
| 33 | // | |
| 34 | // ========== Copyright Header End ============================================ | |
| 35 | #define ADDRESS_RANGE_MASK 32'h01FF_0000 | |
| 36 | ||
| 37 | /* MAC BLOCK: 0x0C_0000 - 0x0C_FFFF */ | |
| 38 | #define MAC_ADDRESS_RANGE 32'h001C_0000 | |
| 39 | #define MIF_ADDRESS_RANGE 32'h0103_0000 | |
| 40 | #define PCS_ADDRESS_RANGE 32'h0104_0000 | |
| 41 | ||
| 42 | /* HT BLOCK: | |
| 43 | hrp - 0x00_0000 - 0x00_0400 | |
| 44 | htp - 0x00_0000 - 0x00_0800 | |
| 45 | ht_int - 0x00_0000 - 0x00_0c00 */ | |
| 46 | #define HT_ADDRESS_RANGE 32'h0000_0000 | |
| 47 | #define HRP_ADDRESS_RANGE 32'h0000_0400 | |
| 48 | #define HTP_ADDRESS_RANGE 32'h0000_0800 | |
| 49 | ||
| 50 | /* NTX BLOCK: 0x02_0000 - 0x02_FFFF */ | |
| 51 | #define OPP_ADDRESS_RANGE 32'h0002_0000 | |
| 52 | ||
| 53 | /* NRX BLOCK: 0x01_0000 - 0x01_FFFF */ | |
| 54 | #define NRX_ADDRESS_RANGE 32'h0008_0000 | |
| 55 | #define IBTP_ADDRESS_RANGE 32'h0001_0000 | |
| 56 | #define LLTX_ADDRESS_RANGE 32'h0001_0000 | |
| 57 | #define BMC_ADDRESS_RANGE 32'h0001_0000 | |
| 58 | ||
| 59 | /* IRX BLOCK : 0x04_0000 - 0x07_FFFF */ | |
| 60 | #define IBRP_ADDRESS_RANGE 32'h0004_0000 | |
| 61 | ||
| 62 | /* FFL BLOCK: | |
| 63 | ffl - 0x10_0000 - 0x1F_FFFF */ | |
| 64 | #define FFL_ADDRESS_RANGE 32'h0010_0000 | |
| 65 | ||
| 66 | /* ILC BLOCK: 0x03_0000 - 0x03_FFFF */ | |
| 67 | #define ILC_ADDRESS_RANGE 32'h0003_0000 | |
| 68 | #define IBSE_ADDRESS_RANGE 32'h0101_0000 | |
| 69 | ||
| 70 | /* ITX BLOCK: 0x08_0000 - 0x0B_FFFF */ | |
| 71 | #define ITX_ADDRESS_RANGE 32'h0008_0000 | |
| 72 | ||
| 73 | ||
| 74 | /* Many address ranges are subdivided by port. | |
| 75 | For each port, there is an identical memory | |
| 76 | map. To determine the port subdivision, the | |
| 77 | original address is masked with PORT_RANGE_MASK. | |
| 78 | A compare-to register is initialized to zero. | |
| 79 | This compare-to register is compared to the | |
| 80 | result of masking the original address - a | |
| 81 | compare indicates port 0. The compare_to | |
| 82 | register is incremented by PORT_OFFSET | |
| 83 | to check for port 1. This process is repeated | |
| 84 | for each port. | |
| 85 | ||
| 86 | When using memory references associated with | |
| 87 | a particular port, add the offset of the port | |
| 88 | number to the base address: | |
| 89 | (XXX_STATUS_REG + port_num*PORT_OFFSET) | |
| 90 | ||
| 91 | The port range values are used by the pio fake | |
| 92 | module and the shadow space module. | |
| 93 | */ | |
| 94 | ||
| 95 | #define PORT_RANGE_MASK 32'h0000_F000 | |
| 96 | #define PORT_OFFSET 32'h0000_1000 | |
| 97 | #define PORT_0_RANGE 32'h0000_0000 | |
| 98 | #define XPCS_0_RANGE (32'h0000_1000 << 1) | |
| 99 | #define PCS_0_RANGE 32'h0000_2000 | |
| 100 | #define PORT_1_RANGE 32'h0000_3000 | |
| 101 | #define XPCS_1_RANGE 32'h0000_4000 | |
| 102 | #define PCS_1_RANGE 32'h0000_5000 | |
| 103 | #define PORT_2_RANGE 32'h0000_6000 | |
| 104 | #define PCS_2_RANGE 32'h0000_7000 | |
| 105 | #define PORT_3_RANGE 32'h0000_8000 | |
| 106 | #define PCS_3_RANGE 32'h0000_9000 | |
| 107 | #define ESER_RANGE 32'h0000_a000 | |
| 108 | ||
| 109 |