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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: meta_vco.vri | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | coverage_group meta_write_cov | |
36 | { | |
37 | sample_event = wait_var(write_info_cov_en); | |
38 | ||
39 | sample write_info_cov.wr_command { | |
40 | state wr_posted(0:255) | |
41 | if (write_info_cov.wr_command[5] == 1'b1); | |
42 | ||
43 | state wr_nonposted(0:255) | |
44 | if (write_info_cov.wr_command[5] == 1'b0); | |
45 | ||
46 | state wr_ordered(0:255) | |
47 | if (write_info_cov.wr_command[4] == 1'b1); | |
48 | ||
49 | state wr_nonordered(0:255) | |
50 | if (write_info_cov.wr_command[4] == 1'b0); | |
51 | ||
52 | state wr_64bit_addr(0:255) | |
53 | if (write_info_cov.wr_command[3] == 1'b1); | |
54 | ||
55 | state wr_32bit_addr(0:255) | |
56 | if (write_info_cov.wr_command[3] == 1'b0); | |
57 | bad_state wr_invalid_cmd(0:255) | |
58 | if (write_info_cov.wr_command[2:0] != 3'b001); | |
59 | } | |
60 | ||
61 | sample write_info_cov.wr_address_low { | |
62 | m_state wr_address_low(0:15); | |
63 | } | |
64 | ||
65 | sample write_info_cov.wr_length_low { | |
66 | m_state wr_length_low(0:15); | |
67 | ||
68 | state wr_length_even(0:15) | |
69 | if (write_info_cov.wr_length_low[0] == 1'b0); | |
70 | ||
71 | state wr_length_odd(0:15) | |
72 | if (write_info_cov.wr_length_low[0] == 1'b1); | |
73 | } | |
74 | ||
75 | sample write_info_cov.wr_dma_num { | |
76 | m_state wr_dma_num(0:31); | |
77 | } | |
78 | ||
79 | sample write_info_cov.wr_port_num { | |
80 | m_state wr_port_num(0:3); | |
81 | } | |
82 | ||
83 | sample write_info_cov.wr_transid { | |
84 | m_state wr_transid(0:63); | |
85 | } | |
86 | ||
87 | sample write_info_cov.wr_client_id { | |
88 | state wr_client_id0(1<<0); | |
89 | state wr_client_id1(1<<1); | |
90 | state wr_client_id2(1<<2); | |
91 | state wr_client_id3(1<<3); | |
92 | state wr_client_id4(1<<4); | |
93 | state wr_client_id5(1<<5); | |
94 | state wr_client_id6(1<<6); | |
95 | state wr_client_id7(1<<7); | |
96 | } | |
97 | ||
98 | sample write_info_cov.wr_first_byte_en { | |
99 | state wr_first_byte_enable01((1<< 1)-1); // 0000_0000_0000_0001 | |
100 | state wr_first_byte_enable02((1<< 2)-1); // 0000_0000_0000_0011 | |
101 | state wr_first_byte_enable03((1<< 3)-1); // 0000_0000_0000_0111 | |
102 | state wr_first_byte_enable04((1<< 4)-1); // 0000_0000_0000_1111 | |
103 | state wr_first_byte_enable05((1<< 5)-1); // 0000_0000_0001_1111 | |
104 | state wr_first_byte_enable06((1<< 6)-1); // 0000_0000_0011_1111 | |
105 | state wr_first_byte_enable07((1<< 7)-1); // 0000_0000_0111_1111 | |
106 | state wr_first_byte_enable08((1<< 8)-1); // 0000_0000_1111_1111 | |
107 | state wr_first_byte_enable09((1<< 9)-1); // 0000_0001_1111_1111 | |
108 | state wr_first_byte_enable10((1<<10)-1); // 0000_0011_1111_1111 | |
109 | state wr_first_byte_enable11((1<<11)-1); // 0000_0111_1111_1111 | |
110 | state wr_first_byte_enable12((1<<12)-1); // 0000_1111_1111_1111 | |
111 | state wr_first_byte_enable13((1<<13)-1); // 0001_1111_1111_1111 | |
112 | state wr_first_byte_enable14((1<<14)-1); // 0011_1111_1111_1111 | |
113 | state wr_first_byte_enable15((1<<15)-1); // 0111_1111_1111_1111 | |
114 | state wr_first_byte_enable16((1<<16)-1); // 1111_1111_1111_1111 | |
115 | } | |
116 | ||
117 | sample write_info_cov.wr_last_byte_en { | |
118 | bad_state wr_last_byte_enable_bad(0); // 0000_0000_0000_0000 | |
119 | state wr_last_byte_enable01((1<< 1)-1); // 0000_0000_0000_0001 | |
120 | state wr_last_byte_enable02((1<< 2)-1); // 0000_0000_0000_0011 | |
121 | state wr_last_byte_enable03((1<< 3)-1); // 0000_0000_0000_0111 | |
122 | state wr_last_byte_enable04((1<< 4)-1); // 0000_0000_0000_1111 | |
123 | state wr_last_byte_enable05((1<< 5)-1); // 0000_0000_0001_1111 | |
124 | state wr_last_byte_enable06((1<< 6)-1); // 0000_0000_0011_1111 | |
125 | state wr_last_byte_enable07((1<< 7)-1); // 0000_0000_0111_1111 | |
126 | state wr_last_byte_enable08((1<< 8)-1); // 0000_0000_1111_1111 | |
127 | state wr_last_byte_enable09((1<< 9)-1); // 0000_0001_1111_1111 | |
128 | state wr_last_byte_enable10((1<<10)-1); // 0000_0011_1111_1111 | |
129 | state wr_last_byte_enable11((1<<11)-1); // 0000_0111_1111_1111 | |
130 | state wr_last_byte_enable12((1<<12)-1); // 0000_1111_1111_1111 | |
131 | state wr_last_byte_enable13((1<<13)-1); // 0001_1111_1111_1111 | |
132 | state wr_last_byte_enable14((1<<14)-1); // 0011_1111_1111_1111 | |
133 | state wr_last_byte_enable15((1<<15)-1); // 0111_1111_1111_1111 | |
134 | state wr_last_byte_enable16((1<<16)-1); // 1111_1111_1111_1111 | |
135 | } | |
136 | ||
137 | sample write_info_cov.latency_wr_req_prev { | |
138 | state wr_req_b2b(0); | |
139 | ||
140 | state wr_req_not_b2b(0:1024) | |
141 | if (write_info_cov.latency_wr_req_prev > 0); | |
142 | } | |
143 | ||
144 | sample write_info_cov.latency_wr_req_accept { | |
145 | state wr_req_latency_fast(1); | |
146 | state wr_req_latency_best(2); | |
147 | state wr_req_latency_medium(3:9); | |
148 | state wr_req_latency_slow(10:100); | |
149 | state wr_req_latency_very_slow(101:1000); | |
150 | } | |
151 | ||
152 | sample write_info_cov.latency_wr_data_req { | |
153 | state wr_data_req_latency_fast(1); | |
154 | state wr_data_req_latency_best(2); | |
155 | state wr_data_req_latency_medium(3:9); | |
156 | state wr_data_req_latency_slow(10:100); | |
157 | state wr_data_req_latency_very_slow(101:1000); | |
158 | } | |
159 | ||
160 | sample write_info_cov.latency_wr_data_valid { | |
161 | state wr_data_valid_latency_fast(1:3); | |
162 | state wr_data_valid_latency_best(4); | |
163 | state wr_data_valid_latency_medium(5:9); | |
164 | state wr_data_valid_latency_slow(10:100); | |
165 | state wr_data_valid_latency_very_slow(101:1000); | |
166 | } | |
167 | ||
168 | sample write_info_cov.has_read_bubble { | |
169 | state has_read_bubble_true(1); | |
170 | state has_read_bubble_false(0); | |
171 | } | |
172 | } | |
173 | ||
174 | coverage_group meta_read_cov | |
175 | { | |
176 | sample_event = wait_var(read_info_cov_en); | |
177 | ||
178 | sample read_info_cov.rd_command { | |
179 | state rd_ordered(0:255) | |
180 | if (read_info_cov.rd_command[4] == 1'b1); | |
181 | ||
182 | state rd_nonordered(0:255) | |
183 | if (read_info_cov.rd_command[4] == 1'b0); | |
184 | ||
185 | state rd_64bit_addr(0:255) | |
186 | if (read_info_cov.rd_command[3] == 1'b1); | |
187 | ||
188 | state rd_32bit_addr(0:255) | |
189 | if (read_info_cov.rd_command[3] == 1'b0); | |
190 | ||
191 | bad_state rd_invalid_cmd(0:255) | |
192 | if (read_info_cov.rd_command[2:0] != 3'b000); | |
193 | } | |
194 | ||
195 | sample read_info_cov.rd_address_low { | |
196 | m_state rd_address_low(0:15); | |
197 | } | |
198 | ||
199 | sample read_info_cov.rd_length_low { | |
200 | m_state rd_length_low(0:15); | |
201 | ||
202 | state rd_length_even(0:15) | |
203 | if (read_info_cov.rd_length_low[0] == 1'b0); | |
204 | ||
205 | state rd_length_odd(0:15) | |
206 | if (read_info_cov.rd_length_low[0] == 1'b1); | |
207 | } | |
208 | ||
209 | sample read_info_cov.rd_dma_num { | |
210 | m_state rd_dma_num(0:31); | |
211 | } | |
212 | ||
213 | sample read_info_cov.rd_port_num { | |
214 | m_state rd_port_num(0:3); | |
215 | } | |
216 | ||
217 | sample read_info_cov.rd_transid { | |
218 | m_state rd_transid(0:63); | |
219 | } | |
220 | ||
221 | sample read_info_cov.rd_client_id { | |
222 | state rd_client_id0(1<<0); | |
223 | state rd_client_id1(1<<1); | |
224 | state rd_client_id2(1<<2); | |
225 | state rd_client_id3(1<<3); | |
226 | state rd_client_id4(1<<4); | |
227 | state rd_client_id5(1<<5); | |
228 | state rd_client_id6(1<<6); | |
229 | state rd_client_id7(1<<7); | |
230 | } | |
231 | ||
232 | sample read_info_cov.latency_rd_req_prev { | |
233 | state rd_req_b2b(0); | |
234 | ||
235 | state rd_req_not_b2b(0:1024) | |
236 | if (read_info_cov.latency_rd_req_prev > 0); | |
237 | } | |
238 | ||
239 | sample read_info_cov.latency_rd_req_accept { | |
240 | state rd_req_latency_fast(1); | |
241 | state rd_req_latency_best(2); | |
242 | state rd_req_latency_medium(3:9); | |
243 | state rd_req_latency_slow(10:100); | |
244 | state rd_req_latency_very_slow(101:1000); | |
245 | } | |
246 | } | |
247 | ||
248 | coverage_group meta_resp_cov | |
249 | { | |
250 | sample_event = wait_var(resp_info_cov_en); | |
251 | ||
252 | sample resp_info_cov.rp_command { | |
253 | state resp_cmd_cpl_with_data(0:255) | |
254 | if (resp_info_cov.rp_command[2:0] ==3'b101); | |
255 | ||
256 | state resp_cmd_cpl_without_data(0:255) | |
257 | if (resp_info_cov.rp_command[2:0] ==3'b110); | |
258 | ||
259 | //state resp_cmd_err_code(0:255); // review: Need error codes | |
260 | } | |
261 | ||
262 | sample resp_info_cov.rp_timeout { | |
263 | state resp_no_timeout(0); | |
264 | state resp_timeout(1); | |
265 | } | |
266 | ||
267 | sample resp_info_cov.rp_segment { | |
268 | state resp_not_segmented(0); | |
269 | state resp_segmented(1); | |
270 | } | |
271 | ||
272 | sample resp_info_cov.rp_has_resp_bubble { | |
273 | state resp_no_bubble(0); | |
274 | state resp_with_bubble(1); | |
275 | } | |
276 | ||
277 | sample resp_info_cov.rp_address_low { | |
278 | m_state rp_address_low(0:15); | |
279 | } | |
280 | ||
281 | sample resp_info_cov.rp_length_low { | |
282 | m_state rp_length_low(0:15); | |
283 | ||
284 | state rp_length_even(0:15) | |
285 | if (resp_info_cov.rp_length_low[0] == 1'b0); | |
286 | ||
287 | state rp_length_odd(0:15) | |
288 | if (resp_info_cov.rp_length_low[0] == 1'b1); | |
289 | } | |
290 | ||
291 | sample resp_info_cov.rp_dma_num { | |
292 | m_state rp_dma_num(0:31); | |
293 | } | |
294 | ||
295 | sample resp_info_cov.rp_port_num { | |
296 | m_state rp_port_num(0:3); | |
297 | } | |
298 | ||
299 | sample resp_info_cov.rp_transid { | |
300 | m_state rp_transid(0:63); | |
301 | } | |
302 | ||
303 | sample resp_info_cov.rp_client_id { | |
304 | state rp_client_id0(1<<0); | |
305 | state rp_client_id1(1<<1); | |
306 | state rp_client_id2(1<<2); | |
307 | state rp_client_id3(1<<3); | |
308 | state rp_client_id4(1<<4); | |
309 | state rp_client_id5(1<<5); | |
310 | state rp_client_id6(1<<6); | |
311 | state rp_client_id7(1<<7); | |
312 | } | |
313 | ||
314 | sample resp_info_cov.rp_first_byte_en { | |
315 | state rp_first_byte_enable_1_01(1<< 0); // 0000_0000_0000_0001 | |
316 | state rp_first_byte_enable_1_02(1<< 1); // 0000_0000_0000_0010 | |
317 | state rp_first_byte_enable_1_03(1<< 2); // | |
318 | state rp_first_byte_enable_1_04(1<< 3); // | |
319 | state rp_first_byte_enable_1_05(1<< 4); // | |
320 | state rp_first_byte_enable_1_06(1<< 5); // | |
321 | state rp_first_byte_enable_1_07(1<< 6); // | |
322 | state rp_first_byte_enable_1_08(1<< 7); // | |
323 | state rp_first_byte_enable_1_09(1<< 8); // etc | |
324 | state rp_first_byte_enable_1_10(1<< 9); // | |
325 | state rp_first_byte_enable_1_11(1<<10); // | |
326 | state rp_first_byte_enable_1_12(1<<11); // | |
327 | state rp_first_byte_enable_1_13(1<<12); // | |
328 | state rp_first_byte_enable_1_14(1<<13); // | |
329 | state rp_first_byte_enable_1_15(1<<14); // | |
330 | state rp_first_byte_enable_1_16(1<<15); // | |
331 | ||
332 | state rp_first_byte_enable_2_01(3<< 0); // 0000_0000_0000_0011 | |
333 | state rp_first_byte_enable_2_02(3<< 1); // 0000_0000_0000_0110 | |
334 | state rp_first_byte_enable_2_03(3<< 2); // | |
335 | state rp_first_byte_enable_2_04(3<< 3); // | |
336 | state rp_first_byte_enable_2_05(3<< 4); // | |
337 | state rp_first_byte_enable_2_06(3<< 5); // | |
338 | state rp_first_byte_enable_2_07(3<< 6); // | |
339 | state rp_first_byte_enable_2_08(3<< 7); // | |
340 | state rp_first_byte_enable_2_09(3<< 8); // | |
341 | state rp_first_byte_enable_2_10(3<< 9); // | |
342 | state rp_first_byte_enable_2_11(3<<10); // | |
343 | state rp_first_byte_enable_2_12(3<<11); // | |
344 | state rp_first_byte_enable_2_13(3<<12); // | |
345 | state rp_first_byte_enable_2_14(3<<13); // | |
346 | state rp_first_byte_enable_2_15(3<<14); // 1100_0000_0000_0000 | |
347 | ||
348 | state rp_first_byte_enable_3_01(7<< 0); // 0000_0000_0000_0111 | |
349 | state rp_first_byte_enable_3_02(7<< 1); // 0000_0000_0000_1110 | |
350 | state rp_first_byte_enable_3_03(7<< 2); // | |
351 | state rp_first_byte_enable_3_04(7<< 3); // | |
352 | state rp_first_byte_enable_3_05(7<< 4); // | |
353 | state rp_first_byte_enable_3_06(7<< 5); // | |
354 | state rp_first_byte_enable_3_07(7<< 6); // | |
355 | state rp_first_byte_enable_3_08(7<< 7); // | |
356 | state rp_first_byte_enable_3_09(7<< 8); // | |
357 | state rp_first_byte_enable_3_10(7<< 9); // | |
358 | state rp_first_byte_enable_3_11(7<<10); // | |
359 | state rp_first_byte_enable_3_12(7<<11); // | |
360 | state rp_first_byte_enable_3_13(7<<12); // | |
361 | state rp_first_byte_enable_3_14(7<<13); // 1110_0000_0000_0000 | |
362 | } | |
363 | ||
364 | sample resp_info_cov.latency_resp_prev { | |
365 | state resp_not_b2b(1:1000); | |
366 | state resp_b2b(1); | |
367 | } | |
368 | ||
369 | sample resp_info_cov.latency_resp_accept { | |
370 | state resp_accept_latency_fast(1); | |
371 | state resp_accept_latency_best(2); | |
372 | state resp_accept_latency_medium(3:9); | |
373 | state resp_accept_latency_slow(10:100); | |
374 | state resp_accept_latency_very_slow(101:1000); | |
375 | } | |
376 | ||
377 | sample resp_info_cov.latency_resp_data_valid { | |
378 | state resp_data_valid_latency_best(1); | |
379 | state resp_data_valid_latency_medium(2:9); | |
380 | state resp_data_valid_latency_slow(10:100); | |
381 | state resp_data_valid_latency_very_slow(101:1000); | |
382 | } | |
383 | } | |
384 | ||
385 | // End |