Initial commit of OpenSPARC T2 design and verification files.

[OpenSPARC-T2-DV] / verif / env / tcu / vera / include / dft_zeroIn_ctl.if.vri

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// OpenSPARC T2 Processor File: dft_zeroIn_ctl.if.vri
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#ifndef INC_DFT_ZEROIN_CTL_IF_VRI
#define INC_DFT_ZEROIN_CTL_IF_VRI

#include "fc_top_defines.vri"

interface dft_zeroIn_ctl_if {
  input   clk  CLOCK  verilog_node "`CPU.PLL_CMP_CLK_P";

  //---please list in alphabetical order----
  output  chk_ccu_actest_mode              NHOLD verilog_node "`TOP.dft_zeroIn_ctl.chk_ccu_actest_mode";
  output  chk_ccu_atpg_mode                NHOLD verilog_node "`TOP.dft_zeroIn_ctl.chk_ccu_atpg_mode";
  output  chk_ccu_dtm_mode                 NHOLD verilog_node "`TOP.dft_zeroIn_ctl.chk_ccu_dtm_mode";
  output  chk_ccu_func_mode                NHOLD verilog_node "`TOP.dft_zeroIn_ctl.chk_ccu_func_mode";
  output  chk_ccu_jtmacro_mode             NHOLD verilog_node "`TOP.dft_zeroIn_ctl.chk_ccu_jtmacro_mode";
  output  chk_ccu_pllbypass_mode           NHOLD verilog_node "`TOP.dft_zeroIn_ctl.chk_ccu_pllbypass_mode";
  output  chk_ccu_pllchar_mode             NHOLD verilog_node "`TOP.dft_zeroIn_ctl.chk_ccu_pllchar_mode";
  output  chk_ccu_plltest_mode             NHOLD verilog_node "`TOP.dft_zeroIn_ctl.chk_ccu_plltest_mode";
}

#endif