Initial commit of OpenSPARC T2 design and verification files.
[OpenSPARC-T2-DV] / verif / env / tcu / vera / include / pkg.port.vri
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1// ========== Copyright Header Begin ==========================================
2//
3// OpenSPARC T2 Processor File: pkg.port.vri
4// Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved
5// 4150 Network Circle, Santa Clara, California 95054, U.S.A.
6//
7// * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
8//
9// This program is free software; you can redistribute it and/or modify
10// it under the terms of the GNU General Public License as published by
11// the Free Software Foundation; version 2 of the License.
12//
13// This program is distributed in the hope that it will be useful,
14// but WITHOUT ANY WARRANTY; without even the implied warranty of
15// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16// GNU General Public License for more details.
17//
18// You should have received a copy of the GNU General Public License
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20// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21//
22// For the avoidance of doubt, and except that if any non-GPL license
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33//
34// ========== Copyright Header End ============================================
35#ifndef INC_PKG_PORT_VRI
36#define INC_PKG_PORT_VRI
37
38//
39// WHAT: port for chip-level pins
40//
41port PKG_port {
42 clk;
43
44 //---N2 input pins (listed in alphabetical order) ---
45//BUTTON_XIR_L; // do NOT delete. It's declared in rst.if.vri
46 DIVIDER_BYPASS;
47//PB_RST_L; // do NOT delete. It's declared in rst.if.vri
48 PLL_CMP_BYPASS;
49 PLL_TESTMODE;
50//PGRM_EN; // do NOT delete. It's declared in tcu.if.vri
51//PWRON_RST_L; // do NOT delete. It's declared in rst.if.vri
52//TESTMODE; // do NOT delete. It's declared in systemTap.if.vri
53 TRIGIN;
54 VDD_PLL_CMP_REG;
55 VDD_RNG_HV;
56//VPP; // do NOT delete. It's declared in tcu.if.vri
57 VREG_SELBG_L;
58
59 //--- N2 output pins (listed in alphabetical order)---
60 PLL_CHAR_OUT;
61 RNG_ANLG_CHAR_OUT;
62 TRIGOUT;
63
64 //----N2 bidirectional pins (listed in alphabetical order) ---
65 DBG_DQ_in; // when DBG_DQ pins are input mode (ie. input to DUT)
66 DBG_DQ_out; // when DBG_DQ pins are output mode (ie. output to DUT)
67}
68
69#endif