[OpenSPARC-T2-DV] / verif / model / infineon / loadpli / veriuser.o

\7fELF\ 1\ 2\ 1\0\0\0\0\0\0\0\0\0\0\ 1\0\ 2\0\0\0\ 1\0\0\0\0\0\0\0\0\0\0\ 6t\0\0\0\0\04\0\0\0\0\0(\0\r\0\ 1\0.shstrtab\0.rodata\0.data.rel.local\0.text\0.data.rel\0.bss\0.symtab\0.strtab\0.rela.data.rel.local\0.rela.text\0.rela.data.rel\0.comment\0\0\0\0\0=== OpenSparc T2 memory loadpli ===
\0\0\0\0$read_mem\0\0\0\0\0\0\0$write_mem\0\0\0\0\0\0$init_dram\0\0\0\0\0\0$read_dram\0\0\0\0\0\0$write_dram\0\0\0\0\0*** Registering OpenSparc T2 memory system tasks...
Commit	Line	Data
86530b38 AT	1	\7fELF\ 1\ 2\ 1\0\0\0\0\0\0\0\0\0\0\ 1\0\ 2\0\0\0\ 1\0\0\0\0\0\0\0\0\0\0\ 6t\0\0\0\0\04\0\0\0\0\0(\0\r\0\ 1\0.shstrtab\0.rodata\0.data.rel.local\0.text\0.data.rel\0.bss\0.symtab\0.strtab\0.rela.data.rel.local\0.rela.text\0.rela.data.rel\0.comment\0\0\0\0\0=== OpenSparc T2 memory loadpli ===
	2	\0\0\0\0$read_mem\0\0\0\0\0\0\0$write_mem\0\0\0\0\0\0$init_dram\0\0\0\0\0\0$read_dram\0\0\0\0\0\0$write_dram\0\0\0\0\0*** Registering OpenSparc T2 memory system tasks...
	3