| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: dmc_rxc_drv_ports.vri |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
| 23 | // choice is available it will apply instead, Sun elects to use only |
| 24 | // the General Public License version 2 (GPLv2) at this time for any |
| 25 | // software where a choice of GPL license versions is made |
| 26 | // available with the language indicating that GPLv2 or any later version |
| 27 | // may be used, or where a choice of which version of the GPL is applied is |
| 28 | // otherwise unspecified. |
| 29 | // |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or |
| 32 | // have any questions. |
| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | #include "rxc_defines.vri" |
| 36 | #define RXC_CK_IN_TIMING PSAMPLE #-1 |
| 37 | #define RXC_CK_OUT_TIMING PHOLD #0 |
| 38 | #define RXC_CK_CLK_TIMING CLOCK |
| 39 | |
| 40 | interface dmc_rxc_port0_if{ |
| 41 | input [129:0] rxc_dmc_pkt_data RXC_CK_IN_TIMING verilog_node RXC_DUV_PATH.ipp_dmc_data0"; |
| 42 | input rxc_dmc_ful_pkt RXC_CK_IN_TIMING verilog_node RXC_DUV_PATH.ipp_dmc_ful_pkt0"; |
| 43 | input rxc_dmc_empty RXC_CK_IN_TIMING verilog_node RXC_DUV_PATH.ipp_dmc_dat_emp0"; |
| 44 | input rxc_dmc_err RXC_CK_IN_TIMING verilog_node RXC_DUV_PATH.ipp_dmc_dat_err0"; |
| 45 | input rxc_dmc_ack RXC_CK_IN_TIMING verilog_node RXC_DUV_PATH.ipp_dmc_dat_ack0"; |
| 46 | |
| 47 | output dmc_rxc_req RXC_CK_OUT_TIMING verilog_node RXC_DUV_PATH.dmc_ipp_dat_req0"; |
| 48 | |
| 49 | input clk RXC_CK_CLK_TIMING verilog_node RXC_DUV_PATH.niu_clk"; |
| 50 | } |
| 51 | |
| 52 | interface dmc_rxc_port1_if{ |
| 53 | input [129:0] rxc_dmc_pkt_data RXC_CK_IN_TIMING verilog_node RXC_DUV_PATH.ipp_dmc_data1"; |
| 54 | input rxc_dmc_ful_pkt RXC_CK_IN_TIMING verilog_node RXC_DUV_PATH.ipp_dmc_ful_pkt1"; |
| 55 | input rxc_dmc_empty RXC_CK_IN_TIMING verilog_node RXC_DUV_PATH.ipp_dmc_dat_emp1"; |
| 56 | input rxc_dmc_err RXC_CK_IN_TIMING verilog_node RXC_DUV_PATH.ipp_dmc_dat_err1"; |
| 57 | input rxc_dmc_ack RXC_CK_IN_TIMING verilog_node RXC_DUV_PATH.ipp_dmc_dat_ack1"; |
| 58 | |
| 59 | output dmc_rxc_req RXC_CK_OUT_TIMING verilog_node RXC_DUV_PATH.dmc_ipp_dat_req1"; |
| 60 | |
| 61 | input clk RXC_CK_CLK_TIMING verilog_node RXC_DUV_PATH.niu_clk"; |
| 62 | } |
| 63 | |
| 64 | port dmc_rxc_drv_port{ |
| 65 | rxc_dmc_pkt_data; |
| 66 | rxc_dmc_ful_pkt; |
| 67 | rxc_dmc_empty; |
| 68 | rxc_dmc_err; |
| 69 | rxc_dmc_ack; |
| 70 | dmc_rxc_req; |
| 71 | clk; |
| 72 | } |
| 73 | |
| 74 | bind dmc_rxc_drv_port dmc_rxc_drv0{ |
| 75 | rxc_dmc_pkt_data dmc_rxc_port0_if.rxc_dmc_pkt_data; |
| 76 | rxc_dmc_ful_pkt dmc_rxc_port0_if.rxc_dmc_ful_pkt; |
| 77 | rxc_dmc_empty dmc_rxc_port0_if.rxc_dmc_empty; |
| 78 | rxc_dmc_err dmc_rxc_port0_if.rxc_dmc_err; |
| 79 | rxc_dmc_ack dmc_rxc_port0_if.rxc_dmc_ack; |
| 80 | dmc_rxc_req dmc_rxc_port0_if.dmc_rxc_req; |
| 81 | clk dmc_rxc_port0_if.clk; |
| 82 | } |
| 83 | |
| 84 | bind dmc_rxc_drv_port dmc_rxc_drv1{ |
| 85 | rxc_dmc_pkt_data dmc_rxc_port1_if.rxc_dmc_pkt_data; |
| 86 | rxc_dmc_ful_pkt dmc_rxc_port1_if.rxc_dmc_ful_pkt; |
| 87 | rxc_dmc_empty dmc_rxc_port1_if.rxc_dmc_empty; |
| 88 | rxc_dmc_err dmc_rxc_port1_if.rxc_dmc_err; |
| 89 | rxc_dmc_ack dmc_rxc_port1_if.rxc_dmc_ack; |
| 90 | dmc_rxc_req dmc_rxc_port1_if.dmc_rxc_req; |
| 91 | clk dmc_rxc_port0_if.clk; |
| 92 | } |
| 93 | |