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* OpenSPARC T2 Processor File: n2_err_ncu_ejr.s
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#define MAIN_PAGE_NUCLEUS_ALSO
#define MAIN_PAGE_HV_ALSO
#define SOC_ESR_REG 0x8000003000
#define SOC_ELE_REG 0x8000003008
#define SOC_EIE_REG 0x8000003010
#define SOC_EJR_REG 0x8000003018
#define SOC_FEE_REG 0x8000003020
#define SOC_PER_REG 0x8000003028
#define SOC_SII_SYN_REG 0x8000003030
#define SOC_NCU_SYN_REG 0x8000003038
setx 0xffffffffffffffff, %l7, %g7
/********************************
* SOC Error Injection Register
*********************************/
setx SOC_EJR_REG, %l7, %g5
/******************************************************
*******************************************************/